2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21 #include <linux/completion.h>
22 #include <linux/if_ether.h>
23 #include <linux/types.h>
24 #include <linux/pci.h>
25 #include <linux/uuid.h>
26 #include <linux/time.h>
31 #include "targaddrs.h"
35 #include "../dfs_pattern_detector.h"
41 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
42 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
43 #define WO(_f) ((_f##_OFFSET) >> 2)
45 #define ATH10K_SCAN_ID 0
46 #define WMI_READY_TIMEOUT (5 * HZ)
47 #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
48 #define ATH10K_CONNECTION_LOSS_HZ (3*HZ)
49 #define ATH10K_NUM_CHANS 39
51 /* Antenna noise floor */
52 #define ATH10K_DEFAULT_NOISE_FLOOR -95
54 #define ATH10K_MAX_NUM_MGMT_PENDING 128
56 /* number of failed packets (20 packets with 16 sw reties each) */
57 #define ATH10K_KICKOUT_THRESHOLD (20 * 16)
60 * Use insanely high numbers to make sure that the firmware implementation
61 * won't start, we have the same functionality already in hostapd. Unit
64 #define ATH10K_KEEPALIVE_MIN_IDLE 3747
65 #define ATH10K_KEEPALIVE_MAX_IDLE 3895
66 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
74 static inline const char *ath10k_bus_str(enum ath10k_bus bus)
84 struct ath10k_skb_cb {
88 enum ath10k_hw_txrx_mode txmode;
96 struct ath10k_htt_txbuf *txbuf;
106 struct ath10k_skb_rxcb {
108 struct hlist_node hlist;
111 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
113 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
114 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
115 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
118 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
120 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
121 return (struct ath10k_skb_rxcb *)skb->cb;
124 #define ATH10K_RXCB_SKB(rxcb) \
125 container_of((void *)rxcb, struct sk_buff, cb)
127 static inline u32 host_interest_item_address(u32 item_offset)
129 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
136 struct ath10k_mem_chunk {
144 enum ath10k_fw_wmi_op_version op_version;
145 enum ath10k_htc_ep_id eid;
146 struct completion service_ready;
147 struct completion unified_ready;
148 wait_queue_head_t tx_credits_wq;
149 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
150 struct wmi_cmd_map *cmd;
151 struct wmi_vdev_param_map *vdev_param;
152 struct wmi_pdev_param_map *pdev_param;
153 const struct wmi_ops *ops;
157 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
160 struct ath10k_fw_stats_peer {
161 struct list_head list;
163 u8 peer_macaddr[ETH_ALEN];
166 u32 peer_rx_rate; /* 10x only */
169 struct ath10k_fw_stats_vdev {
170 struct list_head list;
175 u32 num_tx_frames[4];
177 u32 num_tx_frames_retries[4];
178 u32 num_tx_frames_failures[4];
183 u32 num_tx_not_acked;
184 u32 tx_rate_history[10];
185 u32 beacon_rssi_history[10];
188 struct ath10k_fw_stats_pdev {
189 struct list_head list;
223 u32 sw_retry_failure;
224 u32 illgl_rate_phy_err;
225 u32 pdev_cont_xretry;
231 u32 seq_failed_queueing;
238 u32 mpdus_ack_failed;
242 s32 mid_ppdu_route_change;
259 struct ath10k_fw_stats {
260 struct list_head pdevs;
261 struct list_head vdevs;
262 struct list_head peers;
265 #define ATH10K_TPC_TABLE_TYPE_FLAG 1
266 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF
268 struct ath10k_tpc_table {
269 u32 pream_idx[WMI_TPC_RATE_MAX];
270 u8 rate_code[WMI_TPC_RATE_MAX];
271 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
274 struct ath10k_tpc_stats {
278 u32 twice_antenna_reduction;
279 u32 twice_max_rd_power;
280 s32 twice_antenna_gain;
285 u8 flag[WMI_TPC_FLAG];
286 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
289 struct ath10k_dfs_stats {
293 u32 pulses_discarded;
297 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
300 struct list_head list;
303 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
305 /* protected by ar->data_lock */
306 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
310 struct ath10k_vif *arvif;
312 /* the following are protected by ar->data_lock */
313 u32 changed; /* IEEE80211_RC_* */
318 struct work_struct update_wk;
320 #ifdef CONFIG_MAC80211_DEBUGFS
321 /* protected by conf_mutex */
326 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
328 enum ath10k_beacon_state {
329 ATH10K_BEACON_SCHEDULED = 0,
330 ATH10K_BEACON_SENDING,
335 struct list_head list;
338 enum wmi_vdev_type vdev_type;
339 enum wmi_vdev_subtype vdev_subtype;
342 struct sk_buff *beacon;
343 /* protected by data_lock */
344 enum ath10k_beacon_state beacon_state;
346 dma_addr_t beacon_paddr;
347 unsigned long tx_paused; /* arbitrary values defined by target */
350 struct ieee80211_vif *vif;
354 bool spectral_enabled;
359 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
373 u8 ssid[IEEE80211_MAX_SSID_LEN];
375 /* P2P_IE with NoA attribute for P2P_GO case */
383 int num_legacy_stations;
385 struct wmi_wmm_params_all_arg wmm_params;
386 struct work_struct ap_csa_work;
387 struct delayed_work connection_loss_work;
388 struct cfg80211_bitrate_mask bitrate_mask;
391 struct ath10k_vif_iter {
393 struct ath10k_vif *arvif;
396 /* used for crash-dump storage, protected by data-lock */
397 struct ath10k_fw_crash_data {
398 bool crashed_since_read;
401 struct timespec timestamp;
402 __le32 registers[REG_DUMP_COUNT_QCA988X];
405 struct ath10k_debug {
406 struct dentry *debugfs_phy;
408 struct ath10k_fw_stats fw_stats;
409 struct completion fw_stats_complete;
412 unsigned long htt_stats_mask;
413 struct delayed_work htt_stats_dwork;
414 struct ath10k_dfs_stats dfs_stats;
415 struct ath_dfs_pool_stats dfs_pool_stats;
417 /* used for tpc-dump storage, protected by data-lock */
418 struct ath10k_tpc_stats *tpc_stats;
420 struct completion tpc_complete;
422 /* protected by conf_mutex */
429 struct ath10k_fw_crash_data *fw_crash_data;
433 ATH10K_STATE_OFF = 0,
436 /* When doing firmware recovery the device is first powered down.
437 * mac80211 is supposed to call in to start() hook later on. It is
438 * however possible that driver unloading and firmware crash overlap.
439 * mac80211 can wait on conf_mutex in stop() while the device is
440 * stopped in ath10k_core_restart() work holding conf_mutex. The state
441 * RESTARTED means that the device is up and mac80211 has started hw
442 * reconfiguration. Once mac80211 is done with the reconfiguration we
443 * set the state to STATE_ON in reconfig_complete(). */
444 ATH10K_STATE_RESTARTING,
445 ATH10K_STATE_RESTARTED,
447 /* The device has crashed while restarting hw. This state is like ON
448 * but commands are blocked in HTC and -ECOMM response is given. This
449 * prevents completion timeouts and makes the driver more responsive to
450 * userspace commands. This is also prevents recursive recovery. */
457 enum ath10k_firmware_mode {
458 /* the default mode, standard 802.11 functionality */
459 ATH10K_FIRMWARE_MODE_NORMAL,
461 /* factory tests etc */
462 ATH10K_FIRMWARE_MODE_UTF,
465 enum ath10k_fw_features {
466 /* wmi_mgmt_rx_hdr contains extra RSSI information */
467 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
469 /* Firmware from 10X branch. Deprecated, don't use in new code. */
470 ATH10K_FW_FEATURE_WMI_10X = 1,
472 /* firmware support tx frame management over WMI, otherwise it's HTT */
473 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
475 /* Firmware does not support P2P */
476 ATH10K_FW_FEATURE_NO_P2P = 3,
478 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
479 * bit is required to be set as well. Deprecated, don't use in new
482 ATH10K_FW_FEATURE_WMI_10_2 = 4,
484 /* Some firmware revisions lack proper multi-interface client powersave
485 * implementation. Enabling PS could result in connection drops,
486 * traffic stalls, etc.
488 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
490 /* Some firmware revisions have an incomplete WoWLAN implementation
491 * despite WMI service bit being advertised. This feature flag is used
492 * to distinguish whether WoWLAN is really supported or not.
494 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
496 /* Don't trust error code from otp.bin */
497 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
499 /* Some firmware revisions pad 4th hw address to 4 byte boundary making
500 * it 8 bytes long in Native Wifi Rx decap.
502 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
504 /* Firmware supports bypassing PLL setting on init. */
505 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
507 /* Raw mode support. If supported, FW supports receiving and trasmitting
508 * frames in raw mode.
510 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
512 /* Firmware Supports Adaptive CCA*/
513 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
516 ATH10K_FW_FEATURE_COUNT,
519 enum ath10k_dev_flags {
520 /* Indicates that ath10k device is during CAC phase of DFS */
522 ATH10K_FLAG_CORE_REGISTERED,
524 /* Device has crashed and needs to restart. This indicates any pending
525 * waiters should immediately cancel instead of waiting for a time out.
527 ATH10K_FLAG_CRASH_FLUSH,
529 /* Use Raw mode instead of native WiFi Tx/Rx encap mode.
530 * Raw mode supports both hardware and software crypto. Native WiFi only
531 * supports hardware crypto.
533 ATH10K_FLAG_RAW_MODE,
535 /* Disable HW crypto engine */
536 ATH10K_FLAG_HW_CRYPTO_DISABLED,
539 enum ath10k_cal_mode {
540 ATH10K_CAL_MODE_FILE,
545 enum ath10k_crypt_mode {
546 /* Only use hardware crypto engine */
547 ATH10K_CRYPT_MODE_HW,
548 /* Only use software crypto engine */
549 ATH10K_CRYPT_MODE_SW,
552 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
555 case ATH10K_CAL_MODE_FILE:
557 case ATH10K_CAL_MODE_OTP:
559 case ATH10K_CAL_MODE_DT:
566 enum ath10k_scan_state {
568 ATH10K_SCAN_STARTING,
570 ATH10K_SCAN_ABORTING,
573 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
576 case ATH10K_SCAN_IDLE:
578 case ATH10K_SCAN_STARTING:
580 case ATH10K_SCAN_RUNNING:
582 case ATH10K_SCAN_ABORTING:
589 enum ath10k_tx_pause_reason {
590 ATH10K_TX_PAUSE_Q_FULL,
595 struct ath_common ath_common;
596 struct ieee80211_hw *hw;
598 u8 mac_addr[ETH_ALEN];
600 enum ath10k_hw_rev hw_rev;
605 u32 fw_version_minor;
606 u16 fw_version_release;
607 u16 fw_version_build;
608 u32 fw_stats_req_mask;
615 u32 max_spatial_stream;
616 /* protected by conf_mutex */
619 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
625 const struct ath10k_hif_ops *ops;
628 struct completion target_suspend;
630 const struct ath10k_hw_regs *regs;
631 const struct ath10k_hw_values *hw_values;
632 struct ath10k_bmi bmi;
633 struct ath10k_wmi wmi;
634 struct ath10k_htc htc;
635 struct ath10k_htt htt;
637 struct ath10k_hw_params {
645 /* This is true if given HW chip has a quirky Cycle Counter
646 * wraparound which resets to 0x7fffffff instead of 0. All
647 * other CC related counters (e.g. Rx Clear Count) are divided
648 * by 2 so they never wraparound themselves.
650 bool has_shifted_cc_wraparound;
652 /* Some of chip expects fragment descriptor to be continuous
653 * memory for any TX operation. Set continuous_frag_desc flag
654 * for the hardware which have such requirement.
656 bool continuous_frag_desc;
658 u32 channel_counters_freq_hz;
660 /* Mgmt tx descriptors threshold for limiting probe response
663 u32 max_probe_resp_desc_thres;
665 struct ath10k_hw_params_fw {
671 size_t board_ext_size;
674 /* Number of bytes used for alignment in rx_hdr_status */
675 int decap_align_bytes;
679 const struct firmware *board;
680 const void *board_data;
683 const struct firmware *otp;
684 const void *otp_data;
687 const struct firmware *firmware;
688 const void *firmware_data;
691 const struct firmware *cal_file;
694 const void *firmware_codeswap_data;
695 size_t firmware_codeswap_len;
696 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
702 u32 subsystem_vendor;
703 u32 subsystem_device;
712 enum ath10k_cal_mode cal_mode;
715 struct completion started;
716 struct completion completed;
717 struct completion on_channel;
718 struct delayed_work timeout;
719 enum ath10k_scan_state state;
727 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
730 /* should never be NULL; needed for regular htt rx */
731 struct ieee80211_channel *rx_channel;
733 /* valid during scan; needed for mgmt rx during scan */
734 struct ieee80211_channel *scan_channel;
736 /* current operating channel definition */
737 struct cfg80211_chan_def chandef;
739 unsigned long long free_vdev_map;
740 struct ath10k_vif *monitor_arvif;
743 bool monitor_started;
744 unsigned int filter_flags;
745 unsigned long dev_flags;
746 bool dfs_block_radar_events;
748 /* protected by conf_mutex */
750 int num_started_vdevs;
752 /* Protected by conf-mutex */
756 struct completion install_key_done;
758 int last_wmi_vdev_start_status;
759 struct completion vdev_setup_done;
761 struct workqueue_struct *workqueue;
762 /* Auxiliary workqueue */
763 struct workqueue_struct *workqueue_aux;
765 /* prevents concurrent FW reconfiguration */
766 struct mutex conf_mutex;
768 /* protects shared structure data */
769 spinlock_t data_lock;
771 struct list_head arvifs;
772 struct list_head peers;
773 wait_queue_head_t peer_mapping_wq;
775 /* protected by conf_mutex */
780 int max_num_stations;
782 int max_num_tdls_vdevs;
783 int num_active_peers;
786 struct work_struct svc_rdy_work;
787 struct sk_buff *svc_rdy_skb;
789 struct work_struct offchan_tx_work;
790 struct sk_buff_head offchan_tx_queue;
791 struct completion offchan_tx_completed;
792 struct sk_buff *offchan_tx_skb;
794 struct work_struct wmi_mgmt_tx_work;
795 struct sk_buff_head wmi_mgmt_tx_queue;
797 enum ath10k_state state;
799 struct work_struct register_work;
800 struct work_struct restart_work;
802 /* cycle count is reported twice for each visited channel during scan.
803 * access protected by data_lock */
804 u32 survey_last_rx_clear_count;
805 u32 survey_last_cycle_count;
806 struct survey_info survey[ATH10K_NUM_CHANS];
808 /* Channel info events are expected to come in pairs without and with
809 * COMPLETE flag set respectively for each channel visit during scan.
811 * However there are deviations from this rule. This flag is used to
812 * avoid reporting garbage data.
814 bool ch_info_can_report_survey;
816 struct dfs_pattern_detector *dfs_detector;
818 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
820 #ifdef CONFIG_ATH10K_DEBUGFS
821 struct ath10k_debug debug;
825 /* relay(fs) channel for spectral scan */
826 struct rchan *rfs_chan_spec_scan;
828 /* spectral_mode and spec_config are protected by conf_mutex */
829 enum ath10k_spectral_mode mode;
830 struct ath10k_spec_scan config;
834 /* protected by conf_mutex */
835 const struct firmware *utf;
836 char utf_version[32];
837 const void *utf_firmware_data;
838 size_t utf_firmware_len;
839 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT);
840 enum ath10k_fw_wmi_op_version orig_wmi_op_version;
841 enum ath10k_fw_wmi_op_version op_version;
842 /* protected by data_lock */
847 /* protected by data_lock */
848 u32 fw_crash_counter;
849 u32 fw_warm_reset_counter;
850 u32 fw_cold_reset_counter;
853 struct ath10k_thermal thermal;
854 struct ath10k_wow wow;
857 u8 drv_priv[0] __aligned(sizeof(void *));
860 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
862 enum ath10k_hw_rev hw_rev,
863 const struct ath10k_hif_ops *hif_ops);
864 void ath10k_core_destroy(struct ath10k *ar);
865 void ath10k_core_get_fw_features_str(struct ath10k *ar,
869 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode);
870 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
871 void ath10k_core_stop(struct ath10k *ar);
872 int ath10k_core_register(struct ath10k *ar, u32 chip_id);
873 void ath10k_core_unregister(struct ath10k *ar);
875 #endif /* _CORE_H_ */