drivers/net/wireless/ath/ath10k/core.c

   1 // SPDX-License-Identifier: ISC
   2 /*
   3  * Copyright (c) 2005-2011 Atheros Communications Inc.
   4  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
   5  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/firmware.h>
  10 #include <linux/of.h>
  11 #include <linux/property.h>
  12 #include <linux/dmi.h>
  13 #include <linux/ctype.h>
  14 #include <linux/pm_qos.h>
  15 #include <linux/nvmem-consumer.h>
  16 #include <asm/byteorder.h>
  17
  18 #include "core.h"
  19 #include "mac.h"
  20 #include "htc.h"
  21 #include "hif.h"
  22 #include "wmi.h"
  23 #include "bmi.h"
  24 #include "debug.h"
  25 #include "htt.h"
  26 #include "testmode.h"
  27 #include "wmi-ops.h"
  28 #include "coredump.h"
  29
  30 unsigned int ath10k_debug_mask;
  31 EXPORT_SYMBOL(ath10k_debug_mask);
  32
  33 static unsigned int ath10k_cryptmode_param;
  34 static bool uart_print;
  35 static bool skip_otp;
  36 static bool rawmode;
  37 static bool fw_diag_log;
  38
  39 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
  40                                      BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
  41
  42 /* FIXME: most of these should be readonly */
  43 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  44 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  45 module_param(uart_print, bool, 0644);
  46 module_param(skip_otp, bool, 0644);
  47 module_param(rawmode, bool, 0644);
  48 module_param(fw_diag_log, bool, 0644);
  49 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
  50
  51 MODULE_PARM_DESC(debug_mask, "Debugging mask");
  52 MODULE_PARM_DESC(uart_print, "Uart target debugging");
  53 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  54 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  55 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
  56 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
  57 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging");
  58
  59 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  60         {
  61                 .id = QCA988X_HW_2_0_VERSION,
  62                 .dev_id = QCA988X_2_0_DEVICE_ID,
  63                 .bus = ATH10K_BUS_PCI,
  64                 .name = "qca988x hw2.0",
  65                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  66                 .uart_pin = 7,
  67                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  68                 .otp_exe_param = 0,
  69                 .channel_counters_freq_hz = 88000,
  70                 .max_probe_resp_desc_thres = 0,
  71                 .cal_data_len = 2116,
  72                 .fw = {
  73                         .dir = QCA988X_HW_2_0_FW_DIR,
  74                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  75                         .board_size = QCA988X_BOARD_DATA_SZ,
  76                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  77                 },
  78                 .rx_desc_ops = &qca988x_rx_desc_ops,
  79                 .hw_ops = &qca988x_ops,
  80                 .decap_align_bytes = 4,
  81                 .spectral_bin_discard = 0,
  82                 .spectral_bin_offset = 0,
  83                 .vht160_mcs_rx_highest = 0,
  84                 .vht160_mcs_tx_highest = 0,
  85                 .n_cipher_suites = 8,
  86                 .ast_skid_limit = 0x10,
  87                 .num_wds_entries = 0x20,
  88                 .target_64bit = false,
  89                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
  90                 .shadow_reg_support = false,
  91                 .rri_on_ddr = false,
  92                 .hw_filter_reset_required = true,
  93                 .fw_diag_ce_download = false,
  94                 .credit_size_workaround = false,
  95                 .tx_stats_over_pktlog = true,
  96                 .dynamic_sar_support = false,
  97                 .hw_restart_disconnect = false,
  98         },
  99         {
 100                 .id = QCA988X_HW_2_0_VERSION,
 101                 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
 102                 .name = "qca988x hw2.0 ubiquiti",
 103                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
 104                 .uart_pin = 7,
 105                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 106                 .otp_exe_param = 0,
 107                 .channel_counters_freq_hz = 88000,
 108                 .max_probe_resp_desc_thres = 0,
 109                 .cal_data_len = 2116,
 110                 .fw = {
 111                         .dir = QCA988X_HW_2_0_FW_DIR,
 112                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
 113                         .board_size = QCA988X_BOARD_DATA_SZ,
 114                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
 115                 },
 116                 .rx_desc_ops = &qca988x_rx_desc_ops,
 117                 .hw_ops = &qca988x_ops,
 118                 .decap_align_bytes = 4,
 119                 .spectral_bin_discard = 0,
 120                 .spectral_bin_offset = 0,
 121                 .vht160_mcs_rx_highest = 0,
 122                 .vht160_mcs_tx_highest = 0,
 123                 .n_cipher_suites = 8,
 124                 .ast_skid_limit = 0x10,
 125                 .num_wds_entries = 0x20,
 126                 .target_64bit = false,
 127                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 128                 .shadow_reg_support = false,
 129                 .rri_on_ddr = false,
 130                 .hw_filter_reset_required = true,
 131                 .fw_diag_ce_download = false,
 132                 .credit_size_workaround = false,
 133                 .tx_stats_over_pktlog = true,
 134                 .dynamic_sar_support = false,
 135                 .hw_restart_disconnect = false,
 136         },
 137         {
 138                 .id = QCA9887_HW_1_0_VERSION,
 139                 .dev_id = QCA9887_1_0_DEVICE_ID,
 140                 .bus = ATH10K_BUS_PCI,
 141                 .name = "qca9887 hw1.0",
 142                 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
 143                 .uart_pin = 7,
 144                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 145                 .otp_exe_param = 0,
 146                 .channel_counters_freq_hz = 88000,
 147                 .max_probe_resp_desc_thres = 0,
 148                 .cal_data_len = 2116,
 149                 .fw = {
 150                         .dir = QCA9887_HW_1_0_FW_DIR,
 151                         .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
 152                         .board_size = QCA9887_BOARD_DATA_SZ,
 153                         .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
 154                 },
 155                 .rx_desc_ops = &qca988x_rx_desc_ops,
 156                 .hw_ops = &qca988x_ops,
 157                 .decap_align_bytes = 4,
 158                 .spectral_bin_discard = 0,
 159                 .spectral_bin_offset = 0,
 160                 .vht160_mcs_rx_highest = 0,
 161                 .vht160_mcs_tx_highest = 0,
 162                 .n_cipher_suites = 8,
 163                 .ast_skid_limit = 0x10,
 164                 .num_wds_entries = 0x20,
 165                 .target_64bit = false,
 166                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 167                 .shadow_reg_support = false,
 168                 .rri_on_ddr = false,
 169                 .hw_filter_reset_required = true,
 170                 .fw_diag_ce_download = false,
 171                 .credit_size_workaround = false,
 172                 .tx_stats_over_pktlog = false,
 173                 .dynamic_sar_support = false,
 174                 .hw_restart_disconnect = false,
 175         },
 176         {
 177                 .id = QCA6174_HW_3_2_VERSION,
 178                 .dev_id = QCA6174_3_2_DEVICE_ID,
 179                 .bus = ATH10K_BUS_SDIO,
 180                 .name = "qca6174 hw3.2 sdio",
 181                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 182                 .uart_pin = 19,
 183                 .otp_exe_param = 0,
 184                 .channel_counters_freq_hz = 88000,
 185                 .max_probe_resp_desc_thres = 0,
 186                 .cal_data_len = 0,
 187                 .fw = {
 188                         .dir = QCA6174_HW_3_0_FW_DIR,
 189                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 190                         .board_size = QCA6174_BOARD_DATA_SZ,
 191                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 192                 },
 193                 .rx_desc_ops = &qca988x_rx_desc_ops,
 194                 .hw_ops = &qca6174_sdio_ops,
 195                 .hw_clk = qca6174_clk,
 196                 .target_cpu_freq = 176000000,
 197                 .decap_align_bytes = 4,
 198                 .n_cipher_suites = 8,
 199                 .num_peers = 10,
 200                 .ast_skid_limit = 0x10,
 201                 .num_wds_entries = 0x20,
 202                 .uart_pin_workaround = true,
 203                 .tx_stats_over_pktlog = false,
 204                 .credit_size_workaround = false,
 205                 .bmi_large_size_download = true,
 206                 .supports_peer_stats_info = true,
 207                 .dynamic_sar_support = true,
 208                 .hw_restart_disconnect = false,
 209         },
 210         {
 211                 .id = QCA6174_HW_2_1_VERSION,
 212                 .dev_id = QCA6164_2_1_DEVICE_ID,
 213                 .bus = ATH10K_BUS_PCI,
 214                 .name = "qca6164 hw2.1",
 215                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 216                 .uart_pin = 6,
 217                 .otp_exe_param = 0,
 218                 .channel_counters_freq_hz = 88000,
 219                 .max_probe_resp_desc_thres = 0,
 220                 .cal_data_len = 8124,
 221                 .fw = {
 222                         .dir = QCA6174_HW_2_1_FW_DIR,
 223                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 224                         .board_size = QCA6174_BOARD_DATA_SZ,
 225                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 226                 },
 227                 .rx_desc_ops = &qca988x_rx_desc_ops,
 228                 .hw_ops = &qca988x_ops,
 229                 .decap_align_bytes = 4,
 230                 .spectral_bin_discard = 0,
 231                 .spectral_bin_offset = 0,
 232                 .vht160_mcs_rx_highest = 0,
 233                 .vht160_mcs_tx_highest = 0,
 234                 .n_cipher_suites = 8,
 235                 .ast_skid_limit = 0x10,
 236                 .num_wds_entries = 0x20,
 237                 .target_64bit = false,
 238                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 239                 .shadow_reg_support = false,
 240                 .rri_on_ddr = false,
 241                 .hw_filter_reset_required = true,
 242                 .fw_diag_ce_download = false,
 243                 .credit_size_workaround = false,
 244                 .tx_stats_over_pktlog = false,
 245                 .dynamic_sar_support = false,
 246                 .hw_restart_disconnect = false,
 247         },
 248         {
 249                 .id = QCA6174_HW_2_1_VERSION,
 250                 .dev_id = QCA6174_2_1_DEVICE_ID,
 251                 .bus = ATH10K_BUS_PCI,
 252                 .name = "qca6174 hw2.1",
 253                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 254                 .uart_pin = 6,
 255                 .otp_exe_param = 0,
 256                 .channel_counters_freq_hz = 88000,
 257                 .max_probe_resp_desc_thres = 0,
 258                 .cal_data_len = 8124,
 259                 .fw = {
 260                         .dir = QCA6174_HW_2_1_FW_DIR,
 261                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 262                         .board_size = QCA6174_BOARD_DATA_SZ,
 263                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 264                 },
 265                 .rx_desc_ops = &qca988x_rx_desc_ops,
 266                 .hw_ops = &qca988x_ops,
 267                 .decap_align_bytes = 4,
 268                 .spectral_bin_discard = 0,
 269                 .spectral_bin_offset = 0,
 270                 .vht160_mcs_rx_highest = 0,
 271                 .vht160_mcs_tx_highest = 0,
 272                 .n_cipher_suites = 8,
 273                 .ast_skid_limit = 0x10,
 274                 .num_wds_entries = 0x20,
 275                 .target_64bit = false,
 276                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 277                 .shadow_reg_support = false,
 278                 .rri_on_ddr = false,
 279                 .hw_filter_reset_required = true,
 280                 .fw_diag_ce_download = false,
 281                 .credit_size_workaround = false,
 282                 .tx_stats_over_pktlog = false,
 283                 .dynamic_sar_support = false,
 284                 .hw_restart_disconnect = false,
 285         },
 286         {
 287                 .id = QCA6174_HW_3_0_VERSION,
 288                 .dev_id = QCA6174_2_1_DEVICE_ID,
 289                 .bus = ATH10K_BUS_PCI,
 290                 .name = "qca6174 hw3.0",
 291                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 292                 .uart_pin = 6,
 293                 .otp_exe_param = 0,
 294                 .channel_counters_freq_hz = 88000,
 295                 .max_probe_resp_desc_thres = 0,
 296                 .cal_data_len = 8124,
 297                 .fw = {
 298                         .dir = QCA6174_HW_3_0_FW_DIR,
 299                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 300                         .board_size = QCA6174_BOARD_DATA_SZ,
 301                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 302                 },
 303                 .rx_desc_ops = &qca988x_rx_desc_ops,
 304                 .hw_ops = &qca988x_ops,
 305                 .decap_align_bytes = 4,
 306                 .spectral_bin_discard = 0,
 307                 .spectral_bin_offset = 0,
 308                 .vht160_mcs_rx_highest = 0,
 309                 .vht160_mcs_tx_highest = 0,
 310                 .n_cipher_suites = 8,
 311                 .ast_skid_limit = 0x10,
 312                 .num_wds_entries = 0x20,
 313                 .target_64bit = false,
 314                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 315                 .shadow_reg_support = false,
 316                 .rri_on_ddr = false,
 317                 .hw_filter_reset_required = true,
 318                 .fw_diag_ce_download = false,
 319                 .credit_size_workaround = false,
 320                 .tx_stats_over_pktlog = false,
 321                 .dynamic_sar_support = false,
 322                 .hw_restart_disconnect = false,
 323         },
 324         {
 325                 .id = QCA6174_HW_3_2_VERSION,
 326                 .dev_id = QCA6174_2_1_DEVICE_ID,
 327                 .bus = ATH10K_BUS_PCI,
 328                 .name = "qca6174 hw3.2",
 329                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 330                 .uart_pin = 6,
 331                 .otp_exe_param = 0,
 332                 .channel_counters_freq_hz = 88000,
 333                 .max_probe_resp_desc_thres = 0,
 334                 .cal_data_len = 8124,
 335                 .fw = {
 336                         /* uses same binaries as hw3.0 */
 337                         .dir = QCA6174_HW_3_0_FW_DIR,
 338                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 339                         .board_size = QCA6174_BOARD_DATA_SZ,
 340                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 341                 },
 342                 .rx_desc_ops = &qca988x_rx_desc_ops,
 343                 .hw_ops = &qca6174_ops,
 344                 .hw_clk = qca6174_clk,
 345                 .target_cpu_freq = 176000000,
 346                 .decap_align_bytes = 4,
 347                 .spectral_bin_discard = 0,
 348                 .spectral_bin_offset = 0,
 349                 .vht160_mcs_rx_highest = 0,
 350                 .vht160_mcs_tx_highest = 0,
 351                 .n_cipher_suites = 8,
 352                 .ast_skid_limit = 0x10,
 353                 .num_wds_entries = 0x20,
 354                 .target_64bit = false,
 355                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 356                 .shadow_reg_support = false,
 357                 .rri_on_ddr = false,
 358                 .hw_filter_reset_required = true,
 359                 .fw_diag_ce_download = true,
 360                 .credit_size_workaround = false,
 361                 .tx_stats_over_pktlog = false,
 362                 .supports_peer_stats_info = true,
 363                 .dynamic_sar_support = true,
 364                 .hw_restart_disconnect = false,
 365         },
 366         {
 367                 .id = QCA99X0_HW_2_0_DEV_VERSION,
 368                 .dev_id = QCA99X0_2_0_DEVICE_ID,
 369                 .bus = ATH10K_BUS_PCI,
 370                 .name = "qca99x0 hw2.0",
 371                 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
 372                 .uart_pin = 7,
 373                 .otp_exe_param = 0x00000700,
 374                 .continuous_frag_desc = true,
 375                 .cck_rate_map_rev2 = true,
 376                 .channel_counters_freq_hz = 150000,
 377                 .max_probe_resp_desc_thres = 24,
 378                 .tx_chain_mask = 0xf,
 379                 .rx_chain_mask = 0xf,
 380                 .max_spatial_stream = 4,
 381                 .cal_data_len = 12064,
 382                 .fw = {
 383                         .dir = QCA99X0_HW_2_0_FW_DIR,
 384                         .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
 385                         .board_size = QCA99X0_BOARD_DATA_SZ,
 386                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 387                 },
 388                 .sw_decrypt_mcast_mgmt = true,
 389                 .rx_desc_ops = &qca99x0_rx_desc_ops,
 390                 .hw_ops = &qca99x0_ops,
 391                 .decap_align_bytes = 1,
 392                 .spectral_bin_discard = 4,
 393                 .spectral_bin_offset = 0,
 394                 .vht160_mcs_rx_highest = 0,
 395                 .vht160_mcs_tx_highest = 0,
 396                 .n_cipher_suites = 11,
 397                 .ast_skid_limit = 0x10,
 398                 .num_wds_entries = 0x20,
 399                 .target_64bit = false,
 400                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 401                 .shadow_reg_support = false,
 402                 .rri_on_ddr = false,
 403                 .hw_filter_reset_required = true,
 404                 .fw_diag_ce_download = false,
 405                 .credit_size_workaround = false,
 406                 .tx_stats_over_pktlog = false,
 407                 .dynamic_sar_support = false,
 408                 .hw_restart_disconnect = false,
 409         },
 410         {
 411                 .id = QCA9984_HW_1_0_DEV_VERSION,
 412                 .dev_id = QCA9984_1_0_DEVICE_ID,
 413                 .bus = ATH10K_BUS_PCI,
 414                 .name = "qca9984/qca9994 hw1.0",
 415                 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
 416                 .uart_pin = 7,
 417                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 418                 .otp_exe_param = 0x00000700,
 419                 .continuous_frag_desc = true,
 420                 .cck_rate_map_rev2 = true,
 421                 .channel_counters_freq_hz = 150000,
 422                 .max_probe_resp_desc_thres = 24,
 423                 .tx_chain_mask = 0xf,
 424                 .rx_chain_mask = 0xf,
 425                 .max_spatial_stream = 4,
 426                 .cal_data_len = 12064,
 427                 .fw = {
 428                         .dir = QCA9984_HW_1_0_FW_DIR,
 429                         .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
 430                         .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE,
 431                         .board_size = QCA99X0_BOARD_DATA_SZ,
 432                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 433                         .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
 434                 },
 435                 .sw_decrypt_mcast_mgmt = true,
 436                 .rx_desc_ops = &qca99x0_rx_desc_ops,
 437                 .hw_ops = &qca99x0_ops,
 438                 .decap_align_bytes = 1,
 439                 .spectral_bin_discard = 12,
 440                 .spectral_bin_offset = 8,
 441
 442                 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
 443                  * or 2x2 160Mhz, long-guard-interval.
 444                  */
 445                 .vht160_mcs_rx_highest = 1560,
 446                 .vht160_mcs_tx_highest = 1560,
 447                 .n_cipher_suites = 11,
 448                 .ast_skid_limit = 0x10,
 449                 .num_wds_entries = 0x20,
 450                 .target_64bit = false,
 451                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 452                 .shadow_reg_support = false,
 453                 .rri_on_ddr = false,
 454                 .hw_filter_reset_required = true,
 455                 .fw_diag_ce_download = false,
 456                 .credit_size_workaround = false,
 457                 .tx_stats_over_pktlog = false,
 458                 .dynamic_sar_support = false,
 459                 .hw_restart_disconnect = false,
 460         },
 461         {
 462                 .id = QCA9888_HW_2_0_DEV_VERSION,
 463                 .dev_id = QCA9888_2_0_DEVICE_ID,
 464                 .bus = ATH10K_BUS_PCI,
 465                 .name = "qca9888 hw2.0",
 466                 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
 467                 .uart_pin = 7,
 468                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 469                 .otp_exe_param = 0x00000700,
 470                 .continuous_frag_desc = true,
 471                 .channel_counters_freq_hz = 150000,
 472                 .max_probe_resp_desc_thres = 24,
 473                 .tx_chain_mask = 3,
 474                 .rx_chain_mask = 3,
 475                 .max_spatial_stream = 2,
 476                 .cal_data_len = 12064,
 477                 .fw = {
 478                         .dir = QCA9888_HW_2_0_FW_DIR,
 479                         .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
 480                         .board_size = QCA99X0_BOARD_DATA_SZ,
 481                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 482                 },
 483                 .sw_decrypt_mcast_mgmt = true,
 484                 .rx_desc_ops = &qca99x0_rx_desc_ops,
 485                 .hw_ops = &qca99x0_ops,
 486                 .decap_align_bytes = 1,
 487                 .spectral_bin_discard = 12,
 488                 .spectral_bin_offset = 8,
 489
 490                 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
 491                  * 1x1 160Mhz, long-guard-interval.
 492                  */
 493                 .vht160_mcs_rx_highest = 780,
 494                 .vht160_mcs_tx_highest = 780,
 495                 .n_cipher_suites = 11,
 496                 .ast_skid_limit = 0x10,
 497                 .num_wds_entries = 0x20,
 498                 .target_64bit = false,
 499                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 500                 .shadow_reg_support = false,
 501                 .rri_on_ddr = false,
 502                 .hw_filter_reset_required = true,
 503                 .fw_diag_ce_download = false,
 504                 .credit_size_workaround = false,
 505                 .tx_stats_over_pktlog = false,
 506                 .dynamic_sar_support = false,
 507                 .hw_restart_disconnect = false,
 508         },
 509         {
 510                 .id = QCA9377_HW_1_0_DEV_VERSION,
 511                 .dev_id = QCA9377_1_0_DEVICE_ID,
 512                 .bus = ATH10K_BUS_PCI,
 513                 .name = "qca9377 hw1.0",
 514                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 515                 .uart_pin = 6,
 516                 .otp_exe_param = 0,
 517                 .channel_counters_freq_hz = 88000,
 518                 .max_probe_resp_desc_thres = 0,
 519                 .cal_data_len = 8124,
 520                 .fw = {
 521                         .dir = QCA9377_HW_1_0_FW_DIR,
 522                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 523                         .board_size = QCA9377_BOARD_DATA_SZ,
 524                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 525                 },
 526                 .rx_desc_ops = &qca988x_rx_desc_ops,
 527                 .hw_ops = &qca988x_ops,
 528                 .decap_align_bytes = 4,
 529                 .spectral_bin_discard = 0,
 530                 .spectral_bin_offset = 0,
 531                 .vht160_mcs_rx_highest = 0,
 532                 .vht160_mcs_tx_highest = 0,
 533                 .n_cipher_suites = 8,
 534                 .ast_skid_limit = 0x10,
 535                 .num_wds_entries = 0x20,
 536                 .target_64bit = false,
 537                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 538                 .shadow_reg_support = false,
 539                 .rri_on_ddr = false,
 540                 .hw_filter_reset_required = true,
 541                 .fw_diag_ce_download = false,
 542                 .credit_size_workaround = false,
 543                 .tx_stats_over_pktlog = false,
 544                 .dynamic_sar_support = false,
 545                 .hw_restart_disconnect = false,
 546         },
 547         {
 548                 .id = QCA9377_HW_1_1_DEV_VERSION,
 549                 .dev_id = QCA9377_1_0_DEVICE_ID,
 550                 .bus = ATH10K_BUS_PCI,
 551                 .name = "qca9377 hw1.1",
 552                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 553                 .uart_pin = 6,
 554                 .otp_exe_param = 0,
 555                 .channel_counters_freq_hz = 88000,
 556                 .max_probe_resp_desc_thres = 0,
 557                 .cal_data_len = 8124,
 558                 .fw = {
 559                         .dir = QCA9377_HW_1_0_FW_DIR,
 560                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 561                         .board_size = QCA9377_BOARD_DATA_SZ,
 562                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 563                 },
 564                 .rx_desc_ops = &qca988x_rx_desc_ops,
 565                 .hw_ops = &qca6174_ops,
 566                 .hw_clk = qca6174_clk,
 567                 .target_cpu_freq = 176000000,
 568                 .decap_align_bytes = 4,
 569                 .spectral_bin_discard = 0,
 570                 .spectral_bin_offset = 0,
 571                 .vht160_mcs_rx_highest = 0,
 572                 .vht160_mcs_tx_highest = 0,
 573                 .n_cipher_suites = 8,
 574                 .ast_skid_limit = 0x10,
 575                 .num_wds_entries = 0x20,
 576                 .target_64bit = false,
 577                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 578                 .shadow_reg_support = false,
 579                 .rri_on_ddr = false,
 580                 .hw_filter_reset_required = true,
 581                 .fw_diag_ce_download = true,
 582                 .credit_size_workaround = false,
 583                 .tx_stats_over_pktlog = false,
 584                 .dynamic_sar_support = false,
 585                 .hw_restart_disconnect = false,
 586         },
 587         {
 588                 .id = QCA9377_HW_1_1_DEV_VERSION,
 589                 .dev_id = QCA9377_1_0_DEVICE_ID,
 590                 .bus = ATH10K_BUS_SDIO,
 591                 .name = "qca9377 hw1.1 sdio",
 592                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 593                 .uart_pin = 19,
 594                 .otp_exe_param = 0,
 595                 .channel_counters_freq_hz = 88000,
 596                 .max_probe_resp_desc_thres = 0,
 597                 .cal_data_len = 8124,
 598                 .fw = {
 599                         .dir = QCA9377_HW_1_0_FW_DIR,
 600                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 601                         .board_size = QCA9377_BOARD_DATA_SZ,
 602                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 603                 },
 604                 .rx_desc_ops = &qca988x_rx_desc_ops,
 605                 .hw_ops = &qca6174_ops,
 606                 .hw_clk = qca6174_clk,
 607                 .target_cpu_freq = 176000000,
 608                 .decap_align_bytes = 4,
 609                 .n_cipher_suites = 8,
 610                 .num_peers = TARGET_QCA9377_HL_NUM_PEERS,
 611                 .ast_skid_limit = 0x10,
 612                 .num_wds_entries = 0x20,
 613                 .uart_pin_workaround = true,
 614                 .credit_size_workaround = true,
 615                 .dynamic_sar_support = false,
 616                 .hw_restart_disconnect = false,
 617         },
 618         {
 619                 .id = QCA4019_HW_1_0_DEV_VERSION,
 620                 .dev_id = 0,
 621                 .bus = ATH10K_BUS_AHB,
 622                 .name = "qca4019 hw1.0",
 623                 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
 624                 .uart_pin = 7,
 625                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 626                 .otp_exe_param = 0x0010000,
 627                 .continuous_frag_desc = true,
 628                 .cck_rate_map_rev2 = true,
 629                 .channel_counters_freq_hz = 125000,
 630                 .max_probe_resp_desc_thres = 24,
 631                 .tx_chain_mask = 0x3,
 632                 .rx_chain_mask = 0x3,
 633                 .max_spatial_stream = 2,
 634                 .cal_data_len = 12064,
 635                 .fw = {
 636                         .dir = QCA4019_HW_1_0_FW_DIR,
 637                         .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
 638                         .board_size = QCA4019_BOARD_DATA_SZ,
 639                         .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
 640                 },
 641                 .sw_decrypt_mcast_mgmt = true,
 642                 .rx_desc_ops = &qca99x0_rx_desc_ops,
 643                 .hw_ops = &qca99x0_ops,
 644                 .decap_align_bytes = 1,
 645                 .spectral_bin_discard = 4,
 646                 .spectral_bin_offset = 0,
 647                 .vht160_mcs_rx_highest = 0,
 648                 .vht160_mcs_tx_highest = 0,
 649                 .n_cipher_suites = 11,
 650                 .ast_skid_limit = 0x10,
 651                 .num_wds_entries = 0x20,
 652                 .target_64bit = false,
 653                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 654                 .shadow_reg_support = false,
 655                 .rri_on_ddr = false,
 656                 .hw_filter_reset_required = true,
 657                 .fw_diag_ce_download = false,
 658                 .credit_size_workaround = false,
 659                 .tx_stats_over_pktlog = false,
 660                 .dynamic_sar_support = false,
 661                 .hw_restart_disconnect = false,
 662         },
 663         {
 664                 .id = WCN3990_HW_1_0_DEV_VERSION,
 665                 .dev_id = 0,
 666                 .bus = ATH10K_BUS_SNOC,
 667                 .name = "wcn3990 hw1.0",
 668                 .continuous_frag_desc = true,
 669                 .tx_chain_mask = 0x7,
 670                 .rx_chain_mask = 0x7,
 671                 .max_spatial_stream = 4,
 672                 .fw = {
 673                         .dir = WCN3990_HW_1_0_FW_DIR,
 674                 },
 675                 .sw_decrypt_mcast_mgmt = true,
 676                 .rx_desc_ops = &wcn3990_rx_desc_ops,
 677                 .hw_ops = &wcn3990_ops,
 678                 .decap_align_bytes = 1,
 679                 .num_peers = TARGET_HL_TLV_NUM_PEERS,
 680                 .n_cipher_suites = 11,
 681                 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
 682                 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
 683                 .target_64bit = true,
 684                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
 685                 .shadow_reg_support = true,
 686                 .rri_on_ddr = true,
 687                 .hw_filter_reset_required = false,
 688                 .fw_diag_ce_download = false,
 689                 .credit_size_workaround = false,
 690                 .tx_stats_over_pktlog = false,
 691                 .dynamic_sar_support = true,
 692                 .hw_restart_disconnect = true,
 693         },
 694 };
 695
 696 static const char *const ath10k_core_fw_feature_str[] = {
 697         [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
 698         [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
 699         [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
 700         [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
 701         [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
 702         [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
 703         [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
 704         [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
 705         [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
 706         [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
 707         [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
 708         [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
 709         [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
 710         [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
 711         [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
 712         [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
 713         [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
 714         [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
 715         [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
 716         [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
 717         [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
 718         [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate",
 719         [ATH10K_FW_FEATURE_IRAM_RECOVERY] = "iram-recovery",
 720 };
 721
 722 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
 723                                                    size_t buf_len,
 724                                                    enum ath10k_fw_features feat)
 725 {
 726         /* make sure that ath10k_core_fw_feature_str[] gets updated */
 727         BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
 728                      ATH10K_FW_FEATURE_COUNT);
 729
 730         if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
 731             WARN_ON(!ath10k_core_fw_feature_str[feat])) {
 732                 return scnprintf(buf, buf_len, "bit%d", feat);
 733         }
 734
 735         return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
 736 }
 737
 738 void ath10k_core_get_fw_features_str(struct ath10k *ar,
 739                                      char *buf,
 740                                      size_t buf_len)
 741 {
 742         size_t len = 0;
 743         int i;
 744
 745         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
 746                 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
 747                         if (len > 0)
 748                                 len += scnprintf(buf + len, buf_len - len, ",");
 749
 750                         len += ath10k_core_get_fw_feature_str(buf + len,
 751                                                               buf_len - len,
 752                                                               i);
 753                 }
 754         }
 755 }
 756
 757 static void ath10k_send_suspend_complete(struct ath10k *ar)
 758 {
 759         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
 760
 761         complete(&ar->target_suspend);
 762 }
 763
 764 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
 765 {
 766         bool mtu_workaround = ar->hw_params.credit_size_workaround;
 767         int ret;
 768         u32 param = 0;
 769
 770         ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
 771         if (ret)
 772                 return ret;
 773
 774         ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
 775         if (ret)
 776                 return ret;
 777
 778         ret = ath10k_bmi_read32(ar, hi_acs_flags, &param);
 779         if (ret)
 780                 return ret;
 781
 782         param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
 783
 784         if (mode == ATH10K_FIRMWARE_MODE_NORMAL && !mtu_workaround)
 785                 param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
 786         else
 787                 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
 788
 789         if (mode == ATH10K_FIRMWARE_MODE_UTF)
 790                 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
 791         else
 792                 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
 793
 794         ret = ath10k_bmi_write32(ar, hi_acs_flags, param);
 795         if (ret)
 796                 return ret;
 797
 798         ret = ath10k_bmi_read32(ar, hi_option_flag2, &param);
 799         if (ret)
 800                 return ret;
 801
 802         param |= HI_OPTION_SDIO_CRASH_DUMP_ENHANCEMENT_HOST;
 803
 804         ret = ath10k_bmi_write32(ar, hi_option_flag2, param);
 805         if (ret)
 806                 return ret;
 807
 808         return 0;
 809 }
 810
 811 static int ath10k_init_configure_target(struct ath10k *ar)
 812 {
 813         u32 param_host;
 814         int ret;
 815
 816         /* tell target which HTC version it is used*/
 817         ret = ath10k_bmi_write32(ar, hi_app_host_interest,
 818                                  HTC_PROTOCOL_VERSION);
 819         if (ret) {
 820                 ath10k_err(ar, "settings HTC version failed\n");
 821                 return ret;
 822         }
 823
 824         /* set the firmware mode to STA/IBSS/AP */
 825         ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
 826         if (ret) {
 827                 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
 828                 return ret;
 829         }
 830
 831         /* TODO following parameters need to be re-visited. */
 832         /* num_device */
 833         param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
 834         /* Firmware mode */
 835         /* FIXME: Why FW_MODE_AP ??.*/
 836         param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
 837         /* mac_addr_method */
 838         param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 839         /* firmware_bridge */
 840         param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 841         /* fwsubmode */
 842         param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
 843
 844         ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
 845         if (ret) {
 846                 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
 847                 return ret;
 848         }
 849
 850         /* We do all byte-swapping on the host */
 851         ret = ath10k_bmi_write32(ar, hi_be, 0);
 852         if (ret) {
 853                 ath10k_err(ar, "setting host CPU BE mode failed\n");
 854                 return ret;
 855         }
 856
 857         /* FW descriptor/Data swap flags */
 858         ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
 859
 860         if (ret) {
 861                 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
 862                 return ret;
 863         }
 864
 865         /* Some devices have a special sanity check that verifies the PCI
 866          * Device ID is written to this host interest var. It is known to be
 867          * required to boot QCA6164.
 868          */
 869         ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
 870                                  ar->dev_id);
 871         if (ret) {
 872                 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
 873                 return ret;
 874         }
 875
 876         return 0;
 877 }
 878
 879 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
 880                                                    const char *dir,
 881                                                    const char *file)
 882 {
 883         char filename[100];
 884         const struct firmware *fw;
 885         int ret;
 886
 887         if (file == NULL)
 888                 return ERR_PTR(-ENOENT);
 889
 890         if (dir == NULL)
 891                 dir = ".";
 892
 893         snprintf(filename, sizeof(filename), "%s/%s", dir, file);
 894         ret = firmware_reject_nowarn(&fw, filename, ar->dev);
 895         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
 896                    filename, ret);
 897
 898         if (ret)
 899                 return ERR_PTR(ret);
 900
 901         return fw;
 902 }
 903
 904 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
 905                                       size_t data_len)
 906 {
 907         u32 board_data_size = ar->hw_params.fw.board_size;
 908         u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
 909         u32 board_ext_data_addr;
 910         int ret;
 911
 912         ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
 913         if (ret) {
 914                 ath10k_err(ar, "could not read board ext data addr (%d)\n",
 915                            ret);
 916                 return ret;
 917         }
 918
 919         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 920                    "boot push board extended data addr 0x%x\n",
 921                    board_ext_data_addr);
 922
 923         if (board_ext_data_addr == 0)
 924                 return 0;
 925
 926         if (data_len != (board_data_size + board_ext_data_size)) {
 927                 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
 928                            data_len, board_data_size, board_ext_data_size);
 929                 return -EINVAL;
 930         }
 931
 932         ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
 933                                       data + board_data_size,
 934                                       board_ext_data_size);
 935         if (ret) {
 936                 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
 937                 return ret;
 938         }
 939
 940         ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
 941                                  (board_ext_data_size << 16) | 1);
 942         if (ret) {
 943                 ath10k_err(ar, "could not write board ext data bit (%d)\n",
 944                            ret);
 945                 return ret;
 946         }
 947
 948         return 0;
 949 }
 950
 951 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
 952 {
 953         u32 result, address;
 954         u8 board_id, chip_id;
 955         bool ext_bid_support;
 956         int ret, bmi_board_id_param;
 957
 958         address = ar->hw_params.patch_load_addr;
 959
 960         if (!ar->normal_mode_fw.fw_file.otp_data ||
 961             !ar->normal_mode_fw.fw_file.otp_len) {
 962                 ath10k_warn(ar,
 963                             "failed to retrieve board id because of invalid otp\n");
 964                 return -ENODATA;
 965         }
 966
 967         if (ar->id.bmi_ids_valid) {
 968                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
 969                            "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n",
 970                            ar->id.bmi_board_id, ar->id.bmi_chip_id);
 971                 goto skip_otp_download;
 972         }
 973
 974         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 975                    "boot upload otp to 0x%x len %zd for board id\n",
 976                    address, ar->normal_mode_fw.fw_file.otp_len);
 977
 978         ret = ath10k_bmi_fast_download(ar, address,
 979                                        ar->normal_mode_fw.fw_file.otp_data,
 980                                        ar->normal_mode_fw.fw_file.otp_len);
 981         if (ret) {
 982                 ath10k_err(ar, "could not write otp for board id check: %d\n",
 983                            ret);
 984                 return ret;
 985         }
 986
 987         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
 988             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
 989             ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
 990                 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
 991         else
 992                 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
 993
 994         ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
 995         if (ret) {
 996                 ath10k_err(ar, "could not execute otp for board id check: %d\n",
 997                            ret);
 998                 return ret;
 999         }
1000
1001         board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
1002         chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
1003         ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
1004
1005         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1006                    "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
1007                    result, board_id, chip_id, ext_bid_support);
1008
1009         ar->id.ext_bid_supported = ext_bid_support;
1010
1011         if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
1012             (board_id == 0)) {
1013                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1014                            "board id does not exist in otp, ignore it\n");
1015                 return -EOPNOTSUPP;
1016         }
1017
1018         ar->id.bmi_ids_valid = true;
1019         ar->id.bmi_board_id = board_id;
1020         ar->id.bmi_chip_id = chip_id;
1021
1022 skip_otp_download:
1023
1024         return 0;
1025 }
1026
1027 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
1028 {
1029         struct ath10k *ar = data;
1030         const char *bdf_ext;
1031         const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
1032         u8 bdf_enabled;
1033         int i;
1034
1035         if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
1036                 return;
1037
1038         if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
1039                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1040                            "wrong smbios bdf ext type length (%d).\n",
1041                            hdr->length);
1042                 return;
1043         }
1044
1045         bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
1046         if (!bdf_enabled) {
1047                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
1048                 return;
1049         }
1050
1051         /* Only one string exists (per spec) */
1052         bdf_ext = (char *)hdr + hdr->length;
1053
1054         if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
1055                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1056                            "bdf variant magic does not match.\n");
1057                 return;
1058         }
1059
1060         for (i = 0; i < strlen(bdf_ext); i++) {
1061                 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
1062                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1063                                    "bdf variant name contains non ascii chars.\n");
1064                         return;
1065                 }
1066         }
1067
1068         /* Copy extension name without magic suffix */
1069         if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
1070                     sizeof(ar->id.bdf_ext)) < 0) {
1071                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1072                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1073                             bdf_ext);
1074                 return;
1075         }
1076
1077         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1078                    "found and validated bdf variant smbios_type 0x%x bdf %s\n",
1079                    ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
1080 }
1081
1082 static int ath10k_core_check_smbios(struct ath10k *ar)
1083 {
1084         ar->id.bdf_ext[0] = '\0';
1085         dmi_walk(ath10k_core_check_bdfext, ar);
1086
1087         if (ar->id.bdf_ext[0] == '\0')
1088                 return -ENODATA;
1089
1090         return 0;
1091 }
1092
1093 int ath10k_core_check_dt(struct ath10k *ar)
1094 {
1095         struct device_node *node;
1096         const char *variant = NULL;
1097
1098         node = ar->dev->of_node;
1099         if (!node)
1100                 return -ENOENT;
1101
1102         of_property_read_string(node, "qcom,ath10k-calibration-variant",
1103                                 &variant);
1104         if (!variant)
1105                 return -ENODATA;
1106
1107         if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1108                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1109                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1110                             variant);
1111
1112         return 0;
1113 }
1114 EXPORT_SYMBOL(ath10k_core_check_dt);
1115
1116 static int ath10k_download_fw(struct ath10k *ar)
1117 {
1118         u32 address, data_len;
1119         const void *data;
1120         int ret;
1121         struct pm_qos_request latency_qos;
1122
1123         address = ar->hw_params.patch_load_addr;
1124
1125         data = ar->running_fw->fw_file.firmware_data;
1126         data_len = ar->running_fw->fw_file.firmware_len;
1127
1128         ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1129         if (ret) {
1130                 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1131                            ret);
1132                 return ret;
1133         }
1134
1135         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1136                    "boot uploading firmware image %pK len %d\n",
1137                    data, data_len);
1138
1139         /* Check if device supports to download firmware via
1140          * diag copy engine. Downloading firmware via diag CE
1141          * greatly reduces the time to download firmware.
1142          */
1143         if (ar->hw_params.fw_diag_ce_download) {
1144                 ret = ath10k_hw_diag_fast_download(ar, address,
1145                                                    data, data_len);
1146                 if (ret == 0)
1147                         /* firmware upload via diag ce was successful */
1148                         return 0;
1149
1150                 ath10k_warn(ar,
1151                             "failed to upload firmware via diag ce, trying BMI: %d",
1152                             ret);
1153         }
1154
1155         memset(&latency_qos, 0, sizeof(latency_qos));
1156         cpu_latency_qos_add_request(&latency_qos, 0);
1157
1158         ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1159
1160         cpu_latency_qos_remove_request(&latency_qos);
1161
1162         return ret;
1163 }
1164
1165 void ath10k_core_free_board_files(struct ath10k *ar)
1166 {
1167         if (!IS_ERR(ar->normal_mode_fw.board))
1168                 release_firmware(ar->normal_mode_fw.board);
1169
1170         if (!IS_ERR(ar->normal_mode_fw.ext_board))
1171                 release_firmware(ar->normal_mode_fw.ext_board);
1172
1173         ar->normal_mode_fw.board = NULL;
1174         ar->normal_mode_fw.board_data = NULL;
1175         ar->normal_mode_fw.board_len = 0;
1176         ar->normal_mode_fw.ext_board = NULL;
1177         ar->normal_mode_fw.ext_board_data = NULL;
1178         ar->normal_mode_fw.ext_board_len = 0;
1179 }
1180 EXPORT_SYMBOL(ath10k_core_free_board_files);
1181
1182 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1183 {
1184         if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1185                 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1186
1187         if (!IS_ERR(ar->cal_file))
1188                 release_firmware(ar->cal_file);
1189
1190         if (!IS_ERR(ar->pre_cal_file))
1191                 release_firmware(ar->pre_cal_file);
1192
1193         ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1194
1195         ar->normal_mode_fw.fw_file.otp_data = NULL;
1196         ar->normal_mode_fw.fw_file.otp_len = 0;
1197
1198         ar->normal_mode_fw.fw_file.firmware = NULL;
1199         ar->normal_mode_fw.fw_file.firmware_data = NULL;
1200         ar->normal_mode_fw.fw_file.firmware_len = 0;
1201
1202         ar->cal_file = NULL;
1203         ar->pre_cal_file = NULL;
1204 }
1205
1206 static int ath10k_fetch_cal_file(struct ath10k *ar)
1207 {
1208         char filename[100];
1209
1210         /* pre-cal-<bus>-<id>.bin */
1211         scnprintf(filename, sizeof(filename), "/*(DEBLOBBED)*/",
1212                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1213
1214         ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1215         if (!IS_ERR(ar->pre_cal_file))
1216                 goto success;
1217
1218         /*(DEBLOBBED)*/
1219         scnprintf(filename, sizeof(filename), "/*(DEBLOBBED)*/",
1220                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1221
1222         ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1223         if (IS_ERR(ar->cal_file))
1224                 /* calibration file is optional, don't print any warnings */
1225                 return PTR_ERR(ar->cal_file);
1226 success:
1227         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1228                    ATH10K_FW_DIR, filename);
1229
1230         return 0;
1231 }
1232
1233 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1234 {
1235         const struct firmware *fw;
1236         char boardname[100];
1237
1238         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1239                 if (!ar->hw_params.fw.board) {
1240                         ath10k_err(ar, "failed to find board file fw entry\n");
1241                         return -EINVAL;
1242                 }
1243
1244                 scnprintf(boardname, sizeof(boardname), "/*(DEBLOBBED)*/",
1245                           ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1246
1247                 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1248                                                                 ar->hw_params.fw.dir,
1249                                                                 boardname);
1250                 if (IS_ERR(ar->normal_mode_fw.board)) {
1251                         fw = ath10k_fetch_fw_file(ar,
1252                                                   ar->hw_params.fw.dir,
1253                                                   ar->hw_params.fw.board);
1254                         ar->normal_mode_fw.board = fw;
1255                 }
1256
1257                 if (IS_ERR(ar->normal_mode_fw.board))
1258                         return PTR_ERR(ar->normal_mode_fw.board);
1259
1260                 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1261                 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1262         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1263                 if (!ar->hw_params.fw.eboard) {
1264                         ath10k_err(ar, "failed to find eboard file fw entry\n");
1265                         return -EINVAL;
1266                 }
1267
1268                 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1269                                           ar->hw_params.fw.eboard);
1270                 ar->normal_mode_fw.ext_board = fw;
1271                 if (IS_ERR(ar->normal_mode_fw.ext_board))
1272                         return PTR_ERR(ar->normal_mode_fw.ext_board);
1273
1274                 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1275                 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1276         }
1277
1278         return 0;
1279 }
1280
1281 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1282                                          const void *buf, size_t buf_len,
1283                                          const char *boardname,
1284                                          int bd_ie_type)
1285 {
1286         const struct ath10k_fw_ie *hdr;
1287         bool name_match_found;
1288         int ret, board_ie_id;
1289         size_t board_ie_len;
1290         const void *board_ie_data;
1291
1292         name_match_found = false;
1293
1294         /* go through ATH10K_BD_IE_BOARD_ elements */
1295         while (buf_len > sizeof(struct ath10k_fw_ie)) {
1296                 hdr = buf;
1297                 board_ie_id = le32_to_cpu(hdr->id);
1298                 board_ie_len = le32_to_cpu(hdr->len);
1299                 board_ie_data = hdr->data;
1300
1301                 buf_len -= sizeof(*hdr);
1302                 buf += sizeof(*hdr);
1303
1304                 if (buf_len < ALIGN(board_ie_len, 4)) {
1305                         ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1306                                    buf_len, ALIGN(board_ie_len, 4));
1307                         ret = -EINVAL;
1308                         goto out;
1309                 }
1310
1311                 switch (board_ie_id) {
1312                 case ATH10K_BD_IE_BOARD_NAME:
1313                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1314                                         board_ie_data, board_ie_len);
1315
1316                         if (board_ie_len != strlen(boardname))
1317                                 break;
1318
1319                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
1320                         if (ret)
1321                                 break;
1322
1323                         name_match_found = true;
1324                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1325                                    "boot found match for name '%s'",
1326                                    boardname);
1327                         break;
1328                 case ATH10K_BD_IE_BOARD_DATA:
1329                         if (!name_match_found)
1330                                 /* no match found */
1331                                 break;
1332
1333                         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1334                                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1335                                            "boot found board data for '%s'",
1336                                                 boardname);
1337
1338                                 ar->normal_mode_fw.board_data = board_ie_data;
1339                                 ar->normal_mode_fw.board_len = board_ie_len;
1340                         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1341                                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1342                                            "boot found eboard data for '%s'",
1343                                                 boardname);
1344
1345                                 ar->normal_mode_fw.ext_board_data = board_ie_data;
1346                                 ar->normal_mode_fw.ext_board_len = board_ie_len;
1347                         }
1348
1349                         ret = 0;
1350                         goto out;
1351                 default:
1352                         ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1353                                     board_ie_id);
1354                         break;
1355                 }
1356
1357                 /* jump over the padding */
1358                 board_ie_len = ALIGN(board_ie_len, 4);
1359
1360                 buf_len -= board_ie_len;
1361                 buf += board_ie_len;
1362         }
1363
1364         /* no match found */
1365         ret = -ENOENT;
1366
1367 out:
1368         return ret;
1369 }
1370
1371 static int ath10k_core_search_bd(struct ath10k *ar,
1372                                  const char *boardname,
1373                                  const u8 *data,
1374                                  size_t len)
1375 {
1376         size_t ie_len;
1377         struct ath10k_fw_ie *hdr;
1378         int ret = -ENOENT, ie_id;
1379
1380         while (len > sizeof(struct ath10k_fw_ie)) {
1381                 hdr = (struct ath10k_fw_ie *)data;
1382                 ie_id = le32_to_cpu(hdr->id);
1383                 ie_len = le32_to_cpu(hdr->len);
1384
1385                 len -= sizeof(*hdr);
1386                 data = hdr->data;
1387
1388                 if (len < ALIGN(ie_len, 4)) {
1389                         ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1390                                    ie_id, ie_len, len);
1391                         return -EINVAL;
1392                 }
1393
1394                 switch (ie_id) {
1395                 case ATH10K_BD_IE_BOARD:
1396                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1397                                                             boardname,
1398                                                             ATH10K_BD_IE_BOARD);
1399                         if (ret == -ENOENT)
1400                                 /* no match found, continue */
1401                                 break;
1402
1403                         /* either found or error, so stop searching */
1404                         goto out;
1405                 case ATH10K_BD_IE_BOARD_EXT:
1406                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1407                                                             boardname,
1408                                                             ATH10K_BD_IE_BOARD_EXT);
1409                         if (ret == -ENOENT)
1410                                 /* no match found, continue */
1411                                 break;
1412
1413                         /* either found or error, so stop searching */
1414                         goto out;
1415                 }
1416
1417                 /* jump over the padding */
1418                 ie_len = ALIGN(ie_len, 4);
1419
1420                 len -= ie_len;
1421                 data += ie_len;
1422         }
1423
1424 out:
1425         /* return result of parse_bd_ie_board() or -ENOENT */
1426         return ret;
1427 }
1428
1429 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1430                                               const char *boardname,
1431                                               const char *fallback_boardname1,
1432                                               const char *fallback_boardname2,
1433                                               const char *filename)
1434 {
1435         size_t len, magic_len;
1436         const u8 *data;
1437         int ret;
1438
1439         /* Skip if already fetched during board data download */
1440         if (!ar->normal_mode_fw.board)
1441                 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1442                                                                 ar->hw_params.fw.dir,
1443                                                                 filename);
1444         if (IS_ERR(ar->normal_mode_fw.board))
1445                 return PTR_ERR(ar->normal_mode_fw.board);
1446
1447         data = ar->normal_mode_fw.board->data;
1448         len = ar->normal_mode_fw.board->size;
1449
1450         /* magic has extra null byte padded */
1451         magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1452         if (len < magic_len) {
1453                 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1454                            ar->hw_params.fw.dir, filename, len);
1455                 ret = -EINVAL;
1456                 goto err;
1457         }
1458
1459         if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1460                 ath10k_err(ar, "found invalid board magic\n");
1461                 ret = -EINVAL;
1462                 goto err;
1463         }
1464
1465         /* magic is padded to 4 bytes */
1466         magic_len = ALIGN(magic_len, 4);
1467         if (len < magic_len) {
1468                 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1469                            ar->hw_params.fw.dir, filename, len);
1470                 ret = -EINVAL;
1471                 goto err;
1472         }
1473
1474         data += magic_len;
1475         len -= magic_len;
1476
1477         /* attempt to find boardname in the IE list */
1478         ret = ath10k_core_search_bd(ar, boardname, data, len);
1479
1480         /* if we didn't find it and have a fallback name, try that */
1481         if (ret == -ENOENT && fallback_boardname1)
1482                 ret = ath10k_core_search_bd(ar, fallback_boardname1, data, len);
1483
1484         if (ret == -ENOENT && fallback_boardname2)
1485                 ret = ath10k_core_search_bd(ar, fallback_boardname2, data, len);
1486
1487         if (ret == -ENOENT) {
1488                 ath10k_err(ar,
1489                            "failed to fetch board data for %s from %s/%s\n",
1490                            boardname, ar->hw_params.fw.dir, filename);
1491                 ret = -ENODATA;
1492         }
1493
1494         if (ret)
1495                 goto err;
1496
1497         return 0;
1498
1499 err:
1500         ath10k_core_free_board_files(ar);
1501         return ret;
1502 }
1503
1504 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1505                                          size_t name_len, bool with_variant,
1506                                          bool with_chip_id)
1507 {
1508         /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1509         char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1510
1511         if (with_variant && ar->id.bdf_ext[0] != '\0')
1512                 scnprintf(variant, sizeof(variant), ",variant=%s",
1513                           ar->id.bdf_ext);
1514
1515         if (ar->id.bmi_ids_valid) {
1516                 scnprintf(name, name_len,
1517                           "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1518                           ath10k_bus_str(ar->hif.bus),
1519                           ar->id.bmi_chip_id,
1520                           ar->id.bmi_board_id, variant);
1521                 goto out;
1522         }
1523
1524         if (ar->id.qmi_ids_valid) {
1525                 if (with_chip_id)
1526                         scnprintf(name, name_len,
1527                                   "bus=%s,qmi-board-id=%x,qmi-chip-id=%x%s",
1528                                   ath10k_bus_str(ar->hif.bus),
1529                                   ar->id.qmi_board_id, ar->id.qmi_chip_id,
1530                                   variant);
1531                 else
1532                         scnprintf(name, name_len,
1533                                   "bus=%s,qmi-board-id=%x",
1534                                   ath10k_bus_str(ar->hif.bus),
1535                                   ar->id.qmi_board_id);
1536                 goto out;
1537         }
1538
1539         scnprintf(name, name_len,
1540                   "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1541                   ath10k_bus_str(ar->hif.bus),
1542                   ar->id.vendor, ar->id.device,
1543                   ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1544 out:
1545         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1546
1547         return 0;
1548 }
1549
1550 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1551                                           size_t name_len)
1552 {
1553         if (ar->id.bmi_ids_valid) {
1554                 scnprintf(name, name_len,
1555                           "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1556                           ath10k_bus_str(ar->hif.bus),
1557                           ar->id.bmi_chip_id,
1558                           ar->id.bmi_eboard_id);
1559
1560                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1561                 return 0;
1562         }
1563         /* Fallback if returned board id is zero */
1564         return -1;
1565 }
1566
1567 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1568 {
1569         char boardname[100], fallback_boardname1[100], fallback_boardname2[100];
1570         int ret;
1571
1572         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1573                 /* With variant and chip id */
1574                 ret = ath10k_core_create_board_name(ar, boardname,
1575                                                     sizeof(boardname), true,
1576                                                     true);
1577                 if (ret) {
1578                         ath10k_err(ar, "failed to create board name: %d", ret);
1579                         return ret;
1580                 }
1581
1582                 /* Without variant and only chip-id */
1583                 ret = ath10k_core_create_board_name(ar, fallback_boardname1,
1584                                                     sizeof(boardname), false,
1585                                                     true);
1586                 if (ret) {
1587                         ath10k_err(ar, "failed to create 1st fallback board name: %d",
1588                                    ret);
1589                         return ret;
1590                 }
1591
1592                 /* Without variant and without chip-id */
1593                 ret = ath10k_core_create_board_name(ar, fallback_boardname2,
1594                                                     sizeof(boardname), false,
1595                                                     false);
1596                 if (ret) {
1597                         ath10k_err(ar, "failed to create 2nd fallback board name: %d",
1598                                    ret);
1599                         return ret;
1600                 }
1601         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1602                 ret = ath10k_core_create_eboard_name(ar, boardname,
1603                                                      sizeof(boardname));
1604                 if (ret) {
1605                         ath10k_err(ar, "fallback to /*(DEBLOBBED)*/ since board id 0");
1606                         goto fallback;
1607                 }
1608         }
1609
1610         ar->bd_api = 2;
1611         ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1612                                                  fallback_boardname1,
1613                                                  fallback_boardname2,
1614                                                  ATH10K_BOARD_API2_FILE);
1615         if (!ret)
1616                 goto success;
1617
1618 fallback:
1619         ar->bd_api = 1;
1620         ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1621         if (ret) {
1622                 ath10k_err(ar, "failed to fetch /*(DEBLOBBED)*/ or /*(DEBLOBBED)*/ from %s\n",
1623                            ar->hw_params.fw.dir);
1624                 return ret;
1625         }
1626
1627 success:
1628         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1629         return 0;
1630 }
1631 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1632
1633 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1634 {
1635         u32 result, address;
1636         u8 ext_board_id;
1637         int ret;
1638
1639         address = ar->hw_params.patch_load_addr;
1640
1641         if (!ar->normal_mode_fw.fw_file.otp_data ||
1642             !ar->normal_mode_fw.fw_file.otp_len) {
1643                 ath10k_warn(ar,
1644                             "failed to retrieve extended board id due to otp binary missing\n");
1645                 return -ENODATA;
1646         }
1647
1648         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1649                    "boot upload otp to 0x%x len %zd for ext board id\n",
1650                    address, ar->normal_mode_fw.fw_file.otp_len);
1651
1652         ret = ath10k_bmi_fast_download(ar, address,
1653                                        ar->normal_mode_fw.fw_file.otp_data,
1654                                        ar->normal_mode_fw.fw_file.otp_len);
1655         if (ret) {
1656                 ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1657                            ret);
1658                 return ret;
1659         }
1660
1661         ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1662         if (ret) {
1663                 ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1664                            ret);
1665                 return ret;
1666         }
1667
1668         if (!result) {
1669                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1670                            "ext board id does not exist in otp, ignore it\n");
1671                 return -EOPNOTSUPP;
1672         }
1673
1674         ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1675
1676         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1677                    "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1678                    result, ext_board_id);
1679
1680         ar->id.bmi_eboard_id = ext_board_id;
1681
1682         return 0;
1683 }
1684
1685 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1686                                       size_t data_len)
1687 {
1688         u32 board_data_size = ar->hw_params.fw.board_size;
1689         u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1690         u32 board_address;
1691         u32 ext_board_address;
1692         int ret;
1693
1694         ret = ath10k_push_board_ext_data(ar, data, data_len);
1695         if (ret) {
1696                 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1697                 goto exit;
1698         }
1699
1700         ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1701         if (ret) {
1702                 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1703                 goto exit;
1704         }
1705
1706         ret = ath10k_bmi_write_memory(ar, board_address, data,
1707                                       min_t(u32, board_data_size,
1708                                             data_len));
1709         if (ret) {
1710                 ath10k_err(ar, "could not write board data (%d)\n", ret);
1711                 goto exit;
1712         }
1713
1714         ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1715         if (ret) {
1716                 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1717                 goto exit;
1718         }
1719
1720         if (!ar->id.ext_bid_supported)
1721                 goto exit;
1722
1723         /* Extended board data download */
1724         ret = ath10k_core_get_ext_board_id_from_otp(ar);
1725         if (ret == -EOPNOTSUPP) {
1726                 /* Not fetching ext_board_data if ext board id is 0 */
1727                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1728                 return 0;
1729         } else if (ret) {
1730                 ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1731                 goto exit;
1732         }
1733
1734         ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1735         if (ret)
1736                 goto exit;
1737
1738         if (ar->normal_mode_fw.ext_board_data) {
1739                 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1740                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1741                            "boot writing ext board data to addr 0x%x",
1742                            ext_board_address);
1743                 ret = ath10k_bmi_write_memory(ar, ext_board_address,
1744                                               ar->normal_mode_fw.ext_board_data,
1745                                               min_t(u32, eboard_data_size, data_len));
1746                 if (ret)
1747                         ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1748         }
1749
1750 exit:
1751         return ret;
1752 }
1753
1754 static int ath10k_download_and_run_otp(struct ath10k *ar)
1755 {
1756         u32 result, address = ar->hw_params.patch_load_addr;
1757         u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1758         int ret;
1759
1760         ret = ath10k_download_board_data(ar,
1761                                          ar->running_fw->board_data,
1762                                          ar->running_fw->board_len);
1763         if (ret) {
1764                 ath10k_err(ar, "failed to download board data: %d\n", ret);
1765                 return ret;
1766         }
1767
1768         /* OTP is optional */
1769
1770         if (!ar->running_fw->fw_file.otp_data ||
1771             !ar->running_fw->fw_file.otp_len) {
1772                 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1773                             ar->running_fw->fw_file.otp_data,
1774                             ar->running_fw->fw_file.otp_len);
1775                 return 0;
1776         }
1777
1778         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1779                    address, ar->running_fw->fw_file.otp_len);
1780
1781         ret = ath10k_bmi_fast_download(ar, address,
1782                                        ar->running_fw->fw_file.otp_data,
1783                                        ar->running_fw->fw_file.otp_len);
1784         if (ret) {
1785                 ath10k_err(ar, "could not write otp (%d)\n", ret);
1786                 return ret;
1787         }
1788
1789         /* As of now pre-cal is valid for 10_4 variants */
1790         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1791             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
1792             ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
1793                 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1794
1795         ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1796         if (ret) {
1797                 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1798                 return ret;
1799         }
1800
1801         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1802
1803         if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1804                                    ar->running_fw->fw_file.fw_features)) &&
1805             result != 0) {
1806                 ath10k_err(ar, "otp calibration failed: %d", result);
1807                 return -EINVAL;
1808         }
1809
1810         return 0;
1811 }
1812
1813 static int ath10k_download_cal_file(struct ath10k *ar,
1814                                     const struct firmware *file)
1815 {
1816         int ret;
1817
1818         if (!file)
1819                 return -ENOENT;
1820
1821         if (IS_ERR(file))
1822                 return PTR_ERR(file);
1823
1824         ret = ath10k_download_board_data(ar, file->data, file->size);
1825         if (ret) {
1826                 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1827                 return ret;
1828         }
1829
1830         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1831
1832         return 0;
1833 }
1834
1835 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1836 {
1837         struct device_node *node;
1838         int data_len;
1839         void *data;
1840         int ret;
1841
1842         node = ar->dev->of_node;
1843         if (!node)
1844                 /* Device Tree is optional, don't print any warnings if
1845                  * there's no node for ath10k.
1846                  */
1847                 return -ENOENT;
1848
1849         if (!of_get_property(node, dt_name, &data_len)) {
1850                 /* The calibration data node is optional */
1851                 return -ENOENT;
1852         }
1853
1854         if (data_len != ar->hw_params.cal_data_len) {
1855                 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1856                             data_len);
1857                 ret = -EMSGSIZE;
1858                 goto out;
1859         }
1860
1861         data = kmalloc(data_len, GFP_KERNEL);
1862         if (!data) {
1863                 ret = -ENOMEM;
1864                 goto out;
1865         }
1866
1867         ret = of_property_read_u8_array(node, dt_name, data, data_len);
1868         if (ret) {
1869                 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1870                             ret);
1871                 goto out_free;
1872         }
1873
1874         ret = ath10k_download_board_data(ar, data, data_len);
1875         if (ret) {
1876                 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1877                             ret);
1878                 goto out_free;
1879         }
1880
1881         ret = 0;
1882
1883 out_free:
1884         kfree(data);
1885
1886 out:
1887         return ret;
1888 }
1889
1890 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1891 {
1892         size_t data_len;
1893         void *data = NULL;
1894         int ret;
1895
1896         ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1897         if (ret) {
1898                 if (ret != -EOPNOTSUPP)
1899                         ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
1900                                     ret);
1901                 goto out_free;
1902         }
1903
1904         ret = ath10k_download_board_data(ar, data, data_len);
1905         if (ret) {
1906                 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
1907                             ret);
1908                 goto out_free;
1909         }
1910
1911         ret = 0;
1912
1913 out_free:
1914         kfree(data);
1915
1916         return ret;
1917 }
1918
1919 static int ath10k_download_cal_nvmem(struct ath10k *ar, const char *cell_name)
1920 {
1921         struct nvmem_cell *cell;
1922         void *buf;
1923         size_t len;
1924         int ret;
1925
1926         cell = devm_nvmem_cell_get(ar->dev, cell_name);
1927         if (IS_ERR(cell)) {
1928                 ret = PTR_ERR(cell);
1929                 return ret;
1930         }
1931
1932         buf = nvmem_cell_read(cell, &len);
1933         if (IS_ERR(buf))
1934                 return PTR_ERR(buf);
1935
1936         if (ar->hw_params.cal_data_len != len) {
1937                 kfree(buf);
1938                 ath10k_warn(ar, "invalid calibration data length in nvmem-cell '%s': %zu != %u\n",
1939                             cell_name, len, ar->hw_params.cal_data_len);
1940                 return -EMSGSIZE;
1941         }
1942
1943         ret = ath10k_download_board_data(ar, buf, len);
1944         kfree(buf);
1945         if (ret)
1946                 ath10k_warn(ar, "failed to download calibration data from nvmem-cell '%s': %d\n",
1947                             cell_name, ret);
1948
1949         return ret;
1950 }
1951
1952 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1953                                      struct ath10k_fw_file *fw_file)
1954 {
1955         size_t magic_len, len, ie_len;
1956         int ie_id, i, index, bit, ret;
1957         struct ath10k_fw_ie *hdr;
1958         const u8 *data;
1959         __le32 *timestamp, *version;
1960
1961         /* first fetch the firmware file (firmware-*.bin) */
1962         fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1963                                                  name);
1964         if (IS_ERR(fw_file->firmware))
1965                 return PTR_ERR(fw_file->firmware);
1966
1967         data = fw_file->firmware->data;
1968         len = fw_file->firmware->size;
1969
1970         /* magic also includes the null byte, check that as well */
1971         magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1972
1973         if (len < magic_len) {
1974                 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1975                            ar->hw_params.fw.dir, name, len);
1976                 ret = -EINVAL;
1977                 goto err;
1978         }
1979
1980         if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1981                 ath10k_err(ar, "invalid firmware magic\n");
1982                 ret = -EINVAL;
1983                 goto err;
1984         }
1985
1986         /* jump over the padding */
1987         magic_len = ALIGN(magic_len, 4);
1988
1989         len -= magic_len;
1990         data += magic_len;
1991
1992         /* loop elements */
1993         while (len > sizeof(struct ath10k_fw_ie)) {
1994                 hdr = (struct ath10k_fw_ie *)data;
1995
1996                 ie_id = le32_to_cpu(hdr->id);
1997                 ie_len = le32_to_cpu(hdr->len);
1998
1999                 len -= sizeof(*hdr);
2000                 data += sizeof(*hdr);
2001
2002                 if (len < ie_len) {
2003                         ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
2004                                    ie_id, len, ie_len);
2005                         ret = -EINVAL;
2006                         goto err;
2007                 }
2008
2009                 switch (ie_id) {
2010                 case ATH10K_FW_IE_FW_VERSION:
2011                         if (ie_len > sizeof(fw_file->fw_version) - 1)
2012                                 break;
2013
2014                         memcpy(fw_file->fw_version, data, ie_len);
2015                         fw_file->fw_version[ie_len] = '\0';
2016
2017                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2018                                    "found fw version %s\n",
2019                                     fw_file->fw_version);
2020                         break;
2021                 case ATH10K_FW_IE_TIMESTAMP:
2022                         if (ie_len != sizeof(u32))
2023                                 break;
2024
2025                         timestamp = (__le32 *)data;
2026
2027                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
2028                                    le32_to_cpup(timestamp));
2029                         break;
2030                 case ATH10K_FW_IE_FEATURES:
2031                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2032                                    "found firmware features ie (%zd B)\n",
2033                                    ie_len);
2034
2035                         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
2036                                 index = i / 8;
2037                                 bit = i % 8;
2038
2039                                 if (index == ie_len)
2040                                         break;
2041
2042                                 if (data[index] & (1 << bit)) {
2043                                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2044                                                    "Enabling feature bit: %i\n",
2045                                                    i);
2046                                         __set_bit(i, fw_file->fw_features);
2047                                 }
2048                         }
2049
2050                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
2051                                         fw_file->fw_features,
2052                                         sizeof(fw_file->fw_features));
2053                         break;
2054                 case ATH10K_FW_IE_FW_IMAGE:
2055                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2056                                    "found fw image ie (%zd B)\n",
2057                                    ie_len);
2058
2059                         fw_file->firmware_data = data;
2060                         fw_file->firmware_len = ie_len;
2061
2062                         break;
2063                 case ATH10K_FW_IE_OTP_IMAGE:
2064                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2065                                    "found otp image ie (%zd B)\n",
2066                                    ie_len);
2067
2068                         fw_file->otp_data = data;
2069                         fw_file->otp_len = ie_len;
2070
2071                         break;
2072                 case ATH10K_FW_IE_WMI_OP_VERSION:
2073                         if (ie_len != sizeof(u32))
2074                                 break;
2075
2076                         version = (__le32 *)data;
2077
2078                         fw_file->wmi_op_version = le32_to_cpup(version);
2079
2080                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
2081                                    fw_file->wmi_op_version);
2082                         break;
2083                 case ATH10K_FW_IE_HTT_OP_VERSION:
2084                         if (ie_len != sizeof(u32))
2085                                 break;
2086
2087                         version = (__le32 *)data;
2088
2089                         fw_file->htt_op_version = le32_to_cpup(version);
2090
2091                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
2092                                    fw_file->htt_op_version);
2093                         break;
2094                 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
2095                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2096                                    "found fw code swap image ie (%zd B)\n",
2097                                    ie_len);
2098                         fw_file->codeswap_data = data;
2099                         fw_file->codeswap_len = ie_len;
2100                         break;
2101                 default:
2102                         ath10k_warn(ar, "Unknown FW IE: %u\n",
2103                                     le32_to_cpu(hdr->id));
2104                         break;
2105                 }
2106
2107                 /* jump over the padding */
2108                 ie_len = ALIGN(ie_len, 4);
2109
2110                 len -= ie_len;
2111                 data += ie_len;
2112         }
2113
2114         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
2115             (!fw_file->firmware_data || !fw_file->firmware_len)) {
2116                 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
2117                             ar->hw_params.fw.dir, name);
2118                 ret = -ENOMEDIUM;
2119                 goto err;
2120         }
2121
2122         return 0;
2123
2124 err:
2125         ath10k_core_free_firmware_files(ar);
2126         return ret;
2127 }
2128
2129 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
2130                                     size_t fw_name_len, int fw_api)
2131 {
2132         switch (ar->hif.bus) {
2133         case ATH10K_BUS_SDIO:
2134         case ATH10K_BUS_USB:
2135                 scnprintf(fw_name, fw_name_len, "/*(DEBLOBBED)*/",
2136                           ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
2137                           fw_api);
2138                 break;
2139         case ATH10K_BUS_PCI:
2140         case ATH10K_BUS_AHB:
2141         case ATH10K_BUS_SNOC:
2142                 scnprintf(fw_name, fw_name_len, "/*(DEBLOBBED)*/",
2143                           ATH10K_FW_FILE_BASE, fw_api);
2144                 break;
2145         }
2146 }
2147
2148 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
2149 {
2150         int ret, i;
2151         char fw_name[100];
2152
2153         /* calibration file is optional, don't check for any errors */
2154         ath10k_fetch_cal_file(ar);
2155
2156         for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
2157                 ar->fw_api = i;
2158                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
2159                            ar->fw_api);
2160
2161                 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
2162                 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
2163                                                        &ar->normal_mode_fw.fw_file);
2164                 if (!ret)
2165                         goto success;
2166         }
2167
2168         /* we end up here if we couldn't fetch any firmware */
2169
2170         ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
2171                    ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
2172                    ret);
2173
2174         return ret;
2175
2176 success:
2177         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
2178
2179         return 0;
2180 }
2181
2182 static int ath10k_core_pre_cal_download(struct ath10k *ar)
2183 {
2184         int ret;
2185
2186         ret = ath10k_download_cal_nvmem(ar, "pre-calibration");
2187         if (ret == 0) {
2188                 ar->cal_mode = ATH10K_PRE_CAL_MODE_NVMEM;
2189                 goto success;
2190         } else if (ret == -EPROBE_DEFER) {
2191                 return ret;
2192         }
2193
2194         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2195                    "boot did not find a pre-calibration nvmem-cell, try file next: %d\n",
2196                    ret);
2197
2198         ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
2199         if (ret == 0) {
2200                 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
2201                 goto success;
2202         }
2203
2204         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2205                    "boot did not find a pre calibration file, try DT next: %d\n",
2206                    ret);
2207
2208         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
2209         if (ret) {
2210                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2211                            "unable to load pre cal data from DT: %d\n", ret);
2212                 return ret;
2213         }
2214         ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
2215
2216 success:
2217         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2218                    ath10k_cal_mode_str(ar->cal_mode));
2219
2220         return 0;
2221 }
2222
2223 static int ath10k_core_pre_cal_config(struct ath10k *ar)
2224 {
2225         int ret;
2226
2227         ret = ath10k_core_pre_cal_download(ar);
2228         if (ret) {
2229                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2230                            "failed to load pre cal data: %d\n", ret);
2231                 return ret;
2232         }
2233
2234         ret = ath10k_core_get_board_id_from_otp(ar);
2235         if (ret) {
2236                 ath10k_err(ar, "failed to get board id: %d\n", ret);
2237                 return ret;
2238         }
2239
2240         ret = ath10k_download_and_run_otp(ar);
2241         if (ret) {
2242                 ath10k_err(ar, "failed to run otp: %d\n", ret);
2243                 return ret;
2244         }
2245
2246         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2247                    "pre cal configuration done successfully\n");
2248
2249         return 0;
2250 }
2251
2252 static int ath10k_download_cal_data(struct ath10k *ar)
2253 {
2254         int ret;
2255
2256         ret = ath10k_core_pre_cal_config(ar);
2257         if (ret == 0)
2258                 return 0;
2259
2260         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2261                    "pre cal download procedure failed, try cal file: %d\n",
2262                    ret);
2263
2264         ret = ath10k_download_cal_nvmem(ar, "calibration");
2265         if (ret == 0) {
2266                 ar->cal_mode = ATH10K_CAL_MODE_NVMEM;
2267                 goto done;
2268         } else if (ret == -EPROBE_DEFER) {
2269                 return ret;
2270         }
2271
2272         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2273                    "boot did not find a calibration nvmem-cell, try file next: %d\n",
2274                    ret);
2275
2276         ret = ath10k_download_cal_file(ar, ar->cal_file);
2277         if (ret == 0) {
2278                 ar->cal_mode = ATH10K_CAL_MODE_FILE;
2279                 goto done;
2280         }
2281
2282         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2283                    "boot did not find a calibration file, try DT next: %d\n",
2284                    ret);
2285
2286         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2287         if (ret == 0) {
2288                 ar->cal_mode = ATH10K_CAL_MODE_DT;
2289                 goto done;
2290         }
2291
2292         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2293                    "boot did not find DT entry, try target EEPROM next: %d\n",
2294                    ret);
2295
2296         ret = ath10k_download_cal_eeprom(ar);
2297         if (ret == 0) {
2298                 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2299                 goto done;
2300         }
2301
2302         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2303                    "boot did not find target EEPROM entry, try OTP next: %d\n",
2304                    ret);
2305
2306         ret = ath10k_download_and_run_otp(ar);
2307         if (ret) {
2308                 ath10k_err(ar, "failed to run otp: %d\n", ret);
2309                 return ret;
2310         }
2311
2312         ar->cal_mode = ATH10K_CAL_MODE_OTP;
2313
2314 done:
2315         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2316                    ath10k_cal_mode_str(ar->cal_mode));
2317         return 0;
2318 }
2319
2320 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
2321 {
2322         struct device_node *node;
2323         u8 coex_support = 0;
2324         int ret;
2325
2326         node = ar->dev->of_node;
2327         if (!node)
2328                 goto out;
2329
2330         ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
2331         if (ret) {
2332                 ar->coex_support = true;
2333                 goto out;
2334         }
2335
2336         if (coex_support) {
2337                 ar->coex_support = true;
2338         } else {
2339                 ar->coex_support = false;
2340                 ar->coex_gpio_pin = -1;
2341                 goto out;
2342         }
2343
2344         ret = of_property_read_u32(node, "qcom,coexist-gpio-pin",
2345                                    &ar->coex_gpio_pin);
2346         if (ret)
2347                 ar->coex_gpio_pin = -1;
2348
2349 out:
2350         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n",
2351                    ar->coex_support, ar->coex_gpio_pin);
2352 }
2353
2354 static int ath10k_init_uart(struct ath10k *ar)
2355 {
2356         int ret;
2357
2358         /*
2359          * Explicitly setting UART prints to zero as target turns it on
2360          * based on scratch registers.
2361          */
2362         ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2363         if (ret) {
2364                 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2365                 return ret;
2366         }
2367
2368         if (!uart_print) {
2369                 if (ar->hw_params.uart_pin_workaround) {
2370                         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2371                                                  ar->hw_params.uart_pin);
2372                         if (ret) {
2373                                 ath10k_warn(ar, "failed to set UART TX pin: %d",
2374                                             ret);
2375                                 return ret;
2376                         }
2377                 }
2378
2379                 return 0;
2380         }
2381
2382         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2383         if (ret) {
2384                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2385                 return ret;
2386         }
2387
2388         ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2389         if (ret) {
2390                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2391                 return ret;
2392         }
2393
2394         /* Set the UART baud rate to 19200. */
2395         ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2396         if (ret) {
2397                 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2398                 return ret;
2399         }
2400
2401         ath10k_info(ar, "UART prints enabled\n");
2402         return 0;
2403 }
2404
2405 static int ath10k_init_hw_params(struct ath10k *ar)
2406 {
2407         const struct ath10k_hw_params *hw_params;
2408         int i;
2409
2410         for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2411                 hw_params = &ath10k_hw_params_list[i];
2412
2413                 if (hw_params->bus == ar->hif.bus &&
2414                     hw_params->id == ar->target_version &&
2415                     hw_params->dev_id == ar->dev_id)
2416                         break;
2417         }
2418
2419         if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2420                 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2421                            ar->target_version);
2422                 return -EINVAL;
2423         }
2424
2425         ar->hw_params = *hw_params;
2426
2427         ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2428                    ar->hw_params.name, ar->target_version);
2429
2430         return 0;
2431 }
2432
2433 void ath10k_core_start_recovery(struct ath10k *ar)
2434 {
2435         if (test_and_set_bit(ATH10K_FLAG_RESTARTING, &ar->dev_flags)) {
2436                 ath10k_warn(ar, "already restarting\n");
2437                 return;
2438         }
2439
2440         queue_work(ar->workqueue, &ar->restart_work);
2441 }
2442 EXPORT_SYMBOL(ath10k_core_start_recovery);
2443
2444 void ath10k_core_napi_enable(struct ath10k *ar)
2445 {
2446         lockdep_assert_held(&ar->conf_mutex);
2447
2448         if (test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2449                 return;
2450
2451         napi_enable(&ar->napi);
2452         set_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2453 }
2454 EXPORT_SYMBOL(ath10k_core_napi_enable);
2455
2456 void ath10k_core_napi_sync_disable(struct ath10k *ar)
2457 {
2458         lockdep_assert_held(&ar->conf_mutex);
2459
2460         if (!test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2461                 return;
2462
2463         napi_synchronize(&ar->napi);
2464         napi_disable(&ar->napi);
2465         clear_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2466 }
2467 EXPORT_SYMBOL(ath10k_core_napi_sync_disable);
2468
2469 static void ath10k_core_restart(struct work_struct *work)
2470 {
2471         struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2472         struct ath10k_vif *arvif;
2473         int ret;
2474
2475         set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2476
2477         /* Place a barrier to make sure the compiler doesn't reorder
2478          * CRASH_FLUSH and calling other functions.
2479          */
2480         barrier();
2481
2482         ieee80211_stop_queues(ar->hw);
2483         ath10k_drain_tx(ar);
2484         complete(&ar->scan.started);
2485         complete(&ar->scan.completed);
2486         complete(&ar->scan.on_channel);
2487         complete(&ar->offchan_tx_completed);
2488         complete(&ar->install_key_done);
2489         complete(&ar->vdev_setup_done);
2490         complete(&ar->vdev_delete_done);
2491         complete(&ar->thermal.wmi_sync);
2492         complete(&ar->bss_survey_done);
2493         wake_up(&ar->htt.empty_tx_wq);
2494         wake_up(&ar->wmi.tx_credits_wq);
2495         wake_up(&ar->peer_mapping_wq);
2496
2497         /* TODO: We can have one instance of cancelling coverage_class_work by
2498          * moving it to ath10k_halt(), so that both stop() and restart() would
2499          * call that but it takes conf_mutex() and if we call cancel_work_sync()
2500          * with conf_mutex it will deadlock.
2501          */
2502         cancel_work_sync(&ar->set_coverage_class_work);
2503
2504         mutex_lock(&ar->conf_mutex);
2505
2506         switch (ar->state) {
2507         case ATH10K_STATE_ON:
2508                 ar->state = ATH10K_STATE_RESTARTING;
2509                 ath10k_halt(ar);
2510                 ath10k_scan_finish(ar);
2511                 if (ar->hw_params.hw_restart_disconnect) {
2512                         list_for_each_entry(arvif, &ar->arvifs, list) {
2513                                 if (arvif->is_up &&
2514                                     arvif->vdev_type == WMI_VDEV_TYPE_STA)
2515                                         ieee80211_hw_restart_disconnect(arvif->vif);
2516                         }
2517                 }
2518
2519                 ieee80211_restart_hw(ar->hw);
2520                 break;
2521         case ATH10K_STATE_OFF:
2522                 /* this can happen if driver is being unloaded
2523                  * or if the crash happens during FW probing
2524                  */
2525                 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2526                 break;
2527         case ATH10K_STATE_RESTARTING:
2528                 /* hw restart might be requested from multiple places */
2529                 break;
2530         case ATH10K_STATE_RESTARTED:
2531                 ar->state = ATH10K_STATE_WEDGED;
2532                 fallthrough;
2533         case ATH10K_STATE_WEDGED:
2534                 ath10k_warn(ar, "device is wedged, will not restart\n");
2535                 break;
2536         case ATH10K_STATE_UTF:
2537                 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2538                 break;
2539         }
2540
2541         mutex_unlock(&ar->conf_mutex);
2542
2543         ret = ath10k_coredump_submit(ar);
2544         if (ret)
2545                 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2546                             ret);
2547
2548         complete(&ar->driver_recovery);
2549 }
2550
2551 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2552 {
2553         struct ath10k *ar = container_of(work, struct ath10k,
2554                                          set_coverage_class_work);
2555
2556         if (ar->hw_params.hw_ops->set_coverage_class)
2557                 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
2558 }
2559
2560 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2561 {
2562         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2563         int max_num_peers;
2564
2565         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2566             !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2567                 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2568                 return -EINVAL;
2569         }
2570
2571         if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2572                 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2573                            ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2574                 return -EINVAL;
2575         }
2576
2577         ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2578         switch (ath10k_cryptmode_param) {
2579         case ATH10K_CRYPT_MODE_HW:
2580                 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2581                 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2582                 break;
2583         case ATH10K_CRYPT_MODE_SW:
2584                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2585                               fw_file->fw_features)) {
2586                         ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2587                         return -EINVAL;
2588                 }
2589
2590                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2591                 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2592                 break;
2593         default:
2594                 ath10k_info(ar, "invalid cryptmode: %d\n",
2595                             ath10k_cryptmode_param);
2596                 return -EINVAL;
2597         }
2598
2599         ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2600         ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2601
2602         if (rawmode) {
2603                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2604                               fw_file->fw_features)) {
2605                         ath10k_err(ar, "rawmode = 1 requires support from firmware");
2606                         return -EINVAL;
2607                 }
2608                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2609         }
2610
2611         if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2612                 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2613
2614                 /* Workaround:
2615                  *
2616                  * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2617                  * and causes enormous performance issues (malformed frames,
2618                  * etc).
2619                  *
2620                  * Disabling A-MSDU makes RAW mode stable with heavy traffic
2621                  * albeit a bit slower compared to regular operation.
2622                  */
2623                 ar->htt.max_num_amsdu = 1;
2624         }
2625
2626         /* Backwards compatibility for firmwares without
2627          * ATH10K_FW_IE_WMI_OP_VERSION.
2628          */
2629         if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2630                 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2631                         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2632                                      fw_file->fw_features))
2633                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2634                         else
2635                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2636                 } else {
2637                         fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2638                 }
2639         }
2640
2641         switch (fw_file->wmi_op_version) {
2642         case ATH10K_FW_WMI_OP_VERSION_MAIN:
2643                 max_num_peers = TARGET_NUM_PEERS;
2644                 ar->max_num_stations = TARGET_NUM_STATIONS;
2645                 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2646                 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2647                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2648                         WMI_STAT_PEER;
2649                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2650                 break;
2651         case ATH10K_FW_WMI_OP_VERSION_10_1:
2652         case ATH10K_FW_WMI_OP_VERSION_10_2:
2653         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2654                 if (ath10k_peer_stats_enabled(ar)) {
2655                         max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2656                         ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2657                 } else {
2658                         max_num_peers = TARGET_10X_NUM_PEERS;
2659                         ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2660                 }
2661                 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2662                 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2663                 ar->fw_stats_req_mask = WMI_STAT_PEER;
2664                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2665                 break;
2666         case ATH10K_FW_WMI_OP_VERSION_TLV:
2667                 max_num_peers = TARGET_TLV_NUM_PEERS;
2668                 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2669                 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2670                 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2671                 if (ar->hif.bus == ATH10K_BUS_SDIO)
2672                         ar->htt.max_num_pending_tx =
2673                                 TARGET_TLV_NUM_MSDU_DESC_HL;
2674                 else
2675                         ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2676                 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2677                 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2678                         WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2679                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2680                 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2681                 break;
2682         case ATH10K_FW_WMI_OP_VERSION_10_4:
2683                 max_num_peers = TARGET_10_4_NUM_PEERS;
2684                 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2685                 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2686                 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2687                 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2688                 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2689                                         WMI_10_4_STAT_PEER_EXTD |
2690                                         WMI_10_4_STAT_VDEV_EXTD;
2691                 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2692                 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2693
2694                 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2695                              fw_file->fw_features))
2696                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2697                 else
2698                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2699                 break;
2700         case ATH10K_FW_WMI_OP_VERSION_UNSET:
2701         case ATH10K_FW_WMI_OP_VERSION_MAX:
2702         default:
2703                 WARN_ON(1);
2704                 return -EINVAL;
2705         }
2706
2707         if (ar->hw_params.num_peers)
2708                 ar->max_num_peers = ar->hw_params.num_peers;
2709         else
2710                 ar->max_num_peers = max_num_peers;
2711
2712         /* Backwards compatibility for firmwares without
2713          * ATH10K_FW_IE_HTT_OP_VERSION.
2714          */
2715         if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2716                 switch (fw_file->wmi_op_version) {
2717                 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2718                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2719                         break;
2720                 case ATH10K_FW_WMI_OP_VERSION_10_1:
2721                 case ATH10K_FW_WMI_OP_VERSION_10_2:
2722                 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2723                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2724                         break;
2725                 case ATH10K_FW_WMI_OP_VERSION_TLV:
2726                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2727                         break;
2728                 case ATH10K_FW_WMI_OP_VERSION_10_4:
2729                 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2730                 case ATH10K_FW_WMI_OP_VERSION_MAX:
2731                         ath10k_err(ar, "htt op version not found from fw meta data");
2732                         return -EINVAL;
2733                 }
2734         }
2735
2736         return 0;
2737 }
2738
2739 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2740 {
2741         int ret;
2742         int vdev_id;
2743         int vdev_type;
2744         int vdev_subtype;
2745         const u8 *vdev_addr;
2746
2747         vdev_id = 0;
2748         vdev_type = WMI_VDEV_TYPE_STA;
2749         vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2750         vdev_addr = ar->mac_addr;
2751
2752         ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2753                                      vdev_addr);
2754         if (ret) {
2755                 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2756                 return ret;
2757         }
2758
2759         ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2760         if (ret) {
2761                 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2762                 return ret;
2763         }
2764
2765         /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2766          * serialized properly implicitly.
2767          *
2768          * Moreover (most) WMI commands have no explicit acknowledges. It is
2769          * possible to infer it implicitly by poking firmware with echo
2770          * command - getting a reply means all preceding comments have been
2771          * (mostly) processed.
2772          *
2773          * In case of vdev create/delete this is sufficient.
2774          *
2775          * Without this it's possible to end up with a race when HTT Rx ring is
2776          * started before vdev create/delete hack is complete allowing a short
2777          * window of opportunity to receive (and Tx ACK) a bunch of frames.
2778          */
2779         ret = ath10k_wmi_barrier(ar);
2780         if (ret) {
2781                 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2782                 return ret;
2783         }
2784
2785         return 0;
2786 }
2787
2788 static int ath10k_core_compat_services(struct ath10k *ar)
2789 {
2790         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2791
2792         /* all 10.x firmware versions support thermal throttling but don't
2793          * advertise the support via service flags so we have to hardcode
2794          * it here
2795          */
2796         switch (fw_file->wmi_op_version) {
2797         case ATH10K_FW_WMI_OP_VERSION_10_1:
2798         case ATH10K_FW_WMI_OP_VERSION_10_2:
2799         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2800         case ATH10K_FW_WMI_OP_VERSION_10_4:
2801                 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2802                 break;
2803         default:
2804                 break;
2805         }
2806
2807         return 0;
2808 }
2809
2810 #define TGT_IRAM_READ_PER_ITR (8 * 1024)
2811
2812 static int ath10k_core_copy_target_iram(struct ath10k *ar)
2813 {
2814         const struct ath10k_hw_mem_layout *hw_mem;
2815         const struct ath10k_mem_region *tmp, *mem_region = NULL;
2816         dma_addr_t paddr;
2817         void *vaddr = NULL;
2818         u8 num_read_itr;
2819         int i, ret;
2820         u32 len, remaining_len;
2821
2822         /* copy target iram feature must work also when
2823          * ATH10K_FW_CRASH_DUMP_RAM_DATA is disabled, so
2824          * _ath10k_coredump_get_mem_layout() to accomplist that
2825          */
2826         hw_mem = _ath10k_coredump_get_mem_layout(ar);
2827         if (!hw_mem)
2828                 /* if CONFIG_DEV_COREDUMP is disabled we get NULL, then
2829                  * just silently disable the feature by doing nothing
2830                  */
2831                 return 0;
2832
2833         for (i = 0; i < hw_mem->region_table.size; i++) {
2834                 tmp = &hw_mem->region_table.regions[i];
2835                 if (tmp->type == ATH10K_MEM_REGION_TYPE_REG) {
2836                         mem_region = tmp;
2837                         break;
2838                 }
2839         }
2840
2841         if (!mem_region)
2842                 return -ENOMEM;
2843
2844         for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2845                 if (ar->wmi.mem_chunks[i].req_id ==
2846                     WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID) {
2847                         vaddr = ar->wmi.mem_chunks[i].vaddr;
2848                         len = ar->wmi.mem_chunks[i].len;
2849                         break;
2850                 }
2851         }
2852
2853         if (!vaddr || !len) {
2854                 ath10k_warn(ar, "No allocated memory for IRAM back up");
2855                 return -ENOMEM;
2856         }
2857
2858         len = (len < mem_region->len) ? len : mem_region->len;
2859         paddr = mem_region->start;
2860         num_read_itr = len / TGT_IRAM_READ_PER_ITR;
2861         remaining_len = len % TGT_IRAM_READ_PER_ITR;
2862         for (i = 0; i < num_read_itr; i++) {
2863                 ret = ath10k_hif_diag_read(ar, paddr, vaddr,
2864                                            TGT_IRAM_READ_PER_ITR);
2865                 if (ret) {
2866                         ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
2867                                     ret);
2868                         return ret;
2869                 }
2870
2871                 paddr += TGT_IRAM_READ_PER_ITR;
2872                 vaddr += TGT_IRAM_READ_PER_ITR;
2873         }
2874
2875         if (remaining_len) {
2876                 ret = ath10k_hif_diag_read(ar, paddr, vaddr, remaining_len);
2877                 if (ret) {
2878                         ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
2879                                     ret);
2880                         return ret;
2881                 }
2882         }
2883
2884         ath10k_dbg(ar, ATH10K_DBG_BOOT, "target IRAM back up completed\n");
2885
2886         return 0;
2887 }
2888
2889 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2890                       const struct ath10k_fw_components *fw)
2891 {
2892         int status;
2893         u32 val;
2894
2895         lockdep_assert_held(&ar->conf_mutex);
2896
2897         clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2898
2899         ar->running_fw = fw;
2900
2901         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2902                       ar->running_fw->fw_file.fw_features)) {
2903                 ath10k_bmi_start(ar);
2904
2905                 /* Enable hardware clock to speed up firmware download */
2906                 if (ar->hw_params.hw_ops->enable_pll_clk) {
2907                         status = ar->hw_params.hw_ops->enable_pll_clk(ar);
2908                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot enable pll ret %d\n",
2909                                    status);
2910                 }
2911
2912                 if (ath10k_init_configure_target(ar)) {
2913                         status = -EINVAL;
2914                         goto err;
2915                 }
2916
2917                 status = ath10k_download_cal_data(ar);
2918                 if (status)
2919                         goto err;
2920
2921                 /* Some of qca988x solutions are having global reset issue
2922                  * during target initialization. Bypassing PLL setting before
2923                  * downloading firmware and letting the SoC run on REF_CLK is
2924                  * fixing the problem. Corresponding firmware change is also
2925                  * needed to set the clock source once the target is
2926                  * initialized.
2927                  */
2928                 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2929                              ar->running_fw->fw_file.fw_features)) {
2930                         status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2931                         if (status) {
2932                                 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2933                                            status);
2934                                 goto err;
2935                         }
2936                 }
2937
2938                 status = ath10k_download_fw(ar);
2939                 if (status)
2940                         goto err;
2941
2942                 status = ath10k_init_uart(ar);
2943                 if (status)
2944                         goto err;
2945
2946                 if (ar->hif.bus == ATH10K_BUS_SDIO) {
2947                         status = ath10k_init_sdio(ar, mode);
2948                         if (status) {
2949                                 ath10k_err(ar, "failed to init SDIO: %d\n", status);
2950                                 goto err;
2951                         }
2952                 }
2953         }
2954
2955         ar->htc.htc_ops.target_send_suspend_complete =
2956                 ath10k_send_suspend_complete;
2957
2958         status = ath10k_htc_init(ar);
2959         if (status) {
2960                 ath10k_err(ar, "could not init HTC (%d)\n", status);
2961                 goto err;
2962         }
2963
2964         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2965                       ar->running_fw->fw_file.fw_features)) {
2966                 status = ath10k_bmi_done(ar);
2967                 if (status)
2968                         goto err;
2969         }
2970
2971         status = ath10k_wmi_attach(ar);
2972         if (status) {
2973                 ath10k_err(ar, "WMI attach failed: %d\n", status);
2974                 goto err;
2975         }
2976
2977         status = ath10k_htt_init(ar);
2978         if (status) {
2979                 ath10k_err(ar, "failed to init htt: %d\n", status);
2980                 goto err_wmi_detach;
2981         }
2982
2983         status = ath10k_htt_tx_start(&ar->htt);
2984         if (status) {
2985                 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
2986                 goto err_wmi_detach;
2987         }
2988
2989         /* If firmware indicates Full Rx Reorder support it must be used in a
2990          * slightly different manner. Let HTT code know.
2991          */
2992         ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2993                                                 ar->wmi.svc_map));
2994
2995         status = ath10k_htt_rx_alloc(&ar->htt);
2996         if (status) {
2997                 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
2998                 goto err_htt_tx_detach;
2999         }
3000
3001         status = ath10k_hif_start(ar);
3002         if (status) {
3003                 ath10k_err(ar, "could not start HIF: %d\n", status);
3004                 goto err_htt_rx_detach;
3005         }
3006
3007         status = ath10k_htc_wait_target(&ar->htc);
3008         if (status) {
3009                 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
3010                 goto err_hif_stop;
3011         }
3012
3013         status = ath10k_hif_start_post(ar);
3014         if (status) {
3015                 ath10k_err(ar, "failed to swap mailbox: %d\n", status);
3016                 goto err_hif_stop;
3017         }
3018
3019         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3020                 status = ath10k_htt_connect(&ar->htt);
3021                 if (status) {
3022                         ath10k_err(ar, "failed to connect htt (%d)\n", status);
3023                         goto err_hif_stop;
3024                 }
3025         }
3026
3027         status = ath10k_wmi_connect(ar);
3028         if (status) {
3029                 ath10k_err(ar, "could not connect wmi: %d\n", status);
3030                 goto err_hif_stop;
3031         }
3032
3033         status = ath10k_htc_start(&ar->htc);
3034         if (status) {
3035                 ath10k_err(ar, "failed to start htc: %d\n", status);
3036                 goto err_hif_stop;
3037         }
3038
3039         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3040                 status = ath10k_wmi_wait_for_service_ready(ar);
3041                 if (status) {
3042                         ath10k_warn(ar, "wmi service ready event not received");
3043                         goto err_hif_stop;
3044                 }
3045         }
3046
3047         ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
3048                    ar->hw->wiphy->fw_version);
3049
3050         if (test_bit(ATH10K_FW_FEATURE_IRAM_RECOVERY,
3051                      ar->running_fw->fw_file.fw_features)) {
3052                 status = ath10k_core_copy_target_iram(ar);
3053                 if (status) {
3054                         ath10k_warn(ar, "failed to copy target iram contents: %d",
3055                                     status);
3056                         goto err_hif_stop;
3057                 }
3058         }
3059
3060         if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
3061             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3062                 val = 0;
3063                 if (ath10k_peer_stats_enabled(ar))
3064                         val = WMI_10_4_PEER_STATS;
3065
3066                 /* Enable vdev stats by default */
3067                 val |= WMI_10_4_VDEV_STATS;
3068
3069                 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
3070                         val |= WMI_10_4_BSS_CHANNEL_INFO_64;
3071
3072                 ath10k_core_fetch_btcoex_dt(ar);
3073
3074                 /* 10.4 firmware supports BT-Coex without reloading firmware
3075                  * via pdev param. To support Bluetooth coexistence pdev param,
3076                  * WMI_COEX_GPIO_SUPPORT of extended resource config should be
3077                  * enabled always.
3078                  *
3079                  * We can still enable BTCOEX if firmware has the support
3080                  * eventhough btceox_support value is
3081                  * ATH10K_DT_BTCOEX_NOT_FOUND
3082                  */
3083
3084                 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
3085                     test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
3086                              ar->running_fw->fw_file.fw_features) &&
3087                     ar->coex_support)
3088                         val |= WMI_10_4_COEX_GPIO_SUPPORT;
3089
3090                 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
3091                              ar->wmi.svc_map))
3092                         val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
3093
3094                 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
3095                              ar->wmi.svc_map))
3096                         val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
3097
3098                 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
3099                              ar->wmi.svc_map))
3100                         val |= WMI_10_4_TX_DATA_ACK_RSSI;
3101
3102                 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
3103                         val |= WMI_10_4_REPORT_AIRTIME;
3104
3105                 if (test_bit(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
3106                              ar->wmi.svc_map))
3107                         val |= WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT;
3108
3109                 status = ath10k_mac_ext_resource_config(ar, val);
3110                 if (status) {
3111                         ath10k_err(ar,
3112                                    "failed to send ext resource cfg command : %d\n",
3113                                    status);
3114                         goto err_hif_stop;
3115                 }
3116         }
3117
3118         status = ath10k_wmi_cmd_init(ar);
3119         if (status) {
3120                 ath10k_err(ar, "could not send WMI init command (%d)\n",
3121                            status);
3122                 goto err_hif_stop;
3123         }
3124
3125         status = ath10k_wmi_wait_for_unified_ready(ar);
3126         if (status) {
3127                 ath10k_err(ar, "wmi unified ready event not received\n");
3128                 goto err_hif_stop;
3129         }
3130
3131         status = ath10k_core_compat_services(ar);
3132         if (status) {
3133                 ath10k_err(ar, "compat services failed: %d\n", status);
3134                 goto err_hif_stop;
3135         }
3136
3137         status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
3138         if (status && status != -EOPNOTSUPP) {
3139                 ath10k_err(ar,
3140                            "failed to set base mac address: %d\n", status);
3141                 goto err_hif_stop;
3142         }
3143
3144         /* Some firmware revisions do not properly set up hardware rx filter
3145          * registers.
3146          *
3147          * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
3148          * is filled with 0s instead of 1s allowing HW to respond with ACKs to
3149          * any frames that matches MAC_PCU_RX_FILTER which is also
3150          * misconfigured to accept anything.
3151          *
3152          * The ADDR1 is programmed using internal firmware structure field and
3153          * can't be (easily/sanely) reached from the driver explicitly. It is
3154          * possible to implicitly make it correct by creating a dummy vdev and
3155          * then deleting it.
3156          */
3157         if (ar->hw_params.hw_filter_reset_required &&
3158             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3159                 status = ath10k_core_reset_rx_filter(ar);
3160                 if (status) {
3161                         ath10k_err(ar,
3162                                    "failed to reset rx filter: %d\n", status);
3163                         goto err_hif_stop;
3164                 }
3165         }
3166
3167         status = ath10k_htt_rx_ring_refill(ar);
3168         if (status) {
3169                 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
3170                 goto err_hif_stop;
3171         }
3172
3173         if (ar->max_num_vdevs >= 64)
3174                 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
3175         else
3176                 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
3177
3178         INIT_LIST_HEAD(&ar->arvifs);
3179
3180         /* we don't care about HTT in UTF mode */
3181         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3182                 status = ath10k_htt_setup(&ar->htt);
3183                 if (status) {
3184                         ath10k_err(ar, "failed to setup htt: %d\n", status);
3185                         goto err_hif_stop;
3186                 }
3187         }
3188
3189         status = ath10k_debug_start(ar);
3190         if (status)
3191                 goto err_hif_stop;
3192
3193         status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
3194         if (status && status != -EOPNOTSUPP) {
3195                 ath10k_warn(ar, "set target log mode failed: %d\n", status);
3196                 goto err_hif_stop;
3197         }
3198
3199         return 0;
3200
3201 err_hif_stop:
3202         ath10k_hif_stop(ar);
3203 err_htt_rx_detach:
3204         ath10k_htt_rx_free(&ar->htt);
3205 err_htt_tx_detach:
3206         ath10k_htt_tx_free(&ar->htt);
3207 err_wmi_detach:
3208         ath10k_wmi_detach(ar);
3209 err:
3210         return status;
3211 }
3212 EXPORT_SYMBOL(ath10k_core_start);
3213
3214 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
3215 {
3216         int ret;
3217         unsigned long time_left;
3218
3219         reinit_completion(&ar->target_suspend);
3220
3221         ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
3222         if (ret) {
3223                 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
3224                 return ret;
3225         }
3226
3227         time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
3228
3229         if (!time_left) {
3230                 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
3231                 return -ETIMEDOUT;
3232         }
3233
3234         return 0;
3235 }
3236
3237 void ath10k_core_stop(struct ath10k *ar)
3238 {
3239         lockdep_assert_held(&ar->conf_mutex);
3240         ath10k_debug_stop(ar);
3241
3242         /* try to suspend target */
3243         if (ar->state != ATH10K_STATE_RESTARTING &&
3244             ar->state != ATH10K_STATE_UTF)
3245                 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
3246
3247         ath10k_hif_stop(ar);
3248         ath10k_htt_tx_stop(&ar->htt);
3249         ath10k_htt_rx_free(&ar->htt);
3250         ath10k_wmi_detach(ar);
3251
3252         ar->id.bmi_ids_valid = false;
3253 }
3254 EXPORT_SYMBOL(ath10k_core_stop);
3255
3256 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
3257  * order to know what hw capabilities should be advertised to mac80211 it is
3258  * necessary to load the firmware (and tear it down immediately since start
3259  * hook will try to init it again) before registering
3260  */
3261 static int ath10k_core_probe_fw(struct ath10k *ar)
3262 {
3263         struct bmi_target_info target_info;
3264         int ret = 0;
3265
3266         ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
3267         if (ret) {
3268                 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
3269                 return ret;
3270         }
3271
3272         switch (ar->hif.bus) {
3273         case ATH10K_BUS_SDIO:
3274                 memset(&target_info, 0, sizeof(target_info));
3275                 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
3276                 if (ret) {
3277                         ath10k_err(ar, "could not get target info (%d)\n", ret);
3278                         goto err_power_down;
3279                 }
3280                 ar->target_version = target_info.version;
3281                 ar->hw->wiphy->hw_version = target_info.version;
3282                 break;
3283         case ATH10K_BUS_PCI:
3284         case ATH10K_BUS_AHB:
3285         case ATH10K_BUS_USB:
3286                 memset(&target_info, 0, sizeof(target_info));
3287                 ret = ath10k_bmi_get_target_info(ar, &target_info);
3288                 if (ret) {
3289                         ath10k_err(ar, "could not get target info (%d)\n", ret);
3290                         goto err_power_down;
3291                 }
3292                 ar->target_version = target_info.version;
3293                 ar->hw->wiphy->hw_version = target_info.version;
3294                 break;
3295         case ATH10K_BUS_SNOC:
3296                 memset(&target_info, 0, sizeof(target_info));
3297                 ret = ath10k_hif_get_target_info(ar, &target_info);
3298                 if (ret) {
3299                         ath10k_err(ar, "could not get target info (%d)\n", ret);
3300                         goto err_power_down;
3301                 }
3302                 ar->target_version = target_info.version;
3303                 ar->hw->wiphy->hw_version = target_info.version;
3304                 break;
3305         default:
3306                 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
3307         }
3308
3309         ret = ath10k_init_hw_params(ar);
3310         if (ret) {
3311                 ath10k_err(ar, "could not get hw params (%d)\n", ret);
3312                 goto err_power_down;
3313         }
3314
3315         ret = ath10k_core_fetch_firmware_files(ar);
3316         if (ret) {
3317                 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
3318                 goto err_power_down;
3319         }
3320
3321         BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
3322                      sizeof(ar->normal_mode_fw.fw_file.fw_version));
3323         memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
3324                sizeof(ar->hw->wiphy->fw_version));
3325
3326         ath10k_debug_print_hwfw_info(ar);
3327
3328         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3329                       ar->normal_mode_fw.fw_file.fw_features)) {
3330                 ret = ath10k_core_pre_cal_download(ar);
3331                 if (ret) {
3332                         /* pre calibration data download is not necessary
3333                          * for all the chipsets. Ignore failures and continue.
3334                          */
3335                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
3336                                    "could not load pre cal data: %d\n", ret);
3337                 }
3338
3339                 ret = ath10k_core_get_board_id_from_otp(ar);
3340                 if (ret && ret != -EOPNOTSUPP) {
3341                         ath10k_err(ar, "failed to get board id from otp: %d\n",
3342                                    ret);
3343                         goto err_free_firmware_files;
3344                 }
3345
3346                 ret = ath10k_core_check_smbios(ar);
3347                 if (ret)
3348                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
3349
3350                 ret = ath10k_core_check_dt(ar);
3351                 if (ret)
3352                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
3353
3354                 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
3355                 if (ret) {
3356                         ath10k_err(ar, "failed to fetch board file: %d\n", ret);
3357                         goto err_free_firmware_files;
3358                 }
3359
3360                 ath10k_debug_print_board_info(ar);
3361         }
3362
3363         device_get_mac_address(ar->dev, ar->mac_addr);
3364
3365         ret = ath10k_core_init_firmware_features(ar);
3366         if (ret) {
3367                 ath10k_err(ar, "fatal problem with firmware features: %d\n",
3368                            ret);
3369                 goto err_free_firmware_files;
3370         }
3371
3372         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3373                       ar->normal_mode_fw.fw_file.fw_features)) {
3374                 ret = ath10k_swap_code_seg_init(ar,
3375                                                 &ar->normal_mode_fw.fw_file);
3376                 if (ret) {
3377                         ath10k_err(ar, "failed to initialize code swap segment: %d\n",
3378                                    ret);
3379                         goto err_free_firmware_files;
3380                 }
3381         }
3382
3383         mutex_lock(&ar->conf_mutex);
3384
3385         ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
3386                                 &ar->normal_mode_fw);
3387         if (ret) {
3388                 ath10k_err(ar, "could not init core (%d)\n", ret);
3389                 goto err_unlock;
3390         }
3391
3392         ath10k_debug_print_boot_info(ar);
3393         ath10k_core_stop(ar);
3394
3395         mutex_unlock(&ar->conf_mutex);
3396
3397         ath10k_hif_power_down(ar);
3398         return 0;
3399
3400 err_unlock:
3401         mutex_unlock(&ar->conf_mutex);
3402
3403 err_free_firmware_files:
3404         ath10k_core_free_firmware_files(ar);
3405
3406 err_power_down:
3407         ath10k_hif_power_down(ar);
3408
3409         return ret;
3410 }
3411
3412 static void ath10k_core_register_work(struct work_struct *work)
3413 {
3414         struct ath10k *ar = container_of(work, struct ath10k, register_work);
3415         int status;
3416
3417         /* peer stats are enabled by default */
3418         set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
3419
3420         status = ath10k_core_probe_fw(ar);
3421         if (status) {
3422                 ath10k_err(ar, "could not probe fw (%d)\n", status);
3423                 goto err;
3424         }
3425
3426         status = ath10k_mac_register(ar);
3427         if (status) {
3428                 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
3429                 goto err_release_fw;
3430         }
3431
3432         status = ath10k_coredump_register(ar);
3433         if (status) {
3434                 ath10k_err(ar, "unable to register coredump\n");
3435                 goto err_unregister_mac;
3436         }
3437
3438         status = ath10k_debug_register(ar);
3439         if (status) {
3440                 ath10k_err(ar, "unable to initialize debugfs\n");
3441                 goto err_unregister_coredump;
3442         }
3443
3444         status = ath10k_spectral_create(ar);
3445         if (status) {
3446                 ath10k_err(ar, "failed to initialize spectral\n");
3447                 goto err_debug_destroy;
3448         }
3449
3450         status = ath10k_thermal_register(ar);
3451         if (status) {
3452                 ath10k_err(ar, "could not register thermal device: %d\n",
3453                            status);
3454                 goto err_spectral_destroy;
3455         }
3456
3457         set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3458         return;
3459
3460 err_spectral_destroy:
3461         ath10k_spectral_destroy(ar);
3462 err_debug_destroy:
3463         ath10k_debug_destroy(ar);
3464 err_unregister_coredump:
3465         ath10k_coredump_unregister(ar);
3466 err_unregister_mac:
3467         ath10k_mac_unregister(ar);
3468 err_release_fw:
3469         ath10k_core_free_firmware_files(ar);
3470 err:
3471         /* TODO: It's probably a good idea to release device from the driver
3472          * but calling device_release_driver() here will cause a deadlock.
3473          */
3474         return;
3475 }
3476
3477 int ath10k_core_register(struct ath10k *ar,
3478                          const struct ath10k_bus_params *bus_params)
3479 {
3480         ar->bus_param = *bus_params;
3481
3482         queue_work(ar->workqueue, &ar->register_work);
3483
3484         return 0;
3485 }
3486 EXPORT_SYMBOL(ath10k_core_register);
3487
3488 void ath10k_core_unregister(struct ath10k *ar)
3489 {
3490         cancel_work_sync(&ar->register_work);
3491
3492         if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3493                 return;
3494
3495         ath10k_thermal_unregister(ar);
3496         /* Stop spectral before unregistering from mac80211 to remove the
3497          * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3498          * would be already be free'd recursively, leading to a double free.
3499          */
3500         ath10k_spectral_destroy(ar);
3501
3502         /* We must unregister from mac80211 before we stop HTC and HIF.
3503          * Otherwise we will fail to submit commands to FW and mac80211 will be
3504          * unhappy about callback failures.
3505          */
3506         ath10k_mac_unregister(ar);
3507
3508         ath10k_testmode_destroy(ar);
3509
3510         ath10k_core_free_firmware_files(ar);
3511         ath10k_core_free_board_files(ar);
3512
3513         ath10k_debug_unregister(ar);
3514 }
3515 EXPORT_SYMBOL(ath10k_core_unregister);
3516
3517 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3518                                   enum ath10k_bus bus,
3519                                   enum ath10k_hw_rev hw_rev,
3520                                   const struct ath10k_hif_ops *hif_ops)
3521 {
3522         struct ath10k *ar;
3523         int ret;
3524
3525         ar = ath10k_mac_create(priv_size);
3526         if (!ar)
3527                 return NULL;
3528
3529         ar->ath_common.priv = ar;
3530         ar->ath_common.hw = ar->hw;
3531         ar->dev = dev;
3532         ar->hw_rev = hw_rev;
3533         ar->hif.ops = hif_ops;
3534         ar->hif.bus = bus;
3535
3536         switch (hw_rev) {
3537         case ATH10K_HW_QCA988X:
3538         case ATH10K_HW_QCA9887:
3539                 ar->regs = &qca988x_regs;
3540                 ar->hw_ce_regs = &qcax_ce_regs;
3541                 ar->hw_values = &qca988x_values;
3542                 break;
3543         case ATH10K_HW_QCA6174:
3544         case ATH10K_HW_QCA9377:
3545                 ar->regs = &qca6174_regs;
3546                 ar->hw_ce_regs = &qcax_ce_regs;
3547                 ar->hw_values = &qca6174_values;
3548                 break;
3549         case ATH10K_HW_QCA99X0:
3550         case ATH10K_HW_QCA9984:
3551                 ar->regs = &qca99x0_regs;
3552                 ar->hw_ce_regs = &qcax_ce_regs;
3553                 ar->hw_values = &qca99x0_values;
3554                 break;
3555         case ATH10K_HW_QCA9888:
3556                 ar->regs = &qca99x0_regs;
3557                 ar->hw_ce_regs = &qcax_ce_regs;
3558                 ar->hw_values = &qca9888_values;
3559                 break;
3560         case ATH10K_HW_QCA4019:
3561                 ar->regs = &qca4019_regs;
3562                 ar->hw_ce_regs = &qcax_ce_regs;
3563                 ar->hw_values = &qca4019_values;
3564                 break;
3565         case ATH10K_HW_WCN3990:
3566                 ar->regs = &wcn3990_regs;
3567                 ar->hw_ce_regs = &wcn3990_ce_regs;
3568                 ar->hw_values = &wcn3990_values;
3569                 break;
3570         default:
3571                 ath10k_err(ar, "unsupported core hardware revision %d\n",
3572                            hw_rev);
3573                 ret = -ENOTSUPP;
3574                 goto err_free_mac;
3575         }
3576
3577         init_completion(&ar->scan.started);
3578         init_completion(&ar->scan.completed);
3579         init_completion(&ar->scan.on_channel);
3580         init_completion(&ar->target_suspend);
3581         init_completion(&ar->driver_recovery);
3582         init_completion(&ar->wow.wakeup_completed);
3583
3584         init_completion(&ar->install_key_done);
3585         init_completion(&ar->vdev_setup_done);
3586         init_completion(&ar->vdev_delete_done);
3587         init_completion(&ar->thermal.wmi_sync);
3588         init_completion(&ar->bss_survey_done);
3589         init_completion(&ar->peer_delete_done);
3590         init_completion(&ar->peer_stats_info_complete);
3591
3592         INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3593
3594         ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3595         if (!ar->workqueue)
3596                 goto err_free_mac;
3597
3598         ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3599         if (!ar->workqueue_aux)
3600                 goto err_free_wq;
3601
3602         ar->workqueue_tx_complete =
3603                 create_singlethread_workqueue("ath10k_tx_complete_wq");
3604         if (!ar->workqueue_tx_complete)
3605                 goto err_free_aux_wq;
3606
3607         mutex_init(&ar->conf_mutex);
3608         mutex_init(&ar->dump_mutex);
3609         spin_lock_init(&ar->data_lock);
3610
3611         INIT_LIST_HEAD(&ar->peers);
3612         init_waitqueue_head(&ar->peer_mapping_wq);
3613         init_waitqueue_head(&ar->htt.empty_tx_wq);
3614         init_waitqueue_head(&ar->wmi.tx_credits_wq);
3615
3616         skb_queue_head_init(&ar->htt.rx_indication_head);
3617
3618         init_completion(&ar->offchan_tx_completed);
3619         INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3620         skb_queue_head_init(&ar->offchan_tx_queue);
3621
3622         INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3623         skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3624
3625         INIT_WORK(&ar->register_work, ath10k_core_register_work);
3626         INIT_WORK(&ar->restart_work, ath10k_core_restart);
3627         INIT_WORK(&ar->set_coverage_class_work,
3628                   ath10k_core_set_coverage_class_work);
3629
3630         init_dummy_netdev(&ar->napi_dev);
3631
3632         ret = ath10k_coredump_create(ar);
3633         if (ret)
3634                 goto err_free_tx_complete;
3635
3636         ret = ath10k_debug_create(ar);
3637         if (ret)
3638                 goto err_free_coredump;
3639
3640         return ar;
3641
3642 err_free_coredump:
3643         ath10k_coredump_destroy(ar);
3644 err_free_tx_complete:
3645         destroy_workqueue(ar->workqueue_tx_complete);
3646 err_free_aux_wq:
3647         destroy_workqueue(ar->workqueue_aux);
3648 err_free_wq:
3649         destroy_workqueue(ar->workqueue);
3650 err_free_mac:
3651         ath10k_mac_destroy(ar);
3652
3653         return NULL;
3654 }
3655 EXPORT_SYMBOL(ath10k_core_create);
3656
3657 void ath10k_core_destroy(struct ath10k *ar)
3658 {
3659         destroy_workqueue(ar->workqueue);
3660
3661         destroy_workqueue(ar->workqueue_aux);
3662
3663         destroy_workqueue(ar->workqueue_tx_complete);
3664
3665         ath10k_debug_destroy(ar);
3666         ath10k_coredump_destroy(ar);
3667         ath10k_htt_tx_destroy(&ar->htt);
3668         ath10k_wmi_free_host_mem(ar);
3669         ath10k_mac_destroy(ar);
3670 }
3671 EXPORT_SYMBOL(ath10k_core_destroy);
3672
3673 MODULE_AUTHOR("Qualcomm Atheros");
3674 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3675 MODULE_LICENSE("Dual BSD/GPL");