2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
24 * Bootloader Messaging Interface (BMI)
26 * BMI is a very simple messaging interface used during initialization
27 * to read memory, write memory, execute code, and to define an
28 * application entry PC.
30 * It is used to download an application to QCA988x, to provide
31 * patches to code that is already resident on QCA988x, and generally
32 * to examine and modify state. The Host has an opportunity to use
33 * BMI only once during bootup. Once the Host issues a BMI_DONE
34 * command, this opportunity ends.
36 * The Host writes BMI requests to mailbox0, and reads BMI responses
37 * from mailbox0. BMI requests all begin with a command
38 * (see below for specific commands), and are followed by
39 * command-specific data.
42 * The Host can only issue a command once the Target gives it a
43 * "BMI Command Credit", using AR8K Counter #4. As soon as the
44 * Target has completed a command, it issues another BMI Command
45 * Credit (so the Host can issue the next command).
47 * BMI handles all required Target-side cache flushing.
50 /* Maximum data size used for BMI transfers */
51 #define BMI_MAX_DATA_SIZE 256
53 /* len = cmd + addr + length */
54 #define BMI_MAX_CMDBUF_SIZE (BMI_MAX_DATA_SIZE + \
67 BMI_SET_APP_START = 5,
68 BMI_READ_SOC_REGISTER = 6,
69 BMI_READ_SOC_WORD = 6,
70 BMI_WRITE_SOC_REGISTER = 7,
71 BMI_WRITE_SOC_WORD = 7,
72 BMI_GET_TARGET_ID = 8,
73 BMI_GET_TARGET_INFO = 8,
74 BMI_ROMPATCH_INSTALL = 9,
75 BMI_ROMPATCH_UNINSTALL = 10,
76 BMI_ROMPATCH_ACTIVATE = 11,
77 BMI_ROMPATCH_DEACTIVATE = 12,
78 BMI_LZ_STREAM_START = 13, /* should be followed by LZ_DATA */
80 BMI_NVRAM_PROCESS = 15,
83 #define BMI_NVRAM_SEG_NAME_SZ 16
85 #define BMI_PARAM_GET_EEPROM_BOARD_ID 0x10
86 #define BMI_PARAM_GET_FLASH_BOARD_ID 0x8000
87 #define BMI_PARAM_FLASH_SECTION_ALL 0x10000
89 #define ATH10K_BMI_BOARD_ID_FROM_OTP_MASK 0x7c00
90 #define ATH10K_BMI_BOARD_ID_FROM_OTP_LSB 10
92 #define ATH10K_BMI_CHIP_ID_FROM_OTP_MASK 0x18000
93 #define ATH10K_BMI_CHIP_ID_FROM_OTP_LSB 15
95 #define ATH10K_BMI_BOARD_ID_STATUS_MASK 0xff
98 __le32 id; /* enum bmi_cmd_id */
129 __le32 ram_addr; /* or value */
131 __le32 activate; /* 0=install, but dont activate */
135 } rompatch_uninstall;
138 __le32 patch_ids[0]; /* length of @count */
142 __le32 patch_ids[0]; /* length of @count */
143 } rompatch_deactivate;
148 __le32 len; /* max BMI_MAX_DATA_SIZE */
149 u8 payload[0]; /* length of @len */
152 u8 name[BMI_NVRAM_SEG_NAME_SZ];
154 u8 payload[BMI_MAX_CMDBUF_SIZE];
178 } rompatch_uninstall;
180 /* 0 = nothing executed
181 * otherwise = NVRAM segment return value */
184 u8 payload[BMI_MAX_CMDBUF_SIZE];
187 struct bmi_target_info {
193 #define BMI_COMMUNICATION_TIMEOUT_HZ (2 * HZ)
195 #define BMI_CE_NUM_TO_TARG 0
196 #define BMI_CE_NUM_TO_HOST 1
198 void ath10k_bmi_start(struct ath10k *ar);
199 int ath10k_bmi_done(struct ath10k *ar);
200 int ath10k_bmi_get_target_info(struct ath10k *ar,
201 struct bmi_target_info *target_info);
202 int ath10k_bmi_read_memory(struct ath10k *ar, u32 address,
203 void *buffer, u32 length);
204 int ath10k_bmi_write_memory(struct ath10k *ar, u32 address,
205 const void *buffer, u32 length);
207 #define ath10k_bmi_read32(ar, item, val) \
213 addr = host_interest_item_address(HI_ITEM(item)); \
214 ret = ath10k_bmi_read_memory(ar, addr, (u8 *)&tmp, 4); \
216 *val = __le32_to_cpu(tmp); \
220 #define ath10k_bmi_write32(ar, item, val) \
224 __le32 v = __cpu_to_le32(val); \
226 address = host_interest_item_address(HI_ITEM(item)); \
227 ret = ath10k_bmi_write_memory(ar, address, \
228 (u8 *)&v, sizeof(v)); \
232 int ath10k_bmi_execute(struct ath10k *ar, u32 address, u32 param, u32 *result);
233 int ath10k_bmi_lz_stream_start(struct ath10k *ar, u32 address);
234 int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length);
235 int ath10k_bmi_fast_download(struct ath10k *ar, u32 address,
236 const void *buffer, u32 length);