drivers/net/vmxnet3/vmxnet3_drv.c

   1 /*
   2  * Linux driver for VMware's vmxnet3 ethernet NIC.
   3  *
   4  * Copyright (C) 2008-2016, VMware, Inc. All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License as published by the
   8  * Free Software Foundation; version 2 of the License and no later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  * NON INFRINGEMENT. See the GNU General Public License for more
  14  * details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * The full GNU General Public License is included in this distribution in
  21  * the file called "COPYING".
  22  *
  23  * Maintained by: pv-drivers@vmware.com
  24  *
  25  */
  26
  27 #include <linux/module.h>
  28 #include <net/ip6_checksum.h>
  29
  30 #include "vmxnet3_int.h"
  31
  32 char vmxnet3_driver_name[] = "vmxnet3";
  33 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
  34
  35 /*
  36  * PCI Device ID Table
  37  * Last entry must be all 0s
  38  */
  39 static const struct pci_device_id vmxnet3_pciid_table[] = {
  40         {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
  41         {0}
  42 };
  43
  44 MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
  45
  46 static int enable_mq = 1;
  47
  48 static void
  49 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac);
  50
  51 /*
  52  *    Enable/Disable the given intr
  53  */
  54 static void
  55 vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
  56 {
  57         VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
  58 }
  59
  60
  61 static void
  62 vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
  63 {
  64         VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
  65 }
  66
  67
  68 /*
  69  *    Enable/Disable all intrs used by the device
  70  */
  71 static void
  72 vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
  73 {
  74         int i;
  75
  76         for (i = 0; i < adapter->intr.num_intrs; i++)
  77                 vmxnet3_enable_intr(adapter, i);
  78         adapter->shared->devRead.intrConf.intrCtrl &=
  79                                         cpu_to_le32(~VMXNET3_IC_DISABLE_ALL);
  80 }
  81
  82
  83 static void
  84 vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
  85 {
  86         int i;
  87
  88         adapter->shared->devRead.intrConf.intrCtrl |=
  89                                         cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
  90         for (i = 0; i < adapter->intr.num_intrs; i++)
  91                 vmxnet3_disable_intr(adapter, i);
  92 }
  93
  94
  95 static void
  96 vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
  97 {
  98         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
  99 }
 100
 101
 102 static bool
 103 vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 104 {
 105         return tq->stopped;
 106 }
 107
 108
 109 static void
 110 vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 111 {
 112         tq->stopped = false;
 113         netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue);
 114 }
 115
 116
 117 static void
 118 vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 119 {
 120         tq->stopped = false;
 121         netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue));
 122 }
 123
 124
 125 static void
 126 vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 127 {
 128         tq->stopped = true;
 129         tq->num_stop++;
 130         netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue));
 131 }
 132
 133
 134 /*
 135  * Check the link state. This may start or stop the tx queue.
 136  */
 137 static void
 138 vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
 139 {
 140         u32 ret;
 141         int i;
 142         unsigned long flags;
 143
 144         spin_lock_irqsave(&adapter->cmd_lock, flags);
 145         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
 146         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
 147         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 148
 149         adapter->link_speed = ret >> 16;
 150         if (ret & 1) { /* Link is up. */
 151                 netdev_info(adapter->netdev, "NIC Link is Up %d Mbps\n",
 152                             adapter->link_speed);
 153                 netif_carrier_on(adapter->netdev);
 154
 155                 if (affectTxQueue) {
 156                         for (i = 0; i < adapter->num_tx_queues; i++)
 157                                 vmxnet3_tq_start(&adapter->tx_queue[i],
 158                                                  adapter);
 159                 }
 160         } else {
 161                 netdev_info(adapter->netdev, "NIC Link is Down\n");
 162                 netif_carrier_off(adapter->netdev);
 163
 164                 if (affectTxQueue) {
 165                         for (i = 0; i < adapter->num_tx_queues; i++)
 166                                 vmxnet3_tq_stop(&adapter->tx_queue[i], adapter);
 167                 }
 168         }
 169 }
 170
 171 static void
 172 vmxnet3_process_events(struct vmxnet3_adapter *adapter)
 173 {
 174         int i;
 175         unsigned long flags;
 176         u32 events = le32_to_cpu(adapter->shared->ecr);
 177         if (!events)
 178                 return;
 179
 180         vmxnet3_ack_events(adapter, events);
 181
 182         /* Check if link state has changed */
 183         if (events & VMXNET3_ECR_LINK)
 184                 vmxnet3_check_link(adapter, true);
 185
 186         /* Check if there is an error on xmit/recv queues */
 187         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
 188                 spin_lock_irqsave(&adapter->cmd_lock, flags);
 189                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
 190                                        VMXNET3_CMD_GET_QUEUE_STATUS);
 191                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 192
 193                 for (i = 0; i < adapter->num_tx_queues; i++)
 194                         if (adapter->tqd_start[i].status.stopped)
 195                                 dev_err(&adapter->netdev->dev,
 196                                         "%s: tq[%d] error 0x%x\n",
 197                                         adapter->netdev->name, i, le32_to_cpu(
 198                                         adapter->tqd_start[i].status.error));
 199                 for (i = 0; i < adapter->num_rx_queues; i++)
 200                         if (adapter->rqd_start[i].status.stopped)
 201                                 dev_err(&adapter->netdev->dev,
 202                                         "%s: rq[%d] error 0x%x\n",
 203                                         adapter->netdev->name, i,
 204                                         adapter->rqd_start[i].status.error);
 205
 206                 schedule_work(&adapter->work);
 207         }
 208 }
 209
 210 #ifdef __BIG_ENDIAN_BITFIELD
 211 /*
 212  * The device expects the bitfields in shared structures to be written in
 213  * little endian. When CPU is big endian, the following routines are used to
 214  * correctly read and write into ABI.
 215  * The general technique used here is : double word bitfields are defined in
 216  * opposite order for big endian architecture. Then before reading them in
 217  * driver the complete double word is translated using le32_to_cpu. Similarly
 218  * After the driver writes into bitfields, cpu_to_le32 is used to translate the
 219  * double words into required format.
 220  * In order to avoid touching bits in shared structure more than once, temporary
 221  * descriptors are used. These are passed as srcDesc to following functions.
 222  */
 223 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc,
 224                                 struct Vmxnet3_RxDesc *dstDesc)
 225 {
 226         u32 *src = (u32 *)srcDesc + 2;
 227         u32 *dst = (u32 *)dstDesc + 2;
 228         dstDesc->addr = le64_to_cpu(srcDesc->addr);
 229         *dst = le32_to_cpu(*src);
 230         dstDesc->ext1 = le32_to_cpu(srcDesc->ext1);
 231 }
 232
 233 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc,
 234                                struct Vmxnet3_TxDesc *dstDesc)
 235 {
 236         int i;
 237         u32 *src = (u32 *)(srcDesc + 1);
 238         u32 *dst = (u32 *)(dstDesc + 1);
 239
 240         /* Working backwards so that the gen bit is set at the end. */
 241         for (i = 2; i > 0; i--) {
 242                 src--;
 243                 dst--;
 244                 *dst = cpu_to_le32(*src);
 245         }
 246 }
 247
 248
 249 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc,
 250                                 struct Vmxnet3_RxCompDesc *dstDesc)
 251 {
 252         int i = 0;
 253         u32 *src = (u32 *)srcDesc;
 254         u32 *dst = (u32 *)dstDesc;
 255         for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) {
 256                 *dst = le32_to_cpu(*src);
 257                 src++;
 258                 dst++;
 259         }
 260 }
 261
 262
 263 /* Used to read bitfield values from double words. */
 264 static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size)
 265 {
 266         u32 temp = le32_to_cpu(*bitfield);
 267         u32 mask = ((1 << size) - 1) << pos;
 268         temp &= mask;
 269         temp >>= pos;
 270         return temp;
 271 }
 272
 273
 274
 275 #endif  /* __BIG_ENDIAN_BITFIELD */
 276
 277 #ifdef __BIG_ENDIAN_BITFIELD
 278
 279 #   define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
 280                         txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
 281                         VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
 282 #   define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
 283                         txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
 284                         VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
 285 #   define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
 286                         VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
 287                         VMXNET3_TCD_GEN_SIZE)
 288 #   define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
 289                         VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
 290 #   define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
 291                         (dstrcd) = (tmp); \
 292                         vmxnet3_RxCompToCPU((rcd), (tmp)); \
 293                 } while (0)
 294 #   define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
 295                         (dstrxd) = (tmp); \
 296                         vmxnet3_RxDescToCPU((rxd), (tmp)); \
 297                 } while (0)
 298
 299 #else
 300
 301 #   define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
 302 #   define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
 303 #   define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
 304 #   define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
 305 #   define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
 306 #   define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
 307
 308 #endif /* __BIG_ENDIAN_BITFIELD  */
 309
 310
 311 static void
 312 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
 313                      struct pci_dev *pdev)
 314 {
 315         if (tbi->map_type == VMXNET3_MAP_SINGLE)
 316                 dma_unmap_single(&pdev->dev, tbi->dma_addr, tbi->len,
 317                                  PCI_DMA_TODEVICE);
 318         else if (tbi->map_type == VMXNET3_MAP_PAGE)
 319                 dma_unmap_page(&pdev->dev, tbi->dma_addr, tbi->len,
 320                                PCI_DMA_TODEVICE);
 321         else
 322                 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
 323
 324         tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
 325 }
 326
 327
 328 static int
 329 vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
 330                   struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
 331 {
 332         struct sk_buff *skb;
 333         int entries = 0;
 334
 335         /* no out of order completion */
 336         BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
 337         BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1);
 338
 339         skb = tq->buf_info[eop_idx].skb;
 340         BUG_ON(skb == NULL);
 341         tq->buf_info[eop_idx].skb = NULL;
 342
 343         VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
 344
 345         while (tq->tx_ring.next2comp != eop_idx) {
 346                 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
 347                                      pdev);
 348
 349                 /* update next2comp w/o tx_lock. Since we are marking more,
 350                  * instead of less, tx ring entries avail, the worst case is
 351                  * that the tx routine incorrectly re-queues a pkt due to
 352                  * insufficient tx ring entries.
 353                  */
 354                 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
 355                 entries++;
 356         }
 357
 358         dev_kfree_skb_any(skb);
 359         return entries;
 360 }
 361
 362
 363 static int
 364 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
 365                         struct vmxnet3_adapter *adapter)
 366 {
 367         int completed = 0;
 368         union Vmxnet3_GenericDesc *gdesc;
 369
 370         gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
 371         while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) {
 372                 /* Prevent any &gdesc->tcd field from being (speculatively)
 373                  * read before (&gdesc->tcd)->gen is read.
 374                  */
 375                 dma_rmb();
 376
 377                 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
 378                                                &gdesc->tcd), tq, adapter->pdev,
 379                                                adapter);
 380
 381                 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
 382                 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
 383         }
 384
 385         if (completed) {
 386                 spin_lock(&tq->tx_lock);
 387                 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
 388                              vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
 389                              VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
 390                              netif_carrier_ok(adapter->netdev))) {
 391                         vmxnet3_tq_wake(tq, adapter);
 392                 }
 393                 spin_unlock(&tq->tx_lock);
 394         }
 395         return completed;
 396 }
 397
 398
 399 static void
 400 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
 401                    struct vmxnet3_adapter *adapter)
 402 {
 403         int i;
 404
 405         while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
 406                 struct vmxnet3_tx_buf_info *tbi;
 407
 408                 tbi = tq->buf_info + tq->tx_ring.next2comp;
 409
 410                 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
 411                 if (tbi->skb) {
 412                         dev_kfree_skb_any(tbi->skb);
 413                         tbi->skb = NULL;
 414                 }
 415                 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
 416         }
 417
 418         /* sanity check, verify all buffers are indeed unmapped and freed */
 419         for (i = 0; i < tq->tx_ring.size; i++) {
 420                 BUG_ON(tq->buf_info[i].skb != NULL ||
 421                        tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
 422         }
 423
 424         tq->tx_ring.gen = VMXNET3_INIT_GEN;
 425         tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
 426
 427         tq->comp_ring.gen = VMXNET3_INIT_GEN;
 428         tq->comp_ring.next2proc = 0;
 429 }
 430
 431
 432 static void
 433 vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
 434                    struct vmxnet3_adapter *adapter)
 435 {
 436         if (tq->tx_ring.base) {
 437                 dma_free_coherent(&adapter->pdev->dev, tq->tx_ring.size *
 438                                   sizeof(struct Vmxnet3_TxDesc),
 439                                   tq->tx_ring.base, tq->tx_ring.basePA);
 440                 tq->tx_ring.base = NULL;
 441         }
 442         if (tq->data_ring.base) {
 443                 dma_free_coherent(&adapter->pdev->dev,
 444                                   tq->data_ring.size * tq->txdata_desc_size,
 445                                   tq->data_ring.base, tq->data_ring.basePA);
 446                 tq->data_ring.base = NULL;
 447         }
 448         if (tq->comp_ring.base) {
 449                 dma_free_coherent(&adapter->pdev->dev, tq->comp_ring.size *
 450                                   sizeof(struct Vmxnet3_TxCompDesc),
 451                                   tq->comp_ring.base, tq->comp_ring.basePA);
 452                 tq->comp_ring.base = NULL;
 453         }
 454         if (tq->buf_info) {
 455                 dma_free_coherent(&adapter->pdev->dev,
 456                                   tq->tx_ring.size * sizeof(tq->buf_info[0]),
 457                                   tq->buf_info, tq->buf_info_pa);
 458                 tq->buf_info = NULL;
 459         }
 460 }
 461
 462
 463 /* Destroy all tx queues */
 464 void
 465 vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter)
 466 {
 467         int i;
 468
 469         for (i = 0; i < adapter->num_tx_queues; i++)
 470                 vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter);
 471 }
 472
 473
 474 static void
 475 vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
 476                 struct vmxnet3_adapter *adapter)
 477 {
 478         int i;
 479
 480         /* reset the tx ring contents to 0 and reset the tx ring states */
 481         memset(tq->tx_ring.base, 0, tq->tx_ring.size *
 482                sizeof(struct Vmxnet3_TxDesc));
 483         tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
 484         tq->tx_ring.gen = VMXNET3_INIT_GEN;
 485
 486         memset(tq->data_ring.base, 0,
 487                tq->data_ring.size * tq->txdata_desc_size);
 488
 489         /* reset the tx comp ring contents to 0 and reset comp ring states */
 490         memset(tq->comp_ring.base, 0, tq->comp_ring.size *
 491                sizeof(struct Vmxnet3_TxCompDesc));
 492         tq->comp_ring.next2proc = 0;
 493         tq->comp_ring.gen = VMXNET3_INIT_GEN;
 494
 495         /* reset the bookkeeping data */
 496         memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
 497         for (i = 0; i < tq->tx_ring.size; i++)
 498                 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
 499
 500         /* stats are not reset */
 501 }
 502
 503
 504 static int
 505 vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
 506                   struct vmxnet3_adapter *adapter)
 507 {
 508         size_t sz;
 509
 510         BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
 511                tq->comp_ring.base || tq->buf_info);
 512
 513         tq->tx_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
 514                         tq->tx_ring.size * sizeof(struct Vmxnet3_TxDesc),
 515                         &tq->tx_ring.basePA, GFP_KERNEL);
 516         if (!tq->tx_ring.base) {
 517                 netdev_err(adapter->netdev, "failed to allocate tx ring\n");
 518                 goto err;
 519         }
 520
 521         tq->data_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
 522                         tq->data_ring.size * tq->txdata_desc_size,
 523                         &tq->data_ring.basePA, GFP_KERNEL);
 524         if (!tq->data_ring.base) {
 525                 netdev_err(adapter->netdev, "failed to allocate tx data ring\n");
 526                 goto err;
 527         }
 528
 529         tq->comp_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
 530                         tq->comp_ring.size * sizeof(struct Vmxnet3_TxCompDesc),
 531                         &tq->comp_ring.basePA, GFP_KERNEL);
 532         if (!tq->comp_ring.base) {
 533                 netdev_err(adapter->netdev, "failed to allocate tx comp ring\n");
 534                 goto err;
 535         }
 536
 537         sz = tq->tx_ring.size * sizeof(tq->buf_info[0]);
 538         tq->buf_info = dma_zalloc_coherent(&adapter->pdev->dev, sz,
 539                                            &tq->buf_info_pa, GFP_KERNEL);
 540         if (!tq->buf_info)
 541                 goto err;
 542
 543         return 0;
 544
 545 err:
 546         vmxnet3_tq_destroy(tq, adapter);
 547         return -ENOMEM;
 548 }
 549
 550 static void
 551 vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter)
 552 {
 553         int i;
 554
 555         for (i = 0; i < adapter->num_tx_queues; i++)
 556                 vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter);
 557 }
 558
 559 /*
 560  *    starting from ring->next2fill, allocate rx buffers for the given ring
 561  *    of the rx queue and update the rx desc. stop after @num_to_alloc buffers
 562  *    are allocated or allocation fails
 563  */
 564
 565 static int
 566 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
 567                         int num_to_alloc, struct vmxnet3_adapter *adapter)
 568 {
 569         int num_allocated = 0;
 570         struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
 571         struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
 572         u32 val;
 573
 574         while (num_allocated <= num_to_alloc) {
 575                 struct vmxnet3_rx_buf_info *rbi;
 576                 union Vmxnet3_GenericDesc *gd;
 577
 578                 rbi = rbi_base + ring->next2fill;
 579                 gd = ring->base + ring->next2fill;
 580
 581                 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
 582                         if (rbi->skb == NULL) {
 583                                 rbi->skb = __netdev_alloc_skb_ip_align(adapter->netdev,
 584                                                                        rbi->len,
 585                                                                        GFP_KERNEL);
 586                                 if (unlikely(rbi->skb == NULL)) {
 587                                         rq->stats.rx_buf_alloc_failure++;
 588                                         break;
 589                                 }
 590
 591                                 rbi->dma_addr = dma_map_single(
 592                                                 &adapter->pdev->dev,
 593                                                 rbi->skb->data, rbi->len,
 594                                                 PCI_DMA_FROMDEVICE);
 595                                 if (dma_mapping_error(&adapter->pdev->dev,
 596                                                       rbi->dma_addr)) {
 597                                         dev_kfree_skb_any(rbi->skb);
 598                                         rbi->skb = NULL;
 599                                         rq->stats.rx_buf_alloc_failure++;
 600                                         break;
 601                                 }
 602                         } else {
 603                                 /* rx buffer skipped by the device */
 604                         }
 605                         val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
 606                 } else {
 607                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
 608                                rbi->len  != PAGE_SIZE);
 609
 610                         if (rbi->page == NULL) {
 611                                 rbi->page = alloc_page(GFP_ATOMIC);
 612                                 if (unlikely(rbi->page == NULL)) {
 613                                         rq->stats.rx_buf_alloc_failure++;
 614                                         break;
 615                                 }
 616                                 rbi->dma_addr = dma_map_page(
 617                                                 &adapter->pdev->dev,
 618                                                 rbi->page, 0, PAGE_SIZE,
 619                                                 PCI_DMA_FROMDEVICE);
 620                                 if (dma_mapping_error(&adapter->pdev->dev,
 621                                                       rbi->dma_addr)) {
 622                                         put_page(rbi->page);
 623                                         rbi->page = NULL;
 624                                         rq->stats.rx_buf_alloc_failure++;
 625                                         break;
 626                                 }
 627                         } else {
 628                                 /* rx buffers skipped by the device */
 629                         }
 630                         val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
 631                 }
 632
 633                 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
 634                 gd->dword[2] = cpu_to_le32((!ring->gen << VMXNET3_RXD_GEN_SHIFT)
 635                                            | val | rbi->len);
 636
 637                 /* Fill the last buffer but dont mark it ready, or else the
 638                  * device will think that the queue is full */
 639                 if (num_allocated == num_to_alloc)
 640                         break;
 641
 642                 gd->dword[2] |= cpu_to_le32(ring->gen << VMXNET3_RXD_GEN_SHIFT);
 643                 num_allocated++;
 644                 vmxnet3_cmd_ring_adv_next2fill(ring);
 645         }
 646
 647         netdev_dbg(adapter->netdev,
 648                 "alloc_rx_buf: %d allocated, next2fill %u, next2comp %u\n",
 649                 num_allocated, ring->next2fill, ring->next2comp);
 650
 651         /* so that the device can distinguish a full ring and an empty ring */
 652         BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
 653
 654         return num_allocated;
 655 }
 656
 657
 658 static void
 659 vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
 660                     struct vmxnet3_rx_buf_info *rbi)
 661 {
 662         struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
 663                 skb_shinfo(skb)->nr_frags;
 664
 665         BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
 666
 667         __skb_frag_set_page(frag, rbi->page);
 668         frag->page_offset = 0;
 669         skb_frag_size_set(frag, rcd->len);
 670         skb->data_len += rcd->len;
 671         skb->truesize += PAGE_SIZE;
 672         skb_shinfo(skb)->nr_frags++;
 673 }
 674
 675
 676 static int
 677 vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
 678                 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
 679                 struct vmxnet3_adapter *adapter)
 680 {
 681         u32 dw2, len;
 682         unsigned long buf_offset;
 683         int i;
 684         union Vmxnet3_GenericDesc *gdesc;
 685         struct vmxnet3_tx_buf_info *tbi = NULL;
 686
 687         BUG_ON(ctx->copy_size > skb_headlen(skb));
 688
 689         /* use the previous gen bit for the SOP desc */
 690         dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
 691
 692         ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
 693         gdesc = ctx->sop_txd; /* both loops below can be skipped */
 694
 695         /* no need to map the buffer if headers are copied */
 696         if (ctx->copy_size) {
 697                 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA +
 698                                         tq->tx_ring.next2fill *
 699                                         tq->txdata_desc_size);
 700                 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size);
 701                 ctx->sop_txd->dword[3] = 0;
 702
 703                 tbi = tq->buf_info + tq->tx_ring.next2fill;
 704                 tbi->map_type = VMXNET3_MAP_NONE;
 705
 706                 netdev_dbg(adapter->netdev,
 707                         "txd[%u]: 0x%Lx 0x%x 0x%x\n",
 708                         tq->tx_ring.next2fill,
 709                         le64_to_cpu(ctx->sop_txd->txd.addr),
 710                         ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
 711                 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
 712
 713                 /* use the right gen for non-SOP desc */
 714                 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 715         }
 716
 717         /* linear part can use multiple tx desc if it's big */
 718         len = skb_headlen(skb) - ctx->copy_size;
 719         buf_offset = ctx->copy_size;
 720         while (len) {
 721                 u32 buf_size;
 722
 723                 if (len < VMXNET3_MAX_TX_BUF_SIZE) {
 724                         buf_size = len;
 725                         dw2 |= len;
 726                 } else {
 727                         buf_size = VMXNET3_MAX_TX_BUF_SIZE;
 728                         /* spec says that for TxDesc.len, 0 == 2^14 */
 729                 }
 730
 731                 tbi = tq->buf_info + tq->tx_ring.next2fill;
 732                 tbi->map_type = VMXNET3_MAP_SINGLE;
 733                 tbi->dma_addr = dma_map_single(&adapter->pdev->dev,
 734                                 skb->data + buf_offset, buf_size,
 735                                 PCI_DMA_TODEVICE);
 736                 if (dma_mapping_error(&adapter->pdev->dev, tbi->dma_addr))
 737                         return -EFAULT;
 738
 739                 tbi->len = buf_size;
 740
 741                 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
 742                 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
 743
 744                 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
 745                 gdesc->dword[2] = cpu_to_le32(dw2);
 746                 gdesc->dword[3] = 0;
 747
 748                 netdev_dbg(adapter->netdev,
 749                         "txd[%u]: 0x%Lx 0x%x 0x%x\n",
 750                         tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
 751                         le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
 752                 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
 753                 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 754
 755                 len -= buf_size;
 756                 buf_offset += buf_size;
 757         }
 758
 759         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
 760                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
 761                 u32 buf_size;
 762
 763                 buf_offset = 0;
 764                 len = skb_frag_size(frag);
 765                 while (len) {
 766                         tbi = tq->buf_info + tq->tx_ring.next2fill;
 767                         if (len < VMXNET3_MAX_TX_BUF_SIZE) {
 768                                 buf_size = len;
 769                                 dw2 |= len;
 770                         } else {
 771                                 buf_size = VMXNET3_MAX_TX_BUF_SIZE;
 772                                 /* spec says that for TxDesc.len, 0 == 2^14 */
 773                         }
 774                         tbi->map_type = VMXNET3_MAP_PAGE;
 775                         tbi->dma_addr = skb_frag_dma_map(&adapter->pdev->dev, frag,
 776                                                          buf_offset, buf_size,
 777                                                          DMA_TO_DEVICE);
 778                         if (dma_mapping_error(&adapter->pdev->dev, tbi->dma_addr))
 779                                 return -EFAULT;
 780
 781                         tbi->len = buf_size;
 782
 783                         gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
 784                         BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
 785
 786                         gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
 787                         gdesc->dword[2] = cpu_to_le32(dw2);
 788                         gdesc->dword[3] = 0;
 789
 790                         netdev_dbg(adapter->netdev,
 791                                 "txd[%u]: 0x%llx %u %u\n",
 792                                 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
 793                                 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
 794                         vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
 795                         dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 796
 797                         len -= buf_size;
 798                         buf_offset += buf_size;
 799                 }
 800         }
 801
 802         ctx->eop_txd = gdesc;
 803
 804         /* set the last buf_info for the pkt */
 805         tbi->skb = skb;
 806         tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
 807
 808         return 0;
 809 }
 810
 811
 812 /* Init all tx queues */
 813 static void
 814 vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter)
 815 {
 816         int i;
 817
 818         for (i = 0; i < adapter->num_tx_queues; i++)
 819                 vmxnet3_tq_init(&adapter->tx_queue[i], adapter);
 820 }
 821
 822
 823 /*
 824  *    parse relevant protocol headers:
 825  *      For a tso pkt, relevant headers are L2/3/4 including options
 826  *      For a pkt requesting csum offloading, they are L2/3 and may include L4
 827  *      if it's a TCP/UDP pkt
 828  *
 829  * Returns:
 830  *    -1:  error happens during parsing
 831  *     0:  protocol headers parsed, but too big to be copied
 832  *     1:  protocol headers parsed and copied
 833  *
 834  * Other effects:
 835  *    1. related *ctx fields are updated.
 836  *    2. ctx->copy_size is # of bytes copied
 837  *    3. the portion to be copied is guaranteed to be in the linear part
 838  *
 839  */
 840 static int
 841 vmxnet3_parse_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
 842                   struct vmxnet3_tx_ctx *ctx,
 843                   struct vmxnet3_adapter *adapter)
 844 {
 845         u8 protocol = 0;
 846
 847         if (ctx->mss) { /* TSO */
 848                 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
 849                 ctx->l4_hdr_size = tcp_hdrlen(skb);
 850                 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
 851         } else {
 852                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
 853                         ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb);
 854
 855                         if (ctx->ipv4) {
 856                                 const struct iphdr *iph = ip_hdr(skb);
 857
 858                                 protocol = iph->protocol;
 859                         } else if (ctx->ipv6) {
 860                                 const struct ipv6hdr *ipv6h = ipv6_hdr(skb);
 861
 862                                 protocol = ipv6h->nexthdr;
 863                         }
 864
 865                         switch (protocol) {
 866                         case IPPROTO_TCP:
 867                                 ctx->l4_hdr_size = tcp_hdrlen(skb);
 868                                 break;
 869                         case IPPROTO_UDP:
 870                                 ctx->l4_hdr_size = sizeof(struct udphdr);
 871                                 break;
 872                         default:
 873                                 ctx->l4_hdr_size = 0;
 874                                 break;
 875                         }
 876
 877                         ctx->copy_size = min(ctx->eth_ip_hdr_size +
 878                                          ctx->l4_hdr_size, skb->len);
 879                 } else {
 880                         ctx->eth_ip_hdr_size = 0;
 881                         ctx->l4_hdr_size = 0;
 882                         /* copy as much as allowed */
 883                         ctx->copy_size = min_t(unsigned int,
 884                                                tq->txdata_desc_size,
 885                                                skb_headlen(skb));
 886                 }
 887
 888                 if (skb->len <= VMXNET3_HDR_COPY_SIZE)
 889                         ctx->copy_size = skb->len;
 890
 891                 /* make sure headers are accessible directly */
 892                 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
 893                         goto err;
 894         }
 895
 896         if (unlikely(ctx->copy_size > tq->txdata_desc_size)) {
 897                 tq->stats.oversized_hdr++;
 898                 ctx->copy_size = 0;
 899                 return 0;
 900         }
 901
 902         return 1;
 903 err:
 904         return -1;
 905 }
 906
 907 /*
 908  *    copy relevant protocol headers to the transmit ring:
 909  *      For a tso pkt, relevant headers are L2/3/4 including options
 910  *      For a pkt requesting csum offloading, they are L2/3 and may include L4
 911  *      if it's a TCP/UDP pkt
 912  *
 913  *
 914  *    Note that this requires that vmxnet3_parse_hdr be called first to set the
 915  *      appropriate bits in ctx first
 916  */
 917 static void
 918 vmxnet3_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
 919                  struct vmxnet3_tx_ctx *ctx,
 920                  struct vmxnet3_adapter *adapter)
 921 {
 922         struct Vmxnet3_TxDataDesc *tdd;
 923
 924         tdd = (struct Vmxnet3_TxDataDesc *)((u8 *)tq->data_ring.base +
 925                                             tq->tx_ring.next2fill *
 926                                             tq->txdata_desc_size);
 927
 928         memcpy(tdd->data, skb->data, ctx->copy_size);
 929         netdev_dbg(adapter->netdev,
 930                 "copy %u bytes to dataRing[%u]\n",
 931                 ctx->copy_size, tq->tx_ring.next2fill);
 932 }
 933
 934
 935 static void
 936 vmxnet3_prepare_tso(struct sk_buff *skb,
 937                     struct vmxnet3_tx_ctx *ctx)
 938 {
 939         struct tcphdr *tcph = tcp_hdr(skb);
 940
 941         if (ctx->ipv4) {
 942                 struct iphdr *iph = ip_hdr(skb);
 943
 944                 iph->check = 0;
 945                 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
 946                                                  IPPROTO_TCP, 0);
 947         } else if (ctx->ipv6) {
 948                 struct ipv6hdr *iph = ipv6_hdr(skb);
 949
 950                 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
 951                                                IPPROTO_TCP, 0);
 952         }
 953 }
 954
 955 static int txd_estimate(const struct sk_buff *skb)
 956 {
 957         int count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
 958         int i;
 959
 960         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
 961                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
 962
 963                 count += VMXNET3_TXD_NEEDED(skb_frag_size(frag));
 964         }
 965         return count;
 966 }
 967
 968 /*
 969  * Transmits a pkt thru a given tq
 970  * Returns:
 971  *    NETDEV_TX_OK:      descriptors are setup successfully
 972  *    NETDEV_TX_OK:      error occurred, the pkt is dropped
 973  *    NETDEV_TX_BUSY:    tx ring is full, queue is stopped
 974  *
 975  * Side-effects:
 976  *    1. tx ring may be changed
 977  *    2. tq stats may be updated accordingly
 978  *    3. shared->txNumDeferred may be updated
 979  */
 980
 981 static int
 982 vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
 983                 struct vmxnet3_adapter *adapter, struct net_device *netdev)
 984 {
 985         int ret;
 986         u32 count;
 987         unsigned long flags;
 988         struct vmxnet3_tx_ctx ctx;
 989         union Vmxnet3_GenericDesc *gdesc;
 990 #ifdef __BIG_ENDIAN_BITFIELD
 991         /* Use temporary descriptor to avoid touching bits multiple times */
 992         union Vmxnet3_GenericDesc tempTxDesc;
 993 #endif
 994
 995         count = txd_estimate(skb);
 996
 997         ctx.ipv4 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IP));
 998         ctx.ipv6 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IPV6));
 999
1000         ctx.mss = skb_shinfo(skb)->gso_size;
1001         if (ctx.mss) {
1002                 if (skb_header_cloned(skb)) {
1003                         if (unlikely(pskb_expand_head(skb, 0, 0,
1004                                                       GFP_ATOMIC) != 0)) {
1005                                 tq->stats.drop_tso++;
1006                                 goto drop_pkt;
1007                         }
1008                         tq->stats.copy_skb_header++;
1009                 }
1010                 vmxnet3_prepare_tso(skb, &ctx);
1011         } else {
1012                 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
1013
1014                         /* non-tso pkts must not use more than
1015                          * VMXNET3_MAX_TXD_PER_PKT entries
1016                          */
1017                         if (skb_linearize(skb) != 0) {
1018                                 tq->stats.drop_too_many_frags++;
1019                                 goto drop_pkt;
1020                         }
1021                         tq->stats.linearized++;
1022
1023                         /* recalculate the # of descriptors to use */
1024                         count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
1025                 }
1026         }
1027
1028         ret = vmxnet3_parse_hdr(skb, tq, &ctx, adapter);
1029         if (ret >= 0) {
1030                 BUG_ON(ret <= 0 && ctx.copy_size != 0);
1031                 /* hdrs parsed, check against other limits */
1032                 if (ctx.mss) {
1033                         if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
1034                                      VMXNET3_MAX_TX_BUF_SIZE)) {
1035                                 tq->stats.drop_oversized_hdr++;
1036                                 goto drop_pkt;
1037                         }
1038                 } else {
1039                         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1040                                 if (unlikely(ctx.eth_ip_hdr_size +
1041                                              skb->csum_offset >
1042                                              VMXNET3_MAX_CSUM_OFFSET)) {
1043                                         tq->stats.drop_oversized_hdr++;
1044                                         goto drop_pkt;
1045                                 }
1046                         }
1047                 }
1048         } else {
1049                 tq->stats.drop_hdr_inspect_err++;
1050                 goto drop_pkt;
1051         }
1052
1053         spin_lock_irqsave(&tq->tx_lock, flags);
1054
1055         if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
1056                 tq->stats.tx_ring_full++;
1057                 netdev_dbg(adapter->netdev,
1058                         "tx queue stopped on %s, next2comp %u"
1059                         " next2fill %u\n", adapter->netdev->name,
1060                         tq->tx_ring.next2comp, tq->tx_ring.next2fill);
1061
1062                 vmxnet3_tq_stop(tq, adapter);
1063                 spin_unlock_irqrestore(&tq->tx_lock, flags);
1064                 return NETDEV_TX_BUSY;
1065         }
1066
1067
1068         vmxnet3_copy_hdr(skb, tq, &ctx, adapter);
1069
1070         /* fill tx descs related to addr & len */
1071         if (vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter))
1072                 goto unlock_drop_pkt;
1073
1074         /* setup the EOP desc */
1075         ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP);
1076
1077         /* setup the SOP desc */
1078 #ifdef __BIG_ENDIAN_BITFIELD
1079         gdesc = &tempTxDesc;
1080         gdesc->dword[2] = ctx.sop_txd->dword[2];
1081         gdesc->dword[3] = ctx.sop_txd->dword[3];
1082 #else
1083         gdesc = ctx.sop_txd;
1084 #endif
1085         if (ctx.mss) {
1086                 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
1087                 gdesc->txd.om = VMXNET3_OM_TSO;
1088                 gdesc->txd.msscof = ctx.mss;
1089                 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len -
1090                              gdesc->txd.hlen + ctx.mss - 1) / ctx.mss);
1091         } else {
1092                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1093                         gdesc->txd.hlen = ctx.eth_ip_hdr_size;
1094                         gdesc->txd.om = VMXNET3_OM_CSUM;
1095                         gdesc->txd.msscof = ctx.eth_ip_hdr_size +
1096                                             skb->csum_offset;
1097                 } else {
1098                         gdesc->txd.om = 0;
1099                         gdesc->txd.msscof = 0;
1100                 }
1101                 le32_add_cpu(&tq->shared->txNumDeferred, 1);
1102         }
1103
1104         if (skb_vlan_tag_present(skb)) {
1105                 gdesc->txd.ti = 1;
1106                 gdesc->txd.tci = skb_vlan_tag_get(skb);
1107         }
1108
1109         /* Ensure that the write to (&gdesc->txd)->gen will be observed after
1110          * all other writes to &gdesc->txd.
1111          */
1112         dma_wmb();
1113
1114         /* finally flips the GEN bit of the SOP desc. */
1115         gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^
1116                                                   VMXNET3_TXD_GEN);
1117 #ifdef __BIG_ENDIAN_BITFIELD
1118         /* Finished updating in bitfields of Tx Desc, so write them in original
1119          * place.
1120          */
1121         vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc,
1122                            (struct Vmxnet3_TxDesc *)ctx.sop_txd);
1123         gdesc = ctx.sop_txd;
1124 #endif
1125         netdev_dbg(adapter->netdev,
1126                 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
1127                 (u32)(ctx.sop_txd -
1128                 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr),
1129                 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3]));
1130
1131         spin_unlock_irqrestore(&tq->tx_lock, flags);
1132
1133         if (le32_to_cpu(tq->shared->txNumDeferred) >=
1134                                         le32_to_cpu(tq->shared->txThreshold)) {
1135                 tq->shared->txNumDeferred = 0;
1136                 VMXNET3_WRITE_BAR0_REG(adapter,
1137                                        VMXNET3_REG_TXPROD + tq->qid * 8,
1138                                        tq->tx_ring.next2fill);
1139         }
1140
1141         return NETDEV_TX_OK;
1142
1143 unlock_drop_pkt:
1144         spin_unlock_irqrestore(&tq->tx_lock, flags);
1145 drop_pkt:
1146         tq->stats.drop_total++;
1147         dev_kfree_skb_any(skb);
1148         return NETDEV_TX_OK;
1149 }
1150
1151
1152 static netdev_tx_t
1153 vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1154 {
1155         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1156
1157         BUG_ON(skb->queue_mapping > adapter->num_tx_queues);
1158         return vmxnet3_tq_xmit(skb,
1159                                &adapter->tx_queue[skb->queue_mapping],
1160                                adapter, netdev);
1161 }
1162
1163
1164 static void
1165 vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
1166                 struct sk_buff *skb,
1167                 union Vmxnet3_GenericDesc *gdesc)
1168 {
1169         if (!gdesc->rcd.cnc && adapter->netdev->features & NETIF_F_RXCSUM) {
1170                 if (gdesc->rcd.v4 &&
1171                     (le32_to_cpu(gdesc->dword[3]) &
1172                      VMXNET3_RCD_CSUM_OK) == VMXNET3_RCD_CSUM_OK) {
1173                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1174                         BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1175                         BUG_ON(gdesc->rcd.frg);
1176                 } else if (gdesc->rcd.v6 && (le32_to_cpu(gdesc->dword[3]) &
1177                                              (1 << VMXNET3_RCD_TUC_SHIFT))) {
1178                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1179                         BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1180                         BUG_ON(gdesc->rcd.frg);
1181                 } else {
1182                         if (gdesc->rcd.csum) {
1183                                 skb->csum = htons(gdesc->rcd.csum);
1184                                 skb->ip_summed = CHECKSUM_PARTIAL;
1185                         } else {
1186                                 skb_checksum_none_assert(skb);
1187                         }
1188                 }
1189         } else {
1190                 skb_checksum_none_assert(skb);
1191         }
1192 }
1193
1194
1195 static void
1196 vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
1197                  struct vmxnet3_rx_ctx *ctx,  struct vmxnet3_adapter *adapter)
1198 {
1199         rq->stats.drop_err++;
1200         if (!rcd->fcs)
1201                 rq->stats.drop_fcs++;
1202
1203         rq->stats.drop_total++;
1204
1205         /*
1206          * We do not unmap and chain the rx buffer to the skb.
1207          * We basically pretend this buffer is not used and will be recycled
1208          * by vmxnet3_rq_alloc_rx_buf()
1209          */
1210
1211         /*
1212          * ctx->skb may be NULL if this is the first and the only one
1213          * desc for the pkt
1214          */
1215         if (ctx->skb)
1216                 dev_kfree_skb_irq(ctx->skb);
1217
1218         ctx->skb = NULL;
1219 }
1220
1221
1222 static u32
1223 vmxnet3_get_hdr_len(struct vmxnet3_adapter *adapter, struct sk_buff *skb,
1224                     union Vmxnet3_GenericDesc *gdesc)
1225 {
1226         u32 hlen, maplen;
1227         union {
1228                 void *ptr;
1229                 struct ethhdr *eth;
1230                 struct iphdr *ipv4;
1231                 struct ipv6hdr *ipv6;
1232                 struct tcphdr *tcp;
1233         } hdr;
1234         BUG_ON(gdesc->rcd.tcp == 0);
1235
1236         maplen = skb_headlen(skb);
1237         if (unlikely(sizeof(struct iphdr) + sizeof(struct tcphdr) > maplen))
1238                 return 0;
1239
1240         hdr.eth = eth_hdr(skb);
1241         if (gdesc->rcd.v4) {
1242                 BUG_ON(hdr.eth->h_proto != htons(ETH_P_IP));
1243                 hdr.ptr += sizeof(struct ethhdr);
1244                 BUG_ON(hdr.ipv4->protocol != IPPROTO_TCP);
1245                 hlen = hdr.ipv4->ihl << 2;
1246                 hdr.ptr += hdr.ipv4->ihl << 2;
1247         } else if (gdesc->rcd.v6) {
1248                 BUG_ON(hdr.eth->h_proto != htons(ETH_P_IPV6));
1249                 hdr.ptr += sizeof(struct ethhdr);
1250                 /* Use an estimated value, since we also need to handle
1251                  * TSO case.
1252                  */
1253                 if (hdr.ipv6->nexthdr != IPPROTO_TCP)
1254                         return sizeof(struct ipv6hdr) + sizeof(struct tcphdr);
1255                 hlen = sizeof(struct ipv6hdr);
1256                 hdr.ptr += sizeof(struct ipv6hdr);
1257         } else {
1258                 /* Non-IP pkt, dont estimate header length */
1259                 return 0;
1260         }
1261
1262         if (hlen + sizeof(struct tcphdr) > maplen)
1263                 return 0;
1264
1265         return (hlen + (hdr.tcp->doff << 2));
1266 }
1267
1268 static int
1269 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1270                        struct vmxnet3_adapter *adapter, int quota)
1271 {
1272         static const u32 rxprod_reg[2] = {
1273                 VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2
1274         };
1275         u32 num_pkts = 0;
1276         bool skip_page_frags = false;
1277         struct Vmxnet3_RxCompDesc *rcd;
1278         struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
1279         u16 segCnt = 0, mss = 0;
1280 #ifdef __BIG_ENDIAN_BITFIELD
1281         struct Vmxnet3_RxDesc rxCmdDesc;
1282         struct Vmxnet3_RxCompDesc rxComp;
1283 #endif
1284         vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd,
1285                           &rxComp);
1286         while (rcd->gen == rq->comp_ring.gen) {
1287                 struct vmxnet3_rx_buf_info *rbi;
1288                 struct sk_buff *skb, *new_skb = NULL;
1289                 struct page *new_page = NULL;
1290                 dma_addr_t new_dma_addr;
1291                 int num_to_alloc;
1292                 struct Vmxnet3_RxDesc *rxd;
1293                 u32 idx, ring_idx;
1294                 struct vmxnet3_cmd_ring *ring = NULL;
1295                 if (num_pkts >= quota) {
1296                         /* we may stop even before we see the EOP desc of
1297                          * the current pkt
1298                          */
1299                         break;
1300                 }
1301
1302                 /* Prevent any rcd field from being (speculatively) read before
1303                  * rcd->gen is read.
1304                  */
1305                 dma_rmb();
1306
1307                 BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2 &&
1308                        rcd->rqID != rq->dataRingQid);
1309                 idx = rcd->rxdIdx;
1310                 ring_idx = VMXNET3_GET_RING_IDX(adapter, rcd->rqID);
1311                 ring = rq->rx_ring + ring_idx;
1312                 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1313                                   &rxCmdDesc);
1314                 rbi = rq->buf_info[ring_idx] + idx;
1315
1316                 BUG_ON(rxd->addr != rbi->dma_addr ||
1317                        rxd->len != rbi->len);
1318
1319                 if (unlikely(rcd->eop && rcd->err)) {
1320                         vmxnet3_rx_error(rq, rcd, ctx, adapter);
1321                         goto rcd_done;
1322                 }
1323
1324                 if (rcd->sop) { /* first buf of the pkt */
1325                         bool rxDataRingUsed;
1326                         u16 len;
1327
1328                         BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
1329                                (rcd->rqID != rq->qid &&
1330                                 rcd->rqID != rq->dataRingQid));
1331
1332                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
1333                         BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
1334
1335                         if (unlikely(rcd->len == 0)) {
1336                                 /* Pretend the rx buffer is skipped. */
1337                                 BUG_ON(!(rcd->sop && rcd->eop));
1338                                 netdev_dbg(adapter->netdev,
1339                                         "rxRing[%u][%u] 0 length\n",
1340                                         ring_idx, idx);
1341                                 goto rcd_done;
1342                         }
1343
1344                         skip_page_frags = false;
1345                         ctx->skb = rbi->skb;
1346
1347                         rxDataRingUsed =
1348                                 VMXNET3_RX_DATA_RING(adapter, rcd->rqID);
1349                         len = rxDataRingUsed ? rcd->len : rbi->len;
1350                         new_skb = netdev_alloc_skb_ip_align(adapter->netdev,
1351                                                             len);
1352                         if (new_skb == NULL) {
1353                                 /* Skb allocation failed, do not handover this
1354                                  * skb to stack. Reuse it. Drop the existing pkt
1355                                  */
1356                                 rq->stats.rx_buf_alloc_failure++;
1357                                 ctx->skb = NULL;
1358                                 rq->stats.drop_total++;
1359                                 skip_page_frags = true;
1360                                 goto rcd_done;
1361                         }
1362
1363                         if (rxDataRingUsed) {
1364                                 size_t sz;
1365
1366                                 BUG_ON(rcd->len > rq->data_ring.desc_size);
1367
1368                                 ctx->skb = new_skb;
1369                                 sz = rcd->rxdIdx * rq->data_ring.desc_size;
1370                                 memcpy(new_skb->data,
1371                                        &rq->data_ring.base[sz], rcd->len);
1372                         } else {
1373                                 ctx->skb = rbi->skb;
1374
1375                                 new_dma_addr =
1376                                         dma_map_single(&adapter->pdev->dev,
1377                                                        new_skb->data, rbi->len,
1378                                                        PCI_DMA_FROMDEVICE);
1379                                 if (dma_mapping_error(&adapter->pdev->dev,
1380                                                       new_dma_addr)) {
1381                                         dev_kfree_skb(new_skb);
1382                                         /* Skb allocation failed, do not
1383                                          * handover this skb to stack. Reuse
1384                                          * it. Drop the existing pkt.
1385                                          */
1386                                         rq->stats.rx_buf_alloc_failure++;
1387                                         ctx->skb = NULL;
1388                                         rq->stats.drop_total++;
1389                                         skip_page_frags = true;
1390                                         goto rcd_done;
1391                                 }
1392
1393                                 dma_unmap_single(&adapter->pdev->dev,
1394                                                  rbi->dma_addr,
1395                                                  rbi->len,
1396                                                  PCI_DMA_FROMDEVICE);
1397
1398                                 /* Immediate refill */
1399                                 rbi->skb = new_skb;
1400                                 rbi->dma_addr = new_dma_addr;
1401                                 rxd->addr = cpu_to_le64(rbi->dma_addr);
1402                                 rxd->len = rbi->len;
1403                         }
1404
1405 #ifdef VMXNET3_RSS
1406                         if (rcd->rssType != VMXNET3_RCD_RSS_TYPE_NONE &&
1407                             (adapter->netdev->features & NETIF_F_RXHASH))
1408                                 skb_set_hash(ctx->skb,
1409                                              le32_to_cpu(rcd->rssHash),
1410                                              PKT_HASH_TYPE_L3);
1411 #endif
1412                         skb_put(ctx->skb, rcd->len);
1413
1414                         if (VMXNET3_VERSION_GE_2(adapter) &&
1415                             rcd->type == VMXNET3_CDTYPE_RXCOMP_LRO) {
1416                                 struct Vmxnet3_RxCompDescExt *rcdlro;
1417                                 rcdlro = (struct Vmxnet3_RxCompDescExt *)rcd;
1418
1419                                 segCnt = rcdlro->segCnt;
1420                                 WARN_ON_ONCE(segCnt == 0);
1421                                 mss = rcdlro->mss;
1422                                 if (unlikely(segCnt <= 1))
1423                                         segCnt = 0;
1424                         } else {
1425                                 segCnt = 0;
1426                         }
1427                 } else {
1428                         BUG_ON(ctx->skb == NULL && !skip_page_frags);
1429
1430                         /* non SOP buffer must be type 1 in most cases */
1431                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE);
1432                         BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1433
1434                         /* If an sop buffer was dropped, skip all
1435                          * following non-sop fragments. They will be reused.
1436                          */
1437                         if (skip_page_frags)
1438                                 goto rcd_done;
1439
1440                         if (rcd->len) {
1441                                 new_page = alloc_page(GFP_ATOMIC);
1442                                 /* Replacement page frag could not be allocated.
1443                                  * Reuse this page. Drop the pkt and free the
1444                                  * skb which contained this page as a frag. Skip
1445                                  * processing all the following non-sop frags.
1446                                  */
1447                                 if (unlikely(!new_page)) {
1448                                         rq->stats.rx_buf_alloc_failure++;
1449                                         dev_kfree_skb(ctx->skb);
1450                                         ctx->skb = NULL;
1451                                         skip_page_frags = true;
1452                                         goto rcd_done;
1453                                 }
1454                                 new_dma_addr = dma_map_page(&adapter->pdev->dev,
1455                                                             new_page,
1456                                                             0, PAGE_SIZE,
1457                                                             PCI_DMA_FROMDEVICE);
1458                                 if (dma_mapping_error(&adapter->pdev->dev,
1459                                                       new_dma_addr)) {
1460                                         put_page(new_page);
1461                                         rq->stats.rx_buf_alloc_failure++;
1462                                         dev_kfree_skb(ctx->skb);
1463                                         ctx->skb = NULL;
1464                                         skip_page_frags = true;
1465                                         goto rcd_done;
1466                                 }
1467
1468                                 dma_unmap_page(&adapter->pdev->dev,
1469                                                rbi->dma_addr, rbi->len,
1470                                                PCI_DMA_FROMDEVICE);
1471
1472                                 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1473
1474                                 /* Immediate refill */
1475                                 rbi->page = new_page;
1476                                 rbi->dma_addr = new_dma_addr;
1477                                 rxd->addr = cpu_to_le64(rbi->dma_addr);
1478                                 rxd->len = rbi->len;
1479                         }
1480                 }
1481
1482
1483                 skb = ctx->skb;
1484                 if (rcd->eop) {
1485                         u32 mtu = adapter->netdev->mtu;
1486                         skb->len += skb->data_len;
1487
1488                         vmxnet3_rx_csum(adapter, skb,
1489                                         (union Vmxnet3_GenericDesc *)rcd);
1490                         skb->protocol = eth_type_trans(skb, adapter->netdev);
1491                         if (!rcd->tcp || !adapter->lro)
1492                                 goto not_lro;
1493
1494                         if (segCnt != 0 && mss != 0) {
1495                                 skb_shinfo(skb)->gso_type = rcd->v4 ?
1496                                         SKB_GSO_TCPV4 : SKB_GSO_TCPV6;
1497                                 skb_shinfo(skb)->gso_size = mss;
1498                                 skb_shinfo(skb)->gso_segs = segCnt;
1499                         } else if (segCnt != 0 || skb->len > mtu) {
1500                                 u32 hlen;
1501
1502                                 hlen = vmxnet3_get_hdr_len(adapter, skb,
1503                                         (union Vmxnet3_GenericDesc *)rcd);
1504                                 if (hlen == 0)
1505                                         goto not_lro;
1506
1507                                 skb_shinfo(skb)->gso_type =
1508                                         rcd->v4 ? SKB_GSO_TCPV4 : SKB_GSO_TCPV6;
1509                                 if (segCnt != 0) {
1510                                         skb_shinfo(skb)->gso_segs = segCnt;
1511                                         skb_shinfo(skb)->gso_size =
1512                                                 DIV_ROUND_UP(skb->len -
1513                                                         hlen, segCnt);
1514                                 } else {
1515                                         skb_shinfo(skb)->gso_size = mtu - hlen;
1516                                 }
1517                         }
1518 not_lro:
1519                         if (unlikely(rcd->ts))
1520                                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rcd->tci);
1521
1522                         if (adapter->netdev->features & NETIF_F_LRO)
1523                                 netif_receive_skb(skb);
1524                         else
1525                                 napi_gro_receive(&rq->napi, skb);
1526
1527                         ctx->skb = NULL;
1528                         num_pkts++;
1529                 }
1530
1531 rcd_done:
1532                 /* device may have skipped some rx descs */
1533                 ring->next2comp = idx;
1534                 num_to_alloc = vmxnet3_cmd_ring_desc_avail(ring);
1535                 ring = rq->rx_ring + ring_idx;
1536
1537                 /* Ensure that the writes to rxd->gen bits will be observed
1538                  * after all other writes to rxd objects.
1539                  */
1540                 dma_wmb();
1541
1542                 while (num_to_alloc) {
1543                         vmxnet3_getRxDesc(rxd, &ring->base[ring->next2fill].rxd,
1544                                           &rxCmdDesc);
1545                         BUG_ON(!rxd->addr);
1546
1547                         /* Recv desc is ready to be used by the device */
1548                         rxd->gen = ring->gen;
1549                         vmxnet3_cmd_ring_adv_next2fill(ring);
1550                         num_to_alloc--;
1551                 }
1552
1553                 /* if needed, update the register */
1554                 if (unlikely(rq->shared->updateRxProd)) {
1555                         VMXNET3_WRITE_BAR0_REG(adapter,
1556                                                rxprod_reg[ring_idx] + rq->qid * 8,
1557                                                ring->next2fill);
1558                 }
1559
1560                 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
1561                 vmxnet3_getRxComp(rcd,
1562                                   &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp);
1563         }
1564
1565         return num_pkts;
1566 }
1567
1568
1569 static void
1570 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1571                    struct vmxnet3_adapter *adapter)
1572 {
1573         u32 i, ring_idx;
1574         struct Vmxnet3_RxDesc *rxd;
1575
1576         /* ring has already been cleaned up */
1577         if (!rq->rx_ring[0].base)
1578                 return;
1579
1580         for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1581                 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
1582 #ifdef __BIG_ENDIAN_BITFIELD
1583                         struct Vmxnet3_RxDesc rxDesc;
1584 #endif
1585                         vmxnet3_getRxDesc(rxd,
1586                                 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc);
1587
1588                         if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1589                                         rq->buf_info[ring_idx][i].skb) {
1590                                 dma_unmap_single(&adapter->pdev->dev, rxd->addr,
1591                                                  rxd->len, PCI_DMA_FROMDEVICE);
1592                                 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1593                                 rq->buf_info[ring_idx][i].skb = NULL;
1594                         } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1595                                         rq->buf_info[ring_idx][i].page) {
1596                                 dma_unmap_page(&adapter->pdev->dev, rxd->addr,
1597                                                rxd->len, PCI_DMA_FROMDEVICE);
1598                                 put_page(rq->buf_info[ring_idx][i].page);
1599                                 rq->buf_info[ring_idx][i].page = NULL;
1600                         }
1601                 }
1602
1603                 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1604                 rq->rx_ring[ring_idx].next2fill =
1605                                         rq->rx_ring[ring_idx].next2comp = 0;
1606         }
1607
1608         rq->comp_ring.gen = VMXNET3_INIT_GEN;
1609         rq->comp_ring.next2proc = 0;
1610 }
1611
1612
1613 static void
1614 vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter)
1615 {
1616         int i;
1617
1618         for (i = 0; i < adapter->num_rx_queues; i++)
1619                 vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter);
1620 }
1621
1622
1623 static void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1624                                struct vmxnet3_adapter *adapter)
1625 {
1626         int i;
1627         int j;
1628
1629         /* all rx buffers must have already been freed */
1630         for (i = 0; i < 2; i++) {
1631                 if (rq->buf_info[i]) {
1632                         for (j = 0; j < rq->rx_ring[i].size; j++)
1633                                 BUG_ON(rq->buf_info[i][j].page != NULL);
1634                 }
1635         }
1636
1637
1638         for (i = 0; i < 2; i++) {
1639                 if (rq->rx_ring[i].base) {
1640                         dma_free_coherent(&adapter->pdev->dev,
1641                                           rq->rx_ring[i].size
1642                                           * sizeof(struct Vmxnet3_RxDesc),
1643                                           rq->rx_ring[i].base,
1644                                           rq->rx_ring[i].basePA);
1645                         rq->rx_ring[i].base = NULL;
1646                 }
1647         }
1648
1649         if (rq->data_ring.base) {
1650                 dma_free_coherent(&adapter->pdev->dev,
1651                                   rq->rx_ring[0].size * rq->data_ring.desc_size,
1652                                   rq->data_ring.base, rq->data_ring.basePA);
1653                 rq->data_ring.base = NULL;
1654         }
1655
1656         if (rq->comp_ring.base) {
1657                 dma_free_coherent(&adapter->pdev->dev, rq->comp_ring.size
1658                                   * sizeof(struct Vmxnet3_RxCompDesc),
1659                                   rq->comp_ring.base, rq->comp_ring.basePA);
1660                 rq->comp_ring.base = NULL;
1661         }
1662
1663         if (rq->buf_info[0]) {
1664                 size_t sz = sizeof(struct vmxnet3_rx_buf_info) *
1665                         (rq->rx_ring[0].size + rq->rx_ring[1].size);
1666                 dma_free_coherent(&adapter->pdev->dev, sz, rq->buf_info[0],
1667                                   rq->buf_info_pa);
1668                 rq->buf_info[0] = rq->buf_info[1] = NULL;
1669         }
1670 }
1671
1672 static void
1673 vmxnet3_rq_destroy_all_rxdataring(struct vmxnet3_adapter *adapter)
1674 {
1675         int i;
1676
1677         for (i = 0; i < adapter->num_rx_queues; i++) {
1678                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
1679
1680                 if (rq->data_ring.base) {
1681                         dma_free_coherent(&adapter->pdev->dev,
1682                                           (rq->rx_ring[0].size *
1683                                           rq->data_ring.desc_size),
1684                                           rq->data_ring.base,
1685                                           rq->data_ring.basePA);
1686                         rq->data_ring.base = NULL;
1687                         rq->data_ring.desc_size = 0;
1688                 }
1689         }
1690 }
1691
1692 static int
1693 vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1694                 struct vmxnet3_adapter  *adapter)
1695 {
1696         int i;
1697
1698         /* initialize buf_info */
1699         for (i = 0; i < rq->rx_ring[0].size; i++) {
1700
1701                 /* 1st buf for a pkt is skbuff */
1702                 if (i % adapter->rx_buf_per_pkt == 0) {
1703                         rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1704                         rq->buf_info[0][i].len = adapter->skb_buf_size;
1705                 } else { /* subsequent bufs for a pkt is frag */
1706                         rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1707                         rq->buf_info[0][i].len = PAGE_SIZE;
1708                 }
1709         }
1710         for (i = 0; i < rq->rx_ring[1].size; i++) {
1711                 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1712                 rq->buf_info[1][i].len = PAGE_SIZE;
1713         }
1714
1715         /* reset internal state and allocate buffers for both rings */
1716         for (i = 0; i < 2; i++) {
1717                 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1718
1719                 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1720                        sizeof(struct Vmxnet3_RxDesc));
1721                 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1722         }
1723         if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1724                                     adapter) == 0) {
1725                 /* at least has 1 rx buffer for the 1st ring */
1726                 return -ENOMEM;
1727         }
1728         vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1729
1730         /* reset the comp ring */
1731         rq->comp_ring.next2proc = 0;
1732         memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1733                sizeof(struct Vmxnet3_RxCompDesc));
1734         rq->comp_ring.gen = VMXNET3_INIT_GEN;
1735
1736         /* reset rxctx */
1737         rq->rx_ctx.skb = NULL;
1738
1739         /* stats are not reset */
1740         return 0;
1741 }
1742
1743
1744 static int
1745 vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter)
1746 {
1747         int i, err = 0;
1748
1749         for (i = 0; i < adapter->num_rx_queues; i++) {
1750                 err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter);
1751                 if (unlikely(err)) {
1752                         dev_err(&adapter->netdev->dev, "%s: failed to "
1753                                 "initialize rx queue%i\n",
1754                                 adapter->netdev->name, i);
1755                         break;
1756                 }
1757         }
1758         return err;
1759
1760 }
1761
1762
1763 static int
1764 vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1765 {
1766         int i;
1767         size_t sz;
1768         struct vmxnet3_rx_buf_info *bi;
1769
1770         for (i = 0; i < 2; i++) {
1771
1772                 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1773                 rq->rx_ring[i].base = dma_alloc_coherent(
1774                                                 &adapter->pdev->dev, sz,
1775                                                 &rq->rx_ring[i].basePA,
1776                                                 GFP_KERNEL);
1777                 if (!rq->rx_ring[i].base) {
1778                         netdev_err(adapter->netdev,
1779                                    "failed to allocate rx ring %d\n", i);
1780                         goto err;
1781                 }
1782         }
1783
1784         if ((adapter->rxdataring_enabled) && (rq->data_ring.desc_size != 0)) {
1785                 sz = rq->rx_ring[0].size * rq->data_ring.desc_size;
1786                 rq->data_ring.base =
1787                         dma_alloc_coherent(&adapter->pdev->dev, sz,
1788                                            &rq->data_ring.basePA,
1789                                            GFP_KERNEL);
1790                 if (!rq->data_ring.base) {
1791                         netdev_err(adapter->netdev,
1792                                    "rx data ring will be disabled\n");
1793                         adapter->rxdataring_enabled = false;
1794                 }
1795         } else {
1796                 rq->data_ring.base = NULL;
1797                 rq->data_ring.desc_size = 0;
1798         }
1799
1800         sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1801         rq->comp_ring.base = dma_alloc_coherent(&adapter->pdev->dev, sz,
1802                                                 &rq->comp_ring.basePA,
1803                                                 GFP_KERNEL);
1804         if (!rq->comp_ring.base) {
1805                 netdev_err(adapter->netdev, "failed to allocate rx comp ring\n");
1806                 goto err;
1807         }
1808
1809         sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1810                                                    rq->rx_ring[1].size);
1811         bi = dma_zalloc_coherent(&adapter->pdev->dev, sz, &rq->buf_info_pa,
1812                                  GFP_KERNEL);
1813         if (!bi)
1814                 goto err;
1815
1816         rq->buf_info[0] = bi;
1817         rq->buf_info[1] = bi + rq->rx_ring[0].size;
1818
1819         return 0;
1820
1821 err:
1822         vmxnet3_rq_destroy(rq, adapter);
1823         return -ENOMEM;
1824 }
1825
1826
1827 static int
1828 vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter)
1829 {
1830         int i, err = 0;
1831
1832         adapter->rxdataring_enabled = VMXNET3_VERSION_GE_3(adapter);
1833
1834         for (i = 0; i < adapter->num_rx_queues; i++) {
1835                 err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter);
1836                 if (unlikely(err)) {
1837                         dev_err(&adapter->netdev->dev,
1838                                 "%s: failed to create rx queue%i\n",
1839                                 adapter->netdev->name, i);
1840                         goto err_out;
1841                 }
1842         }
1843
1844         if (!adapter->rxdataring_enabled)
1845                 vmxnet3_rq_destroy_all_rxdataring(adapter);
1846
1847         return err;
1848 err_out:
1849         vmxnet3_rq_destroy_all(adapter);
1850         return err;
1851
1852 }
1853
1854 /* Multiple queue aware polling function for tx and rx */
1855
1856 static int
1857 vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1858 {
1859         int rcd_done = 0, i;
1860         if (unlikely(adapter->shared->ecr))
1861                 vmxnet3_process_events(adapter);
1862         for (i = 0; i < adapter->num_tx_queues; i++)
1863                 vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter);
1864
1865         for (i = 0; i < adapter->num_rx_queues; i++)
1866                 rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i],
1867                                                    adapter, budget);
1868         return rcd_done;
1869 }
1870
1871
1872 static int
1873 vmxnet3_poll(struct napi_struct *napi, int budget)
1874 {
1875         struct vmxnet3_rx_queue *rx_queue = container_of(napi,
1876                                           struct vmxnet3_rx_queue, napi);
1877         int rxd_done;
1878
1879         rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget);
1880
1881         if (rxd_done < budget) {
1882                 napi_complete(napi);
1883                 vmxnet3_enable_all_intrs(rx_queue->adapter);
1884         }
1885         return rxd_done;
1886 }
1887
1888 /*
1889  * NAPI polling function for MSI-X mode with multiple Rx queues
1890  * Returns the # of the NAPI credit consumed (# of rx descriptors processed)
1891  */
1892
1893 static int
1894 vmxnet3_poll_rx_only(struct napi_struct *napi, int budget)
1895 {
1896         struct vmxnet3_rx_queue *rq = container_of(napi,
1897                                                 struct vmxnet3_rx_queue, napi);
1898         struct vmxnet3_adapter *adapter = rq->adapter;
1899         int rxd_done;
1900
1901         /* When sharing interrupt with corresponding tx queue, process
1902          * tx completions in that queue as well
1903          */
1904         if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) {
1905                 struct vmxnet3_tx_queue *tq =
1906                                 &adapter->tx_queue[rq - adapter->rx_queue];
1907                 vmxnet3_tq_tx_complete(tq, adapter);
1908         }
1909
1910         rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget);
1911
1912         if (rxd_done < budget) {
1913                 napi_complete(napi);
1914                 vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx);
1915         }
1916         return rxd_done;
1917 }
1918
1919
1920 #ifdef CONFIG_PCI_MSI
1921
1922 /*
1923  * Handle completion interrupts on tx queues
1924  * Returns whether or not the intr is handled
1925  */
1926
1927 static irqreturn_t
1928 vmxnet3_msix_tx(int irq, void *data)
1929 {
1930         struct vmxnet3_tx_queue *tq = data;
1931         struct vmxnet3_adapter *adapter = tq->adapter;
1932
1933         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1934                 vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx);
1935
1936         /* Handle the case where only one irq is allocate for all tx queues */
1937         if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1938                 int i;
1939                 for (i = 0; i < adapter->num_tx_queues; i++) {
1940                         struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i];
1941                         vmxnet3_tq_tx_complete(txq, adapter);
1942                 }
1943         } else {
1944                 vmxnet3_tq_tx_complete(tq, adapter);
1945         }
1946         vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx);
1947
1948         return IRQ_HANDLED;
1949 }
1950
1951
1952 /*
1953  * Handle completion interrupts on rx queues. Returns whether or not the
1954  * intr is handled
1955  */
1956
1957 static irqreturn_t
1958 vmxnet3_msix_rx(int irq, void *data)
1959 {
1960         struct vmxnet3_rx_queue *rq = data;
1961         struct vmxnet3_adapter *adapter = rq->adapter;
1962
1963         /* disable intr if needed */
1964         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1965                 vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx);
1966         napi_schedule(&rq->napi);
1967
1968         return IRQ_HANDLED;
1969 }
1970
1971 /*
1972  *----------------------------------------------------------------------------
1973  *
1974  * vmxnet3_msix_event --
1975  *
1976  *    vmxnet3 msix event intr handler
1977  *
1978  * Result:
1979  *    whether or not the intr is handled
1980  *
1981  *----------------------------------------------------------------------------
1982  */
1983
1984 static irqreturn_t
1985 vmxnet3_msix_event(int irq, void *data)
1986 {
1987         struct net_device *dev = data;
1988         struct vmxnet3_adapter *adapter = netdev_priv(dev);
1989
1990         /* disable intr if needed */
1991         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1992                 vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx);
1993
1994         if (adapter->shared->ecr)
1995                 vmxnet3_process_events(adapter);
1996
1997         vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx);
1998
1999         return IRQ_HANDLED;
2000 }
2001
2002 #endif /* CONFIG_PCI_MSI  */
2003
2004
2005 /* Interrupt handler for vmxnet3  */
2006 static irqreturn_t
2007 vmxnet3_intr(int irq, void *dev_id)
2008 {
2009         struct net_device *dev = dev_id;
2010         struct vmxnet3_adapter *adapter = netdev_priv(dev);
2011
2012         if (adapter->intr.type == VMXNET3_IT_INTX) {
2013                 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
2014                 if (unlikely(icr == 0))
2015                         /* not ours */
2016                         return IRQ_NONE;
2017         }
2018
2019
2020         /* disable intr if needed */
2021         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
2022                 vmxnet3_disable_all_intrs(adapter);
2023
2024         napi_schedule(&adapter->rx_queue[0].napi);
2025
2026         return IRQ_HANDLED;
2027 }
2028
2029 #ifdef CONFIG_NET_POLL_CONTROLLER
2030
2031 /* netpoll callback. */
2032 static void
2033 vmxnet3_netpoll(struct net_device *netdev)
2034 {
2035         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2036
2037         switch (adapter->intr.type) {
2038 #ifdef CONFIG_PCI_MSI
2039         case VMXNET3_IT_MSIX: {
2040                 int i;
2041                 for (i = 0; i < adapter->num_rx_queues; i++)
2042                         vmxnet3_msix_rx(0, &adapter->rx_queue[i]);
2043                 break;
2044         }
2045 #endif
2046         case VMXNET3_IT_MSI:
2047         default:
2048                 vmxnet3_intr(0, adapter->netdev);
2049                 break;
2050         }
2051
2052 }
2053 #endif  /* CONFIG_NET_POLL_CONTROLLER */
2054
2055 static int
2056 vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
2057 {
2058         struct vmxnet3_intr *intr = &adapter->intr;
2059         int err = 0, i;
2060         int vector = 0;
2061
2062 #ifdef CONFIG_PCI_MSI
2063         if (adapter->intr.type == VMXNET3_IT_MSIX) {
2064                 for (i = 0; i < adapter->num_tx_queues; i++) {
2065                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
2066                                 sprintf(adapter->tx_queue[i].name, "%s-tx-%d",
2067                                         adapter->netdev->name, vector);
2068                                 err = request_irq(
2069                                               intr->msix_entries[vector].vector,
2070                                               vmxnet3_msix_tx, 0,
2071                                               adapter->tx_queue[i].name,
2072                                               &adapter->tx_queue[i]);
2073                         } else {
2074                                 sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d",
2075                                         adapter->netdev->name, vector);
2076                         }
2077                         if (err) {
2078                                 dev_err(&adapter->netdev->dev,
2079                                         "Failed to request irq for MSIX, %s, "
2080                                         "error %d\n",
2081                                         adapter->tx_queue[i].name, err);
2082                                 return err;
2083                         }
2084
2085                         /* Handle the case where only 1 MSIx was allocated for
2086                          * all tx queues */
2087                         if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
2088                                 for (; i < adapter->num_tx_queues; i++)
2089                                         adapter->tx_queue[i].comp_ring.intr_idx
2090                                                                 = vector;
2091                                 vector++;
2092                                 break;
2093                         } else {
2094                                 adapter->tx_queue[i].comp_ring.intr_idx
2095                                                                 = vector++;
2096                         }
2097                 }
2098                 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE)
2099                         vector = 0;
2100
2101                 for (i = 0; i < adapter->num_rx_queues; i++) {
2102                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE)
2103                                 sprintf(adapter->rx_queue[i].name, "%s-rx-%d",
2104                                         adapter->netdev->name, vector);
2105                         else
2106                                 sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d",
2107                                         adapter->netdev->name, vector);
2108                         err = request_irq(intr->msix_entries[vector].vector,
2109                                           vmxnet3_msix_rx, 0,
2110                                           adapter->rx_queue[i].name,
2111                                           &(adapter->rx_queue[i]));
2112                         if (err) {
2113                                 netdev_err(adapter->netdev,
2114                                            "Failed to request irq for MSIX, "
2115                                            "%s, error %d\n",
2116                                            adapter->rx_queue[i].name, err);
2117                                 return err;
2118                         }
2119
2120                         adapter->rx_queue[i].comp_ring.intr_idx = vector++;
2121                 }
2122
2123                 sprintf(intr->event_msi_vector_name, "%s-event-%d",
2124                         adapter->netdev->name, vector);
2125                 err = request_irq(intr->msix_entries[vector].vector,
2126                                   vmxnet3_msix_event, 0,
2127                                   intr->event_msi_vector_name, adapter->netdev);
2128                 intr->event_intr_idx = vector;
2129
2130         } else if (intr->type == VMXNET3_IT_MSI) {
2131                 adapter->num_rx_queues = 1;
2132                 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
2133                                   adapter->netdev->name, adapter->netdev);
2134         } else {
2135 #endif
2136                 adapter->num_rx_queues = 1;
2137                 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
2138                                   IRQF_SHARED, adapter->netdev->name,
2139                                   adapter->netdev);
2140 #ifdef CONFIG_PCI_MSI
2141         }
2142 #endif
2143         intr->num_intrs = vector + 1;
2144         if (err) {
2145                 netdev_err(adapter->netdev,
2146                            "Failed to request irq (intr type:%d), error %d\n",
2147                            intr->type, err);
2148         } else {
2149                 /* Number of rx queues will not change after this */
2150                 for (i = 0; i < adapter->num_rx_queues; i++) {
2151                         struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2152                         rq->qid = i;
2153                         rq->qid2 = i + adapter->num_rx_queues;
2154                         rq->dataRingQid = i + 2 * adapter->num_rx_queues;
2155                 }
2156
2157                 /* init our intr settings */
2158                 for (i = 0; i < intr->num_intrs; i++)
2159                         intr->mod_levels[i] = UPT1_IML_ADAPTIVE;
2160                 if (adapter->intr.type != VMXNET3_IT_MSIX) {
2161                         adapter->intr.event_intr_idx = 0;
2162                         for (i = 0; i < adapter->num_tx_queues; i++)
2163                                 adapter->tx_queue[i].comp_ring.intr_idx = 0;
2164                         adapter->rx_queue[0].comp_ring.intr_idx = 0;
2165                 }
2166
2167                 netdev_info(adapter->netdev,
2168                             "intr type %u, mode %u, %u vectors allocated\n",
2169                             intr->type, intr->mask_mode, intr->num_intrs);
2170         }
2171
2172         return err;
2173 }
2174
2175
2176 static void
2177 vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
2178 {
2179         struct vmxnet3_intr *intr = &adapter->intr;
2180         BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0);
2181
2182         switch (intr->type) {
2183 #ifdef CONFIG_PCI_MSI
2184         case VMXNET3_IT_MSIX:
2185         {
2186                 int i, vector = 0;
2187
2188                 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
2189                         for (i = 0; i < adapter->num_tx_queues; i++) {
2190                                 free_irq(intr->msix_entries[vector++].vector,
2191                                          &(adapter->tx_queue[i]));
2192                                 if (adapter->share_intr == VMXNET3_INTR_TXSHARE)
2193                                         break;
2194                         }
2195                 }
2196
2197                 for (i = 0; i < adapter->num_rx_queues; i++) {
2198                         free_irq(intr->msix_entries[vector++].vector,
2199                                  &(adapter->rx_queue[i]));
2200                 }
2201
2202                 free_irq(intr->msix_entries[vector].vector,
2203                          adapter->netdev);
2204                 BUG_ON(vector >= intr->num_intrs);
2205                 break;
2206         }
2207 #endif
2208         case VMXNET3_IT_MSI:
2209                 free_irq(adapter->pdev->irq, adapter->netdev);
2210                 break;
2211         case VMXNET3_IT_INTX:
2212                 free_irq(adapter->pdev->irq, adapter->netdev);
2213                 break;
2214         default:
2215                 BUG();
2216         }
2217 }
2218
2219
2220 static void
2221 vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
2222 {
2223         u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2224         u16 vid;
2225
2226         /* allow untagged pkts */
2227         VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
2228
2229         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2230                 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
2231 }
2232
2233
2234 static int
2235 vmxnet3_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
2236 {
2237         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2238
2239         if (!(netdev->flags & IFF_PROMISC)) {
2240                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2241                 unsigned long flags;
2242
2243                 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
2244                 spin_lock_irqsave(&adapter->cmd_lock, flags);
2245                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2246                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2247                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2248         }
2249
2250         set_bit(vid, adapter->active_vlans);
2251
2252         return 0;
2253 }
2254
2255
2256 static int
2257 vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
2258 {
2259         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2260
2261         if (!(netdev->flags & IFF_PROMISC)) {
2262                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2263                 unsigned long flags;
2264
2265                 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
2266                 spin_lock_irqsave(&adapter->cmd_lock, flags);
2267                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2268                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2269                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2270         }
2271
2272         clear_bit(vid, adapter->active_vlans);
2273
2274         return 0;
2275 }
2276
2277
2278 static u8 *
2279 vmxnet3_copy_mc(struct net_device *netdev)
2280 {
2281         u8 *buf = NULL;
2282         u32 sz = netdev_mc_count(netdev) * ETH_ALEN;
2283
2284         /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
2285         if (sz <= 0xffff) {
2286                 /* We may be called with BH disabled */
2287                 buf = kmalloc(sz, GFP_ATOMIC);
2288                 if (buf) {
2289                         struct netdev_hw_addr *ha;
2290                         int i = 0;
2291
2292                         netdev_for_each_mc_addr(ha, netdev)
2293                                 memcpy(buf + i++ * ETH_ALEN, ha->addr,
2294                                        ETH_ALEN);
2295                 }
2296         }
2297         return buf;
2298 }
2299
2300
2301 static void
2302 vmxnet3_set_mc(struct net_device *netdev)
2303 {
2304         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2305         unsigned long flags;
2306         struct Vmxnet3_RxFilterConf *rxConf =
2307                                         &adapter->shared->devRead.rxFilterConf;
2308         u8 *new_table = NULL;
2309         dma_addr_t new_table_pa = 0;
2310         bool new_table_pa_valid = false;
2311         u32 new_mode = VMXNET3_RXM_UCAST;
2312
2313         if (netdev->flags & IFF_PROMISC) {
2314                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2315                 memset(vfTable, 0, VMXNET3_VFT_SIZE * sizeof(*vfTable));
2316
2317                 new_mode |= VMXNET3_RXM_PROMISC;
2318         } else {
2319                 vmxnet3_restore_vlan(adapter);
2320         }
2321
2322         if (netdev->flags & IFF_BROADCAST)
2323                 new_mode |= VMXNET3_RXM_BCAST;
2324
2325         if (netdev->flags & IFF_ALLMULTI)
2326                 new_mode |= VMXNET3_RXM_ALL_MULTI;
2327         else
2328                 if (!netdev_mc_empty(netdev)) {
2329                         new_table = vmxnet3_copy_mc(netdev);
2330                         if (new_table) {
2331                                 size_t sz = netdev_mc_count(netdev) * ETH_ALEN;
2332
2333                                 rxConf->mfTableLen = cpu_to_le16(sz);
2334                                 new_table_pa = dma_map_single(
2335                                                         &adapter->pdev->dev,
2336                                                         new_table,
2337                                                         sz,
2338                                                         PCI_DMA_TODEVICE);
2339                                 if (!dma_mapping_error(&adapter->pdev->dev,
2340                                                        new_table_pa)) {
2341                                         new_mode |= VMXNET3_RXM_MCAST;
2342                                         new_table_pa_valid = true;
2343                                         rxConf->mfTablePA = cpu_to_le64(
2344                                                                 new_table_pa);
2345                                 }
2346                         }
2347                         if (!new_table_pa_valid) {
2348                                 netdev_info(netdev,
2349                                             "failed to copy mcast list, setting ALL_MULTI\n");
2350                                 new_mode |= VMXNET3_RXM_ALL_MULTI;
2351                         }
2352                 }
2353
2354         if (!(new_mode & VMXNET3_RXM_MCAST)) {
2355                 rxConf->mfTableLen = 0;
2356                 rxConf->mfTablePA = 0;
2357         }
2358
2359         spin_lock_irqsave(&adapter->cmd_lock, flags);
2360         if (new_mode != rxConf->rxMode) {
2361                 rxConf->rxMode = cpu_to_le32(new_mode);
2362                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2363                                        VMXNET3_CMD_UPDATE_RX_MODE);
2364                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2365                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2366         }
2367
2368         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2369                                VMXNET3_CMD_UPDATE_MAC_FILTERS);
2370         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2371
2372         if (new_table_pa_valid)
2373                 dma_unmap_single(&adapter->pdev->dev, new_table_pa,
2374                                  rxConf->mfTableLen, PCI_DMA_TODEVICE);
2375         kfree(new_table);
2376 }
2377
2378 void
2379 vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter)
2380 {
2381         int i;
2382
2383         for (i = 0; i < adapter->num_rx_queues; i++)
2384                 vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter);
2385 }
2386
2387
2388 /*
2389  *   Set up driver_shared based on settings in adapter.
2390  */
2391
2392 static void
2393 vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
2394 {
2395         struct Vmxnet3_DriverShared *shared = adapter->shared;
2396         struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
2397         struct Vmxnet3_TxQueueConf *tqc;
2398         struct Vmxnet3_RxQueueConf *rqc;
2399         int i;
2400
2401         memset(shared, 0, sizeof(*shared));
2402
2403         /* driver settings */
2404         shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC);
2405         devRead->misc.driverInfo.version = cpu_to_le32(
2406                                                 VMXNET3_DRIVER_VERSION_NUM);
2407         devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
2408                                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
2409         devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
2410         *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32(
2411                                 *((u32 *)&devRead->misc.driverInfo.gos));
2412         devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1);
2413         devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1);
2414
2415         devRead->misc.ddPA = cpu_to_le64(adapter->adapter_pa);
2416         devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter));
2417
2418         /* set up feature flags */
2419         if (adapter->netdev->features & NETIF_F_RXCSUM)
2420                 devRead->misc.uptFeatures |= UPT1_F_RXCSUM;
2421
2422         if (adapter->netdev->features & NETIF_F_LRO) {
2423                 devRead->misc.uptFeatures |= UPT1_F_LRO;
2424                 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
2425         }
2426         if (adapter->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
2427                 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
2428
2429         devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
2430         devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
2431         devRead->misc.queueDescLen = cpu_to_le32(
2432                 adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
2433                 adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc));
2434
2435         /* tx queue settings */
2436         devRead->misc.numTxQueues =  adapter->num_tx_queues;
2437         for (i = 0; i < adapter->num_tx_queues; i++) {
2438                 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2439                 BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL);
2440                 tqc = &adapter->tqd_start[i].conf;
2441                 tqc->txRingBasePA   = cpu_to_le64(tq->tx_ring.basePA);
2442                 tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA);
2443                 tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA);
2444                 tqc->ddPA           = cpu_to_le64(tq->buf_info_pa);
2445                 tqc->txRingSize     = cpu_to_le32(tq->tx_ring.size);
2446                 tqc->dataRingSize   = cpu_to_le32(tq->data_ring.size);
2447                 tqc->txDataRingDescSize = cpu_to_le32(tq->txdata_desc_size);
2448                 tqc->compRingSize   = cpu_to_le32(tq->comp_ring.size);
2449                 tqc->ddLen          = cpu_to_le32(
2450                                         sizeof(struct vmxnet3_tx_buf_info) *
2451                                         tqc->txRingSize);
2452                 tqc->intrIdx        = tq->comp_ring.intr_idx;
2453         }
2454
2455         /* rx queue settings */
2456         devRead->misc.numRxQueues = adapter->num_rx_queues;
2457         for (i = 0; i < adapter->num_rx_queues; i++) {
2458                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2459                 rqc = &adapter->rqd_start[i].conf;
2460                 rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA);
2461                 rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA);
2462                 rqc->compRingBasePA  = cpu_to_le64(rq->comp_ring.basePA);
2463                 rqc->ddPA            = cpu_to_le64(rq->buf_info_pa);
2464                 rqc->rxRingSize[0]   = cpu_to_le32(rq->rx_ring[0].size);
2465                 rqc->rxRingSize[1]   = cpu_to_le32(rq->rx_ring[1].size);
2466                 rqc->compRingSize    = cpu_to_le32(rq->comp_ring.size);
2467                 rqc->ddLen           = cpu_to_le32(
2468                                         sizeof(struct vmxnet3_rx_buf_info) *
2469                                         (rqc->rxRingSize[0] +
2470                                          rqc->rxRingSize[1]));
2471                 rqc->intrIdx         = rq->comp_ring.intr_idx;
2472                 if (VMXNET3_VERSION_GE_3(adapter)) {
2473                         rqc->rxDataRingBasePA =
2474                                 cpu_to_le64(rq->data_ring.basePA);
2475                         rqc->rxDataRingDescSize =
2476                                 cpu_to_le16(rq->data_ring.desc_size);
2477                 }
2478         }
2479
2480 #ifdef VMXNET3_RSS
2481         memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf));
2482
2483         if (adapter->rss) {
2484                 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
2485
2486                 devRead->misc.uptFeatures |= UPT1_F_RSS;
2487                 devRead->misc.numRxQueues = adapter->num_rx_queues;
2488                 rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 |
2489                                     UPT1_RSS_HASH_TYPE_IPV4 |
2490                                     UPT1_RSS_HASH_TYPE_TCP_IPV6 |
2491                                     UPT1_RSS_HASH_TYPE_IPV6;
2492                 rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ;
2493                 rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE;
2494                 rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE;
2495                 netdev_rss_key_fill(rssConf->hashKey, sizeof(rssConf->hashKey));
2496
2497                 for (i = 0; i < rssConf->indTableSize; i++)
2498                         rssConf->indTable[i] = ethtool_rxfh_indir_default(
2499                                 i, adapter->num_rx_queues);
2500
2501                 devRead->rssConfDesc.confVer = 1;
2502                 devRead->rssConfDesc.confLen = cpu_to_le32(sizeof(*rssConf));
2503                 devRead->rssConfDesc.confPA =
2504                         cpu_to_le64(adapter->rss_conf_pa);
2505         }
2506
2507 #endif /* VMXNET3_RSS */
2508
2509         /* intr settings */
2510         devRead->intrConf.autoMask = adapter->intr.mask_mode ==
2511                                      VMXNET3_IMM_AUTO;
2512         devRead->intrConf.numIntrs = adapter->intr.num_intrs;
2513         for (i = 0; i < adapter->intr.num_intrs; i++)
2514                 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
2515
2516         devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
2517         devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
2518
2519         /* rx filter settings */
2520         devRead->rxFilterConf.rxMode = 0;
2521         vmxnet3_restore_vlan(adapter);
2522         vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr);
2523
2524         /* the rest are already zeroed */
2525 }
2526
2527 static void
2528 vmxnet3_init_coalesce(struct vmxnet3_adapter *adapter)
2529 {
2530         struct Vmxnet3_DriverShared *shared = adapter->shared;
2531         union Vmxnet3_CmdInfo *cmdInfo = &shared->cu.cmdInfo;
2532         unsigned long flags;
2533
2534         if (!VMXNET3_VERSION_GE_3(adapter))
2535                 return;
2536
2537         spin_lock_irqsave(&adapter->cmd_lock, flags);
2538         cmdInfo->varConf.confVer = 1;
2539         cmdInfo->varConf.confLen =
2540                 cpu_to_le32(sizeof(*adapter->coal_conf));
2541         cmdInfo->varConf.confPA  = cpu_to_le64(adapter->coal_conf_pa);
2542
2543         if (adapter->default_coal_mode) {
2544                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2545                                        VMXNET3_CMD_GET_COALESCE);
2546         } else {
2547                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2548                                        VMXNET3_CMD_SET_COALESCE);
2549         }
2550
2551         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2552 }
2553
2554 int
2555 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
2556 {
2557         int err, i;
2558         u32 ret;
2559         unsigned long flags;
2560
2561         netdev_dbg(adapter->netdev, "%s: skb_buf_size %d, rx_buf_per_pkt %d,"
2562                 " ring sizes %u %u %u\n", adapter->netdev->name,
2563                 adapter->skb_buf_size, adapter->rx_buf_per_pkt,
2564                 adapter->tx_queue[0].tx_ring.size,
2565                 adapter->rx_queue[0].rx_ring[0].size,
2566                 adapter->rx_queue[0].rx_ring[1].size);
2567
2568         vmxnet3_tq_init_all(adapter);
2569         err = vmxnet3_rq_init_all(adapter);
2570         if (err) {
2571                 netdev_err(adapter->netdev,
2572                            "Failed to init rx queue error %d\n", err);
2573                 goto rq_err;
2574         }
2575
2576         err = vmxnet3_request_irqs(adapter);
2577         if (err) {
2578                 netdev_err(adapter->netdev,
2579                            "Failed to setup irq for error %d\n", err);
2580                 goto irq_err;
2581         }
2582
2583         vmxnet3_setup_driver_shared(adapter);
2584
2585         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
2586                                adapter->shared_pa));
2587         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
2588                                adapter->shared_pa));
2589         spin_lock_irqsave(&adapter->cmd_lock, flags);
2590         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2591                                VMXNET3_CMD_ACTIVATE_DEV);
2592         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2593         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2594
2595         if (ret != 0) {
2596                 netdev_err(adapter->netdev,
2597                            "Failed to activate dev: error %u\n", ret);
2598                 err = -EINVAL;
2599                 goto activate_err;
2600         }
2601
2602         vmxnet3_init_coalesce(adapter);
2603
2604         for (i = 0; i < adapter->num_rx_queues; i++) {
2605                 VMXNET3_WRITE_BAR0_REG(adapter,
2606                                 VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN,
2607                                 adapter->rx_queue[i].rx_ring[0].next2fill);
2608                 VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 +
2609                                 (i * VMXNET3_REG_ALIGN)),
2610                                 adapter->rx_queue[i].rx_ring[1].next2fill);
2611         }
2612
2613         /* Apply the rx filter settins last. */
2614         vmxnet3_set_mc(adapter->netdev);
2615
2616         /*
2617          * Check link state when first activating device. It will start the
2618          * tx queue if the link is up.
2619          */
2620         vmxnet3_check_link(adapter, true);
2621         for (i = 0; i < adapter->num_rx_queues; i++)
2622                 napi_enable(&adapter->rx_queue[i].napi);
2623         vmxnet3_enable_all_intrs(adapter);
2624         clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2625         return 0;
2626
2627 activate_err:
2628         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
2629         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
2630         vmxnet3_free_irqs(adapter);
2631 irq_err:
2632 rq_err:
2633         /* free up buffers we allocated */
2634         vmxnet3_rq_cleanup_all(adapter);
2635         return err;
2636 }
2637
2638
2639 void
2640 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
2641 {
2642         unsigned long flags;
2643         spin_lock_irqsave(&adapter->cmd_lock, flags);
2644         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
2645         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2646 }
2647
2648
2649 int
2650 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
2651 {
2652         int i;
2653         unsigned long flags;
2654         if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
2655                 return 0;
2656
2657
2658         spin_lock_irqsave(&adapter->cmd_lock, flags);
2659         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2660                                VMXNET3_CMD_QUIESCE_DEV);
2661         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2662         vmxnet3_disable_all_intrs(adapter);
2663
2664         for (i = 0; i < adapter->num_rx_queues; i++)
2665                 napi_disable(&adapter->rx_queue[i].napi);
2666         netif_tx_disable(adapter->netdev);
2667         adapter->link_speed = 0;
2668         netif_carrier_off(adapter->netdev);
2669
2670         vmxnet3_tq_cleanup_all(adapter);
2671         vmxnet3_rq_cleanup_all(adapter);
2672         vmxnet3_free_irqs(adapter);
2673         return 0;
2674 }
2675
2676
2677 static void
2678 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2679 {
2680         u32 tmp;
2681
2682         tmp = *(u32 *)mac;
2683         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
2684
2685         tmp = (mac[5] << 8) | mac[4];
2686         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
2687 }
2688
2689
2690 static int
2691 vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
2692 {
2693         struct sockaddr *addr = p;
2694         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2695
2696         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2697         vmxnet3_write_mac_addr(adapter, addr->sa_data);
2698
2699         return 0;
2700 }
2701
2702
2703 /* ==================== initialization and cleanup routines ============ */
2704
2705 static int
2706 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter)
2707 {
2708         int err;
2709         unsigned long mmio_start, mmio_len;
2710         struct pci_dev *pdev = adapter->pdev;
2711
2712         err = pci_enable_device(pdev);
2713         if (err) {
2714                 dev_err(&pdev->dev, "Failed to enable adapter: error %d\n", err);
2715                 return err;
2716         }
2717
2718         err = pci_request_selected_regions(pdev, (1 << 2) - 1,
2719                                            vmxnet3_driver_name);
2720         if (err) {
2721                 dev_err(&pdev->dev,
2722                         "Failed to request region for adapter: error %d\n", err);
2723                 goto err_enable_device;
2724         }
2725
2726         pci_set_master(pdev);
2727
2728         mmio_start = pci_resource_start(pdev, 0);
2729         mmio_len = pci_resource_len(pdev, 0);
2730         adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
2731         if (!adapter->hw_addr0) {
2732                 dev_err(&pdev->dev, "Failed to map bar0\n");
2733                 err = -EIO;
2734                 goto err_ioremap;
2735         }
2736
2737         mmio_start = pci_resource_start(pdev, 1);
2738         mmio_len = pci_resource_len(pdev, 1);
2739         adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
2740         if (!adapter->hw_addr1) {
2741                 dev_err(&pdev->dev, "Failed to map bar1\n");
2742                 err = -EIO;
2743                 goto err_bar1;
2744         }
2745         return 0;
2746
2747 err_bar1:
2748         iounmap(adapter->hw_addr0);
2749 err_ioremap:
2750         pci_release_selected_regions(pdev, (1 << 2) - 1);
2751 err_enable_device:
2752         pci_disable_device(pdev);
2753         return err;
2754 }
2755
2756
2757 static void
2758 vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
2759 {
2760         BUG_ON(!adapter->pdev);
2761
2762         iounmap(adapter->hw_addr0);
2763         iounmap(adapter->hw_addr1);
2764         pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
2765         pci_disable_device(adapter->pdev);
2766 }
2767
2768
2769 static void
2770 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2771 {
2772         size_t sz, i, ring0_size, ring1_size, comp_size;
2773         struct vmxnet3_rx_queue *rq = &adapter->rx_queue[0];
2774
2775
2776         if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
2777                                     VMXNET3_MAX_ETH_HDR_SIZE) {
2778                 adapter->skb_buf_size = adapter->netdev->mtu +
2779                                         VMXNET3_MAX_ETH_HDR_SIZE;
2780                 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
2781                         adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
2782
2783                 adapter->rx_buf_per_pkt = 1;
2784         } else {
2785                 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
2786                 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
2787                                             VMXNET3_MAX_ETH_HDR_SIZE;
2788                 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
2789         }
2790
2791         /*
2792          * for simplicity, force the ring0 size to be a multiple of
2793          * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2794          */
2795         sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2796         ring0_size = adapter->rx_queue[0].rx_ring[0].size;
2797         ring0_size = (ring0_size + sz - 1) / sz * sz;
2798         ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE /
2799                            sz * sz);
2800         ring1_size = adapter->rx_queue[0].rx_ring[1].size;
2801         ring1_size = (ring1_size + sz - 1) / sz * sz;
2802         ring1_size = min_t(u32, ring1_size, VMXNET3_RX_RING2_MAX_SIZE /
2803                            sz * sz);
2804         comp_size = ring0_size + ring1_size;
2805
2806         for (i = 0; i < adapter->num_rx_queues; i++) {
2807                 rq = &adapter->rx_queue[i];
2808                 rq->rx_ring[0].size = ring0_size;
2809                 rq->rx_ring[1].size = ring1_size;
2810                 rq->comp_ring.size = comp_size;
2811         }
2812 }
2813
2814
2815 int
2816 vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
2817                       u32 rx_ring_size, u32 rx_ring2_size,
2818                       u16 txdata_desc_size, u16 rxdata_desc_size)
2819 {
2820         int err = 0, i;
2821
2822         for (i = 0; i < adapter->num_tx_queues; i++) {
2823                 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2824                 tq->tx_ring.size   = tx_ring_size;
2825                 tq->data_ring.size = tx_ring_size;
2826                 tq->comp_ring.size = tx_ring_size;
2827                 tq->txdata_desc_size = txdata_desc_size;
2828                 tq->shared = &adapter->tqd_start[i].ctrl;
2829                 tq->stopped = true;
2830                 tq->adapter = adapter;
2831                 tq->qid = i;
2832                 err = vmxnet3_tq_create(tq, adapter);
2833                 /*
2834                  * Too late to change num_tx_queues. We cannot do away with
2835                  * lesser number of queues than what we asked for
2836                  */
2837                 if (err)
2838                         goto queue_err;
2839         }
2840
2841         adapter->rx_queue[0].rx_ring[0].size = rx_ring_size;
2842         adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size;
2843         vmxnet3_adjust_rx_ring_size(adapter);
2844
2845         adapter->rxdataring_enabled = VMXNET3_VERSION_GE_3(adapter);
2846         for (i = 0; i < adapter->num_rx_queues; i++) {
2847                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2848                 /* qid and qid2 for rx queues will be assigned later when num
2849                  * of rx queues is finalized after allocating intrs */
2850                 rq->shared = &adapter->rqd_start[i].ctrl;
2851                 rq->adapter = adapter;
2852                 rq->data_ring.desc_size = rxdata_desc_size;
2853                 err = vmxnet3_rq_create(rq, adapter);
2854                 if (err) {
2855                         if (i == 0) {
2856                                 netdev_err(adapter->netdev,
2857                                            "Could not allocate any rx queues. "
2858                                            "Aborting.\n");
2859                                 goto queue_err;
2860                         } else {
2861                                 netdev_info(adapter->netdev,
2862                                             "Number of rx queues changed "
2863                                             "to : %d.\n", i);
2864                                 adapter->num_rx_queues = i;
2865                                 err = 0;
2866                                 break;
2867                         }
2868                 }
2869         }
2870
2871         if (!adapter->rxdataring_enabled)
2872                 vmxnet3_rq_destroy_all_rxdataring(adapter);
2873
2874         return err;
2875 queue_err:
2876         vmxnet3_tq_destroy_all(adapter);
2877         return err;
2878 }
2879
2880 static int
2881 vmxnet3_open(struct net_device *netdev)
2882 {
2883         struct vmxnet3_adapter *adapter;
2884         int err, i;
2885
2886         adapter = netdev_priv(netdev);
2887
2888         for (i = 0; i < adapter->num_tx_queues; i++)
2889                 spin_lock_init(&adapter->tx_queue[i].tx_lock);
2890
2891         if (VMXNET3_VERSION_GE_3(adapter)) {
2892                 unsigned long flags;
2893                 u16 txdata_desc_size;
2894
2895                 spin_lock_irqsave(&adapter->cmd_lock, flags);
2896                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2897                                        VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
2898                 txdata_desc_size = VMXNET3_READ_BAR1_REG(adapter,
2899                                                          VMXNET3_REG_CMD);
2900                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2901
2902                 if ((txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE) ||
2903                     (txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE) ||
2904                     (txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK)) {
2905                         adapter->txdata_desc_size =
2906                                 sizeof(struct Vmxnet3_TxDataDesc);
2907                 } else {
2908                         adapter->txdata_desc_size = txdata_desc_size;
2909                 }
2910         } else {
2911                 adapter->txdata_desc_size = sizeof(struct Vmxnet3_TxDataDesc);
2912         }
2913
2914         err = vmxnet3_create_queues(adapter,
2915                                     adapter->tx_ring_size,
2916                                     adapter->rx_ring_size,
2917                                     adapter->rx_ring2_size,
2918                                     adapter->txdata_desc_size,
2919                                     adapter->rxdata_desc_size);
2920         if (err)
2921                 goto queue_err;
2922
2923         err = vmxnet3_activate_dev(adapter);
2924         if (err)
2925                 goto activate_err;
2926
2927         return 0;
2928
2929 activate_err:
2930         vmxnet3_rq_destroy_all(adapter);
2931         vmxnet3_tq_destroy_all(adapter);
2932 queue_err:
2933         return err;
2934 }
2935
2936
2937 static int
2938 vmxnet3_close(struct net_device *netdev)
2939 {
2940         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2941
2942         /*
2943          * Reset_work may be in the middle of resetting the device, wait for its
2944          * completion.
2945          */
2946         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2947                 msleep(1);
2948
2949         vmxnet3_quiesce_dev(adapter);
2950
2951         vmxnet3_rq_destroy_all(adapter);
2952         vmxnet3_tq_destroy_all(adapter);
2953
2954         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2955
2956
2957         return 0;
2958 }
2959
2960
2961 void
2962 vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2963 {
2964         int i;
2965
2966         /*
2967          * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2968          * vmxnet3_close() will deadlock.
2969          */
2970         BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2971
2972         /* we need to enable NAPI, otherwise dev_close will deadlock */
2973         for (i = 0; i < adapter->num_rx_queues; i++)
2974                 napi_enable(&adapter->rx_queue[i].napi);
2975         /*
2976          * Need to clear the quiesce bit to ensure that vmxnet3_close
2977          * can quiesce the device properly
2978          */
2979         clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2980         dev_close(adapter->netdev);
2981 }
2982
2983
2984 static int
2985 vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2986 {
2987         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2988         int err = 0;
2989
2990         if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU)
2991                 return -EINVAL;
2992
2993         netdev->mtu = new_mtu;
2994
2995         /*
2996          * Reset_work may be in the middle of resetting the device, wait for its
2997          * completion.
2998          */
2999         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
3000                 msleep(1);
3001
3002         if (netif_running(netdev)) {
3003                 vmxnet3_quiesce_dev(adapter);
3004                 vmxnet3_reset_dev(adapter);
3005
3006                 /* we need to re-create the rx queue based on the new mtu */
3007                 vmxnet3_rq_destroy_all(adapter);
3008                 vmxnet3_adjust_rx_ring_size(adapter);
3009                 err = vmxnet3_rq_create_all(adapter);
3010                 if (err) {
3011                         netdev_err(netdev,
3012                                    "failed to re-create rx queues, "
3013                                    " error %d. Closing it.\n", err);
3014                         goto out;
3015                 }
3016
3017                 err = vmxnet3_activate_dev(adapter);
3018                 if (err) {
3019                         netdev_err(netdev,
3020                                    "failed to re-activate, error %d. "
3021                                    "Closing it\n", err);
3022                         goto out;
3023                 }
3024         }
3025
3026 out:
3027         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3028         if (err)
3029                 vmxnet3_force_close(adapter);
3030
3031         return err;
3032 }
3033
3034
3035 static void
3036 vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
3037 {
3038         struct net_device *netdev = adapter->netdev;
3039
3040         netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
3041                 NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_CTAG_TX |
3042                 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_TSO | NETIF_F_TSO6 |
3043                 NETIF_F_LRO;
3044         if (dma64)
3045                 netdev->hw_features |= NETIF_F_HIGHDMA;
3046         netdev->vlan_features = netdev->hw_features &
3047                                 ~(NETIF_F_HW_VLAN_CTAG_TX |
3048                                   NETIF_F_HW_VLAN_CTAG_RX);
3049         netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
3050 }
3051
3052
3053 static void
3054 vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
3055 {
3056         u32 tmp;
3057
3058         tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
3059         *(u32 *)mac = tmp;
3060
3061         tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
3062         mac[4] = tmp & 0xff;
3063         mac[5] = (tmp >> 8) & 0xff;
3064 }
3065
3066 #ifdef CONFIG_PCI_MSI
3067
3068 /*
3069  * Enable MSIx vectors.
3070  * Returns :
3071  *      VMXNET3_LINUX_MIN_MSIX_VECT when only minimum number of vectors required
3072  *       were enabled.
3073  *      number of vectors which were enabled otherwise (this number is greater
3074  *       than VMXNET3_LINUX_MIN_MSIX_VECT)
3075  */
3076
3077 static int
3078 vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter, int nvec)
3079 {
3080         int ret = pci_enable_msix_range(adapter->pdev,
3081                                         adapter->intr.msix_entries, nvec, nvec);
3082
3083         if (ret == -ENOSPC && nvec > VMXNET3_LINUX_MIN_MSIX_VECT) {
3084                 dev_err(&adapter->netdev->dev,
3085                         "Failed to enable %d MSI-X, trying %d\n",
3086                         nvec, VMXNET3_LINUX_MIN_MSIX_VECT);
3087
3088                 ret = pci_enable_msix_range(adapter->pdev,
3089                                             adapter->intr.msix_entries,
3090                                             VMXNET3_LINUX_MIN_MSIX_VECT,
3091                                             VMXNET3_LINUX_MIN_MSIX_VECT);
3092         }
3093
3094         if (ret < 0) {
3095                 dev_err(&adapter->netdev->dev,
3096                         "Failed to enable MSI-X, error: %d\n", ret);
3097         }
3098
3099         return ret;
3100 }
3101
3102
3103 #endif /* CONFIG_PCI_MSI */
3104
3105 static void
3106 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
3107 {
3108         u32 cfg;
3109         unsigned long flags;
3110
3111         /* intr settings */
3112         spin_lock_irqsave(&adapter->cmd_lock, flags);
3113         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3114                                VMXNET3_CMD_GET_CONF_INTR);
3115         cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
3116         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3117         adapter->intr.type = cfg & 0x3;
3118         adapter->intr.mask_mode = (cfg >> 2) & 0x3;
3119
3120         if (adapter->intr.type == VMXNET3_IT_AUTO) {
3121                 adapter->intr.type = VMXNET3_IT_MSIX;
3122         }
3123
3124 #ifdef CONFIG_PCI_MSI
3125         if (adapter->intr.type == VMXNET3_IT_MSIX) {
3126                 int i, nvec;
3127
3128                 nvec  = adapter->share_intr == VMXNET3_INTR_TXSHARE ?
3129                         1 : adapter->num_tx_queues;
3130                 nvec += adapter->share_intr == VMXNET3_INTR_BUDDYSHARE ?
3131                         0 : adapter->num_rx_queues;
3132                 nvec += 1;      /* for link event */
3133                 nvec = nvec > VMXNET3_LINUX_MIN_MSIX_VECT ?
3134                        nvec : VMXNET3_LINUX_MIN_MSIX_VECT;
3135
3136                 for (i = 0; i < nvec; i++)
3137                         adapter->intr.msix_entries[i].entry = i;
3138
3139                 nvec = vmxnet3_acquire_msix_vectors(adapter, nvec);
3140                 if (nvec < 0)
3141                         goto msix_err;
3142
3143                 /* If we cannot allocate one MSIx vector per queue
3144                  * then limit the number of rx queues to 1
3145                  */
3146                 if (nvec == VMXNET3_LINUX_MIN_MSIX_VECT) {
3147                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE
3148                             || adapter->num_rx_queues != 1) {
3149                                 adapter->share_intr = VMXNET3_INTR_TXSHARE;
3150                                 netdev_err(adapter->netdev,
3151                                            "Number of rx queues : 1\n");
3152                                 adapter->num_rx_queues = 1;
3153                         }
3154                 }
3155
3156                 adapter->intr.num_intrs = nvec;
3157                 return;
3158
3159 msix_err:
3160                 /* If we cannot allocate MSIx vectors use only one rx queue */
3161                 dev_info(&adapter->pdev->dev,
3162                          "Failed to enable MSI-X, error %d. "
3163                          "Limiting #rx queues to 1, try MSI.\n", nvec);
3164
3165                 adapter->intr.type = VMXNET3_IT_MSI;
3166         }
3167
3168         if (adapter->intr.type == VMXNET3_IT_MSI) {
3169                 if (!pci_enable_msi(adapter->pdev)) {
3170                         adapter->num_rx_queues = 1;
3171                         adapter->intr.num_intrs = 1;
3172                         return;
3173                 }
3174         }
3175 #endif /* CONFIG_PCI_MSI */
3176
3177         adapter->num_rx_queues = 1;
3178         dev_info(&adapter->netdev->dev,
3179                  "Using INTx interrupt, #Rx queues: 1.\n");
3180         adapter->intr.type = VMXNET3_IT_INTX;
3181
3182         /* INT-X related setting */
3183         adapter->intr.num_intrs = 1;
3184 }
3185
3186
3187 static void
3188 vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
3189 {
3190         if (adapter->intr.type == VMXNET3_IT_MSIX)
3191                 pci_disable_msix(adapter->pdev);
3192         else if (adapter->intr.type == VMXNET3_IT_MSI)
3193                 pci_disable_msi(adapter->pdev);
3194         else
3195                 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
3196 }
3197
3198
3199 static void
3200 vmxnet3_tx_timeout(struct net_device *netdev)
3201 {
3202         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3203         adapter->tx_timeout_count++;
3204
3205         netdev_err(adapter->netdev, "tx hang\n");
3206         schedule_work(&adapter->work);
3207 }
3208
3209
3210 static void
3211 vmxnet3_reset_work(struct work_struct *data)
3212 {
3213         struct vmxnet3_adapter *adapter;
3214
3215         adapter = container_of(data, struct vmxnet3_adapter, work);
3216
3217         /* if another thread is resetting the device, no need to proceed */
3218         if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
3219                 return;
3220
3221         /* if the device is closed, we must leave it alone */
3222         rtnl_lock();
3223         if (netif_running(adapter->netdev)) {
3224                 netdev_notice(adapter->netdev, "resetting\n");
3225                 vmxnet3_quiesce_dev(adapter);
3226                 vmxnet3_reset_dev(adapter);
3227                 vmxnet3_activate_dev(adapter);
3228         } else {
3229                 netdev_info(adapter->netdev, "already closed\n");
3230         }
3231         rtnl_unlock();
3232
3233         netif_wake_queue(adapter->netdev);
3234         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3235 }
3236
3237
3238 static int
3239 vmxnet3_probe_device(struct pci_dev *pdev,
3240                      const struct pci_device_id *id)
3241 {
3242         static const struct net_device_ops vmxnet3_netdev_ops = {
3243                 .ndo_open = vmxnet3_open,
3244                 .ndo_stop = vmxnet3_close,
3245                 .ndo_start_xmit = vmxnet3_xmit_frame,
3246                 .ndo_set_mac_address = vmxnet3_set_mac_addr,
3247                 .ndo_change_mtu = vmxnet3_change_mtu,
3248                 .ndo_set_features = vmxnet3_set_features,
3249                 .ndo_get_stats64 = vmxnet3_get_stats64,
3250                 .ndo_tx_timeout = vmxnet3_tx_timeout,
3251                 .ndo_set_rx_mode = vmxnet3_set_mc,
3252                 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
3253                 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
3254 #ifdef CONFIG_NET_POLL_CONTROLLER
3255                 .ndo_poll_controller = vmxnet3_netpoll,
3256 #endif
3257         };
3258         int err;
3259         bool dma64;
3260         u32 ver;
3261         struct net_device *netdev;
3262         struct vmxnet3_adapter *adapter;
3263         u8 mac[ETH_ALEN];
3264         int size;
3265         int num_tx_queues;
3266         int num_rx_queues;
3267
3268         if (!pci_msi_enabled())
3269                 enable_mq = 0;
3270
3271 #ifdef VMXNET3_RSS
3272         if (enable_mq)
3273                 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
3274                                     (int)num_online_cpus());
3275         else
3276 #endif
3277                 num_rx_queues = 1;
3278         num_rx_queues = rounddown_pow_of_two(num_rx_queues);
3279
3280         if (enable_mq)
3281                 num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES,
3282                                     (int)num_online_cpus());
3283         else
3284                 num_tx_queues = 1;
3285
3286         num_tx_queues = rounddown_pow_of_two(num_tx_queues);
3287         netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter),
3288                                    max(num_tx_queues, num_rx_queues));
3289         dev_info(&pdev->dev,
3290                  "# of Tx queues : %d, # of Rx queues : %d\n",
3291                  num_tx_queues, num_rx_queues);
3292
3293         if (!netdev)
3294                 return -ENOMEM;
3295
3296         pci_set_drvdata(pdev, netdev);
3297         adapter = netdev_priv(netdev);
3298         adapter->netdev = netdev;
3299         adapter->pdev = pdev;
3300
3301         adapter->tx_ring_size = VMXNET3_DEF_TX_RING_SIZE;
3302         adapter->rx_ring_size = VMXNET3_DEF_RX_RING_SIZE;
3303         adapter->rx_ring2_size = VMXNET3_DEF_RX_RING2_SIZE;
3304
3305         if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
3306                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
3307                         dev_err(&pdev->dev,
3308                                 "pci_set_consistent_dma_mask failed\n");
3309                         err = -EIO;
3310                         goto err_set_mask;
3311                 }
3312                 dma64 = true;
3313         } else {
3314                 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
3315                         dev_err(&pdev->dev,
3316                                 "pci_set_dma_mask failed\n");
3317                         err = -EIO;
3318                         goto err_set_mask;
3319                 }
3320                 dma64 = false;
3321         }
3322
3323         spin_lock_init(&adapter->cmd_lock);
3324         adapter->adapter_pa = dma_map_single(&adapter->pdev->dev, adapter,
3325                                              sizeof(struct vmxnet3_adapter),
3326                                              PCI_DMA_TODEVICE);
3327         if (dma_mapping_error(&adapter->pdev->dev, adapter->adapter_pa)) {
3328                 dev_err(&pdev->dev, "Failed to map dma\n");
3329                 err = -EFAULT;
3330                 goto err_set_mask;
3331         }
3332         adapter->shared = dma_alloc_coherent(
3333                                 &adapter->pdev->dev,
3334                                 sizeof(struct Vmxnet3_DriverShared),
3335                                 &adapter->shared_pa, GFP_KERNEL);
3336         if (!adapter->shared) {
3337                 dev_err(&pdev->dev, "Failed to allocate memory\n");
3338                 err = -ENOMEM;
3339                 goto err_alloc_shared;
3340         }
3341
3342         adapter->num_rx_queues = num_rx_queues;
3343         adapter->num_tx_queues = num_tx_queues;
3344         adapter->rx_buf_per_pkt = 1;
3345
3346         size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3347         size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues;
3348         adapter->tqd_start = dma_alloc_coherent(&adapter->pdev->dev, size,
3349                                                 &adapter->queue_desc_pa,
3350                                                 GFP_KERNEL);
3351
3352         if (!adapter->tqd_start) {
3353                 dev_err(&pdev->dev, "Failed to allocate memory\n");
3354                 err = -ENOMEM;
3355                 goto err_alloc_queue_desc;
3356         }
3357         adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start +
3358                                                             adapter->num_tx_queues);
3359
3360         adapter->pm_conf = dma_alloc_coherent(&adapter->pdev->dev,
3361                                               sizeof(struct Vmxnet3_PMConf),
3362                                               &adapter->pm_conf_pa,
3363                                               GFP_KERNEL);
3364         if (adapter->pm_conf == NULL) {
3365                 err = -ENOMEM;
3366                 goto err_alloc_pm;
3367         }
3368
3369 #ifdef VMXNET3_RSS
3370
3371         adapter->rss_conf = dma_alloc_coherent(&adapter->pdev->dev,
3372                                                sizeof(struct UPT1_RSSConf),
3373                                                &adapter->rss_conf_pa,
3374                                                GFP_KERNEL);
3375         if (adapter->rss_conf == NULL) {
3376                 err = -ENOMEM;
3377                 goto err_alloc_rss;
3378         }
3379 #endif /* VMXNET3_RSS */
3380
3381         err = vmxnet3_alloc_pci_resources(adapter);
3382         if (err < 0)
3383                 goto err_alloc_pci;
3384
3385         ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
3386         if (ver & (1 << VMXNET3_REV_3)) {
3387                 VMXNET3_WRITE_BAR1_REG(adapter,
3388                                        VMXNET3_REG_VRRS,
3389                                        1 << VMXNET3_REV_3);
3390                 adapter->version = VMXNET3_REV_3 + 1;
3391         } else if (ver & (1 << VMXNET3_REV_2)) {
3392                 VMXNET3_WRITE_BAR1_REG(adapter,
3393                                        VMXNET3_REG_VRRS,
3394                                        1 << VMXNET3_REV_2);
3395                 adapter->version = VMXNET3_REV_2 + 1;
3396         } else if (ver & (1 << VMXNET3_REV_1)) {
3397                 VMXNET3_WRITE_BAR1_REG(adapter,
3398                                        VMXNET3_REG_VRRS,
3399                                        1 << VMXNET3_REV_1);
3400                 adapter->version = VMXNET3_REV_1 + 1;
3401         } else {
3402                 dev_err(&pdev->dev,
3403                         "Incompatible h/w version (0x%x) for adapter\n", ver);
3404                 err = -EBUSY;
3405                 goto err_ver;
3406         }
3407         dev_dbg(&pdev->dev, "Using device version %d\n", adapter->version);
3408
3409         ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
3410         if (ver & 1) {
3411                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
3412         } else {
3413                 dev_err(&pdev->dev,
3414                         "Incompatible upt version (0x%x) for adapter\n", ver);
3415                 err = -EBUSY;
3416                 goto err_ver;
3417         }
3418
3419         if (VMXNET3_VERSION_GE_3(adapter)) {
3420                 adapter->coal_conf =
3421                         dma_alloc_coherent(&adapter->pdev->dev,
3422                                            sizeof(struct Vmxnet3_CoalesceScheme)
3423                                            ,
3424                                            &adapter->coal_conf_pa,
3425                                            GFP_KERNEL);
3426                 if (!adapter->coal_conf) {
3427                         err = -ENOMEM;
3428                         goto err_ver;
3429                 }
3430                 memset(adapter->coal_conf, 0, sizeof(*adapter->coal_conf));
3431                 adapter->coal_conf->coalMode = VMXNET3_COALESCE_DISABLED;
3432                 adapter->default_coal_mode = true;
3433         }
3434
3435         SET_NETDEV_DEV(netdev, &pdev->dev);
3436         vmxnet3_declare_features(adapter, dma64);
3437
3438         adapter->rxdata_desc_size = VMXNET3_VERSION_GE_3(adapter) ?
3439                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
3440
3441         if (adapter->num_tx_queues == adapter->num_rx_queues)
3442                 adapter->share_intr = VMXNET3_INTR_BUDDYSHARE;
3443         else
3444                 adapter->share_intr = VMXNET3_INTR_DONTSHARE;
3445
3446         vmxnet3_alloc_intr_resources(adapter);
3447
3448 #ifdef VMXNET3_RSS
3449         if (adapter->num_rx_queues > 1 &&
3450             adapter->intr.type == VMXNET3_IT_MSIX) {
3451                 adapter->rss = true;
3452                 netdev->hw_features |= NETIF_F_RXHASH;
3453                 netdev->features |= NETIF_F_RXHASH;
3454                 dev_dbg(&pdev->dev, "RSS is enabled.\n");
3455         } else {
3456                 adapter->rss = false;
3457         }
3458 #endif
3459
3460         vmxnet3_read_mac_addr(adapter, mac);
3461         memcpy(netdev->dev_addr,  mac, netdev->addr_len);
3462
3463         netdev->netdev_ops = &vmxnet3_netdev_ops;
3464         vmxnet3_set_ethtool_ops(netdev);
3465         netdev->watchdog_timeo = 5 * HZ;
3466
3467         INIT_WORK(&adapter->work, vmxnet3_reset_work);
3468         set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
3469
3470         if (adapter->intr.type == VMXNET3_IT_MSIX) {
3471                 int i;
3472                 for (i = 0; i < adapter->num_rx_queues; i++) {
3473                         netif_napi_add(adapter->netdev,
3474                                        &adapter->rx_queue[i].napi,
3475                                        vmxnet3_poll_rx_only, 64);
3476                 }
3477         } else {
3478                 netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi,
3479                                vmxnet3_poll, 64);
3480         }
3481
3482         netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
3483         netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues);
3484
3485         netif_carrier_off(netdev);
3486         err = register_netdev(netdev);
3487
3488         if (err) {
3489                 dev_err(&pdev->dev, "Failed to register adapter\n");
3490                 goto err_register;
3491         }
3492
3493         vmxnet3_check_link(adapter, false);
3494         return 0;
3495
3496 err_register:
3497         if (VMXNET3_VERSION_GE_3(adapter)) {
3498                 dma_free_coherent(&adapter->pdev->dev,
3499                                   sizeof(struct Vmxnet3_CoalesceScheme),
3500                                   adapter->coal_conf, adapter->coal_conf_pa);
3501         }
3502         vmxnet3_free_intr_resources(adapter);
3503 err_ver:
3504         vmxnet3_free_pci_resources(adapter);
3505 err_alloc_pci:
3506 #ifdef VMXNET3_RSS
3507         dma_free_coherent(&adapter->pdev->dev, sizeof(struct UPT1_RSSConf),
3508                           adapter->rss_conf, adapter->rss_conf_pa);
3509 err_alloc_rss:
3510 #endif
3511         dma_free_coherent(&adapter->pdev->dev, sizeof(struct Vmxnet3_PMConf),
3512                           adapter->pm_conf, adapter->pm_conf_pa);
3513 err_alloc_pm:
3514         dma_free_coherent(&adapter->pdev->dev, size, adapter->tqd_start,
3515                           adapter->queue_desc_pa);
3516 err_alloc_queue_desc:
3517         dma_free_coherent(&adapter->pdev->dev,
3518                           sizeof(struct Vmxnet3_DriverShared),
3519                           adapter->shared, adapter->shared_pa);
3520 err_alloc_shared:
3521         dma_unmap_single(&adapter->pdev->dev, adapter->adapter_pa,
3522                          sizeof(struct vmxnet3_adapter), PCI_DMA_TODEVICE);
3523 err_set_mask:
3524         free_netdev(netdev);
3525         return err;
3526 }
3527
3528
3529 static void
3530 vmxnet3_remove_device(struct pci_dev *pdev)
3531 {
3532         struct net_device *netdev = pci_get_drvdata(pdev);
3533         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3534         int size = 0;
3535         int num_rx_queues;
3536
3537 #ifdef VMXNET3_RSS
3538         if (enable_mq)
3539                 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
3540                                     (int)num_online_cpus());
3541         else
3542 #endif
3543                 num_rx_queues = 1;
3544         num_rx_queues = rounddown_pow_of_two(num_rx_queues);
3545
3546         cancel_work_sync(&adapter->work);
3547
3548         unregister_netdev(netdev);
3549
3550         vmxnet3_free_intr_resources(adapter);
3551         vmxnet3_free_pci_resources(adapter);
3552         if (VMXNET3_VERSION_GE_3(adapter)) {
3553                 dma_free_coherent(&adapter->pdev->dev,
3554                                   sizeof(struct Vmxnet3_CoalesceScheme),
3555                                   adapter->coal_conf, adapter->coal_conf_pa);
3556         }
3557 #ifdef VMXNET3_RSS
3558         dma_free_coherent(&adapter->pdev->dev, sizeof(struct UPT1_RSSConf),
3559                           adapter->rss_conf, adapter->rss_conf_pa);
3560 #endif
3561         dma_free_coherent(&adapter->pdev->dev, sizeof(struct Vmxnet3_PMConf),
3562                           adapter->pm_conf, adapter->pm_conf_pa);
3563
3564         size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3565         size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues;
3566         dma_free_coherent(&adapter->pdev->dev, size, adapter->tqd_start,
3567                           adapter->queue_desc_pa);
3568         dma_free_coherent(&adapter->pdev->dev,
3569                           sizeof(struct Vmxnet3_DriverShared),
3570                           adapter->shared, adapter->shared_pa);
3571         dma_unmap_single(&adapter->pdev->dev, adapter->adapter_pa,
3572                          sizeof(struct vmxnet3_adapter), PCI_DMA_TODEVICE);
3573         free_netdev(netdev);
3574 }
3575
3576 static void vmxnet3_shutdown_device(struct pci_dev *pdev)
3577 {
3578         struct net_device *netdev = pci_get_drvdata(pdev);
3579         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3580         unsigned long flags;
3581
3582         /* Reset_work may be in the middle of resetting the device, wait for its
3583          * completion.
3584          */
3585         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
3586                 msleep(1);
3587
3588         if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED,
3589                              &adapter->state)) {
3590                 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3591                 return;
3592         }
3593         spin_lock_irqsave(&adapter->cmd_lock, flags);
3594         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3595                                VMXNET3_CMD_QUIESCE_DEV);
3596         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3597         vmxnet3_disable_all_intrs(adapter);
3598
3599         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3600 }
3601
3602
3603 #ifdef CONFIG_PM
3604
3605 static int
3606 vmxnet3_suspend(struct device *device)
3607 {
3608         struct pci_dev *pdev = to_pci_dev(device);
3609         struct net_device *netdev = pci_get_drvdata(pdev);
3610         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3611         struct Vmxnet3_PMConf *pmConf;
3612         struct ethhdr *ehdr;
3613         struct arphdr *ahdr;
3614         u8 *arpreq;
3615         struct in_device *in_dev;
3616         struct in_ifaddr *ifa;
3617         unsigned long flags;
3618         int i = 0;
3619
3620         if (!netif_running(netdev))
3621                 return 0;
3622
3623         for (i = 0; i < adapter->num_rx_queues; i++)
3624                 napi_disable(&adapter->rx_queue[i].napi);
3625
3626         vmxnet3_disable_all_intrs(adapter);
3627         vmxnet3_free_irqs(adapter);
3628         vmxnet3_free_intr_resources(adapter);
3629
3630         netif_device_detach(netdev);
3631
3632         /* Create wake-up filters. */
3633         pmConf = adapter->pm_conf;
3634         memset(pmConf, 0, sizeof(*pmConf));
3635
3636         if (adapter->wol & WAKE_UCAST) {
3637                 pmConf->filters[i].patternSize = ETH_ALEN;
3638                 pmConf->filters[i].maskSize = 1;
3639                 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
3640                 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
3641
3642                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3643                 i++;
3644         }
3645
3646         if (adapter->wol & WAKE_ARP) {
3647                 in_dev = in_dev_get(netdev);
3648                 if (!in_dev)
3649                         goto skip_arp;
3650
3651                 ifa = (struct in_ifaddr *)in_dev->ifa_list;
3652                 if (!ifa)
3653                         goto skip_arp;
3654
3655                 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
3656                         sizeof(struct arphdr) +         /* ARP header */
3657                         2 * ETH_ALEN +          /* 2 Ethernet addresses*/
3658                         2 * sizeof(u32);        /*2 IPv4 addresses */
3659                 pmConf->filters[i].maskSize =
3660                         (pmConf->filters[i].patternSize - 1) / 8 + 1;
3661
3662                 /* ETH_P_ARP in Ethernet header. */
3663                 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
3664                 ehdr->h_proto = htons(ETH_P_ARP);
3665
3666                 /* ARPOP_REQUEST in ARP header. */
3667                 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
3668                 ahdr->ar_op = htons(ARPOP_REQUEST);
3669                 arpreq = (u8 *)(ahdr + 1);
3670
3671                 /* The Unicast IPv4 address in 'tip' field. */
3672                 arpreq += 2 * ETH_ALEN + sizeof(u32);
3673                 *(u32 *)arpreq = ifa->ifa_address;
3674
3675                 /* The mask for the relevant bits. */
3676                 pmConf->filters[i].mask[0] = 0x00;
3677                 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
3678                 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
3679                 pmConf->filters[i].mask[3] = 0x00;
3680                 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
3681                 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
3682                 in_dev_put(in_dev);
3683
3684                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3685                 i++;
3686         }
3687
3688 skip_arp:
3689         if (adapter->wol & WAKE_MAGIC)
3690                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC;
3691
3692         pmConf->numFilters = i;
3693
3694         adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
3695         adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
3696                                                                   *pmConf));
3697         adapter->shared->devRead.pmConfDesc.confPA =
3698                 cpu_to_le64(adapter->pm_conf_pa);
3699
3700         spin_lock_irqsave(&adapter->cmd_lock, flags);
3701         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3702                                VMXNET3_CMD_UPDATE_PMCFG);
3703         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3704
3705         pci_save_state(pdev);
3706         pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
3707                         adapter->wol);
3708         pci_disable_device(pdev);
3709         pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
3710
3711         return 0;
3712 }
3713
3714
3715 static int
3716 vmxnet3_resume(struct device *device)
3717 {
3718         int err;
3719         unsigned long flags;
3720         struct pci_dev *pdev = to_pci_dev(device);
3721         struct net_device *netdev = pci_get_drvdata(pdev);
3722         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3723
3724         if (!netif_running(netdev))
3725                 return 0;
3726
3727         pci_set_power_state(pdev, PCI_D0);
3728         pci_restore_state(pdev);
3729         err = pci_enable_device_mem(pdev);
3730         if (err != 0)
3731                 return err;
3732
3733         pci_enable_wake(pdev, PCI_D0, 0);
3734
3735         vmxnet3_alloc_intr_resources(adapter);
3736
3737         /* During hibernate and suspend, device has to be reinitialized as the
3738          * device state need not be preserved.
3739          */
3740
3741         /* Need not check adapter state as other reset tasks cannot run during
3742          * device resume.
3743          */
3744         spin_lock_irqsave(&adapter->cmd_lock, flags);
3745         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3746                                VMXNET3_CMD_QUIESCE_DEV);
3747         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3748         vmxnet3_tq_cleanup_all(adapter);
3749         vmxnet3_rq_cleanup_all(adapter);
3750
3751         vmxnet3_reset_dev(adapter);
3752         err = vmxnet3_activate_dev(adapter);
3753         if (err != 0) {
3754                 netdev_err(netdev,
3755                            "failed to re-activate on resume, error: %d", err);
3756                 vmxnet3_force_close(adapter);
3757                 return err;
3758         }
3759         netif_device_attach(netdev);
3760
3761         return 0;
3762 }
3763
3764 static const struct dev_pm_ops vmxnet3_pm_ops = {
3765         .suspend = vmxnet3_suspend,
3766         .resume = vmxnet3_resume,
3767         .freeze = vmxnet3_suspend,
3768         .restore = vmxnet3_resume,
3769 };
3770 #endif
3771
3772 static struct pci_driver vmxnet3_driver = {
3773         .name           = vmxnet3_driver_name,
3774         .id_table       = vmxnet3_pciid_table,
3775         .probe          = vmxnet3_probe_device,
3776         .remove         = vmxnet3_remove_device,
3777         .shutdown       = vmxnet3_shutdown_device,
3778 #ifdef CONFIG_PM
3779         .driver.pm      = &vmxnet3_pm_ops,
3780 #endif
3781 };
3782
3783
3784 static int __init
3785 vmxnet3_init_module(void)
3786 {
3787         pr_info("%s - version %s\n", VMXNET3_DRIVER_DESC,
3788                 VMXNET3_DRIVER_VERSION_REPORT);
3789         return pci_register_driver(&vmxnet3_driver);
3790 }
3791
3792 module_init(vmxnet3_init_module);
3793
3794
3795 static void
3796 vmxnet3_exit_module(void)
3797 {
3798         pci_unregister_driver(&vmxnet3_driver);
3799 }
3800
3801 module_exit(vmxnet3_exit_module);
3802
3803 MODULE_AUTHOR("VMware, Inc.");
3804 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
3805 MODULE_LICENSE("GPL v2");
3806 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);