drivers/net/vmxnet3/vmxnet3_drv.c

   1 /*
   2  * Linux driver for VMware's vmxnet3 ethernet NIC.
   3  *
   4  * Copyright (C) 2008-2016, VMware, Inc. All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License as published by the
   8  * Free Software Foundation; version 2 of the License and no later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  * NON INFRINGEMENT. See the GNU General Public License for more
  14  * details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * The full GNU General Public License is included in this distribution in
  21  * the file called "COPYING".
  22  *
  23  * Maintained by: pv-drivers@vmware.com
  24  *
  25  */
  26
  27 #include <linux/module.h>
  28 #include <net/ip6_checksum.h>
  29
  30 #include "vmxnet3_int.h"
  31
  32 char vmxnet3_driver_name[] = "vmxnet3";
  33 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
  34
  35 /*
  36  * PCI Device ID Table
  37  * Last entry must be all 0s
  38  */
  39 static const struct pci_device_id vmxnet3_pciid_table[] = {
  40         {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
  41         {0}
  42 };
  43
  44 MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
  45
  46 static int enable_mq = 1;
  47
  48 static void
  49 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac);
  50
  51 /*
  52  *    Enable/Disable the given intr
  53  */
  54 static void
  55 vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
  56 {
  57         VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
  58 }
  59
  60
  61 static void
  62 vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
  63 {
  64         VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
  65 }
  66
  67
  68 /*
  69  *    Enable/Disable all intrs used by the device
  70  */
  71 static void
  72 vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
  73 {
  74         int i;
  75
  76         for (i = 0; i < adapter->intr.num_intrs; i++)
  77                 vmxnet3_enable_intr(adapter, i);
  78         adapter->shared->devRead.intrConf.intrCtrl &=
  79                                         cpu_to_le32(~VMXNET3_IC_DISABLE_ALL);
  80 }
  81
  82
  83 static void
  84 vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
  85 {
  86         int i;
  87
  88         adapter->shared->devRead.intrConf.intrCtrl |=
  89                                         cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
  90         for (i = 0; i < adapter->intr.num_intrs; i++)
  91                 vmxnet3_disable_intr(adapter, i);
  92 }
  93
  94
  95 static void
  96 vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
  97 {
  98         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
  99 }
 100
 101
 102 static bool
 103 vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 104 {
 105         return tq->stopped;
 106 }
 107
 108
 109 static void
 110 vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 111 {
 112         tq->stopped = false;
 113         netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue);
 114 }
 115
 116
 117 static void
 118 vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 119 {
 120         tq->stopped = false;
 121         netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue));
 122 }
 123
 124
 125 static void
 126 vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 127 {
 128         tq->stopped = true;
 129         tq->num_stop++;
 130         netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue));
 131 }
 132
 133
 134 /*
 135  * Check the link state. This may start or stop the tx queue.
 136  */
 137 static void
 138 vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
 139 {
 140         u32 ret;
 141         int i;
 142         unsigned long flags;
 143
 144         spin_lock_irqsave(&adapter->cmd_lock, flags);
 145         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
 146         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
 147         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 148
 149         adapter->link_speed = ret >> 16;
 150         if (ret & 1) { /* Link is up. */
 151                 netdev_info(adapter->netdev, "NIC Link is Up %d Mbps\n",
 152                             adapter->link_speed);
 153                 netif_carrier_on(adapter->netdev);
 154
 155                 if (affectTxQueue) {
 156                         for (i = 0; i < adapter->num_tx_queues; i++)
 157                                 vmxnet3_tq_start(&adapter->tx_queue[i],
 158                                                  adapter);
 159                 }
 160         } else {
 161                 netdev_info(adapter->netdev, "NIC Link is Down\n");
 162                 netif_carrier_off(adapter->netdev);
 163
 164                 if (affectTxQueue) {
 165                         for (i = 0; i < adapter->num_tx_queues; i++)
 166                                 vmxnet3_tq_stop(&adapter->tx_queue[i], adapter);
 167                 }
 168         }
 169 }
 170
 171 static void
 172 vmxnet3_process_events(struct vmxnet3_adapter *adapter)
 173 {
 174         int i;
 175         unsigned long flags;
 176         u32 events = le32_to_cpu(adapter->shared->ecr);
 177         if (!events)
 178                 return;
 179
 180         vmxnet3_ack_events(adapter, events);
 181
 182         /* Check if link state has changed */
 183         if (events & VMXNET3_ECR_LINK)
 184                 vmxnet3_check_link(adapter, true);
 185
 186         /* Check if there is an error on xmit/recv queues */
 187         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
 188                 spin_lock_irqsave(&adapter->cmd_lock, flags);
 189                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
 190                                        VMXNET3_CMD_GET_QUEUE_STATUS);
 191                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 192
 193                 for (i = 0; i < adapter->num_tx_queues; i++)
 194                         if (adapter->tqd_start[i].status.stopped)
 195                                 dev_err(&adapter->netdev->dev,
 196                                         "%s: tq[%d] error 0x%x\n",
 197                                         adapter->netdev->name, i, le32_to_cpu(
 198                                         adapter->tqd_start[i].status.error));
 199                 for (i = 0; i < adapter->num_rx_queues; i++)
 200                         if (adapter->rqd_start[i].status.stopped)
 201                                 dev_err(&adapter->netdev->dev,
 202                                         "%s: rq[%d] error 0x%x\n",
 203                                         adapter->netdev->name, i,
 204                                         adapter->rqd_start[i].status.error);
 205
 206                 schedule_work(&adapter->work);
 207         }
 208 }
 209
 210 #ifdef __BIG_ENDIAN_BITFIELD
 211 /*
 212  * The device expects the bitfields in shared structures to be written in
 213  * little endian. When CPU is big endian, the following routines are used to
 214  * correctly read and write into ABI.
 215  * The general technique used here is : double word bitfields are defined in
 216  * opposite order for big endian architecture. Then before reading them in
 217  * driver the complete double word is translated using le32_to_cpu. Similarly
 218  * After the driver writes into bitfields, cpu_to_le32 is used to translate the
 219  * double words into required format.
 220  * In order to avoid touching bits in shared structure more than once, temporary
 221  * descriptors are used. These are passed as srcDesc to following functions.
 222  */
 223 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc,
 224                                 struct Vmxnet3_RxDesc *dstDesc)
 225 {
 226         u32 *src = (u32 *)srcDesc + 2;
 227         u32 *dst = (u32 *)dstDesc + 2;
 228         dstDesc->addr = le64_to_cpu(srcDesc->addr);
 229         *dst = le32_to_cpu(*src);
 230         dstDesc->ext1 = le32_to_cpu(srcDesc->ext1);
 231 }
 232
 233 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc,
 234                                struct Vmxnet3_TxDesc *dstDesc)
 235 {
 236         int i;
 237         u32 *src = (u32 *)(srcDesc + 1);
 238         u32 *dst = (u32 *)(dstDesc + 1);
 239
 240         /* Working backwards so that the gen bit is set at the end. */
 241         for (i = 2; i > 0; i--) {
 242                 src--;
 243                 dst--;
 244                 *dst = cpu_to_le32(*src);
 245         }
 246 }
 247
 248
 249 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc,
 250                                 struct Vmxnet3_RxCompDesc *dstDesc)
 251 {
 252         int i = 0;
 253         u32 *src = (u32 *)srcDesc;
 254         u32 *dst = (u32 *)dstDesc;
 255         for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) {
 256                 *dst = le32_to_cpu(*src);
 257                 src++;
 258                 dst++;
 259         }
 260 }
 261
 262
 263 /* Used to read bitfield values from double words. */
 264 static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size)
 265 {
 266         u32 temp = le32_to_cpu(*bitfield);
 267         u32 mask = ((1 << size) - 1) << pos;
 268         temp &= mask;
 269         temp >>= pos;
 270         return temp;
 271 }
 272
 273
 274
 275 #endif  /* __BIG_ENDIAN_BITFIELD */
 276
 277 #ifdef __BIG_ENDIAN_BITFIELD
 278
 279 #   define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
 280                         txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
 281                         VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
 282 #   define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
 283                         txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
 284                         VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
 285 #   define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
 286                         VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
 287                         VMXNET3_TCD_GEN_SIZE)
 288 #   define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
 289                         VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
 290 #   define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
 291                         (dstrcd) = (tmp); \
 292                         vmxnet3_RxCompToCPU((rcd), (tmp)); \
 293                 } while (0)
 294 #   define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
 295                         (dstrxd) = (tmp); \
 296                         vmxnet3_RxDescToCPU((rxd), (tmp)); \
 297                 } while (0)
 298
 299 #else
 300
 301 #   define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
 302 #   define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
 303 #   define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
 304 #   define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
 305 #   define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
 306 #   define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
 307
 308 #endif /* __BIG_ENDIAN_BITFIELD  */
 309
 310
 311 static void
 312 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
 313                      struct pci_dev *pdev)
 314 {
 315         if (tbi->map_type == VMXNET3_MAP_SINGLE)
 316                 dma_unmap_single(&pdev->dev, tbi->dma_addr, tbi->len,
 317                                  PCI_DMA_TODEVICE);
 318         else if (tbi->map_type == VMXNET3_MAP_PAGE)
 319                 dma_unmap_page(&pdev->dev, tbi->dma_addr, tbi->len,
 320                                PCI_DMA_TODEVICE);
 321         else
 322                 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
 323
 324         tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
 325 }
 326
 327
 328 static int
 329 vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
 330                   struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
 331 {
 332         struct sk_buff *skb;
 333         int entries = 0;
 334
 335         /* no out of order completion */
 336         BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
 337         BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1);
 338
 339         skb = tq->buf_info[eop_idx].skb;
 340         BUG_ON(skb == NULL);
 341         tq->buf_info[eop_idx].skb = NULL;
 342
 343         VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
 344
 345         while (tq->tx_ring.next2comp != eop_idx) {
 346                 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
 347                                      pdev);
 348
 349                 /* update next2comp w/o tx_lock. Since we are marking more,
 350                  * instead of less, tx ring entries avail, the worst case is
 351                  * that the tx routine incorrectly re-queues a pkt due to
 352                  * insufficient tx ring entries.
 353                  */
 354                 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
 355                 entries++;
 356         }
 357
 358         dev_kfree_skb_any(skb);
 359         return entries;
 360 }
 361
 362
 363 static int
 364 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
 365                         struct vmxnet3_adapter *adapter)
 366 {
 367         int completed = 0;
 368         union Vmxnet3_GenericDesc *gdesc;
 369
 370         gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
 371         while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) {
 372                 /* Prevent any &gdesc->tcd field from being (speculatively)
 373                  * read before (&gdesc->tcd)->gen is read.
 374                  */
 375                 dma_rmb();
 376
 377                 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
 378                                                &gdesc->tcd), tq, adapter->pdev,
 379                                                adapter);
 380
 381                 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
 382                 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
 383         }
 384
 385         if (completed) {
 386                 spin_lock(&tq->tx_lock);
 387                 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
 388                              vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
 389                              VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
 390                              netif_carrier_ok(adapter->netdev))) {
 391                         vmxnet3_tq_wake(tq, adapter);
 392                 }
 393                 spin_unlock(&tq->tx_lock);
 394         }
 395         return completed;
 396 }
 397
 398
 399 static void
 400 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
 401                    struct vmxnet3_adapter *adapter)
 402 {
 403         int i;
 404
 405         while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
 406                 struct vmxnet3_tx_buf_info *tbi;
 407
 408                 tbi = tq->buf_info + tq->tx_ring.next2comp;
 409
 410                 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
 411                 if (tbi->skb) {
 412                         dev_kfree_skb_any(tbi->skb);
 413                         tbi->skb = NULL;
 414                 }
 415                 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
 416         }
 417
 418         /* sanity check, verify all buffers are indeed unmapped and freed */
 419         for (i = 0; i < tq->tx_ring.size; i++) {
 420                 BUG_ON(tq->buf_info[i].skb != NULL ||
 421                        tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
 422         }
 423
 424         tq->tx_ring.gen = VMXNET3_INIT_GEN;
 425         tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
 426
 427         tq->comp_ring.gen = VMXNET3_INIT_GEN;
 428         tq->comp_ring.next2proc = 0;
 429 }
 430
 431
 432 static void
 433 vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
 434                    struct vmxnet3_adapter *adapter)
 435 {
 436         if (tq->tx_ring.base) {
 437                 dma_free_coherent(&adapter->pdev->dev, tq->tx_ring.size *
 438                                   sizeof(struct Vmxnet3_TxDesc),
 439                                   tq->tx_ring.base, tq->tx_ring.basePA);
 440                 tq->tx_ring.base = NULL;
 441         }
 442         if (tq->data_ring.base) {
 443                 dma_free_coherent(&adapter->pdev->dev,
 444                                   tq->data_ring.size * tq->txdata_desc_size,
 445                                   tq->data_ring.base, tq->data_ring.basePA);
 446                 tq->data_ring.base = NULL;
 447         }
 448         if (tq->comp_ring.base) {
 449                 dma_free_coherent(&adapter->pdev->dev, tq->comp_ring.size *
 450                                   sizeof(struct Vmxnet3_TxCompDesc),
 451                                   tq->comp_ring.base, tq->comp_ring.basePA);
 452                 tq->comp_ring.base = NULL;
 453         }
 454         if (tq->buf_info) {
 455                 dma_free_coherent(&adapter->pdev->dev,
 456                                   tq->tx_ring.size * sizeof(tq->buf_info[0]),
 457                                   tq->buf_info, tq->buf_info_pa);
 458                 tq->buf_info = NULL;
 459         }
 460 }
 461
 462
 463 /* Destroy all tx queues */
 464 void
 465 vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter)
 466 {
 467         int i;
 468
 469         for (i = 0; i < adapter->num_tx_queues; i++)
 470                 vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter);
 471 }
 472
 473
 474 static void
 475 vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
 476                 struct vmxnet3_adapter *adapter)
 477 {
 478         int i;
 479
 480         /* reset the tx ring contents to 0 and reset the tx ring states */
 481         memset(tq->tx_ring.base, 0, tq->tx_ring.size *
 482                sizeof(struct Vmxnet3_TxDesc));
 483         tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
 484         tq->tx_ring.gen = VMXNET3_INIT_GEN;
 485
 486         memset(tq->data_ring.base, 0,
 487                tq->data_ring.size * tq->txdata_desc_size);
 488
 489         /* reset the tx comp ring contents to 0 and reset comp ring states */
 490         memset(tq->comp_ring.base, 0, tq->comp_ring.size *
 491                sizeof(struct Vmxnet3_TxCompDesc));
 492         tq->comp_ring.next2proc = 0;
 493         tq->comp_ring.gen = VMXNET3_INIT_GEN;
 494
 495         /* reset the bookkeeping data */
 496         memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
 497         for (i = 0; i < tq->tx_ring.size; i++)
 498                 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
 499
 500         /* stats are not reset */
 501 }
 502
 503
 504 static int
 505 vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
 506                   struct vmxnet3_adapter *adapter)
 507 {
 508         size_t sz;
 509
 510         BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
 511                tq->comp_ring.base || tq->buf_info);
 512
 513         tq->tx_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
 514                         tq->tx_ring.size * sizeof(struct Vmxnet3_TxDesc),
 515                         &tq->tx_ring.basePA, GFP_KERNEL);
 516         if (!tq->tx_ring.base) {
 517                 netdev_err(adapter->netdev, "failed to allocate tx ring\n");
 518                 goto err;
 519         }
 520
 521         tq->data_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
 522                         tq->data_ring.size * tq->txdata_desc_size,
 523                         &tq->data_ring.basePA, GFP_KERNEL);
 524         if (!tq->data_ring.base) {
 525                 netdev_err(adapter->netdev, "failed to allocate tx data ring\n");
 526                 goto err;
 527         }
 528
 529         tq->comp_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
 530                         tq->comp_ring.size * sizeof(struct Vmxnet3_TxCompDesc),
 531                         &tq->comp_ring.basePA, GFP_KERNEL);
 532         if (!tq->comp_ring.base) {
 533                 netdev_err(adapter->netdev, "failed to allocate tx comp ring\n");
 534                 goto err;
 535         }
 536
 537         sz = tq->tx_ring.size * sizeof(tq->buf_info[0]);
 538         tq->buf_info = dma_zalloc_coherent(&adapter->pdev->dev, sz,
 539                                            &tq->buf_info_pa, GFP_KERNEL);
 540         if (!tq->buf_info)
 541                 goto err;
 542
 543         return 0;
 544
 545 err:
 546         vmxnet3_tq_destroy(tq, adapter);
 547         return -ENOMEM;
 548 }
 549
 550 static void
 551 vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter)
 552 {
 553         int i;
 554
 555         for (i = 0; i < adapter->num_tx_queues; i++)
 556                 vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter);
 557 }
 558
 559 /*
 560  *    starting from ring->next2fill, allocate rx buffers for the given ring
 561  *    of the rx queue and update the rx desc. stop after @num_to_alloc buffers
 562  *    are allocated or allocation fails
 563  */
 564
 565 static int
 566 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
 567                         int num_to_alloc, struct vmxnet3_adapter *adapter)
 568 {
 569         int num_allocated = 0;
 570         struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
 571         struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
 572         u32 val;
 573
 574         while (num_allocated <= num_to_alloc) {
 575                 struct vmxnet3_rx_buf_info *rbi;
 576                 union Vmxnet3_GenericDesc *gd;
 577
 578                 rbi = rbi_base + ring->next2fill;
 579                 gd = ring->base + ring->next2fill;
 580
 581                 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
 582                         if (rbi->skb == NULL) {
 583                                 rbi->skb = __netdev_alloc_skb_ip_align(adapter->netdev,
 584                                                                        rbi->len,
 585                                                                        GFP_KERNEL);
 586                                 if (unlikely(rbi->skb == NULL)) {
 587                                         rq->stats.rx_buf_alloc_failure++;
 588                                         break;
 589                                 }
 590
 591                                 rbi->dma_addr = dma_map_single(
 592                                                 &adapter->pdev->dev,
 593                                                 rbi->skb->data, rbi->len,
 594                                                 PCI_DMA_FROMDEVICE);
 595                                 if (dma_mapping_error(&adapter->pdev->dev,
 596                                                       rbi->dma_addr)) {
 597                                         dev_kfree_skb_any(rbi->skb);
 598                                         rq->stats.rx_buf_alloc_failure++;
 599                                         break;
 600                                 }
 601                         } else {
 602                                 /* rx buffer skipped by the device */
 603                         }
 604                         val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
 605                 } else {
 606                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
 607                                rbi->len  != PAGE_SIZE);
 608
 609                         if (rbi->page == NULL) {
 610                                 rbi->page = alloc_page(GFP_ATOMIC);
 611                                 if (unlikely(rbi->page == NULL)) {
 612                                         rq->stats.rx_buf_alloc_failure++;
 613                                         break;
 614                                 }
 615                                 rbi->dma_addr = dma_map_page(
 616                                                 &adapter->pdev->dev,
 617                                                 rbi->page, 0, PAGE_SIZE,
 618                                                 PCI_DMA_FROMDEVICE);
 619                                 if (dma_mapping_error(&adapter->pdev->dev,
 620                                                       rbi->dma_addr)) {
 621                                         put_page(rbi->page);
 622                                         rq->stats.rx_buf_alloc_failure++;
 623                                         break;
 624                                 }
 625                         } else {
 626                                 /* rx buffers skipped by the device */
 627                         }
 628                         val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
 629                 }
 630
 631                 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
 632                 gd->dword[2] = cpu_to_le32((!ring->gen << VMXNET3_RXD_GEN_SHIFT)
 633                                            | val | rbi->len);
 634
 635                 /* Fill the last buffer but dont mark it ready, or else the
 636                  * device will think that the queue is full */
 637                 if (num_allocated == num_to_alloc)
 638                         break;
 639
 640                 gd->dword[2] |= cpu_to_le32(ring->gen << VMXNET3_RXD_GEN_SHIFT);
 641                 num_allocated++;
 642                 vmxnet3_cmd_ring_adv_next2fill(ring);
 643         }
 644
 645         netdev_dbg(adapter->netdev,
 646                 "alloc_rx_buf: %d allocated, next2fill %u, next2comp %u\n",
 647                 num_allocated, ring->next2fill, ring->next2comp);
 648
 649         /* so that the device can distinguish a full ring and an empty ring */
 650         BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
 651
 652         return num_allocated;
 653 }
 654
 655
 656 static void
 657 vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
 658                     struct vmxnet3_rx_buf_info *rbi)
 659 {
 660         struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
 661                 skb_shinfo(skb)->nr_frags;
 662
 663         BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
 664
 665         __skb_frag_set_page(frag, rbi->page);
 666         frag->page_offset = 0;
 667         skb_frag_size_set(frag, rcd->len);
 668         skb->data_len += rcd->len;
 669         skb->truesize += PAGE_SIZE;
 670         skb_shinfo(skb)->nr_frags++;
 671 }
 672
 673
 674 static int
 675 vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
 676                 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
 677                 struct vmxnet3_adapter *adapter)
 678 {
 679         u32 dw2, len;
 680         unsigned long buf_offset;
 681         int i;
 682         union Vmxnet3_GenericDesc *gdesc;
 683         struct vmxnet3_tx_buf_info *tbi = NULL;
 684
 685         BUG_ON(ctx->copy_size > skb_headlen(skb));
 686
 687         /* use the previous gen bit for the SOP desc */
 688         dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
 689
 690         ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
 691         gdesc = ctx->sop_txd; /* both loops below can be skipped */
 692
 693         /* no need to map the buffer if headers are copied */
 694         if (ctx->copy_size) {
 695                 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA +
 696                                         tq->tx_ring.next2fill *
 697                                         tq->txdata_desc_size);
 698                 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size);
 699                 ctx->sop_txd->dword[3] = 0;
 700
 701                 tbi = tq->buf_info + tq->tx_ring.next2fill;
 702                 tbi->map_type = VMXNET3_MAP_NONE;
 703
 704                 netdev_dbg(adapter->netdev,
 705                         "txd[%u]: 0x%Lx 0x%x 0x%x\n",
 706                         tq->tx_ring.next2fill,
 707                         le64_to_cpu(ctx->sop_txd->txd.addr),
 708                         ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
 709                 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
 710
 711                 /* use the right gen for non-SOP desc */
 712                 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 713         }
 714
 715         /* linear part can use multiple tx desc if it's big */
 716         len = skb_headlen(skb) - ctx->copy_size;
 717         buf_offset = ctx->copy_size;
 718         while (len) {
 719                 u32 buf_size;
 720
 721                 if (len < VMXNET3_MAX_TX_BUF_SIZE) {
 722                         buf_size = len;
 723                         dw2 |= len;
 724                 } else {
 725                         buf_size = VMXNET3_MAX_TX_BUF_SIZE;
 726                         /* spec says that for TxDesc.len, 0 == 2^14 */
 727                 }
 728
 729                 tbi = tq->buf_info + tq->tx_ring.next2fill;
 730                 tbi->map_type = VMXNET3_MAP_SINGLE;
 731                 tbi->dma_addr = dma_map_single(&adapter->pdev->dev,
 732                                 skb->data + buf_offset, buf_size,
 733                                 PCI_DMA_TODEVICE);
 734                 if (dma_mapping_error(&adapter->pdev->dev, tbi->dma_addr))
 735                         return -EFAULT;
 736
 737                 tbi->len = buf_size;
 738
 739                 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
 740                 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
 741
 742                 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
 743                 gdesc->dword[2] = cpu_to_le32(dw2);
 744                 gdesc->dword[3] = 0;
 745
 746                 netdev_dbg(adapter->netdev,
 747                         "txd[%u]: 0x%Lx 0x%x 0x%x\n",
 748                         tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
 749                         le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
 750                 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
 751                 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 752
 753                 len -= buf_size;
 754                 buf_offset += buf_size;
 755         }
 756
 757         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
 758                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
 759                 u32 buf_size;
 760
 761                 buf_offset = 0;
 762                 len = skb_frag_size(frag);
 763                 while (len) {
 764                         tbi = tq->buf_info + tq->tx_ring.next2fill;
 765                         if (len < VMXNET3_MAX_TX_BUF_SIZE) {
 766                                 buf_size = len;
 767                                 dw2 |= len;
 768                         } else {
 769                                 buf_size = VMXNET3_MAX_TX_BUF_SIZE;
 770                                 /* spec says that for TxDesc.len, 0 == 2^14 */
 771                         }
 772                         tbi->map_type = VMXNET3_MAP_PAGE;
 773                         tbi->dma_addr = skb_frag_dma_map(&adapter->pdev->dev, frag,
 774                                                          buf_offset, buf_size,
 775                                                          DMA_TO_DEVICE);
 776                         if (dma_mapping_error(&adapter->pdev->dev, tbi->dma_addr))
 777                                 return -EFAULT;
 778
 779                         tbi->len = buf_size;
 780
 781                         gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
 782                         BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
 783
 784                         gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
 785                         gdesc->dword[2] = cpu_to_le32(dw2);
 786                         gdesc->dword[3] = 0;
 787
 788                         netdev_dbg(adapter->netdev,
 789                                 "txd[%u]: 0x%llx %u %u\n",
 790                                 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
 791                                 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
 792                         vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
 793                         dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 794
 795                         len -= buf_size;
 796                         buf_offset += buf_size;
 797                 }
 798         }
 799
 800         ctx->eop_txd = gdesc;
 801
 802         /* set the last buf_info for the pkt */
 803         tbi->skb = skb;
 804         tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
 805
 806         return 0;
 807 }
 808
 809
 810 /* Init all tx queues */
 811 static void
 812 vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter)
 813 {
 814         int i;
 815
 816         for (i = 0; i < adapter->num_tx_queues; i++)
 817                 vmxnet3_tq_init(&adapter->tx_queue[i], adapter);
 818 }
 819
 820
 821 /*
 822  *    parse relevant protocol headers:
 823  *      For a tso pkt, relevant headers are L2/3/4 including options
 824  *      For a pkt requesting csum offloading, they are L2/3 and may include L4
 825  *      if it's a TCP/UDP pkt
 826  *
 827  * Returns:
 828  *    -1:  error happens during parsing
 829  *     0:  protocol headers parsed, but too big to be copied
 830  *     1:  protocol headers parsed and copied
 831  *
 832  * Other effects:
 833  *    1. related *ctx fields are updated.
 834  *    2. ctx->copy_size is # of bytes copied
 835  *    3. the portion to be copied is guaranteed to be in the linear part
 836  *
 837  */
 838 static int
 839 vmxnet3_parse_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
 840                   struct vmxnet3_tx_ctx *ctx,
 841                   struct vmxnet3_adapter *adapter)
 842 {
 843         u8 protocol = 0;
 844
 845         if (ctx->mss) { /* TSO */
 846                 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
 847                 ctx->l4_hdr_size = tcp_hdrlen(skb);
 848                 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
 849         } else {
 850                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
 851                         ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb);
 852
 853                         if (ctx->ipv4) {
 854                                 const struct iphdr *iph = ip_hdr(skb);
 855
 856                                 protocol = iph->protocol;
 857                         } else if (ctx->ipv6) {
 858                                 const struct ipv6hdr *ipv6h = ipv6_hdr(skb);
 859
 860                                 protocol = ipv6h->nexthdr;
 861                         }
 862
 863                         switch (protocol) {
 864                         case IPPROTO_TCP:
 865                                 ctx->l4_hdr_size = tcp_hdrlen(skb);
 866                                 break;
 867                         case IPPROTO_UDP:
 868                                 ctx->l4_hdr_size = sizeof(struct udphdr);
 869                                 break;
 870                         default:
 871                                 ctx->l4_hdr_size = 0;
 872                                 break;
 873                         }
 874
 875                         ctx->copy_size = min(ctx->eth_ip_hdr_size +
 876                                          ctx->l4_hdr_size, skb->len);
 877                 } else {
 878                         ctx->eth_ip_hdr_size = 0;
 879                         ctx->l4_hdr_size = 0;
 880                         /* copy as much as allowed */
 881                         ctx->copy_size = min_t(unsigned int,
 882                                                tq->txdata_desc_size,
 883                                                skb_headlen(skb));
 884                 }
 885
 886                 if (skb->len <= VMXNET3_HDR_COPY_SIZE)
 887                         ctx->copy_size = skb->len;
 888
 889                 /* make sure headers are accessible directly */
 890                 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
 891                         goto err;
 892         }
 893
 894         if (unlikely(ctx->copy_size > tq->txdata_desc_size)) {
 895                 tq->stats.oversized_hdr++;
 896                 ctx->copy_size = 0;
 897                 return 0;
 898         }
 899
 900         return 1;
 901 err:
 902         return -1;
 903 }
 904
 905 /*
 906  *    copy relevant protocol headers to the transmit ring:
 907  *      For a tso pkt, relevant headers are L2/3/4 including options
 908  *      For a pkt requesting csum offloading, they are L2/3 and may include L4
 909  *      if it's a TCP/UDP pkt
 910  *
 911  *
 912  *    Note that this requires that vmxnet3_parse_hdr be called first to set the
 913  *      appropriate bits in ctx first
 914  */
 915 static void
 916 vmxnet3_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
 917                  struct vmxnet3_tx_ctx *ctx,
 918                  struct vmxnet3_adapter *adapter)
 919 {
 920         struct Vmxnet3_TxDataDesc *tdd;
 921
 922         tdd = (struct Vmxnet3_TxDataDesc *)((u8 *)tq->data_ring.base +
 923                                             tq->tx_ring.next2fill *
 924                                             tq->txdata_desc_size);
 925
 926         memcpy(tdd->data, skb->data, ctx->copy_size);
 927         netdev_dbg(adapter->netdev,
 928                 "copy %u bytes to dataRing[%u]\n",
 929                 ctx->copy_size, tq->tx_ring.next2fill);
 930 }
 931
 932
 933 static void
 934 vmxnet3_prepare_tso(struct sk_buff *skb,
 935                     struct vmxnet3_tx_ctx *ctx)
 936 {
 937         struct tcphdr *tcph = tcp_hdr(skb);
 938
 939         if (ctx->ipv4) {
 940                 struct iphdr *iph = ip_hdr(skb);
 941
 942                 iph->check = 0;
 943                 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
 944                                                  IPPROTO_TCP, 0);
 945         } else if (ctx->ipv6) {
 946                 struct ipv6hdr *iph = ipv6_hdr(skb);
 947
 948                 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
 949                                                IPPROTO_TCP, 0);
 950         }
 951 }
 952
 953 static int txd_estimate(const struct sk_buff *skb)
 954 {
 955         int count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
 956         int i;
 957
 958         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
 959                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
 960
 961                 count += VMXNET3_TXD_NEEDED(skb_frag_size(frag));
 962         }
 963         return count;
 964 }
 965
 966 /*
 967  * Transmits a pkt thru a given tq
 968  * Returns:
 969  *    NETDEV_TX_OK:      descriptors are setup successfully
 970  *    NETDEV_TX_OK:      error occurred, the pkt is dropped
 971  *    NETDEV_TX_BUSY:    tx ring is full, queue is stopped
 972  *
 973  * Side-effects:
 974  *    1. tx ring may be changed
 975  *    2. tq stats may be updated accordingly
 976  *    3. shared->txNumDeferred may be updated
 977  */
 978
 979 static int
 980 vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
 981                 struct vmxnet3_adapter *adapter, struct net_device *netdev)
 982 {
 983         int ret;
 984         u32 count;
 985         unsigned long flags;
 986         struct vmxnet3_tx_ctx ctx;
 987         union Vmxnet3_GenericDesc *gdesc;
 988 #ifdef __BIG_ENDIAN_BITFIELD
 989         /* Use temporary descriptor to avoid touching bits multiple times */
 990         union Vmxnet3_GenericDesc tempTxDesc;
 991 #endif
 992
 993         count = txd_estimate(skb);
 994
 995         ctx.ipv4 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IP));
 996         ctx.ipv6 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IPV6));
 997
 998         ctx.mss = skb_shinfo(skb)->gso_size;
 999         if (ctx.mss) {
1000                 if (skb_header_cloned(skb)) {
1001                         if (unlikely(pskb_expand_head(skb, 0, 0,
1002                                                       GFP_ATOMIC) != 0)) {
1003                                 tq->stats.drop_tso++;
1004                                 goto drop_pkt;
1005                         }
1006                         tq->stats.copy_skb_header++;
1007                 }
1008                 vmxnet3_prepare_tso(skb, &ctx);
1009         } else {
1010                 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
1011
1012                         /* non-tso pkts must not use more than
1013                          * VMXNET3_MAX_TXD_PER_PKT entries
1014                          */
1015                         if (skb_linearize(skb) != 0) {
1016                                 tq->stats.drop_too_many_frags++;
1017                                 goto drop_pkt;
1018                         }
1019                         tq->stats.linearized++;
1020
1021                         /* recalculate the # of descriptors to use */
1022                         count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
1023                 }
1024         }
1025
1026         ret = vmxnet3_parse_hdr(skb, tq, &ctx, adapter);
1027         if (ret >= 0) {
1028                 BUG_ON(ret <= 0 && ctx.copy_size != 0);
1029                 /* hdrs parsed, check against other limits */
1030                 if (ctx.mss) {
1031                         if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
1032                                      VMXNET3_MAX_TX_BUF_SIZE)) {
1033                                 tq->stats.drop_oversized_hdr++;
1034                                 goto drop_pkt;
1035                         }
1036                 } else {
1037                         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1038                                 if (unlikely(ctx.eth_ip_hdr_size +
1039                                              skb->csum_offset >
1040                                              VMXNET3_MAX_CSUM_OFFSET)) {
1041                                         tq->stats.drop_oversized_hdr++;
1042                                         goto drop_pkt;
1043                                 }
1044                         }
1045                 }
1046         } else {
1047                 tq->stats.drop_hdr_inspect_err++;
1048                 goto drop_pkt;
1049         }
1050
1051         spin_lock_irqsave(&tq->tx_lock, flags);
1052
1053         if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
1054                 tq->stats.tx_ring_full++;
1055                 netdev_dbg(adapter->netdev,
1056                         "tx queue stopped on %s, next2comp %u"
1057                         " next2fill %u\n", adapter->netdev->name,
1058                         tq->tx_ring.next2comp, tq->tx_ring.next2fill);
1059
1060                 vmxnet3_tq_stop(tq, adapter);
1061                 spin_unlock_irqrestore(&tq->tx_lock, flags);
1062                 return NETDEV_TX_BUSY;
1063         }
1064
1065
1066         vmxnet3_copy_hdr(skb, tq, &ctx, adapter);
1067
1068         /* fill tx descs related to addr & len */
1069         if (vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter))
1070                 goto unlock_drop_pkt;
1071
1072         /* setup the EOP desc */
1073         ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP);
1074
1075         /* setup the SOP desc */
1076 #ifdef __BIG_ENDIAN_BITFIELD
1077         gdesc = &tempTxDesc;
1078         gdesc->dword[2] = ctx.sop_txd->dword[2];
1079         gdesc->dword[3] = ctx.sop_txd->dword[3];
1080 #else
1081         gdesc = ctx.sop_txd;
1082 #endif
1083         if (ctx.mss) {
1084                 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
1085                 gdesc->txd.om = VMXNET3_OM_TSO;
1086                 gdesc->txd.msscof = ctx.mss;
1087                 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len -
1088                              gdesc->txd.hlen + ctx.mss - 1) / ctx.mss);
1089         } else {
1090                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1091                         gdesc->txd.hlen = ctx.eth_ip_hdr_size;
1092                         gdesc->txd.om = VMXNET3_OM_CSUM;
1093                         gdesc->txd.msscof = ctx.eth_ip_hdr_size +
1094                                             skb->csum_offset;
1095                 } else {
1096                         gdesc->txd.om = 0;
1097                         gdesc->txd.msscof = 0;
1098                 }
1099                 le32_add_cpu(&tq->shared->txNumDeferred, 1);
1100         }
1101
1102         if (skb_vlan_tag_present(skb)) {
1103                 gdesc->txd.ti = 1;
1104                 gdesc->txd.tci = skb_vlan_tag_get(skb);
1105         }
1106
1107         /* Ensure that the write to (&gdesc->txd)->gen will be observed after
1108          * all other writes to &gdesc->txd.
1109          */
1110         dma_wmb();
1111
1112         /* finally flips the GEN bit of the SOP desc. */
1113         gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^
1114                                                   VMXNET3_TXD_GEN);
1115 #ifdef __BIG_ENDIAN_BITFIELD
1116         /* Finished updating in bitfields of Tx Desc, so write them in original
1117          * place.
1118          */
1119         vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc,
1120                            (struct Vmxnet3_TxDesc *)ctx.sop_txd);
1121         gdesc = ctx.sop_txd;
1122 #endif
1123         netdev_dbg(adapter->netdev,
1124                 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
1125                 (u32)(ctx.sop_txd -
1126                 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr),
1127                 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3]));
1128
1129         spin_unlock_irqrestore(&tq->tx_lock, flags);
1130
1131         if (le32_to_cpu(tq->shared->txNumDeferred) >=
1132                                         le32_to_cpu(tq->shared->txThreshold)) {
1133                 tq->shared->txNumDeferred = 0;
1134                 VMXNET3_WRITE_BAR0_REG(adapter,
1135                                        VMXNET3_REG_TXPROD + tq->qid * 8,
1136                                        tq->tx_ring.next2fill);
1137         }
1138
1139         return NETDEV_TX_OK;
1140
1141 unlock_drop_pkt:
1142         spin_unlock_irqrestore(&tq->tx_lock, flags);
1143 drop_pkt:
1144         tq->stats.drop_total++;
1145         dev_kfree_skb_any(skb);
1146         return NETDEV_TX_OK;
1147 }
1148
1149
1150 static netdev_tx_t
1151 vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1152 {
1153         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1154
1155         BUG_ON(skb->queue_mapping > adapter->num_tx_queues);
1156         return vmxnet3_tq_xmit(skb,
1157                                &adapter->tx_queue[skb->queue_mapping],
1158                                adapter, netdev);
1159 }
1160
1161
1162 static void
1163 vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
1164                 struct sk_buff *skb,
1165                 union Vmxnet3_GenericDesc *gdesc)
1166 {
1167         if (!gdesc->rcd.cnc && adapter->netdev->features & NETIF_F_RXCSUM) {
1168                 if (gdesc->rcd.v4 &&
1169                     (le32_to_cpu(gdesc->dword[3]) &
1170                      VMXNET3_RCD_CSUM_OK) == VMXNET3_RCD_CSUM_OK) {
1171                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1172                         BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1173                         BUG_ON(gdesc->rcd.frg);
1174                 } else if (gdesc->rcd.v6 && (le32_to_cpu(gdesc->dword[3]) &
1175                                              (1 << VMXNET3_RCD_TUC_SHIFT))) {
1176                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1177                         BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1178                         BUG_ON(gdesc->rcd.frg);
1179                 } else {
1180                         if (gdesc->rcd.csum) {
1181                                 skb->csum = htons(gdesc->rcd.csum);
1182                                 skb->ip_summed = CHECKSUM_PARTIAL;
1183                         } else {
1184                                 skb_checksum_none_assert(skb);
1185                         }
1186                 }
1187         } else {
1188                 skb_checksum_none_assert(skb);
1189         }
1190 }
1191
1192
1193 static void
1194 vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
1195                  struct vmxnet3_rx_ctx *ctx,  struct vmxnet3_adapter *adapter)
1196 {
1197         rq->stats.drop_err++;
1198         if (!rcd->fcs)
1199                 rq->stats.drop_fcs++;
1200
1201         rq->stats.drop_total++;
1202
1203         /*
1204          * We do not unmap and chain the rx buffer to the skb.
1205          * We basically pretend this buffer is not used and will be recycled
1206          * by vmxnet3_rq_alloc_rx_buf()
1207          */
1208
1209         /*
1210          * ctx->skb may be NULL if this is the first and the only one
1211          * desc for the pkt
1212          */
1213         if (ctx->skb)
1214                 dev_kfree_skb_irq(ctx->skb);
1215
1216         ctx->skb = NULL;
1217 }
1218
1219
1220 static u32
1221 vmxnet3_get_hdr_len(struct vmxnet3_adapter *adapter, struct sk_buff *skb,
1222                     union Vmxnet3_GenericDesc *gdesc)
1223 {
1224         u32 hlen, maplen;
1225         union {
1226                 void *ptr;
1227                 struct ethhdr *eth;
1228                 struct iphdr *ipv4;
1229                 struct ipv6hdr *ipv6;
1230                 struct tcphdr *tcp;
1231         } hdr;
1232         BUG_ON(gdesc->rcd.tcp == 0);
1233
1234         maplen = skb_headlen(skb);
1235         if (unlikely(sizeof(struct iphdr) + sizeof(struct tcphdr) > maplen))
1236                 return 0;
1237
1238         hdr.eth = eth_hdr(skb);
1239         if (gdesc->rcd.v4) {
1240                 BUG_ON(hdr.eth->h_proto != htons(ETH_P_IP));
1241                 hdr.ptr += sizeof(struct ethhdr);
1242                 BUG_ON(hdr.ipv4->protocol != IPPROTO_TCP);
1243                 hlen = hdr.ipv4->ihl << 2;
1244                 hdr.ptr += hdr.ipv4->ihl << 2;
1245         } else if (gdesc->rcd.v6) {
1246                 BUG_ON(hdr.eth->h_proto != htons(ETH_P_IPV6));
1247                 hdr.ptr += sizeof(struct ethhdr);
1248                 /* Use an estimated value, since we also need to handle
1249                  * TSO case.
1250                  */
1251                 if (hdr.ipv6->nexthdr != IPPROTO_TCP)
1252                         return sizeof(struct ipv6hdr) + sizeof(struct tcphdr);
1253                 hlen = sizeof(struct ipv6hdr);
1254                 hdr.ptr += sizeof(struct ipv6hdr);
1255         } else {
1256                 /* Non-IP pkt, dont estimate header length */
1257                 return 0;
1258         }
1259
1260         if (hlen + sizeof(struct tcphdr) > maplen)
1261                 return 0;
1262
1263         return (hlen + (hdr.tcp->doff << 2));
1264 }
1265
1266 static int
1267 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1268                        struct vmxnet3_adapter *adapter, int quota)
1269 {
1270         static const u32 rxprod_reg[2] = {
1271                 VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2
1272         };
1273         u32 num_pkts = 0;
1274         bool skip_page_frags = false;
1275         struct Vmxnet3_RxCompDesc *rcd;
1276         struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
1277         u16 segCnt = 0, mss = 0;
1278 #ifdef __BIG_ENDIAN_BITFIELD
1279         struct Vmxnet3_RxDesc rxCmdDesc;
1280         struct Vmxnet3_RxCompDesc rxComp;
1281 #endif
1282         vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd,
1283                           &rxComp);
1284         while (rcd->gen == rq->comp_ring.gen) {
1285                 struct vmxnet3_rx_buf_info *rbi;
1286                 struct sk_buff *skb, *new_skb = NULL;
1287                 struct page *new_page = NULL;
1288                 dma_addr_t new_dma_addr;
1289                 int num_to_alloc;
1290                 struct Vmxnet3_RxDesc *rxd;
1291                 u32 idx, ring_idx;
1292                 struct vmxnet3_cmd_ring *ring = NULL;
1293                 if (num_pkts >= quota) {
1294                         /* we may stop even before we see the EOP desc of
1295                          * the current pkt
1296                          */
1297                         break;
1298                 }
1299
1300                 /* Prevent any rcd field from being (speculatively) read before
1301                  * rcd->gen is read.
1302                  */
1303                 dma_rmb();
1304
1305                 BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2 &&
1306                        rcd->rqID != rq->dataRingQid);
1307                 idx = rcd->rxdIdx;
1308                 ring_idx = VMXNET3_GET_RING_IDX(adapter, rcd->rqID);
1309                 ring = rq->rx_ring + ring_idx;
1310                 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1311                                   &rxCmdDesc);
1312                 rbi = rq->buf_info[ring_idx] + idx;
1313
1314                 BUG_ON(rxd->addr != rbi->dma_addr ||
1315                        rxd->len != rbi->len);
1316
1317                 if (unlikely(rcd->eop && rcd->err)) {
1318                         vmxnet3_rx_error(rq, rcd, ctx, adapter);
1319                         goto rcd_done;
1320                 }
1321
1322                 if (rcd->sop) { /* first buf of the pkt */
1323                         bool rxDataRingUsed;
1324                         u16 len;
1325
1326                         BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
1327                                (rcd->rqID != rq->qid &&
1328                                 rcd->rqID != rq->dataRingQid));
1329
1330                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
1331                         BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
1332
1333                         if (unlikely(rcd->len == 0)) {
1334                                 /* Pretend the rx buffer is skipped. */
1335                                 BUG_ON(!(rcd->sop && rcd->eop));
1336                                 netdev_dbg(adapter->netdev,
1337                                         "rxRing[%u][%u] 0 length\n",
1338                                         ring_idx, idx);
1339                                 goto rcd_done;
1340                         }
1341
1342                         skip_page_frags = false;
1343                         ctx->skb = rbi->skb;
1344
1345                         rxDataRingUsed =
1346                                 VMXNET3_RX_DATA_RING(adapter, rcd->rqID);
1347                         len = rxDataRingUsed ? rcd->len : rbi->len;
1348                         new_skb = netdev_alloc_skb_ip_align(adapter->netdev,
1349                                                             len);
1350                         if (new_skb == NULL) {
1351                                 /* Skb allocation failed, do not handover this
1352                                  * skb to stack. Reuse it. Drop the existing pkt
1353                                  */
1354                                 rq->stats.rx_buf_alloc_failure++;
1355                                 ctx->skb = NULL;
1356                                 rq->stats.drop_total++;
1357                                 skip_page_frags = true;
1358                                 goto rcd_done;
1359                         }
1360
1361                         if (rxDataRingUsed) {
1362                                 size_t sz;
1363
1364                                 BUG_ON(rcd->len > rq->data_ring.desc_size);
1365
1366                                 ctx->skb = new_skb;
1367                                 sz = rcd->rxdIdx * rq->data_ring.desc_size;
1368                                 memcpy(new_skb->data,
1369                                        &rq->data_ring.base[sz], rcd->len);
1370                         } else {
1371                                 ctx->skb = rbi->skb;
1372
1373                                 new_dma_addr =
1374                                         dma_map_single(&adapter->pdev->dev,
1375                                                        new_skb->data, rbi->len,
1376                                                        PCI_DMA_FROMDEVICE);
1377                                 if (dma_mapping_error(&adapter->pdev->dev,
1378                                                       new_dma_addr)) {
1379                                         dev_kfree_skb(new_skb);
1380                                         /* Skb allocation failed, do not
1381                                          * handover this skb to stack. Reuse
1382                                          * it. Drop the existing pkt.
1383                                          */
1384                                         rq->stats.rx_buf_alloc_failure++;
1385                                         ctx->skb = NULL;
1386                                         rq->stats.drop_total++;
1387                                         skip_page_frags = true;
1388                                         goto rcd_done;
1389                                 }
1390
1391                                 dma_unmap_single(&adapter->pdev->dev,
1392                                                  rbi->dma_addr,
1393                                                  rbi->len,
1394                                                  PCI_DMA_FROMDEVICE);
1395
1396                                 /* Immediate refill */
1397                                 rbi->skb = new_skb;
1398                                 rbi->dma_addr = new_dma_addr;
1399                                 rxd->addr = cpu_to_le64(rbi->dma_addr);
1400                                 rxd->len = rbi->len;
1401                         }
1402
1403 #ifdef VMXNET3_RSS
1404                         if (rcd->rssType != VMXNET3_RCD_RSS_TYPE_NONE &&
1405                             (adapter->netdev->features & NETIF_F_RXHASH))
1406                                 skb_set_hash(ctx->skb,
1407                                              le32_to_cpu(rcd->rssHash),
1408                                              PKT_HASH_TYPE_L3);
1409 #endif
1410                         skb_put(ctx->skb, rcd->len);
1411
1412                         if (VMXNET3_VERSION_GE_2(adapter) &&
1413                             rcd->type == VMXNET3_CDTYPE_RXCOMP_LRO) {
1414                                 struct Vmxnet3_RxCompDescExt *rcdlro;
1415                                 rcdlro = (struct Vmxnet3_RxCompDescExt *)rcd;
1416
1417                                 segCnt = rcdlro->segCnt;
1418                                 WARN_ON_ONCE(segCnt == 0);
1419                                 mss = rcdlro->mss;
1420                                 if (unlikely(segCnt <= 1))
1421                                         segCnt = 0;
1422                         } else {
1423                                 segCnt = 0;
1424                         }
1425                 } else {
1426                         BUG_ON(ctx->skb == NULL && !skip_page_frags);
1427
1428                         /* non SOP buffer must be type 1 in most cases */
1429                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE);
1430                         BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1431
1432                         /* If an sop buffer was dropped, skip all
1433                          * following non-sop fragments. They will be reused.
1434                          */
1435                         if (skip_page_frags)
1436                                 goto rcd_done;
1437
1438                         if (rcd->len) {
1439                                 new_page = alloc_page(GFP_ATOMIC);
1440                                 /* Replacement page frag could not be allocated.
1441                                  * Reuse this page. Drop the pkt and free the
1442                                  * skb which contained this page as a frag. Skip
1443                                  * processing all the following non-sop frags.
1444                                  */
1445                                 if (unlikely(!new_page)) {
1446                                         rq->stats.rx_buf_alloc_failure++;
1447                                         dev_kfree_skb(ctx->skb);
1448                                         ctx->skb = NULL;
1449                                         skip_page_frags = true;
1450                                         goto rcd_done;
1451                                 }
1452                                 new_dma_addr = dma_map_page(&adapter->pdev->dev,
1453                                                             new_page,
1454                                                             0, PAGE_SIZE,
1455                                                             PCI_DMA_FROMDEVICE);
1456                                 if (dma_mapping_error(&adapter->pdev->dev,
1457                                                       new_dma_addr)) {
1458                                         put_page(new_page);
1459                                         rq->stats.rx_buf_alloc_failure++;
1460                                         dev_kfree_skb(ctx->skb);
1461                                         ctx->skb = NULL;
1462                                         skip_page_frags = true;
1463                                         goto rcd_done;
1464                                 }
1465
1466                                 dma_unmap_page(&adapter->pdev->dev,
1467                                                rbi->dma_addr, rbi->len,
1468                                                PCI_DMA_FROMDEVICE);
1469
1470                                 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1471
1472                                 /* Immediate refill */
1473                                 rbi->page = new_page;
1474                                 rbi->dma_addr = new_dma_addr;
1475                                 rxd->addr = cpu_to_le64(rbi->dma_addr);
1476                                 rxd->len = rbi->len;
1477                         }
1478                 }
1479
1480
1481                 skb = ctx->skb;
1482                 if (rcd->eop) {
1483                         u32 mtu = adapter->netdev->mtu;
1484                         skb->len += skb->data_len;
1485
1486                         vmxnet3_rx_csum(adapter, skb,
1487                                         (union Vmxnet3_GenericDesc *)rcd);
1488                         skb->protocol = eth_type_trans(skb, adapter->netdev);
1489                         if (!rcd->tcp || !adapter->lro)
1490                                 goto not_lro;
1491
1492                         if (segCnt != 0 && mss != 0) {
1493                                 skb_shinfo(skb)->gso_type = rcd->v4 ?
1494                                         SKB_GSO_TCPV4 : SKB_GSO_TCPV6;
1495                                 skb_shinfo(skb)->gso_size = mss;
1496                                 skb_shinfo(skb)->gso_segs = segCnt;
1497                         } else if (segCnt != 0 || skb->len > mtu) {
1498                                 u32 hlen;
1499
1500                                 hlen = vmxnet3_get_hdr_len(adapter, skb,
1501                                         (union Vmxnet3_GenericDesc *)rcd);
1502                                 if (hlen == 0)
1503                                         goto not_lro;
1504
1505                                 skb_shinfo(skb)->gso_type =
1506                                         rcd->v4 ? SKB_GSO_TCPV4 : SKB_GSO_TCPV6;
1507                                 if (segCnt != 0) {
1508                                         skb_shinfo(skb)->gso_segs = segCnt;
1509                                         skb_shinfo(skb)->gso_size =
1510                                                 DIV_ROUND_UP(skb->len -
1511                                                         hlen, segCnt);
1512                                 } else {
1513                                         skb_shinfo(skb)->gso_size = mtu - hlen;
1514                                 }
1515                         }
1516 not_lro:
1517                         if (unlikely(rcd->ts))
1518                                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rcd->tci);
1519
1520                         if (adapter->netdev->features & NETIF_F_LRO)
1521                                 netif_receive_skb(skb);
1522                         else
1523                                 napi_gro_receive(&rq->napi, skb);
1524
1525                         ctx->skb = NULL;
1526                         num_pkts++;
1527                 }
1528
1529 rcd_done:
1530                 /* device may have skipped some rx descs */
1531                 ring->next2comp = idx;
1532                 num_to_alloc = vmxnet3_cmd_ring_desc_avail(ring);
1533                 ring = rq->rx_ring + ring_idx;
1534
1535                 /* Ensure that the writes to rxd->gen bits will be observed
1536                  * after all other writes to rxd objects.
1537                  */
1538                 dma_wmb();
1539
1540                 while (num_to_alloc) {
1541                         vmxnet3_getRxDesc(rxd, &ring->base[ring->next2fill].rxd,
1542                                           &rxCmdDesc);
1543                         BUG_ON(!rxd->addr);
1544
1545                         /* Recv desc is ready to be used by the device */
1546                         rxd->gen = ring->gen;
1547                         vmxnet3_cmd_ring_adv_next2fill(ring);
1548                         num_to_alloc--;
1549                 }
1550
1551                 /* if needed, update the register */
1552                 if (unlikely(rq->shared->updateRxProd)) {
1553                         VMXNET3_WRITE_BAR0_REG(adapter,
1554                                                rxprod_reg[ring_idx] + rq->qid * 8,
1555                                                ring->next2fill);
1556                 }
1557
1558                 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
1559                 vmxnet3_getRxComp(rcd,
1560                                   &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp);
1561         }
1562
1563         return num_pkts;
1564 }
1565
1566
1567 static void
1568 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1569                    struct vmxnet3_adapter *adapter)
1570 {
1571         u32 i, ring_idx;
1572         struct Vmxnet3_RxDesc *rxd;
1573
1574         for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1575                 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
1576 #ifdef __BIG_ENDIAN_BITFIELD
1577                         struct Vmxnet3_RxDesc rxDesc;
1578 #endif
1579                         vmxnet3_getRxDesc(rxd,
1580                                 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc);
1581
1582                         if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1583                                         rq->buf_info[ring_idx][i].skb) {
1584                                 dma_unmap_single(&adapter->pdev->dev, rxd->addr,
1585                                                  rxd->len, PCI_DMA_FROMDEVICE);
1586                                 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1587                                 rq->buf_info[ring_idx][i].skb = NULL;
1588                         } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1589                                         rq->buf_info[ring_idx][i].page) {
1590                                 dma_unmap_page(&adapter->pdev->dev, rxd->addr,
1591                                                rxd->len, PCI_DMA_FROMDEVICE);
1592                                 put_page(rq->buf_info[ring_idx][i].page);
1593                                 rq->buf_info[ring_idx][i].page = NULL;
1594                         }
1595                 }
1596
1597                 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1598                 rq->rx_ring[ring_idx].next2fill =
1599                                         rq->rx_ring[ring_idx].next2comp = 0;
1600         }
1601
1602         rq->comp_ring.gen = VMXNET3_INIT_GEN;
1603         rq->comp_ring.next2proc = 0;
1604 }
1605
1606
1607 static void
1608 vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter)
1609 {
1610         int i;
1611
1612         for (i = 0; i < adapter->num_rx_queues; i++)
1613                 vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter);
1614 }
1615
1616
1617 static void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1618                                struct vmxnet3_adapter *adapter)
1619 {
1620         int i;
1621         int j;
1622
1623         /* all rx buffers must have already been freed */
1624         for (i = 0; i < 2; i++) {
1625                 if (rq->buf_info[i]) {
1626                         for (j = 0; j < rq->rx_ring[i].size; j++)
1627                                 BUG_ON(rq->buf_info[i][j].page != NULL);
1628                 }
1629         }
1630
1631
1632         for (i = 0; i < 2; i++) {
1633                 if (rq->rx_ring[i].base) {
1634                         dma_free_coherent(&adapter->pdev->dev,
1635                                           rq->rx_ring[i].size
1636                                           * sizeof(struct Vmxnet3_RxDesc),
1637                                           rq->rx_ring[i].base,
1638                                           rq->rx_ring[i].basePA);
1639                         rq->rx_ring[i].base = NULL;
1640                 }
1641         }
1642
1643         if (rq->data_ring.base) {
1644                 dma_free_coherent(&adapter->pdev->dev,
1645                                   rq->rx_ring[0].size * rq->data_ring.desc_size,
1646                                   rq->data_ring.base, rq->data_ring.basePA);
1647                 rq->data_ring.base = NULL;
1648         }
1649
1650         if (rq->comp_ring.base) {
1651                 dma_free_coherent(&adapter->pdev->dev, rq->comp_ring.size
1652                                   * sizeof(struct Vmxnet3_RxCompDesc),
1653                                   rq->comp_ring.base, rq->comp_ring.basePA);
1654                 rq->comp_ring.base = NULL;
1655         }
1656
1657         if (rq->buf_info[0]) {
1658                 size_t sz = sizeof(struct vmxnet3_rx_buf_info) *
1659                         (rq->rx_ring[0].size + rq->rx_ring[1].size);
1660                 dma_free_coherent(&adapter->pdev->dev, sz, rq->buf_info[0],
1661                                   rq->buf_info_pa);
1662                 rq->buf_info[0] = rq->buf_info[1] = NULL;
1663         }
1664 }
1665
1666 static void
1667 vmxnet3_rq_destroy_all_rxdataring(struct vmxnet3_adapter *adapter)
1668 {
1669         int i;
1670
1671         for (i = 0; i < adapter->num_rx_queues; i++) {
1672                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
1673
1674                 if (rq->data_ring.base) {
1675                         dma_free_coherent(&adapter->pdev->dev,
1676                                           (rq->rx_ring[0].size *
1677                                           rq->data_ring.desc_size),
1678                                           rq->data_ring.base,
1679                                           rq->data_ring.basePA);
1680                         rq->data_ring.base = NULL;
1681                         rq->data_ring.desc_size = 0;
1682                 }
1683         }
1684 }
1685
1686 static int
1687 vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1688                 struct vmxnet3_adapter  *adapter)
1689 {
1690         int i;
1691
1692         /* initialize buf_info */
1693         for (i = 0; i < rq->rx_ring[0].size; i++) {
1694
1695                 /* 1st buf for a pkt is skbuff */
1696                 if (i % adapter->rx_buf_per_pkt == 0) {
1697                         rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1698                         rq->buf_info[0][i].len = adapter->skb_buf_size;
1699                 } else { /* subsequent bufs for a pkt is frag */
1700                         rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1701                         rq->buf_info[0][i].len = PAGE_SIZE;
1702                 }
1703         }
1704         for (i = 0; i < rq->rx_ring[1].size; i++) {
1705                 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1706                 rq->buf_info[1][i].len = PAGE_SIZE;
1707         }
1708
1709         /* reset internal state and allocate buffers for both rings */
1710         for (i = 0; i < 2; i++) {
1711                 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1712
1713                 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1714                        sizeof(struct Vmxnet3_RxDesc));
1715                 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1716         }
1717         if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1718                                     adapter) == 0) {
1719                 /* at least has 1 rx buffer for the 1st ring */
1720                 return -ENOMEM;
1721         }
1722         vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1723
1724         /* reset the comp ring */
1725         rq->comp_ring.next2proc = 0;
1726         memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1727                sizeof(struct Vmxnet3_RxCompDesc));
1728         rq->comp_ring.gen = VMXNET3_INIT_GEN;
1729
1730         /* reset rxctx */
1731         rq->rx_ctx.skb = NULL;
1732
1733         /* stats are not reset */
1734         return 0;
1735 }
1736
1737
1738 static int
1739 vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter)
1740 {
1741         int i, err = 0;
1742
1743         for (i = 0; i < adapter->num_rx_queues; i++) {
1744                 err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter);
1745                 if (unlikely(err)) {
1746                         dev_err(&adapter->netdev->dev, "%s: failed to "
1747                                 "initialize rx queue%i\n",
1748                                 adapter->netdev->name, i);
1749                         break;
1750                 }
1751         }
1752         return err;
1753
1754 }
1755
1756
1757 static int
1758 vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1759 {
1760         int i;
1761         size_t sz;
1762         struct vmxnet3_rx_buf_info *bi;
1763
1764         for (i = 0; i < 2; i++) {
1765
1766                 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1767                 rq->rx_ring[i].base = dma_alloc_coherent(
1768                                                 &adapter->pdev->dev, sz,
1769                                                 &rq->rx_ring[i].basePA,
1770                                                 GFP_KERNEL);
1771                 if (!rq->rx_ring[i].base) {
1772                         netdev_err(adapter->netdev,
1773                                    "failed to allocate rx ring %d\n", i);
1774                         goto err;
1775                 }
1776         }
1777
1778         if ((adapter->rxdataring_enabled) && (rq->data_ring.desc_size != 0)) {
1779                 sz = rq->rx_ring[0].size * rq->data_ring.desc_size;
1780                 rq->data_ring.base =
1781                         dma_alloc_coherent(&adapter->pdev->dev, sz,
1782                                            &rq->data_ring.basePA,
1783                                            GFP_KERNEL);
1784                 if (!rq->data_ring.base) {
1785                         netdev_err(adapter->netdev,
1786                                    "rx data ring will be disabled\n");
1787                         adapter->rxdataring_enabled = false;
1788                 }
1789         } else {
1790                 rq->data_ring.base = NULL;
1791                 rq->data_ring.desc_size = 0;
1792         }
1793
1794         sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1795         rq->comp_ring.base = dma_alloc_coherent(&adapter->pdev->dev, sz,
1796                                                 &rq->comp_ring.basePA,
1797                                                 GFP_KERNEL);
1798         if (!rq->comp_ring.base) {
1799                 netdev_err(adapter->netdev, "failed to allocate rx comp ring\n");
1800                 goto err;
1801         }
1802
1803         sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1804                                                    rq->rx_ring[1].size);
1805         bi = dma_zalloc_coherent(&adapter->pdev->dev, sz, &rq->buf_info_pa,
1806                                  GFP_KERNEL);
1807         if (!bi)
1808                 goto err;
1809
1810         rq->buf_info[0] = bi;
1811         rq->buf_info[1] = bi + rq->rx_ring[0].size;
1812
1813         return 0;
1814
1815 err:
1816         vmxnet3_rq_destroy(rq, adapter);
1817         return -ENOMEM;
1818 }
1819
1820
1821 static int
1822 vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter)
1823 {
1824         int i, err = 0;
1825
1826         adapter->rxdataring_enabled = VMXNET3_VERSION_GE_3(adapter);
1827
1828         for (i = 0; i < adapter->num_rx_queues; i++) {
1829                 err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter);
1830                 if (unlikely(err)) {
1831                         dev_err(&adapter->netdev->dev,
1832                                 "%s: failed to create rx queue%i\n",
1833                                 adapter->netdev->name, i);
1834                         goto err_out;
1835                 }
1836         }
1837
1838         if (!adapter->rxdataring_enabled)
1839                 vmxnet3_rq_destroy_all_rxdataring(adapter);
1840
1841         return err;
1842 err_out:
1843         vmxnet3_rq_destroy_all(adapter);
1844         return err;
1845
1846 }
1847
1848 /* Multiple queue aware polling function for tx and rx */
1849
1850 static int
1851 vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1852 {
1853         int rcd_done = 0, i;
1854         if (unlikely(adapter->shared->ecr))
1855                 vmxnet3_process_events(adapter);
1856         for (i = 0; i < adapter->num_tx_queues; i++)
1857                 vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter);
1858
1859         for (i = 0; i < adapter->num_rx_queues; i++)
1860                 rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i],
1861                                                    adapter, budget);
1862         return rcd_done;
1863 }
1864
1865
1866 static int
1867 vmxnet3_poll(struct napi_struct *napi, int budget)
1868 {
1869         struct vmxnet3_rx_queue *rx_queue = container_of(napi,
1870                                           struct vmxnet3_rx_queue, napi);
1871         int rxd_done;
1872
1873         rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget);
1874
1875         if (rxd_done < budget) {
1876                 napi_complete_done(napi, rxd_done);
1877                 vmxnet3_enable_all_intrs(rx_queue->adapter);
1878         }
1879         return rxd_done;
1880 }
1881
1882 /*
1883  * NAPI polling function for MSI-X mode with multiple Rx queues
1884  * Returns the # of the NAPI credit consumed (# of rx descriptors processed)
1885  */
1886
1887 static int
1888 vmxnet3_poll_rx_only(struct napi_struct *napi, int budget)
1889 {
1890         struct vmxnet3_rx_queue *rq = container_of(napi,
1891                                                 struct vmxnet3_rx_queue, napi);
1892         struct vmxnet3_adapter *adapter = rq->adapter;
1893         int rxd_done;
1894
1895         /* When sharing interrupt with corresponding tx queue, process
1896          * tx completions in that queue as well
1897          */
1898         if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) {
1899                 struct vmxnet3_tx_queue *tq =
1900                                 &adapter->tx_queue[rq - adapter->rx_queue];
1901                 vmxnet3_tq_tx_complete(tq, adapter);
1902         }
1903
1904         rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget);
1905
1906         if (rxd_done < budget) {
1907                 napi_complete_done(napi, rxd_done);
1908                 vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx);
1909         }
1910         return rxd_done;
1911 }
1912
1913
1914 #ifdef CONFIG_PCI_MSI
1915
1916 /*
1917  * Handle completion interrupts on tx queues
1918  * Returns whether or not the intr is handled
1919  */
1920
1921 static irqreturn_t
1922 vmxnet3_msix_tx(int irq, void *data)
1923 {
1924         struct vmxnet3_tx_queue *tq = data;
1925         struct vmxnet3_adapter *adapter = tq->adapter;
1926
1927         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1928                 vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx);
1929
1930         /* Handle the case where only one irq is allocate for all tx queues */
1931         if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1932                 int i;
1933                 for (i = 0; i < adapter->num_tx_queues; i++) {
1934                         struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i];
1935                         vmxnet3_tq_tx_complete(txq, adapter);
1936                 }
1937         } else {
1938                 vmxnet3_tq_tx_complete(tq, adapter);
1939         }
1940         vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx);
1941
1942         return IRQ_HANDLED;
1943 }
1944
1945
1946 /*
1947  * Handle completion interrupts on rx queues. Returns whether or not the
1948  * intr is handled
1949  */
1950
1951 static irqreturn_t
1952 vmxnet3_msix_rx(int irq, void *data)
1953 {
1954         struct vmxnet3_rx_queue *rq = data;
1955         struct vmxnet3_adapter *adapter = rq->adapter;
1956
1957         /* disable intr if needed */
1958         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1959                 vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx);
1960         napi_schedule(&rq->napi);
1961
1962         return IRQ_HANDLED;
1963 }
1964
1965 /*
1966  *----------------------------------------------------------------------------
1967  *
1968  * vmxnet3_msix_event --
1969  *
1970  *    vmxnet3 msix event intr handler
1971  *
1972  * Result:
1973  *    whether or not the intr is handled
1974  *
1975  *----------------------------------------------------------------------------
1976  */
1977
1978 static irqreturn_t
1979 vmxnet3_msix_event(int irq, void *data)
1980 {
1981         struct net_device *dev = data;
1982         struct vmxnet3_adapter *adapter = netdev_priv(dev);
1983
1984         /* disable intr if needed */
1985         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1986                 vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx);
1987
1988         if (adapter->shared->ecr)
1989                 vmxnet3_process_events(adapter);
1990
1991         vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx);
1992
1993         return IRQ_HANDLED;
1994 }
1995
1996 #endif /* CONFIG_PCI_MSI  */
1997
1998
1999 /* Interrupt handler for vmxnet3  */
2000 static irqreturn_t
2001 vmxnet3_intr(int irq, void *dev_id)
2002 {
2003         struct net_device *dev = dev_id;
2004         struct vmxnet3_adapter *adapter = netdev_priv(dev);
2005
2006         if (adapter->intr.type == VMXNET3_IT_INTX) {
2007                 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
2008                 if (unlikely(icr == 0))
2009                         /* not ours */
2010                         return IRQ_NONE;
2011         }
2012
2013
2014         /* disable intr if needed */
2015         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
2016                 vmxnet3_disable_all_intrs(adapter);
2017
2018         napi_schedule(&adapter->rx_queue[0].napi);
2019
2020         return IRQ_HANDLED;
2021 }
2022
2023 #ifdef CONFIG_NET_POLL_CONTROLLER
2024
2025 /* netpoll callback. */
2026 static void
2027 vmxnet3_netpoll(struct net_device *netdev)
2028 {
2029         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2030
2031         switch (adapter->intr.type) {
2032 #ifdef CONFIG_PCI_MSI
2033         case VMXNET3_IT_MSIX: {
2034                 int i;
2035                 for (i = 0; i < adapter->num_rx_queues; i++)
2036                         vmxnet3_msix_rx(0, &adapter->rx_queue[i]);
2037                 break;
2038         }
2039 #endif
2040         case VMXNET3_IT_MSI:
2041         default:
2042                 vmxnet3_intr(0, adapter->netdev);
2043                 break;
2044         }
2045
2046 }
2047 #endif  /* CONFIG_NET_POLL_CONTROLLER */
2048
2049 static int
2050 vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
2051 {
2052         struct vmxnet3_intr *intr = &adapter->intr;
2053         int err = 0, i;
2054         int vector = 0;
2055
2056 #ifdef CONFIG_PCI_MSI
2057         if (adapter->intr.type == VMXNET3_IT_MSIX) {
2058                 for (i = 0; i < adapter->num_tx_queues; i++) {
2059                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
2060                                 sprintf(adapter->tx_queue[i].name, "%s-tx-%d",
2061                                         adapter->netdev->name, vector);
2062                                 err = request_irq(
2063                                               intr->msix_entries[vector].vector,
2064                                               vmxnet3_msix_tx, 0,
2065                                               adapter->tx_queue[i].name,
2066                                               &adapter->tx_queue[i]);
2067                         } else {
2068                                 sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d",
2069                                         adapter->netdev->name, vector);
2070                         }
2071                         if (err) {
2072                                 dev_err(&adapter->netdev->dev,
2073                                         "Failed to request irq for MSIX, %s, "
2074                                         "error %d\n",
2075                                         adapter->tx_queue[i].name, err);
2076                                 return err;
2077                         }
2078
2079                         /* Handle the case where only 1 MSIx was allocated for
2080                          * all tx queues */
2081                         if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
2082                                 for (; i < adapter->num_tx_queues; i++)
2083                                         adapter->tx_queue[i].comp_ring.intr_idx
2084                                                                 = vector;
2085                                 vector++;
2086                                 break;
2087                         } else {
2088                                 adapter->tx_queue[i].comp_ring.intr_idx
2089                                                                 = vector++;
2090                         }
2091                 }
2092                 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE)
2093                         vector = 0;
2094
2095                 for (i = 0; i < adapter->num_rx_queues; i++) {
2096                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE)
2097                                 sprintf(adapter->rx_queue[i].name, "%s-rx-%d",
2098                                         adapter->netdev->name, vector);
2099                         else
2100                                 sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d",
2101                                         adapter->netdev->name, vector);
2102                         err = request_irq(intr->msix_entries[vector].vector,
2103                                           vmxnet3_msix_rx, 0,
2104                                           adapter->rx_queue[i].name,
2105                                           &(adapter->rx_queue[i]));
2106                         if (err) {
2107                                 netdev_err(adapter->netdev,
2108                                            "Failed to request irq for MSIX, "
2109                                            "%s, error %d\n",
2110                                            adapter->rx_queue[i].name, err);
2111                                 return err;
2112                         }
2113
2114                         adapter->rx_queue[i].comp_ring.intr_idx = vector++;
2115                 }
2116
2117                 sprintf(intr->event_msi_vector_name, "%s-event-%d",
2118                         adapter->netdev->name, vector);
2119                 err = request_irq(intr->msix_entries[vector].vector,
2120                                   vmxnet3_msix_event, 0,
2121                                   intr->event_msi_vector_name, adapter->netdev);
2122                 intr->event_intr_idx = vector;
2123
2124         } else if (intr->type == VMXNET3_IT_MSI) {
2125                 adapter->num_rx_queues = 1;
2126                 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
2127                                   adapter->netdev->name, adapter->netdev);
2128         } else {
2129 #endif
2130                 adapter->num_rx_queues = 1;
2131                 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
2132                                   IRQF_SHARED, adapter->netdev->name,
2133                                   adapter->netdev);
2134 #ifdef CONFIG_PCI_MSI
2135         }
2136 #endif
2137         intr->num_intrs = vector + 1;
2138         if (err) {
2139                 netdev_err(adapter->netdev,
2140                            "Failed to request irq (intr type:%d), error %d\n",
2141                            intr->type, err);
2142         } else {
2143                 /* Number of rx queues will not change after this */
2144                 for (i = 0; i < adapter->num_rx_queues; i++) {
2145                         struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2146                         rq->qid = i;
2147                         rq->qid2 = i + adapter->num_rx_queues;
2148                         rq->dataRingQid = i + 2 * adapter->num_rx_queues;
2149                 }
2150
2151                 /* init our intr settings */
2152                 for (i = 0; i < intr->num_intrs; i++)
2153                         intr->mod_levels[i] = UPT1_IML_ADAPTIVE;
2154                 if (adapter->intr.type != VMXNET3_IT_MSIX) {
2155                         adapter->intr.event_intr_idx = 0;
2156                         for (i = 0; i < adapter->num_tx_queues; i++)
2157                                 adapter->tx_queue[i].comp_ring.intr_idx = 0;
2158                         adapter->rx_queue[0].comp_ring.intr_idx = 0;
2159                 }
2160
2161                 netdev_info(adapter->netdev,
2162                             "intr type %u, mode %u, %u vectors allocated\n",
2163                             intr->type, intr->mask_mode, intr->num_intrs);
2164         }
2165
2166         return err;
2167 }
2168
2169
2170 static void
2171 vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
2172 {
2173         struct vmxnet3_intr *intr = &adapter->intr;
2174         BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0);
2175
2176         switch (intr->type) {
2177 #ifdef CONFIG_PCI_MSI
2178         case VMXNET3_IT_MSIX:
2179         {
2180                 int i, vector = 0;
2181
2182                 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
2183                         for (i = 0; i < adapter->num_tx_queues; i++) {
2184                                 free_irq(intr->msix_entries[vector++].vector,
2185                                          &(adapter->tx_queue[i]));
2186                                 if (adapter->share_intr == VMXNET3_INTR_TXSHARE)
2187                                         break;
2188                         }
2189                 }
2190
2191                 for (i = 0; i < adapter->num_rx_queues; i++) {
2192                         free_irq(intr->msix_entries[vector++].vector,
2193                                  &(adapter->rx_queue[i]));
2194                 }
2195
2196                 free_irq(intr->msix_entries[vector].vector,
2197                          adapter->netdev);
2198                 BUG_ON(vector >= intr->num_intrs);
2199                 break;
2200         }
2201 #endif
2202         case VMXNET3_IT_MSI:
2203                 free_irq(adapter->pdev->irq, adapter->netdev);
2204                 break;
2205         case VMXNET3_IT_INTX:
2206                 free_irq(adapter->pdev->irq, adapter->netdev);
2207                 break;
2208         default:
2209                 BUG();
2210         }
2211 }
2212
2213
2214 static void
2215 vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
2216 {
2217         u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2218         u16 vid;
2219
2220         /* allow untagged pkts */
2221         VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
2222
2223         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2224                 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
2225 }
2226
2227
2228 static int
2229 vmxnet3_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
2230 {
2231         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2232
2233         if (!(netdev->flags & IFF_PROMISC)) {
2234                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2235                 unsigned long flags;
2236
2237                 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
2238                 spin_lock_irqsave(&adapter->cmd_lock, flags);
2239                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2240                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2241                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2242         }
2243
2244         set_bit(vid, adapter->active_vlans);
2245
2246         return 0;
2247 }
2248
2249
2250 static int
2251 vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
2252 {
2253         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2254
2255         if (!(netdev->flags & IFF_PROMISC)) {
2256                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2257                 unsigned long flags;
2258
2259                 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
2260                 spin_lock_irqsave(&adapter->cmd_lock, flags);
2261                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2262                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2263                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2264         }
2265
2266         clear_bit(vid, adapter->active_vlans);
2267
2268         return 0;
2269 }
2270
2271
2272 static u8 *
2273 vmxnet3_copy_mc(struct net_device *netdev)
2274 {
2275         u8 *buf = NULL;
2276         u32 sz = netdev_mc_count(netdev) * ETH_ALEN;
2277
2278         /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
2279         if (sz <= 0xffff) {
2280                 /* We may be called with BH disabled */
2281                 buf = kmalloc(sz, GFP_ATOMIC);
2282                 if (buf) {
2283                         struct netdev_hw_addr *ha;
2284                         int i = 0;
2285
2286                         netdev_for_each_mc_addr(ha, netdev)
2287                                 memcpy(buf + i++ * ETH_ALEN, ha->addr,
2288                                        ETH_ALEN);
2289                 }
2290         }
2291         return buf;
2292 }
2293
2294
2295 static void
2296 vmxnet3_set_mc(struct net_device *netdev)
2297 {
2298         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2299         unsigned long flags;
2300         struct Vmxnet3_RxFilterConf *rxConf =
2301                                         &adapter->shared->devRead.rxFilterConf;
2302         u8 *new_table = NULL;
2303         dma_addr_t new_table_pa = 0;
2304         bool new_table_pa_valid = false;
2305         u32 new_mode = VMXNET3_RXM_UCAST;
2306
2307         if (netdev->flags & IFF_PROMISC) {
2308                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2309                 memset(vfTable, 0, VMXNET3_VFT_SIZE * sizeof(*vfTable));
2310
2311                 new_mode |= VMXNET3_RXM_PROMISC;
2312         } else {
2313                 vmxnet3_restore_vlan(adapter);
2314         }
2315
2316         if (netdev->flags & IFF_BROADCAST)
2317                 new_mode |= VMXNET3_RXM_BCAST;
2318
2319         if (netdev->flags & IFF_ALLMULTI)
2320                 new_mode |= VMXNET3_RXM_ALL_MULTI;
2321         else
2322                 if (!netdev_mc_empty(netdev)) {
2323                         new_table = vmxnet3_copy_mc(netdev);
2324                         if (new_table) {
2325                                 size_t sz = netdev_mc_count(netdev) * ETH_ALEN;
2326
2327                                 rxConf->mfTableLen = cpu_to_le16(sz);
2328                                 new_table_pa = dma_map_single(
2329                                                         &adapter->pdev->dev,
2330                                                         new_table,
2331                                                         sz,
2332                                                         PCI_DMA_TODEVICE);
2333                                 if (!dma_mapping_error(&adapter->pdev->dev,
2334                                                        new_table_pa)) {
2335                                         new_mode |= VMXNET3_RXM_MCAST;
2336                                         new_table_pa_valid = true;
2337                                         rxConf->mfTablePA = cpu_to_le64(
2338                                                                 new_table_pa);
2339                                 }
2340                         }
2341                         if (!new_table_pa_valid) {
2342                                 netdev_info(netdev,
2343                                             "failed to copy mcast list, setting ALL_MULTI\n");
2344                                 new_mode |= VMXNET3_RXM_ALL_MULTI;
2345                         }
2346                 }
2347
2348         if (!(new_mode & VMXNET3_RXM_MCAST)) {
2349                 rxConf->mfTableLen = 0;
2350                 rxConf->mfTablePA = 0;
2351         }
2352
2353         spin_lock_irqsave(&adapter->cmd_lock, flags);
2354         if (new_mode != rxConf->rxMode) {
2355                 rxConf->rxMode = cpu_to_le32(new_mode);
2356                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2357                                        VMXNET3_CMD_UPDATE_RX_MODE);
2358                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2359                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2360         }
2361
2362         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2363                                VMXNET3_CMD_UPDATE_MAC_FILTERS);
2364         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2365
2366         if (new_table_pa_valid)
2367                 dma_unmap_single(&adapter->pdev->dev, new_table_pa,
2368                                  rxConf->mfTableLen, PCI_DMA_TODEVICE);
2369         kfree(new_table);
2370 }
2371
2372 void
2373 vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter)
2374 {
2375         int i;
2376
2377         for (i = 0; i < adapter->num_rx_queues; i++)
2378                 vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter);
2379 }
2380
2381
2382 /*
2383  *   Set up driver_shared based on settings in adapter.
2384  */
2385
2386 static void
2387 vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
2388 {
2389         struct Vmxnet3_DriverShared *shared = adapter->shared;
2390         struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
2391         struct Vmxnet3_TxQueueConf *tqc;
2392         struct Vmxnet3_RxQueueConf *rqc;
2393         int i;
2394
2395         memset(shared, 0, sizeof(*shared));
2396
2397         /* driver settings */
2398         shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC);
2399         devRead->misc.driverInfo.version = cpu_to_le32(
2400                                                 VMXNET3_DRIVER_VERSION_NUM);
2401         devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
2402                                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
2403         devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
2404         *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32(
2405                                 *((u32 *)&devRead->misc.driverInfo.gos));
2406         devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1);
2407         devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1);
2408
2409         devRead->misc.ddPA = cpu_to_le64(adapter->adapter_pa);
2410         devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter));
2411
2412         /* set up feature flags */
2413         if (adapter->netdev->features & NETIF_F_RXCSUM)
2414                 devRead->misc.uptFeatures |= UPT1_F_RXCSUM;
2415
2416         if (adapter->netdev->features & NETIF_F_LRO) {
2417                 devRead->misc.uptFeatures |= UPT1_F_LRO;
2418                 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
2419         }
2420         if (adapter->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
2421                 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
2422
2423         devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
2424         devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
2425         devRead->misc.queueDescLen = cpu_to_le32(
2426                 adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
2427                 adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc));
2428
2429         /* tx queue settings */
2430         devRead->misc.numTxQueues =  adapter->num_tx_queues;
2431         for (i = 0; i < adapter->num_tx_queues; i++) {
2432                 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2433                 BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL);
2434                 tqc = &adapter->tqd_start[i].conf;
2435                 tqc->txRingBasePA   = cpu_to_le64(tq->tx_ring.basePA);
2436                 tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA);
2437                 tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA);
2438                 tqc->ddPA           = cpu_to_le64(tq->buf_info_pa);
2439                 tqc->txRingSize     = cpu_to_le32(tq->tx_ring.size);
2440                 tqc->dataRingSize   = cpu_to_le32(tq->data_ring.size);
2441                 tqc->txDataRingDescSize = cpu_to_le32(tq->txdata_desc_size);
2442                 tqc->compRingSize   = cpu_to_le32(tq->comp_ring.size);
2443                 tqc->ddLen          = cpu_to_le32(
2444                                         sizeof(struct vmxnet3_tx_buf_info) *
2445                                         tqc->txRingSize);
2446                 tqc->intrIdx        = tq->comp_ring.intr_idx;
2447         }
2448
2449         /* rx queue settings */
2450         devRead->misc.numRxQueues = adapter->num_rx_queues;
2451         for (i = 0; i < adapter->num_rx_queues; i++) {
2452                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2453                 rqc = &adapter->rqd_start[i].conf;
2454                 rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA);
2455                 rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA);
2456                 rqc->compRingBasePA  = cpu_to_le64(rq->comp_ring.basePA);
2457                 rqc->ddPA            = cpu_to_le64(rq->buf_info_pa);
2458                 rqc->rxRingSize[0]   = cpu_to_le32(rq->rx_ring[0].size);
2459                 rqc->rxRingSize[1]   = cpu_to_le32(rq->rx_ring[1].size);
2460                 rqc->compRingSize    = cpu_to_le32(rq->comp_ring.size);
2461                 rqc->ddLen           = cpu_to_le32(
2462                                         sizeof(struct vmxnet3_rx_buf_info) *
2463                                         (rqc->rxRingSize[0] +
2464                                          rqc->rxRingSize[1]));
2465                 rqc->intrIdx         = rq->comp_ring.intr_idx;
2466                 if (VMXNET3_VERSION_GE_3(adapter)) {
2467                         rqc->rxDataRingBasePA =
2468                                 cpu_to_le64(rq->data_ring.basePA);
2469                         rqc->rxDataRingDescSize =
2470                                 cpu_to_le16(rq->data_ring.desc_size);
2471                 }
2472         }
2473
2474 #ifdef VMXNET3_RSS
2475         memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf));
2476
2477         if (adapter->rss) {
2478                 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
2479
2480                 devRead->misc.uptFeatures |= UPT1_F_RSS;
2481                 devRead->misc.numRxQueues = adapter->num_rx_queues;
2482                 rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 |
2483                                     UPT1_RSS_HASH_TYPE_IPV4 |
2484                                     UPT1_RSS_HASH_TYPE_TCP_IPV6 |
2485                                     UPT1_RSS_HASH_TYPE_IPV6;
2486                 rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ;
2487                 rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE;
2488                 rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE;
2489                 netdev_rss_key_fill(rssConf->hashKey, sizeof(rssConf->hashKey));
2490
2491                 for (i = 0; i < rssConf->indTableSize; i++)
2492                         rssConf->indTable[i] = ethtool_rxfh_indir_default(
2493                                 i, adapter->num_rx_queues);
2494
2495                 devRead->rssConfDesc.confVer = 1;
2496                 devRead->rssConfDesc.confLen = cpu_to_le32(sizeof(*rssConf));
2497                 devRead->rssConfDesc.confPA =
2498                         cpu_to_le64(adapter->rss_conf_pa);
2499         }
2500
2501 #endif /* VMXNET3_RSS */
2502
2503         /* intr settings */
2504         devRead->intrConf.autoMask = adapter->intr.mask_mode ==
2505                                      VMXNET3_IMM_AUTO;
2506         devRead->intrConf.numIntrs = adapter->intr.num_intrs;
2507         for (i = 0; i < adapter->intr.num_intrs; i++)
2508                 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
2509
2510         devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
2511         devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
2512
2513         /* rx filter settings */
2514         devRead->rxFilterConf.rxMode = 0;
2515         vmxnet3_restore_vlan(adapter);
2516         vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr);
2517
2518         /* the rest are already zeroed */
2519 }
2520
2521 static void
2522 vmxnet3_init_coalesce(struct vmxnet3_adapter *adapter)
2523 {
2524         struct Vmxnet3_DriverShared *shared = adapter->shared;
2525         union Vmxnet3_CmdInfo *cmdInfo = &shared->cu.cmdInfo;
2526         unsigned long flags;
2527
2528         if (!VMXNET3_VERSION_GE_3(adapter))
2529                 return;
2530
2531         spin_lock_irqsave(&adapter->cmd_lock, flags);
2532         cmdInfo->varConf.confVer = 1;
2533         cmdInfo->varConf.confLen =
2534                 cpu_to_le32(sizeof(*adapter->coal_conf));
2535         cmdInfo->varConf.confPA  = cpu_to_le64(adapter->coal_conf_pa);
2536
2537         if (adapter->default_coal_mode) {
2538                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2539                                        VMXNET3_CMD_GET_COALESCE);
2540         } else {
2541                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2542                                        VMXNET3_CMD_SET_COALESCE);
2543         }
2544
2545         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2546 }
2547
2548 int
2549 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
2550 {
2551         int err, i;
2552         u32 ret;
2553         unsigned long flags;
2554
2555         netdev_dbg(adapter->netdev, "%s: skb_buf_size %d, rx_buf_per_pkt %d,"
2556                 " ring sizes %u %u %u\n", adapter->netdev->name,
2557                 adapter->skb_buf_size, adapter->rx_buf_per_pkt,
2558                 adapter->tx_queue[0].tx_ring.size,
2559                 adapter->rx_queue[0].rx_ring[0].size,
2560                 adapter->rx_queue[0].rx_ring[1].size);
2561
2562         vmxnet3_tq_init_all(adapter);
2563         err = vmxnet3_rq_init_all(adapter);
2564         if (err) {
2565                 netdev_err(adapter->netdev,
2566                            "Failed to init rx queue error %d\n", err);
2567                 goto rq_err;
2568         }
2569
2570         err = vmxnet3_request_irqs(adapter);
2571         if (err) {
2572                 netdev_err(adapter->netdev,
2573                            "Failed to setup irq for error %d\n", err);
2574                 goto irq_err;
2575         }
2576
2577         vmxnet3_setup_driver_shared(adapter);
2578
2579         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
2580                                adapter->shared_pa));
2581         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
2582                                adapter->shared_pa));
2583         spin_lock_irqsave(&adapter->cmd_lock, flags);
2584         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2585                                VMXNET3_CMD_ACTIVATE_DEV);
2586         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2587         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2588
2589         if (ret != 0) {
2590                 netdev_err(adapter->netdev,
2591                            "Failed to activate dev: error %u\n", ret);
2592                 err = -EINVAL;
2593                 goto activate_err;
2594         }
2595
2596         vmxnet3_init_coalesce(adapter);
2597
2598         for (i = 0; i < adapter->num_rx_queues; i++) {
2599                 VMXNET3_WRITE_BAR0_REG(adapter,
2600                                 VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN,
2601                                 adapter->rx_queue[i].rx_ring[0].next2fill);
2602                 VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 +
2603                                 (i * VMXNET3_REG_ALIGN)),
2604                                 adapter->rx_queue[i].rx_ring[1].next2fill);
2605         }
2606
2607         /* Apply the rx filter settins last. */
2608         vmxnet3_set_mc(adapter->netdev);
2609
2610         /*
2611          * Check link state when first activating device. It will start the
2612          * tx queue if the link is up.
2613          */
2614         vmxnet3_check_link(adapter, true);
2615         for (i = 0; i < adapter->num_rx_queues; i++)
2616                 napi_enable(&adapter->rx_queue[i].napi);
2617         vmxnet3_enable_all_intrs(adapter);
2618         clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2619         return 0;
2620
2621 activate_err:
2622         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
2623         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
2624         vmxnet3_free_irqs(adapter);
2625 irq_err:
2626 rq_err:
2627         /* free up buffers we allocated */
2628         vmxnet3_rq_cleanup_all(adapter);
2629         return err;
2630 }
2631
2632
2633 void
2634 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
2635 {
2636         unsigned long flags;
2637         spin_lock_irqsave(&adapter->cmd_lock, flags);
2638         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
2639         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2640 }
2641
2642
2643 int
2644 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
2645 {
2646         int i;
2647         unsigned long flags;
2648         if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
2649                 return 0;
2650
2651
2652         spin_lock_irqsave(&adapter->cmd_lock, flags);
2653         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2654                                VMXNET3_CMD_QUIESCE_DEV);
2655         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2656         vmxnet3_disable_all_intrs(adapter);
2657
2658         for (i = 0; i < adapter->num_rx_queues; i++)
2659                 napi_disable(&adapter->rx_queue[i].napi);
2660         netif_tx_disable(adapter->netdev);
2661         adapter->link_speed = 0;
2662         netif_carrier_off(adapter->netdev);
2663
2664         vmxnet3_tq_cleanup_all(adapter);
2665         vmxnet3_rq_cleanup_all(adapter);
2666         vmxnet3_free_irqs(adapter);
2667         return 0;
2668 }
2669
2670
2671 static void
2672 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2673 {
2674         u32 tmp;
2675
2676         tmp = *(u32 *)mac;
2677         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
2678
2679         tmp = (mac[5] << 8) | mac[4];
2680         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
2681 }
2682
2683
2684 static int
2685 vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
2686 {
2687         struct sockaddr *addr = p;
2688         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2689
2690         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2691         vmxnet3_write_mac_addr(adapter, addr->sa_data);
2692
2693         return 0;
2694 }
2695
2696
2697 /* ==================== initialization and cleanup routines ============ */
2698
2699 static int
2700 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter)
2701 {
2702         int err;
2703         unsigned long mmio_start, mmio_len;
2704         struct pci_dev *pdev = adapter->pdev;
2705
2706         err = pci_enable_device(pdev);
2707         if (err) {
2708                 dev_err(&pdev->dev, "Failed to enable adapter: error %d\n", err);
2709                 return err;
2710         }
2711
2712         err = pci_request_selected_regions(pdev, (1 << 2) - 1,
2713                                            vmxnet3_driver_name);
2714         if (err) {
2715                 dev_err(&pdev->dev,
2716                         "Failed to request region for adapter: error %d\n", err);
2717                 goto err_enable_device;
2718         }
2719
2720         pci_set_master(pdev);
2721
2722         mmio_start = pci_resource_start(pdev, 0);
2723         mmio_len = pci_resource_len(pdev, 0);
2724         adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
2725         if (!adapter->hw_addr0) {
2726                 dev_err(&pdev->dev, "Failed to map bar0\n");
2727                 err = -EIO;
2728                 goto err_ioremap;
2729         }
2730
2731         mmio_start = pci_resource_start(pdev, 1);
2732         mmio_len = pci_resource_len(pdev, 1);
2733         adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
2734         if (!adapter->hw_addr1) {
2735                 dev_err(&pdev->dev, "Failed to map bar1\n");
2736                 err = -EIO;
2737                 goto err_bar1;
2738         }
2739         return 0;
2740
2741 err_bar1:
2742         iounmap(adapter->hw_addr0);
2743 err_ioremap:
2744         pci_release_selected_regions(pdev, (1 << 2) - 1);
2745 err_enable_device:
2746         pci_disable_device(pdev);
2747         return err;
2748 }
2749
2750
2751 static void
2752 vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
2753 {
2754         BUG_ON(!adapter->pdev);
2755
2756         iounmap(adapter->hw_addr0);
2757         iounmap(adapter->hw_addr1);
2758         pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
2759         pci_disable_device(adapter->pdev);
2760 }
2761
2762
2763 static void
2764 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2765 {
2766         size_t sz, i, ring0_size, ring1_size, comp_size;
2767         struct vmxnet3_rx_queue *rq = &adapter->rx_queue[0];
2768
2769
2770         if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
2771                                     VMXNET3_MAX_ETH_HDR_SIZE) {
2772                 adapter->skb_buf_size = adapter->netdev->mtu +
2773                                         VMXNET3_MAX_ETH_HDR_SIZE;
2774                 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
2775                         adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
2776
2777                 adapter->rx_buf_per_pkt = 1;
2778         } else {
2779                 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
2780                 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
2781                                             VMXNET3_MAX_ETH_HDR_SIZE;
2782                 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
2783         }
2784
2785         /*
2786          * for simplicity, force the ring0 size to be a multiple of
2787          * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2788          */
2789         sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2790         ring0_size = adapter->rx_queue[0].rx_ring[0].size;
2791         ring0_size = (ring0_size + sz - 1) / sz * sz;
2792         ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE /
2793                            sz * sz);
2794         ring1_size = adapter->rx_queue[0].rx_ring[1].size;
2795         ring1_size = (ring1_size + sz - 1) / sz * sz;
2796         ring1_size = min_t(u32, ring1_size, VMXNET3_RX_RING2_MAX_SIZE /
2797                            sz * sz);
2798         comp_size = ring0_size + ring1_size;
2799
2800         for (i = 0; i < adapter->num_rx_queues; i++) {
2801                 rq = &adapter->rx_queue[i];
2802                 rq->rx_ring[0].size = ring0_size;
2803                 rq->rx_ring[1].size = ring1_size;
2804                 rq->comp_ring.size = comp_size;
2805         }
2806 }
2807
2808
2809 int
2810 vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
2811                       u32 rx_ring_size, u32 rx_ring2_size,
2812                       u16 txdata_desc_size, u16 rxdata_desc_size)
2813 {
2814         int err = 0, i;
2815
2816         for (i = 0; i < adapter->num_tx_queues; i++) {
2817                 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2818                 tq->tx_ring.size   = tx_ring_size;
2819                 tq->data_ring.size = tx_ring_size;
2820                 tq->comp_ring.size = tx_ring_size;
2821                 tq->txdata_desc_size = txdata_desc_size;
2822                 tq->shared = &adapter->tqd_start[i].ctrl;
2823                 tq->stopped = true;
2824                 tq->adapter = adapter;
2825                 tq->qid = i;
2826                 err = vmxnet3_tq_create(tq, adapter);
2827                 /*
2828                  * Too late to change num_tx_queues. We cannot do away with
2829                  * lesser number of queues than what we asked for
2830                  */
2831                 if (err)
2832                         goto queue_err;
2833         }
2834
2835         adapter->rx_queue[0].rx_ring[0].size = rx_ring_size;
2836         adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size;
2837         vmxnet3_adjust_rx_ring_size(adapter);
2838
2839         adapter->rxdataring_enabled = VMXNET3_VERSION_GE_3(adapter);
2840         for (i = 0; i < adapter->num_rx_queues; i++) {
2841                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2842                 /* qid and qid2 for rx queues will be assigned later when num
2843                  * of rx queues is finalized after allocating intrs */
2844                 rq->shared = &adapter->rqd_start[i].ctrl;
2845                 rq->adapter = adapter;
2846                 rq->data_ring.desc_size = rxdata_desc_size;
2847                 err = vmxnet3_rq_create(rq, adapter);
2848                 if (err) {
2849                         if (i == 0) {
2850                                 netdev_err(adapter->netdev,
2851                                            "Could not allocate any rx queues. "
2852                                            "Aborting.\n");
2853                                 goto queue_err;
2854                         } else {
2855                                 netdev_info(adapter->netdev,
2856                                             "Number of rx queues changed "
2857                                             "to : %d.\n", i);
2858                                 adapter->num_rx_queues = i;
2859                                 err = 0;
2860                                 break;
2861                         }
2862                 }
2863         }
2864
2865         if (!adapter->rxdataring_enabled)
2866                 vmxnet3_rq_destroy_all_rxdataring(adapter);
2867
2868         return err;
2869 queue_err:
2870         vmxnet3_tq_destroy_all(adapter);
2871         return err;
2872 }
2873
2874 static int
2875 vmxnet3_open(struct net_device *netdev)
2876 {
2877         struct vmxnet3_adapter *adapter;
2878         int err, i;
2879
2880         adapter = netdev_priv(netdev);
2881
2882         for (i = 0; i < adapter->num_tx_queues; i++)
2883                 spin_lock_init(&adapter->tx_queue[i].tx_lock);
2884
2885         if (VMXNET3_VERSION_GE_3(adapter)) {
2886                 unsigned long flags;
2887                 u16 txdata_desc_size;
2888
2889                 spin_lock_irqsave(&adapter->cmd_lock, flags);
2890                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2891                                        VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
2892                 txdata_desc_size = VMXNET3_READ_BAR1_REG(adapter,
2893                                                          VMXNET3_REG_CMD);
2894                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2895
2896                 if ((txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE) ||
2897                     (txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE) ||
2898                     (txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK)) {
2899                         adapter->txdata_desc_size =
2900                                 sizeof(struct Vmxnet3_TxDataDesc);
2901                 } else {
2902                         adapter->txdata_desc_size = txdata_desc_size;
2903                 }
2904         } else {
2905                 adapter->txdata_desc_size = sizeof(struct Vmxnet3_TxDataDesc);
2906         }
2907
2908         err = vmxnet3_create_queues(adapter,
2909                                     adapter->tx_ring_size,
2910                                     adapter->rx_ring_size,
2911                                     adapter->rx_ring2_size,
2912                                     adapter->txdata_desc_size,
2913                                     adapter->rxdata_desc_size);
2914         if (err)
2915                 goto queue_err;
2916
2917         err = vmxnet3_activate_dev(adapter);
2918         if (err)
2919                 goto activate_err;
2920
2921         return 0;
2922
2923 activate_err:
2924         vmxnet3_rq_destroy_all(adapter);
2925         vmxnet3_tq_destroy_all(adapter);
2926 queue_err:
2927         return err;
2928 }
2929
2930
2931 static int
2932 vmxnet3_close(struct net_device *netdev)
2933 {
2934         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2935
2936         /*
2937          * Reset_work may be in the middle of resetting the device, wait for its
2938          * completion.
2939          */
2940         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2941                 msleep(1);
2942
2943         vmxnet3_quiesce_dev(adapter);
2944
2945         vmxnet3_rq_destroy_all(adapter);
2946         vmxnet3_tq_destroy_all(adapter);
2947
2948         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2949
2950
2951         return 0;
2952 }
2953
2954
2955 void
2956 vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2957 {
2958         int i;
2959
2960         /*
2961          * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2962          * vmxnet3_close() will deadlock.
2963          */
2964         BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2965
2966         /* we need to enable NAPI, otherwise dev_close will deadlock */
2967         for (i = 0; i < adapter->num_rx_queues; i++)
2968                 napi_enable(&adapter->rx_queue[i].napi);
2969         /*
2970          * Need to clear the quiesce bit to ensure that vmxnet3_close
2971          * can quiesce the device properly
2972          */
2973         clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2974         dev_close(adapter->netdev);
2975 }
2976
2977
2978 static int
2979 vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2980 {
2981         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2982         int err = 0;
2983
2984         netdev->mtu = new_mtu;
2985
2986         /*
2987          * Reset_work may be in the middle of resetting the device, wait for its
2988          * completion.
2989          */
2990         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2991                 msleep(1);
2992
2993         if (netif_running(netdev)) {
2994                 vmxnet3_quiesce_dev(adapter);
2995                 vmxnet3_reset_dev(adapter);
2996
2997                 /* we need to re-create the rx queue based on the new mtu */
2998                 vmxnet3_rq_destroy_all(adapter);
2999                 vmxnet3_adjust_rx_ring_size(adapter);
3000                 err = vmxnet3_rq_create_all(adapter);
3001                 if (err) {
3002                         netdev_err(netdev,
3003                                    "failed to re-create rx queues, "
3004                                    " error %d. Closing it.\n", err);
3005                         goto out;
3006                 }
3007
3008                 err = vmxnet3_activate_dev(adapter);
3009                 if (err) {
3010                         netdev_err(netdev,
3011                                    "failed to re-activate, error %d. "
3012                                    "Closing it\n", err);
3013                         goto out;
3014                 }
3015         }
3016
3017 out:
3018         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3019         if (err)
3020                 vmxnet3_force_close(adapter);
3021
3022         return err;
3023 }
3024
3025
3026 static void
3027 vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
3028 {
3029         struct net_device *netdev = adapter->netdev;
3030
3031         netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
3032                 NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_CTAG_TX |
3033                 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_TSO | NETIF_F_TSO6 |
3034                 NETIF_F_LRO;
3035         if (dma64)
3036                 netdev->hw_features |= NETIF_F_HIGHDMA;
3037         netdev->vlan_features = netdev->hw_features &
3038                                 ~(NETIF_F_HW_VLAN_CTAG_TX |
3039                                   NETIF_F_HW_VLAN_CTAG_RX);
3040         netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
3041 }
3042
3043
3044 static void
3045 vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
3046 {
3047         u32 tmp;
3048
3049         tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
3050         *(u32 *)mac = tmp;
3051
3052         tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
3053         mac[4] = tmp & 0xff;
3054         mac[5] = (tmp >> 8) & 0xff;
3055 }
3056
3057 #ifdef CONFIG_PCI_MSI
3058
3059 /*
3060  * Enable MSIx vectors.
3061  * Returns :
3062  *      VMXNET3_LINUX_MIN_MSIX_VECT when only minimum number of vectors required
3063  *       were enabled.
3064  *      number of vectors which were enabled otherwise (this number is greater
3065  *       than VMXNET3_LINUX_MIN_MSIX_VECT)
3066  */
3067
3068 static int
3069 vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter, int nvec)
3070 {
3071         int ret = pci_enable_msix_range(adapter->pdev,
3072                                         adapter->intr.msix_entries, nvec, nvec);
3073
3074         if (ret == -ENOSPC && nvec > VMXNET3_LINUX_MIN_MSIX_VECT) {
3075                 dev_err(&adapter->netdev->dev,
3076                         "Failed to enable %d MSI-X, trying %d\n",
3077                         nvec, VMXNET3_LINUX_MIN_MSIX_VECT);
3078
3079                 ret = pci_enable_msix_range(adapter->pdev,
3080                                             adapter->intr.msix_entries,
3081                                             VMXNET3_LINUX_MIN_MSIX_VECT,
3082                                             VMXNET3_LINUX_MIN_MSIX_VECT);
3083         }
3084
3085         if (ret < 0) {
3086                 dev_err(&adapter->netdev->dev,
3087                         "Failed to enable MSI-X, error: %d\n", ret);
3088         }
3089
3090         return ret;
3091 }
3092
3093
3094 #endif /* CONFIG_PCI_MSI */
3095
3096 static void
3097 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
3098 {
3099         u32 cfg;
3100         unsigned long flags;
3101
3102         /* intr settings */
3103         spin_lock_irqsave(&adapter->cmd_lock, flags);
3104         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3105                                VMXNET3_CMD_GET_CONF_INTR);
3106         cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
3107         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3108         adapter->intr.type = cfg & 0x3;
3109         adapter->intr.mask_mode = (cfg >> 2) & 0x3;
3110
3111         if (adapter->intr.type == VMXNET3_IT_AUTO) {
3112                 adapter->intr.type = VMXNET3_IT_MSIX;
3113         }
3114
3115 #ifdef CONFIG_PCI_MSI
3116         if (adapter->intr.type == VMXNET3_IT_MSIX) {
3117                 int i, nvec;
3118
3119                 nvec  = adapter->share_intr == VMXNET3_INTR_TXSHARE ?
3120                         1 : adapter->num_tx_queues;
3121                 nvec += adapter->share_intr == VMXNET3_INTR_BUDDYSHARE ?
3122                         0 : adapter->num_rx_queues;
3123                 nvec += 1;      /* for link event */
3124                 nvec = nvec > VMXNET3_LINUX_MIN_MSIX_VECT ?
3125                        nvec : VMXNET3_LINUX_MIN_MSIX_VECT;
3126
3127                 for (i = 0; i < nvec; i++)
3128                         adapter->intr.msix_entries[i].entry = i;
3129
3130                 nvec = vmxnet3_acquire_msix_vectors(adapter, nvec);
3131                 if (nvec < 0)
3132                         goto msix_err;
3133
3134                 /* If we cannot allocate one MSIx vector per queue
3135                  * then limit the number of rx queues to 1
3136                  */
3137                 if (nvec == VMXNET3_LINUX_MIN_MSIX_VECT) {
3138                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE
3139                             || adapter->num_rx_queues != 1) {
3140                                 adapter->share_intr = VMXNET3_INTR_TXSHARE;
3141                                 netdev_err(adapter->netdev,
3142                                            "Number of rx queues : 1\n");
3143                                 adapter->num_rx_queues = 1;
3144                         }
3145                 }
3146
3147                 adapter->intr.num_intrs = nvec;
3148                 return;
3149
3150 msix_err:
3151                 /* If we cannot allocate MSIx vectors use only one rx queue */
3152                 dev_info(&adapter->pdev->dev,
3153                          "Failed to enable MSI-X, error %d. "
3154                          "Limiting #rx queues to 1, try MSI.\n", nvec);
3155
3156                 adapter->intr.type = VMXNET3_IT_MSI;
3157         }
3158
3159         if (adapter->intr.type == VMXNET3_IT_MSI) {
3160                 if (!pci_enable_msi(adapter->pdev)) {
3161                         adapter->num_rx_queues = 1;
3162                         adapter->intr.num_intrs = 1;
3163                         return;
3164                 }
3165         }
3166 #endif /* CONFIG_PCI_MSI */
3167
3168         adapter->num_rx_queues = 1;
3169         dev_info(&adapter->netdev->dev,
3170                  "Using INTx interrupt, #Rx queues: 1.\n");
3171         adapter->intr.type = VMXNET3_IT_INTX;
3172
3173         /* INT-X related setting */
3174         adapter->intr.num_intrs = 1;
3175 }
3176
3177
3178 static void
3179 vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
3180 {
3181         if (adapter->intr.type == VMXNET3_IT_MSIX)
3182                 pci_disable_msix(adapter->pdev);
3183         else if (adapter->intr.type == VMXNET3_IT_MSI)
3184                 pci_disable_msi(adapter->pdev);
3185         else
3186                 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
3187 }
3188
3189
3190 static void
3191 vmxnet3_tx_timeout(struct net_device *netdev)
3192 {
3193         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3194         adapter->tx_timeout_count++;
3195
3196         netdev_err(adapter->netdev, "tx hang\n");
3197         schedule_work(&adapter->work);
3198 }
3199
3200
3201 static void
3202 vmxnet3_reset_work(struct work_struct *data)
3203 {
3204         struct vmxnet3_adapter *adapter;
3205
3206         adapter = container_of(data, struct vmxnet3_adapter, work);
3207
3208         /* if another thread is resetting the device, no need to proceed */
3209         if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
3210                 return;
3211
3212         /* if the device is closed, we must leave it alone */
3213         rtnl_lock();
3214         if (netif_running(adapter->netdev)) {
3215                 netdev_notice(adapter->netdev, "resetting\n");
3216                 vmxnet3_quiesce_dev(adapter);
3217                 vmxnet3_reset_dev(adapter);
3218                 vmxnet3_activate_dev(adapter);
3219         } else {
3220                 netdev_info(adapter->netdev, "already closed\n");
3221         }
3222         rtnl_unlock();
3223
3224         netif_wake_queue(adapter->netdev);
3225         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3226 }
3227
3228
3229 static int
3230 vmxnet3_probe_device(struct pci_dev *pdev,
3231                      const struct pci_device_id *id)
3232 {
3233         static const struct net_device_ops vmxnet3_netdev_ops = {
3234                 .ndo_open = vmxnet3_open,
3235                 .ndo_stop = vmxnet3_close,
3236                 .ndo_start_xmit = vmxnet3_xmit_frame,
3237                 .ndo_set_mac_address = vmxnet3_set_mac_addr,
3238                 .ndo_change_mtu = vmxnet3_change_mtu,
3239                 .ndo_set_features = vmxnet3_set_features,
3240                 .ndo_get_stats64 = vmxnet3_get_stats64,
3241                 .ndo_tx_timeout = vmxnet3_tx_timeout,
3242                 .ndo_set_rx_mode = vmxnet3_set_mc,
3243                 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
3244                 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
3245 #ifdef CONFIG_NET_POLL_CONTROLLER
3246                 .ndo_poll_controller = vmxnet3_netpoll,
3247 #endif
3248         };
3249         int err;
3250         bool dma64;
3251         u32 ver;
3252         struct net_device *netdev;
3253         struct vmxnet3_adapter *adapter;
3254         u8 mac[ETH_ALEN];
3255         int size;
3256         int num_tx_queues;
3257         int num_rx_queues;
3258
3259         if (!pci_msi_enabled())
3260                 enable_mq = 0;
3261
3262 #ifdef VMXNET3_RSS
3263         if (enable_mq)
3264                 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
3265                                     (int)num_online_cpus());
3266         else
3267 #endif
3268                 num_rx_queues = 1;
3269         num_rx_queues = rounddown_pow_of_two(num_rx_queues);
3270
3271         if (enable_mq)
3272                 num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES,
3273                                     (int)num_online_cpus());
3274         else
3275                 num_tx_queues = 1;
3276
3277         num_tx_queues = rounddown_pow_of_two(num_tx_queues);
3278         netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter),
3279                                    max(num_tx_queues, num_rx_queues));
3280         dev_info(&pdev->dev,
3281                  "# of Tx queues : %d, # of Rx queues : %d\n",
3282                  num_tx_queues, num_rx_queues);
3283
3284         if (!netdev)
3285                 return -ENOMEM;
3286
3287         pci_set_drvdata(pdev, netdev);
3288         adapter = netdev_priv(netdev);
3289         adapter->netdev = netdev;
3290         adapter->pdev = pdev;
3291
3292         adapter->tx_ring_size = VMXNET3_DEF_TX_RING_SIZE;
3293         adapter->rx_ring_size = VMXNET3_DEF_RX_RING_SIZE;
3294         adapter->rx_ring2_size = VMXNET3_DEF_RX_RING2_SIZE;
3295
3296         if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
3297                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
3298                         dev_err(&pdev->dev,
3299                                 "pci_set_consistent_dma_mask failed\n");
3300                         err = -EIO;
3301                         goto err_set_mask;
3302                 }
3303                 dma64 = true;
3304         } else {
3305                 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
3306                         dev_err(&pdev->dev,
3307                                 "pci_set_dma_mask failed\n");
3308                         err = -EIO;
3309                         goto err_set_mask;
3310                 }
3311                 dma64 = false;
3312         }
3313
3314         spin_lock_init(&adapter->cmd_lock);
3315         adapter->adapter_pa = dma_map_single(&adapter->pdev->dev, adapter,
3316                                              sizeof(struct vmxnet3_adapter),
3317                                              PCI_DMA_TODEVICE);
3318         if (dma_mapping_error(&adapter->pdev->dev, adapter->adapter_pa)) {
3319                 dev_err(&pdev->dev, "Failed to map dma\n");
3320                 err = -EFAULT;
3321                 goto err_set_mask;
3322         }
3323         adapter->shared = dma_alloc_coherent(
3324                                 &adapter->pdev->dev,
3325                                 sizeof(struct Vmxnet3_DriverShared),
3326                                 &adapter->shared_pa, GFP_KERNEL);
3327         if (!adapter->shared) {
3328                 dev_err(&pdev->dev, "Failed to allocate memory\n");
3329                 err = -ENOMEM;
3330                 goto err_alloc_shared;
3331         }
3332
3333         adapter->num_rx_queues = num_rx_queues;
3334         adapter->num_tx_queues = num_tx_queues;
3335         adapter->rx_buf_per_pkt = 1;
3336
3337         size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3338         size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues;
3339         adapter->tqd_start = dma_alloc_coherent(&adapter->pdev->dev, size,
3340                                                 &adapter->queue_desc_pa,
3341                                                 GFP_KERNEL);
3342
3343         if (!adapter->tqd_start) {
3344                 dev_err(&pdev->dev, "Failed to allocate memory\n");
3345                 err = -ENOMEM;
3346                 goto err_alloc_queue_desc;
3347         }
3348         adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start +
3349                                                             adapter->num_tx_queues);
3350
3351         adapter->pm_conf = dma_alloc_coherent(&adapter->pdev->dev,
3352                                               sizeof(struct Vmxnet3_PMConf),
3353                                               &adapter->pm_conf_pa,
3354                                               GFP_KERNEL);
3355         if (adapter->pm_conf == NULL) {
3356                 err = -ENOMEM;
3357                 goto err_alloc_pm;
3358         }
3359
3360 #ifdef VMXNET3_RSS
3361
3362         adapter->rss_conf = dma_alloc_coherent(&adapter->pdev->dev,
3363                                                sizeof(struct UPT1_RSSConf),
3364                                                &adapter->rss_conf_pa,
3365                                                GFP_KERNEL);
3366         if (adapter->rss_conf == NULL) {
3367                 err = -ENOMEM;
3368                 goto err_alloc_rss;
3369         }
3370 #endif /* VMXNET3_RSS */
3371
3372         err = vmxnet3_alloc_pci_resources(adapter);
3373         if (err < 0)
3374                 goto err_alloc_pci;
3375
3376         ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
3377         if (ver & (1 << VMXNET3_REV_3)) {
3378                 VMXNET3_WRITE_BAR1_REG(adapter,
3379                                        VMXNET3_REG_VRRS,
3380                                        1 << VMXNET3_REV_3);
3381                 adapter->version = VMXNET3_REV_3 + 1;
3382         } else if (ver & (1 << VMXNET3_REV_2)) {
3383                 VMXNET3_WRITE_BAR1_REG(adapter,
3384                                        VMXNET3_REG_VRRS,
3385                                        1 << VMXNET3_REV_2);
3386                 adapter->version = VMXNET3_REV_2 + 1;
3387         } else if (ver & (1 << VMXNET3_REV_1)) {
3388                 VMXNET3_WRITE_BAR1_REG(adapter,
3389                                        VMXNET3_REG_VRRS,
3390                                        1 << VMXNET3_REV_1);
3391                 adapter->version = VMXNET3_REV_1 + 1;
3392         } else {
3393                 dev_err(&pdev->dev,
3394                         "Incompatible h/w version (0x%x) for adapter\n", ver);
3395                 err = -EBUSY;
3396                 goto err_ver;
3397         }
3398         dev_dbg(&pdev->dev, "Using device version %d\n", adapter->version);
3399
3400         ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
3401         if (ver & 1) {
3402                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
3403         } else {
3404                 dev_err(&pdev->dev,
3405                         "Incompatible upt version (0x%x) for adapter\n", ver);
3406                 err = -EBUSY;
3407                 goto err_ver;
3408         }
3409
3410         if (VMXNET3_VERSION_GE_3(adapter)) {
3411                 adapter->coal_conf =
3412                         dma_alloc_coherent(&adapter->pdev->dev,
3413                                            sizeof(struct Vmxnet3_CoalesceScheme)
3414                                            ,
3415                                            &adapter->coal_conf_pa,
3416                                            GFP_KERNEL);
3417                 if (!adapter->coal_conf) {
3418                         err = -ENOMEM;
3419                         goto err_ver;
3420                 }
3421                 memset(adapter->coal_conf, 0, sizeof(*adapter->coal_conf));
3422                 adapter->coal_conf->coalMode = VMXNET3_COALESCE_DISABLED;
3423                 adapter->default_coal_mode = true;
3424         }
3425
3426         SET_NETDEV_DEV(netdev, &pdev->dev);
3427         vmxnet3_declare_features(adapter, dma64);
3428
3429         adapter->rxdata_desc_size = VMXNET3_VERSION_GE_3(adapter) ?
3430                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
3431
3432         if (adapter->num_tx_queues == adapter->num_rx_queues)
3433                 adapter->share_intr = VMXNET3_INTR_BUDDYSHARE;
3434         else
3435                 adapter->share_intr = VMXNET3_INTR_DONTSHARE;
3436
3437         vmxnet3_alloc_intr_resources(adapter);
3438
3439 #ifdef VMXNET3_RSS
3440         if (adapter->num_rx_queues > 1 &&
3441             adapter->intr.type == VMXNET3_IT_MSIX) {
3442                 adapter->rss = true;
3443                 netdev->hw_features |= NETIF_F_RXHASH;
3444                 netdev->features |= NETIF_F_RXHASH;
3445                 dev_dbg(&pdev->dev, "RSS is enabled.\n");
3446         } else {
3447                 adapter->rss = false;
3448         }
3449 #endif
3450
3451         vmxnet3_read_mac_addr(adapter, mac);
3452         memcpy(netdev->dev_addr,  mac, netdev->addr_len);
3453
3454         netdev->netdev_ops = &vmxnet3_netdev_ops;
3455         vmxnet3_set_ethtool_ops(netdev);
3456         netdev->watchdog_timeo = 5 * HZ;
3457
3458         /* MTU range: 60 - 9000 */
3459         netdev->min_mtu = VMXNET3_MIN_MTU;
3460         netdev->max_mtu = VMXNET3_MAX_MTU;
3461
3462         INIT_WORK(&adapter->work, vmxnet3_reset_work);
3463         set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
3464
3465         if (adapter->intr.type == VMXNET3_IT_MSIX) {
3466                 int i;
3467                 for (i = 0; i < adapter->num_rx_queues; i++) {
3468                         netif_napi_add(adapter->netdev,
3469                                        &adapter->rx_queue[i].napi,
3470                                        vmxnet3_poll_rx_only, 64);
3471                 }
3472         } else {
3473                 netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi,
3474                                vmxnet3_poll, 64);
3475         }
3476
3477         netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
3478         netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues);
3479
3480         netif_carrier_off(netdev);
3481         err = register_netdev(netdev);
3482
3483         if (err) {
3484                 dev_err(&pdev->dev, "Failed to register adapter\n");
3485                 goto err_register;
3486         }
3487
3488         vmxnet3_check_link(adapter, false);
3489         return 0;
3490
3491 err_register:
3492         if (VMXNET3_VERSION_GE_3(adapter)) {
3493                 dma_free_coherent(&adapter->pdev->dev,
3494                                   sizeof(struct Vmxnet3_CoalesceScheme),
3495                                   adapter->coal_conf, adapter->coal_conf_pa);
3496         }
3497         vmxnet3_free_intr_resources(adapter);
3498 err_ver:
3499         vmxnet3_free_pci_resources(adapter);
3500 err_alloc_pci:
3501 #ifdef VMXNET3_RSS
3502         dma_free_coherent(&adapter->pdev->dev, sizeof(struct UPT1_RSSConf),
3503                           adapter->rss_conf, adapter->rss_conf_pa);
3504 err_alloc_rss:
3505 #endif
3506         dma_free_coherent(&adapter->pdev->dev, sizeof(struct Vmxnet3_PMConf),
3507                           adapter->pm_conf, adapter->pm_conf_pa);
3508 err_alloc_pm:
3509         dma_free_coherent(&adapter->pdev->dev, size, adapter->tqd_start,
3510                           adapter->queue_desc_pa);
3511 err_alloc_queue_desc:
3512         dma_free_coherent(&adapter->pdev->dev,
3513                           sizeof(struct Vmxnet3_DriverShared),
3514                           adapter->shared, adapter->shared_pa);
3515 err_alloc_shared:
3516         dma_unmap_single(&adapter->pdev->dev, adapter->adapter_pa,
3517                          sizeof(struct vmxnet3_adapter), PCI_DMA_TODEVICE);
3518 err_set_mask:
3519         free_netdev(netdev);
3520         return err;
3521 }
3522
3523
3524 static void
3525 vmxnet3_remove_device(struct pci_dev *pdev)
3526 {
3527         struct net_device *netdev = pci_get_drvdata(pdev);
3528         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3529         int size = 0;
3530         int num_rx_queues;
3531
3532 #ifdef VMXNET3_RSS
3533         if (enable_mq)
3534                 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
3535                                     (int)num_online_cpus());
3536         else
3537 #endif
3538                 num_rx_queues = 1;
3539         num_rx_queues = rounddown_pow_of_two(num_rx_queues);
3540
3541         cancel_work_sync(&adapter->work);
3542
3543         unregister_netdev(netdev);
3544
3545         vmxnet3_free_intr_resources(adapter);
3546         vmxnet3_free_pci_resources(adapter);
3547         if (VMXNET3_VERSION_GE_3(adapter)) {
3548                 dma_free_coherent(&adapter->pdev->dev,
3549                                   sizeof(struct Vmxnet3_CoalesceScheme),
3550                                   adapter->coal_conf, adapter->coal_conf_pa);
3551         }
3552 #ifdef VMXNET3_RSS
3553         dma_free_coherent(&adapter->pdev->dev, sizeof(struct UPT1_RSSConf),
3554                           adapter->rss_conf, adapter->rss_conf_pa);
3555 #endif
3556         dma_free_coherent(&adapter->pdev->dev, sizeof(struct Vmxnet3_PMConf),
3557                           adapter->pm_conf, adapter->pm_conf_pa);
3558
3559         size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3560         size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues;
3561         dma_free_coherent(&adapter->pdev->dev, size, adapter->tqd_start,
3562                           adapter->queue_desc_pa);
3563         dma_free_coherent(&adapter->pdev->dev,
3564                           sizeof(struct Vmxnet3_DriverShared),
3565                           adapter->shared, adapter->shared_pa);
3566         dma_unmap_single(&adapter->pdev->dev, adapter->adapter_pa,
3567                          sizeof(struct vmxnet3_adapter), PCI_DMA_TODEVICE);
3568         free_netdev(netdev);
3569 }
3570
3571 static void vmxnet3_shutdown_device(struct pci_dev *pdev)
3572 {
3573         struct net_device *netdev = pci_get_drvdata(pdev);
3574         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3575         unsigned long flags;
3576
3577         /* Reset_work may be in the middle of resetting the device, wait for its
3578          * completion.
3579          */
3580         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
3581                 msleep(1);
3582
3583         if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED,
3584                              &adapter->state)) {
3585                 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3586                 return;
3587         }
3588         spin_lock_irqsave(&adapter->cmd_lock, flags);
3589         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3590                                VMXNET3_CMD_QUIESCE_DEV);
3591         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3592         vmxnet3_disable_all_intrs(adapter);
3593
3594         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3595 }
3596
3597
3598 #ifdef CONFIG_PM
3599
3600 static int
3601 vmxnet3_suspend(struct device *device)
3602 {
3603         struct pci_dev *pdev = to_pci_dev(device);
3604         struct net_device *netdev = pci_get_drvdata(pdev);
3605         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3606         struct Vmxnet3_PMConf *pmConf;
3607         struct ethhdr *ehdr;
3608         struct arphdr *ahdr;
3609         u8 *arpreq;
3610         struct in_device *in_dev;
3611         struct in_ifaddr *ifa;
3612         unsigned long flags;
3613         int i = 0;
3614
3615         if (!netif_running(netdev))
3616                 return 0;
3617
3618         for (i = 0; i < adapter->num_rx_queues; i++)
3619                 napi_disable(&adapter->rx_queue[i].napi);
3620
3621         vmxnet3_disable_all_intrs(adapter);
3622         vmxnet3_free_irqs(adapter);
3623         vmxnet3_free_intr_resources(adapter);
3624
3625         netif_device_detach(netdev);
3626         netif_tx_stop_all_queues(netdev);
3627
3628         /* Create wake-up filters. */
3629         pmConf = adapter->pm_conf;
3630         memset(pmConf, 0, sizeof(*pmConf));
3631
3632         if (adapter->wol & WAKE_UCAST) {
3633                 pmConf->filters[i].patternSize = ETH_ALEN;
3634                 pmConf->filters[i].maskSize = 1;
3635                 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
3636                 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
3637
3638                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3639                 i++;
3640         }
3641
3642         if (adapter->wol & WAKE_ARP) {
3643                 in_dev = in_dev_get(netdev);
3644                 if (!in_dev)
3645                         goto skip_arp;
3646
3647                 ifa = (struct in_ifaddr *)in_dev->ifa_list;
3648                 if (!ifa)
3649                         goto skip_arp;
3650
3651                 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
3652                         sizeof(struct arphdr) +         /* ARP header */
3653                         2 * ETH_ALEN +          /* 2 Ethernet addresses*/
3654                         2 * sizeof(u32);        /*2 IPv4 addresses */
3655                 pmConf->filters[i].maskSize =
3656                         (pmConf->filters[i].patternSize - 1) / 8 + 1;
3657
3658                 /* ETH_P_ARP in Ethernet header. */
3659                 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
3660                 ehdr->h_proto = htons(ETH_P_ARP);
3661
3662                 /* ARPOP_REQUEST in ARP header. */
3663                 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
3664                 ahdr->ar_op = htons(ARPOP_REQUEST);
3665                 arpreq = (u8 *)(ahdr + 1);
3666
3667                 /* The Unicast IPv4 address in 'tip' field. */
3668                 arpreq += 2 * ETH_ALEN + sizeof(u32);
3669                 *(u32 *)arpreq = ifa->ifa_address;
3670
3671                 /* The mask for the relevant bits. */
3672                 pmConf->filters[i].mask[0] = 0x00;
3673                 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
3674                 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
3675                 pmConf->filters[i].mask[3] = 0x00;
3676                 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
3677                 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
3678                 in_dev_put(in_dev);
3679
3680                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3681                 i++;
3682         }
3683
3684 skip_arp:
3685         if (adapter->wol & WAKE_MAGIC)
3686                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC;
3687
3688         pmConf->numFilters = i;
3689
3690         adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
3691         adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
3692                                                                   *pmConf));
3693         adapter->shared->devRead.pmConfDesc.confPA =
3694                 cpu_to_le64(adapter->pm_conf_pa);
3695
3696         spin_lock_irqsave(&adapter->cmd_lock, flags);
3697         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3698                                VMXNET3_CMD_UPDATE_PMCFG);
3699         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3700
3701         pci_save_state(pdev);
3702         pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
3703                         adapter->wol);
3704         pci_disable_device(pdev);
3705         pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
3706
3707         return 0;
3708 }
3709
3710
3711 static int
3712 vmxnet3_resume(struct device *device)
3713 {
3714         int err;
3715         unsigned long flags;
3716         struct pci_dev *pdev = to_pci_dev(device);
3717         struct net_device *netdev = pci_get_drvdata(pdev);
3718         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3719
3720         if (!netif_running(netdev))
3721                 return 0;
3722
3723         pci_set_power_state(pdev, PCI_D0);
3724         pci_restore_state(pdev);
3725         err = pci_enable_device_mem(pdev);
3726         if (err != 0)
3727                 return err;
3728
3729         pci_enable_wake(pdev, PCI_D0, 0);
3730
3731         vmxnet3_alloc_intr_resources(adapter);
3732
3733         /* During hibernate and suspend, device has to be reinitialized as the
3734          * device state need not be preserved.
3735          */
3736
3737         /* Need not check adapter state as other reset tasks cannot run during
3738          * device resume.
3739          */
3740         spin_lock_irqsave(&adapter->cmd_lock, flags);
3741         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3742                                VMXNET3_CMD_QUIESCE_DEV);
3743         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3744         vmxnet3_tq_cleanup_all(adapter);
3745         vmxnet3_rq_cleanup_all(adapter);
3746
3747         vmxnet3_reset_dev(adapter);
3748         err = vmxnet3_activate_dev(adapter);
3749         if (err != 0) {
3750                 netdev_err(netdev,
3751                            "failed to re-activate on resume, error: %d", err);
3752                 vmxnet3_force_close(adapter);
3753                 return err;
3754         }
3755         netif_device_attach(netdev);
3756
3757         return 0;
3758 }
3759
3760 static const struct dev_pm_ops vmxnet3_pm_ops = {
3761         .suspend = vmxnet3_suspend,
3762         .resume = vmxnet3_resume,
3763         .freeze = vmxnet3_suspend,
3764         .restore = vmxnet3_resume,
3765 };
3766 #endif
3767
3768 static struct pci_driver vmxnet3_driver = {
3769         .name           = vmxnet3_driver_name,
3770         .id_table       = vmxnet3_pciid_table,
3771         .probe          = vmxnet3_probe_device,
3772         .remove         = vmxnet3_remove_device,
3773         .shutdown       = vmxnet3_shutdown_device,
3774 #ifdef CONFIG_PM
3775         .driver.pm      = &vmxnet3_pm_ops,
3776 #endif
3777 };
3778
3779
3780 static int __init
3781 vmxnet3_init_module(void)
3782 {
3783         pr_info("%s - version %s\n", VMXNET3_DRIVER_DESC,
3784                 VMXNET3_DRIVER_VERSION_REPORT);
3785         return pci_register_driver(&vmxnet3_driver);
3786 }
3787
3788 module_init(vmxnet3_init_module);
3789
3790
3791 static void
3792 vmxnet3_exit_module(void)
3793 {
3794         pci_unregister_driver(&vmxnet3_driver);
3795 }
3796
3797 module_exit(vmxnet3_exit_module);
3798
3799 MODULE_AUTHOR("VMware, Inc.");
3800 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
3801 MODULE_LICENSE("GPL v2");
3802 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);