2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
31 /* Information for net-next */
32 #define NETNEXT_VERSION "09"
34 /* Information for net */
35 #define NET_VERSION "9"
37 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
42 #define R8152_PHY_ID 32
44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RMS 0xc016
47 #define PLA_RXFIFO_CTRL0 0xc0a0
48 #define PLA_RXFIFO_CTRL1 0xc0a4
49 #define PLA_RXFIFO_CTRL2 0xc0a8
50 #define PLA_DMY_REG0 0xc0b0
51 #define PLA_FMC 0xc0b4
52 #define PLA_CFG_WOL 0xc0b6
53 #define PLA_TEREDO_CFG 0xc0bc
54 #define PLA_TEREDO_WAKE_BASE 0xc0c4
55 #define PLA_MAR 0xcd00
56 #define PLA_BACKUP 0xd000
57 #define PAL_BDC_CR 0xd1a0
58 #define PLA_TEREDO_TIMER 0xd2cc
59 #define PLA_REALWOW_TIMER 0xd2e8
60 #define PLA_EFUSE_DATA 0xdd00
61 #define PLA_EFUSE_CMD 0xdd02
62 #define PLA_LEDSEL 0xdd90
63 #define PLA_LED_FEATURE 0xdd92
64 #define PLA_PHYAR 0xde00
65 #define PLA_BOOT_CTRL 0xe004
66 #define PLA_GPHY_INTR_IMR 0xe022
67 #define PLA_EEE_CR 0xe040
68 #define PLA_EEEP_CR 0xe080
69 #define PLA_MAC_PWR_CTRL 0xe0c0
70 #define PLA_MAC_PWR_CTRL2 0xe0ca
71 #define PLA_MAC_PWR_CTRL3 0xe0cc
72 #define PLA_MAC_PWR_CTRL4 0xe0ce
73 #define PLA_WDT6_CTRL 0xe428
74 #define PLA_TCR0 0xe610
75 #define PLA_TCR1 0xe612
76 #define PLA_MTPS 0xe615
77 #define PLA_TXFIFO_CTRL 0xe618
78 #define PLA_RSTTALLY 0xe800
80 #define PLA_CRWECR 0xe81c
81 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
82 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
83 #define PLA_CONFIG5 0xe822
84 #define PLA_PHY_PWR 0xe84c
85 #define PLA_OOB_CTRL 0xe84f
86 #define PLA_CPCR 0xe854
87 #define PLA_MISC_0 0xe858
88 #define PLA_MISC_1 0xe85a
89 #define PLA_OCP_GPHY_BASE 0xe86c
90 #define PLA_TALLYCNT 0xe890
91 #define PLA_SFF_STS_7 0xe8de
92 #define PLA_PHYSTATUS 0xe908
93 #define PLA_BP_BA 0xfc26
94 #define PLA_BP_0 0xfc28
95 #define PLA_BP_1 0xfc2a
96 #define PLA_BP_2 0xfc2c
97 #define PLA_BP_3 0xfc2e
98 #define PLA_BP_4 0xfc30
99 #define PLA_BP_5 0xfc32
100 #define PLA_BP_6 0xfc34
101 #define PLA_BP_7 0xfc36
102 #define PLA_BP_EN 0xfc38
104 #define USB_USB2PHY 0xb41e
105 #define USB_SSPHYLINK2 0xb428
106 #define USB_U2P3_CTRL 0xb460
107 #define USB_CSR_DUMMY1 0xb464
108 #define USB_CSR_DUMMY2 0xb466
109 #define USB_DEV_STAT 0xb808
110 #define USB_CONNECT_TIMER 0xcbf8
111 #define USB_MSC_TIMER 0xcbfc
112 #define USB_BURST_SIZE 0xcfc0
113 #define USB_LPM_CONFIG 0xcfd8
114 #define USB_USB_CTRL 0xd406
115 #define USB_PHY_CTRL 0xd408
116 #define USB_TX_AGG 0xd40a
117 #define USB_RX_BUF_TH 0xd40c
118 #define USB_USB_TIMER 0xd428
119 #define USB_RX_EARLY_TIMEOUT 0xd42c
120 #define USB_RX_EARLY_SIZE 0xd42e
121 #define USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */
122 #define USB_RX_EXTRA_AGGR_TMR 0xd432 /* RTL8153B */
123 #define USB_TX_DMA 0xd434
124 #define USB_UPT_RXDMA_OWN 0xd437
125 #define USB_TOLERANCE 0xd490
126 #define USB_LPM_CTRL 0xd41a
127 #define USB_BMU_RESET 0xd4b0
128 #define USB_U1U2_TIMER 0xd4da
129 #define USB_UPS_CTRL 0xd800
130 #define USB_POWER_CUT 0xd80a
131 #define USB_MISC_0 0xd81a
132 #define USB_AFE_CTRL2 0xd824
133 #define USB_UPS_CFG 0xd842
134 #define USB_UPS_FLAGS 0xd848
135 #define USB_WDT11_CTRL 0xe43c
136 #define USB_BP_BA 0xfc26
137 #define USB_BP_0 0xfc28
138 #define USB_BP_1 0xfc2a
139 #define USB_BP_2 0xfc2c
140 #define USB_BP_3 0xfc2e
141 #define USB_BP_4 0xfc30
142 #define USB_BP_5 0xfc32
143 #define USB_BP_6 0xfc34
144 #define USB_BP_7 0xfc36
145 #define USB_BP_EN 0xfc38
146 #define USB_BP_8 0xfc38
147 #define USB_BP_9 0xfc3a
148 #define USB_BP_10 0xfc3c
149 #define USB_BP_11 0xfc3e
150 #define USB_BP_12 0xfc40
151 #define USB_BP_13 0xfc42
152 #define USB_BP_14 0xfc44
153 #define USB_BP_15 0xfc46
154 #define USB_BP2_EN 0xfc48
157 #define OCP_ALDPS_CONFIG 0x2010
158 #define OCP_EEE_CONFIG1 0x2080
159 #define OCP_EEE_CONFIG2 0x2092
160 #define OCP_EEE_CONFIG3 0x2094
161 #define OCP_BASE_MII 0xa400
162 #define OCP_EEE_AR 0xa41a
163 #define OCP_EEE_DATA 0xa41c
164 #define OCP_PHY_STATUS 0xa420
165 #define OCP_NCTL_CFG 0xa42c
166 #define OCP_POWER_CFG 0xa430
167 #define OCP_EEE_CFG 0xa432
168 #define OCP_SRAM_ADDR 0xa436
169 #define OCP_SRAM_DATA 0xa438
170 #define OCP_DOWN_SPEED 0xa442
171 #define OCP_EEE_ABLE 0xa5c4
172 #define OCP_EEE_ADV 0xa5d0
173 #define OCP_EEE_LPABLE 0xa5d2
174 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
175 #define OCP_PHY_PATCH_STAT 0xb800
176 #define OCP_PHY_PATCH_CMD 0xb820
177 #define OCP_ADC_IOFFSET 0xbcfc
178 #define OCP_ADC_CFG 0xbc06
179 #define OCP_SYSCLK_CFG 0xc416
182 #define SRAM_GREEN_CFG 0x8011
183 #define SRAM_LPF_CFG 0x8012
184 #define SRAM_10M_AMP1 0x8080
185 #define SRAM_10M_AMP2 0x8082
186 #define SRAM_IMPEDANCE 0x8084
189 #define RCR_AAP 0x00000001
190 #define RCR_APM 0x00000002
191 #define RCR_AM 0x00000004
192 #define RCR_AB 0x00000008
193 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
195 /* PLA_RXFIFO_CTRL0 */
196 #define RXFIFO_THR1_NORMAL 0x00080002
197 #define RXFIFO_THR1_OOB 0x01800003
199 /* PLA_RXFIFO_CTRL1 */
200 #define RXFIFO_THR2_FULL 0x00000060
201 #define RXFIFO_THR2_HIGH 0x00000038
202 #define RXFIFO_THR2_OOB 0x0000004a
203 #define RXFIFO_THR2_NORMAL 0x00a0
205 /* PLA_RXFIFO_CTRL2 */
206 #define RXFIFO_THR3_FULL 0x00000078
207 #define RXFIFO_THR3_HIGH 0x00000048
208 #define RXFIFO_THR3_OOB 0x0000005a
209 #define RXFIFO_THR3_NORMAL 0x0110
211 /* PLA_TXFIFO_CTRL */
212 #define TXFIFO_THR_NORMAL 0x00400008
213 #define TXFIFO_THR_NORMAL2 0x01000008
216 #define ECM_ALDPS 0x0002
219 #define FMC_FCR_MCU_EN 0x0001
222 #define EEEP_CR_EEEP_TX 0x0002
225 #define WDT6_SET_MODE 0x0010
228 #define TCR0_TX_EMPTY 0x0800
229 #define TCR0_AUTO_FIFO 0x0080
232 #define VERSION_MASK 0x7cf0
235 #define MTPS_JUMBO (12 * 1024 / 64)
236 #define MTPS_DEFAULT (6 * 1024 / 64)
239 #define TALLY_RESET 0x0001
247 #define CRWECR_NORAML 0x00
248 #define CRWECR_CONFIG 0xc0
251 #define NOW_IS_OOB 0x80
252 #define TXFIFO_EMPTY 0x20
253 #define RXFIFO_EMPTY 0x10
254 #define LINK_LIST_READY 0x02
255 #define DIS_MCU_CLROOB 0x01
256 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
259 #define RXDY_GATED_EN 0x0008
262 #define RE_INIT_LL 0x8000
263 #define MCU_BORW_EN 0x4000
266 #define CPCR_RX_VLAN 0x0040
269 #define MAGIC_EN 0x0001
272 #define TEREDO_SEL 0x8000
273 #define TEREDO_WAKE_MASK 0x7f00
274 #define TEREDO_RS_EVENT_MASK 0x00fe
275 #define OOB_TEREDO_EN 0x0001
278 #define ALDPS_PROXY_MODE 0x0001
281 #define EFUSE_READ_CMD BIT(15)
282 #define EFUSE_DATA_BIT16 BIT(7)
285 #define LINK_ON_WAKE_EN 0x0010
286 #define LINK_OFF_WAKE_EN 0x0008
289 #define BWF_EN 0x0040
290 #define MWF_EN 0x0020
291 #define UWF_EN 0x0010
292 #define LAN_WAKE_EN 0x0002
294 /* PLA_LED_FEATURE */
295 #define LED_MODE_MASK 0x0700
298 #define TX_10M_IDLE_EN 0x0080
299 #define PFM_PWM_SWITCH 0x0040
301 /* PLA_MAC_PWR_CTRL */
302 #define D3_CLK_GATED_EN 0x00004000
303 #define MCU_CLK_RATIO 0x07010f07
304 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
305 #define ALDPS_SPDWN_RATIO 0x0f87
307 /* PLA_MAC_PWR_CTRL2 */
308 #define EEE_SPDWN_RATIO 0x8007
309 #define MAC_CLK_SPDWN_EN BIT(15)
311 /* PLA_MAC_PWR_CTRL3 */
312 #define PKT_AVAIL_SPDWN_EN 0x0100
313 #define SUSPEND_SPDWN_EN 0x0004
314 #define U1U2_SPDWN_EN 0x0002
315 #define L1_SPDWN_EN 0x0001
317 /* PLA_MAC_PWR_CTRL4 */
318 #define PWRSAVE_SPDWN_EN 0x1000
319 #define RXDV_SPDWN_EN 0x0800
320 #define TX10MIDLE_EN 0x0100
321 #define TP100_SPDWN_EN 0x0020
322 #define TP500_SPDWN_EN 0x0010
323 #define TP1000_SPDWN_EN 0x0008
324 #define EEE_SPDWN_EN 0x0001
326 /* PLA_GPHY_INTR_IMR */
327 #define GPHY_STS_MSK 0x0001
328 #define SPEED_DOWN_MSK 0x0002
329 #define SPDWN_RXDV_MSK 0x0004
330 #define SPDWN_LINKCHG_MSK 0x0008
333 #define PHYAR_FLAG 0x80000000
336 #define EEE_RX_EN 0x0001
337 #define EEE_TX_EN 0x0002
340 #define AUTOLOAD_DONE 0x0002
343 #define USB2PHY_SUSPEND 0x0001
344 #define USB2PHY_L1 0x0002
347 #define pwd_dn_scale_mask 0x3ffe
348 #define pwd_dn_scale(x) ((x) << 1)
351 #define DYNAMIC_BURST 0x0001
354 #define EP4_FULL_FC 0x0001
357 #define STAT_SPEED_MASK 0x0006
358 #define STAT_SPEED_HIGH 0x0000
359 #define STAT_SPEED_FULL 0x0002
362 #define LPM_U1U2_EN BIT(0)
365 #define TX_AGG_MAX_THRESHOLD 0x03
368 #define RX_THR_SUPPER 0x0c350180
369 #define RX_THR_HIGH 0x7a120180
370 #define RX_THR_SLOW 0xffff0180
371 #define RX_THR_B 0x00010001
374 #define TEST_MODE_DISABLE 0x00000001
375 #define TX_SIZE_ADJUST1 0x00000100
378 #define BMU_RESET_EP_IN 0x01
379 #define BMU_RESET_EP_OUT 0x02
381 /* USB_UPT_RXDMA_OWN */
382 #define OWN_UPDATE BIT(0)
383 #define OWN_CLEAR BIT(1)
386 #define POWER_CUT 0x0100
388 /* USB_PM_CTRL_STATUS */
389 #define RESUME_INDICATE 0x0001
392 #define RX_AGG_DISABLE 0x0010
393 #define RX_ZERO_EN 0x0080
396 #define U2P3_ENABLE 0x0001
399 #define PWR_EN 0x0001
400 #define PHASE2_EN 0x0008
401 #define UPS_EN BIT(4)
402 #define USP_PREWAKE BIT(5)
405 #define PCUT_STATUS 0x0001
407 /* USB_RX_EARLY_TIMEOUT */
408 #define COALESCE_SUPER 85000U
409 #define COALESCE_HIGH 250000U
410 #define COALESCE_SLOW 524280U
413 #define TIMER11_EN 0x0001
416 /* bit 4 ~ 5: fifo empty boundary */
417 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
418 /* bit 2 ~ 3: LMP timer */
419 #define LPM_TIMER_MASK 0x0c
420 #define LPM_TIMER_500MS 0x04 /* 500 ms */
421 #define LPM_TIMER_500US 0x0c /* 500 us */
422 #define ROK_EXIT_LPM 0x02
425 #define SEN_VAL_MASK 0xf800
426 #define SEN_VAL_NORMAL 0xa000
427 #define SEL_RXIDLE 0x0100
430 #define SAW_CNT_1MS_MASK 0x0fff
433 #define UPS_FLAGS_R_TUNE BIT(0)
434 #define UPS_FLAGS_EN_10M_CKDIV BIT(1)
435 #define UPS_FLAGS_250M_CKDIV BIT(2)
436 #define UPS_FLAGS_EN_ALDPS BIT(3)
437 #define UPS_FLAGS_CTAP_SHORT_DIS BIT(4)
438 #define UPS_FLAGS_SPEED_MASK (0xf << 16)
439 #define ups_flags_speed(x) ((x) << 16)
440 #define UPS_FLAGS_EN_EEE BIT(20)
441 #define UPS_FLAGS_EN_500M_EEE BIT(21)
442 #define UPS_FLAGS_EN_EEE_CKDIV BIT(22)
443 #define UPS_FLAGS_EEE_PLLOFF_GIGA BIT(24)
444 #define UPS_FLAGS_EEE_CMOD_LV_EN BIT(25)
445 #define UPS_FLAGS_EN_GREEN BIT(26)
446 #define UPS_FLAGS_EN_FLOW_CTR BIT(27)
460 /* OCP_ALDPS_CONFIG */
461 #define ENPWRSAVE 0x8000
462 #define ENPDNPS 0x0200
463 #define LINKENA 0x0100
464 #define DIS_SDSAVE 0x0010
467 #define PHY_STAT_MASK 0x0007
468 #define PHY_STAT_EXT_INIT 2
469 #define PHY_STAT_LAN_ON 3
470 #define PHY_STAT_PWRDN 5
473 #define PGA_RETURN_EN BIT(1)
476 #define EEE_CLKDIV_EN 0x8000
477 #define EN_ALDPS 0x0004
478 #define EN_10M_PLLOFF 0x0001
480 /* OCP_EEE_CONFIG1 */
481 #define RG_TXLPI_MSK_HFDUP 0x8000
482 #define RG_MATCLR_EN 0x4000
483 #define EEE_10_CAP 0x2000
484 #define EEE_NWAY_EN 0x1000
485 #define TX_QUIET_EN 0x0200
486 #define RX_QUIET_EN 0x0100
487 #define sd_rise_time_mask 0x0070
488 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
489 #define RG_RXLPI_MSK_HFDUP 0x0008
490 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
492 /* OCP_EEE_CONFIG2 */
493 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
494 #define RG_DACQUIET_EN 0x0400
495 #define RG_LDVQUIET_EN 0x0200
496 #define RG_CKRSEL 0x0020
497 #define RG_EEEPRG_EN 0x0010
499 /* OCP_EEE_CONFIG3 */
500 #define fast_snr_mask 0xff80
501 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
502 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
503 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
506 /* bit[15:14] function */
507 #define FUN_ADDR 0x0000
508 #define FUN_DATA 0x4000
509 /* bit[4:0] device addr */
512 #define CTAP_SHORT_EN 0x0040
513 #define EEE10_EN 0x0010
516 #define EN_EEE_CMODE BIT(14)
517 #define EN_EEE_1000 BIT(13)
518 #define EN_EEE_100 BIT(12)
519 #define EN_10M_CLKDIV BIT(11)
520 #define EN_10M_BGOFF 0x0080
523 #define TXDIS_STATE 0x01
524 #define ABD_STATE 0x02
526 /* OCP_PHY_PATCH_STAT */
527 #define PATCH_READY BIT(6)
529 /* OCP_PHY_PATCH_CMD */
530 #define PATCH_REQUEST BIT(4)
533 #define CKADSEL_L 0x0100
534 #define ADC_EN 0x0080
535 #define EN_EMI_L 0x0040
538 #define clk_div_expo(x) (min(x, 5) << 8)
541 #define GREEN_ETH_EN BIT(15)
542 #define R_TUNE_EN BIT(11)
545 #define LPF_AUTO_TUNE 0x8000
548 #define GDAC_IB_UPALL 0x0008
551 #define AMP_DN 0x0200
554 #define RX_DRIVING_MASK 0x6000
557 #define AD_MASK 0xfee0
559 #define PASS_THRU_MASK 0x1
561 enum rtl_register_content {
569 #define RTL8152_MAX_TX 4
570 #define RTL8152_MAX_RX 10
575 #define INTR_LINK 0x0004
577 #define RTL8152_REQT_READ 0xc0
578 #define RTL8152_REQT_WRITE 0x40
579 #define RTL8152_REQ_GET_REGS 0x05
580 #define RTL8152_REQ_SET_REGS 0x05
582 #define BYTE_EN_DWORD 0xff
583 #define BYTE_EN_WORD 0x33
584 #define BYTE_EN_BYTE 0x11
585 #define BYTE_EN_SIX_BYTES 0x3f
586 #define BYTE_EN_START_MASK 0x0f
587 #define BYTE_EN_END_MASK 0xf0
589 #define RTL8153_MAX_PACKET 9216 /* 9K */
590 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - \
592 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
593 #define RTL8153_RMS RTL8153_MAX_PACKET
594 #define RTL8152_TX_TIMEOUT (5 * HZ)
595 #define RTL8152_NAPI_WEIGHT 64
596 #define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + ETH_FCS_LEN + \
597 sizeof(struct rx_desc) + RX_ALIGN)
611 /* Define these values to match your device */
612 #define VENDOR_ID_REALTEK 0x0bda
613 #define VENDOR_ID_MICROSOFT 0x045e
614 #define VENDOR_ID_SAMSUNG 0x04e8
615 #define VENDOR_ID_LENOVO 0x17ef
616 #define VENDOR_ID_LINKSYS 0x13b1
617 #define VENDOR_ID_NVIDIA 0x0955
618 #define VENDOR_ID_TPLINK 0x2357
620 #define MCU_TYPE_PLA 0x0100
621 #define MCU_TYPE_USB 0x0000
623 struct tally_counter {
630 __le32 tx_one_collision;
631 __le32 tx_multi_collision;
641 #define RX_LEN_MASK 0x7fff
644 #define RD_UDP_CS BIT(23)
645 #define RD_TCP_CS BIT(22)
646 #define RD_IPV6_CS BIT(20)
647 #define RD_IPV4_CS BIT(19)
650 #define IPF BIT(23) /* IP checksum fail */
651 #define UDPF BIT(22) /* UDP checksum fail */
652 #define TCPF BIT(21) /* TCP checksum fail */
653 #define RX_VLAN_TAG BIT(16)
662 #define TX_FS BIT(31) /* First segment of a packet */
663 #define TX_LS BIT(30) /* Final segment of a packet */
664 #define GTSENDV4 BIT(28)
665 #define GTSENDV6 BIT(27)
666 #define GTTCPHO_SHIFT 18
667 #define GTTCPHO_MAX 0x7fU
668 #define TX_LEN_MAX 0x3ffffU
671 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
672 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
673 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
674 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
676 #define MSS_MAX 0x7ffU
677 #define TCPHO_SHIFT 17
678 #define TCPHO_MAX 0x7ffU
679 #define TX_VLAN_TAG BIT(16)
685 struct list_head list;
687 struct r8152 *context;
693 struct list_head list;
695 struct r8152 *context;
704 struct usb_device *udev;
705 struct napi_struct napi;
706 struct usb_interface *intf;
707 struct net_device *netdev;
708 struct urb *intr_urb;
709 struct tx_agg tx_info[RTL8152_MAX_TX];
710 struct rx_agg rx_info[RTL8152_MAX_RX];
711 struct list_head rx_done, tx_free;
712 struct sk_buff_head tx_queue, rx_queue;
713 spinlock_t rx_lock, tx_lock;
714 struct delayed_work schedule, hw_phy_work;
715 struct mii_if_info mii;
716 struct mutex control; /* use for hw setting */
717 #ifdef CONFIG_PM_SLEEP
718 struct notifier_block pm_notifier;
722 void (*init)(struct r8152 *);
723 int (*enable)(struct r8152 *);
724 void (*disable)(struct r8152 *);
725 void (*up)(struct r8152 *);
726 void (*down)(struct r8152 *);
727 void (*unload)(struct r8152 *);
728 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
729 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
730 bool (*in_nway)(struct r8152 *);
731 void (*hw_phy_cfg)(struct r8152 *);
732 void (*autosuspend_en)(struct r8152 *tp, bool enable);
768 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
769 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
771 static const int multicast_filter_limit = 32;
772 static unsigned int agg_buf_sz = 16384;
774 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
775 VLAN_ETH_HLEN - ETH_FCS_LEN)
778 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
783 tmp = kmalloc(size, GFP_KERNEL);
787 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
788 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
789 value, index, tmp, size, 500);
791 memset(data, 0xff, size);
793 memcpy(data, tmp, size);
801 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
806 tmp = kmemdup(data, size, GFP_KERNEL);
810 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
811 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
812 value, index, tmp, size, 500);
819 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
820 void *data, u16 type)
825 if (test_bit(RTL8152_UNPLUG, &tp->flags))
828 /* both size and indix must be 4 bytes align */
829 if ((size & 3) || !size || (index & 3) || !data)
832 if ((u32)index + (u32)size > 0xffff)
837 ret = get_registers(tp, index, type, limit, data);
845 ret = get_registers(tp, index, type, size, data);
857 set_bit(RTL8152_UNPLUG, &tp->flags);
862 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
863 u16 size, void *data, u16 type)
866 u16 byteen_start, byteen_end, byen;
869 if (test_bit(RTL8152_UNPLUG, &tp->flags))
872 /* both size and indix must be 4 bytes align */
873 if ((size & 3) || !size || (index & 3) || !data)
876 if ((u32)index + (u32)size > 0xffff)
879 byteen_start = byteen & BYTE_EN_START_MASK;
880 byteen_end = byteen & BYTE_EN_END_MASK;
882 byen = byteen_start | (byteen_start << 4);
883 ret = set_registers(tp, index, type | byen, 4, data);
896 ret = set_registers(tp, index,
897 type | BYTE_EN_DWORD,
906 ret = set_registers(tp, index,
907 type | BYTE_EN_DWORD,
919 byen = byteen_end | (byteen_end >> 4);
920 ret = set_registers(tp, index, type | byen, 4, data);
927 set_bit(RTL8152_UNPLUG, &tp->flags);
933 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
935 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
939 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
941 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
945 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
947 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
950 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
954 generic_ocp_read(tp, index, sizeof(data), &data, type);
956 return __le32_to_cpu(data);
959 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
961 __le32 tmp = __cpu_to_le32(data);
963 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
966 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
970 u16 byen = BYTE_EN_WORD;
971 u8 shift = index & 2;
976 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type | byen);
978 data = __le32_to_cpu(tmp);
979 data >>= (shift * 8);
985 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
989 u16 byen = BYTE_EN_WORD;
990 u8 shift = index & 2;
996 mask <<= (shift * 8);
997 data <<= (shift * 8);
1001 tmp = __cpu_to_le32(data);
1003 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
1006 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
1010 u8 shift = index & 3;
1014 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
1016 data = __le32_to_cpu(tmp);
1017 data >>= (shift * 8);
1023 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
1027 u16 byen = BYTE_EN_BYTE;
1028 u8 shift = index & 3;
1034 mask <<= (shift * 8);
1035 data <<= (shift * 8);
1039 tmp = __cpu_to_le32(data);
1041 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
1044 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
1046 u16 ocp_base, ocp_index;
1048 ocp_base = addr & 0xf000;
1049 if (ocp_base != tp->ocp_base) {
1050 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
1051 tp->ocp_base = ocp_base;
1054 ocp_index = (addr & 0x0fff) | 0xb000;
1055 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
1058 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
1060 u16 ocp_base, ocp_index;
1062 ocp_base = addr & 0xf000;
1063 if (ocp_base != tp->ocp_base) {
1064 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
1065 tp->ocp_base = ocp_base;
1068 ocp_index = (addr & 0x0fff) | 0xb000;
1069 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
1072 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
1074 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
1077 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
1079 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
1082 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
1084 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
1085 ocp_reg_write(tp, OCP_SRAM_DATA, data);
1088 static u16 sram_read(struct r8152 *tp, u16 addr)
1090 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
1091 return ocp_reg_read(tp, OCP_SRAM_DATA);
1094 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
1096 struct r8152 *tp = netdev_priv(netdev);
1099 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1102 if (phy_id != R8152_PHY_ID)
1105 ret = r8152_mdio_read(tp, reg);
1111 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1113 struct r8152 *tp = netdev_priv(netdev);
1115 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1118 if (phy_id != R8152_PHY_ID)
1121 r8152_mdio_write(tp, reg, val);
1125 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1127 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1129 struct r8152 *tp = netdev_priv(netdev);
1130 struct sockaddr *addr = p;
1131 int ret = -EADDRNOTAVAIL;
1133 if (!is_valid_ether_addr(addr->sa_data))
1136 ret = usb_autopm_get_interface(tp->intf);
1140 mutex_lock(&tp->control);
1142 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1144 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1145 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1146 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1148 mutex_unlock(&tp->control);
1150 usb_autopm_put_interface(tp->intf);
1155 /* Devices containing RTL8153-AD can support a persistent
1156 * host system provided MAC address.
1157 * Examples of this are Dell TB15 and Dell WD15 docks
1159 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1162 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1163 union acpi_object *obj;
1166 unsigned char buf[6];
1168 /* test for -AD variant of RTL8153 */
1169 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1170 if ((ocp_data & AD_MASK) != 0x1000)
1173 /* test for MAC address pass-through bit */
1174 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1175 if ((ocp_data & PASS_THRU_MASK) != 1)
1178 /* returns _AUXMAC_#AABBCCDDEEFF# */
1179 status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1180 obj = (union acpi_object *)buffer.pointer;
1181 if (!ACPI_SUCCESS(status))
1183 if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1184 netif_warn(tp, probe, tp->netdev,
1185 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1186 obj->type, obj->string.length);
1189 if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1190 strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1191 netif_warn(tp, probe, tp->netdev,
1192 "Invalid header when reading pass-thru MAC addr\n");
1195 ret = hex2bin(buf, obj->string.pointer + 9, 6);
1196 if (!(ret == 0 && is_valid_ether_addr(buf))) {
1197 netif_warn(tp, probe, tp->netdev,
1198 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1203 memcpy(sa->sa_data, buf, 6);
1204 ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1205 netif_info(tp, probe, tp->netdev,
1206 "Using pass-thru MAC addr %pM\n", sa->sa_data);
1213 static int set_ethernet_addr(struct r8152 *tp)
1215 struct net_device *dev = tp->netdev;
1219 if (tp->version == RTL_VER_01) {
1220 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1222 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1223 * or system doesn't provide valid _SB.AMAC this will be
1224 * be expected to non-zero
1226 ret = vendor_mac_passthru_addr_read(tp, &sa);
1228 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1232 netif_err(tp, probe, dev, "Get ether addr fail\n");
1233 } else if (!is_valid_ether_addr(sa.sa_data)) {
1234 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1236 eth_hw_addr_random(dev);
1237 ether_addr_copy(sa.sa_data, dev->dev_addr);
1238 ret = rtl8152_set_mac_address(dev, &sa);
1239 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1242 if (tp->version == RTL_VER_01)
1243 ether_addr_copy(dev->dev_addr, sa.sa_data);
1245 ret = rtl8152_set_mac_address(dev, &sa);
1251 static void read_bulk_callback(struct urb *urb)
1253 struct net_device *netdev;
1254 int status = urb->status;
1266 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1269 if (!test_bit(WORK_ENABLE, &tp->flags))
1272 netdev = tp->netdev;
1274 /* When link down, the driver would cancel all bulks. */
1275 /* This avoid the re-submitting bulk */
1276 if (!netif_carrier_ok(netdev))
1279 usb_mark_last_busy(tp->udev);
1283 if (urb->actual_length < ETH_ZLEN)
1286 spin_lock(&tp->rx_lock);
1287 list_add_tail(&agg->list, &tp->rx_done);
1288 spin_unlock(&tp->rx_lock);
1289 napi_schedule(&tp->napi);
1292 set_bit(RTL8152_UNPLUG, &tp->flags);
1293 netif_device_detach(tp->netdev);
1296 return; /* the urb is in unlink state */
1298 if (net_ratelimit())
1299 netdev_warn(netdev, "maybe reset is needed?\n");
1302 if (net_ratelimit())
1303 netdev_warn(netdev, "Rx status %d\n", status);
1307 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1310 static void write_bulk_callback(struct urb *urb)
1312 struct net_device_stats *stats;
1313 struct net_device *netdev;
1316 int status = urb->status;
1326 netdev = tp->netdev;
1327 stats = &netdev->stats;
1329 if (net_ratelimit())
1330 netdev_warn(netdev, "Tx status %d\n", status);
1331 stats->tx_errors += agg->skb_num;
1333 stats->tx_packets += agg->skb_num;
1334 stats->tx_bytes += agg->skb_len;
1337 spin_lock(&tp->tx_lock);
1338 list_add_tail(&agg->list, &tp->tx_free);
1339 spin_unlock(&tp->tx_lock);
1341 usb_autopm_put_interface_async(tp->intf);
1343 if (!netif_carrier_ok(netdev))
1346 if (!test_bit(WORK_ENABLE, &tp->flags))
1349 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1352 if (!skb_queue_empty(&tp->tx_queue))
1353 napi_schedule(&tp->napi);
1356 static void intr_callback(struct urb *urb)
1360 int status = urb->status;
1367 if (!test_bit(WORK_ENABLE, &tp->flags))
1370 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1374 case 0: /* success */
1376 case -ECONNRESET: /* unlink */
1378 netif_device_detach(tp->netdev);
1381 netif_info(tp, intr, tp->netdev,
1382 "Stop submitting intr, status %d\n", status);
1385 if (net_ratelimit())
1386 netif_info(tp, intr, tp->netdev,
1387 "intr status -EOVERFLOW\n");
1389 /* -EPIPE: should clear the halt */
1391 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1395 d = urb->transfer_buffer;
1396 if (INTR_LINK & __le16_to_cpu(d[0])) {
1397 if (!netif_carrier_ok(tp->netdev)) {
1398 set_bit(RTL8152_LINK_CHG, &tp->flags);
1399 schedule_delayed_work(&tp->schedule, 0);
1402 if (netif_carrier_ok(tp->netdev)) {
1403 netif_stop_queue(tp->netdev);
1404 set_bit(RTL8152_LINK_CHG, &tp->flags);
1405 schedule_delayed_work(&tp->schedule, 0);
1410 res = usb_submit_urb(urb, GFP_ATOMIC);
1411 if (res == -ENODEV) {
1412 set_bit(RTL8152_UNPLUG, &tp->flags);
1413 netif_device_detach(tp->netdev);
1415 netif_err(tp, intr, tp->netdev,
1416 "can't resubmit intr, status %d\n", res);
1420 static inline void *rx_agg_align(void *data)
1422 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1425 static inline void *tx_agg_align(void *data)
1427 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1430 static void free_all_mem(struct r8152 *tp)
1434 for (i = 0; i < RTL8152_MAX_RX; i++) {
1435 usb_free_urb(tp->rx_info[i].urb);
1436 tp->rx_info[i].urb = NULL;
1438 kfree(tp->rx_info[i].buffer);
1439 tp->rx_info[i].buffer = NULL;
1440 tp->rx_info[i].head = NULL;
1443 for (i = 0; i < RTL8152_MAX_TX; i++) {
1444 usb_free_urb(tp->tx_info[i].urb);
1445 tp->tx_info[i].urb = NULL;
1447 kfree(tp->tx_info[i].buffer);
1448 tp->tx_info[i].buffer = NULL;
1449 tp->tx_info[i].head = NULL;
1452 usb_free_urb(tp->intr_urb);
1453 tp->intr_urb = NULL;
1455 kfree(tp->intr_buff);
1456 tp->intr_buff = NULL;
1459 static int alloc_all_mem(struct r8152 *tp)
1461 struct net_device *netdev = tp->netdev;
1462 struct usb_interface *intf = tp->intf;
1463 struct usb_host_interface *alt = intf->cur_altsetting;
1464 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1469 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1471 spin_lock_init(&tp->rx_lock);
1472 spin_lock_init(&tp->tx_lock);
1473 INIT_LIST_HEAD(&tp->tx_free);
1474 INIT_LIST_HEAD(&tp->rx_done);
1475 skb_queue_head_init(&tp->tx_queue);
1476 skb_queue_head_init(&tp->rx_queue);
1478 for (i = 0; i < RTL8152_MAX_RX; i++) {
1479 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1483 if (buf != rx_agg_align(buf)) {
1485 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1491 urb = usb_alloc_urb(0, GFP_KERNEL);
1497 INIT_LIST_HEAD(&tp->rx_info[i].list);
1498 tp->rx_info[i].context = tp;
1499 tp->rx_info[i].urb = urb;
1500 tp->rx_info[i].buffer = buf;
1501 tp->rx_info[i].head = rx_agg_align(buf);
1504 for (i = 0; i < RTL8152_MAX_TX; i++) {
1505 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1509 if (buf != tx_agg_align(buf)) {
1511 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1517 urb = usb_alloc_urb(0, GFP_KERNEL);
1523 INIT_LIST_HEAD(&tp->tx_info[i].list);
1524 tp->tx_info[i].context = tp;
1525 tp->tx_info[i].urb = urb;
1526 tp->tx_info[i].buffer = buf;
1527 tp->tx_info[i].head = tx_agg_align(buf);
1529 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1532 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1536 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1540 tp->intr_interval = (int)ep_intr->desc.bInterval;
1541 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1542 tp->intr_buff, INTBUFSIZE, intr_callback,
1543 tp, tp->intr_interval);
1552 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1554 struct tx_agg *agg = NULL;
1555 unsigned long flags;
1557 if (list_empty(&tp->tx_free))
1560 spin_lock_irqsave(&tp->tx_lock, flags);
1561 if (!list_empty(&tp->tx_free)) {
1562 struct list_head *cursor;
1564 cursor = tp->tx_free.next;
1565 list_del_init(cursor);
1566 agg = list_entry(cursor, struct tx_agg, list);
1568 spin_unlock_irqrestore(&tp->tx_lock, flags);
1573 /* r8152_csum_workaround()
1574 * The hw limites the value the transport offset. When the offset is out of the
1575 * range, calculate the checksum by sw.
1577 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1578 struct sk_buff_head *list)
1580 if (skb_shinfo(skb)->gso_size) {
1581 netdev_features_t features = tp->netdev->features;
1582 struct sk_buff_head seg_list;
1583 struct sk_buff *segs, *nskb;
1585 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1586 segs = skb_gso_segment(skb, features);
1587 if (IS_ERR(segs) || !segs)
1590 __skb_queue_head_init(&seg_list);
1596 __skb_queue_tail(&seg_list, nskb);
1599 skb_queue_splice(&seg_list, list);
1601 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1602 if (skb_checksum_help(skb) < 0)
1605 __skb_queue_head(list, skb);
1607 struct net_device_stats *stats;
1610 stats = &tp->netdev->stats;
1611 stats->tx_dropped++;
1616 /* msdn_giant_send_check()
1617 * According to the document of microsoft, the TCP Pseudo Header excludes the
1618 * packet length for IPv6 TCP large packets.
1620 static int msdn_giant_send_check(struct sk_buff *skb)
1622 const struct ipv6hdr *ipv6h;
1626 ret = skb_cow_head(skb, 0);
1630 ipv6h = ipv6_hdr(skb);
1634 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1639 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1641 if (skb_vlan_tag_present(skb)) {
1644 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1645 desc->opts2 |= cpu_to_le32(opts2);
1649 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1651 u32 opts2 = le32_to_cpu(desc->opts2);
1653 if (opts2 & RX_VLAN_TAG)
1654 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1655 swab16(opts2 & 0xffff));
1658 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1659 struct sk_buff *skb, u32 len, u32 transport_offset)
1661 u32 mss = skb_shinfo(skb)->gso_size;
1662 u32 opts1, opts2 = 0;
1663 int ret = TX_CSUM_SUCCESS;
1665 WARN_ON_ONCE(len > TX_LEN_MAX);
1667 opts1 = len | TX_FS | TX_LS;
1670 if (transport_offset > GTTCPHO_MAX) {
1671 netif_warn(tp, tx_err, tp->netdev,
1672 "Invalid transport offset 0x%x for TSO\n",
1678 switch (vlan_get_protocol(skb)) {
1679 case htons(ETH_P_IP):
1683 case htons(ETH_P_IPV6):
1684 if (msdn_giant_send_check(skb)) {
1696 opts1 |= transport_offset << GTTCPHO_SHIFT;
1697 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1698 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1701 if (transport_offset > TCPHO_MAX) {
1702 netif_warn(tp, tx_err, tp->netdev,
1703 "Invalid transport offset 0x%x\n",
1709 switch (vlan_get_protocol(skb)) {
1710 case htons(ETH_P_IP):
1712 ip_protocol = ip_hdr(skb)->protocol;
1715 case htons(ETH_P_IPV6):
1717 ip_protocol = ipv6_hdr(skb)->nexthdr;
1721 ip_protocol = IPPROTO_RAW;
1725 if (ip_protocol == IPPROTO_TCP)
1727 else if (ip_protocol == IPPROTO_UDP)
1732 opts2 |= transport_offset << TCPHO_SHIFT;
1735 desc->opts2 = cpu_to_le32(opts2);
1736 desc->opts1 = cpu_to_le32(opts1);
1742 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1744 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1748 __skb_queue_head_init(&skb_head);
1749 spin_lock(&tx_queue->lock);
1750 skb_queue_splice_init(tx_queue, &skb_head);
1751 spin_unlock(&tx_queue->lock);
1753 tx_data = agg->head;
1756 remain = agg_buf_sz;
1758 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1759 struct tx_desc *tx_desc;
1760 struct sk_buff *skb;
1764 skb = __skb_dequeue(&skb_head);
1768 len = skb->len + sizeof(*tx_desc);
1771 __skb_queue_head(&skb_head, skb);
1775 tx_data = tx_agg_align(tx_data);
1776 tx_desc = (struct tx_desc *)tx_data;
1778 offset = (u32)skb_transport_offset(skb);
1780 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1781 r8152_csum_workaround(tp, skb, &skb_head);
1785 rtl_tx_vlan_tag(tx_desc, skb);
1787 tx_data += sizeof(*tx_desc);
1790 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1791 struct net_device_stats *stats = &tp->netdev->stats;
1793 stats->tx_dropped++;
1794 dev_kfree_skb_any(skb);
1795 tx_data -= sizeof(*tx_desc);
1800 agg->skb_len += len;
1801 agg->skb_num += skb_shinfo(skb)->gso_segs ?: 1;
1803 dev_kfree_skb_any(skb);
1805 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1808 if (!skb_queue_empty(&skb_head)) {
1809 spin_lock(&tx_queue->lock);
1810 skb_queue_splice(&skb_head, tx_queue);
1811 spin_unlock(&tx_queue->lock);
1814 netif_tx_lock(tp->netdev);
1816 if (netif_queue_stopped(tp->netdev) &&
1817 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1818 netif_wake_queue(tp->netdev);
1820 netif_tx_unlock(tp->netdev);
1822 ret = usb_autopm_get_interface_async(tp->intf);
1826 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1827 agg->head, (int)(tx_data - (u8 *)agg->head),
1828 (usb_complete_t)write_bulk_callback, agg);
1830 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1832 usb_autopm_put_interface_async(tp->intf);
1838 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1840 u8 checksum = CHECKSUM_NONE;
1843 if (!(tp->netdev->features & NETIF_F_RXCSUM))
1846 opts2 = le32_to_cpu(rx_desc->opts2);
1847 opts3 = le32_to_cpu(rx_desc->opts3);
1849 if (opts2 & RD_IPV4_CS) {
1851 checksum = CHECKSUM_NONE;
1852 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1853 checksum = CHECKSUM_NONE;
1854 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1855 checksum = CHECKSUM_NONE;
1857 checksum = CHECKSUM_UNNECESSARY;
1858 } else if (opts2 & RD_IPV6_CS) {
1859 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1860 checksum = CHECKSUM_UNNECESSARY;
1861 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1862 checksum = CHECKSUM_UNNECESSARY;
1869 static int rx_bottom(struct r8152 *tp, int budget)
1871 unsigned long flags;
1872 struct list_head *cursor, *next, rx_queue;
1873 int ret = 0, work_done = 0;
1874 struct napi_struct *napi = &tp->napi;
1876 if (!skb_queue_empty(&tp->rx_queue)) {
1877 while (work_done < budget) {
1878 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1879 struct net_device *netdev = tp->netdev;
1880 struct net_device_stats *stats = &netdev->stats;
1881 unsigned int pkt_len;
1887 napi_gro_receive(napi, skb);
1889 stats->rx_packets++;
1890 stats->rx_bytes += pkt_len;
1894 if (list_empty(&tp->rx_done))
1897 INIT_LIST_HEAD(&rx_queue);
1898 spin_lock_irqsave(&tp->rx_lock, flags);
1899 list_splice_init(&tp->rx_done, &rx_queue);
1900 spin_unlock_irqrestore(&tp->rx_lock, flags);
1902 list_for_each_safe(cursor, next, &rx_queue) {
1903 struct rx_desc *rx_desc;
1909 list_del_init(cursor);
1911 agg = list_entry(cursor, struct rx_agg, list);
1913 if (urb->actual_length < ETH_ZLEN)
1916 rx_desc = agg->head;
1917 rx_data = agg->head;
1918 len_used += sizeof(struct rx_desc);
1920 while (urb->actual_length > len_used) {
1921 struct net_device *netdev = tp->netdev;
1922 struct net_device_stats *stats = &netdev->stats;
1923 unsigned int pkt_len;
1924 struct sk_buff *skb;
1926 /* limite the skb numbers for rx_queue */
1927 if (unlikely(skb_queue_len(&tp->rx_queue) >= 1000))
1930 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1931 if (pkt_len < ETH_ZLEN)
1934 len_used += pkt_len;
1935 if (urb->actual_length < len_used)
1938 pkt_len -= ETH_FCS_LEN;
1939 rx_data += sizeof(struct rx_desc);
1941 skb = napi_alloc_skb(napi, pkt_len);
1943 stats->rx_dropped++;
1947 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1948 memcpy(skb->data, rx_data, pkt_len);
1949 skb_put(skb, pkt_len);
1950 skb->protocol = eth_type_trans(skb, netdev);
1951 rtl_rx_vlan_tag(rx_desc, skb);
1952 if (work_done < budget) {
1953 napi_gro_receive(napi, skb);
1955 stats->rx_packets++;
1956 stats->rx_bytes += pkt_len;
1958 __skb_queue_tail(&tp->rx_queue, skb);
1962 rx_data = rx_agg_align(rx_data + pkt_len + ETH_FCS_LEN);
1963 rx_desc = (struct rx_desc *)rx_data;
1964 len_used = (int)(rx_data - (u8 *)agg->head);
1965 len_used += sizeof(struct rx_desc);
1970 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1972 urb->actual_length = 0;
1973 list_add_tail(&agg->list, next);
1977 if (!list_empty(&rx_queue)) {
1978 spin_lock_irqsave(&tp->rx_lock, flags);
1979 list_splice_tail(&rx_queue, &tp->rx_done);
1980 spin_unlock_irqrestore(&tp->rx_lock, flags);
1987 static void tx_bottom(struct r8152 *tp)
1994 if (skb_queue_empty(&tp->tx_queue))
1997 agg = r8152_get_tx_agg(tp);
2001 res = r8152_tx_agg_fill(tp, agg);
2003 struct net_device *netdev = tp->netdev;
2005 if (res == -ENODEV) {
2006 set_bit(RTL8152_UNPLUG, &tp->flags);
2007 netif_device_detach(netdev);
2009 struct net_device_stats *stats = &netdev->stats;
2010 unsigned long flags;
2012 netif_warn(tp, tx_err, netdev,
2013 "failed tx_urb %d\n", res);
2014 stats->tx_dropped += agg->skb_num;
2016 spin_lock_irqsave(&tp->tx_lock, flags);
2017 list_add_tail(&agg->list, &tp->tx_free);
2018 spin_unlock_irqrestore(&tp->tx_lock, flags);
2024 static void bottom_half(struct r8152 *tp)
2026 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2029 if (!test_bit(WORK_ENABLE, &tp->flags))
2032 /* When link down, the driver would cancel all bulks. */
2033 /* This avoid the re-submitting bulk */
2034 if (!netif_carrier_ok(tp->netdev))
2037 clear_bit(SCHEDULE_NAPI, &tp->flags);
2042 static int r8152_poll(struct napi_struct *napi, int budget)
2044 struct r8152 *tp = container_of(napi, struct r8152, napi);
2047 work_done = rx_bottom(tp, budget);
2050 if (work_done < budget) {
2051 if (!napi_complete_done(napi, work_done))
2053 if (!list_empty(&tp->rx_done))
2054 napi_schedule(napi);
2055 else if (!skb_queue_empty(&tp->tx_queue) &&
2056 !list_empty(&tp->tx_free))
2057 napi_schedule(napi);
2065 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
2069 /* The rx would be stopped, so skip submitting */
2070 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
2071 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
2074 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
2075 agg->head, agg_buf_sz,
2076 (usb_complete_t)read_bulk_callback, agg);
2078 ret = usb_submit_urb(agg->urb, mem_flags);
2079 if (ret == -ENODEV) {
2080 set_bit(RTL8152_UNPLUG, &tp->flags);
2081 netif_device_detach(tp->netdev);
2083 struct urb *urb = agg->urb;
2084 unsigned long flags;
2086 urb->actual_length = 0;
2087 spin_lock_irqsave(&tp->rx_lock, flags);
2088 list_add_tail(&agg->list, &tp->rx_done);
2089 spin_unlock_irqrestore(&tp->rx_lock, flags);
2091 netif_err(tp, rx_err, tp->netdev,
2092 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
2094 napi_schedule(&tp->napi);
2100 static void rtl_drop_queued_tx(struct r8152 *tp)
2102 struct net_device_stats *stats = &tp->netdev->stats;
2103 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
2104 struct sk_buff *skb;
2106 if (skb_queue_empty(tx_queue))
2109 __skb_queue_head_init(&skb_head);
2110 spin_lock_bh(&tx_queue->lock);
2111 skb_queue_splice_init(tx_queue, &skb_head);
2112 spin_unlock_bh(&tx_queue->lock);
2114 while ((skb = __skb_dequeue(&skb_head))) {
2116 stats->tx_dropped++;
2120 static void rtl8152_tx_timeout(struct net_device *netdev)
2122 struct r8152 *tp = netdev_priv(netdev);
2124 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2126 usb_queue_reset_device(tp->intf);
2129 static void rtl8152_set_rx_mode(struct net_device *netdev)
2131 struct r8152 *tp = netdev_priv(netdev);
2133 if (netif_carrier_ok(netdev)) {
2134 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2135 schedule_delayed_work(&tp->schedule, 0);
2139 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2141 struct r8152 *tp = netdev_priv(netdev);
2142 u32 mc_filter[2]; /* Multicast hash filter */
2146 netif_stop_queue(netdev);
2147 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2148 ocp_data &= ~RCR_ACPT_ALL;
2149 ocp_data |= RCR_AB | RCR_APM;
2151 if (netdev->flags & IFF_PROMISC) {
2152 /* Unconditionally log net taps. */
2153 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2154 ocp_data |= RCR_AM | RCR_AAP;
2155 mc_filter[1] = 0xffffffff;
2156 mc_filter[0] = 0xffffffff;
2157 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2158 (netdev->flags & IFF_ALLMULTI)) {
2159 /* Too many to filter perfectly -- accept all multicasts. */
2161 mc_filter[1] = 0xffffffff;
2162 mc_filter[0] = 0xffffffff;
2164 struct netdev_hw_addr *ha;
2168 netdev_for_each_mc_addr(ha, netdev) {
2169 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2171 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2176 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2177 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2179 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2180 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2181 netif_wake_queue(netdev);
2184 static netdev_features_t
2185 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2186 netdev_features_t features)
2188 u32 mss = skb_shinfo(skb)->gso_size;
2189 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2190 int offset = skb_transport_offset(skb);
2192 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2193 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2194 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2195 features &= ~NETIF_F_GSO_MASK;
2200 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2201 struct net_device *netdev)
2203 struct r8152 *tp = netdev_priv(netdev);
2205 skb_tx_timestamp(skb);
2207 skb_queue_tail(&tp->tx_queue, skb);
2209 if (!list_empty(&tp->tx_free)) {
2210 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2211 set_bit(SCHEDULE_NAPI, &tp->flags);
2212 schedule_delayed_work(&tp->schedule, 0);
2214 usb_mark_last_busy(tp->udev);
2215 napi_schedule(&tp->napi);
2217 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2218 netif_stop_queue(netdev);
2221 return NETDEV_TX_OK;
2224 static void r8152b_reset_packet_filter(struct r8152 *tp)
2228 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2229 ocp_data &= ~FMC_FCR_MCU_EN;
2230 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2231 ocp_data |= FMC_FCR_MCU_EN;
2232 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2235 static void rtl8152_nic_reset(struct r8152 *tp)
2239 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2241 for (i = 0; i < 1000; i++) {
2242 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2244 usleep_range(100, 400);
2248 static void set_tx_qlen(struct r8152 *tp)
2250 struct net_device *netdev = tp->netdev;
2252 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN +
2253 sizeof(struct tx_desc));
2256 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2258 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2261 static void rtl_set_eee_plus(struct r8152 *tp)
2266 speed = rtl8152_get_speed(tp);
2267 if (speed & _10bps) {
2268 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2269 ocp_data |= EEEP_CR_EEEP_TX;
2270 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2272 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2273 ocp_data &= ~EEEP_CR_EEEP_TX;
2274 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2278 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2282 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2284 ocp_data |= RXDY_GATED_EN;
2286 ocp_data &= ~RXDY_GATED_EN;
2287 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2290 static int rtl_start_rx(struct r8152 *tp)
2294 INIT_LIST_HEAD(&tp->rx_done);
2295 for (i = 0; i < RTL8152_MAX_RX; i++) {
2296 INIT_LIST_HEAD(&tp->rx_info[i].list);
2297 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2302 if (ret && ++i < RTL8152_MAX_RX) {
2303 struct list_head rx_queue;
2304 unsigned long flags;
2306 INIT_LIST_HEAD(&rx_queue);
2309 struct rx_agg *agg = &tp->rx_info[i++];
2310 struct urb *urb = agg->urb;
2312 urb->actual_length = 0;
2313 list_add_tail(&agg->list, &rx_queue);
2314 } while (i < RTL8152_MAX_RX);
2316 spin_lock_irqsave(&tp->rx_lock, flags);
2317 list_splice_tail(&rx_queue, &tp->rx_done);
2318 spin_unlock_irqrestore(&tp->rx_lock, flags);
2324 static int rtl_stop_rx(struct r8152 *tp)
2328 for (i = 0; i < RTL8152_MAX_RX; i++)
2329 usb_kill_urb(tp->rx_info[i].urb);
2331 while (!skb_queue_empty(&tp->rx_queue))
2332 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2337 static int rtl_enable(struct r8152 *tp)
2341 r8152b_reset_packet_filter(tp);
2343 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2344 ocp_data |= CR_RE | CR_TE;
2345 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2347 rxdy_gated_en(tp, false);
2352 static int rtl8152_enable(struct r8152 *tp)
2354 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2358 rtl_set_eee_plus(tp);
2360 return rtl_enable(tp);
2363 static inline void r8153b_rx_agg_chg_indicate(struct r8152 *tp)
2365 ocp_write_byte(tp, MCU_TYPE_USB, USB_UPT_RXDMA_OWN,
2366 OWN_UPDATE | OWN_CLEAR);
2369 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2371 u32 ocp_data = tp->coalesce / 8;
2373 switch (tp->version) {
2378 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
2384 /* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout
2385 * primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 128ns.
2387 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
2389 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EXTRA_AGGR_TMR,
2391 r8153b_rx_agg_chg_indicate(tp);
2399 static void r8153_set_rx_early_size(struct r8152 *tp)
2401 u32 ocp_data = agg_buf_sz - rx_reserved_size(tp->netdev->mtu);
2403 switch (tp->version) {
2408 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE,
2413 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE,
2415 r8153b_rx_agg_chg_indicate(tp);
2423 static int rtl8153_enable(struct r8152 *tp)
2425 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2429 rtl_set_eee_plus(tp);
2430 r8153_set_rx_early_timeout(tp);
2431 r8153_set_rx_early_size(tp);
2433 return rtl_enable(tp);
2436 static void rtl_disable(struct r8152 *tp)
2441 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2442 rtl_drop_queued_tx(tp);
2446 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2447 ocp_data &= ~RCR_ACPT_ALL;
2448 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2450 rtl_drop_queued_tx(tp);
2452 for (i = 0; i < RTL8152_MAX_TX; i++)
2453 usb_kill_urb(tp->tx_info[i].urb);
2455 rxdy_gated_en(tp, true);
2457 for (i = 0; i < 1000; i++) {
2458 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2459 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2461 usleep_range(1000, 2000);
2464 for (i = 0; i < 1000; i++) {
2465 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2467 usleep_range(1000, 2000);
2472 rtl8152_nic_reset(tp);
2475 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2479 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2481 ocp_data |= POWER_CUT;
2483 ocp_data &= ~POWER_CUT;
2484 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2486 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2487 ocp_data &= ~RESUME_INDICATE;
2488 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2491 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2495 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2497 ocp_data |= CPCR_RX_VLAN;
2499 ocp_data &= ~CPCR_RX_VLAN;
2500 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2503 static int rtl8152_set_features(struct net_device *dev,
2504 netdev_features_t features)
2506 netdev_features_t changed = features ^ dev->features;
2507 struct r8152 *tp = netdev_priv(dev);
2510 ret = usb_autopm_get_interface(tp->intf);
2514 mutex_lock(&tp->control);
2516 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2517 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2518 rtl_rx_vlan_en(tp, true);
2520 rtl_rx_vlan_en(tp, false);
2523 mutex_unlock(&tp->control);
2525 usb_autopm_put_interface(tp->intf);
2531 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2533 static u32 __rtl_get_wol(struct r8152 *tp)
2538 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2539 if (ocp_data & LINK_ON_WAKE_EN)
2540 wolopts |= WAKE_PHY;
2542 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2543 if (ocp_data & UWF_EN)
2544 wolopts |= WAKE_UCAST;
2545 if (ocp_data & BWF_EN)
2546 wolopts |= WAKE_BCAST;
2547 if (ocp_data & MWF_EN)
2548 wolopts |= WAKE_MCAST;
2550 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2551 if (ocp_data & MAGIC_EN)
2552 wolopts |= WAKE_MAGIC;
2557 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2561 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2563 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2564 ocp_data &= ~LINK_ON_WAKE_EN;
2565 if (wolopts & WAKE_PHY)
2566 ocp_data |= LINK_ON_WAKE_EN;
2567 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2569 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2570 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2571 if (wolopts & WAKE_UCAST)
2573 if (wolopts & WAKE_BCAST)
2575 if (wolopts & WAKE_MCAST)
2577 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2579 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2581 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2582 ocp_data &= ~MAGIC_EN;
2583 if (wolopts & WAKE_MAGIC)
2584 ocp_data |= MAGIC_EN;
2585 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2587 if (wolopts & WAKE_ANY)
2588 device_set_wakeup_enable(&tp->udev->dev, true);
2590 device_set_wakeup_enable(&tp->udev->dev, false);
2593 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2598 memset(u1u2, 0xff, sizeof(u1u2));
2600 memset(u1u2, 0x00, sizeof(u1u2));
2602 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2605 static void r8153b_u1u2en(struct r8152 *tp, bool enable)
2609 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG);
2611 ocp_data |= LPM_U1U2_EN;
2613 ocp_data &= ~LPM_U1U2_EN;
2615 ocp_write_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG, ocp_data);
2618 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2622 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2624 ocp_data |= U2P3_ENABLE;
2626 ocp_data &= ~U2P3_ENABLE;
2627 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2630 static void r8153b_ups_flags_w1w0(struct r8152 *tp, u32 set, u32 clear)
2634 ocp_data = ocp_read_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS);
2637 ocp_write_dword(tp, MCU_TYPE_USB, USB_UPS_FLAGS, ocp_data);
2640 static void r8153b_green_en(struct r8152 *tp, bool enable)
2645 sram_write(tp, 0x8045, 0); /* 10M abiq&ldvbias */
2646 sram_write(tp, 0x804d, 0x1222); /* 100M short abiq&ldvbias */
2647 sram_write(tp, 0x805d, 0x0022); /* 1000M short abiq&ldvbias */
2649 sram_write(tp, 0x8045, 0x2444); /* 10M abiq&ldvbias */
2650 sram_write(tp, 0x804d, 0x2444); /* 100M short abiq&ldvbias */
2651 sram_write(tp, 0x805d, 0x2444); /* 1000M short abiq&ldvbias */
2654 data = sram_read(tp, SRAM_GREEN_CFG);
2655 data |= GREEN_ETH_EN;
2656 sram_write(tp, SRAM_GREEN_CFG, data);
2658 r8153b_ups_flags_w1w0(tp, UPS_FLAGS_EN_GREEN, 0);
2661 static u16 r8153_phy_status(struct r8152 *tp, u16 desired)
2666 for (i = 0; i < 500; i++) {
2667 data = ocp_reg_read(tp, OCP_PHY_STATUS);
2668 data &= PHY_STAT_MASK;
2670 if (data == desired)
2672 } else if (data == PHY_STAT_LAN_ON || data == PHY_STAT_PWRDN ||
2673 data == PHY_STAT_EXT_INIT) {
2678 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2685 static void r8153b_ups_en(struct r8152 *tp, bool enable)
2687 u32 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_POWER_CUT);
2690 ocp_data |= UPS_EN | USP_PREWAKE | PHASE2_EN;
2691 ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2693 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, 0xcfff);
2695 ocp_write_byte(tp, MCU_TYPE_USB, 0xcfff, ocp_data);
2699 ocp_data &= ~(UPS_EN | USP_PREWAKE);
2700 ocp_write_byte(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2702 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, 0xcfff);
2703 ocp_data &= ~BIT(0);
2704 ocp_write_byte(tp, MCU_TYPE_USB, 0xcfff, ocp_data);
2706 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2707 ocp_data &= ~PCUT_STATUS;
2708 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2710 data = r8153_phy_status(tp, 0);
2713 case PHY_STAT_PWRDN:
2714 case PHY_STAT_EXT_INIT:
2716 test_bit(GREEN_ETHERNET, &tp->flags));
2718 data = r8152_mdio_read(tp, MII_BMCR);
2719 data &= ~BMCR_PDOWN;
2721 r8152_mdio_write(tp, MII_BMCR, data);
2723 data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
2726 if (data != PHY_STAT_LAN_ON)
2727 netif_warn(tp, link, tp->netdev,
2734 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2738 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2740 ocp_data |= PWR_EN | PHASE2_EN;
2742 ocp_data &= ~(PWR_EN | PHASE2_EN);
2743 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2745 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2746 ocp_data &= ~PCUT_STATUS;
2747 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2750 static void r8153b_power_cut_en(struct r8152 *tp, bool enable)
2754 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2756 ocp_data |= PWR_EN | PHASE2_EN;
2758 ocp_data &= ~PWR_EN;
2759 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2761 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2762 ocp_data &= ~PCUT_STATUS;
2763 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2766 static void r8153b_queue_wake(struct r8152 *tp, bool enable)
2770 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, 0xd38a);
2774 ocp_data &= ~BIT(0);
2775 ocp_write_byte(tp, MCU_TYPE_PLA, 0xd38a, ocp_data);
2777 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, 0xd38c);
2778 ocp_data &= ~BIT(0);
2779 ocp_write_byte(tp, MCU_TYPE_PLA, 0xd38c, ocp_data);
2782 static bool rtl_can_wakeup(struct r8152 *tp)
2784 struct usb_device *udev = tp->udev;
2786 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2789 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2794 __rtl_set_wol(tp, WAKE_ANY);
2796 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2798 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2799 ocp_data |= LINK_OFF_WAKE_EN;
2800 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2802 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2806 __rtl_set_wol(tp, tp->saved_wolopts);
2808 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2810 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2811 ocp_data &= ~LINK_OFF_WAKE_EN;
2812 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2814 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2818 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2821 r8153_u1u2en(tp, false);
2822 r8153_u2p3en(tp, false);
2823 rtl_runtime_suspend_enable(tp, true);
2825 rtl_runtime_suspend_enable(tp, false);
2827 switch (tp->version) {
2834 r8153_u2p3en(tp, true);
2838 r8153_u1u2en(tp, true);
2842 static void rtl8153b_runtime_enable(struct r8152 *tp, bool enable)
2845 r8153b_queue_wake(tp, true);
2846 r8153b_u1u2en(tp, false);
2847 r8153_u2p3en(tp, false);
2848 rtl_runtime_suspend_enable(tp, true);
2849 r8153b_ups_en(tp, true);
2851 r8153b_ups_en(tp, false);
2852 r8153b_queue_wake(tp, false);
2853 rtl_runtime_suspend_enable(tp, false);
2854 r8153_u2p3en(tp, true);
2855 r8153b_u1u2en(tp, true);
2859 static void r8153_teredo_off(struct r8152 *tp)
2863 switch (tp->version) {
2871 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2872 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK |
2874 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2879 /* The bit 0 ~ 7 are relative with teredo settings. They are
2880 * W1C (write 1 to clear), so set all 1 to disable it.
2882 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, 0xff);
2889 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2890 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2891 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2894 static void rtl_reset_bmu(struct r8152 *tp)
2898 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2899 ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2900 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2901 ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2902 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2905 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2908 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2909 LINKENA | DIS_SDSAVE);
2911 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2917 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2919 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2920 ocp_reg_write(tp, OCP_EEE_DATA, reg);
2921 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2924 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2928 r8152_mmd_indirect(tp, dev, reg);
2929 data = ocp_reg_read(tp, OCP_EEE_DATA);
2930 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2935 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2937 r8152_mmd_indirect(tp, dev, reg);
2938 ocp_reg_write(tp, OCP_EEE_DATA, data);
2939 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2942 static void r8152_eee_en(struct r8152 *tp, bool enable)
2944 u16 config1, config2, config3;
2947 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2948 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2949 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2950 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2953 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2954 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2955 config1 |= sd_rise_time(1);
2956 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2957 config3 |= fast_snr(42);
2959 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2960 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2962 config1 |= sd_rise_time(7);
2963 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2964 config3 |= fast_snr(511);
2967 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2968 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2969 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2970 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2973 static void r8152b_enable_eee(struct r8152 *tp)
2975 r8152_eee_en(tp, true);
2976 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2979 static void r8152b_enable_fc(struct r8152 *tp)
2983 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2984 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2985 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2988 static void rtl8152_disable(struct r8152 *tp)
2990 r8152_aldps_en(tp, false);
2992 r8152_aldps_en(tp, true);
2995 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2997 r8152b_enable_eee(tp);
2998 r8152_aldps_en(tp, true);
2999 r8152b_enable_fc(tp);
3001 set_bit(PHY_RESET, &tp->flags);
3004 static void r8152b_exit_oob(struct r8152 *tp)
3009 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3010 ocp_data &= ~RCR_ACPT_ALL;
3011 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3013 rxdy_gated_en(tp, true);
3014 r8153_teredo_off(tp);
3015 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
3016 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
3018 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3019 ocp_data &= ~NOW_IS_OOB;
3020 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3022 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3023 ocp_data &= ~MCU_BORW_EN;
3024 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3026 for (i = 0; i < 1000; i++) {
3027 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3028 if (ocp_data & LINK_LIST_READY)
3030 usleep_range(1000, 2000);
3033 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3034 ocp_data |= RE_INIT_LL;
3035 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3037 for (i = 0; i < 1000; i++) {
3038 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3039 if (ocp_data & LINK_LIST_READY)
3041 usleep_range(1000, 2000);
3044 rtl8152_nic_reset(tp);
3046 /* rx share fifo credit full threshold */
3047 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
3049 if (tp->udev->speed == USB_SPEED_FULL ||
3050 tp->udev->speed == USB_SPEED_LOW) {
3051 /* rx share fifo credit near full threshold */
3052 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
3054 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
3057 /* rx share fifo credit near full threshold */
3058 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
3060 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
3064 /* TX share fifo free credit full threshold */
3065 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
3067 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
3068 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
3069 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
3070 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
3072 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
3074 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
3076 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
3077 ocp_data |= TCR0_AUTO_FIFO;
3078 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
3081 static void r8152b_enter_oob(struct r8152 *tp)
3086 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3087 ocp_data &= ~NOW_IS_OOB;
3088 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3090 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
3091 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
3092 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
3096 for (i = 0; i < 1000; i++) {
3097 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3098 if (ocp_data & LINK_LIST_READY)
3100 usleep_range(1000, 2000);
3103 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3104 ocp_data |= RE_INIT_LL;
3105 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3107 for (i = 0; i < 1000; i++) {
3108 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3109 if (ocp_data & LINK_LIST_READY)
3111 usleep_range(1000, 2000);
3114 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
3116 rtl_rx_vlan_en(tp, true);
3118 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
3119 ocp_data |= ALDPS_PROXY_MODE;
3120 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
3122 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3123 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
3124 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3126 rxdy_gated_en(tp, false);
3128 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3129 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
3130 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3133 static int r8153_patch_request(struct r8152 *tp, bool request)
3138 data = ocp_reg_read(tp, OCP_PHY_PATCH_CMD);
3140 data |= PATCH_REQUEST;
3142 data &= ~PATCH_REQUEST;
3143 ocp_reg_write(tp, OCP_PHY_PATCH_CMD, data);
3145 for (i = 0; request && i < 5000; i++) {
3146 usleep_range(1000, 2000);
3147 if (ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)
3151 if (request && !(ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)) {
3152 netif_err(tp, drv, tp->netdev, "patch request fail\n");
3153 r8153_patch_request(tp, false);
3160 static void r8153_aldps_en(struct r8152 *tp, bool enable)
3164 data = ocp_reg_read(tp, OCP_POWER_CFG);
3167 ocp_reg_write(tp, OCP_POWER_CFG, data);
3172 ocp_reg_write(tp, OCP_POWER_CFG, data);
3173 for (i = 0; i < 20; i++) {
3174 usleep_range(1000, 2000);
3175 if (ocp_read_word(tp, MCU_TYPE_PLA, 0xe000) & 0x0100)
3181 static void r8153b_aldps_en(struct r8152 *tp, bool enable)
3183 r8153_aldps_en(tp, enable);
3186 r8153b_ups_flags_w1w0(tp, UPS_FLAGS_EN_ALDPS, 0);
3188 r8153b_ups_flags_w1w0(tp, 0, UPS_FLAGS_EN_ALDPS);
3191 static void r8153_eee_en(struct r8152 *tp, bool enable)
3196 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3197 config = ocp_reg_read(tp, OCP_EEE_CFG);
3200 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3203 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3204 config &= ~EEE10_EN;
3207 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3208 ocp_reg_write(tp, OCP_EEE_CFG, config);
3211 static void r8153b_eee_en(struct r8152 *tp, bool enable)
3213 r8153_eee_en(tp, enable);
3216 r8153b_ups_flags_w1w0(tp, UPS_FLAGS_EN_EEE, 0);
3218 r8153b_ups_flags_w1w0(tp, 0, UPS_FLAGS_EN_EEE);
3221 static void r8153b_enable_fc(struct r8152 *tp)
3223 r8152b_enable_fc(tp);
3224 r8153b_ups_flags_w1w0(tp, UPS_FLAGS_EN_FLOW_CTR, 0);
3227 static void r8153_hw_phy_cfg(struct r8152 *tp)
3232 /* disable ALDPS before updating the PHY parameters */
3233 r8153_aldps_en(tp, false);
3235 /* disable EEE before updating the PHY parameters */
3236 r8153_eee_en(tp, false);
3237 ocp_reg_write(tp, OCP_EEE_ADV, 0);
3239 if (tp->version == RTL_VER_03) {
3240 data = ocp_reg_read(tp, OCP_EEE_CFG);
3241 data &= ~CTAP_SHORT_EN;
3242 ocp_reg_write(tp, OCP_EEE_CFG, data);
3245 data = ocp_reg_read(tp, OCP_POWER_CFG);
3246 data |= EEE_CLKDIV_EN;
3247 ocp_reg_write(tp, OCP_POWER_CFG, data);
3249 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
3250 data |= EN_10M_BGOFF;
3251 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
3252 data = ocp_reg_read(tp, OCP_POWER_CFG);
3253 data |= EN_10M_PLLOFF;
3254 ocp_reg_write(tp, OCP_POWER_CFG, data);
3255 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
3257 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3258 ocp_data |= PFM_PWM_SWITCH;
3259 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3261 /* Enable LPF corner auto tune */
3262 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
3264 /* Adjust 10M Amplitude */
3265 sram_write(tp, SRAM_10M_AMP1, 0x00af);
3266 sram_write(tp, SRAM_10M_AMP2, 0x0208);
3268 r8153_eee_en(tp, true);
3269 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3271 r8153_aldps_en(tp, true);
3272 r8152b_enable_fc(tp);
3274 switch (tp->version) {
3281 r8153_u2p3en(tp, true);
3285 set_bit(PHY_RESET, &tp->flags);
3288 static u32 r8152_efuse_read(struct r8152 *tp, u8 addr)
3292 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD, EFUSE_READ_CMD | addr);
3293 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD);
3294 ocp_data = (ocp_data & EFUSE_DATA_BIT16) << 9; /* data of bit16 */
3295 ocp_data |= ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_DATA);
3300 static void r8153b_hw_phy_cfg(struct r8152 *tp)
3302 u32 ocp_data, ups_flags = 0;
3305 /* disable ALDPS before updating the PHY parameters */
3306 r8153b_aldps_en(tp, false);
3308 /* disable EEE before updating the PHY parameters */
3309 r8153b_eee_en(tp, false);
3310 ocp_reg_write(tp, OCP_EEE_ADV, 0);
3312 r8153b_green_en(tp, test_bit(GREEN_ETHERNET, &tp->flags));
3314 data = sram_read(tp, SRAM_GREEN_CFG);
3316 sram_write(tp, SRAM_GREEN_CFG, data);
3317 data = ocp_reg_read(tp, OCP_NCTL_CFG);
3318 data |= PGA_RETURN_EN;
3319 ocp_reg_write(tp, OCP_NCTL_CFG, data);
3321 /* ADC Bias Calibration:
3322 * read efuse offset 0x7d to get a 17-bit data. Remove the dummy/fake
3323 * bit (bit3) to rebuild the real 16-bit data. Write the data to the
3326 ocp_data = r8152_efuse_read(tp, 0x7d);
3327 data = (u16)(((ocp_data & 0x1fff0) >> 1) | (ocp_data & 0x7));
3329 ocp_reg_write(tp, OCP_ADC_IOFFSET, data);
3331 /* ups mode tx-link-pulse timing adjustment:
3332 * rg_saw_cnt = OCP reg 0xC426 Bit[13:0]
3333 * swr_cnt_1ms_ini = 16000000 / rg_saw_cnt
3335 ocp_data = ocp_reg_read(tp, 0xc426);
3338 u32 swr_cnt_1ms_ini;
3340 swr_cnt_1ms_ini = (16000000 / ocp_data) & SAW_CNT_1MS_MASK;
3341 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CFG);
3342 ocp_data = (ocp_data & ~SAW_CNT_1MS_MASK) | swr_cnt_1ms_ini;
3343 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CFG, ocp_data);
3346 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3347 ocp_data |= PFM_PWM_SWITCH;
3348 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3351 if (!r8153_patch_request(tp, true)) {
3352 data = ocp_reg_read(tp, OCP_POWER_CFG);
3353 data |= EEE_CLKDIV_EN;
3354 ocp_reg_write(tp, OCP_POWER_CFG, data);
3356 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
3357 data |= EN_EEE_CMODE | EN_EEE_1000 | EN_10M_CLKDIV;
3358 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
3360 ocp_reg_write(tp, OCP_SYSCLK_CFG, 0);
3361 ocp_reg_write(tp, OCP_SYSCLK_CFG, clk_div_expo(5));
3363 ups_flags |= UPS_FLAGS_EN_10M_CKDIV | UPS_FLAGS_250M_CKDIV |
3364 UPS_FLAGS_EN_EEE_CKDIV | UPS_FLAGS_EEE_CMOD_LV_EN |
3365 UPS_FLAGS_EEE_PLLOFF_GIGA;
3367 r8153_patch_request(tp, false);
3370 r8153b_ups_flags_w1w0(tp, ups_flags, 0);
3372 r8153b_eee_en(tp, true);
3373 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3375 r8153b_aldps_en(tp, true);
3376 r8153b_enable_fc(tp);
3377 r8153_u2p3en(tp, true);
3379 set_bit(PHY_RESET, &tp->flags);
3382 static void r8153_first_init(struct r8152 *tp)
3387 rxdy_gated_en(tp, true);
3388 r8153_teredo_off(tp);
3390 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3391 ocp_data &= ~RCR_ACPT_ALL;
3392 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3394 rtl8152_nic_reset(tp);
3397 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3398 ocp_data &= ~NOW_IS_OOB;
3399 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3401 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3402 ocp_data &= ~MCU_BORW_EN;
3403 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3405 for (i = 0; i < 1000; i++) {
3406 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3407 if (ocp_data & LINK_LIST_READY)
3409 usleep_range(1000, 2000);
3412 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3413 ocp_data |= RE_INIT_LL;
3414 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3416 for (i = 0; i < 1000; i++) {
3417 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3418 if (ocp_data & LINK_LIST_READY)
3420 usleep_range(1000, 2000);
3423 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
3425 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
3426 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
3427 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
3429 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
3430 ocp_data |= TCR0_AUTO_FIFO;
3431 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
3433 rtl8152_nic_reset(tp);
3435 /* rx share fifo credit full threshold */
3436 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
3437 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
3438 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
3439 /* TX share fifo free credit full threshold */
3440 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
3443 static void r8153_enter_oob(struct r8152 *tp)
3448 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3449 ocp_data &= ~NOW_IS_OOB;
3450 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3455 for (i = 0; i < 1000; i++) {
3456 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3457 if (ocp_data & LINK_LIST_READY)
3459 usleep_range(1000, 2000);
3462 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
3463 ocp_data |= RE_INIT_LL;
3464 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
3466 for (i = 0; i < 1000; i++) {
3467 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3468 if (ocp_data & LINK_LIST_READY)
3470 usleep_range(1000, 2000);
3473 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
3474 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
3476 switch (tp->version) {
3481 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
3482 ocp_data &= ~TEREDO_WAKE_MASK;
3483 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
3488 /* Clear teredo wake event. bit[15:8] is the teredo wakeup
3489 * type. Set it to zero. bits[7:0] are the W1C bits about
3490 * the events. Set them to all 1 to clear them.
3492 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_WAKE_BASE, 0x00ff);
3499 rtl_rx_vlan_en(tp, true);
3501 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
3502 ocp_data |= ALDPS_PROXY_MODE;
3503 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
3505 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3506 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
3507 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
3509 rxdy_gated_en(tp, false);
3511 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3512 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
3513 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3516 static void rtl8153_disable(struct r8152 *tp)
3518 r8153_aldps_en(tp, false);
3521 r8153_aldps_en(tp, true);
3524 static void rtl8153b_disable(struct r8152 *tp)
3526 r8153b_aldps_en(tp, false);
3529 r8153b_aldps_en(tp, true);
3532 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
3534 u16 bmcr, anar, gbcr;
3535 enum spd_duplex speed_duplex;
3538 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3539 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
3540 ADVERTISE_100HALF | ADVERTISE_100FULL);
3541 if (tp->mii.supports_gmii) {
3542 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
3543 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
3548 if (autoneg == AUTONEG_DISABLE) {
3549 if (speed == SPEED_10) {
3551 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3552 speed_duplex = FORCE_10M_HALF;
3553 } else if (speed == SPEED_100) {
3554 bmcr = BMCR_SPEED100;
3555 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3556 speed_duplex = FORCE_100M_HALF;
3557 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3558 bmcr = BMCR_SPEED1000;
3559 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3560 speed_duplex = NWAY_1000M_FULL;
3566 if (duplex == DUPLEX_FULL) {
3567 bmcr |= BMCR_FULLDPLX;
3568 if (speed != SPEED_1000)
3572 if (speed == SPEED_10) {
3573 if (duplex == DUPLEX_FULL) {
3574 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3575 speed_duplex = NWAY_10M_FULL;
3577 anar |= ADVERTISE_10HALF;
3578 speed_duplex = NWAY_10M_HALF;
3580 } else if (speed == SPEED_100) {
3581 if (duplex == DUPLEX_FULL) {
3582 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3583 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3584 speed_duplex = NWAY_100M_FULL;
3586 anar |= ADVERTISE_10HALF;
3587 anar |= ADVERTISE_100HALF;
3588 speed_duplex = NWAY_100M_HALF;
3590 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3591 if (duplex == DUPLEX_FULL) {
3592 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3593 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3594 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3596 anar |= ADVERTISE_10HALF;
3597 anar |= ADVERTISE_100HALF;
3598 gbcr |= ADVERTISE_1000HALF;
3600 speed_duplex = NWAY_1000M_FULL;
3606 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3609 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3612 if (tp->mii.supports_gmii)
3613 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3615 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3616 r8152_mdio_write(tp, MII_BMCR, bmcr);
3618 switch (tp->version) {
3621 r8153b_ups_flags_w1w0(tp, ups_flags_speed(speed_duplex),
3622 UPS_FLAGS_SPEED_MASK);
3629 if (bmcr & BMCR_RESET) {
3632 for (i = 0; i < 50; i++) {
3634 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3643 static void rtl8152_up(struct r8152 *tp)
3645 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3648 r8152_aldps_en(tp, false);
3649 r8152b_exit_oob(tp);
3650 r8152_aldps_en(tp, true);
3653 static void rtl8152_down(struct r8152 *tp)
3655 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3656 rtl_drop_queued_tx(tp);
3660 r8152_power_cut_en(tp, false);
3661 r8152_aldps_en(tp, false);
3662 r8152b_enter_oob(tp);
3663 r8152_aldps_en(tp, true);
3666 static void rtl8153_up(struct r8152 *tp)
3668 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3671 r8153_u1u2en(tp, false);
3672 r8153_u2p3en(tp, false);
3673 r8153_aldps_en(tp, false);
3674 r8153_first_init(tp);
3675 r8153_aldps_en(tp, true);
3677 switch (tp->version) {
3684 r8153_u2p3en(tp, true);
3688 r8153_u1u2en(tp, true);
3691 static void rtl8153_down(struct r8152 *tp)
3693 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3694 rtl_drop_queued_tx(tp);
3698 r8153_u1u2en(tp, false);
3699 r8153_u2p3en(tp, false);
3700 r8153_power_cut_en(tp, false);
3701 r8153_aldps_en(tp, false);
3702 r8153_enter_oob(tp);
3703 r8153_aldps_en(tp, true);
3706 static void rtl8153b_up(struct r8152 *tp)
3708 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3711 r8153b_u1u2en(tp, false);
3712 r8153_u2p3en(tp, false);
3713 r8153b_aldps_en(tp, false);
3715 r8153_first_init(tp);
3716 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_B);
3718 r8153b_aldps_en(tp, true);
3719 r8153_u2p3en(tp, true);
3720 r8153b_u1u2en(tp, true);
3723 static void rtl8153b_down(struct r8152 *tp)
3725 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3726 rtl_drop_queued_tx(tp);
3730 r8153b_u1u2en(tp, false);
3731 r8153_u2p3en(tp, false);
3732 r8153b_power_cut_en(tp, false);
3733 r8153b_aldps_en(tp, false);
3734 r8153_enter_oob(tp);
3735 r8153b_aldps_en(tp, true);
3738 static bool rtl8152_in_nway(struct r8152 *tp)
3742 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3743 tp->ocp_base = 0x2000;
3744 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
3745 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3747 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3748 if (nway_state & 0xc000)
3754 static bool rtl8153_in_nway(struct r8152 *tp)
3756 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3758 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3764 static void set_carrier(struct r8152 *tp)
3766 struct net_device *netdev = tp->netdev;
3767 struct napi_struct *napi = &tp->napi;
3770 speed = rtl8152_get_speed(tp);
3772 if (speed & LINK_STATUS) {
3773 if (!netif_carrier_ok(netdev)) {
3774 tp->rtl_ops.enable(tp);
3775 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3776 netif_stop_queue(netdev);
3778 netif_carrier_on(netdev);
3780 napi_enable(&tp->napi);
3781 netif_wake_queue(netdev);
3782 netif_info(tp, link, netdev, "carrier on\n");
3783 } else if (netif_queue_stopped(netdev) &&
3784 skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
3785 netif_wake_queue(netdev);
3788 if (netif_carrier_ok(netdev)) {
3789 netif_carrier_off(netdev);
3791 tp->rtl_ops.disable(tp);
3793 netif_info(tp, link, netdev, "carrier off\n");
3798 static void rtl_work_func_t(struct work_struct *work)
3800 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3802 /* If the device is unplugged or !netif_running(), the workqueue
3803 * doesn't need to wake the device, and could return directly.
3805 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3808 if (usb_autopm_get_interface(tp->intf) < 0)
3811 if (!test_bit(WORK_ENABLE, &tp->flags))
3814 if (!mutex_trylock(&tp->control)) {
3815 schedule_delayed_work(&tp->schedule, 0);
3819 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3822 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3823 _rtl8152_set_rx_mode(tp->netdev);
3825 /* don't schedule napi before linking */
3826 if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3827 netif_carrier_ok(tp->netdev))
3828 napi_schedule(&tp->napi);
3830 mutex_unlock(&tp->control);
3833 usb_autopm_put_interface(tp->intf);
3836 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3838 struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3840 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3843 if (usb_autopm_get_interface(tp->intf) < 0)
3846 mutex_lock(&tp->control);
3848 tp->rtl_ops.hw_phy_cfg(tp);
3850 rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3852 mutex_unlock(&tp->control);
3854 usb_autopm_put_interface(tp->intf);
3857 #ifdef CONFIG_PM_SLEEP
3858 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3861 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3864 case PM_HIBERNATION_PREPARE:
3865 case PM_SUSPEND_PREPARE:
3866 usb_autopm_get_interface(tp->intf);
3869 case PM_POST_HIBERNATION:
3870 case PM_POST_SUSPEND:
3871 usb_autopm_put_interface(tp->intf);
3874 case PM_POST_RESTORE:
3875 case PM_RESTORE_PREPARE:
3884 static int rtl8152_open(struct net_device *netdev)
3886 struct r8152 *tp = netdev_priv(netdev);
3889 res = alloc_all_mem(tp);
3893 res = usb_autopm_get_interface(tp->intf);
3897 mutex_lock(&tp->control);
3901 netif_carrier_off(netdev);
3902 netif_start_queue(netdev);
3903 set_bit(WORK_ENABLE, &tp->flags);
3905 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3908 netif_device_detach(tp->netdev);
3909 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3913 napi_enable(&tp->napi);
3915 mutex_unlock(&tp->control);
3917 usb_autopm_put_interface(tp->intf);
3918 #ifdef CONFIG_PM_SLEEP
3919 tp->pm_notifier.notifier_call = rtl_notifier;
3920 register_pm_notifier(&tp->pm_notifier);
3925 mutex_unlock(&tp->control);
3926 usb_autopm_put_interface(tp->intf);
3933 static int rtl8152_close(struct net_device *netdev)
3935 struct r8152 *tp = netdev_priv(netdev);
3938 #ifdef CONFIG_PM_SLEEP
3939 unregister_pm_notifier(&tp->pm_notifier);
3941 if (!test_bit(RTL8152_UNPLUG, &tp->flags))
3942 napi_disable(&tp->napi);
3943 clear_bit(WORK_ENABLE, &tp->flags);
3944 usb_kill_urb(tp->intr_urb);
3945 cancel_delayed_work_sync(&tp->schedule);
3946 netif_stop_queue(netdev);
3948 res = usb_autopm_get_interface(tp->intf);
3949 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3950 rtl_drop_queued_tx(tp);
3953 mutex_lock(&tp->control);
3955 tp->rtl_ops.down(tp);
3957 mutex_unlock(&tp->control);
3961 usb_autopm_put_interface(tp->intf);
3968 static void rtl_tally_reset(struct r8152 *tp)
3972 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3973 ocp_data |= TALLY_RESET;
3974 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3977 static void r8152b_init(struct r8152 *tp)
3982 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3985 data = r8152_mdio_read(tp, MII_BMCR);
3986 if (data & BMCR_PDOWN) {
3987 data &= ~BMCR_PDOWN;
3988 r8152_mdio_write(tp, MII_BMCR, data);
3991 r8152_aldps_en(tp, false);
3993 if (tp->version == RTL_VER_01) {
3994 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3995 ocp_data &= ~LED_MODE_MASK;
3996 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3999 r8152_power_cut_en(tp, false);
4001 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
4002 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
4003 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
4004 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
4005 ocp_data &= ~MCU_CLK_RATIO_MASK;
4006 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
4007 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
4008 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
4009 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
4010 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
4012 rtl_tally_reset(tp);
4014 /* enable rx aggregation */
4015 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
4016 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
4017 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
4020 static void r8153_init(struct r8152 *tp)
4026 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4029 r8153_u1u2en(tp, false);
4031 for (i = 0; i < 500; i++) {
4032 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
4037 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4041 data = r8153_phy_status(tp, 0);
4043 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
4044 tp->version == RTL_VER_05)
4045 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
4047 data = r8152_mdio_read(tp, MII_BMCR);
4048 if (data & BMCR_PDOWN) {
4049 data &= ~BMCR_PDOWN;
4050 r8152_mdio_write(tp, MII_BMCR, data);
4053 data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
4055 r8153_u2p3en(tp, false);
4057 if (tp->version == RTL_VER_04) {
4058 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
4059 ocp_data &= ~pwd_dn_scale_mask;
4060 ocp_data |= pwd_dn_scale(96);
4061 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
4063 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
4064 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
4065 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
4066 } else if (tp->version == RTL_VER_05) {
4067 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
4068 ocp_data &= ~ECM_ALDPS;
4069 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
4071 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
4072 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
4073 ocp_data &= ~DYNAMIC_BURST;
4075 ocp_data |= DYNAMIC_BURST;
4076 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
4077 } else if (tp->version == RTL_VER_06) {
4078 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
4079 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
4080 ocp_data &= ~DYNAMIC_BURST;
4082 ocp_data |= DYNAMIC_BURST;
4083 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
4086 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
4087 ocp_data |= EP4_FULL_FC;
4088 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
4090 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
4091 ocp_data &= ~TIMER11_EN;
4092 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
4094 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
4095 ocp_data &= ~LED_MODE_MASK;
4096 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
4098 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
4099 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
4100 ocp_data |= LPM_TIMER_500MS;
4102 ocp_data |= LPM_TIMER_500US;
4103 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
4105 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
4106 ocp_data &= ~SEN_VAL_MASK;
4107 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
4108 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
4110 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
4112 /* MAC clock speed down */
4113 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
4114 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
4115 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
4116 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
4118 r8153_power_cut_en(tp, false);
4119 r8153_u1u2en(tp, true);
4120 usb_enable_lpm(tp->udev);
4122 /* rx aggregation */
4123 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
4124 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
4125 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
4127 rtl_tally_reset(tp);
4129 switch (tp->udev->speed) {
4130 case USB_SPEED_SUPER:
4131 case USB_SPEED_SUPER_PLUS:
4132 tp->coalesce = COALESCE_SUPER;
4134 case USB_SPEED_HIGH:
4135 tp->coalesce = COALESCE_HIGH;
4138 tp->coalesce = COALESCE_SLOW;
4143 static void r8153b_init(struct r8152 *tp)
4149 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4152 r8153b_u1u2en(tp, false);
4154 for (i = 0; i < 500; i++) {
4155 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
4160 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4164 data = r8153_phy_status(tp, 0);
4166 data = r8152_mdio_read(tp, MII_BMCR);
4167 if (data & BMCR_PDOWN) {
4168 data &= ~BMCR_PDOWN;
4169 r8152_mdio_write(tp, MII_BMCR, data);
4172 data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
4174 r8153_u2p3en(tp, false);
4176 /* MSC timer = 0xfff * 8ms = 32760 ms */
4177 ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff);
4179 /* U1/U2/L1 idle timer. 500 us */
4180 ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500);
4182 r8153b_power_cut_en(tp, false);
4183 r8153b_ups_en(tp, false);
4184 r8153b_queue_wake(tp, false);
4185 rtl_runtime_suspend_enable(tp, false);
4186 r8153b_u1u2en(tp, true);
4187 usb_enable_lpm(tp->udev);
4189 /* MAC clock speed down */
4190 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2);
4191 ocp_data |= MAC_CLK_SPDWN_EN;
4192 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, ocp_data);
4194 set_bit(GREEN_ETHERNET, &tp->flags);
4196 /* rx aggregation */
4197 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
4198 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
4199 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
4201 rtl_tally_reset(tp);
4203 tp->coalesce = 15000; /* 15 us */
4206 static int rtl8152_pre_reset(struct usb_interface *intf)
4208 struct r8152 *tp = usb_get_intfdata(intf);
4209 struct net_device *netdev;
4214 netdev = tp->netdev;
4215 if (!netif_running(netdev))
4218 netif_stop_queue(netdev);
4219 napi_disable(&tp->napi);
4220 clear_bit(WORK_ENABLE, &tp->flags);
4221 usb_kill_urb(tp->intr_urb);
4222 cancel_delayed_work_sync(&tp->schedule);
4223 if (netif_carrier_ok(netdev)) {
4224 mutex_lock(&tp->control);
4225 tp->rtl_ops.disable(tp);
4226 mutex_unlock(&tp->control);
4232 static int rtl8152_post_reset(struct usb_interface *intf)
4234 struct r8152 *tp = usb_get_intfdata(intf);
4235 struct net_device *netdev;
4240 netdev = tp->netdev;
4241 if (!netif_running(netdev))
4244 set_bit(WORK_ENABLE, &tp->flags);
4245 if (netif_carrier_ok(netdev)) {
4246 mutex_lock(&tp->control);
4247 tp->rtl_ops.enable(tp);
4249 rtl8152_set_rx_mode(netdev);
4250 mutex_unlock(&tp->control);
4253 napi_enable(&tp->napi);
4254 netif_wake_queue(netdev);
4255 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
4257 if (!list_empty(&tp->rx_done))
4258 napi_schedule(&tp->napi);
4263 static bool delay_autosuspend(struct r8152 *tp)
4265 bool sw_linking = !!netif_carrier_ok(tp->netdev);
4266 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
4268 /* This means a linking change occurs and the driver doesn't detect it,
4269 * yet. If the driver has disabled tx/rx and hw is linking on, the
4270 * device wouldn't wake up by receiving any packet.
4272 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
4275 /* If the linking down is occurred by nway, the device may miss the
4276 * linking change event. And it wouldn't wake when linking on.
4278 if (!sw_linking && tp->rtl_ops.in_nway(tp))
4280 else if (!skb_queue_empty(&tp->tx_queue))
4286 static int rtl8152_runtime_resume(struct r8152 *tp)
4288 struct net_device *netdev = tp->netdev;
4290 if (netif_running(netdev) && netdev->flags & IFF_UP) {
4291 struct napi_struct *napi = &tp->napi;
4293 tp->rtl_ops.autosuspend_en(tp, false);
4295 set_bit(WORK_ENABLE, &tp->flags);
4297 if (netif_carrier_ok(netdev)) {
4298 if (rtl8152_get_speed(tp) & LINK_STATUS) {
4301 netif_carrier_off(netdev);
4302 tp->rtl_ops.disable(tp);
4303 netif_info(tp, link, netdev, "linking down\n");
4308 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
4309 smp_mb__after_atomic();
4311 if (!list_empty(&tp->rx_done))
4312 napi_schedule(&tp->napi);
4314 usb_submit_urb(tp->intr_urb, GFP_NOIO);
4316 if (netdev->flags & IFF_UP)
4317 tp->rtl_ops.autosuspend_en(tp, false);
4319 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
4325 static int rtl8152_system_resume(struct r8152 *tp)
4327 struct net_device *netdev = tp->netdev;
4329 netif_device_attach(netdev);
4331 if (netif_running(netdev) && netdev->flags & IFF_UP) {
4333 netif_carrier_off(netdev);
4334 set_bit(WORK_ENABLE, &tp->flags);
4335 usb_submit_urb(tp->intr_urb, GFP_NOIO);
4341 static int rtl8152_runtime_suspend(struct r8152 *tp)
4343 struct net_device *netdev = tp->netdev;
4346 set_bit(SELECTIVE_SUSPEND, &tp->flags);
4347 smp_mb__after_atomic();
4349 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
4352 if (netif_carrier_ok(netdev)) {
4355 rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
4356 ocp_data = rcr & ~RCR_ACPT_ALL;
4357 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
4358 rxdy_gated_en(tp, true);
4359 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
4361 if (!(ocp_data & RXFIFO_EMPTY)) {
4362 rxdy_gated_en(tp, false);
4363 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
4364 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
4365 smp_mb__after_atomic();
4371 clear_bit(WORK_ENABLE, &tp->flags);
4372 usb_kill_urb(tp->intr_urb);
4374 tp->rtl_ops.autosuspend_en(tp, true);
4376 if (netif_carrier_ok(netdev)) {
4377 struct napi_struct *napi = &tp->napi;
4381 rxdy_gated_en(tp, false);
4382 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
4386 if (delay_autosuspend(tp)) {
4387 rtl8152_runtime_resume(tp);
4396 static int rtl8152_system_suspend(struct r8152 *tp)
4398 struct net_device *netdev = tp->netdev;
4401 netif_device_detach(netdev);
4403 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
4404 struct napi_struct *napi = &tp->napi;
4406 clear_bit(WORK_ENABLE, &tp->flags);
4407 usb_kill_urb(tp->intr_urb);
4409 cancel_delayed_work_sync(&tp->schedule);
4410 tp->rtl_ops.down(tp);
4417 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
4419 struct r8152 *tp = usb_get_intfdata(intf);
4422 mutex_lock(&tp->control);
4424 if (PMSG_IS_AUTO(message))
4425 ret = rtl8152_runtime_suspend(tp);
4427 ret = rtl8152_system_suspend(tp);
4429 mutex_unlock(&tp->control);
4434 static int rtl8152_resume(struct usb_interface *intf)
4436 struct r8152 *tp = usb_get_intfdata(intf);
4439 mutex_lock(&tp->control);
4441 if (test_bit(SELECTIVE_SUSPEND, &tp->flags))
4442 ret = rtl8152_runtime_resume(tp);
4444 ret = rtl8152_system_resume(tp);
4446 mutex_unlock(&tp->control);
4451 static int rtl8152_reset_resume(struct usb_interface *intf)
4453 struct r8152 *tp = usb_get_intfdata(intf);
4455 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
4456 tp->rtl_ops.init(tp);
4457 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4458 set_ethernet_addr(tp);
4459 return rtl8152_resume(intf);
4462 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
4464 struct r8152 *tp = netdev_priv(dev);
4466 if (usb_autopm_get_interface(tp->intf) < 0)
4469 if (!rtl_can_wakeup(tp)) {
4473 mutex_lock(&tp->control);
4474 wol->supported = WAKE_ANY;
4475 wol->wolopts = __rtl_get_wol(tp);
4476 mutex_unlock(&tp->control);
4479 usb_autopm_put_interface(tp->intf);
4482 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
4484 struct r8152 *tp = netdev_priv(dev);
4487 if (!rtl_can_wakeup(tp))
4490 if (wol->wolopts & ~WAKE_ANY)
4493 ret = usb_autopm_get_interface(tp->intf);
4497 mutex_lock(&tp->control);
4499 __rtl_set_wol(tp, wol->wolopts);
4500 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
4502 mutex_unlock(&tp->control);
4504 usb_autopm_put_interface(tp->intf);
4510 static u32 rtl8152_get_msglevel(struct net_device *dev)
4512 struct r8152 *tp = netdev_priv(dev);
4514 return tp->msg_enable;
4517 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
4519 struct r8152 *tp = netdev_priv(dev);
4521 tp->msg_enable = value;
4524 static void rtl8152_get_drvinfo(struct net_device *netdev,
4525 struct ethtool_drvinfo *info)
4527 struct r8152 *tp = netdev_priv(netdev);
4529 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
4530 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
4531 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
4535 int rtl8152_get_link_ksettings(struct net_device *netdev,
4536 struct ethtool_link_ksettings *cmd)
4538 struct r8152 *tp = netdev_priv(netdev);
4541 if (!tp->mii.mdio_read)
4544 ret = usb_autopm_get_interface(tp->intf);
4548 mutex_lock(&tp->control);
4550 mii_ethtool_get_link_ksettings(&tp->mii, cmd);
4552 mutex_unlock(&tp->control);
4554 usb_autopm_put_interface(tp->intf);
4560 static int rtl8152_set_link_ksettings(struct net_device *dev,
4561 const struct ethtool_link_ksettings *cmd)
4563 struct r8152 *tp = netdev_priv(dev);
4566 ret = usb_autopm_get_interface(tp->intf);
4570 mutex_lock(&tp->control);
4572 ret = rtl8152_set_speed(tp, cmd->base.autoneg, cmd->base.speed,
4575 tp->autoneg = cmd->base.autoneg;
4576 tp->speed = cmd->base.speed;
4577 tp->duplex = cmd->base.duplex;
4580 mutex_unlock(&tp->control);
4582 usb_autopm_put_interface(tp->intf);
4588 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
4595 "tx_single_collisions",
4596 "tx_multi_collisions",
4604 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
4608 return ARRAY_SIZE(rtl8152_gstrings);
4614 static void rtl8152_get_ethtool_stats(struct net_device *dev,
4615 struct ethtool_stats *stats, u64 *data)
4617 struct r8152 *tp = netdev_priv(dev);
4618 struct tally_counter tally;
4620 if (usb_autopm_get_interface(tp->intf) < 0)
4623 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
4625 usb_autopm_put_interface(tp->intf);
4627 data[0] = le64_to_cpu(tally.tx_packets);
4628 data[1] = le64_to_cpu(tally.rx_packets);
4629 data[2] = le64_to_cpu(tally.tx_errors);
4630 data[3] = le32_to_cpu(tally.rx_errors);
4631 data[4] = le16_to_cpu(tally.rx_missed);
4632 data[5] = le16_to_cpu(tally.align_errors);
4633 data[6] = le32_to_cpu(tally.tx_one_collision);
4634 data[7] = le32_to_cpu(tally.tx_multi_collision);
4635 data[8] = le64_to_cpu(tally.rx_unicast);
4636 data[9] = le64_to_cpu(tally.rx_broadcast);
4637 data[10] = le32_to_cpu(tally.rx_multicast);
4638 data[11] = le16_to_cpu(tally.tx_aborted);
4639 data[12] = le16_to_cpu(tally.tx_underrun);
4642 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4644 switch (stringset) {
4646 memcpy(data, rtl8152_gstrings, sizeof(rtl8152_gstrings));
4651 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
4653 u32 ocp_data, lp, adv, supported = 0;
4656 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
4657 supported = mmd_eee_cap_to_ethtool_sup_t(val);
4659 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
4660 adv = mmd_eee_adv_to_ethtool_adv_t(val);
4662 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
4663 lp = mmd_eee_adv_to_ethtool_adv_t(val);
4665 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
4666 ocp_data &= EEE_RX_EN | EEE_TX_EN;
4668 eee->eee_enabled = !!ocp_data;
4669 eee->eee_active = !!(supported & adv & lp);
4670 eee->supported = supported;
4671 eee->advertised = adv;
4672 eee->lp_advertised = lp;
4677 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4679 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4681 r8152_eee_en(tp, eee->eee_enabled);
4683 if (!eee->eee_enabled)
4686 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
4691 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
4693 u32 ocp_data, lp, adv, supported = 0;
4696 val = ocp_reg_read(tp, OCP_EEE_ABLE);
4697 supported = mmd_eee_cap_to_ethtool_sup_t(val);
4699 val = ocp_reg_read(tp, OCP_EEE_ADV);
4700 adv = mmd_eee_adv_to_ethtool_adv_t(val);
4702 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
4703 lp = mmd_eee_adv_to_ethtool_adv_t(val);
4705 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
4706 ocp_data &= EEE_RX_EN | EEE_TX_EN;
4708 eee->eee_enabled = !!ocp_data;
4709 eee->eee_active = !!(supported & adv & lp);
4710 eee->supported = supported;
4711 eee->advertised = adv;
4712 eee->lp_advertised = lp;
4717 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4719 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4721 r8153_eee_en(tp, eee->eee_enabled);
4723 if (!eee->eee_enabled)
4726 ocp_reg_write(tp, OCP_EEE_ADV, val);
4731 static int r8153b_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4733 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4735 r8153b_eee_en(tp, eee->eee_enabled);
4737 if (!eee->eee_enabled)
4740 ocp_reg_write(tp, OCP_EEE_ADV, val);
4746 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
4748 struct r8152 *tp = netdev_priv(net);
4751 ret = usb_autopm_get_interface(tp->intf);
4755 mutex_lock(&tp->control);
4757 ret = tp->rtl_ops.eee_get(tp, edata);
4759 mutex_unlock(&tp->control);
4761 usb_autopm_put_interface(tp->intf);
4768 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
4770 struct r8152 *tp = netdev_priv(net);
4773 ret = usb_autopm_get_interface(tp->intf);
4777 mutex_lock(&tp->control);
4779 ret = tp->rtl_ops.eee_set(tp, edata);
4781 ret = mii_nway_restart(&tp->mii);
4783 mutex_unlock(&tp->control);
4785 usb_autopm_put_interface(tp->intf);
4791 static int rtl8152_nway_reset(struct net_device *dev)
4793 struct r8152 *tp = netdev_priv(dev);
4796 ret = usb_autopm_get_interface(tp->intf);
4800 mutex_lock(&tp->control);
4802 ret = mii_nway_restart(&tp->mii);
4804 mutex_unlock(&tp->control);
4806 usb_autopm_put_interface(tp->intf);
4812 static int rtl8152_get_coalesce(struct net_device *netdev,
4813 struct ethtool_coalesce *coalesce)
4815 struct r8152 *tp = netdev_priv(netdev);
4817 switch (tp->version) {
4826 coalesce->rx_coalesce_usecs = tp->coalesce;
4831 static int rtl8152_set_coalesce(struct net_device *netdev,
4832 struct ethtool_coalesce *coalesce)
4834 struct r8152 *tp = netdev_priv(netdev);
4837 switch (tp->version) {
4846 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4849 ret = usb_autopm_get_interface(tp->intf);
4853 mutex_lock(&tp->control);
4855 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4856 tp->coalesce = coalesce->rx_coalesce_usecs;
4858 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4859 r8153_set_rx_early_timeout(tp);
4862 mutex_unlock(&tp->control);
4864 usb_autopm_put_interface(tp->intf);
4869 static const struct ethtool_ops ops = {
4870 .get_drvinfo = rtl8152_get_drvinfo,
4871 .get_link = ethtool_op_get_link,
4872 .nway_reset = rtl8152_nway_reset,
4873 .get_msglevel = rtl8152_get_msglevel,
4874 .set_msglevel = rtl8152_set_msglevel,
4875 .get_wol = rtl8152_get_wol,
4876 .set_wol = rtl8152_set_wol,
4877 .get_strings = rtl8152_get_strings,
4878 .get_sset_count = rtl8152_get_sset_count,
4879 .get_ethtool_stats = rtl8152_get_ethtool_stats,
4880 .get_coalesce = rtl8152_get_coalesce,
4881 .set_coalesce = rtl8152_set_coalesce,
4882 .get_eee = rtl_ethtool_get_eee,
4883 .set_eee = rtl_ethtool_set_eee,
4884 .get_link_ksettings = rtl8152_get_link_ksettings,
4885 .set_link_ksettings = rtl8152_set_link_ksettings,
4888 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4890 struct r8152 *tp = netdev_priv(netdev);
4891 struct mii_ioctl_data *data = if_mii(rq);
4894 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4897 res = usb_autopm_get_interface(tp->intf);
4903 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4907 mutex_lock(&tp->control);
4908 data->val_out = r8152_mdio_read(tp, data->reg_num);
4909 mutex_unlock(&tp->control);
4913 if (!capable(CAP_NET_ADMIN)) {
4917 mutex_lock(&tp->control);
4918 r8152_mdio_write(tp, data->reg_num, data->val_in);
4919 mutex_unlock(&tp->control);
4926 usb_autopm_put_interface(tp->intf);
4932 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4934 struct r8152 *tp = netdev_priv(dev);
4937 switch (tp->version) {
4947 ret = usb_autopm_get_interface(tp->intf);
4951 mutex_lock(&tp->control);
4955 if (netif_running(dev)) {
4956 u32 rms = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4958 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rms);
4960 if (netif_carrier_ok(dev))
4961 r8153_set_rx_early_size(tp);
4964 mutex_unlock(&tp->control);
4966 usb_autopm_put_interface(tp->intf);
4971 static const struct net_device_ops rtl8152_netdev_ops = {
4972 .ndo_open = rtl8152_open,
4973 .ndo_stop = rtl8152_close,
4974 .ndo_do_ioctl = rtl8152_ioctl,
4975 .ndo_start_xmit = rtl8152_start_xmit,
4976 .ndo_tx_timeout = rtl8152_tx_timeout,
4977 .ndo_set_features = rtl8152_set_features,
4978 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4979 .ndo_set_mac_address = rtl8152_set_mac_address,
4980 .ndo_change_mtu = rtl8152_change_mtu,
4981 .ndo_validate_addr = eth_validate_addr,
4982 .ndo_features_check = rtl8152_features_check,
4985 static void rtl8152_unload(struct r8152 *tp)
4987 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4990 if (tp->version != RTL_VER_01)
4991 r8152_power_cut_en(tp, true);
4994 static void rtl8153_unload(struct r8152 *tp)
4996 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4999 r8153_power_cut_en(tp, false);
5002 static void rtl8153b_unload(struct r8152 *tp)
5004 if (test_bit(RTL8152_UNPLUG, &tp->flags))
5007 r8153b_power_cut_en(tp, false);
5010 static int rtl_ops_init(struct r8152 *tp)
5012 struct rtl_ops *ops = &tp->rtl_ops;
5015 switch (tp->version) {
5019 ops->init = r8152b_init;
5020 ops->enable = rtl8152_enable;
5021 ops->disable = rtl8152_disable;
5022 ops->up = rtl8152_up;
5023 ops->down = rtl8152_down;
5024 ops->unload = rtl8152_unload;
5025 ops->eee_get = r8152_get_eee;
5026 ops->eee_set = r8152_set_eee;
5027 ops->in_nway = rtl8152_in_nway;
5028 ops->hw_phy_cfg = r8152b_hw_phy_cfg;
5029 ops->autosuspend_en = rtl_runtime_suspend_enable;
5036 ops->init = r8153_init;
5037 ops->enable = rtl8153_enable;
5038 ops->disable = rtl8153_disable;
5039 ops->up = rtl8153_up;
5040 ops->down = rtl8153_down;
5041 ops->unload = rtl8153_unload;
5042 ops->eee_get = r8153_get_eee;
5043 ops->eee_set = r8153_set_eee;
5044 ops->in_nway = rtl8153_in_nway;
5045 ops->hw_phy_cfg = r8153_hw_phy_cfg;
5046 ops->autosuspend_en = rtl8153_runtime_enable;
5051 ops->init = r8153b_init;
5052 ops->enable = rtl8153_enable;
5053 ops->disable = rtl8153b_disable;
5054 ops->up = rtl8153b_up;
5055 ops->down = rtl8153b_down;
5056 ops->unload = rtl8153b_unload;
5057 ops->eee_get = r8153_get_eee;
5058 ops->eee_set = r8153b_set_eee;
5059 ops->in_nway = rtl8153_in_nway;
5060 ops->hw_phy_cfg = r8153b_hw_phy_cfg;
5061 ops->autosuspend_en = rtl8153b_runtime_enable;
5066 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
5073 static u8 rtl_get_version(struct usb_interface *intf)
5075 struct usb_device *udev = interface_to_usbdev(intf);
5081 tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
5085 ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
5086 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
5087 PLA_TCR0, MCU_TYPE_PLA, tmp, sizeof(*tmp), 500);
5089 ocp_data = (__le32_to_cpu(*tmp) >> 16) & VERSION_MASK;
5095 version = RTL_VER_01;
5098 version = RTL_VER_02;
5101 version = RTL_VER_03;
5104 version = RTL_VER_04;
5107 version = RTL_VER_05;
5110 version = RTL_VER_06;
5113 version = RTL_VER_07;
5116 version = RTL_VER_08;
5119 version = RTL_VER_09;
5122 version = RTL_VER_UNKNOWN;
5123 dev_info(&intf->dev, "Unknown version 0x%04x\n", ocp_data);
5127 dev_dbg(&intf->dev, "Detected version 0x%04x\n", version);
5132 static int rtl8152_probe(struct usb_interface *intf,
5133 const struct usb_device_id *id)
5135 struct usb_device *udev = interface_to_usbdev(intf);
5136 u8 version = rtl_get_version(intf);
5138 struct net_device *netdev;
5141 if (version == RTL_VER_UNKNOWN)
5144 if (udev->actconfig->desc.bConfigurationValue != 1) {
5145 usb_driver_set_configuration(udev, 1);
5149 if (intf->cur_altsetting->desc.bNumEndpoints < 3)
5152 usb_reset_device(udev);
5153 netdev = alloc_etherdev(sizeof(struct r8152));
5155 dev_err(&intf->dev, "Out of memory\n");
5159 SET_NETDEV_DEV(netdev, &intf->dev);
5160 tp = netdev_priv(netdev);
5161 tp->msg_enable = 0x7FFF;
5164 tp->netdev = netdev;
5166 tp->version = version;
5172 tp->mii.supports_gmii = 0;
5175 tp->mii.supports_gmii = 1;
5179 ret = rtl_ops_init(tp);
5183 mutex_init(&tp->control);
5184 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
5185 INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
5187 netdev->netdev_ops = &rtl8152_netdev_ops;
5188 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
5190 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
5191 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
5192 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
5193 NETIF_F_HW_VLAN_CTAG_TX;
5194 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
5195 NETIF_F_TSO | NETIF_F_FRAGLIST |
5196 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
5197 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
5198 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
5199 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
5200 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
5202 if (tp->version == RTL_VER_01) {
5203 netdev->features &= ~NETIF_F_RXCSUM;
5204 netdev->hw_features &= ~NETIF_F_RXCSUM;
5207 netdev->ethtool_ops = &ops;
5208 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
5210 /* MTU range: 68 - 1500 or 9194 */
5211 netdev->min_mtu = ETH_MIN_MTU;
5212 switch (tp->version) {
5215 netdev->max_mtu = ETH_DATA_LEN;
5218 netdev->max_mtu = RTL8153_MAX_MTU;
5222 tp->mii.dev = netdev;
5223 tp->mii.mdio_read = read_mii_word;
5224 tp->mii.mdio_write = write_mii_word;
5225 tp->mii.phy_id_mask = 0x3f;
5226 tp->mii.reg_num_mask = 0x1f;
5227 tp->mii.phy_id = R8152_PHY_ID;
5229 tp->autoneg = AUTONEG_ENABLE;
5230 tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
5231 tp->duplex = DUPLEX_FULL;
5233 intf->needs_remote_wakeup = 1;
5235 if (!rtl_can_wakeup(tp))
5236 __rtl_set_wol(tp, 0);
5238 tp->saved_wolopts = __rtl_get_wol(tp);
5240 tp->rtl_ops.init(tp);
5241 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
5242 set_ethernet_addr(tp);
5244 usb_set_intfdata(intf, tp);
5245 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
5247 ret = register_netdev(netdev);
5249 netif_err(tp, probe, netdev, "couldn't register the device\n");
5253 if (tp->saved_wolopts)
5254 device_set_wakeup_enable(&udev->dev, true);
5256 device_set_wakeup_enable(&udev->dev, false);
5258 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
5263 netif_napi_del(&tp->napi);
5264 usb_set_intfdata(intf, NULL);
5266 free_netdev(netdev);
5270 static void rtl8152_disconnect(struct usb_interface *intf)
5272 struct r8152 *tp = usb_get_intfdata(intf);
5274 usb_set_intfdata(intf, NULL);
5276 struct usb_device *udev = tp->udev;
5278 if (udev->state == USB_STATE_NOTATTACHED)
5279 set_bit(RTL8152_UNPLUG, &tp->flags);
5281 netif_napi_del(&tp->napi);
5282 unregister_netdev(tp->netdev);
5283 cancel_delayed_work_sync(&tp->hw_phy_work);
5284 tp->rtl_ops.unload(tp);
5285 free_netdev(tp->netdev);
5289 #define REALTEK_USB_DEVICE(vend, prod) \
5290 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
5291 USB_DEVICE_ID_MATCH_INT_CLASS, \
5292 .idVendor = (vend), \
5293 .idProduct = (prod), \
5294 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
5297 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
5298 USB_DEVICE_ID_MATCH_DEVICE, \
5299 .idVendor = (vend), \
5300 .idProduct = (prod), \
5301 .bInterfaceClass = USB_CLASS_COMM, \
5302 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
5303 .bInterfaceProtocol = USB_CDC_PROTO_NONE
5305 /* table of devices that work with this driver */
5306 static const struct usb_device_id rtl8152_table[] = {
5307 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8050)},
5308 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
5309 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
5310 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07ab)},
5311 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07c6)},
5312 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x0927)},
5313 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
5314 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
5315 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3054)},
5316 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3062)},
5317 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3069)},
5318 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
5319 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x720c)},
5320 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7214)},
5321 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x721e)},
5322 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0xa387)},
5323 {REALTEK_USB_DEVICE(VENDOR_ID_LINKSYS, 0x0041)},
5324 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
5325 {REALTEK_USB_DEVICE(VENDOR_ID_TPLINK, 0x0601)},
5329 MODULE_DEVICE_TABLE(usb, rtl8152_table);
5331 static struct usb_driver rtl8152_driver = {
5333 .id_table = rtl8152_table,
5334 .probe = rtl8152_probe,
5335 .disconnect = rtl8152_disconnect,
5336 .suspend = rtl8152_suspend,
5337 .resume = rtl8152_resume,
5338 .reset_resume = rtl8152_reset_resume,
5339 .pre_reset = rtl8152_pre_reset,
5340 .post_reset = rtl8152_post_reset,
5341 .supports_autosuspend = 1,
5342 .disable_hub_initiated_lpm = 1,
5345 module_usb_driver(rtl8152_driver);
5347 MODULE_AUTHOR(DRIVER_AUTHOR);
5348 MODULE_DESCRIPTION(DRIVER_DESC);
5349 MODULE_LICENSE("GPL");
5350 MODULE_VERSION(DRIVER_VERSION);