2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
31 /* Information for net-next */
32 #define NETNEXT_VERSION "08"
34 /* Information for net */
35 #define NET_VERSION "9"
37 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
42 #define R8152_PHY_ID 32
44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RMS 0xc016
47 #define PLA_RXFIFO_CTRL0 0xc0a0
48 #define PLA_RXFIFO_CTRL1 0xc0a4
49 #define PLA_RXFIFO_CTRL2 0xc0a8
50 #define PLA_DMY_REG0 0xc0b0
51 #define PLA_FMC 0xc0b4
52 #define PLA_CFG_WOL 0xc0b6
53 #define PLA_TEREDO_CFG 0xc0bc
54 #define PLA_MAR 0xcd00
55 #define PLA_BACKUP 0xd000
56 #define PAL_BDC_CR 0xd1a0
57 #define PLA_TEREDO_TIMER 0xd2cc
58 #define PLA_REALWOW_TIMER 0xd2e8
59 #define PLA_LEDSEL 0xdd90
60 #define PLA_LED_FEATURE 0xdd92
61 #define PLA_PHYAR 0xde00
62 #define PLA_BOOT_CTRL 0xe004
63 #define PLA_GPHY_INTR_IMR 0xe022
64 #define PLA_EEE_CR 0xe040
65 #define PLA_EEEP_CR 0xe080
66 #define PLA_MAC_PWR_CTRL 0xe0c0
67 #define PLA_MAC_PWR_CTRL2 0xe0ca
68 #define PLA_MAC_PWR_CTRL3 0xe0cc
69 #define PLA_MAC_PWR_CTRL4 0xe0ce
70 #define PLA_WDT6_CTRL 0xe428
71 #define PLA_TCR0 0xe610
72 #define PLA_TCR1 0xe612
73 #define PLA_MTPS 0xe615
74 #define PLA_TXFIFO_CTRL 0xe618
75 #define PLA_RSTTALLY 0xe800
77 #define PLA_CRWECR 0xe81c
78 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5 0xe822
81 #define PLA_PHY_PWR 0xe84c
82 #define PLA_OOB_CTRL 0xe84f
83 #define PLA_CPCR 0xe854
84 #define PLA_MISC_0 0xe858
85 #define PLA_MISC_1 0xe85a
86 #define PLA_OCP_GPHY_BASE 0xe86c
87 #define PLA_TALLYCNT 0xe890
88 #define PLA_SFF_STS_7 0xe8de
89 #define PLA_PHYSTATUS 0xe908
90 #define PLA_BP_BA 0xfc26
91 #define PLA_BP_0 0xfc28
92 #define PLA_BP_1 0xfc2a
93 #define PLA_BP_2 0xfc2c
94 #define PLA_BP_3 0xfc2e
95 #define PLA_BP_4 0xfc30
96 #define PLA_BP_5 0xfc32
97 #define PLA_BP_6 0xfc34
98 #define PLA_BP_7 0xfc36
99 #define PLA_BP_EN 0xfc38
101 #define USB_USB2PHY 0xb41e
102 #define USB_SSPHYLINK2 0xb428
103 #define USB_U2P3_CTRL 0xb460
104 #define USB_CSR_DUMMY1 0xb464
105 #define USB_CSR_DUMMY2 0xb466
106 #define USB_DEV_STAT 0xb808
107 #define USB_CONNECT_TIMER 0xcbf8
108 #define USB_BURST_SIZE 0xcfc0
109 #define USB_USB_CTRL 0xd406
110 #define USB_PHY_CTRL 0xd408
111 #define USB_TX_AGG 0xd40a
112 #define USB_RX_BUF_TH 0xd40c
113 #define USB_USB_TIMER 0xd428
114 #define USB_RX_EARLY_TIMEOUT 0xd42c
115 #define USB_RX_EARLY_SIZE 0xd42e
116 #define USB_PM_CTRL_STATUS 0xd432
117 #define USB_TX_DMA 0xd434
118 #define USB_TOLERANCE 0xd490
119 #define USB_LPM_CTRL 0xd41a
120 #define USB_BMU_RESET 0xd4b0
121 #define USB_UPS_CTRL 0xd800
122 #define USB_MISC_0 0xd81a
123 #define USB_POWER_CUT 0xd80a
124 #define USB_AFE_CTRL2 0xd824
125 #define USB_WDT11_CTRL 0xe43c
126 #define USB_BP_BA 0xfc26
127 #define USB_BP_0 0xfc28
128 #define USB_BP_1 0xfc2a
129 #define USB_BP_2 0xfc2c
130 #define USB_BP_3 0xfc2e
131 #define USB_BP_4 0xfc30
132 #define USB_BP_5 0xfc32
133 #define USB_BP_6 0xfc34
134 #define USB_BP_7 0xfc36
135 #define USB_BP_EN 0xfc38
138 #define OCP_ALDPS_CONFIG 0x2010
139 #define OCP_EEE_CONFIG1 0x2080
140 #define OCP_EEE_CONFIG2 0x2092
141 #define OCP_EEE_CONFIG3 0x2094
142 #define OCP_BASE_MII 0xa400
143 #define OCP_EEE_AR 0xa41a
144 #define OCP_EEE_DATA 0xa41c
145 #define OCP_PHY_STATUS 0xa420
146 #define OCP_POWER_CFG 0xa430
147 #define OCP_EEE_CFG 0xa432
148 #define OCP_SRAM_ADDR 0xa436
149 #define OCP_SRAM_DATA 0xa438
150 #define OCP_DOWN_SPEED 0xa442
151 #define OCP_EEE_ABLE 0xa5c4
152 #define OCP_EEE_ADV 0xa5d0
153 #define OCP_EEE_LPABLE 0xa5d2
154 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
155 #define OCP_ADC_CFG 0xbc06
158 #define SRAM_LPF_CFG 0x8012
159 #define SRAM_10M_AMP1 0x8080
160 #define SRAM_10M_AMP2 0x8082
161 #define SRAM_IMPEDANCE 0x8084
164 #define RCR_AAP 0x00000001
165 #define RCR_APM 0x00000002
166 #define RCR_AM 0x00000004
167 #define RCR_AB 0x00000008
168 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL 0x00080002
172 #define RXFIFO_THR1_OOB 0x01800003
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL 0x00000060
176 #define RXFIFO_THR2_HIGH 0x00000038
177 #define RXFIFO_THR2_OOB 0x0000004a
178 #define RXFIFO_THR2_NORMAL 0x00a0
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL 0x00000078
182 #define RXFIFO_THR3_HIGH 0x00000048
183 #define RXFIFO_THR3_OOB 0x0000005a
184 #define RXFIFO_THR3_NORMAL 0x0110
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL 0x00400008
188 #define TXFIFO_THR_NORMAL2 0x01000008
191 #define ECM_ALDPS 0x0002
194 #define FMC_FCR_MCU_EN 0x0001
197 #define EEEP_CR_EEEP_TX 0x0002
200 #define WDT6_SET_MODE 0x0010
203 #define TCR0_TX_EMPTY 0x0800
204 #define TCR0_AUTO_FIFO 0x0080
207 #define VERSION_MASK 0x7cf0
210 #define MTPS_JUMBO (12 * 1024 / 64)
211 #define MTPS_DEFAULT (6 * 1024 / 64)
214 #define TALLY_RESET 0x0001
222 #define CRWECR_NORAML 0x00
223 #define CRWECR_CONFIG 0xc0
226 #define NOW_IS_OOB 0x80
227 #define TXFIFO_EMPTY 0x20
228 #define RXFIFO_EMPTY 0x10
229 #define LINK_LIST_READY 0x02
230 #define DIS_MCU_CLROOB 0x01
231 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
234 #define RXDY_GATED_EN 0x0008
237 #define RE_INIT_LL 0x8000
238 #define MCU_BORW_EN 0x4000
241 #define CPCR_RX_VLAN 0x0040
244 #define MAGIC_EN 0x0001
247 #define TEREDO_SEL 0x8000
248 #define TEREDO_WAKE_MASK 0x7f00
249 #define TEREDO_RS_EVENT_MASK 0x00fe
250 #define OOB_TEREDO_EN 0x0001
253 #define ALDPS_PROXY_MODE 0x0001
256 #define LINK_ON_WAKE_EN 0x0010
257 #define LINK_OFF_WAKE_EN 0x0008
260 #define BWF_EN 0x0040
261 #define MWF_EN 0x0020
262 #define UWF_EN 0x0010
263 #define LAN_WAKE_EN 0x0002
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK 0x0700
269 #define TX_10M_IDLE_EN 0x0080
270 #define PFM_PWM_SWITCH 0x0040
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN 0x00004000
274 #define MCU_CLK_RATIO 0x07010f07
275 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO 0x0f87
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO 0x8007
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN 0x0100
283 #define SUSPEND_SPDWN_EN 0x0004
284 #define U1U2_SPDWN_EN 0x0002
285 #define L1_SPDWN_EN 0x0001
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN 0x1000
289 #define RXDV_SPDWN_EN 0x0800
290 #define TX10MIDLE_EN 0x0100
291 #define TP100_SPDWN_EN 0x0020
292 #define TP500_SPDWN_EN 0x0010
293 #define TP1000_SPDWN_EN 0x0008
294 #define EEE_SPDWN_EN 0x0001
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK 0x0001
298 #define SPEED_DOWN_MSK 0x0002
299 #define SPDWN_RXDV_MSK 0x0004
300 #define SPDWN_LINKCHG_MSK 0x0008
303 #define PHYAR_FLAG 0x80000000
306 #define EEE_RX_EN 0x0001
307 #define EEE_TX_EN 0x0002
310 #define AUTOLOAD_DONE 0x0002
313 #define USB2PHY_SUSPEND 0x0001
314 #define USB2PHY_L1 0x0002
317 #define pwd_dn_scale_mask 0x3ffe
318 #define pwd_dn_scale(x) ((x) << 1)
321 #define DYNAMIC_BURST 0x0001
324 #define EP4_FULL_FC 0x0001
327 #define STAT_SPEED_MASK 0x0006
328 #define STAT_SPEED_HIGH 0x0000
329 #define STAT_SPEED_FULL 0x0002
332 #define TX_AGG_MAX_THRESHOLD 0x03
335 #define RX_THR_SUPPER 0x0c350180
336 #define RX_THR_HIGH 0x7a120180
337 #define RX_THR_SLOW 0xffff0180
340 #define TEST_MODE_DISABLE 0x00000001
341 #define TX_SIZE_ADJUST1 0x00000100
344 #define BMU_RESET_EP_IN 0x01
345 #define BMU_RESET_EP_OUT 0x02
348 #define POWER_CUT 0x0100
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE 0x0001
354 #define RX_AGG_DISABLE 0x0010
355 #define RX_ZERO_EN 0x0080
358 #define U2P3_ENABLE 0x0001
361 #define PWR_EN 0x0001
362 #define PHASE2_EN 0x0008
365 #define PCUT_STATUS 0x0001
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER 85000U
369 #define COALESCE_HIGH 250000U
370 #define COALESCE_SLOW 524280U
373 #define TIMER11_EN 0x0001
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK 0x0c
380 #define LPM_TIMER_500MS 0x04 /* 500 ms */
381 #define LPM_TIMER_500US 0x0c /* 500 us */
382 #define ROK_EXIT_LPM 0x02
385 #define SEN_VAL_MASK 0xf800
386 #define SEN_VAL_NORMAL 0xa000
387 #define SEL_RXIDLE 0x0100
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE 0x8000
391 #define ENPDNPS 0x0200
392 #define LINKENA 0x0100
393 #define DIS_SDSAVE 0x0010
396 #define PHY_STAT_MASK 0x0007
397 #define PHY_STAT_LAN_ON 3
398 #define PHY_STAT_PWRDN 5
401 #define EEE_CLKDIV_EN 0x8000
402 #define EN_ALDPS 0x0004
403 #define EN_10M_PLLOFF 0x0001
405 /* OCP_EEE_CONFIG1 */
406 #define RG_TXLPI_MSK_HFDUP 0x8000
407 #define RG_MATCLR_EN 0x4000
408 #define EEE_10_CAP 0x2000
409 #define EEE_NWAY_EN 0x1000
410 #define TX_QUIET_EN 0x0200
411 #define RX_QUIET_EN 0x0100
412 #define sd_rise_time_mask 0x0070
413 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
414 #define RG_RXLPI_MSK_HFDUP 0x0008
415 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
417 /* OCP_EEE_CONFIG2 */
418 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
419 #define RG_DACQUIET_EN 0x0400
420 #define RG_LDVQUIET_EN 0x0200
421 #define RG_CKRSEL 0x0020
422 #define RG_EEEPRG_EN 0x0010
424 /* OCP_EEE_CONFIG3 */
425 #define fast_snr_mask 0xff80
426 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
427 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
428 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
431 /* bit[15:14] function */
432 #define FUN_ADDR 0x0000
433 #define FUN_DATA 0x4000
434 /* bit[4:0] device addr */
437 #define CTAP_SHORT_EN 0x0040
438 #define EEE10_EN 0x0010
441 #define EN_10M_BGOFF 0x0080
444 #define TXDIS_STATE 0x01
445 #define ABD_STATE 0x02
448 #define CKADSEL_L 0x0100
449 #define ADC_EN 0x0080
450 #define EN_EMI_L 0x0040
453 #define LPF_AUTO_TUNE 0x8000
456 #define GDAC_IB_UPALL 0x0008
459 #define AMP_DN 0x0200
462 #define RX_DRIVING_MASK 0x6000
465 #define AD_MASK 0xfee0
467 #define PASS_THRU_MASK 0x1
469 enum rtl_register_content {
477 #define RTL8152_MAX_TX 4
478 #define RTL8152_MAX_RX 10
484 #define INTR_LINK 0x0004
486 #define RTL8152_REQT_READ 0xc0
487 #define RTL8152_REQT_WRITE 0x40
488 #define RTL8152_REQ_GET_REGS 0x05
489 #define RTL8152_REQ_SET_REGS 0x05
491 #define BYTE_EN_DWORD 0xff
492 #define BYTE_EN_WORD 0x33
493 #define BYTE_EN_BYTE 0x11
494 #define BYTE_EN_SIX_BYTES 0x3f
495 #define BYTE_EN_START_MASK 0x0f
496 #define BYTE_EN_END_MASK 0xf0
498 #define RTL8153_MAX_PACKET 9216 /* 9K */
499 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
500 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
501 #define RTL8153_RMS RTL8153_MAX_PACKET
502 #define RTL8152_TX_TIMEOUT (5 * HZ)
503 #define RTL8152_NAPI_WEIGHT 64
504 #define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + CRC_SIZE + \
505 sizeof(struct rx_desc) + RX_ALIGN)
518 /* Define these values to match your device */
519 #define VENDOR_ID_REALTEK 0x0bda
520 #define VENDOR_ID_SAMSUNG 0x04e8
521 #define VENDOR_ID_LENOVO 0x17ef
522 #define VENDOR_ID_LINKSYS 0x13b1
523 #define VENDOR_ID_NVIDIA 0x0955
525 #define MCU_TYPE_PLA 0x0100
526 #define MCU_TYPE_USB 0x0000
528 struct tally_counter {
535 __le32 tx_one_collision;
536 __le32 tx_multi_collision;
546 #define RX_LEN_MASK 0x7fff
549 #define RD_UDP_CS BIT(23)
550 #define RD_TCP_CS BIT(22)
551 #define RD_IPV6_CS BIT(20)
552 #define RD_IPV4_CS BIT(19)
555 #define IPF BIT(23) /* IP checksum fail */
556 #define UDPF BIT(22) /* UDP checksum fail */
557 #define TCPF BIT(21) /* TCP checksum fail */
558 #define RX_VLAN_TAG BIT(16)
567 #define TX_FS BIT(31) /* First segment of a packet */
568 #define TX_LS BIT(30) /* Final segment of a packet */
569 #define GTSENDV4 BIT(28)
570 #define GTSENDV6 BIT(27)
571 #define GTTCPHO_SHIFT 18
572 #define GTTCPHO_MAX 0x7fU
573 #define TX_LEN_MAX 0x3ffffU
576 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
577 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
578 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
579 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
581 #define MSS_MAX 0x7ffU
582 #define TCPHO_SHIFT 17
583 #define TCPHO_MAX 0x7ffU
584 #define TX_VLAN_TAG BIT(16)
590 struct list_head list;
592 struct r8152 *context;
598 struct list_head list;
600 struct r8152 *context;
609 struct usb_device *udev;
610 struct napi_struct napi;
611 struct usb_interface *intf;
612 struct net_device *netdev;
613 struct urb *intr_urb;
614 struct tx_agg tx_info[RTL8152_MAX_TX];
615 struct rx_agg rx_info[RTL8152_MAX_RX];
616 struct list_head rx_done, tx_free;
617 struct sk_buff_head tx_queue, rx_queue;
618 spinlock_t rx_lock, tx_lock;
619 struct delayed_work schedule, hw_phy_work;
620 struct mii_if_info mii;
621 struct mutex control; /* use for hw setting */
622 #ifdef CONFIG_PM_SLEEP
623 struct notifier_block pm_notifier;
627 void (*init)(struct r8152 *);
628 int (*enable)(struct r8152 *);
629 void (*disable)(struct r8152 *);
630 void (*up)(struct r8152 *);
631 void (*down)(struct r8152 *);
632 void (*unload)(struct r8152 *);
633 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
634 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
635 bool (*in_nway)(struct r8152 *);
636 void (*hw_phy_cfg)(struct r8152 *);
637 void (*autosuspend_en)(struct r8152 *tp, bool enable);
670 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
671 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
673 static const int multicast_filter_limit = 32;
674 static unsigned int agg_buf_sz = 16384;
676 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
677 VLAN_ETH_HLEN - VLAN_HLEN)
680 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
685 tmp = kmalloc(size, GFP_KERNEL);
689 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
690 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
691 value, index, tmp, size, 500);
693 memset(data, 0xff, size);
695 memcpy(data, tmp, size);
703 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
708 tmp = kmemdup(data, size, GFP_KERNEL);
712 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
713 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
714 value, index, tmp, size, 500);
721 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
722 void *data, u16 type)
727 if (test_bit(RTL8152_UNPLUG, &tp->flags))
730 /* both size and indix must be 4 bytes align */
731 if ((size & 3) || !size || (index & 3) || !data)
734 if ((u32)index + (u32)size > 0xffff)
739 ret = get_registers(tp, index, type, limit, data);
747 ret = get_registers(tp, index, type, size, data);
759 set_bit(RTL8152_UNPLUG, &tp->flags);
764 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
765 u16 size, void *data, u16 type)
768 u16 byteen_start, byteen_end, byen;
771 if (test_bit(RTL8152_UNPLUG, &tp->flags))
774 /* both size and indix must be 4 bytes align */
775 if ((size & 3) || !size || (index & 3) || !data)
778 if ((u32)index + (u32)size > 0xffff)
781 byteen_start = byteen & BYTE_EN_START_MASK;
782 byteen_end = byteen & BYTE_EN_END_MASK;
784 byen = byteen_start | (byteen_start << 4);
785 ret = set_registers(tp, index, type | byen, 4, data);
798 ret = set_registers(tp, index,
799 type | BYTE_EN_DWORD,
808 ret = set_registers(tp, index,
809 type | BYTE_EN_DWORD,
821 byen = byteen_end | (byteen_end >> 4);
822 ret = set_registers(tp, index, type | byen, 4, data);
829 set_bit(RTL8152_UNPLUG, &tp->flags);
835 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
837 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
841 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
843 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
847 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
849 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
853 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
855 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
858 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
862 generic_ocp_read(tp, index, sizeof(data), &data, type);
864 return __le32_to_cpu(data);
867 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
869 __le32 tmp = __cpu_to_le32(data);
871 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
874 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
878 u8 shift = index & 2;
882 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
884 data = __le32_to_cpu(tmp);
885 data >>= (shift * 8);
891 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
895 u16 byen = BYTE_EN_WORD;
896 u8 shift = index & 2;
902 mask <<= (shift * 8);
903 data <<= (shift * 8);
907 tmp = __cpu_to_le32(data);
909 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
912 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
916 u8 shift = index & 3;
920 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
922 data = __le32_to_cpu(tmp);
923 data >>= (shift * 8);
929 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
933 u16 byen = BYTE_EN_BYTE;
934 u8 shift = index & 3;
940 mask <<= (shift * 8);
941 data <<= (shift * 8);
945 tmp = __cpu_to_le32(data);
947 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
950 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
952 u16 ocp_base, ocp_index;
954 ocp_base = addr & 0xf000;
955 if (ocp_base != tp->ocp_base) {
956 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
957 tp->ocp_base = ocp_base;
960 ocp_index = (addr & 0x0fff) | 0xb000;
961 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
964 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
966 u16 ocp_base, ocp_index;
968 ocp_base = addr & 0xf000;
969 if (ocp_base != tp->ocp_base) {
970 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
971 tp->ocp_base = ocp_base;
974 ocp_index = (addr & 0x0fff) | 0xb000;
975 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
978 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
980 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
983 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
985 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
988 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
990 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
991 ocp_reg_write(tp, OCP_SRAM_DATA, data);
994 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
996 struct r8152 *tp = netdev_priv(netdev);
999 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1002 if (phy_id != R8152_PHY_ID)
1005 ret = r8152_mdio_read(tp, reg);
1011 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1013 struct r8152 *tp = netdev_priv(netdev);
1015 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1018 if (phy_id != R8152_PHY_ID)
1021 r8152_mdio_write(tp, reg, val);
1025 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1027 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1029 struct r8152 *tp = netdev_priv(netdev);
1030 struct sockaddr *addr = p;
1031 int ret = -EADDRNOTAVAIL;
1033 if (!is_valid_ether_addr(addr->sa_data))
1036 ret = usb_autopm_get_interface(tp->intf);
1040 mutex_lock(&tp->control);
1042 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1044 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1045 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1046 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1048 mutex_unlock(&tp->control);
1050 usb_autopm_put_interface(tp->intf);
1055 /* Devices containing RTL8153-AD can support a persistent
1056 * host system provided MAC address.
1057 * Examples of this are Dell TB15 and Dell WD15 docks
1059 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1062 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1063 union acpi_object *obj;
1066 unsigned char buf[6];
1068 /* test for -AD variant of RTL8153 */
1069 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1070 if ((ocp_data & AD_MASK) != 0x1000)
1073 /* test for MAC address pass-through bit */
1074 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1075 if ((ocp_data & PASS_THRU_MASK) != 1)
1078 /* returns _AUXMAC_#AABBCCDDEEFF# */
1079 status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1080 obj = (union acpi_object *)buffer.pointer;
1081 if (!ACPI_SUCCESS(status))
1083 if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1084 netif_warn(tp, probe, tp->netdev,
1085 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1086 obj->type, obj->string.length);
1089 if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1090 strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1091 netif_warn(tp, probe, tp->netdev,
1092 "Invalid header when reading pass-thru MAC addr\n");
1095 ret = hex2bin(buf, obj->string.pointer + 9, 6);
1096 if (!(ret == 0 && is_valid_ether_addr(buf))) {
1097 netif_warn(tp, probe, tp->netdev,
1098 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1103 memcpy(sa->sa_data, buf, 6);
1104 ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1105 netif_info(tp, probe, tp->netdev,
1106 "Using pass-thru MAC addr %pM\n", sa->sa_data);
1113 static int set_ethernet_addr(struct r8152 *tp)
1115 struct net_device *dev = tp->netdev;
1119 if (tp->version == RTL_VER_01) {
1120 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1122 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1123 * or system doesn't provide valid _SB.AMAC this will be
1124 * be expected to non-zero
1126 ret = vendor_mac_passthru_addr_read(tp, &sa);
1128 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1132 netif_err(tp, probe, dev, "Get ether addr fail\n");
1133 } else if (!is_valid_ether_addr(sa.sa_data)) {
1134 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1136 eth_hw_addr_random(dev);
1137 ether_addr_copy(sa.sa_data, dev->dev_addr);
1138 ret = rtl8152_set_mac_address(dev, &sa);
1139 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1142 if (tp->version == RTL_VER_01)
1143 ether_addr_copy(dev->dev_addr, sa.sa_data);
1145 ret = rtl8152_set_mac_address(dev, &sa);
1151 static void read_bulk_callback(struct urb *urb)
1153 struct net_device *netdev;
1154 int status = urb->status;
1166 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1169 if (!test_bit(WORK_ENABLE, &tp->flags))
1172 netdev = tp->netdev;
1174 /* When link down, the driver would cancel all bulks. */
1175 /* This avoid the re-submitting bulk */
1176 if (!netif_carrier_ok(netdev))
1179 usb_mark_last_busy(tp->udev);
1183 if (urb->actual_length < ETH_ZLEN)
1186 spin_lock(&tp->rx_lock);
1187 list_add_tail(&agg->list, &tp->rx_done);
1188 spin_unlock(&tp->rx_lock);
1189 napi_schedule(&tp->napi);
1192 set_bit(RTL8152_UNPLUG, &tp->flags);
1193 netif_device_detach(tp->netdev);
1196 return; /* the urb is in unlink state */
1198 if (net_ratelimit())
1199 netdev_warn(netdev, "maybe reset is needed?\n");
1202 if (net_ratelimit())
1203 netdev_warn(netdev, "Rx status %d\n", status);
1207 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1210 static void write_bulk_callback(struct urb *urb)
1212 struct net_device_stats *stats;
1213 struct net_device *netdev;
1216 int status = urb->status;
1226 netdev = tp->netdev;
1227 stats = &netdev->stats;
1229 if (net_ratelimit())
1230 netdev_warn(netdev, "Tx status %d\n", status);
1231 stats->tx_errors += agg->skb_num;
1233 stats->tx_packets += agg->skb_num;
1234 stats->tx_bytes += agg->skb_len;
1237 spin_lock(&tp->tx_lock);
1238 list_add_tail(&agg->list, &tp->tx_free);
1239 spin_unlock(&tp->tx_lock);
1241 usb_autopm_put_interface_async(tp->intf);
1243 if (!netif_carrier_ok(netdev))
1246 if (!test_bit(WORK_ENABLE, &tp->flags))
1249 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1252 if (!skb_queue_empty(&tp->tx_queue))
1253 napi_schedule(&tp->napi);
1256 static void intr_callback(struct urb *urb)
1260 int status = urb->status;
1267 if (!test_bit(WORK_ENABLE, &tp->flags))
1270 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1274 case 0: /* success */
1276 case -ECONNRESET: /* unlink */
1278 netif_device_detach(tp->netdev);
1281 netif_info(tp, intr, tp->netdev,
1282 "Stop submitting intr, status %d\n", status);
1285 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1287 /* -EPIPE: should clear the halt */
1289 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1293 d = urb->transfer_buffer;
1294 if (INTR_LINK & __le16_to_cpu(d[0])) {
1295 if (!netif_carrier_ok(tp->netdev)) {
1296 set_bit(RTL8152_LINK_CHG, &tp->flags);
1297 schedule_delayed_work(&tp->schedule, 0);
1300 if (netif_carrier_ok(tp->netdev)) {
1301 netif_stop_queue(tp->netdev);
1302 set_bit(RTL8152_LINK_CHG, &tp->flags);
1303 schedule_delayed_work(&tp->schedule, 0);
1308 res = usb_submit_urb(urb, GFP_ATOMIC);
1309 if (res == -ENODEV) {
1310 set_bit(RTL8152_UNPLUG, &tp->flags);
1311 netif_device_detach(tp->netdev);
1313 netif_err(tp, intr, tp->netdev,
1314 "can't resubmit intr, status %d\n", res);
1318 static inline void *rx_agg_align(void *data)
1320 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1323 static inline void *tx_agg_align(void *data)
1325 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1328 static void free_all_mem(struct r8152 *tp)
1332 for (i = 0; i < RTL8152_MAX_RX; i++) {
1333 usb_free_urb(tp->rx_info[i].urb);
1334 tp->rx_info[i].urb = NULL;
1336 kfree(tp->rx_info[i].buffer);
1337 tp->rx_info[i].buffer = NULL;
1338 tp->rx_info[i].head = NULL;
1341 for (i = 0; i < RTL8152_MAX_TX; i++) {
1342 usb_free_urb(tp->tx_info[i].urb);
1343 tp->tx_info[i].urb = NULL;
1345 kfree(tp->tx_info[i].buffer);
1346 tp->tx_info[i].buffer = NULL;
1347 tp->tx_info[i].head = NULL;
1350 usb_free_urb(tp->intr_urb);
1351 tp->intr_urb = NULL;
1353 kfree(tp->intr_buff);
1354 tp->intr_buff = NULL;
1357 static int alloc_all_mem(struct r8152 *tp)
1359 struct net_device *netdev = tp->netdev;
1360 struct usb_interface *intf = tp->intf;
1361 struct usb_host_interface *alt = intf->cur_altsetting;
1362 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1367 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1369 spin_lock_init(&tp->rx_lock);
1370 spin_lock_init(&tp->tx_lock);
1371 INIT_LIST_HEAD(&tp->tx_free);
1372 INIT_LIST_HEAD(&tp->rx_done);
1373 skb_queue_head_init(&tp->tx_queue);
1374 skb_queue_head_init(&tp->rx_queue);
1376 for (i = 0; i < RTL8152_MAX_RX; i++) {
1377 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1381 if (buf != rx_agg_align(buf)) {
1383 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1389 urb = usb_alloc_urb(0, GFP_KERNEL);
1395 INIT_LIST_HEAD(&tp->rx_info[i].list);
1396 tp->rx_info[i].context = tp;
1397 tp->rx_info[i].urb = urb;
1398 tp->rx_info[i].buffer = buf;
1399 tp->rx_info[i].head = rx_agg_align(buf);
1402 for (i = 0; i < RTL8152_MAX_TX; i++) {
1403 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1407 if (buf != tx_agg_align(buf)) {
1409 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1415 urb = usb_alloc_urb(0, GFP_KERNEL);
1421 INIT_LIST_HEAD(&tp->tx_info[i].list);
1422 tp->tx_info[i].context = tp;
1423 tp->tx_info[i].urb = urb;
1424 tp->tx_info[i].buffer = buf;
1425 tp->tx_info[i].head = tx_agg_align(buf);
1427 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1430 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1434 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1438 tp->intr_interval = (int)ep_intr->desc.bInterval;
1439 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1440 tp->intr_buff, INTBUFSIZE, intr_callback,
1441 tp, tp->intr_interval);
1450 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1452 struct tx_agg *agg = NULL;
1453 unsigned long flags;
1455 if (list_empty(&tp->tx_free))
1458 spin_lock_irqsave(&tp->tx_lock, flags);
1459 if (!list_empty(&tp->tx_free)) {
1460 struct list_head *cursor;
1462 cursor = tp->tx_free.next;
1463 list_del_init(cursor);
1464 agg = list_entry(cursor, struct tx_agg, list);
1466 spin_unlock_irqrestore(&tp->tx_lock, flags);
1471 /* r8152_csum_workaround()
1472 * The hw limites the value the transport offset. When the offset is out of the
1473 * range, calculate the checksum by sw.
1475 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1476 struct sk_buff_head *list)
1478 if (skb_shinfo(skb)->gso_size) {
1479 netdev_features_t features = tp->netdev->features;
1480 struct sk_buff_head seg_list;
1481 struct sk_buff *segs, *nskb;
1483 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1484 segs = skb_gso_segment(skb, features);
1485 if (IS_ERR(segs) || !segs)
1488 __skb_queue_head_init(&seg_list);
1494 __skb_queue_tail(&seg_list, nskb);
1497 skb_queue_splice(&seg_list, list);
1499 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1500 if (skb_checksum_help(skb) < 0)
1503 __skb_queue_head(list, skb);
1505 struct net_device_stats *stats;
1508 stats = &tp->netdev->stats;
1509 stats->tx_dropped++;
1514 /* msdn_giant_send_check()
1515 * According to the document of microsoft, the TCP Pseudo Header excludes the
1516 * packet length for IPv6 TCP large packets.
1518 static int msdn_giant_send_check(struct sk_buff *skb)
1520 const struct ipv6hdr *ipv6h;
1524 ret = skb_cow_head(skb, 0);
1528 ipv6h = ipv6_hdr(skb);
1532 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1537 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1539 if (skb_vlan_tag_present(skb)) {
1542 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1543 desc->opts2 |= cpu_to_le32(opts2);
1547 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1549 u32 opts2 = le32_to_cpu(desc->opts2);
1551 if (opts2 & RX_VLAN_TAG)
1552 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1553 swab16(opts2 & 0xffff));
1556 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1557 struct sk_buff *skb, u32 len, u32 transport_offset)
1559 u32 mss = skb_shinfo(skb)->gso_size;
1560 u32 opts1, opts2 = 0;
1561 int ret = TX_CSUM_SUCCESS;
1563 WARN_ON_ONCE(len > TX_LEN_MAX);
1565 opts1 = len | TX_FS | TX_LS;
1568 if (transport_offset > GTTCPHO_MAX) {
1569 netif_warn(tp, tx_err, tp->netdev,
1570 "Invalid transport offset 0x%x for TSO\n",
1576 switch (vlan_get_protocol(skb)) {
1577 case htons(ETH_P_IP):
1581 case htons(ETH_P_IPV6):
1582 if (msdn_giant_send_check(skb)) {
1594 opts1 |= transport_offset << GTTCPHO_SHIFT;
1595 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1596 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1599 if (transport_offset > TCPHO_MAX) {
1600 netif_warn(tp, tx_err, tp->netdev,
1601 "Invalid transport offset 0x%x\n",
1607 switch (vlan_get_protocol(skb)) {
1608 case htons(ETH_P_IP):
1610 ip_protocol = ip_hdr(skb)->protocol;
1613 case htons(ETH_P_IPV6):
1615 ip_protocol = ipv6_hdr(skb)->nexthdr;
1619 ip_protocol = IPPROTO_RAW;
1623 if (ip_protocol == IPPROTO_TCP)
1625 else if (ip_protocol == IPPROTO_UDP)
1630 opts2 |= transport_offset << TCPHO_SHIFT;
1633 desc->opts2 = cpu_to_le32(opts2);
1634 desc->opts1 = cpu_to_le32(opts1);
1640 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1642 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1646 __skb_queue_head_init(&skb_head);
1647 spin_lock(&tx_queue->lock);
1648 skb_queue_splice_init(tx_queue, &skb_head);
1649 spin_unlock(&tx_queue->lock);
1651 tx_data = agg->head;
1654 remain = agg_buf_sz;
1656 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1657 struct tx_desc *tx_desc;
1658 struct sk_buff *skb;
1662 skb = __skb_dequeue(&skb_head);
1666 len = skb->len + sizeof(*tx_desc);
1669 __skb_queue_head(&skb_head, skb);
1673 tx_data = tx_agg_align(tx_data);
1674 tx_desc = (struct tx_desc *)tx_data;
1676 offset = (u32)skb_transport_offset(skb);
1678 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1679 r8152_csum_workaround(tp, skb, &skb_head);
1683 rtl_tx_vlan_tag(tx_desc, skb);
1685 tx_data += sizeof(*tx_desc);
1688 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1689 struct net_device_stats *stats = &tp->netdev->stats;
1691 stats->tx_dropped++;
1692 dev_kfree_skb_any(skb);
1693 tx_data -= sizeof(*tx_desc);
1698 agg->skb_len += len;
1699 agg->skb_num += skb_shinfo(skb)->gso_segs ?: 1;
1701 dev_kfree_skb_any(skb);
1703 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1706 if (!skb_queue_empty(&skb_head)) {
1707 spin_lock(&tx_queue->lock);
1708 skb_queue_splice(&skb_head, tx_queue);
1709 spin_unlock(&tx_queue->lock);
1712 netif_tx_lock(tp->netdev);
1714 if (netif_queue_stopped(tp->netdev) &&
1715 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1716 netif_wake_queue(tp->netdev);
1718 netif_tx_unlock(tp->netdev);
1720 ret = usb_autopm_get_interface_async(tp->intf);
1724 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1725 agg->head, (int)(tx_data - (u8 *)agg->head),
1726 (usb_complete_t)write_bulk_callback, agg);
1728 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1730 usb_autopm_put_interface_async(tp->intf);
1736 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1738 u8 checksum = CHECKSUM_NONE;
1741 if (!(tp->netdev->features & NETIF_F_RXCSUM))
1744 opts2 = le32_to_cpu(rx_desc->opts2);
1745 opts3 = le32_to_cpu(rx_desc->opts3);
1747 if (opts2 & RD_IPV4_CS) {
1749 checksum = CHECKSUM_NONE;
1750 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1751 checksum = CHECKSUM_NONE;
1752 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1753 checksum = CHECKSUM_NONE;
1755 checksum = CHECKSUM_UNNECESSARY;
1756 } else if (opts2 & RD_IPV6_CS) {
1757 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1758 checksum = CHECKSUM_UNNECESSARY;
1759 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1760 checksum = CHECKSUM_UNNECESSARY;
1767 static int rx_bottom(struct r8152 *tp, int budget)
1769 unsigned long flags;
1770 struct list_head *cursor, *next, rx_queue;
1771 int ret = 0, work_done = 0;
1773 if (!skb_queue_empty(&tp->rx_queue)) {
1774 while (work_done < budget) {
1775 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1776 struct net_device *netdev = tp->netdev;
1777 struct net_device_stats *stats = &netdev->stats;
1778 unsigned int pkt_len;
1784 napi_gro_receive(&tp->napi, skb);
1786 stats->rx_packets++;
1787 stats->rx_bytes += pkt_len;
1791 if (list_empty(&tp->rx_done))
1794 INIT_LIST_HEAD(&rx_queue);
1795 spin_lock_irqsave(&tp->rx_lock, flags);
1796 list_splice_init(&tp->rx_done, &rx_queue);
1797 spin_unlock_irqrestore(&tp->rx_lock, flags);
1799 list_for_each_safe(cursor, next, &rx_queue) {
1800 struct rx_desc *rx_desc;
1806 list_del_init(cursor);
1808 agg = list_entry(cursor, struct rx_agg, list);
1810 if (urb->actual_length < ETH_ZLEN)
1813 rx_desc = agg->head;
1814 rx_data = agg->head;
1815 len_used += sizeof(struct rx_desc);
1817 while (urb->actual_length > len_used) {
1818 struct net_device *netdev = tp->netdev;
1819 struct net_device_stats *stats = &netdev->stats;
1820 unsigned int pkt_len;
1821 struct sk_buff *skb;
1823 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1824 if (pkt_len < ETH_ZLEN)
1827 len_used += pkt_len;
1828 if (urb->actual_length < len_used)
1831 pkt_len -= CRC_SIZE;
1832 rx_data += sizeof(struct rx_desc);
1834 skb = napi_alloc_skb(&tp->napi, pkt_len);
1836 stats->rx_dropped++;
1840 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1841 memcpy(skb->data, rx_data, pkt_len);
1842 skb_put(skb, pkt_len);
1843 skb->protocol = eth_type_trans(skb, netdev);
1844 rtl_rx_vlan_tag(rx_desc, skb);
1845 if (work_done < budget) {
1846 napi_gro_receive(&tp->napi, skb);
1848 stats->rx_packets++;
1849 stats->rx_bytes += pkt_len;
1851 __skb_queue_tail(&tp->rx_queue, skb);
1855 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1856 rx_desc = (struct rx_desc *)rx_data;
1857 len_used = (int)(rx_data - (u8 *)agg->head);
1858 len_used += sizeof(struct rx_desc);
1863 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1865 urb->actual_length = 0;
1866 list_add_tail(&agg->list, next);
1870 if (!list_empty(&rx_queue)) {
1871 spin_lock_irqsave(&tp->rx_lock, flags);
1872 list_splice_tail(&rx_queue, &tp->rx_done);
1873 spin_unlock_irqrestore(&tp->rx_lock, flags);
1880 static void tx_bottom(struct r8152 *tp)
1887 if (skb_queue_empty(&tp->tx_queue))
1890 agg = r8152_get_tx_agg(tp);
1894 res = r8152_tx_agg_fill(tp, agg);
1896 struct net_device *netdev = tp->netdev;
1898 if (res == -ENODEV) {
1899 set_bit(RTL8152_UNPLUG, &tp->flags);
1900 netif_device_detach(netdev);
1902 struct net_device_stats *stats = &netdev->stats;
1903 unsigned long flags;
1905 netif_warn(tp, tx_err, netdev,
1906 "failed tx_urb %d\n", res);
1907 stats->tx_dropped += agg->skb_num;
1909 spin_lock_irqsave(&tp->tx_lock, flags);
1910 list_add_tail(&agg->list, &tp->tx_free);
1911 spin_unlock_irqrestore(&tp->tx_lock, flags);
1917 static void bottom_half(struct r8152 *tp)
1919 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1922 if (!test_bit(WORK_ENABLE, &tp->flags))
1925 /* When link down, the driver would cancel all bulks. */
1926 /* This avoid the re-submitting bulk */
1927 if (!netif_carrier_ok(tp->netdev))
1930 clear_bit(SCHEDULE_NAPI, &tp->flags);
1935 static int r8152_poll(struct napi_struct *napi, int budget)
1937 struct r8152 *tp = container_of(napi, struct r8152, napi);
1940 work_done = rx_bottom(tp, budget);
1943 if (work_done < budget) {
1944 napi_complete(napi);
1945 if (!list_empty(&tp->rx_done))
1946 napi_schedule(napi);
1947 else if (!skb_queue_empty(&tp->tx_queue) &&
1948 !list_empty(&tp->tx_free))
1949 napi_schedule(napi);
1956 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1960 /* The rx would be stopped, so skip submitting */
1961 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1962 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1965 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1966 agg->head, agg_buf_sz,
1967 (usb_complete_t)read_bulk_callback, agg);
1969 ret = usb_submit_urb(agg->urb, mem_flags);
1970 if (ret == -ENODEV) {
1971 set_bit(RTL8152_UNPLUG, &tp->flags);
1972 netif_device_detach(tp->netdev);
1974 struct urb *urb = agg->urb;
1975 unsigned long flags;
1977 urb->actual_length = 0;
1978 spin_lock_irqsave(&tp->rx_lock, flags);
1979 list_add_tail(&agg->list, &tp->rx_done);
1980 spin_unlock_irqrestore(&tp->rx_lock, flags);
1982 netif_err(tp, rx_err, tp->netdev,
1983 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1985 napi_schedule(&tp->napi);
1991 static void rtl_drop_queued_tx(struct r8152 *tp)
1993 struct net_device_stats *stats = &tp->netdev->stats;
1994 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1995 struct sk_buff *skb;
1997 if (skb_queue_empty(tx_queue))
2000 __skb_queue_head_init(&skb_head);
2001 spin_lock_bh(&tx_queue->lock);
2002 skb_queue_splice_init(tx_queue, &skb_head);
2003 spin_unlock_bh(&tx_queue->lock);
2005 while ((skb = __skb_dequeue(&skb_head))) {
2007 stats->tx_dropped++;
2011 static void rtl8152_tx_timeout(struct net_device *netdev)
2013 struct r8152 *tp = netdev_priv(netdev);
2015 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2017 usb_queue_reset_device(tp->intf);
2020 static void rtl8152_set_rx_mode(struct net_device *netdev)
2022 struct r8152 *tp = netdev_priv(netdev);
2024 if (netif_carrier_ok(netdev)) {
2025 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2026 schedule_delayed_work(&tp->schedule, 0);
2030 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2032 struct r8152 *tp = netdev_priv(netdev);
2033 u32 mc_filter[2]; /* Multicast hash filter */
2037 netif_stop_queue(netdev);
2038 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2039 ocp_data &= ~RCR_ACPT_ALL;
2040 ocp_data |= RCR_AB | RCR_APM;
2042 if (netdev->flags & IFF_PROMISC) {
2043 /* Unconditionally log net taps. */
2044 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2045 ocp_data |= RCR_AM | RCR_AAP;
2046 mc_filter[1] = 0xffffffff;
2047 mc_filter[0] = 0xffffffff;
2048 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2049 (netdev->flags & IFF_ALLMULTI)) {
2050 /* Too many to filter perfectly -- accept all multicasts. */
2052 mc_filter[1] = 0xffffffff;
2053 mc_filter[0] = 0xffffffff;
2055 struct netdev_hw_addr *ha;
2059 netdev_for_each_mc_addr(ha, netdev) {
2060 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2062 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2067 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2068 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2070 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2071 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2072 netif_wake_queue(netdev);
2075 static netdev_features_t
2076 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2077 netdev_features_t features)
2079 u32 mss = skb_shinfo(skb)->gso_size;
2080 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2081 int offset = skb_transport_offset(skb);
2083 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2084 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2085 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2086 features &= ~NETIF_F_GSO_MASK;
2091 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2092 struct net_device *netdev)
2094 struct r8152 *tp = netdev_priv(netdev);
2096 skb_tx_timestamp(skb);
2098 skb_queue_tail(&tp->tx_queue, skb);
2100 if (!list_empty(&tp->tx_free)) {
2101 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2102 set_bit(SCHEDULE_NAPI, &tp->flags);
2103 schedule_delayed_work(&tp->schedule, 0);
2105 usb_mark_last_busy(tp->udev);
2106 napi_schedule(&tp->napi);
2108 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2109 netif_stop_queue(netdev);
2112 return NETDEV_TX_OK;
2115 static void r8152b_reset_packet_filter(struct r8152 *tp)
2119 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2120 ocp_data &= ~FMC_FCR_MCU_EN;
2121 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2122 ocp_data |= FMC_FCR_MCU_EN;
2123 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2126 static void rtl8152_nic_reset(struct r8152 *tp)
2130 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2132 for (i = 0; i < 1000; i++) {
2133 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2135 usleep_range(100, 400);
2139 static void set_tx_qlen(struct r8152 *tp)
2141 struct net_device *netdev = tp->netdev;
2143 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2144 sizeof(struct tx_desc));
2147 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2149 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2152 static void rtl_set_eee_plus(struct r8152 *tp)
2157 speed = rtl8152_get_speed(tp);
2158 if (speed & _10bps) {
2159 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2160 ocp_data |= EEEP_CR_EEEP_TX;
2161 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2163 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2164 ocp_data &= ~EEEP_CR_EEEP_TX;
2165 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2169 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2173 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2175 ocp_data |= RXDY_GATED_EN;
2177 ocp_data &= ~RXDY_GATED_EN;
2178 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2181 static int rtl_start_rx(struct r8152 *tp)
2185 INIT_LIST_HEAD(&tp->rx_done);
2186 for (i = 0; i < RTL8152_MAX_RX; i++) {
2187 INIT_LIST_HEAD(&tp->rx_info[i].list);
2188 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2193 if (ret && ++i < RTL8152_MAX_RX) {
2194 struct list_head rx_queue;
2195 unsigned long flags;
2197 INIT_LIST_HEAD(&rx_queue);
2200 struct rx_agg *agg = &tp->rx_info[i++];
2201 struct urb *urb = agg->urb;
2203 urb->actual_length = 0;
2204 list_add_tail(&agg->list, &rx_queue);
2205 } while (i < RTL8152_MAX_RX);
2207 spin_lock_irqsave(&tp->rx_lock, flags);
2208 list_splice_tail(&rx_queue, &tp->rx_done);
2209 spin_unlock_irqrestore(&tp->rx_lock, flags);
2215 static int rtl_stop_rx(struct r8152 *tp)
2219 for (i = 0; i < RTL8152_MAX_RX; i++)
2220 usb_kill_urb(tp->rx_info[i].urb);
2222 while (!skb_queue_empty(&tp->rx_queue))
2223 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2228 static int rtl_enable(struct r8152 *tp)
2232 r8152b_reset_packet_filter(tp);
2234 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2235 ocp_data |= CR_RE | CR_TE;
2236 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2238 rxdy_gated_en(tp, false);
2243 static int rtl8152_enable(struct r8152 *tp)
2245 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2249 rtl_set_eee_plus(tp);
2251 return rtl_enable(tp);
2254 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2256 u32 ocp_data = tp->coalesce / 8;
2258 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2261 static void r8153_set_rx_early_size(struct r8152 *tp)
2263 u32 ocp_data = (agg_buf_sz - rx_reserved_size(tp->netdev->mtu)) / 4;
2265 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2268 static int rtl8153_enable(struct r8152 *tp)
2270 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2273 usb_disable_lpm(tp->udev);
2275 rtl_set_eee_plus(tp);
2276 r8153_set_rx_early_timeout(tp);
2277 r8153_set_rx_early_size(tp);
2279 return rtl_enable(tp);
2282 static void rtl_disable(struct r8152 *tp)
2287 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2288 rtl_drop_queued_tx(tp);
2292 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2293 ocp_data &= ~RCR_ACPT_ALL;
2294 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2296 rtl_drop_queued_tx(tp);
2298 for (i = 0; i < RTL8152_MAX_TX; i++)
2299 usb_kill_urb(tp->tx_info[i].urb);
2301 rxdy_gated_en(tp, true);
2303 for (i = 0; i < 1000; i++) {
2304 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2305 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2307 usleep_range(1000, 2000);
2310 for (i = 0; i < 1000; i++) {
2311 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2313 usleep_range(1000, 2000);
2318 rtl8152_nic_reset(tp);
2321 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2325 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2327 ocp_data |= POWER_CUT;
2329 ocp_data &= ~POWER_CUT;
2330 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2332 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2333 ocp_data &= ~RESUME_INDICATE;
2334 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2337 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2341 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2343 ocp_data |= CPCR_RX_VLAN;
2345 ocp_data &= ~CPCR_RX_VLAN;
2346 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2349 static int rtl8152_set_features(struct net_device *dev,
2350 netdev_features_t features)
2352 netdev_features_t changed = features ^ dev->features;
2353 struct r8152 *tp = netdev_priv(dev);
2356 ret = usb_autopm_get_interface(tp->intf);
2360 mutex_lock(&tp->control);
2362 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2363 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2364 rtl_rx_vlan_en(tp, true);
2366 rtl_rx_vlan_en(tp, false);
2369 mutex_unlock(&tp->control);
2371 usb_autopm_put_interface(tp->intf);
2377 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2379 static u32 __rtl_get_wol(struct r8152 *tp)
2384 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2385 if (ocp_data & LINK_ON_WAKE_EN)
2386 wolopts |= WAKE_PHY;
2388 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2389 if (ocp_data & UWF_EN)
2390 wolopts |= WAKE_UCAST;
2391 if (ocp_data & BWF_EN)
2392 wolopts |= WAKE_BCAST;
2393 if (ocp_data & MWF_EN)
2394 wolopts |= WAKE_MCAST;
2396 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2397 if (ocp_data & MAGIC_EN)
2398 wolopts |= WAKE_MAGIC;
2403 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2407 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2409 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2410 ocp_data &= ~LINK_ON_WAKE_EN;
2411 if (wolopts & WAKE_PHY)
2412 ocp_data |= LINK_ON_WAKE_EN;
2413 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2415 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2416 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2417 if (wolopts & WAKE_UCAST)
2419 if (wolopts & WAKE_BCAST)
2421 if (wolopts & WAKE_MCAST)
2423 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2425 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2427 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2428 ocp_data &= ~MAGIC_EN;
2429 if (wolopts & WAKE_MAGIC)
2430 ocp_data |= MAGIC_EN;
2431 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2433 if (wolopts & WAKE_ANY)
2434 device_set_wakeup_enable(&tp->udev->dev, true);
2436 device_set_wakeup_enable(&tp->udev->dev, false);
2439 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2444 memset(u1u2, 0xff, sizeof(u1u2));
2446 memset(u1u2, 0x00, sizeof(u1u2));
2448 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2451 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2455 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2456 if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2457 ocp_data |= U2P3_ENABLE;
2459 ocp_data &= ~U2P3_ENABLE;
2460 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2463 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2467 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2469 ocp_data |= PWR_EN | PHASE2_EN;
2471 ocp_data &= ~(PWR_EN | PHASE2_EN);
2472 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2474 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2475 ocp_data &= ~PCUT_STATUS;
2476 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2479 static bool rtl_can_wakeup(struct r8152 *tp)
2481 struct usb_device *udev = tp->udev;
2483 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2486 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2491 __rtl_set_wol(tp, WAKE_ANY);
2493 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2495 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2496 ocp_data |= LINK_OFF_WAKE_EN;
2497 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2499 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2503 __rtl_set_wol(tp, tp->saved_wolopts);
2505 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2507 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2508 ocp_data &= ~LINK_OFF_WAKE_EN;
2509 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2511 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2515 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2517 rtl_runtime_suspend_enable(tp, enable);
2520 r8153_u1u2en(tp, false);
2521 r8153_u2p3en(tp, false);
2523 r8153_u2p3en(tp, true);
2524 r8153_u1u2en(tp, true);
2528 static void r8153_teredo_off(struct r8152 *tp)
2532 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2533 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2534 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2536 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2537 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2538 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2541 static void rtl_reset_bmu(struct r8152 *tp)
2545 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2546 ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2547 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2548 ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2549 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2552 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2555 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2556 LINKENA | DIS_SDSAVE);
2558 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2564 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2566 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2567 ocp_reg_write(tp, OCP_EEE_DATA, reg);
2568 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2571 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2575 r8152_mmd_indirect(tp, dev, reg);
2576 data = ocp_reg_read(tp, OCP_EEE_DATA);
2577 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2582 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2584 r8152_mmd_indirect(tp, dev, reg);
2585 ocp_reg_write(tp, OCP_EEE_DATA, data);
2586 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2589 static void r8152_eee_en(struct r8152 *tp, bool enable)
2591 u16 config1, config2, config3;
2594 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2595 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2596 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2597 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2600 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2601 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2602 config1 |= sd_rise_time(1);
2603 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2604 config3 |= fast_snr(42);
2606 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2607 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2609 config1 |= sd_rise_time(7);
2610 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2611 config3 |= fast_snr(511);
2614 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2615 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2616 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2617 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2620 static void r8152b_enable_eee(struct r8152 *tp)
2622 r8152_eee_en(tp, true);
2623 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2626 static void r8152b_enable_fc(struct r8152 *tp)
2630 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2631 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2632 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2635 static void rtl8152_disable(struct r8152 *tp)
2637 r8152_aldps_en(tp, false);
2639 r8152_aldps_en(tp, true);
2642 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2644 r8152b_enable_eee(tp);
2645 r8152_aldps_en(tp, true);
2646 r8152b_enable_fc(tp);
2648 set_bit(PHY_RESET, &tp->flags);
2651 static void r8152b_exit_oob(struct r8152 *tp)
2656 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2657 ocp_data &= ~RCR_ACPT_ALL;
2658 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2660 rxdy_gated_en(tp, true);
2661 r8153_teredo_off(tp);
2662 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2663 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2665 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2666 ocp_data &= ~NOW_IS_OOB;
2667 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2669 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2670 ocp_data &= ~MCU_BORW_EN;
2671 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2673 for (i = 0; i < 1000; i++) {
2674 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2675 if (ocp_data & LINK_LIST_READY)
2677 usleep_range(1000, 2000);
2680 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2681 ocp_data |= RE_INIT_LL;
2682 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2684 for (i = 0; i < 1000; i++) {
2685 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2686 if (ocp_data & LINK_LIST_READY)
2688 usleep_range(1000, 2000);
2691 rtl8152_nic_reset(tp);
2693 /* rx share fifo credit full threshold */
2694 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2696 if (tp->udev->speed == USB_SPEED_FULL ||
2697 tp->udev->speed == USB_SPEED_LOW) {
2698 /* rx share fifo credit near full threshold */
2699 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2701 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2704 /* rx share fifo credit near full threshold */
2705 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2707 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2711 /* TX share fifo free credit full threshold */
2712 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2714 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2715 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2716 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2717 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2719 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2721 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2723 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2724 ocp_data |= TCR0_AUTO_FIFO;
2725 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2728 static void r8152b_enter_oob(struct r8152 *tp)
2733 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2734 ocp_data &= ~NOW_IS_OOB;
2735 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2737 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2738 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2739 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2743 for (i = 0; i < 1000; i++) {
2744 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2745 if (ocp_data & LINK_LIST_READY)
2747 usleep_range(1000, 2000);
2750 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2751 ocp_data |= RE_INIT_LL;
2752 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2754 for (i = 0; i < 1000; i++) {
2755 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2756 if (ocp_data & LINK_LIST_READY)
2758 usleep_range(1000, 2000);
2761 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2763 rtl_rx_vlan_en(tp, true);
2765 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2766 ocp_data |= ALDPS_PROXY_MODE;
2767 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2769 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2770 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2771 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2773 rxdy_gated_en(tp, false);
2775 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2776 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2777 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2780 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2784 data = ocp_reg_read(tp, OCP_POWER_CFG);
2787 ocp_reg_write(tp, OCP_POWER_CFG, data);
2790 ocp_reg_write(tp, OCP_POWER_CFG, data);
2795 static void r8153_eee_en(struct r8152 *tp, bool enable)
2800 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2801 config = ocp_reg_read(tp, OCP_EEE_CFG);
2804 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2807 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2808 config &= ~EEE10_EN;
2811 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2812 ocp_reg_write(tp, OCP_EEE_CFG, config);
2815 static void r8153_hw_phy_cfg(struct r8152 *tp)
2820 /* disable ALDPS before updating the PHY parameters */
2821 r8153_aldps_en(tp, false);
2823 /* disable EEE before updating the PHY parameters */
2824 r8153_eee_en(tp, false);
2825 ocp_reg_write(tp, OCP_EEE_ADV, 0);
2827 if (tp->version == RTL_VER_03) {
2828 data = ocp_reg_read(tp, OCP_EEE_CFG);
2829 data &= ~CTAP_SHORT_EN;
2830 ocp_reg_write(tp, OCP_EEE_CFG, data);
2833 data = ocp_reg_read(tp, OCP_POWER_CFG);
2834 data |= EEE_CLKDIV_EN;
2835 ocp_reg_write(tp, OCP_POWER_CFG, data);
2837 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2838 data |= EN_10M_BGOFF;
2839 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2840 data = ocp_reg_read(tp, OCP_POWER_CFG);
2841 data |= EN_10M_PLLOFF;
2842 ocp_reg_write(tp, OCP_POWER_CFG, data);
2843 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2845 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2846 ocp_data |= PFM_PWM_SWITCH;
2847 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2849 /* Enable LPF corner auto tune */
2850 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2852 /* Adjust 10M Amplitude */
2853 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2854 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2856 r8153_eee_en(tp, true);
2857 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
2859 r8153_aldps_en(tp, true);
2860 r8152b_enable_fc(tp);
2862 set_bit(PHY_RESET, &tp->flags);
2865 static void r8153_first_init(struct r8152 *tp)
2870 rxdy_gated_en(tp, true);
2871 r8153_teredo_off(tp);
2873 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2874 ocp_data &= ~RCR_ACPT_ALL;
2875 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2877 rtl8152_nic_reset(tp);
2880 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2881 ocp_data &= ~NOW_IS_OOB;
2882 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2884 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2885 ocp_data &= ~MCU_BORW_EN;
2886 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2888 for (i = 0; i < 1000; i++) {
2889 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2890 if (ocp_data & LINK_LIST_READY)
2892 usleep_range(1000, 2000);
2895 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2896 ocp_data |= RE_INIT_LL;
2897 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2899 for (i = 0; i < 1000; i++) {
2900 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2901 if (ocp_data & LINK_LIST_READY)
2903 usleep_range(1000, 2000);
2906 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2908 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2909 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2911 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2912 ocp_data |= TCR0_AUTO_FIFO;
2913 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2915 rtl8152_nic_reset(tp);
2917 /* rx share fifo credit full threshold */
2918 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2919 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2920 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2921 /* TX share fifo free credit full threshold */
2922 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2924 /* rx aggregation */
2925 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2926 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2927 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2930 static void r8153_enter_oob(struct r8152 *tp)
2935 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2936 ocp_data &= ~NOW_IS_OOB;
2937 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2942 for (i = 0; i < 1000; i++) {
2943 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2944 if (ocp_data & LINK_LIST_READY)
2946 usleep_range(1000, 2000);
2949 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2950 ocp_data |= RE_INIT_LL;
2951 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2953 for (i = 0; i < 1000; i++) {
2954 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2955 if (ocp_data & LINK_LIST_READY)
2957 usleep_range(1000, 2000);
2960 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2962 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2963 ocp_data &= ~TEREDO_WAKE_MASK;
2964 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2966 rtl_rx_vlan_en(tp, true);
2968 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2969 ocp_data |= ALDPS_PROXY_MODE;
2970 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2972 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2973 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2974 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2976 rxdy_gated_en(tp, false);
2978 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2979 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2980 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2983 static void rtl8153_disable(struct r8152 *tp)
2985 r8153_aldps_en(tp, false);
2988 r8153_aldps_en(tp, true);
2989 usb_enable_lpm(tp->udev);
2992 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2994 u16 bmcr, anar, gbcr;
2997 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2998 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2999 ADVERTISE_100HALF | ADVERTISE_100FULL);
3000 if (tp->mii.supports_gmii) {
3001 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
3002 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
3007 if (autoneg == AUTONEG_DISABLE) {
3008 if (speed == SPEED_10) {
3010 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3011 } else if (speed == SPEED_100) {
3012 bmcr = BMCR_SPEED100;
3013 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3014 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3015 bmcr = BMCR_SPEED1000;
3016 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3022 if (duplex == DUPLEX_FULL)
3023 bmcr |= BMCR_FULLDPLX;
3025 if (speed == SPEED_10) {
3026 if (duplex == DUPLEX_FULL)
3027 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3029 anar |= ADVERTISE_10HALF;
3030 } else if (speed == SPEED_100) {
3031 if (duplex == DUPLEX_FULL) {
3032 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3033 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3035 anar |= ADVERTISE_10HALF;
3036 anar |= ADVERTISE_100HALF;
3038 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3039 if (duplex == DUPLEX_FULL) {
3040 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3041 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3042 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3044 anar |= ADVERTISE_10HALF;
3045 anar |= ADVERTISE_100HALF;
3046 gbcr |= ADVERTISE_1000HALF;
3053 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3056 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3059 if (tp->mii.supports_gmii)
3060 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3062 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3063 r8152_mdio_write(tp, MII_BMCR, bmcr);
3065 if (bmcr & BMCR_RESET) {
3068 for (i = 0; i < 50; i++) {
3070 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3079 static void rtl8152_up(struct r8152 *tp)
3081 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3084 r8152_aldps_en(tp, false);
3085 r8152b_exit_oob(tp);
3086 r8152_aldps_en(tp, true);
3089 static void rtl8152_down(struct r8152 *tp)
3091 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3092 rtl_drop_queued_tx(tp);
3096 r8152_power_cut_en(tp, false);
3097 r8152_aldps_en(tp, false);
3098 r8152b_enter_oob(tp);
3099 r8152_aldps_en(tp, true);
3102 static void rtl8153_up(struct r8152 *tp)
3104 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3107 r8153_u1u2en(tp, false);
3108 r8153_aldps_en(tp, false);
3109 r8153_first_init(tp);
3110 r8153_aldps_en(tp, true);
3111 r8153_u2p3en(tp, true);
3112 r8153_u1u2en(tp, true);
3113 usb_enable_lpm(tp->udev);
3116 static void rtl8153_down(struct r8152 *tp)
3118 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3119 rtl_drop_queued_tx(tp);
3123 r8153_u1u2en(tp, false);
3124 r8153_u2p3en(tp, false);
3125 r8153_power_cut_en(tp, false);
3126 r8153_aldps_en(tp, false);
3127 r8153_enter_oob(tp);
3128 r8153_aldps_en(tp, true);
3131 static bool rtl8152_in_nway(struct r8152 *tp)
3135 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3136 tp->ocp_base = 0x2000;
3137 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
3138 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3140 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3141 if (nway_state & 0xc000)
3147 static bool rtl8153_in_nway(struct r8152 *tp)
3149 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3151 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3157 static void set_carrier(struct r8152 *tp)
3159 struct net_device *netdev = tp->netdev;
3162 speed = rtl8152_get_speed(tp);
3164 if (speed & LINK_STATUS) {
3165 if (!netif_carrier_ok(netdev)) {
3166 tp->rtl_ops.enable(tp);
3167 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3168 netif_stop_queue(netdev);
3169 napi_disable(&tp->napi);
3170 netif_carrier_on(netdev);
3172 napi_enable(&tp->napi);
3173 netif_wake_queue(netdev);
3174 netif_info(tp, link, netdev, "carrier on\n");
3175 } else if (netif_queue_stopped(netdev) &&
3176 skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
3177 netif_wake_queue(netdev);
3180 if (netif_carrier_ok(netdev)) {
3181 netif_carrier_off(netdev);
3182 napi_disable(&tp->napi);
3183 tp->rtl_ops.disable(tp);
3184 napi_enable(&tp->napi);
3185 netif_info(tp, link, netdev, "carrier off\n");
3190 static void rtl_work_func_t(struct work_struct *work)
3192 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3194 /* If the device is unplugged or !netif_running(), the workqueue
3195 * doesn't need to wake the device, and could return directly.
3197 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3200 if (usb_autopm_get_interface(tp->intf) < 0)
3203 if (!test_bit(WORK_ENABLE, &tp->flags))
3206 if (!mutex_trylock(&tp->control)) {
3207 schedule_delayed_work(&tp->schedule, 0);
3211 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3214 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3215 _rtl8152_set_rx_mode(tp->netdev);
3217 /* don't schedule napi before linking */
3218 if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3219 netif_carrier_ok(tp->netdev))
3220 napi_schedule(&tp->napi);
3222 mutex_unlock(&tp->control);
3225 usb_autopm_put_interface(tp->intf);
3228 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3230 struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3232 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3235 if (usb_autopm_get_interface(tp->intf) < 0)
3238 mutex_lock(&tp->control);
3240 tp->rtl_ops.hw_phy_cfg(tp);
3242 rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3244 mutex_unlock(&tp->control);
3246 usb_autopm_put_interface(tp->intf);
3249 #ifdef CONFIG_PM_SLEEP
3250 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3253 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3256 case PM_HIBERNATION_PREPARE:
3257 case PM_SUSPEND_PREPARE:
3258 usb_autopm_get_interface(tp->intf);
3261 case PM_POST_HIBERNATION:
3262 case PM_POST_SUSPEND:
3263 usb_autopm_put_interface(tp->intf);
3266 case PM_POST_RESTORE:
3267 case PM_RESTORE_PREPARE:
3276 static int rtl8152_open(struct net_device *netdev)
3278 struct r8152 *tp = netdev_priv(netdev);
3281 res = alloc_all_mem(tp);
3285 res = usb_autopm_get_interface(tp->intf);
3289 mutex_lock(&tp->control);
3293 netif_carrier_off(netdev);
3294 netif_start_queue(netdev);
3295 set_bit(WORK_ENABLE, &tp->flags);
3297 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3300 netif_device_detach(tp->netdev);
3301 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3305 napi_enable(&tp->napi);
3307 mutex_unlock(&tp->control);
3309 usb_autopm_put_interface(tp->intf);
3310 #ifdef CONFIG_PM_SLEEP
3311 tp->pm_notifier.notifier_call = rtl_notifier;
3312 register_pm_notifier(&tp->pm_notifier);
3317 mutex_unlock(&tp->control);
3318 usb_autopm_put_interface(tp->intf);
3325 static int rtl8152_close(struct net_device *netdev)
3327 struct r8152 *tp = netdev_priv(netdev);
3330 #ifdef CONFIG_PM_SLEEP
3331 unregister_pm_notifier(&tp->pm_notifier);
3333 if (!test_bit(RTL8152_UNPLUG, &tp->flags))
3334 napi_disable(&tp->napi);
3335 clear_bit(WORK_ENABLE, &tp->flags);
3336 usb_kill_urb(tp->intr_urb);
3337 cancel_delayed_work_sync(&tp->schedule);
3338 netif_stop_queue(netdev);
3340 res = usb_autopm_get_interface(tp->intf);
3341 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3342 rtl_drop_queued_tx(tp);
3345 mutex_lock(&tp->control);
3347 tp->rtl_ops.down(tp);
3349 mutex_unlock(&tp->control);
3353 usb_autopm_put_interface(tp->intf);
3360 static void rtl_tally_reset(struct r8152 *tp)
3364 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3365 ocp_data |= TALLY_RESET;
3366 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3369 static void r8152b_init(struct r8152 *tp)
3374 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3377 data = r8152_mdio_read(tp, MII_BMCR);
3378 if (data & BMCR_PDOWN) {
3379 data &= ~BMCR_PDOWN;
3380 r8152_mdio_write(tp, MII_BMCR, data);
3383 r8152_aldps_en(tp, false);
3385 if (tp->version == RTL_VER_01) {
3386 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3387 ocp_data &= ~LED_MODE_MASK;
3388 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3391 r8152_power_cut_en(tp, false);
3393 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3394 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3395 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3396 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3397 ocp_data &= ~MCU_CLK_RATIO_MASK;
3398 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3399 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3400 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3401 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3402 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3404 rtl_tally_reset(tp);
3406 /* enable rx aggregation */
3407 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3408 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3409 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3412 static void r8153_init(struct r8152 *tp)
3418 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3421 r8153_u1u2en(tp, false);
3423 for (i = 0; i < 500; i++) {
3424 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3429 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3433 for (i = 0; i < 500; i++) {
3434 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3435 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3440 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
3441 tp->version == RTL_VER_05)
3442 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
3444 data = r8152_mdio_read(tp, MII_BMCR);
3445 if (data & BMCR_PDOWN) {
3446 data &= ~BMCR_PDOWN;
3447 r8152_mdio_write(tp, MII_BMCR, data);
3450 for (i = 0; i < 500; i++) {
3451 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3452 if (ocp_data == PHY_STAT_LAN_ON)
3456 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3460 usb_disable_lpm(tp->udev);
3461 r8153_u2p3en(tp, false);
3463 if (tp->version == RTL_VER_04) {
3464 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3465 ocp_data &= ~pwd_dn_scale_mask;
3466 ocp_data |= pwd_dn_scale(96);
3467 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3469 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3470 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3471 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3472 } else if (tp->version == RTL_VER_05) {
3473 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3474 ocp_data &= ~ECM_ALDPS;
3475 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3477 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3478 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3479 ocp_data &= ~DYNAMIC_BURST;
3481 ocp_data |= DYNAMIC_BURST;
3482 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3483 } else if (tp->version == RTL_VER_06) {
3484 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3485 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3486 ocp_data &= ~DYNAMIC_BURST;
3488 ocp_data |= DYNAMIC_BURST;
3489 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3492 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3493 ocp_data |= EP4_FULL_FC;
3494 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3496 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3497 ocp_data &= ~TIMER11_EN;
3498 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3500 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3501 ocp_data &= ~LED_MODE_MASK;
3502 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3504 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3505 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3506 ocp_data |= LPM_TIMER_500MS;
3508 ocp_data |= LPM_TIMER_500US;
3509 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3511 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3512 ocp_data &= ~SEN_VAL_MASK;
3513 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3514 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3516 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3518 r8153_power_cut_en(tp, false);
3519 r8153_u1u2en(tp, true);
3521 /* MAC clock speed down */
3522 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
3523 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
3524 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
3525 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
3527 rtl_tally_reset(tp);
3528 r8153_u2p3en(tp, true);
3531 static int rtl8152_pre_reset(struct usb_interface *intf)
3533 struct r8152 *tp = usb_get_intfdata(intf);
3534 struct net_device *netdev;
3539 netdev = tp->netdev;
3540 if (!netif_running(netdev))
3543 netif_stop_queue(netdev);
3544 napi_disable(&tp->napi);
3545 clear_bit(WORK_ENABLE, &tp->flags);
3546 usb_kill_urb(tp->intr_urb);
3547 cancel_delayed_work_sync(&tp->schedule);
3548 if (netif_carrier_ok(netdev)) {
3549 mutex_lock(&tp->control);
3550 tp->rtl_ops.disable(tp);
3551 mutex_unlock(&tp->control);
3557 static int rtl8152_post_reset(struct usb_interface *intf)
3559 struct r8152 *tp = usb_get_intfdata(intf);
3560 struct net_device *netdev;
3565 netdev = tp->netdev;
3566 if (!netif_running(netdev))
3569 set_bit(WORK_ENABLE, &tp->flags);
3570 if (netif_carrier_ok(netdev)) {
3571 mutex_lock(&tp->control);
3572 tp->rtl_ops.enable(tp);
3574 rtl8152_set_rx_mode(netdev);
3575 mutex_unlock(&tp->control);
3578 napi_enable(&tp->napi);
3579 netif_wake_queue(netdev);
3580 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3582 if (!list_empty(&tp->rx_done))
3583 napi_schedule(&tp->napi);
3588 static bool delay_autosuspend(struct r8152 *tp)
3590 bool sw_linking = !!netif_carrier_ok(tp->netdev);
3591 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3593 /* This means a linking change occurs and the driver doesn't detect it,
3594 * yet. If the driver has disabled tx/rx and hw is linking on, the
3595 * device wouldn't wake up by receiving any packet.
3597 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3600 /* If the linking down is occurred by nway, the device may miss the
3601 * linking change event. And it wouldn't wake when linking on.
3603 if (!sw_linking && tp->rtl_ops.in_nway(tp))
3605 else if (!skb_queue_empty(&tp->tx_queue))
3611 static int rtl8152_rumtime_suspend(struct r8152 *tp)
3613 struct net_device *netdev = tp->netdev;
3616 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3617 smp_mb__after_atomic();
3619 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3622 if (delay_autosuspend(tp)) {
3623 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3624 smp_mb__after_atomic();
3629 if (netif_carrier_ok(netdev)) {
3632 rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3633 ocp_data = rcr & ~RCR_ACPT_ALL;
3634 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3635 rxdy_gated_en(tp, true);
3636 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
3638 if (!(ocp_data & RXFIFO_EMPTY)) {
3639 rxdy_gated_en(tp, false);
3640 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3641 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3642 smp_mb__after_atomic();
3648 clear_bit(WORK_ENABLE, &tp->flags);
3649 usb_kill_urb(tp->intr_urb);
3651 tp->rtl_ops.autosuspend_en(tp, true);
3653 if (netif_carrier_ok(netdev)) {
3654 napi_disable(&tp->napi);
3656 rxdy_gated_en(tp, false);
3657 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3658 napi_enable(&tp->napi);
3666 static int rtl8152_system_suspend(struct r8152 *tp)
3668 struct net_device *netdev = tp->netdev;
3671 netif_device_detach(netdev);
3673 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3674 clear_bit(WORK_ENABLE, &tp->flags);
3675 usb_kill_urb(tp->intr_urb);
3676 napi_disable(&tp->napi);
3677 cancel_delayed_work_sync(&tp->schedule);
3678 tp->rtl_ops.down(tp);
3679 napi_enable(&tp->napi);
3685 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3687 struct r8152 *tp = usb_get_intfdata(intf);
3690 mutex_lock(&tp->control);
3692 if (PMSG_IS_AUTO(message))
3693 ret = rtl8152_rumtime_suspend(tp);
3695 ret = rtl8152_system_suspend(tp);
3697 mutex_unlock(&tp->control);
3702 static int rtl8152_resume(struct usb_interface *intf)
3704 struct r8152 *tp = usb_get_intfdata(intf);
3706 mutex_lock(&tp->control);
3708 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3709 tp->rtl_ops.init(tp);
3710 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3711 netif_device_attach(tp->netdev);
3714 if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3715 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3716 tp->rtl_ops.autosuspend_en(tp, false);
3717 napi_disable(&tp->napi);
3718 set_bit(WORK_ENABLE, &tp->flags);
3720 if (netif_carrier_ok(tp->netdev)) {
3721 if (rtl8152_get_speed(tp) & LINK_STATUS) {
3724 netif_carrier_off(tp->netdev);
3725 tp->rtl_ops.disable(tp);
3726 netif_info(tp, link, tp->netdev,
3731 napi_enable(&tp->napi);
3732 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3733 smp_mb__after_atomic();
3734 if (!list_empty(&tp->rx_done))
3735 napi_schedule(&tp->napi);
3738 netif_carrier_off(tp->netdev);
3739 set_bit(WORK_ENABLE, &tp->flags);
3741 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3742 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3743 if (tp->netdev->flags & IFF_UP)
3744 tp->rtl_ops.autosuspend_en(tp, false);
3745 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3748 mutex_unlock(&tp->control);
3753 static int rtl8152_reset_resume(struct usb_interface *intf)
3755 struct r8152 *tp = usb_get_intfdata(intf);
3757 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3758 return rtl8152_resume(intf);
3761 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3763 struct r8152 *tp = netdev_priv(dev);
3765 if (usb_autopm_get_interface(tp->intf) < 0)
3768 if (!rtl_can_wakeup(tp)) {
3772 mutex_lock(&tp->control);
3773 wol->supported = WAKE_ANY;
3774 wol->wolopts = __rtl_get_wol(tp);
3775 mutex_unlock(&tp->control);
3778 usb_autopm_put_interface(tp->intf);
3781 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3783 struct r8152 *tp = netdev_priv(dev);
3786 if (!rtl_can_wakeup(tp))
3789 if (wol->wolopts & ~WAKE_ANY)
3792 ret = usb_autopm_get_interface(tp->intf);
3796 mutex_lock(&tp->control);
3798 __rtl_set_wol(tp, wol->wolopts);
3799 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3801 mutex_unlock(&tp->control);
3803 usb_autopm_put_interface(tp->intf);
3809 static u32 rtl8152_get_msglevel(struct net_device *dev)
3811 struct r8152 *tp = netdev_priv(dev);
3813 return tp->msg_enable;
3816 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3818 struct r8152 *tp = netdev_priv(dev);
3820 tp->msg_enable = value;
3823 static void rtl8152_get_drvinfo(struct net_device *netdev,
3824 struct ethtool_drvinfo *info)
3826 struct r8152 *tp = netdev_priv(netdev);
3828 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3829 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3830 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3834 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3836 struct r8152 *tp = netdev_priv(netdev);
3839 if (!tp->mii.mdio_read)
3842 ret = usb_autopm_get_interface(tp->intf);
3846 mutex_lock(&tp->control);
3848 ret = mii_ethtool_gset(&tp->mii, cmd);
3850 mutex_unlock(&tp->control);
3852 usb_autopm_put_interface(tp->intf);
3858 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3860 struct r8152 *tp = netdev_priv(dev);
3863 ret = usb_autopm_get_interface(tp->intf);
3867 mutex_lock(&tp->control);
3869 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3871 tp->autoneg = cmd->autoneg;
3872 tp->speed = cmd->speed;
3873 tp->duplex = cmd->duplex;
3876 mutex_unlock(&tp->control);
3878 usb_autopm_put_interface(tp->intf);
3884 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3891 "tx_single_collisions",
3892 "tx_multi_collisions",
3900 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3904 return ARRAY_SIZE(rtl8152_gstrings);
3910 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3911 struct ethtool_stats *stats, u64 *data)
3913 struct r8152 *tp = netdev_priv(dev);
3914 struct tally_counter tally;
3916 if (usb_autopm_get_interface(tp->intf) < 0)
3919 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3921 usb_autopm_put_interface(tp->intf);
3923 data[0] = le64_to_cpu(tally.tx_packets);
3924 data[1] = le64_to_cpu(tally.rx_packets);
3925 data[2] = le64_to_cpu(tally.tx_errors);
3926 data[3] = le32_to_cpu(tally.rx_errors);
3927 data[4] = le16_to_cpu(tally.rx_missed);
3928 data[5] = le16_to_cpu(tally.align_errors);
3929 data[6] = le32_to_cpu(tally.tx_one_collision);
3930 data[7] = le32_to_cpu(tally.tx_multi_collision);
3931 data[8] = le64_to_cpu(tally.rx_unicast);
3932 data[9] = le64_to_cpu(tally.rx_broadcast);
3933 data[10] = le32_to_cpu(tally.rx_multicast);
3934 data[11] = le16_to_cpu(tally.tx_aborted);
3935 data[12] = le16_to_cpu(tally.tx_underrun);
3938 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3940 switch (stringset) {
3942 memcpy(data, rtl8152_gstrings, sizeof(rtl8152_gstrings));
3947 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3949 u32 ocp_data, lp, adv, supported = 0;
3952 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3953 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3955 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3956 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3958 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3959 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3961 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3962 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3964 eee->eee_enabled = !!ocp_data;
3965 eee->eee_active = !!(supported & adv & lp);
3966 eee->supported = supported;
3967 eee->advertised = adv;
3968 eee->lp_advertised = lp;
3973 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3975 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3977 r8152_eee_en(tp, eee->eee_enabled);
3979 if (!eee->eee_enabled)
3982 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3987 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3989 u32 ocp_data, lp, adv, supported = 0;
3992 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3993 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3995 val = ocp_reg_read(tp, OCP_EEE_ADV);
3996 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3998 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3999 lp = mmd_eee_adv_to_ethtool_adv_t(val);
4001 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
4002 ocp_data &= EEE_RX_EN | EEE_TX_EN;
4004 eee->eee_enabled = !!ocp_data;
4005 eee->eee_active = !!(supported & adv & lp);
4006 eee->supported = supported;
4007 eee->advertised = adv;
4008 eee->lp_advertised = lp;
4013 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4015 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4017 r8153_eee_en(tp, eee->eee_enabled);
4019 if (!eee->eee_enabled)
4022 ocp_reg_write(tp, OCP_EEE_ADV, val);
4028 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
4030 struct r8152 *tp = netdev_priv(net);
4033 ret = usb_autopm_get_interface(tp->intf);
4037 mutex_lock(&tp->control);
4039 ret = tp->rtl_ops.eee_get(tp, edata);
4041 mutex_unlock(&tp->control);
4043 usb_autopm_put_interface(tp->intf);
4050 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
4052 struct r8152 *tp = netdev_priv(net);
4055 ret = usb_autopm_get_interface(tp->intf);
4059 mutex_lock(&tp->control);
4061 ret = tp->rtl_ops.eee_set(tp, edata);
4063 ret = mii_nway_restart(&tp->mii);
4065 mutex_unlock(&tp->control);
4067 usb_autopm_put_interface(tp->intf);
4073 static int rtl8152_nway_reset(struct net_device *dev)
4075 struct r8152 *tp = netdev_priv(dev);
4078 ret = usb_autopm_get_interface(tp->intf);
4082 mutex_lock(&tp->control);
4084 ret = mii_nway_restart(&tp->mii);
4086 mutex_unlock(&tp->control);
4088 usb_autopm_put_interface(tp->intf);
4094 static int rtl8152_get_coalesce(struct net_device *netdev,
4095 struct ethtool_coalesce *coalesce)
4097 struct r8152 *tp = netdev_priv(netdev);
4099 switch (tp->version) {
4107 coalesce->rx_coalesce_usecs = tp->coalesce;
4112 static int rtl8152_set_coalesce(struct net_device *netdev,
4113 struct ethtool_coalesce *coalesce)
4115 struct r8152 *tp = netdev_priv(netdev);
4118 switch (tp->version) {
4126 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4129 ret = usb_autopm_get_interface(tp->intf);
4133 mutex_lock(&tp->control);
4135 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4136 tp->coalesce = coalesce->rx_coalesce_usecs;
4138 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4139 r8153_set_rx_early_timeout(tp);
4142 mutex_unlock(&tp->control);
4144 usb_autopm_put_interface(tp->intf);
4149 static const struct ethtool_ops ops = {
4150 .get_drvinfo = rtl8152_get_drvinfo,
4151 .get_settings = rtl8152_get_settings,
4152 .set_settings = rtl8152_set_settings,
4153 .get_link = ethtool_op_get_link,
4154 .nway_reset = rtl8152_nway_reset,
4155 .get_msglevel = rtl8152_get_msglevel,
4156 .set_msglevel = rtl8152_set_msglevel,
4157 .get_wol = rtl8152_get_wol,
4158 .set_wol = rtl8152_set_wol,
4159 .get_strings = rtl8152_get_strings,
4160 .get_sset_count = rtl8152_get_sset_count,
4161 .get_ethtool_stats = rtl8152_get_ethtool_stats,
4162 .get_coalesce = rtl8152_get_coalesce,
4163 .set_coalesce = rtl8152_set_coalesce,
4164 .get_eee = rtl_ethtool_get_eee,
4165 .set_eee = rtl_ethtool_set_eee,
4168 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4170 struct r8152 *tp = netdev_priv(netdev);
4171 struct mii_ioctl_data *data = if_mii(rq);
4174 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4177 res = usb_autopm_get_interface(tp->intf);
4183 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4187 mutex_lock(&tp->control);
4188 data->val_out = r8152_mdio_read(tp, data->reg_num);
4189 mutex_unlock(&tp->control);
4193 if (!capable(CAP_NET_ADMIN)) {
4197 mutex_lock(&tp->control);
4198 r8152_mdio_write(tp, data->reg_num, data->val_in);
4199 mutex_unlock(&tp->control);
4206 usb_autopm_put_interface(tp->intf);
4212 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4214 struct r8152 *tp = netdev_priv(dev);
4217 switch (tp->version) {
4220 return eth_change_mtu(dev, new_mtu);
4225 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4228 ret = usb_autopm_get_interface(tp->intf);
4232 mutex_lock(&tp->control);
4236 if (netif_running(dev) && netif_carrier_ok(dev))
4237 r8153_set_rx_early_size(tp);
4239 mutex_unlock(&tp->control);
4241 usb_autopm_put_interface(tp->intf);
4246 static const struct net_device_ops rtl8152_netdev_ops = {
4247 .ndo_open = rtl8152_open,
4248 .ndo_stop = rtl8152_close,
4249 .ndo_do_ioctl = rtl8152_ioctl,
4250 .ndo_start_xmit = rtl8152_start_xmit,
4251 .ndo_tx_timeout = rtl8152_tx_timeout,
4252 .ndo_set_features = rtl8152_set_features,
4253 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4254 .ndo_set_mac_address = rtl8152_set_mac_address,
4255 .ndo_change_mtu = rtl8152_change_mtu,
4256 .ndo_validate_addr = eth_validate_addr,
4257 .ndo_features_check = rtl8152_features_check,
4260 static void r8152b_get_version(struct r8152 *tp)
4265 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4266 version = (u16)(ocp_data & VERSION_MASK);
4270 tp->version = RTL_VER_01;
4273 tp->version = RTL_VER_02;
4276 tp->version = RTL_VER_03;
4277 tp->mii.supports_gmii = 1;
4280 tp->version = RTL_VER_04;
4281 tp->mii.supports_gmii = 1;
4284 tp->version = RTL_VER_05;
4285 tp->mii.supports_gmii = 1;
4288 tp->version = RTL_VER_06;
4289 tp->mii.supports_gmii = 1;
4292 netif_info(tp, probe, tp->netdev,
4293 "Unknown version 0x%04x\n", version);
4298 static void rtl8152_unload(struct r8152 *tp)
4300 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4303 if (tp->version != RTL_VER_01)
4304 r8152_power_cut_en(tp, true);
4307 static void rtl8153_unload(struct r8152 *tp)
4309 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4312 r8153_power_cut_en(tp, false);
4315 static int rtl_ops_init(struct r8152 *tp)
4317 struct rtl_ops *ops = &tp->rtl_ops;
4320 switch (tp->version) {
4323 ops->init = r8152b_init;
4324 ops->enable = rtl8152_enable;
4325 ops->disable = rtl8152_disable;
4326 ops->up = rtl8152_up;
4327 ops->down = rtl8152_down;
4328 ops->unload = rtl8152_unload;
4329 ops->eee_get = r8152_get_eee;
4330 ops->eee_set = r8152_set_eee;
4331 ops->in_nway = rtl8152_in_nway;
4332 ops->hw_phy_cfg = r8152b_hw_phy_cfg;
4333 ops->autosuspend_en = rtl_runtime_suspend_enable;
4340 ops->init = r8153_init;
4341 ops->enable = rtl8153_enable;
4342 ops->disable = rtl8153_disable;
4343 ops->up = rtl8153_up;
4344 ops->down = rtl8153_down;
4345 ops->unload = rtl8153_unload;
4346 ops->eee_get = r8153_get_eee;
4347 ops->eee_set = r8153_set_eee;
4348 ops->in_nway = rtl8153_in_nway;
4349 ops->hw_phy_cfg = r8153_hw_phy_cfg;
4350 ops->autosuspend_en = rtl8153_runtime_enable;
4355 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4362 static int rtl8152_probe(struct usb_interface *intf,
4363 const struct usb_device_id *id)
4365 struct usb_device *udev = interface_to_usbdev(intf);
4367 struct net_device *netdev;
4370 if (udev->actconfig->desc.bConfigurationValue != 1) {
4371 usb_driver_set_configuration(udev, 1);
4375 if (intf->cur_altsetting->desc.bNumEndpoints < 3)
4378 usb_reset_device(udev);
4379 netdev = alloc_etherdev(sizeof(struct r8152));
4381 dev_err(&intf->dev, "Out of memory\n");
4385 SET_NETDEV_DEV(netdev, &intf->dev);
4386 tp = netdev_priv(netdev);
4387 tp->msg_enable = 0x7FFF;
4390 tp->netdev = netdev;
4393 r8152b_get_version(tp);
4394 ret = rtl_ops_init(tp);
4398 mutex_init(&tp->control);
4399 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4400 INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4402 netdev->netdev_ops = &rtl8152_netdev_ops;
4403 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4405 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4406 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4407 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4408 NETIF_F_HW_VLAN_CTAG_TX;
4409 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4410 NETIF_F_TSO | NETIF_F_FRAGLIST |
4411 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4412 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4413 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4414 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4415 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4417 if (tp->version == RTL_VER_01) {
4418 netdev->features &= ~NETIF_F_RXCSUM;
4419 netdev->hw_features &= ~NETIF_F_RXCSUM;
4422 netdev->ethtool_ops = &ops;
4423 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4425 tp->mii.dev = netdev;
4426 tp->mii.mdio_read = read_mii_word;
4427 tp->mii.mdio_write = write_mii_word;
4428 tp->mii.phy_id_mask = 0x3f;
4429 tp->mii.reg_num_mask = 0x1f;
4430 tp->mii.phy_id = R8152_PHY_ID;
4432 switch (udev->speed) {
4433 case USB_SPEED_SUPER:
4434 case USB_SPEED_SUPER_PLUS:
4435 tp->coalesce = COALESCE_SUPER;
4437 case USB_SPEED_HIGH:
4438 tp->coalesce = COALESCE_HIGH;
4441 tp->coalesce = COALESCE_SLOW;
4445 tp->autoneg = AUTONEG_ENABLE;
4446 tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
4447 tp->duplex = DUPLEX_FULL;
4449 intf->needs_remote_wakeup = 1;
4451 if (!rtl_can_wakeup(tp))
4452 __rtl_set_wol(tp, 0);
4454 tp->saved_wolopts = __rtl_get_wol(tp);
4456 tp->rtl_ops.init(tp);
4457 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4458 set_ethernet_addr(tp);
4460 usb_set_intfdata(intf, tp);
4461 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4463 ret = register_netdev(netdev);
4465 netif_err(tp, probe, netdev, "couldn't register the device\n");
4469 if (tp->saved_wolopts)
4470 device_set_wakeup_enable(&udev->dev, true);
4472 device_set_wakeup_enable(&udev->dev, false);
4474 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4479 netif_napi_del(&tp->napi);
4480 usb_set_intfdata(intf, NULL);
4482 free_netdev(netdev);
4486 static void rtl8152_disconnect(struct usb_interface *intf)
4488 struct r8152 *tp = usb_get_intfdata(intf);
4490 usb_set_intfdata(intf, NULL);
4492 struct usb_device *udev = tp->udev;
4494 if (udev->state == USB_STATE_NOTATTACHED)
4495 set_bit(RTL8152_UNPLUG, &tp->flags);
4497 netif_napi_del(&tp->napi);
4498 unregister_netdev(tp->netdev);
4499 cancel_delayed_work_sync(&tp->hw_phy_work);
4500 tp->rtl_ops.unload(tp);
4501 free_netdev(tp->netdev);
4505 #define REALTEK_USB_DEVICE(vend, prod) \
4506 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4507 USB_DEVICE_ID_MATCH_INT_CLASS, \
4508 .idVendor = (vend), \
4509 .idProduct = (prod), \
4510 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4513 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4514 USB_DEVICE_ID_MATCH_DEVICE, \
4515 .idVendor = (vend), \
4516 .idProduct = (prod), \
4517 .bInterfaceClass = USB_CLASS_COMM, \
4518 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4519 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4521 /* table of devices that work with this driver */
4522 static struct usb_device_id rtl8152_table[] = {
4523 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4524 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4525 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4526 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
4527 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
4528 {REALTEK_USB_DEVICE(VENDOR_ID_LINKSYS, 0x0041)},
4529 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
4533 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4535 static struct usb_driver rtl8152_driver = {
4537 .id_table = rtl8152_table,
4538 .probe = rtl8152_probe,
4539 .disconnect = rtl8152_disconnect,
4540 .suspend = rtl8152_suspend,
4541 .resume = rtl8152_resume,
4542 .reset_resume = rtl8152_reset_resume,
4543 .pre_reset = rtl8152_pre_reset,
4544 .post_reset = rtl8152_post_reset,
4545 .supports_autosuspend = 1,
4546 .disable_hub_initiated_lpm = 1,
4549 module_usb_driver(rtl8152_driver);
4551 MODULE_AUTHOR(DRIVER_AUTHOR);
4552 MODULE_DESCRIPTION(DRIVER_DESC);
4553 MODULE_LICENSE("GPL");
4554 MODULE_VERSION(DRIVER_VERSION);