drivers/net/usb/asix_devices.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * ASIX AX8817X based USB 2.0 Ethernet Devices
   4  * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
   5  * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
   6  * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
   7  * Copyright (c) 2002-2003 TiVo Inc.
   8  */
   9
  10 #include "asix.h"
  11
  12 #define PHY_MODE_MARVELL        0x0000
  13 #define MII_MARVELL_LED_CTRL    0x0018
  14 #define MII_MARVELL_STATUS      0x001b
  15 #define MII_MARVELL_CTRL        0x0014
  16
  17 #define MARVELL_LED_MANUAL      0x0019
  18
  19 #define MARVELL_STATUS_HWCFG    0x0004
  20
  21 #define MARVELL_CTRL_TXDELAY    0x0002
  22 #define MARVELL_CTRL_RXDELAY    0x0080
  23
  24 #define PHY_MODE_RTL8211CL      0x000C
  25
  26 #define AX88772A_PHY14H         0x14
  27 #define AX88772A_PHY14H_DEFAULT 0x442C
  28
  29 #define AX88772A_PHY15H         0x15
  30 #define AX88772A_PHY15H_DEFAULT 0x03C8
  31
  32 #define AX88772A_PHY16H         0x16
  33 #define AX88772A_PHY16H_DEFAULT 0x4044
  34
  35 struct ax88172_int_data {
  36         __le16 res1;
  37         u8 link;
  38         __le16 res2;
  39         u8 status;
  40         __le16 res3;
  41 } __packed;
  42
  43 static void asix_status(struct usbnet *dev, struct urb *urb)
  44 {
  45         struct ax88172_int_data *event;
  46         int link;
  47
  48         if (urb->actual_length < 8)
  49                 return;
  50
  51         event = urb->transfer_buffer;
  52         link = event->link & 0x01;
  53         if (netif_carrier_ok(dev->net) != link) {
  54                 usbnet_link_change(dev, link, 1);
  55                 netdev_dbg(dev->net, "Link Status is: %d\n", link);
  56         }
  57 }
  58
  59 static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
  60 {
  61         if (is_valid_ether_addr(addr)) {
  62                 memcpy(dev->net->dev_addr, addr, ETH_ALEN);
  63         } else {
  64                 netdev_info(dev->net, "invalid hw address, using random\n");
  65                 eth_hw_addr_random(dev->net);
  66         }
  67 }
  68
  69 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
  70 static u32 asix_get_phyid(struct usbnet *dev)
  71 {
  72         int phy_reg;
  73         u32 phy_id;
  74         int i;
  75
  76         /* Poll for the rare case the FW or phy isn't ready yet.  */
  77         for (i = 0; i < 100; i++) {
  78                 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
  79                 if (phy_reg < 0)
  80                         return 0;
  81                 if (phy_reg != 0 && phy_reg != 0xFFFF)
  82                         break;
  83                 mdelay(1);
  84         }
  85
  86         if (phy_reg <= 0 || phy_reg == 0xFFFF)
  87                 return 0;
  88
  89         phy_id = (phy_reg & 0xffff) << 16;
  90
  91         phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
  92         if (phy_reg < 0)
  93                 return 0;
  94
  95         phy_id |= (phy_reg & 0xffff);
  96
  97         return phy_id;
  98 }
  99
 100 static u32 asix_get_link(struct net_device *net)
 101 {
 102         struct usbnet *dev = netdev_priv(net);
 103
 104         return mii_link_ok(&dev->mii);
 105 }
 106
 107 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
 108 {
 109         struct usbnet *dev = netdev_priv(net);
 110
 111         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 112 }
 113
 114 /* We need to override some ethtool_ops so we require our
 115    own structure so we don't interfere with other usbnet
 116    devices that may be connected at the same time. */
 117 static const struct ethtool_ops ax88172_ethtool_ops = {
 118         .get_drvinfo            = asix_get_drvinfo,
 119         .get_link               = asix_get_link,
 120         .get_msglevel           = usbnet_get_msglevel,
 121         .set_msglevel           = usbnet_set_msglevel,
 122         .get_wol                = asix_get_wol,
 123         .set_wol                = asix_set_wol,
 124         .get_eeprom_len         = asix_get_eeprom_len,
 125         .get_eeprom             = asix_get_eeprom,
 126         .set_eeprom             = asix_set_eeprom,
 127         .nway_reset             = usbnet_nway_reset,
 128         .get_link_ksettings     = usbnet_get_link_ksettings_mii,
 129         .set_link_ksettings     = usbnet_set_link_ksettings_mii,
 130 };
 131
 132 static void ax88172_set_multicast(struct net_device *net)
 133 {
 134         struct usbnet *dev = netdev_priv(net);
 135         struct asix_data *data = (struct asix_data *)&dev->data;
 136         u8 rx_ctl = 0x8c;
 137
 138         if (net->flags & IFF_PROMISC) {
 139                 rx_ctl |= 0x01;
 140         } else if (net->flags & IFF_ALLMULTI ||
 141                    netdev_mc_count(net) > AX_MAX_MCAST) {
 142                 rx_ctl |= 0x02;
 143         } else if (netdev_mc_empty(net)) {
 144                 /* just broadcast and directed */
 145         } else {
 146                 /* We use the 20 byte dev->data
 147                  * for our 8 byte filter buffer
 148                  * to avoid allocating memory that
 149                  * is tricky to free later */
 150                 struct netdev_hw_addr *ha;
 151                 u32 crc_bits;
 152
 153                 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
 154
 155                 /* Build the multicast hash filter. */
 156                 netdev_for_each_mc_addr(ha, net) {
 157                         crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
 158                         data->multi_filter[crc_bits >> 3] |=
 159                             1 << (crc_bits & 7);
 160                 }
 161
 162                 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
 163                                    AX_MCAST_FILTER_SIZE, data->multi_filter);
 164
 165                 rx_ctl |= 0x10;
 166         }
 167
 168         asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
 169 }
 170
 171 static int ax88172_link_reset(struct usbnet *dev)
 172 {
 173         u8 mode;
 174         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
 175
 176         mii_check_media(&dev->mii, 1, 1);
 177         mii_ethtool_gset(&dev->mii, &ecmd);
 178         mode = AX88172_MEDIUM_DEFAULT;
 179
 180         if (ecmd.duplex != DUPLEX_FULL)
 181                 mode |= ~AX88172_MEDIUM_FD;
 182
 183         netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
 184                    ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
 185
 186         asix_write_medium_mode(dev, mode, 0);
 187
 188         return 0;
 189 }
 190
 191 static const struct net_device_ops ax88172_netdev_ops = {
 192         .ndo_open               = usbnet_open,
 193         .ndo_stop               = usbnet_stop,
 194         .ndo_start_xmit         = usbnet_start_xmit,
 195         .ndo_tx_timeout         = usbnet_tx_timeout,
 196         .ndo_change_mtu         = usbnet_change_mtu,
 197         .ndo_get_stats64        = dev_get_tstats64,
 198         .ndo_set_mac_address    = eth_mac_addr,
 199         .ndo_validate_addr      = eth_validate_addr,
 200         .ndo_eth_ioctl          = asix_ioctl,
 201         .ndo_set_rx_mode        = ax88172_set_multicast,
 202 };
 203
 204 static void asix_phy_reset(struct usbnet *dev, unsigned int reset_bits)
 205 {
 206         unsigned int timeout = 5000;
 207
 208         asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, reset_bits);
 209
 210         /* give phy_id a chance to process reset */
 211         udelay(500);
 212
 213         /* See IEEE 802.3 "22.2.4.1.1 Reset": 500ms max */
 214         while (timeout--) {
 215                 if (asix_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR)
 216                                                         & BMCR_RESET)
 217                         udelay(100);
 218                 else
 219                         return;
 220         }
 221
 222         netdev_err(dev->net, "BMCR_RESET timeout on phy_id %d\n",
 223                    dev->mii.phy_id);
 224 }
 225
 226 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
 227 {
 228         int ret = 0;
 229         u8 buf[ETH_ALEN] = {0};
 230         int i;
 231         unsigned long gpio_bits = dev->driver_info->data;
 232
 233         usbnet_get_endpoints(dev,intf);
 234
 235         /* Toggle the GPIOs in a manufacturer/model specific way */
 236         for (i = 2; i >= 0; i--) {
 237                 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
 238                                 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL, 0);
 239                 if (ret < 0)
 240                         goto out;
 241                 msleep(5);
 242         }
 243
 244         ret = asix_write_rx_ctl(dev, 0x80, 0);
 245         if (ret < 0)
 246                 goto out;
 247
 248         /* Get the MAC address */
 249         ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
 250                             0, 0, ETH_ALEN, buf, 0);
 251         if (ret < 0) {
 252                 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
 253                            ret);
 254                 goto out;
 255         }
 256
 257         asix_set_netdev_dev_addr(dev, buf);
 258
 259         /* Initialize MII structure */
 260         dev->mii.dev = dev->net;
 261         dev->mii.mdio_read = asix_mdio_read;
 262         dev->mii.mdio_write = asix_mdio_write;
 263         dev->mii.phy_id_mask = 0x3f;
 264         dev->mii.reg_num_mask = 0x1f;
 265
 266         dev->mii.phy_id = asix_read_phy_addr(dev, true);
 267         if (dev->mii.phy_id < 0)
 268                 return dev->mii.phy_id;
 269
 270         dev->net->netdev_ops = &ax88172_netdev_ops;
 271         dev->net->ethtool_ops = &ax88172_ethtool_ops;
 272         dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
 273         dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
 274
 275         asix_phy_reset(dev, BMCR_RESET);
 276         asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 277                 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
 278         mii_nway_restart(&dev->mii);
 279
 280         return 0;
 281
 282 out:
 283         return ret;
 284 }
 285
 286 static void ax88772_ethtool_get_strings(struct net_device *netdev, u32 sset,
 287                                         u8 *data)
 288 {
 289         switch (sset) {
 290         case ETH_SS_TEST:
 291                 net_selftest_get_strings(data);
 292                 break;
 293         }
 294 }
 295
 296 static int ax88772_ethtool_get_sset_count(struct net_device *ndev, int sset)
 297 {
 298         switch (sset) {
 299         case ETH_SS_TEST:
 300                 return net_selftest_get_count();
 301         default:
 302                 return -EOPNOTSUPP;
 303         }
 304 }
 305
 306 static const struct ethtool_ops ax88772_ethtool_ops = {
 307         .get_drvinfo            = asix_get_drvinfo,
 308         .get_link               = usbnet_get_link,
 309         .get_msglevel           = usbnet_get_msglevel,
 310         .set_msglevel           = usbnet_set_msglevel,
 311         .get_wol                = asix_get_wol,
 312         .set_wol                = asix_set_wol,
 313         .get_eeprom_len         = asix_get_eeprom_len,
 314         .get_eeprom             = asix_get_eeprom,
 315         .set_eeprom             = asix_set_eeprom,
 316         .nway_reset             = phy_ethtool_nway_reset,
 317         .get_link_ksettings     = phy_ethtool_get_link_ksettings,
 318         .set_link_ksettings     = phy_ethtool_set_link_ksettings,
 319         .self_test              = net_selftest,
 320         .get_strings            = ax88772_ethtool_get_strings,
 321         .get_sset_count         = ax88772_ethtool_get_sset_count,
 322 };
 323
 324 static int ax88772_reset(struct usbnet *dev)
 325 {
 326         struct asix_data *data = (struct asix_data *)&dev->data;
 327         struct asix_common_private *priv = dev->driver_priv;
 328         int ret;
 329
 330         /* Rewrite MAC address */
 331         ether_addr_copy(data->mac_addr, dev->net->dev_addr);
 332         ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
 333                              ETH_ALEN, data->mac_addr, 0);
 334         if (ret < 0)
 335                 goto out;
 336
 337         /* Set RX_CTL to default values with 2k buffer, and enable cactus */
 338         ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
 339         if (ret < 0)
 340                 goto out;
 341
 342         ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, 0);
 343         if (ret < 0)
 344                 goto out;
 345
 346         phy_start(priv->phydev);
 347
 348         return 0;
 349
 350 out:
 351         return ret;
 352 }
 353
 354 static int ax88772_hw_reset(struct usbnet *dev, int in_pm)
 355 {
 356         struct asix_data *data = (struct asix_data *)&dev->data;
 357         struct asix_common_private *priv = dev->driver_priv;
 358         u16 rx_ctl;
 359         int ret;
 360
 361         ret = asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_2 |
 362                               AX_GPIO_GPO2EN, 5, in_pm);
 363         if (ret < 0)
 364                 goto out;
 365
 366         ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, priv->embd_phy,
 367                              0, 0, NULL, in_pm);
 368         if (ret < 0) {
 369                 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
 370                 goto out;
 371         }
 372
 373         if (priv->embd_phy) {
 374                 ret = asix_sw_reset(dev, AX_SWRESET_IPPD, in_pm);
 375                 if (ret < 0)
 376                         goto out;
 377
 378                 usleep_range(10000, 11000);
 379
 380                 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
 381                 if (ret < 0)
 382                         goto out;
 383
 384                 msleep(60);
 385
 386                 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL,
 387                                     in_pm);
 388                 if (ret < 0)
 389                         goto out;
 390         } else {
 391                 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL,
 392                                     in_pm);
 393                 if (ret < 0)
 394                         goto out;
 395         }
 396
 397         msleep(150);
 398
 399         if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
 400                                            MII_PHYSID1))){
 401                 ret = -EIO;
 402                 goto out;
 403         }
 404
 405         ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
 406         if (ret < 0)
 407                 goto out;
 408
 409         ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
 410         if (ret < 0)
 411                 goto out;
 412
 413         ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
 414                              AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
 415                              AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
 416         if (ret < 0) {
 417                 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
 418                 goto out;
 419         }
 420
 421         /* Rewrite MAC address */
 422         ether_addr_copy(data->mac_addr, dev->net->dev_addr);
 423         ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
 424                              ETH_ALEN, data->mac_addr, in_pm);
 425         if (ret < 0)
 426                 goto out;
 427
 428         /* Set RX_CTL to default values with 2k buffer, and enable cactus */
 429         ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
 430         if (ret < 0)
 431                 goto out;
 432
 433         rx_ctl = asix_read_rx_ctl(dev, in_pm);
 434         netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
 435                    rx_ctl);
 436
 437         rx_ctl = asix_read_medium_status(dev, in_pm);
 438         netdev_dbg(dev->net,
 439                    "Medium Status is 0x%04x after all initializations\n",
 440                    rx_ctl);
 441
 442         return 0;
 443
 444 out:
 445         return ret;
 446 }
 447
 448 static int ax88772a_hw_reset(struct usbnet *dev, int in_pm)
 449 {
 450         struct asix_data *data = (struct asix_data *)&dev->data;
 451         struct asix_common_private *priv = dev->driver_priv;
 452         u16 rx_ctl, phy14h, phy15h, phy16h;
 453         u8 chipcode = 0;
 454         int ret;
 455
 456         ret = asix_write_gpio(dev, AX_GPIO_RSE, 5, in_pm);
 457         if (ret < 0)
 458                 goto out;
 459
 460         ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, priv->embd_phy |
 461                              AX_PHYSEL_SSEN, 0, 0, NULL, in_pm);
 462         if (ret < 0) {
 463                 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
 464                 goto out;
 465         }
 466         usleep_range(10000, 11000);
 467
 468         ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_IPRL, in_pm);
 469         if (ret < 0)
 470                 goto out;
 471
 472         usleep_range(10000, 11000);
 473
 474         ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
 475         if (ret < 0)
 476                 goto out;
 477
 478         msleep(160);
 479
 480         ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
 481         if (ret < 0)
 482                 goto out;
 483
 484         ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
 485         if (ret < 0)
 486                 goto out;
 487
 488         msleep(200);
 489
 490         if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
 491                                            MII_PHYSID1))) {
 492                 ret = -1;
 493                 goto out;
 494         }
 495
 496         ret = asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0,
 497                             0, 1, &chipcode, in_pm);
 498         if (ret < 0)
 499                 goto out;
 500
 501         if ((chipcode & AX_CHIPCODE_MASK) == AX_AX88772B_CHIPCODE) {
 502                 ret = asix_write_cmd(dev, AX_QCTCTRL, 0x8000, 0x8001,
 503                                      0, NULL, in_pm);
 504                 if (ret < 0) {
 505                         netdev_dbg(dev->net, "Write BQ setting failed: %d\n",
 506                                    ret);
 507                         goto out;
 508                 }
 509         } else if ((chipcode & AX_CHIPCODE_MASK) == AX_AX88772A_CHIPCODE) {
 510                 /* Check if the PHY registers have default settings */
 511                 phy14h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
 512                                              AX88772A_PHY14H);
 513                 phy15h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
 514                                              AX88772A_PHY15H);
 515                 phy16h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
 516                                              AX88772A_PHY16H);
 517
 518                 netdev_dbg(dev->net,
 519                            "772a_hw_reset: MR20=0x%x MR21=0x%x MR22=0x%x\n",
 520                            phy14h, phy15h, phy16h);
 521
 522                 /* Restore PHY registers default setting if not */
 523                 if (phy14h != AX88772A_PHY14H_DEFAULT)
 524                         asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
 525                                              AX88772A_PHY14H,
 526                                              AX88772A_PHY14H_DEFAULT);
 527                 if (phy15h != AX88772A_PHY15H_DEFAULT)
 528                         asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
 529                                              AX88772A_PHY15H,
 530                                              AX88772A_PHY15H_DEFAULT);
 531                 if (phy16h != AX88772A_PHY16H_DEFAULT)
 532                         asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
 533                                              AX88772A_PHY16H,
 534                                              AX88772A_PHY16H_DEFAULT);
 535         }
 536
 537         ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
 538                                 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
 539                                 AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
 540         if (ret < 0) {
 541                 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
 542                 goto out;
 543         }
 544
 545         /* Rewrite MAC address */
 546         memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
 547         ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
 548                                                         data->mac_addr, in_pm);
 549         if (ret < 0)
 550                 goto out;
 551
 552         /* Set RX_CTL to default values with 2k buffer, and enable cactus */
 553         ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
 554         if (ret < 0)
 555                 goto out;
 556
 557         ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
 558         if (ret < 0)
 559                 return ret;
 560
 561         /* Set RX_CTL to default values with 2k buffer, and enable cactus */
 562         ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
 563         if (ret < 0)
 564                 goto out;
 565
 566         rx_ctl = asix_read_rx_ctl(dev, in_pm);
 567         netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
 568                    rx_ctl);
 569
 570         rx_ctl = asix_read_medium_status(dev, in_pm);
 571         netdev_dbg(dev->net,
 572                    "Medium Status is 0x%04x after all initializations\n",
 573                    rx_ctl);
 574
 575         return 0;
 576
 577 out:
 578         return ret;
 579 }
 580
 581 static const struct net_device_ops ax88772_netdev_ops = {
 582         .ndo_open               = usbnet_open,
 583         .ndo_stop               = usbnet_stop,
 584         .ndo_start_xmit         = usbnet_start_xmit,
 585         .ndo_tx_timeout         = usbnet_tx_timeout,
 586         .ndo_change_mtu         = usbnet_change_mtu,
 587         .ndo_get_stats64        = dev_get_tstats64,
 588         .ndo_set_mac_address    = asix_set_mac_address,
 589         .ndo_validate_addr      = eth_validate_addr,
 590         .ndo_eth_ioctl          = phy_do_ioctl_running,
 591         .ndo_set_rx_mode        = asix_set_multicast,
 592 };
 593
 594 static void ax88772_suspend(struct usbnet *dev)
 595 {
 596         struct asix_common_private *priv = dev->driver_priv;
 597         u16 medium;
 598
 599         if (netif_running(dev->net))
 600                 phy_stop(priv->phydev);
 601
 602         /* Stop MAC operation */
 603         medium = asix_read_medium_status(dev, 1);
 604         medium &= ~AX_MEDIUM_RE;
 605         asix_write_medium_mode(dev, medium, 1);
 606
 607         netdev_dbg(dev->net, "ax88772_suspend: medium=0x%04x\n",
 608                    asix_read_medium_status(dev, 1));
 609 }
 610
 611 static int asix_suspend(struct usb_interface *intf, pm_message_t message)
 612 {
 613         struct usbnet *dev = usb_get_intfdata(intf);
 614         struct asix_common_private *priv = dev->driver_priv;
 615
 616         if (priv && priv->suspend)
 617                 priv->suspend(dev);
 618
 619         return usbnet_suspend(intf, message);
 620 }
 621
 622 static void ax88772_resume(struct usbnet *dev)
 623 {
 624         struct asix_common_private *priv = dev->driver_priv;
 625         int i;
 626
 627         for (i = 0; i < 3; i++)
 628                 if (!ax88772_hw_reset(dev, 1))
 629                         break;
 630
 631         if (netif_running(dev->net))
 632                 phy_start(priv->phydev);
 633 }
 634
 635 static void ax88772a_resume(struct usbnet *dev)
 636 {
 637         struct asix_common_private *priv = dev->driver_priv;
 638         int i;
 639
 640         for (i = 0; i < 3; i++) {
 641                 if (!ax88772a_hw_reset(dev, 1))
 642                         break;
 643         }
 644
 645         if (netif_running(dev->net))
 646                 phy_start(priv->phydev);
 647 }
 648
 649 static int asix_resume(struct usb_interface *intf)
 650 {
 651         struct usbnet *dev = usb_get_intfdata(intf);
 652         struct asix_common_private *priv = dev->driver_priv;
 653
 654         if (priv && priv->resume)
 655                 priv->resume(dev);
 656
 657         return usbnet_resume(intf);
 658 }
 659
 660 static int ax88772_init_mdio(struct usbnet *dev)
 661 {
 662         struct asix_common_private *priv = dev->driver_priv;
 663
 664         priv->mdio = devm_mdiobus_alloc(&dev->udev->dev);
 665         if (!priv->mdio)
 666                 return -ENOMEM;
 667
 668         priv->mdio->priv = dev;
 669         priv->mdio->read = &asix_mdio_bus_read;
 670         priv->mdio->write = &asix_mdio_bus_write;
 671         priv->mdio->name = "Asix MDIO Bus";
 672         /* mii bus name is usb-<usb bus number>-<usb device number> */
 673         snprintf(priv->mdio->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
 674                  dev->udev->bus->busnum, dev->udev->devnum);
 675
 676         return devm_mdiobus_register(&dev->udev->dev, priv->mdio);
 677 }
 678
 679 static int ax88772_init_phy(struct usbnet *dev)
 680 {
 681         struct asix_common_private *priv = dev->driver_priv;
 682         int ret;
 683
 684         snprintf(priv->phy_name, sizeof(priv->phy_name), PHY_ID_FMT,
 685                  priv->mdio->id, priv->phy_addr);
 686
 687         priv->phydev = phy_connect(dev->net, priv->phy_name, &asix_adjust_link,
 688                                    PHY_INTERFACE_MODE_INTERNAL);
 689         if (IS_ERR(priv->phydev)) {
 690                 netdev_err(dev->net, "Could not connect to PHY device %s\n",
 691                            priv->phy_name);
 692                 ret = PTR_ERR(priv->phydev);
 693                 return ret;
 694         }
 695
 696         phy_suspend(priv->phydev);
 697         priv->phydev->mac_managed_pm = 1;
 698
 699         phy_attached_info(priv->phydev);
 700
 701         return 0;
 702 }
 703
 704 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
 705 {
 706         u8 buf[ETH_ALEN] = {0}, chipcode = 0;
 707         struct asix_common_private *priv;
 708         int ret, i;
 709
 710         priv = devm_kzalloc(&dev->udev->dev, sizeof(*priv), GFP_KERNEL);
 711         if (!priv)
 712                 return -ENOMEM;
 713
 714         dev->driver_priv = priv;
 715
 716         usbnet_get_endpoints(dev, intf);
 717
 718         /* Maybe the boot loader passed the MAC address via device tree */
 719         if (!eth_platform_get_mac_address(&dev->udev->dev, buf)) {
 720                 netif_dbg(dev, ifup, dev->net,
 721                           "MAC address read from device tree");
 722         } else {
 723                 /* Try getting the MAC address from EEPROM */
 724                 if (dev->driver_info->data & FLAG_EEPROM_MAC) {
 725                         for (i = 0; i < (ETH_ALEN >> 1); i++) {
 726                                 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM,
 727                                                     0x04 + i, 0, 2, buf + i * 2,
 728                                                     0);
 729                                 if (ret < 0)
 730                                         break;
 731                         }
 732                 } else {
 733                         ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
 734                                             0, 0, ETH_ALEN, buf, 0);
 735                 }
 736
 737                 if (ret < 0) {
 738                         netdev_dbg(dev->net, "Failed to read MAC address: %d\n",
 739                                    ret);
 740                         return ret;
 741                 }
 742         }
 743
 744         asix_set_netdev_dev_addr(dev, buf);
 745
 746         dev->net->netdev_ops = &ax88772_netdev_ops;
 747         dev->net->ethtool_ops = &ax88772_ethtool_ops;
 748         dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
 749         dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
 750
 751         ret = asix_read_phy_addr(dev, true);
 752         if (ret < 0)
 753                 return ret;
 754
 755         priv->phy_addr = ret;
 756         priv->embd_phy = ((priv->phy_addr & 0x1f) == 0x10);
 757
 758         ret = asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0, 0, 1, &chipcode, 0);
 759         if (ret < 0) {
 760                 netdev_dbg(dev->net, "Failed to read STATMNGSTS_REG: %d\n", ret);
 761                 return ret;
 762         }
 763
 764         chipcode &= AX_CHIPCODE_MASK;
 765
 766         ret = (chipcode == AX_AX88772_CHIPCODE) ? ax88772_hw_reset(dev, 0) :
 767                                                   ax88772a_hw_reset(dev, 0);
 768
 769         if (ret < 0) {
 770                 netdev_dbg(dev->net, "Failed to reset AX88772: %d\n", ret);
 771                 return ret;
 772         }
 773
 774         /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
 775         if (dev->driver_info->flags & FLAG_FRAMING_AX) {
 776                 /* hard_mtu  is still the default - the device does not support
 777                    jumbo eth frames */
 778                 dev->rx_urb_size = 2048;
 779         }
 780
 781         priv->presvd_phy_bmcr = 0;
 782         priv->presvd_phy_advertise = 0;
 783         if (chipcode == AX_AX88772_CHIPCODE) {
 784                 priv->resume = ax88772_resume;
 785                 priv->suspend = ax88772_suspend;
 786         } else {
 787                 priv->resume = ax88772a_resume;
 788                 priv->suspend = ax88772_suspend;
 789         }
 790
 791         ret = ax88772_init_mdio(dev);
 792         if (ret)
 793                 return ret;
 794
 795         return ax88772_init_phy(dev);
 796 }
 797
 798 static int ax88772_stop(struct usbnet *dev)
 799 {
 800         struct asix_common_private *priv = dev->driver_priv;
 801
 802         phy_stop(priv->phydev);
 803
 804         return 0;
 805 }
 806
 807 static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
 808 {
 809         struct asix_common_private *priv = dev->driver_priv;
 810
 811         phy_disconnect(priv->phydev);
 812         asix_rx_fixup_common_free(dev->driver_priv);
 813 }
 814
 815 static void ax88178_unbind(struct usbnet *dev, struct usb_interface *intf)
 816 {
 817         asix_rx_fixup_common_free(dev->driver_priv);
 818         kfree(dev->driver_priv);
 819 }
 820
 821 static const struct ethtool_ops ax88178_ethtool_ops = {
 822         .get_drvinfo            = asix_get_drvinfo,
 823         .get_link               = asix_get_link,
 824         .get_msglevel           = usbnet_get_msglevel,
 825         .set_msglevel           = usbnet_set_msglevel,
 826         .get_wol                = asix_get_wol,
 827         .set_wol                = asix_set_wol,
 828         .get_eeprom_len         = asix_get_eeprom_len,
 829         .get_eeprom             = asix_get_eeprom,
 830         .set_eeprom             = asix_set_eeprom,
 831         .nway_reset             = usbnet_nway_reset,
 832         .get_link_ksettings     = usbnet_get_link_ksettings_mii,
 833         .set_link_ksettings     = usbnet_set_link_ksettings_mii,
 834 };
 835
 836 static int marvell_phy_init(struct usbnet *dev)
 837 {
 838         struct asix_data *data = (struct asix_data *)&dev->data;
 839         u16 reg;
 840
 841         netdev_dbg(dev->net, "marvell_phy_init()\n");
 842
 843         reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
 844         netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
 845
 846         asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
 847                         MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
 848
 849         if (data->ledmode) {
 850                 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
 851                         MII_MARVELL_LED_CTRL);
 852                 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
 853
 854                 reg &= 0xf8ff;
 855                 reg |= (1 + 0x0100);
 856                 asix_mdio_write(dev->net, dev->mii.phy_id,
 857                         MII_MARVELL_LED_CTRL, reg);
 858
 859                 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
 860                         MII_MARVELL_LED_CTRL);
 861                 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
 862                 reg &= 0xfc0f;
 863         }
 864
 865         return 0;
 866 }
 867
 868 static int rtl8211cl_phy_init(struct usbnet *dev)
 869 {
 870         struct asix_data *data = (struct asix_data *)&dev->data;
 871
 872         netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
 873
 874         asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
 875         asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
 876         asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
 877                 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
 878         asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
 879
 880         if (data->ledmode == 12) {
 881                 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
 882                 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
 883                 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
 884         }
 885
 886         return 0;
 887 }
 888
 889 static int marvell_led_status(struct usbnet *dev, u16 speed)
 890 {
 891         u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
 892
 893         netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
 894
 895         /* Clear out the center LED bits - 0x03F0 */
 896         reg &= 0xfc0f;
 897
 898         switch (speed) {
 899                 case SPEED_1000:
 900                         reg |= 0x03e0;
 901                         break;
 902                 case SPEED_100:
 903                         reg |= 0x03b0;
 904                         break;
 905                 default:
 906                         reg |= 0x02f0;
 907         }
 908
 909         netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
 910         asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
 911
 912         return 0;
 913 }
 914
 915 static int ax88178_reset(struct usbnet *dev)
 916 {
 917         struct asix_data *data = (struct asix_data *)&dev->data;
 918         int ret;
 919         __le16 eeprom;
 920         u8 status;
 921         int gpio0 = 0;
 922         u32 phyid;
 923
 924         ret = asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status, 0);
 925         if (ret < 0) {
 926                 netdev_dbg(dev->net, "Failed to read GPIOS: %d\n", ret);
 927                 return ret;
 928         }
 929
 930         netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
 931
 932         asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL, 0);
 933         ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom, 0);
 934         if (ret < 0) {
 935                 netdev_dbg(dev->net, "Failed to read EEPROM: %d\n", ret);
 936                 return ret;
 937         }
 938
 939         asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL, 0);
 940
 941         netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
 942
 943         if (eeprom == cpu_to_le16(0xffff)) {
 944                 data->phymode = PHY_MODE_MARVELL;
 945                 data->ledmode = 0;
 946                 gpio0 = 1;
 947         } else {
 948                 data->phymode = le16_to_cpu(eeprom) & 0x7F;
 949                 data->ledmode = le16_to_cpu(eeprom) >> 8;
 950                 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
 951         }
 952         netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
 953
 954         /* Power up external GigaPHY through AX88178 GPIO pin */
 955         asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 |
 956                         AX_GPIO_GPO1EN, 40, 0);
 957         if ((le16_to_cpu(eeprom) >> 8) != 1) {
 958                 asix_write_gpio(dev, 0x003c, 30, 0);
 959                 asix_write_gpio(dev, 0x001c, 300, 0);
 960                 asix_write_gpio(dev, 0x003c, 30, 0);
 961         } else {
 962                 netdev_dbg(dev->net, "gpio phymode == 1 path\n");
 963                 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30, 0);
 964                 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30, 0);
 965         }
 966
 967         /* Read PHYID register *AFTER* powering up PHY */
 968         phyid = asix_get_phyid(dev);
 969         netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
 970
 971         /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
 972         asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL, 0);
 973
 974         asix_sw_reset(dev, 0, 0);
 975         msleep(150);
 976
 977         asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
 978         msleep(150);
 979
 980         asix_write_rx_ctl(dev, 0, 0);
 981
 982         if (data->phymode == PHY_MODE_MARVELL) {
 983                 marvell_phy_init(dev);
 984                 msleep(60);
 985         } else if (data->phymode == PHY_MODE_RTL8211CL)
 986                 rtl8211cl_phy_init(dev);
 987
 988         asix_phy_reset(dev, BMCR_RESET | BMCR_ANENABLE);
 989         asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 990                         ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
 991         asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
 992                         ADVERTISE_1000FULL);
 993
 994         asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT, 0);
 995         mii_nway_restart(&dev->mii);
 996
 997         /* Rewrite MAC address */
 998         memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
 999         ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
1000                                                         data->mac_addr, 0);
1001         if (ret < 0)
1002                 return ret;
1003
1004         ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
1005         if (ret < 0)
1006                 return ret;
1007
1008         return 0;
1009 }
1010
1011 static int ax88178_link_reset(struct usbnet *dev)
1012 {
1013         u16 mode;
1014         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1015         struct asix_data *data = (struct asix_data *)&dev->data;
1016         u32 speed;
1017
1018         netdev_dbg(dev->net, "ax88178_link_reset()\n");
1019
1020         mii_check_media(&dev->mii, 1, 1);
1021         mii_ethtool_gset(&dev->mii, &ecmd);
1022         mode = AX88178_MEDIUM_DEFAULT;
1023         speed = ethtool_cmd_speed(&ecmd);
1024
1025         if (speed == SPEED_1000)
1026                 mode |= AX_MEDIUM_GM;
1027         else if (speed == SPEED_100)
1028                 mode |= AX_MEDIUM_PS;
1029         else
1030                 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1031
1032         mode |= AX_MEDIUM_ENCK;
1033
1034         if (ecmd.duplex == DUPLEX_FULL)
1035                 mode |= AX_MEDIUM_FD;
1036         else
1037                 mode &= ~AX_MEDIUM_FD;
1038
1039         netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1040                    speed, ecmd.duplex, mode);
1041
1042         asix_write_medium_mode(dev, mode, 0);
1043
1044         if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1045                 marvell_led_status(dev, speed);
1046
1047         return 0;
1048 }
1049
1050 static void ax88178_set_mfb(struct usbnet *dev)
1051 {
1052         u16 mfb = AX_RX_CTL_MFB_16384;
1053         u16 rxctl;
1054         u16 medium;
1055         int old_rx_urb_size = dev->rx_urb_size;
1056
1057         if (dev->hard_mtu < 2048) {
1058                 dev->rx_urb_size = 2048;
1059                 mfb = AX_RX_CTL_MFB_2048;
1060         } else if (dev->hard_mtu < 4096) {
1061                 dev->rx_urb_size = 4096;
1062                 mfb = AX_RX_CTL_MFB_4096;
1063         } else if (dev->hard_mtu < 8192) {
1064                 dev->rx_urb_size = 8192;
1065                 mfb = AX_RX_CTL_MFB_8192;
1066         } else if (dev->hard_mtu < 16384) {
1067                 dev->rx_urb_size = 16384;
1068                 mfb = AX_RX_CTL_MFB_16384;
1069         }
1070
1071         rxctl = asix_read_rx_ctl(dev, 0);
1072         asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb, 0);
1073
1074         medium = asix_read_medium_status(dev, 0);
1075         if (dev->net->mtu > 1500)
1076                 medium |= AX_MEDIUM_JFE;
1077         else
1078                 medium &= ~AX_MEDIUM_JFE;
1079         asix_write_medium_mode(dev, medium, 0);
1080
1081         if (dev->rx_urb_size > old_rx_urb_size)
1082                 usbnet_unlink_rx_urbs(dev);
1083 }
1084
1085 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1086 {
1087         struct usbnet *dev = netdev_priv(net);
1088         int ll_mtu = new_mtu + net->hard_header_len + 4;
1089
1090         netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1091
1092         if ((ll_mtu % dev->maxpacket) == 0)
1093                 return -EDOM;
1094
1095         net->mtu = new_mtu;
1096         dev->hard_mtu = net->mtu + net->hard_header_len;
1097         ax88178_set_mfb(dev);
1098
1099         /* max qlen depend on hard_mtu and rx_urb_size */
1100         usbnet_update_max_qlen(dev);
1101
1102         return 0;
1103 }
1104
1105 static const struct net_device_ops ax88178_netdev_ops = {
1106         .ndo_open               = usbnet_open,
1107         .ndo_stop               = usbnet_stop,
1108         .ndo_start_xmit         = usbnet_start_xmit,
1109         .ndo_tx_timeout         = usbnet_tx_timeout,
1110         .ndo_get_stats64        = dev_get_tstats64,
1111         .ndo_set_mac_address    = asix_set_mac_address,
1112         .ndo_validate_addr      = eth_validate_addr,
1113         .ndo_set_rx_mode        = asix_set_multicast,
1114         .ndo_eth_ioctl          = asix_ioctl,
1115         .ndo_change_mtu         = ax88178_change_mtu,
1116 };
1117
1118 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1119 {
1120         int ret;
1121         u8 buf[ETH_ALEN] = {0};
1122
1123         usbnet_get_endpoints(dev,intf);
1124
1125         /* Get the MAC address */
1126         ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);
1127         if (ret < 0) {
1128                 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
1129                 return ret;
1130         }
1131
1132         asix_set_netdev_dev_addr(dev, buf);
1133
1134         /* Initialize MII structure */
1135         dev->mii.dev = dev->net;
1136         dev->mii.mdio_read = asix_mdio_read;
1137         dev->mii.mdio_write = asix_mdio_write;
1138         dev->mii.phy_id_mask = 0x1f;
1139         dev->mii.reg_num_mask = 0xff;
1140         dev->mii.supports_gmii = 1;
1141
1142         dev->mii.phy_id = asix_read_phy_addr(dev, true);
1143         if (dev->mii.phy_id < 0)
1144                 return dev->mii.phy_id;
1145
1146         dev->net->netdev_ops = &ax88178_netdev_ops;
1147         dev->net->ethtool_ops = &ax88178_ethtool_ops;
1148         dev->net->max_mtu = 16384 - (dev->net->hard_header_len + 4);
1149
1150         /* Blink LEDS so users know driver saw dongle */
1151         asix_sw_reset(dev, 0, 0);
1152         msleep(150);
1153
1154         asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
1155         msleep(150);
1156
1157         /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1158         if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1159                 /* hard_mtu  is still the default - the device does not support
1160                    jumbo eth frames */
1161                 dev->rx_urb_size = 2048;
1162         }
1163
1164         dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
1165         if (!dev->driver_priv)
1166                         return -ENOMEM;
1167
1168         return 0;
1169 }
1170
1171 static const struct driver_info ax8817x_info = {
1172         .description = "ASIX AX8817x USB 2.0 Ethernet",
1173         .bind = ax88172_bind,
1174         .status = asix_status,
1175         .link_reset = ax88172_link_reset,
1176         .reset = ax88172_link_reset,
1177         .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1178         .data = 0x00130103,
1179 };
1180
1181 static const struct driver_info dlink_dub_e100_info = {
1182         .description = "DLink DUB-E100 USB Ethernet",
1183         .bind = ax88172_bind,
1184         .status = asix_status,
1185         .link_reset = ax88172_link_reset,
1186         .reset = ax88172_link_reset,
1187         .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1188         .data = 0x009f9d9f,
1189 };
1190
1191 static const struct driver_info netgear_fa120_info = {
1192         .description = "Netgear FA-120 USB Ethernet",
1193         .bind = ax88172_bind,
1194         .status = asix_status,
1195         .link_reset = ax88172_link_reset,
1196         .reset = ax88172_link_reset,
1197         .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1198         .data = 0x00130103,
1199 };
1200
1201 static const struct driver_info hawking_uf200_info = {
1202         .description = "Hawking UF200 USB Ethernet",
1203         .bind = ax88172_bind,
1204         .status = asix_status,
1205         .link_reset = ax88172_link_reset,
1206         .reset = ax88172_link_reset,
1207         .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1208         .data = 0x001f1d1f,
1209 };
1210
1211 static const struct driver_info ax88772_info = {
1212         .description = "ASIX AX88772 USB 2.0 Ethernet",
1213         .bind = ax88772_bind,
1214         .unbind = ax88772_unbind,
1215         .status = asix_status,
1216         .reset = ax88772_reset,
1217         .stop = ax88772_stop,
1218         .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
1219         .rx_fixup = asix_rx_fixup_common,
1220         .tx_fixup = asix_tx_fixup,
1221 };
1222
1223 static const struct driver_info ax88772b_info = {
1224         .description = "ASIX AX88772B USB 2.0 Ethernet",
1225         .bind = ax88772_bind,
1226         .unbind = ax88772_unbind,
1227         .status = asix_status,
1228         .reset = ax88772_reset,
1229         .stop = ax88772_stop,
1230         .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1231                  FLAG_MULTI_PACKET,
1232         .rx_fixup = asix_rx_fixup_common,
1233         .tx_fixup = asix_tx_fixup,
1234         .data = FLAG_EEPROM_MAC,
1235 };
1236
1237 static const struct driver_info ax88178_info = {
1238         .description = "ASIX AX88178 USB 2.0 Ethernet",
1239         .bind = ax88178_bind,
1240         .unbind = ax88178_unbind,
1241         .status = asix_status,
1242         .link_reset = ax88178_link_reset,
1243         .reset = ax88178_reset,
1244         .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1245                  FLAG_MULTI_PACKET,
1246         .rx_fixup = asix_rx_fixup_common,
1247         .tx_fixup = asix_tx_fixup,
1248 };
1249
1250 /*
1251  * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
1252  * no-name packaging.
1253  * USB device strings are:
1254  *   1: Manufacturer: USBLINK
1255  *   2: Product: HG20F9 USB2.0
1256  *   3: Serial: 000003
1257  * Appears to be compatible with Asix 88772B.
1258  */
1259 static const struct driver_info hg20f9_info = {
1260         .description = "HG20F9 USB 2.0 Ethernet",
1261         .bind = ax88772_bind,
1262         .unbind = ax88772_unbind,
1263         .status = asix_status,
1264         .reset = ax88772_reset,
1265         .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1266                  FLAG_MULTI_PACKET,
1267         .rx_fixup = asix_rx_fixup_common,
1268         .tx_fixup = asix_tx_fixup,
1269         .data = FLAG_EEPROM_MAC,
1270 };
1271
1272 static const struct usb_device_id       products [] = {
1273 {
1274         // Linksys USB200M
1275         USB_DEVICE (0x077b, 0x2226),
1276         .driver_info =  (unsigned long) &ax8817x_info,
1277 }, {
1278         // Netgear FA120
1279         USB_DEVICE (0x0846, 0x1040),
1280         .driver_info =  (unsigned long) &netgear_fa120_info,
1281 }, {
1282         // DLink DUB-E100
1283         USB_DEVICE (0x2001, 0x1a00),
1284         .driver_info =  (unsigned long) &dlink_dub_e100_info,
1285 }, {
1286         // Intellinet, ST Lab USB Ethernet
1287         USB_DEVICE (0x0b95, 0x1720),
1288         .driver_info =  (unsigned long) &ax8817x_info,
1289 }, {
1290         // Hawking UF200, TrendNet TU2-ET100
1291         USB_DEVICE (0x07b8, 0x420a),
1292         .driver_info =  (unsigned long) &hawking_uf200_info,
1293 }, {
1294         // Billionton Systems, USB2AR
1295         USB_DEVICE (0x08dd, 0x90ff),
1296         .driver_info =  (unsigned long) &ax8817x_info,
1297 }, {
1298         // Billionton Systems, GUSB2AM-1G-B
1299         USB_DEVICE(0x08dd, 0x0114),
1300         .driver_info =  (unsigned long) &ax88178_info,
1301 }, {
1302         // ATEN UC210T
1303         USB_DEVICE (0x0557, 0x2009),
1304         .driver_info =  (unsigned long) &ax8817x_info,
1305 }, {
1306         // Buffalo LUA-U2-KTX
1307         USB_DEVICE (0x0411, 0x003d),
1308         .driver_info =  (unsigned long) &ax8817x_info,
1309 }, {
1310         // Buffalo LUA-U2-GT 10/100/1000
1311         USB_DEVICE (0x0411, 0x006e),
1312         .driver_info =  (unsigned long) &ax88178_info,
1313 }, {
1314         // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1315         USB_DEVICE (0x6189, 0x182d),
1316         .driver_info =  (unsigned long) &ax8817x_info,
1317 }, {
1318         // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1319         USB_DEVICE (0x0df6, 0x0056),
1320         .driver_info =  (unsigned long) &ax88178_info,
1321 }, {
1322         // Sitecom LN-028 "USB 2.0 10/100/1000 Ethernet adapter"
1323         USB_DEVICE (0x0df6, 0x061c),
1324         .driver_info =  (unsigned long) &ax88178_info,
1325 }, {
1326         // corega FEther USB2-TX
1327         USB_DEVICE (0x07aa, 0x0017),
1328         .driver_info =  (unsigned long) &ax8817x_info,
1329 }, {
1330         // Surecom EP-1427X-2
1331         USB_DEVICE (0x1189, 0x0893),
1332         .driver_info = (unsigned long) &ax8817x_info,
1333 }, {
1334         // goodway corp usb gwusb2e
1335         USB_DEVICE (0x1631, 0x6200),
1336         .driver_info = (unsigned long) &ax8817x_info,
1337 }, {
1338         // JVC MP-PRX1 Port Replicator
1339         USB_DEVICE (0x04f1, 0x3008),
1340         .driver_info = (unsigned long) &ax8817x_info,
1341 }, {
1342         // Lenovo U2L100P 10/100
1343         USB_DEVICE (0x17ef, 0x7203),
1344         .driver_info = (unsigned long)&ax88772b_info,
1345 }, {
1346         // ASIX AX88772B 10/100
1347         USB_DEVICE (0x0b95, 0x772b),
1348         .driver_info = (unsigned long) &ax88772b_info,
1349 }, {
1350         // ASIX AX88772 10/100
1351         USB_DEVICE (0x0b95, 0x7720),
1352         .driver_info = (unsigned long) &ax88772_info,
1353 }, {
1354         // ASIX AX88178 10/100/1000
1355         USB_DEVICE (0x0b95, 0x1780),
1356         .driver_info = (unsigned long) &ax88178_info,
1357 }, {
1358         // Logitec LAN-GTJ/U2A
1359         USB_DEVICE (0x0789, 0x0160),
1360         .driver_info = (unsigned long) &ax88178_info,
1361 }, {
1362         // Linksys USB200M Rev 2
1363         USB_DEVICE (0x13b1, 0x0018),
1364         .driver_info = (unsigned long) &ax88772_info,
1365 }, {
1366         // 0Q0 cable ethernet
1367         USB_DEVICE (0x1557, 0x7720),
1368         .driver_info = (unsigned long) &ax88772_info,
1369 }, {
1370         // DLink DUB-E100 H/W Ver B1
1371         USB_DEVICE (0x07d1, 0x3c05),
1372         .driver_info = (unsigned long) &ax88772_info,
1373 }, {
1374         // DLink DUB-E100 H/W Ver B1 Alternate
1375         USB_DEVICE (0x2001, 0x3c05),
1376         .driver_info = (unsigned long) &ax88772_info,
1377 }, {
1378        // DLink DUB-E100 H/W Ver C1
1379        USB_DEVICE (0x2001, 0x1a02),
1380        .driver_info = (unsigned long) &ax88772_info,
1381 }, {
1382         // Linksys USB1000
1383         USB_DEVICE (0x1737, 0x0039),
1384         .driver_info = (unsigned long) &ax88178_info,
1385 }, {
1386         // IO-DATA ETG-US2
1387         USB_DEVICE (0x04bb, 0x0930),
1388         .driver_info = (unsigned long) &ax88178_info,
1389 }, {
1390         // Belkin F5D5055
1391         USB_DEVICE(0x050d, 0x5055),
1392         .driver_info = (unsigned long) &ax88178_info,
1393 }, {
1394         // Apple USB Ethernet Adapter
1395         USB_DEVICE(0x05ac, 0x1402),
1396         .driver_info = (unsigned long) &ax88772_info,
1397 }, {
1398         // Cables-to-Go USB Ethernet Adapter
1399         USB_DEVICE(0x0b95, 0x772a),
1400         .driver_info = (unsigned long) &ax88772_info,
1401 }, {
1402         // ABOCOM for pci
1403         USB_DEVICE(0x14ea, 0xab11),
1404         .driver_info = (unsigned long) &ax88178_info,
1405 }, {
1406         // ASIX 88772a
1407         USB_DEVICE(0x0db0, 0xa877),
1408         .driver_info = (unsigned long) &ax88772_info,
1409 }, {
1410         // Asus USB Ethernet Adapter
1411         USB_DEVICE (0x0b95, 0x7e2b),
1412         .driver_info = (unsigned long)&ax88772b_info,
1413 }, {
1414         /* ASIX 88172a demo board */
1415         USB_DEVICE(0x0b95, 0x172a),
1416         .driver_info = (unsigned long) &ax88172a_info,
1417 }, {
1418         /*
1419          * USBLINK HG20F9 "USB 2.0 LAN"
1420          * Appears to have gazumped Linksys's manufacturer ID but
1421          * doesn't (yet) conflict with any known Linksys product.
1422          */
1423         USB_DEVICE(0x066b, 0x20f9),
1424         .driver_info = (unsigned long) &hg20f9_info,
1425 },
1426         { },            // END
1427 };
1428 MODULE_DEVICE_TABLE(usb, products);
1429
1430 static struct usb_driver asix_driver = {
1431         .name =         DRIVER_NAME,
1432         .id_table =     products,
1433         .probe =        usbnet_probe,
1434         .suspend =      asix_suspend,
1435         .resume =       asix_resume,
1436         .reset_resume = asix_resume,
1437         .disconnect =   usbnet_disconnect,
1438         .supports_autosuspend = 1,
1439         .disable_hub_initiated_lpm = 1,
1440 };
1441
1442 module_usb_driver(asix_driver);
1443
1444 MODULE_AUTHOR("David Hollis");
1445 MODULE_VERSION(DRIVER_VERSION);
1446 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1447 MODULE_LICENSE("GPL");
1448