drivers/net/sungem_phy.c

   1 /*
   2  * PHY drivers for the sungem ethernet driver.
   3  *
   4  * This file could be shared with other drivers.
   5  *
   6  * (c) 2002-2007, Benjamin Herrenscmidt (benh@kernel.crashing.org)
   7  *
   8  * TODO:
   9  *  - Add support for PHYs that provide an IRQ line
  10  *  - Eventually moved the entire polling state machine in
  11  *    there (out of the eth driver), so that it can easily be
  12  *    skipped on PHYs that implement it in hardware.
  13  *  - On LXT971 & BCM5201, Apple uses some chip specific regs
  14  *    to read the link status. Figure out why and if it makes
  15  *    sense to do the same (magic aneg ?)
  16  *  - Apple has some additional power management code for some
  17  *    Broadcom PHYs that they "hide" from the OpenSource version
  18  *    of darwin, still need to reverse engineer that
  19  */
  20
  21
  22 #include <linux/module.h>
  23
  24 #include <linux/kernel.h>
  25 #include <linux/types.h>
  26 #include <linux/netdevice.h>
  27 #include <linux/etherdevice.h>
  28 #include <linux/mii.h>
  29 #include <linux/ethtool.h>
  30 #include <linux/delay.h>
  31
  32 #ifdef CONFIG_PPC_PMAC
  33 #include <asm/prom.h>
  34 #endif
  35
  36 #include <linux/sungem_phy.h>
  37
  38 /* Link modes of the BCM5400 PHY */
  39 static const int phy_BCM5400_link_table[8][3] = {
  40         { 0, 0, 0 },    /* No link */
  41         { 0, 0, 0 },    /* 10BT Half Duplex */
  42         { 1, 0, 0 },    /* 10BT Full Duplex */
  43         { 0, 1, 0 },    /* 100BT Half Duplex */
  44         { 0, 1, 0 },    /* 100BT Half Duplex */
  45         { 1, 1, 0 },    /* 100BT Full Duplex*/
  46         { 1, 0, 1 },    /* 1000BT */
  47         { 1, 0, 1 },    /* 1000BT */
  48 };
  49
  50 static inline int __sungem_phy_read(struct mii_phy* phy, int id, int reg)
  51 {
  52         return phy->mdio_read(phy->dev, id, reg);
  53 }
  54
  55 static inline void __sungem_phy_write(struct mii_phy* phy, int id, int reg, int val)
  56 {
  57         phy->mdio_write(phy->dev, id, reg, val);
  58 }
  59
  60 static inline int sungem_phy_read(struct mii_phy* phy, int reg)
  61 {
  62         return phy->mdio_read(phy->dev, phy->mii_id, reg);
  63 }
  64
  65 static inline void sungem_phy_write(struct mii_phy* phy, int reg, int val)
  66 {
  67         phy->mdio_write(phy->dev, phy->mii_id, reg, val);
  68 }
  69
  70 static int reset_one_mii_phy(struct mii_phy* phy, int phy_id)
  71 {
  72         u16 val;
  73         int limit = 10000;
  74
  75         val = __sungem_phy_read(phy, phy_id, MII_BMCR);
  76         val &= ~(BMCR_ISOLATE | BMCR_PDOWN);
  77         val |= BMCR_RESET;
  78         __sungem_phy_write(phy, phy_id, MII_BMCR, val);
  79
  80         udelay(100);
  81
  82         while (--limit) {
  83                 val = __sungem_phy_read(phy, phy_id, MII_BMCR);
  84                 if ((val & BMCR_RESET) == 0)
  85                         break;
  86                 udelay(10);
  87         }
  88         if ((val & BMCR_ISOLATE) && limit > 0)
  89                 __sungem_phy_write(phy, phy_id, MII_BMCR, val & ~BMCR_ISOLATE);
  90
  91         return limit <= 0;
  92 }
  93
  94 static int bcm5201_init(struct mii_phy* phy)
  95 {
  96         u16 data;
  97
  98         data = sungem_phy_read(phy, MII_BCM5201_MULTIPHY);
  99         data &= ~MII_BCM5201_MULTIPHY_SUPERISOLATE;
 100         sungem_phy_write(phy, MII_BCM5201_MULTIPHY, data);
 101
 102         sungem_phy_write(phy, MII_BCM5201_INTERRUPT, 0);
 103
 104         return 0;
 105 }
 106
 107 static int bcm5201_suspend(struct mii_phy* phy)
 108 {
 109         sungem_phy_write(phy, MII_BCM5201_INTERRUPT, 0);
 110         sungem_phy_write(phy, MII_BCM5201_MULTIPHY, MII_BCM5201_MULTIPHY_SUPERISOLATE);
 111
 112         return 0;
 113 }
 114
 115 static int bcm5221_init(struct mii_phy* phy)
 116 {
 117         u16 data;
 118
 119         data = sungem_phy_read(phy, MII_BCM5221_TEST);
 120         sungem_phy_write(phy, MII_BCM5221_TEST,
 121                 data | MII_BCM5221_TEST_ENABLE_SHADOWS);
 122
 123         data = sungem_phy_read(phy, MII_BCM5221_SHDOW_AUX_STAT2);
 124         sungem_phy_write(phy, MII_BCM5221_SHDOW_AUX_STAT2,
 125                 data | MII_BCM5221_SHDOW_AUX_STAT2_APD);
 126
 127         data = sungem_phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4);
 128         sungem_phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4,
 129                 data | MII_BCM5221_SHDOW_AUX_MODE4_CLKLOPWR);
 130
 131         data = sungem_phy_read(phy, MII_BCM5221_TEST);
 132         sungem_phy_write(phy, MII_BCM5221_TEST,
 133                 data & ~MII_BCM5221_TEST_ENABLE_SHADOWS);
 134
 135         return 0;
 136 }
 137
 138 static int bcm5221_suspend(struct mii_phy* phy)
 139 {
 140         u16 data;
 141
 142         data = sungem_phy_read(phy, MII_BCM5221_TEST);
 143         sungem_phy_write(phy, MII_BCM5221_TEST,
 144                 data | MII_BCM5221_TEST_ENABLE_SHADOWS);
 145
 146         data = sungem_phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4);
 147         sungem_phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4,
 148                   data | MII_BCM5221_SHDOW_AUX_MODE4_IDDQMODE);
 149
 150         return 0;
 151 }
 152
 153 static int bcm5241_init(struct mii_phy* phy)
 154 {
 155         u16 data;
 156
 157         data = sungem_phy_read(phy, MII_BCM5221_TEST);
 158         sungem_phy_write(phy, MII_BCM5221_TEST,
 159                 data | MII_BCM5221_TEST_ENABLE_SHADOWS);
 160
 161         data = sungem_phy_read(phy, MII_BCM5221_SHDOW_AUX_STAT2);
 162         sungem_phy_write(phy, MII_BCM5221_SHDOW_AUX_STAT2,
 163                 data | MII_BCM5221_SHDOW_AUX_STAT2_APD);
 164
 165         data = sungem_phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4);
 166         sungem_phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4,
 167                 data & ~MII_BCM5241_SHDOW_AUX_MODE4_STANDBYPWR);
 168
 169         data = sungem_phy_read(phy, MII_BCM5221_TEST);
 170         sungem_phy_write(phy, MII_BCM5221_TEST,
 171                 data & ~MII_BCM5221_TEST_ENABLE_SHADOWS);
 172
 173         return 0;
 174 }
 175
 176 static int bcm5241_suspend(struct mii_phy* phy)
 177 {
 178         u16 data;
 179
 180         data = sungem_phy_read(phy, MII_BCM5221_TEST);
 181         sungem_phy_write(phy, MII_BCM5221_TEST,
 182                 data | MII_BCM5221_TEST_ENABLE_SHADOWS);
 183
 184         data = sungem_phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4);
 185         sungem_phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4,
 186                   data | MII_BCM5241_SHDOW_AUX_MODE4_STANDBYPWR);
 187
 188         return 0;
 189 }
 190
 191 static int bcm5400_init(struct mii_phy* phy)
 192 {
 193         u16 data;
 194
 195         /* Configure for gigabit full duplex */
 196         data = sungem_phy_read(phy, MII_BCM5400_AUXCONTROL);
 197         data |= MII_BCM5400_AUXCONTROL_PWR10BASET;
 198         sungem_phy_write(phy, MII_BCM5400_AUXCONTROL, data);
 199
 200         data = sungem_phy_read(phy, MII_BCM5400_GB_CONTROL);
 201         data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP;
 202         sungem_phy_write(phy, MII_BCM5400_GB_CONTROL, data);
 203
 204         udelay(100);
 205
 206         /* Reset and configure cascaded 10/100 PHY */
 207         (void)reset_one_mii_phy(phy, 0x1f);
 208
 209         data = __sungem_phy_read(phy, 0x1f, MII_BCM5201_MULTIPHY);
 210         data |= MII_BCM5201_MULTIPHY_SERIALMODE;
 211         __sungem_phy_write(phy, 0x1f, MII_BCM5201_MULTIPHY, data);
 212
 213         data = sungem_phy_read(phy, MII_BCM5400_AUXCONTROL);
 214         data &= ~MII_BCM5400_AUXCONTROL_PWR10BASET;
 215         sungem_phy_write(phy, MII_BCM5400_AUXCONTROL, data);
 216
 217         return 0;
 218 }
 219
 220 static int bcm5400_suspend(struct mii_phy* phy)
 221 {
 222 #if 0 /* Commented out in Darwin... someone has those dawn docs ? */
 223         sungem_phy_write(phy, MII_BMCR, BMCR_PDOWN);
 224 #endif
 225         return 0;
 226 }
 227
 228 static int bcm5401_init(struct mii_phy* phy)
 229 {
 230         u16 data;
 231         int rev;
 232
 233         rev = sungem_phy_read(phy, MII_PHYSID2) & 0x000f;
 234         if (rev == 0 || rev == 3) {
 235                 /* Some revisions of 5401 appear to need this
 236                  * initialisation sequence to disable, according
 237                  * to OF, "tap power management"
 238                  *
 239                  * WARNING ! OF and Darwin don't agree on the
 240                  * register addresses. OF seem to interpret the
 241                  * register numbers below as decimal
 242                  *
 243                  * Note: This should (and does) match tg3_init_5401phy_dsp
 244                  *       in the tg3.c driver. -DaveM
 245                  */
 246                 sungem_phy_write(phy, 0x18, 0x0c20);
 247                 sungem_phy_write(phy, 0x17, 0x0012);
 248                 sungem_phy_write(phy, 0x15, 0x1804);
 249                 sungem_phy_write(phy, 0x17, 0x0013);
 250                 sungem_phy_write(phy, 0x15, 0x1204);
 251                 sungem_phy_write(phy, 0x17, 0x8006);
 252                 sungem_phy_write(phy, 0x15, 0x0132);
 253                 sungem_phy_write(phy, 0x17, 0x8006);
 254                 sungem_phy_write(phy, 0x15, 0x0232);
 255                 sungem_phy_write(phy, 0x17, 0x201f);
 256                 sungem_phy_write(phy, 0x15, 0x0a20);
 257         }
 258
 259         /* Configure for gigabit full duplex */
 260         data = sungem_phy_read(phy, MII_BCM5400_GB_CONTROL);
 261         data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP;
 262         sungem_phy_write(phy, MII_BCM5400_GB_CONTROL, data);
 263
 264         udelay(10);
 265
 266         /* Reset and configure cascaded 10/100 PHY */
 267         (void)reset_one_mii_phy(phy, 0x1f);
 268
 269         data = __sungem_phy_read(phy, 0x1f, MII_BCM5201_MULTIPHY);
 270         data |= MII_BCM5201_MULTIPHY_SERIALMODE;
 271         __sungem_phy_write(phy, 0x1f, MII_BCM5201_MULTIPHY, data);
 272
 273         return 0;
 274 }
 275
 276 static int bcm5401_suspend(struct mii_phy* phy)
 277 {
 278 #if 0 /* Commented out in Darwin... someone has those dawn docs ? */
 279         sungem_phy_write(phy, MII_BMCR, BMCR_PDOWN);
 280 #endif
 281         return 0;
 282 }
 283
 284 static int bcm5411_init(struct mii_phy* phy)
 285 {
 286         u16 data;
 287
 288         /* Here's some more Apple black magic to setup
 289          * some voltage stuffs.
 290          */
 291         sungem_phy_write(phy, 0x1c, 0x8c23);
 292         sungem_phy_write(phy, 0x1c, 0x8ca3);
 293         sungem_phy_write(phy, 0x1c, 0x8c23);
 294
 295         /* Here, Apple seems to want to reset it, do
 296          * it as well
 297          */
 298         sungem_phy_write(phy, MII_BMCR, BMCR_RESET);
 299         sungem_phy_write(phy, MII_BMCR, 0x1340);
 300
 301         data = sungem_phy_read(phy, MII_BCM5400_GB_CONTROL);
 302         data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP;
 303         sungem_phy_write(phy, MII_BCM5400_GB_CONTROL, data);
 304
 305         udelay(10);
 306
 307         /* Reset and configure cascaded 10/100 PHY */
 308         (void)reset_one_mii_phy(phy, 0x1f);
 309
 310         return 0;
 311 }
 312
 313 static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise)
 314 {
 315         u16 ctl, adv;
 316
 317         phy->autoneg = 1;
 318         phy->speed = SPEED_10;
 319         phy->duplex = DUPLEX_HALF;
 320         phy->pause = 0;
 321         phy->advertising = advertise;
 322
 323         /* Setup standard advertise */
 324         adv = sungem_phy_read(phy, MII_ADVERTISE);
 325         adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
 326         if (advertise & ADVERTISED_10baseT_Half)
 327                 adv |= ADVERTISE_10HALF;
 328         if (advertise & ADVERTISED_10baseT_Full)
 329                 adv |= ADVERTISE_10FULL;
 330         if (advertise & ADVERTISED_100baseT_Half)
 331                 adv |= ADVERTISE_100HALF;
 332         if (advertise & ADVERTISED_100baseT_Full)
 333                 adv |= ADVERTISE_100FULL;
 334         sungem_phy_write(phy, MII_ADVERTISE, adv);
 335
 336         /* Start/Restart aneg */
 337         ctl = sungem_phy_read(phy, MII_BMCR);
 338         ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
 339         sungem_phy_write(phy, MII_BMCR, ctl);
 340
 341         return 0;
 342 }
 343
 344 static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd)
 345 {
 346         u16 ctl;
 347
 348         phy->autoneg = 0;
 349         phy->speed = speed;
 350         phy->duplex = fd;
 351         phy->pause = 0;
 352
 353         ctl = sungem_phy_read(phy, MII_BMCR);
 354         ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_ANENABLE);
 355
 356         /* First reset the PHY */
 357         sungem_phy_write(phy, MII_BMCR, ctl | BMCR_RESET);
 358
 359         /* Select speed & duplex */
 360         switch(speed) {
 361         case SPEED_10:
 362                 break;
 363         case SPEED_100:
 364                 ctl |= BMCR_SPEED100;
 365                 break;
 366         case SPEED_1000:
 367         default:
 368                 return -EINVAL;
 369         }
 370         if (fd == DUPLEX_FULL)
 371                 ctl |= BMCR_FULLDPLX;
 372         sungem_phy_write(phy, MII_BMCR, ctl);
 373
 374         return 0;
 375 }
 376
 377 static int genmii_poll_link(struct mii_phy *phy)
 378 {
 379         u16 status;
 380
 381         (void)sungem_phy_read(phy, MII_BMSR);
 382         status = sungem_phy_read(phy, MII_BMSR);
 383         if ((status & BMSR_LSTATUS) == 0)
 384                 return 0;
 385         if (phy->autoneg && !(status & BMSR_ANEGCOMPLETE))
 386                 return 0;
 387         return 1;
 388 }
 389
 390 static int genmii_read_link(struct mii_phy *phy)
 391 {
 392         u16 lpa;
 393
 394         if (phy->autoneg) {
 395                 lpa = sungem_phy_read(phy, MII_LPA);
 396
 397                 if (lpa & (LPA_10FULL | LPA_100FULL))
 398                         phy->duplex = DUPLEX_FULL;
 399                 else
 400                         phy->duplex = DUPLEX_HALF;
 401                 if (lpa & (LPA_100FULL | LPA_100HALF))
 402                         phy->speed = SPEED_100;
 403                 else
 404                         phy->speed = SPEED_10;
 405                 phy->pause = 0;
 406         }
 407         /* On non-aneg, we assume what we put in BMCR is the speed,
 408          * though magic-aneg shouldn't prevent this case from occurring
 409          */
 410
 411          return 0;
 412 }
 413
 414 static int generic_suspend(struct mii_phy* phy)
 415 {
 416         sungem_phy_write(phy, MII_BMCR, BMCR_PDOWN);
 417
 418         return 0;
 419 }
 420
 421 static int bcm5421_init(struct mii_phy* phy)
 422 {
 423         u16 data;
 424         unsigned int id;
 425
 426         id = (sungem_phy_read(phy, MII_PHYSID1) << 16 | sungem_phy_read(phy, MII_PHYSID2));
 427
 428         /* Revision 0 of 5421 needs some fixups */
 429         if (id == 0x002060e0) {
 430                 /* This is borrowed from MacOS
 431                  */
 432                 sungem_phy_write(phy, 0x18, 0x1007);
 433                 data = sungem_phy_read(phy, 0x18);
 434                 sungem_phy_write(phy, 0x18, data | 0x0400);
 435                 sungem_phy_write(phy, 0x18, 0x0007);
 436                 data = sungem_phy_read(phy, 0x18);
 437                 sungem_phy_write(phy, 0x18, data | 0x0800);
 438                 sungem_phy_write(phy, 0x17, 0x000a);
 439                 data = sungem_phy_read(phy, 0x15);
 440                 sungem_phy_write(phy, 0x15, data | 0x0200);
 441         }
 442
 443         /* Pick up some init code from OF for K2 version */
 444         if ((id & 0xfffffff0) == 0x002062e0) {
 445                 sungem_phy_write(phy, 4, 0x01e1);
 446                 sungem_phy_write(phy, 9, 0x0300);
 447         }
 448
 449         /* Check if we can enable automatic low power */
 450 #ifdef CONFIG_PPC_PMAC
 451         if (phy->platform_data) {
 452                 struct device_node *np = of_get_parent(phy->platform_data);
 453                 int can_low_power = 1;
 454                 if (np == NULL || of_get_property(np, "no-autolowpower", NULL))
 455                         can_low_power = 0;
 456                 of_node_put(np);
 457                 if (can_low_power) {
 458                         /* Enable automatic low-power */
 459                         sungem_phy_write(phy, 0x1c, 0x9002);
 460                         sungem_phy_write(phy, 0x1c, 0xa821);
 461                         sungem_phy_write(phy, 0x1c, 0x941d);
 462                 }
 463         }
 464 #endif /* CONFIG_PPC_PMAC */
 465
 466         return 0;
 467 }
 468
 469 static int bcm54xx_setup_aneg(struct mii_phy *phy, u32 advertise)
 470 {
 471         u16 ctl, adv;
 472
 473         phy->autoneg = 1;
 474         phy->speed = SPEED_10;
 475         phy->duplex = DUPLEX_HALF;
 476         phy->pause = 0;
 477         phy->advertising = advertise;
 478
 479         /* Setup standard advertise */
 480         adv = sungem_phy_read(phy, MII_ADVERTISE);
 481         adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
 482         if (advertise & ADVERTISED_10baseT_Half)
 483                 adv |= ADVERTISE_10HALF;
 484         if (advertise & ADVERTISED_10baseT_Full)
 485                 adv |= ADVERTISE_10FULL;
 486         if (advertise & ADVERTISED_100baseT_Half)
 487                 adv |= ADVERTISE_100HALF;
 488         if (advertise & ADVERTISED_100baseT_Full)
 489                 adv |= ADVERTISE_100FULL;
 490         if (advertise & ADVERTISED_Pause)
 491                 adv |= ADVERTISE_PAUSE_CAP;
 492         if (advertise & ADVERTISED_Asym_Pause)
 493                 adv |= ADVERTISE_PAUSE_ASYM;
 494         sungem_phy_write(phy, MII_ADVERTISE, adv);
 495
 496         /* Setup 1000BT advertise */
 497         adv = sungem_phy_read(phy, MII_1000BASETCONTROL);
 498         adv &= ~(MII_1000BASETCONTROL_FULLDUPLEXCAP|MII_1000BASETCONTROL_HALFDUPLEXCAP);
 499         if (advertise & SUPPORTED_1000baseT_Half)
 500                 adv |= MII_1000BASETCONTROL_HALFDUPLEXCAP;
 501         if (advertise & SUPPORTED_1000baseT_Full)
 502                 adv |= MII_1000BASETCONTROL_FULLDUPLEXCAP;
 503         sungem_phy_write(phy, MII_1000BASETCONTROL, adv);
 504
 505         /* Start/Restart aneg */
 506         ctl = sungem_phy_read(phy, MII_BMCR);
 507         ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
 508         sungem_phy_write(phy, MII_BMCR, ctl);
 509
 510         return 0;
 511 }
 512
 513 static int bcm54xx_setup_forced(struct mii_phy *phy, int speed, int fd)
 514 {
 515         u16 ctl;
 516
 517         phy->autoneg = 0;
 518         phy->speed = speed;
 519         phy->duplex = fd;
 520         phy->pause = 0;
 521
 522         ctl = sungem_phy_read(phy, MII_BMCR);
 523         ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_SPD2|BMCR_ANENABLE);
 524
 525         /* First reset the PHY */
 526         sungem_phy_write(phy, MII_BMCR, ctl | BMCR_RESET);
 527
 528         /* Select speed & duplex */
 529         switch(speed) {
 530         case SPEED_10:
 531                 break;
 532         case SPEED_100:
 533                 ctl |= BMCR_SPEED100;
 534                 break;
 535         case SPEED_1000:
 536                 ctl |= BMCR_SPD2;
 537         }
 538         if (fd == DUPLEX_FULL)
 539                 ctl |= BMCR_FULLDPLX;
 540
 541         // XXX Should we set the sungem to GII now on 1000BT ?
 542
 543         sungem_phy_write(phy, MII_BMCR, ctl);
 544
 545         return 0;
 546 }
 547
 548 static int bcm54xx_read_link(struct mii_phy *phy)
 549 {
 550         int link_mode;
 551         u16 val;
 552
 553         if (phy->autoneg) {
 554                 val = sungem_phy_read(phy, MII_BCM5400_AUXSTATUS);
 555                 link_mode = ((val & MII_BCM5400_AUXSTATUS_LINKMODE_MASK) >>
 556                              MII_BCM5400_AUXSTATUS_LINKMODE_SHIFT);
 557                 phy->duplex = phy_BCM5400_link_table[link_mode][0] ?
 558                         DUPLEX_FULL : DUPLEX_HALF;
 559                 phy->speed = phy_BCM5400_link_table[link_mode][2] ?
 560                                 SPEED_1000 :
 561                                 (phy_BCM5400_link_table[link_mode][1] ?
 562                                  SPEED_100 : SPEED_10);
 563                 val = sungem_phy_read(phy, MII_LPA);
 564                 phy->pause = (phy->duplex == DUPLEX_FULL) &&
 565                         ((val & LPA_PAUSE) != 0);
 566         }
 567         /* On non-aneg, we assume what we put in BMCR is the speed,
 568          * though magic-aneg shouldn't prevent this case from occurring
 569          */
 570
 571         return 0;
 572 }
 573
 574 static int marvell88e1111_init(struct mii_phy* phy)
 575 {
 576         u16 rev;
 577
 578         /* magic init sequence for rev 0 */
 579         rev = sungem_phy_read(phy, MII_PHYSID2) & 0x000f;
 580         if (rev == 0) {
 581                 sungem_phy_write(phy, 0x1d, 0x000a);
 582                 sungem_phy_write(phy, 0x1e, 0x0821);
 583
 584                 sungem_phy_write(phy, 0x1d, 0x0006);
 585                 sungem_phy_write(phy, 0x1e, 0x8600);
 586
 587                 sungem_phy_write(phy, 0x1d, 0x000b);
 588                 sungem_phy_write(phy, 0x1e, 0x0100);
 589
 590                 sungem_phy_write(phy, 0x1d, 0x0004);
 591                 sungem_phy_write(phy, 0x1e, 0x4850);
 592         }
 593         return 0;
 594 }
 595
 596 #define BCM5421_MODE_MASK       (1 << 5)
 597
 598 static int bcm5421_poll_link(struct mii_phy* phy)
 599 {
 600         u32 phy_reg;
 601         int mode;
 602
 603         /* find out in what mode we are */
 604         sungem_phy_write(phy, MII_NCONFIG, 0x1000);
 605         phy_reg = sungem_phy_read(phy, MII_NCONFIG);
 606
 607         mode = (phy_reg & BCM5421_MODE_MASK) >> 5;
 608
 609         if ( mode == BCM54XX_COPPER)
 610                 return genmii_poll_link(phy);
 611
 612         /* try to find out whether we have a link */
 613         sungem_phy_write(phy, MII_NCONFIG, 0x2000);
 614         phy_reg = sungem_phy_read(phy, MII_NCONFIG);
 615
 616         if (phy_reg & 0x0020)
 617                 return 0;
 618         else
 619                 return 1;
 620 }
 621
 622 static int bcm5421_read_link(struct mii_phy* phy)
 623 {
 624         u32 phy_reg;
 625         int mode;
 626
 627         /* find out in what mode we are */
 628         sungem_phy_write(phy, MII_NCONFIG, 0x1000);
 629         phy_reg = sungem_phy_read(phy, MII_NCONFIG);
 630
 631         mode = (phy_reg & BCM5421_MODE_MASK ) >> 5;
 632
 633         if ( mode == BCM54XX_COPPER)
 634                 return bcm54xx_read_link(phy);
 635
 636         phy->speed = SPEED_1000;
 637
 638         /* find out whether we are running half- or full duplex */
 639         sungem_phy_write(phy, MII_NCONFIG, 0x2000);
 640         phy_reg = sungem_phy_read(phy, MII_NCONFIG);
 641
 642         if ( (phy_reg & 0x0080) >> 7)
 643                 phy->duplex |=  DUPLEX_HALF;
 644         else
 645                 phy->duplex |=  DUPLEX_FULL;
 646
 647         return 0;
 648 }
 649
 650 static int bcm5421_enable_fiber(struct mii_phy* phy, int autoneg)
 651 {
 652         /* enable fiber mode */
 653         sungem_phy_write(phy, MII_NCONFIG, 0x9020);
 654         /* LEDs active in both modes, autosense prio = fiber */
 655         sungem_phy_write(phy, MII_NCONFIG, 0x945f);
 656
 657         if (!autoneg) {
 658                 /* switch off fibre autoneg */
 659                 sungem_phy_write(phy, MII_NCONFIG, 0xfc01);
 660                 sungem_phy_write(phy, 0x0b, 0x0004);
 661         }
 662
 663         phy->autoneg = autoneg;
 664
 665         return 0;
 666 }
 667
 668 #define BCM5461_FIBER_LINK      (1 << 2)
 669 #define BCM5461_MODE_MASK       (3 << 1)
 670
 671 static int bcm5461_poll_link(struct mii_phy* phy)
 672 {
 673         u32 phy_reg;
 674         int mode;
 675
 676         /* find out in what mode we are */
 677         sungem_phy_write(phy, MII_NCONFIG, 0x7c00);
 678         phy_reg = sungem_phy_read(phy, MII_NCONFIG);
 679
 680         mode = (phy_reg & BCM5461_MODE_MASK ) >> 1;
 681
 682         if ( mode == BCM54XX_COPPER)
 683                 return genmii_poll_link(phy);
 684
 685         /* find out whether we have a link */
 686         sungem_phy_write(phy, MII_NCONFIG, 0x7000);
 687         phy_reg = sungem_phy_read(phy, MII_NCONFIG);
 688
 689         if (phy_reg & BCM5461_FIBER_LINK)
 690                 return 1;
 691         else
 692                 return 0;
 693 }
 694
 695 #define BCM5461_FIBER_DUPLEX    (1 << 3)
 696
 697 static int bcm5461_read_link(struct mii_phy* phy)
 698 {
 699         u32 phy_reg;
 700         int mode;
 701
 702         /* find out in what mode we are */
 703         sungem_phy_write(phy, MII_NCONFIG, 0x7c00);
 704         phy_reg = sungem_phy_read(phy, MII_NCONFIG);
 705
 706         mode = (phy_reg & BCM5461_MODE_MASK ) >> 1;
 707
 708         if ( mode == BCM54XX_COPPER) {
 709                 return bcm54xx_read_link(phy);
 710         }
 711
 712         phy->speed = SPEED_1000;
 713
 714         /* find out whether we are running half- or full duplex */
 715         sungem_phy_write(phy, MII_NCONFIG, 0x7000);
 716         phy_reg = sungem_phy_read(phy, MII_NCONFIG);
 717
 718         if (phy_reg & BCM5461_FIBER_DUPLEX)
 719                 phy->duplex |=  DUPLEX_FULL;
 720         else
 721                 phy->duplex |=  DUPLEX_HALF;
 722
 723         return 0;
 724 }
 725
 726 static int bcm5461_enable_fiber(struct mii_phy* phy, int autoneg)
 727 {
 728         /* select fiber mode, enable 1000 base-X registers */
 729         sungem_phy_write(phy, MII_NCONFIG, 0xfc0b);
 730
 731         if (autoneg) {
 732                 /* enable fiber with no autonegotiation */
 733                 sungem_phy_write(phy, MII_ADVERTISE, 0x01e0);
 734                 sungem_phy_write(phy, MII_BMCR, 0x1140);
 735         } else {
 736                 /* enable fiber with autonegotiation */
 737                 sungem_phy_write(phy, MII_BMCR, 0x0140);
 738         }
 739
 740         phy->autoneg = autoneg;
 741
 742         return 0;
 743 }
 744
 745 static int marvell_setup_aneg(struct mii_phy *phy, u32 advertise)
 746 {
 747         u16 ctl, adv;
 748
 749         phy->autoneg = 1;
 750         phy->speed = SPEED_10;
 751         phy->duplex = DUPLEX_HALF;
 752         phy->pause = 0;
 753         phy->advertising = advertise;
 754
 755         /* Setup standard advertise */
 756         adv = sungem_phy_read(phy, MII_ADVERTISE);
 757         adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
 758         if (advertise & ADVERTISED_10baseT_Half)
 759                 adv |= ADVERTISE_10HALF;
 760         if (advertise & ADVERTISED_10baseT_Full)
 761                 adv |= ADVERTISE_10FULL;
 762         if (advertise & ADVERTISED_100baseT_Half)
 763                 adv |= ADVERTISE_100HALF;
 764         if (advertise & ADVERTISED_100baseT_Full)
 765                 adv |= ADVERTISE_100FULL;
 766         if (advertise & ADVERTISED_Pause)
 767                 adv |= ADVERTISE_PAUSE_CAP;
 768         if (advertise & ADVERTISED_Asym_Pause)
 769                 adv |= ADVERTISE_PAUSE_ASYM;
 770         sungem_phy_write(phy, MII_ADVERTISE, adv);
 771
 772         /* Setup 1000BT advertise & enable crossover detect
 773          * XXX How do we advertise 1000BT ? Darwin source is
 774          * confusing here, they read from specific control and
 775          * write to control... Someone has specs for those
 776          * beasts ?
 777          */
 778         adv = sungem_phy_read(phy, MII_M1011_PHY_SPEC_CONTROL);
 779         adv |= MII_M1011_PHY_SPEC_CONTROL_AUTO_MDIX;
 780         adv &= ~(MII_1000BASETCONTROL_FULLDUPLEXCAP |
 781                         MII_1000BASETCONTROL_HALFDUPLEXCAP);
 782         if (advertise & SUPPORTED_1000baseT_Half)
 783                 adv |= MII_1000BASETCONTROL_HALFDUPLEXCAP;
 784         if (advertise & SUPPORTED_1000baseT_Full)
 785                 adv |= MII_1000BASETCONTROL_FULLDUPLEXCAP;
 786         sungem_phy_write(phy, MII_1000BASETCONTROL, adv);
 787
 788         /* Start/Restart aneg */
 789         ctl = sungem_phy_read(phy, MII_BMCR);
 790         ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
 791         sungem_phy_write(phy, MII_BMCR, ctl);
 792
 793         return 0;
 794 }
 795
 796 static int marvell_setup_forced(struct mii_phy *phy, int speed, int fd)
 797 {
 798         u16 ctl, ctl2;
 799
 800         phy->autoneg = 0;
 801         phy->speed = speed;
 802         phy->duplex = fd;
 803         phy->pause = 0;
 804
 805         ctl = sungem_phy_read(phy, MII_BMCR);
 806         ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_SPD2|BMCR_ANENABLE);
 807         ctl |= BMCR_RESET;
 808
 809         /* Select speed & duplex */
 810         switch(speed) {
 811         case SPEED_10:
 812                 break;
 813         case SPEED_100:
 814                 ctl |= BMCR_SPEED100;
 815                 break;
 816         /* I'm not sure about the one below, again, Darwin source is
 817          * quite confusing and I lack chip specs
 818          */
 819         case SPEED_1000:
 820                 ctl |= BMCR_SPD2;
 821         }
 822         if (fd == DUPLEX_FULL)
 823                 ctl |= BMCR_FULLDPLX;
 824
 825         /* Disable crossover. Again, the way Apple does it is strange,
 826          * though I don't assume they are wrong ;)
 827          */
 828         ctl2 = sungem_phy_read(phy, MII_M1011_PHY_SPEC_CONTROL);
 829         ctl2 &= ~(MII_M1011_PHY_SPEC_CONTROL_MANUAL_MDIX |
 830                 MII_M1011_PHY_SPEC_CONTROL_AUTO_MDIX |
 831                 MII_1000BASETCONTROL_FULLDUPLEXCAP |
 832                 MII_1000BASETCONTROL_HALFDUPLEXCAP);
 833         if (speed == SPEED_1000)
 834                 ctl2 |= (fd == DUPLEX_FULL) ?
 835                         MII_1000BASETCONTROL_FULLDUPLEXCAP :
 836                         MII_1000BASETCONTROL_HALFDUPLEXCAP;
 837         sungem_phy_write(phy, MII_1000BASETCONTROL, ctl2);
 838
 839         // XXX Should we set the sungem to GII now on 1000BT ?
 840
 841         sungem_phy_write(phy, MII_BMCR, ctl);
 842
 843         return 0;
 844 }
 845
 846 static int marvell_read_link(struct mii_phy *phy)
 847 {
 848         u16 status, pmask;
 849
 850         if (phy->autoneg) {
 851                 status = sungem_phy_read(phy, MII_M1011_PHY_SPEC_STATUS);
 852                 if ((status & MII_M1011_PHY_SPEC_STATUS_RESOLVED) == 0)
 853                         return -EAGAIN;
 854                 if (status & MII_M1011_PHY_SPEC_STATUS_1000)
 855                         phy->speed = SPEED_1000;
 856                 else if (status & MII_M1011_PHY_SPEC_STATUS_100)
 857                         phy->speed = SPEED_100;
 858                 else
 859                         phy->speed = SPEED_10;
 860                 if (status & MII_M1011_PHY_SPEC_STATUS_FULLDUPLEX)
 861                         phy->duplex = DUPLEX_FULL;
 862                 else
 863                         phy->duplex = DUPLEX_HALF;
 864                 pmask = MII_M1011_PHY_SPEC_STATUS_TX_PAUSE |
 865                         MII_M1011_PHY_SPEC_STATUS_RX_PAUSE;
 866                 phy->pause = (status & pmask) == pmask;
 867         }
 868         /* On non-aneg, we assume what we put in BMCR is the speed,
 869          * though magic-aneg shouldn't prevent this case from occurring
 870          */
 871
 872         return 0;
 873 }
 874
 875 #define MII_BASIC_FEATURES \
 876         (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |      \
 877          SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |    \
 878          SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII |     \
 879          SUPPORTED_Pause)
 880
 881 /* On gigabit capable PHYs, we advertise Pause support but not asym pause
 882  * support for now as I'm not sure it's supported and Darwin doesn't do
 883  * it neither. --BenH.
 884  */
 885 #define MII_GBIT_FEATURES \
 886         (MII_BASIC_FEATURES |   \
 887          SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full)
 888
 889 /* Broadcom BCM 5201 */
 890 static struct mii_phy_ops bcm5201_phy_ops = {
 891         .init           = bcm5201_init,
 892         .suspend        = bcm5201_suspend,
 893         .setup_aneg     = genmii_setup_aneg,
 894         .setup_forced   = genmii_setup_forced,
 895         .poll_link      = genmii_poll_link,
 896         .read_link      = genmii_read_link,
 897 };
 898
 899 static struct mii_phy_def bcm5201_phy_def = {
 900         .phy_id         = 0x00406210,
 901         .phy_id_mask    = 0xfffffff0,
 902         .name           = "BCM5201",
 903         .features       = MII_BASIC_FEATURES,
 904         .magic_aneg     = 1,
 905         .ops            = &bcm5201_phy_ops
 906 };
 907
 908 /* Broadcom BCM 5221 */
 909 static struct mii_phy_ops bcm5221_phy_ops = {
 910         .suspend        = bcm5221_suspend,
 911         .init           = bcm5221_init,
 912         .setup_aneg     = genmii_setup_aneg,
 913         .setup_forced   = genmii_setup_forced,
 914         .poll_link      = genmii_poll_link,
 915         .read_link      = genmii_read_link,
 916 };
 917
 918 static struct mii_phy_def bcm5221_phy_def = {
 919         .phy_id         = 0x004061e0,
 920         .phy_id_mask    = 0xfffffff0,
 921         .name           = "BCM5221",
 922         .features       = MII_BASIC_FEATURES,
 923         .magic_aneg     = 1,
 924         .ops            = &bcm5221_phy_ops
 925 };
 926
 927 /* Broadcom BCM 5241 */
 928 static struct mii_phy_ops bcm5241_phy_ops = {
 929         .suspend        = bcm5241_suspend,
 930         .init           = bcm5241_init,
 931         .setup_aneg     = genmii_setup_aneg,
 932         .setup_forced   = genmii_setup_forced,
 933         .poll_link      = genmii_poll_link,
 934         .read_link      = genmii_read_link,
 935 };
 936 static struct mii_phy_def bcm5241_phy_def = {
 937         .phy_id         = 0x0143bc30,
 938         .phy_id_mask    = 0xfffffff0,
 939         .name           = "BCM5241",
 940         .features       = MII_BASIC_FEATURES,
 941         .magic_aneg     = 1,
 942         .ops            = &bcm5241_phy_ops
 943 };
 944
 945 /* Broadcom BCM 5400 */
 946 static struct mii_phy_ops bcm5400_phy_ops = {
 947         .init           = bcm5400_init,
 948         .suspend        = bcm5400_suspend,
 949         .setup_aneg     = bcm54xx_setup_aneg,
 950         .setup_forced   = bcm54xx_setup_forced,
 951         .poll_link      = genmii_poll_link,
 952         .read_link      = bcm54xx_read_link,
 953 };
 954
 955 static struct mii_phy_def bcm5400_phy_def = {
 956         .phy_id         = 0x00206040,
 957         .phy_id_mask    = 0xfffffff0,
 958         .name           = "BCM5400",
 959         .features       = MII_GBIT_FEATURES,
 960         .magic_aneg     = 1,
 961         .ops            = &bcm5400_phy_ops
 962 };
 963
 964 /* Broadcom BCM 5401 */
 965 static struct mii_phy_ops bcm5401_phy_ops = {
 966         .init           = bcm5401_init,
 967         .suspend        = bcm5401_suspend,
 968         .setup_aneg     = bcm54xx_setup_aneg,
 969         .setup_forced   = bcm54xx_setup_forced,
 970         .poll_link      = genmii_poll_link,
 971         .read_link      = bcm54xx_read_link,
 972 };
 973
 974 static struct mii_phy_def bcm5401_phy_def = {
 975         .phy_id         = 0x00206050,
 976         .phy_id_mask    = 0xfffffff0,
 977         .name           = "BCM5401",
 978         .features       = MII_GBIT_FEATURES,
 979         .magic_aneg     = 1,
 980         .ops            = &bcm5401_phy_ops
 981 };
 982
 983 /* Broadcom BCM 5411 */
 984 static struct mii_phy_ops bcm5411_phy_ops = {
 985         .init           = bcm5411_init,
 986         .suspend        = generic_suspend,
 987         .setup_aneg     = bcm54xx_setup_aneg,
 988         .setup_forced   = bcm54xx_setup_forced,
 989         .poll_link      = genmii_poll_link,
 990         .read_link      = bcm54xx_read_link,
 991 };
 992
 993 static struct mii_phy_def bcm5411_phy_def = {
 994         .phy_id         = 0x00206070,
 995         .phy_id_mask    = 0xfffffff0,
 996         .name           = "BCM5411",
 997         .features       = MII_GBIT_FEATURES,
 998         .magic_aneg     = 1,
 999         .ops            = &bcm5411_phy_ops
1000 };
1001
1002 /* Broadcom BCM 5421 */
1003 static struct mii_phy_ops bcm5421_phy_ops = {
1004         .init           = bcm5421_init,
1005         .suspend        = generic_suspend,
1006         .setup_aneg     = bcm54xx_setup_aneg,
1007         .setup_forced   = bcm54xx_setup_forced,
1008         .poll_link      = bcm5421_poll_link,
1009         .read_link      = bcm5421_read_link,
1010         .enable_fiber   = bcm5421_enable_fiber,
1011 };
1012
1013 static struct mii_phy_def bcm5421_phy_def = {
1014         .phy_id         = 0x002060e0,
1015         .phy_id_mask    = 0xfffffff0,
1016         .name           = "BCM5421",
1017         .features       = MII_GBIT_FEATURES,
1018         .magic_aneg     = 1,
1019         .ops            = &bcm5421_phy_ops
1020 };
1021
1022 /* Broadcom BCM 5421 built-in K2 */
1023 static struct mii_phy_ops bcm5421k2_phy_ops = {
1024         .init           = bcm5421_init,
1025         .suspend        = generic_suspend,
1026         .setup_aneg     = bcm54xx_setup_aneg,
1027         .setup_forced   = bcm54xx_setup_forced,
1028         .poll_link      = genmii_poll_link,
1029         .read_link      = bcm54xx_read_link,
1030 };
1031
1032 static struct mii_phy_def bcm5421k2_phy_def = {
1033         .phy_id         = 0x002062e0,
1034         .phy_id_mask    = 0xfffffff0,
1035         .name           = "BCM5421-K2",
1036         .features       = MII_GBIT_FEATURES,
1037         .magic_aneg     = 1,
1038         .ops            = &bcm5421k2_phy_ops
1039 };
1040
1041 static struct mii_phy_ops bcm5461_phy_ops = {
1042         .init           = bcm5421_init,
1043         .suspend        = generic_suspend,
1044         .setup_aneg     = bcm54xx_setup_aneg,
1045         .setup_forced   = bcm54xx_setup_forced,
1046         .poll_link      = bcm5461_poll_link,
1047         .read_link      = bcm5461_read_link,
1048         .enable_fiber   = bcm5461_enable_fiber,
1049 };
1050
1051 static struct mii_phy_def bcm5461_phy_def = {
1052         .phy_id         = 0x002060c0,
1053         .phy_id_mask    = 0xfffffff0,
1054         .name           = "BCM5461",
1055         .features       = MII_GBIT_FEATURES,
1056         .magic_aneg     = 1,
1057         .ops            = &bcm5461_phy_ops
1058 };
1059
1060 /* Broadcom BCM 5462 built-in Vesta */
1061 static struct mii_phy_ops bcm5462V_phy_ops = {
1062         .init           = bcm5421_init,
1063         .suspend        = generic_suspend,
1064         .setup_aneg     = bcm54xx_setup_aneg,
1065         .setup_forced   = bcm54xx_setup_forced,
1066         .poll_link      = genmii_poll_link,
1067         .read_link      = bcm54xx_read_link,
1068 };
1069
1070 static struct mii_phy_def bcm5462V_phy_def = {
1071         .phy_id         = 0x002060d0,
1072         .phy_id_mask    = 0xfffffff0,
1073         .name           = "BCM5462-Vesta",
1074         .features       = MII_GBIT_FEATURES,
1075         .magic_aneg     = 1,
1076         .ops            = &bcm5462V_phy_ops
1077 };
1078
1079 /* Marvell 88E1101 amd 88E1111 */
1080 static struct mii_phy_ops marvell88e1101_phy_ops = {
1081         .suspend        = generic_suspend,
1082         .setup_aneg     = marvell_setup_aneg,
1083         .setup_forced   = marvell_setup_forced,
1084         .poll_link      = genmii_poll_link,
1085         .read_link      = marvell_read_link
1086 };
1087
1088 static struct mii_phy_ops marvell88e1111_phy_ops = {
1089         .init           = marvell88e1111_init,
1090         .suspend        = generic_suspend,
1091         .setup_aneg     = marvell_setup_aneg,
1092         .setup_forced   = marvell_setup_forced,
1093         .poll_link      = genmii_poll_link,
1094         .read_link      = marvell_read_link
1095 };
1096
1097 /* two revs in darwin for the 88e1101 ... I could use a datasheet
1098  * to get the proper names...
1099  */
1100 static struct mii_phy_def marvell88e1101v1_phy_def = {
1101         .phy_id         = 0x01410c20,
1102         .phy_id_mask    = 0xfffffff0,
1103         .name           = "Marvell 88E1101v1",
1104         .features       = MII_GBIT_FEATURES,
1105         .magic_aneg     = 1,
1106         .ops            = &marvell88e1101_phy_ops
1107 };
1108 static struct mii_phy_def marvell88e1101v2_phy_def = {
1109         .phy_id         = 0x01410c60,
1110         .phy_id_mask    = 0xfffffff0,
1111         .name           = "Marvell 88E1101v2",
1112         .features       = MII_GBIT_FEATURES,
1113         .magic_aneg     = 1,
1114         .ops            = &marvell88e1101_phy_ops
1115 };
1116 static struct mii_phy_def marvell88e1111_phy_def = {
1117         .phy_id         = 0x01410cc0,
1118         .phy_id_mask    = 0xfffffff0,
1119         .name           = "Marvell 88E1111",
1120         .features       = MII_GBIT_FEATURES,
1121         .magic_aneg     = 1,
1122         .ops            = &marvell88e1111_phy_ops
1123 };
1124
1125 /* Generic implementation for most 10/100 PHYs */
1126 static struct mii_phy_ops generic_phy_ops = {
1127         .setup_aneg     = genmii_setup_aneg,
1128         .setup_forced   = genmii_setup_forced,
1129         .poll_link      = genmii_poll_link,
1130         .read_link      = genmii_read_link
1131 };
1132
1133 static struct mii_phy_def genmii_phy_def = {
1134         .phy_id         = 0x00000000,
1135         .phy_id_mask    = 0x00000000,
1136         .name           = "Generic MII",
1137         .features       = MII_BASIC_FEATURES,
1138         .magic_aneg     = 0,
1139         .ops            = &generic_phy_ops
1140 };
1141
1142 static struct mii_phy_def* mii_phy_table[] = {
1143         &bcm5201_phy_def,
1144         &bcm5221_phy_def,
1145         &bcm5241_phy_def,
1146         &bcm5400_phy_def,
1147         &bcm5401_phy_def,
1148         &bcm5411_phy_def,
1149         &bcm5421_phy_def,
1150         &bcm5421k2_phy_def,
1151         &bcm5461_phy_def,
1152         &bcm5462V_phy_def,
1153         &marvell88e1101v1_phy_def,
1154         &marvell88e1101v2_phy_def,
1155         &marvell88e1111_phy_def,
1156         &genmii_phy_def,
1157         NULL
1158 };
1159
1160 int sungem_phy_probe(struct mii_phy *phy, int mii_id)
1161 {
1162         int rc;
1163         u32 id;
1164         struct mii_phy_def* def;
1165         int i;
1166
1167         /* We do not reset the mii_phy structure as the driver
1168          * may re-probe the PHY regulary
1169          */
1170         phy->mii_id = mii_id;
1171
1172         /* Take PHY out of isloate mode and reset it. */
1173         rc = reset_one_mii_phy(phy, mii_id);
1174         if (rc)
1175                 goto fail;
1176
1177         /* Read ID and find matching entry */
1178         id = (sungem_phy_read(phy, MII_PHYSID1) << 16 | sungem_phy_read(phy, MII_PHYSID2));
1179         printk(KERN_DEBUG KBUILD_MODNAME ": " "PHY ID: %x, addr: %x\n",
1180                id, mii_id);
1181         for (i=0; (def = mii_phy_table[i]) != NULL; i++)
1182                 if ((id & def->phy_id_mask) == def->phy_id)
1183                         break;
1184         /* Should never be NULL (we have a generic entry), but... */
1185         if (def == NULL)
1186                 goto fail;
1187
1188         phy->def = def;
1189
1190         return 0;
1191 fail:
1192         phy->speed = 0;
1193         phy->duplex = 0;
1194         phy->pause = 0;
1195         phy->advertising = 0;
1196         return -ENODEV;
1197 }
1198
1199 EXPORT_SYMBOL(sungem_phy_probe);
1200 MODULE_LICENSE("GPL");