1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd. */
7 #include <linux/property.h>
10 #define TXGBE_DEV_ID_SP1000 0x1001
11 #define TXGBE_DEV_ID_WX1820 0x2001
15 #define TXGBE_ID_SP1000_SFP 0x0000
16 #define TXGBE_ID_WX1820_SFP 0x2000
17 #define TXGBE_ID_SFP 0x00
20 #define TXGBE_ID_SP1000_XAUI 0x1010
21 #define TXGBE_ID_WX1820_XAUI 0x2010
22 #define TXGBE_ID_XAUI 0x10
23 #define TXGBE_ID_SP1000_SGMII 0x1020
24 #define TXGBE_ID_WX1820_SGMII 0x2020
25 #define TXGBE_ID_SGMII 0x20
27 #define TXGBE_ID_SP1000_KR_KX_KX4 0x1030
28 #define TXGBE_ID_WX1820_KR_KX_KX4 0x2030
29 #define TXGBE_ID_KR_KX_KX4 0x30
31 #define TXGBE_ID_SP1000_MAC_XAUI 0x1040
32 #define TXGBE_ID_WX1820_MAC_XAUI 0x2040
33 #define TXGBE_ID_MAC_XAUI 0x40
34 #define TXGBE_ID_SP1000_MAC_SGMII 0x1060
35 #define TXGBE_ID_WX1820_MAC_SGMII 0x2060
36 #define TXGBE_ID_MAC_SGMII 0x60
38 /* Combined interface*/
39 #define TXGBE_ID_SFI_XAUI 0x50
42 #define TXGBE_SP_MPW 1
44 /**************** SP Registers ****************************/
45 /* chip control Registers */
46 #define TXGBE_MIS_PRB_CTL 0x10010
47 #define TXGBE_MIS_PRB_CTL_LAN_UP(_i) BIT(1 - (_i))
49 #define TXGBE_SPI_ILDR_STATUS 0x10120
50 #define TXGBE_SPI_ILDR_STATUS_PERST BIT(0) /* PCIE_PERST is done */
51 #define TXGBE_SPI_ILDR_STATUS_PWRRST BIT(1) /* Power on reset is done */
52 #define TXGBE_SPI_ILDR_STATUS_LAN_SW_RST(_i) BIT((_i) + 9) /* lan soft reset done */
54 /* Sensors for PVT(Process Voltage Temperature) */
55 #define TXGBE_TS_CTL 0x10300
56 #define TXGBE_TS_CTL_EVAL_MD BIT(31)
58 /* GPIO register bit */
59 #define TXGBE_GPIOBIT_0 BIT(0) /* I:tx fault */
60 #define TXGBE_GPIOBIT_1 BIT(1) /* O:tx disabled */
61 #define TXGBE_GPIOBIT_2 BIT(2) /* I:sfp module absent */
62 #define TXGBE_GPIOBIT_3 BIT(3) /* I:rx signal lost */
63 #define TXGBE_GPIOBIT_4 BIT(4) /* O:rate select, 1G(0) 10G(1) */
64 #define TXGBE_GPIOBIT_5 BIT(5) /* O:rate select, 1G(0) 10G(1) */
66 /* Extended Interrupt Enable Set */
67 #define TXGBE_PX_MISC_ETH_LKDN BIT(8)
68 #define TXGBE_PX_MISC_DEV_RST BIT(10)
69 #define TXGBE_PX_MISC_ETH_EVENT BIT(17)
70 #define TXGBE_PX_MISC_ETH_LK BIT(18)
71 #define TXGBE_PX_MISC_ETH_AN BIT(19)
72 #define TXGBE_PX_MISC_INT_ERR BIT(20)
73 #define TXGBE_PX_MISC_GPIO BIT(26)
74 #define TXGBE_PX_MISC_IEN_MASK \
75 (TXGBE_PX_MISC_ETH_LKDN | TXGBE_PX_MISC_DEV_RST | \
76 TXGBE_PX_MISC_ETH_EVENT | TXGBE_PX_MISC_ETH_LK | \
77 TXGBE_PX_MISC_ETH_AN | TXGBE_PX_MISC_INT_ERR | \
80 /* Port cfg registers */
81 #define TXGBE_CFG_PORT_ST 0x14404
82 #define TXGBE_CFG_PORT_ST_LINK_UP BIT(0)
85 #define TXGBE_I2C_BASE 0x14900
87 /************************************** ETH PHY ******************************/
88 #define TXGBE_XPCS_IDA_ADDR 0x13000
89 #define TXGBE_XPCS_IDA_DATA 0x13004
91 /* Checksum and EEPROM pointers */
92 #define TXGBE_EEPROM_LAST_WORD 0x800
93 #define TXGBE_EEPROM_CHECKSUM 0x2F
94 #define TXGBE_EEPROM_SUM 0xBABA
95 #define TXGBE_EEPROM_VERSION_L 0x1D
96 #define TXGBE_EEPROM_VERSION_H 0x1E
97 #define TXGBE_ISCSI_BOOT_CONFIG 0x07
99 #define TXGBE_MAX_MSIX_VECTORS 64
100 #define TXGBE_MAX_FDIR_INDICES 63
101 #define TXGBE_MAX_RSS_INDICES 63
103 #define TXGBE_MAX_RX_QUEUES (TXGBE_MAX_FDIR_INDICES + 1)
104 #define TXGBE_MAX_TX_QUEUES (TXGBE_MAX_FDIR_INDICES + 1)
106 #define TXGBE_SP_MAX_TX_QUEUES 128
107 #define TXGBE_SP_MAX_RX_QUEUES 128
108 #define TXGBE_SP_RAR_ENTRIES 128
109 #define TXGBE_SP_MC_TBL_SIZE 128
110 #define TXGBE_SP_VFT_TBL_SIZE 128
111 #define TXGBE_SP_RX_PB_SIZE 512
112 #define TXGBE_SP_TDB_PB_SZ (160 * 1024) /* 160KB Packet Buffer */
114 /* TX/RX descriptor defines */
115 #define TXGBE_DEFAULT_TXD 512
116 #define TXGBE_DEFAULT_TX_WORK 256
118 #if (PAGE_SIZE < 8192)
119 #define TXGBE_DEFAULT_RXD 512
120 #define TXGBE_DEFAULT_RX_WORK 256
122 #define TXGBE_DEFAULT_RXD 256
123 #define TXGBE_DEFAULT_RX_WORK 128
126 #define TXGBE_INTR_MISC BIT(0)
127 #define TXGBE_INTR_QALL(A) GENMASK((A)->num_q_vectors, 1)
129 #define TXGBE_MAX_EITR GENMASK(11, 3)
131 extern char txgbe_driver_name[];
133 void txgbe_down(struct wx *wx);
134 void txgbe_up(struct wx *wx);
135 int txgbe_setup_tc(struct net_device *dev, u8 tc);
137 #define NODE_PROP(_NAME, _PROP) \
138 (const struct software_node) { \
140 .properties = _PROP, \
155 char phylink_name[32];
156 struct property_entry gpio_props[1];
157 struct property_entry i2c_props[3];
158 struct property_entry sfp_props[8];
159 struct property_entry phylink_props[2];
160 struct software_node_ref_args i2c_ref[1];
161 struct software_node_ref_args gpio0_ref[1];
162 struct software_node_ref_args gpio1_ref[1];
163 struct software_node_ref_args gpio2_ref[1];
164 struct software_node_ref_args gpio3_ref[1];
165 struct software_node_ref_args gpio4_ref[1];
166 struct software_node_ref_args gpio5_ref[1];
167 struct software_node_ref_args sfp_ref[1];
168 struct software_node swnodes[SWNODE_MAX];
169 const struct software_node *group[SWNODE_MAX + 1];
174 struct txgbe_nodes nodes;
175 struct dw_xpcs *xpcs;
176 struct platform_device *sfp_dev;
177 struct platform_device *i2c_dev;
178 struct clk_lookup *clock;
180 struct gpio_chip *gpio;
183 #endif /* _TXGBE_TYPE_H_ */