1 // SPDX-License-Identifier: GPL-2.0
2 /* Texas Instruments Ethernet Switch Driver
4 * Copyright (C) 2013 Texas Instruments
6 * Module Author: Mugunthan V N <mugunthanvnm@ti.com>
10 #include <linux/platform_device.h>
11 #include <linux/init.h>
12 #include <linux/netdevice.h>
13 #include <linux/phy.h>
15 #include <linux/of_device.h>
19 /* AM33xx SoC specific definitions for the CONTROL port */
20 #define AM33XX_GMII_SEL_MODE_MII 0
21 #define AM33XX_GMII_SEL_MODE_RMII 1
22 #define AM33XX_GMII_SEL_MODE_RGMII 2
24 #define AM33XX_GMII_SEL_RMII2_IO_CLK_EN BIT(7)
25 #define AM33XX_GMII_SEL_RMII1_IO_CLK_EN BIT(6)
26 #define AM33XX_GMII_SEL_RGMII2_IDMODE BIT(5)
27 #define AM33XX_GMII_SEL_RGMII1_IDMODE BIT(4)
29 #define GMII_SEL_MODE_MASK 0x3
31 struct cpsw_phy_sel_priv {
33 u32 __iomem *gmii_sel;
34 bool rmii_clock_external;
35 void (*cpsw_phy_sel)(struct cpsw_phy_sel_priv *priv,
36 phy_interface_t phy_mode, int slave);
40 static void cpsw_gmii_sel_am3352(struct cpsw_phy_sel_priv *priv,
41 phy_interface_t phy_mode, int slave)
46 bool rgmii_id = false;
48 reg = readl(priv->gmii_sel);
51 case PHY_INTERFACE_MODE_RMII:
52 mode = AM33XX_GMII_SEL_MODE_RMII;
55 case PHY_INTERFACE_MODE_RGMII:
56 mode = AM33XX_GMII_SEL_MODE_RGMII;
59 case PHY_INTERFACE_MODE_RGMII_ID:
60 case PHY_INTERFACE_MODE_RGMII_RXID:
61 case PHY_INTERFACE_MODE_RGMII_TXID:
62 mode = AM33XX_GMII_SEL_MODE_RGMII;
68 "Unsupported PHY mode: \"%s\". Defaulting to MII.\n",
71 case PHY_INTERFACE_MODE_MII:
72 mode = AM33XX_GMII_SEL_MODE_MII;
76 mask = GMII_SEL_MODE_MASK << (slave * 2) | BIT(slave + 6);
77 mask |= BIT(slave + 4);
80 if (priv->rmii_clock_external) {
82 mode |= AM33XX_GMII_SEL_RMII1_IO_CLK_EN;
84 mode |= AM33XX_GMII_SEL_RMII2_IO_CLK_EN;
89 mode |= AM33XX_GMII_SEL_RGMII1_IDMODE;
91 mode |= AM33XX_GMII_SEL_RGMII2_IDMODE;
97 writel(reg, priv->gmii_sel);
100 static void cpsw_gmii_sel_dra7xx(struct cpsw_phy_sel_priv *priv,
101 phy_interface_t phy_mode, int slave)
107 reg = readl(priv->gmii_sel);
110 case PHY_INTERFACE_MODE_RMII:
111 mode = AM33XX_GMII_SEL_MODE_RMII;
114 case PHY_INTERFACE_MODE_RGMII:
115 case PHY_INTERFACE_MODE_RGMII_ID:
116 case PHY_INTERFACE_MODE_RGMII_RXID:
117 case PHY_INTERFACE_MODE_RGMII_TXID:
118 mode = AM33XX_GMII_SEL_MODE_RGMII;
123 "Unsupported PHY mode: \"%s\". Defaulting to MII.\n",
124 phy_modes(phy_mode));
126 case PHY_INTERFACE_MODE_MII:
127 mode = AM33XX_GMII_SEL_MODE_MII;
133 mask = GMII_SEL_MODE_MASK;
136 mask = GMII_SEL_MODE_MASK << 4;
140 dev_err(priv->dev, "invalid slave number...\n");
144 if (priv->rmii_clock_external)
145 dev_err(priv->dev, "RMII External clock is not supported\n");
150 writel(reg, priv->gmii_sel);
153 static struct platform_driver cpsw_phy_sel_driver;
154 static int match(struct device *dev, const void *data)
156 const struct device_node *node = (const struct device_node *)data;
157 return dev->of_node == node &&
158 dev->driver == &cpsw_phy_sel_driver.driver;
161 void cpsw_phy_sel(struct device *dev, phy_interface_t phy_mode, int slave)
163 struct device_node *node;
164 struct cpsw_phy_sel_priv *priv;
166 node = of_parse_phandle(dev->of_node, "cpsw-phy-sel", 0);
168 node = of_get_child_by_name(dev->of_node, "cpsw-phy-sel");
170 dev_err(dev, "Phy mode driver DT not found\n");
175 dev = bus_find_device(&platform_bus_type, NULL, node, match);
177 dev_err(dev, "unable to find platform device for %pOF\n", node);
181 priv = dev_get_drvdata(dev);
183 priv->cpsw_phy_sel(priv, phy_mode, slave);
189 EXPORT_SYMBOL_GPL(cpsw_phy_sel);
191 static const struct of_device_id cpsw_phy_sel_id_table[] = {
193 .compatible = "ti,am3352-cpsw-phy-sel",
194 .data = &cpsw_gmii_sel_am3352,
197 .compatible = "ti,dra7xx-cpsw-phy-sel",
198 .data = &cpsw_gmii_sel_dra7xx,
201 .compatible = "ti,am43xx-cpsw-phy-sel",
202 .data = &cpsw_gmii_sel_am3352,
207 static int cpsw_phy_sel_probe(struct platform_device *pdev)
209 struct resource *res;
210 const struct of_device_id *of_id;
211 struct cpsw_phy_sel_priv *priv;
213 of_id = of_match_node(cpsw_phy_sel_id_table, pdev->dev.of_node);
217 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
219 dev_err(&pdev->dev, "unable to alloc memory for cpsw phy sel\n");
223 priv->dev = &pdev->dev;
224 priv->cpsw_phy_sel = of_id->data;
226 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gmii-sel");
227 priv->gmii_sel = devm_ioremap_resource(&pdev->dev, res);
228 if (IS_ERR(priv->gmii_sel))
229 return PTR_ERR(priv->gmii_sel);
231 if (of_find_property(pdev->dev.of_node, "rmii-clock-ext", NULL))
232 priv->rmii_clock_external = true;
234 dev_set_drvdata(&pdev->dev, priv);
239 static struct platform_driver cpsw_phy_sel_driver = {
240 .probe = cpsw_phy_sel_probe,
242 .name = "cpsw-phy-sel",
243 .of_match_table = cpsw_phy_sel_id_table,
246 builtin_platform_driver(cpsw_phy_sel_driver);