drivers/net/ethernet/ti/am65-cpsw-nuss.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  */
   5
   6 #ifndef AM65_CPSW_NUSS_H_
   7 #define AM65_CPSW_NUSS_H_
   8
   9 #include <linux/kernel.h>
  10 #include <linux/module.h>
  11 #include <linux/netdevice.h>
  12 #include <linux/phy.h>
  13 #include <linux/platform_device.h>
  14 #include "am65-cpsw-qos.h"
  15
  16 struct am65_cpts;
  17
  18 #define HOST_PORT_NUM           0
  19
  20 #define AM65_CPSW_MAX_TX_QUEUES 8
  21 #define AM65_CPSW_MAX_RX_QUEUES 1
  22 #define AM65_CPSW_MAX_RX_FLOWS  1
  23
  24 struct am65_cpsw_slave_data {
  25         bool                            mac_only;
  26         struct cpsw_sl                  *mac_sl;
  27         struct device_node              *phy_node;
  28         struct phy_device               *phy;
  29         phy_interface_t                 phy_if;
  30         struct phy                      *ifphy;
  31         bool                            rx_pause;
  32         bool                            tx_pause;
  33         u8                              mac_addr[ETH_ALEN];
  34 };
  35
  36 struct am65_cpsw_port {
  37         struct am65_cpsw_common         *common;
  38         struct net_device               *ndev;
  39         const char                      *name;
  40         u32                             port_id;
  41         void __iomem                    *port_base;
  42         void __iomem                    *stat_base;
  43         void __iomem                    *fetch_ram_base;
  44         bool                            disabled;
  45         struct am65_cpsw_slave_data     slave;
  46         bool                            tx_ts_enabled;
  47         bool                            rx_ts_enabled;
  48         struct am65_cpsw_qos            qos;
  49 };
  50
  51 struct am65_cpsw_host {
  52         struct am65_cpsw_common         *common;
  53         void __iomem                    *port_base;
  54         void __iomem                    *stat_base;
  55 };
  56
  57 struct am65_cpsw_tx_chn {
  58         struct napi_struct napi_tx;
  59         struct am65_cpsw_common *common;
  60         struct k3_cppi_desc_pool *desc_pool;
  61         struct k3_udma_glue_tx_channel *tx_chn;
  62         int irq;
  63         u32 id;
  64         u32 descs_num;
  65         char tx_chn_name[128];
  66 };
  67
  68 struct am65_cpsw_rx_chn {
  69         struct device *dev;
  70         struct k3_cppi_desc_pool *desc_pool;
  71         struct k3_udma_glue_rx_channel *rx_chn;
  72         u32 descs_num;
  73         int irq;
  74 };
  75
  76 #define AM65_CPSW_QUIRK_I2027_NO_TX_CSUM BIT(0)
  77
  78 struct am65_cpsw_pdata {
  79         u32     quirks;
  80 };
  81
  82 struct am65_cpsw_common {
  83         struct device           *dev;
  84         struct device           *mdio_dev;
  85         struct am65_cpsw_pdata  pdata;
  86
  87         void __iomem            *ss_base;
  88         void __iomem            *cpsw_base;
  89
  90         u32                     port_num;
  91         struct am65_cpsw_host   host;
  92         struct am65_cpsw_port   *ports;
  93         u32                     disabled_ports_mask;
  94
  95         int                     usage_count; /* number of opened ports */
  96         struct cpsw_ale         *ale;
  97         int                     tx_ch_num;
  98         u32                     rx_flow_id_base;
  99
 100         struct am65_cpsw_tx_chn tx_chns[AM65_CPSW_MAX_TX_QUEUES];
 101         struct completion       tdown_complete;
 102         atomic_t                tdown_cnt;
 103
 104         struct am65_cpsw_rx_chn rx_chns;
 105         struct napi_struct      napi_rx;
 106
 107         u32                     nuss_ver;
 108         u32                     cpsw_ver;
 109         unsigned long           bus_freq;
 110         bool                    pf_p0_rx_ptype_rrobin;
 111         struct am65_cpts        *cpts;
 112         int                     est_enabled;
 113 };
 114
 115 struct am65_cpsw_ndev_stats {
 116         u64 tx_packets;
 117         u64 tx_bytes;
 118         u64 rx_packets;
 119         u64 rx_bytes;
 120         struct u64_stats_sync syncp;
 121 };
 122
 123 struct am65_cpsw_ndev_priv {
 124         u32                     msg_enable;
 125         struct am65_cpsw_port   *port;
 126         struct am65_cpsw_ndev_stats __percpu *stats;
 127 };
 128
 129 #define am65_ndev_to_priv(ndev) \
 130         ((struct am65_cpsw_ndev_priv *)netdev_priv(ndev))
 131 #define am65_ndev_to_port(ndev) (am65_ndev_to_priv(ndev)->port)
 132 #define am65_ndev_to_common(ndev) (am65_ndev_to_port(ndev)->common)
 133 #define am65_ndev_to_slave(ndev) (&am65_ndev_to_port(ndev)->slave)
 134
 135 #define am65_common_get_host(common) (&(common)->host)
 136 #define am65_common_get_port(common, id) (&(common)->ports[(id) - 1])
 137
 138 #define am65_cpsw_napi_to_common(pnapi) \
 139         container_of(pnapi, struct am65_cpsw_common, napi_rx)
 140 #define am65_cpsw_napi_to_tx_chn(pnapi) \
 141         container_of(pnapi, struct am65_cpsw_tx_chn, napi_tx)
 142
 143 #define AM65_CPSW_DRV_NAME "am65-cpsw-nuss"
 144
 145 #define AM65_CPSW_IS_CPSW2G(common) ((common)->port_num == 1)
 146
 147 extern const struct ethtool_ops am65_cpsw_ethtool_ops_slave;
 148
 149 void am65_cpsw_nuss_adjust_link(struct net_device *ndev);
 150 void am65_cpsw_nuss_set_p0_ptype(struct am65_cpsw_common *common);
 151 void am65_cpsw_nuss_remove_tx_chns(struct am65_cpsw_common *common);
 152 int am65_cpsw_nuss_update_tx_chns(struct am65_cpsw_common *common, int num_tx);
 153
 154 #endif /* AM65_CPSW_NUSS_H_ */