drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*******************************************************************************
   3   This contains the functions to handle the platform driver.
   4
   5   Copyright (C) 2007-2011  STMicroelectronics Ltd
   6
   7
   8   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
   9 *******************************************************************************/
  10
  11 #include <linux/platform_device.h>
  12 #include <linux/pm_runtime.h>
  13 #include <linux/module.h>
  14 #include <linux/io.h>
  15 #include <linux/of.h>
  16 #include <linux/of_net.h>
  17 #include <linux/of_device.h>
  18 #include <linux/of_mdio.h>
  19
  20 #include "stmmac.h"
  21 #include "stmmac_platform.h"
  22
  23 #ifdef CONFIG_OF
  24
  25 /**
  26  * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
  27  * @dev: struct device of the platform device
  28  * @mcast_bins: Multicast filtering bins
  29  * Description:
  30  * this function validates the number of Multicast filtering bins specified
  31  * by the configuration through the device tree. The Synopsys GMAC supports
  32  * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
  33  * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
  34  * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is
  35  * invalid and will cause the filtering algorithm to use Multicast
  36  * promiscuous mode.
  37  */
  38 static int dwmac1000_validate_mcast_bins(struct device *dev, int mcast_bins)
  39 {
  40         int x = mcast_bins;
  41
  42         switch (x) {
  43         case HASH_TABLE_SIZE:
  44         case 128:
  45         case 256:
  46                 break;
  47         default:
  48                 x = 0;
  49                 dev_info(dev, "Hash table entries set to unexpected value %d\n",
  50                          mcast_bins);
  51                 break;
  52         }
  53         return x;
  54 }
  55
  56 /**
  57  * dwmac1000_validate_ucast_entries - validate the Unicast address entries
  58  * @dev: struct device of the platform device
  59  * @ucast_entries: number of Unicast address entries
  60  * Description:
  61  * This function validates the number of Unicast address entries supported
  62  * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
  63  * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter
  64  * logic. This function validates a valid, supported configuration is
  65  * selected, and defaults to 1 Unicast address if an unsupported
  66  * configuration is selected.
  67  */
  68 static int dwmac1000_validate_ucast_entries(struct device *dev,
  69                                             int ucast_entries)
  70 {
  71         int x = ucast_entries;
  72
  73         switch (x) {
  74         case 1 ... 32:
  75         case 64:
  76         case 128:
  77                 break;
  78         default:
  79                 x = 1;
  80                 dev_info(dev, "Unicast table entries set to unexpected value %d\n",
  81                          ucast_entries);
  82                 break;
  83         }
  84         return x;
  85 }
  86
  87 /**
  88  * stmmac_axi_setup - parse DT parameters for programming the AXI register
  89  * @pdev: platform device
  90  * Description:
  91  * if required, from device-tree the AXI internal register can be tuned
  92  * by using platform parameters.
  93  */
  94 static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
  95 {
  96         struct device_node *np;
  97         struct stmmac_axi *axi;
  98
  99         np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0);
 100         if (!np)
 101                 return NULL;
 102
 103         axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL);
 104         if (!axi) {
 105                 of_node_put(np);
 106                 return ERR_PTR(-ENOMEM);
 107         }
 108
 109         axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
 110         axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
 111         axi->axi_kbbe = of_property_read_bool(np, "snps,kbbe");
 112         axi->axi_fb = of_property_read_bool(np, "snps,fb");
 113         axi->axi_mb = of_property_read_bool(np, "snps,mb");
 114         axi->axi_rb =  of_property_read_bool(np, "snps,rb");
 115
 116         if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt))
 117                 axi->axi_wr_osr_lmt = 1;
 118         if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
 119                 axi->axi_rd_osr_lmt = 1;
 120         of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
 121         of_node_put(np);
 122
 123         return axi;
 124 }
 125
 126 /**
 127  * stmmac_mtl_setup - parse DT parameters for multiple queues configuration
 128  * @pdev: platform device
 129  * @plat: enet data
 130  */
 131 static int stmmac_mtl_setup(struct platform_device *pdev,
 132                             struct plat_stmmacenet_data *plat)
 133 {
 134         struct device_node *q_node;
 135         struct device_node *rx_node;
 136         struct device_node *tx_node;
 137         u8 queue = 0;
 138         int ret = 0;
 139
 140         /* For backwards-compatibility with device trees that don't have any
 141          * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back
 142          * to one RX and TX queues each.
 143          */
 144         plat->rx_queues_to_use = 1;
 145         plat->tx_queues_to_use = 1;
 146
 147         /* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need
 148          * to always set this, otherwise Queue will be classified as AVB
 149          * (because MTL_QUEUE_AVB = 0).
 150          */
 151         plat->rx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
 152         plat->tx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
 153
 154         rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0);
 155         if (!rx_node)
 156                 return ret;
 157
 158         tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0);
 159         if (!tx_node) {
 160                 of_node_put(rx_node);
 161                 return ret;
 162         }
 163
 164         /* Processing RX queues common config */
 165         if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",
 166                                  &plat->rx_queues_to_use))
 167                 plat->rx_queues_to_use = 1;
 168
 169         if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
 170                 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
 171         else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp"))
 172                 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP;
 173         else
 174                 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
 175
 176         /* Processing individual RX queue config */
 177         for_each_child_of_node(rx_node, q_node) {
 178                 if (queue >= plat->rx_queues_to_use)
 179                         break;
 180
 181                 if (of_property_read_bool(q_node, "snps,dcb-algorithm"))
 182                         plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
 183                 else if (of_property_read_bool(q_node, "snps,avb-algorithm"))
 184                         plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
 185                 else
 186                         plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
 187
 188                 if (of_property_read_u32(q_node, "snps,map-to-dma-channel",
 189                                          &plat->rx_queues_cfg[queue].chan))
 190                         plat->rx_queues_cfg[queue].chan = queue;
 191                 /* TODO: Dynamic mapping to be included in the future */
 192
 193                 if (of_property_read_u32(q_node, "snps,priority",
 194                                         &plat->rx_queues_cfg[queue].prio)) {
 195                         plat->rx_queues_cfg[queue].prio = 0;
 196                         plat->rx_queues_cfg[queue].use_prio = false;
 197                 } else {
 198                         plat->rx_queues_cfg[queue].use_prio = true;
 199                 }
 200
 201                 /* RX queue specific packet type routing */
 202                 if (of_property_read_bool(q_node, "snps,route-avcp"))
 203                         plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ;
 204                 else if (of_property_read_bool(q_node, "snps,route-ptp"))
 205                         plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ;
 206                 else if (of_property_read_bool(q_node, "snps,route-dcbcp"))
 207                         plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ;
 208                 else if (of_property_read_bool(q_node, "snps,route-up"))
 209                         plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
 210                 else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
 211                         plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
 212                 else
 213                         plat->rx_queues_cfg[queue].pkt_route = 0x0;
 214
 215                 queue++;
 216         }
 217         if (queue != plat->rx_queues_to_use) {
 218                 ret = -EINVAL;
 219                 dev_err(&pdev->dev, "Not all RX queues were configured\n");
 220                 goto out;
 221         }
 222
 223         /* Processing TX queues common config */
 224         if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",
 225                                  &plat->tx_queues_to_use))
 226                 plat->tx_queues_to_use = 1;
 227
 228         if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
 229                 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
 230         else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq"))
 231                 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ;
 232         else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr"))
 233                 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR;
 234         else if (of_property_read_bool(tx_node, "snps,tx-sched-sp"))
 235                 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
 236         else
 237                 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
 238
 239         queue = 0;
 240
 241         /* Processing individual TX queue config */
 242         for_each_child_of_node(tx_node, q_node) {
 243                 if (queue >= plat->tx_queues_to_use)
 244                         break;
 245
 246                 if (of_property_read_u32(q_node, "snps,weight",
 247                                          &plat->tx_queues_cfg[queue].weight))
 248                         plat->tx_queues_cfg[queue].weight = 0x10 + queue;
 249
 250                 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
 251                         plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
 252                 } else if (of_property_read_bool(q_node,
 253                                                  "snps,avb-algorithm")) {
 254                         plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
 255
 256                         /* Credit Base Shaper parameters used by AVB */
 257                         if (of_property_read_u32(q_node, "snps,send_slope",
 258                                 &plat->tx_queues_cfg[queue].send_slope))
 259                                 plat->tx_queues_cfg[queue].send_slope = 0x0;
 260                         if (of_property_read_u32(q_node, "snps,idle_slope",
 261                                 &plat->tx_queues_cfg[queue].idle_slope))
 262                                 plat->tx_queues_cfg[queue].idle_slope = 0x0;
 263                         if (of_property_read_u32(q_node, "snps,high_credit",
 264                                 &plat->tx_queues_cfg[queue].high_credit))
 265                                 plat->tx_queues_cfg[queue].high_credit = 0x0;
 266                         if (of_property_read_u32(q_node, "snps,low_credit",
 267                                 &plat->tx_queues_cfg[queue].low_credit))
 268                                 plat->tx_queues_cfg[queue].low_credit = 0x0;
 269                 } else {
 270                         plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
 271                 }
 272
 273                 if (of_property_read_u32(q_node, "snps,priority",
 274                                         &plat->tx_queues_cfg[queue].prio)) {
 275                         plat->tx_queues_cfg[queue].prio = 0;
 276                         plat->tx_queues_cfg[queue].use_prio = false;
 277                 } else {
 278                         plat->tx_queues_cfg[queue].use_prio = true;
 279                 }
 280
 281                 queue++;
 282         }
 283         if (queue != plat->tx_queues_to_use) {
 284                 ret = -EINVAL;
 285                 dev_err(&pdev->dev, "Not all TX queues were configured\n");
 286                 goto out;
 287         }
 288
 289 out:
 290         of_node_put(rx_node);
 291         of_node_put(tx_node);
 292         of_node_put(q_node);
 293
 294         return ret;
 295 }
 296
 297 /**
 298  * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources
 299  * @plat: driver data platform structure
 300  * @np: device tree node
 301  * @dev: device pointer
 302  * Description:
 303  * The mdio bus will be allocated in case of a phy transceiver is on board;
 304  * it will be NULL if the fixed-link is configured.
 305  * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated
 306  * in any case (for DSA, mdio must be registered even if fixed-link).
 307  * The table below sums the supported configurations:
 308  *      -------------------------------
 309  *      snps,phy-addr   |     Y
 310  *      -------------------------------
 311  *      phy-handle      |     Y
 312  *      -------------------------------
 313  *      fixed-link      |     N
 314  *      -------------------------------
 315  *      snps,dwmac-mdio |
 316  *        even if       |     Y
 317  *      fixed-link      |
 318  *      -------------------------------
 319  *
 320  * It returns 0 in case of success otherwise -ENODEV.
 321  */
 322 static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
 323                          struct device_node *np, struct device *dev)
 324 {
 325         bool mdio = !of_phy_is_fixed_link(np);
 326         static const struct of_device_id need_mdio_ids[] = {
 327                 { .compatible = "snps,dwc-qos-ethernet-4.10" },
 328                 {},
 329         };
 330
 331         if (of_match_node(need_mdio_ids, np)) {
 332                 plat->mdio_node = of_get_child_by_name(np, "mdio");
 333         } else {
 334                 /**
 335                  * If snps,dwmac-mdio is passed from DT, always register
 336                  * the MDIO
 337                  */
 338                 for_each_child_of_node(np, plat->mdio_node) {
 339                         if (of_device_is_compatible(plat->mdio_node,
 340                                                     "snps,dwmac-mdio"))
 341                                 break;
 342                 }
 343         }
 344
 345         if (plat->mdio_node) {
 346                 dev_dbg(dev, "Found MDIO subnode\n");
 347                 mdio = true;
 348         }
 349
 350         if (mdio) {
 351                 plat->mdio_bus_data =
 352                         devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data),
 353                                      GFP_KERNEL);
 354                 if (!plat->mdio_bus_data)
 355                         return -ENOMEM;
 356
 357                 plat->mdio_bus_data->needs_reset = true;
 358         }
 359
 360         return 0;
 361 }
 362
 363 /**
 364  * stmmac_of_get_mac_mode - retrieves the interface of the MAC
 365  * @np: - device-tree node
 366  * Description:
 367  * Similar to `of_get_phy_mode()`, this function will retrieve (from
 368  * the device-tree) the interface mode on the MAC side. This assumes
 369  * that there is mode converter in-between the MAC & PHY
 370  * (e.g. GMII-to-RGMII).
 371  */
 372 static int stmmac_of_get_mac_mode(struct device_node *np)
 373 {
 374         const char *pm;
 375         int err, i;
 376
 377         err = of_property_read_string(np, "mac-mode", &pm);
 378         if (err < 0)
 379                 return err;
 380
 381         for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) {
 382                 if (!strcasecmp(pm, phy_modes(i)))
 383                         return i;
 384         }
 385
 386         return -ENODEV;
 387 }
 388
 389 /**
 390  * stmmac_probe_config_dt - parse device-tree driver parameters
 391  * @pdev: platform_device structure
 392  * @mac: MAC address to use
 393  * Description:
 394  * this function is to read the driver parameters from device-tree and
 395  * set some private fields that will be used by the main at runtime.
 396  */
 397 struct plat_stmmacenet_data *
 398 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
 399 {
 400         struct device_node *np = pdev->dev.of_node;
 401         struct plat_stmmacenet_data *plat;
 402         struct stmmac_dma_cfg *dma_cfg;
 403         int phy_mode;
 404         int rc;
 405
 406         plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
 407         if (!plat)
 408                 return ERR_PTR(-ENOMEM);
 409
 410         *mac = of_get_mac_address(np);
 411         if (IS_ERR(*mac)) {
 412                 if (PTR_ERR(*mac) == -EPROBE_DEFER)
 413                         return ERR_CAST(*mac);
 414
 415                 *mac = NULL;
 416         }
 417
 418         phy_mode = device_get_phy_mode(&pdev->dev);
 419         if (phy_mode < 0)
 420                 return ERR_PTR(phy_mode);
 421
 422         plat->phy_interface = phy_mode;
 423         plat->interface = stmmac_of_get_mac_mode(np);
 424         if (plat->interface < 0)
 425                 plat->interface = plat->phy_interface;
 426
 427         /* Some wrapper drivers still rely on phy_node. Let's save it while
 428          * they are not converted to phylink. */
 429         plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
 430
 431         /* PHYLINK automatically parses the phy-handle property */
 432         plat->phylink_node = np;
 433
 434         /* Get max speed of operation from device tree */
 435         of_property_read_u32(np, "max-speed", &plat->max_speed);
 436
 437         plat->bus_id = of_alias_get_id(np, "ethernet");
 438         if (plat->bus_id < 0)
 439                 plat->bus_id = 0;
 440
 441         /* Default to phy auto-detection */
 442         plat->phy_addr = -1;
 443
 444         /* Default to get clk_csr from stmmac_clk_crs_set(),
 445          * or get clk_csr from device tree.
 446          */
 447         plat->clk_csr = -1;
 448         of_property_read_u32(np, "clk_csr", &plat->clk_csr);
 449
 450         /* "snps,phy-addr" is not a standard property. Mark it as deprecated
 451          * and warn of its use. Remove this when phy node support is added.
 452          */
 453         if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
 454                 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
 455
 456         /* To Configure PHY by using all device-tree supported properties */
 457         rc = stmmac_dt_phy(plat, np, &pdev->dev);
 458         if (rc)
 459                 return ERR_PTR(rc);
 460
 461         of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
 462
 463         of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
 464
 465         plat->force_sf_dma_mode =
 466                 of_property_read_bool(np, "snps,force_sf_dma_mode");
 467
 468         plat->en_tx_lpi_clockgating =
 469                 of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
 470
 471         /* Set the maxmtu to a default of JUMBO_LEN in case the
 472          * parameter is not present in the device tree.
 473          */
 474         plat->maxmtu = JUMBO_LEN;
 475
 476         /* Set default value for multicast hash bins */
 477         plat->multicast_filter_bins = HASH_TABLE_SIZE;
 478
 479         /* Set default value for unicast filter entries */
 480         plat->unicast_filter_entries = 1;
 481
 482         /*
 483          * Currently only the properties needed on SPEAr600
 484          * are provided. All other properties should be added
 485          * once needed on other platforms.
 486          */
 487         if (of_device_is_compatible(np, "st,spear600-gmac") ||
 488                 of_device_is_compatible(np, "snps,dwmac-3.50a") ||
 489                 of_device_is_compatible(np, "snps,dwmac-3.70a") ||
 490                 of_device_is_compatible(np, "snps,dwmac")) {
 491                 /* Note that the max-frame-size parameter as defined in the
 492                  * ePAPR v1.1 spec is defined as max-frame-size, it's
 493                  * actually used as the IEEE definition of MAC Client
 494                  * data, or MTU. The ePAPR specification is confusing as
 495                  * the definition is max-frame-size, but usage examples
 496                  * are clearly MTUs
 497                  */
 498                 of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
 499                 of_property_read_u32(np, "snps,multicast-filter-bins",
 500                                      &plat->multicast_filter_bins);
 501                 of_property_read_u32(np, "snps,perfect-filter-entries",
 502                                      &plat->unicast_filter_entries);
 503                 plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
 504                                 &pdev->dev, plat->unicast_filter_entries);
 505                 plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
 506                                 &pdev->dev, plat->multicast_filter_bins);
 507                 plat->has_gmac = 1;
 508                 plat->pmt = 1;
 509         }
 510
 511         if (of_device_is_compatible(np, "snps,dwmac-3.40a")) {
 512                 plat->has_gmac = 1;
 513                 plat->enh_desc = 1;
 514                 plat->tx_coe = 1;
 515                 plat->bugged_jumbo = 1;
 516                 plat->pmt = 1;
 517         }
 518
 519         if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
 520             of_device_is_compatible(np, "snps,dwmac-4.10a") ||
 521             of_device_is_compatible(np, "snps,dwmac-4.20a") ||
 522             of_device_is_compatible(np, "snps,dwmac-5.10a")) {
 523                 plat->has_gmac4 = 1;
 524                 plat->has_gmac = 0;
 525                 plat->pmt = 1;
 526                 plat->tso_en = of_property_read_bool(np, "snps,tso");
 527         }
 528
 529         if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
 530                 of_device_is_compatible(np, "snps,dwmac-3.710")) {
 531                 plat->enh_desc = 1;
 532                 plat->bugged_jumbo = 1;
 533                 plat->force_sf_dma_mode = 1;
 534         }
 535
 536         if (of_device_is_compatible(np, "snps,dwxgmac")) {
 537                 plat->has_xgmac = 1;
 538                 plat->pmt = 1;
 539                 plat->tso_en = of_property_read_bool(np, "snps,tso");
 540         }
 541
 542         dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
 543                                GFP_KERNEL);
 544         if (!dma_cfg) {
 545                 stmmac_remove_config_dt(pdev, plat);
 546                 return ERR_PTR(-ENOMEM);
 547         }
 548         plat->dma_cfg = dma_cfg;
 549
 550         of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
 551         if (!dma_cfg->pbl)
 552                 dma_cfg->pbl = DEFAULT_DMA_PBL;
 553         of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
 554         of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
 555         dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
 556
 557         dma_cfg->aal = of_property_read_bool(np, "snps,aal");
 558         dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
 559         dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
 560
 561         plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
 562         if (plat->force_thresh_dma_mode && plat->force_sf_dma_mode) {
 563                 plat->force_sf_dma_mode = 0;
 564                 dev_warn(&pdev->dev,
 565                          "force_sf_dma_mode is ignored if force_thresh_dma_mode is set.\n");
 566         }
 567
 568         of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
 569
 570         plat->axi = stmmac_axi_setup(pdev);
 571
 572         rc = stmmac_mtl_setup(pdev, plat);
 573         if (rc) {
 574                 stmmac_remove_config_dt(pdev, plat);
 575                 return ERR_PTR(rc);
 576         }
 577
 578         /* clock setup */
 579         if (!of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
 580                 plat->stmmac_clk = devm_clk_get(&pdev->dev,
 581                                                 STMMAC_RESOURCE_NAME);
 582                 if (IS_ERR(plat->stmmac_clk)) {
 583                         dev_warn(&pdev->dev, "Cannot get CSR clock\n");
 584                         plat->stmmac_clk = NULL;
 585                 }
 586                 clk_prepare_enable(plat->stmmac_clk);
 587         }
 588
 589         plat->pclk = devm_clk_get(&pdev->dev, "pclk");
 590         if (IS_ERR(plat->pclk)) {
 591                 if (PTR_ERR(plat->pclk) == -EPROBE_DEFER)
 592                         goto error_pclk_get;
 593
 594                 plat->pclk = NULL;
 595         }
 596         clk_prepare_enable(plat->pclk);
 597
 598         /* Fall-back to main clock in case of no PTP ref is passed */
 599         plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
 600         if (IS_ERR(plat->clk_ptp_ref)) {
 601                 plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
 602                 plat->clk_ptp_ref = NULL;
 603                 dev_info(&pdev->dev, "PTP uses main clock\n");
 604         } else {
 605                 plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
 606                 dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate);
 607         }
 608
 609         plat->stmmac_rst = devm_reset_control_get(&pdev->dev,
 610                                                   STMMAC_RESOURCE_NAME);
 611         if (IS_ERR(plat->stmmac_rst)) {
 612                 if (PTR_ERR(plat->stmmac_rst) == -EPROBE_DEFER)
 613                         goto error_hw_init;
 614
 615                 dev_info(&pdev->dev, "no reset control found\n");
 616                 plat->stmmac_rst = NULL;
 617         }
 618
 619         return plat;
 620
 621 error_hw_init:
 622         clk_disable_unprepare(plat->pclk);
 623 error_pclk_get:
 624         clk_disable_unprepare(plat->stmmac_clk);
 625
 626         return ERR_PTR(-EPROBE_DEFER);
 627 }
 628
 629 /**
 630  * stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt()
 631  * @pdev: platform_device structure
 632  * @plat: driver data platform structure
 633  *
 634  * Release resources claimed by stmmac_probe_config_dt().
 635  */
 636 void stmmac_remove_config_dt(struct platform_device *pdev,
 637                              struct plat_stmmacenet_data *plat)
 638 {
 639         clk_disable_unprepare(plat->stmmac_clk);
 640         clk_disable_unprepare(plat->pclk);
 641         of_node_put(plat->phy_node);
 642         of_node_put(plat->mdio_node);
 643 }
 644 #else
 645 struct plat_stmmacenet_data *
 646 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
 647 {
 648         return ERR_PTR(-EINVAL);
 649 }
 650
 651 void stmmac_remove_config_dt(struct platform_device *pdev,
 652                              struct plat_stmmacenet_data *plat)
 653 {
 654 }
 655 #endif /* CONFIG_OF */
 656 EXPORT_SYMBOL_GPL(stmmac_probe_config_dt);
 657 EXPORT_SYMBOL_GPL(stmmac_remove_config_dt);
 658
 659 int stmmac_get_platform_resources(struct platform_device *pdev,
 660                                   struct stmmac_resources *stmmac_res)
 661 {
 662         memset(stmmac_res, 0, sizeof(*stmmac_res));
 663
 664         /* Get IRQ information early to have an ability to ask for deferred
 665          * probe if needed before we went too far with resource allocation.
 666          */
 667         stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
 668         if (stmmac_res->irq < 0)
 669                 return stmmac_res->irq;
 670
 671         /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
 672          * The external wake up irq can be passed through the platform code
 673          * named as "eth_wake_irq"
 674          *
 675          * In case the wake up interrupt is not passed from the platform
 676          * so the driver will continue to use the mac irq (ndev->irq)
 677          */
 678         stmmac_res->wol_irq =
 679                 platform_get_irq_byname_optional(pdev, "eth_wake_irq");
 680         if (stmmac_res->wol_irq < 0) {
 681                 if (stmmac_res->wol_irq == -EPROBE_DEFER)
 682                         return -EPROBE_DEFER;
 683                 dev_info(&pdev->dev, "IRQ eth_wake_irq not found\n");
 684                 stmmac_res->wol_irq = stmmac_res->irq;
 685         }
 686
 687         stmmac_res->lpi_irq =
 688                 platform_get_irq_byname_optional(pdev, "eth_lpi");
 689         if (stmmac_res->lpi_irq < 0) {
 690                 if (stmmac_res->lpi_irq == -EPROBE_DEFER)
 691                         return -EPROBE_DEFER;
 692                 dev_info(&pdev->dev, "IRQ eth_lpi not found\n");
 693         }
 694
 695         stmmac_res->addr = devm_platform_ioremap_resource(pdev, 0);
 696
 697         return PTR_ERR_OR_ZERO(stmmac_res->addr);
 698 }
 699 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
 700
 701 /**
 702  * stmmac_pltfr_remove
 703  * @pdev: platform device pointer
 704  * Description: this function calls the main to free the net resources
 705  * and calls the platforms hook and release the resources (e.g. mem).
 706  */
 707 int stmmac_pltfr_remove(struct platform_device *pdev)
 708 {
 709         struct net_device *ndev = platform_get_drvdata(pdev);
 710         struct stmmac_priv *priv = netdev_priv(ndev);
 711         struct plat_stmmacenet_data *plat = priv->plat;
 712         int ret = stmmac_dvr_remove(&pdev->dev);
 713
 714         if (plat->exit)
 715                 plat->exit(pdev, plat->bsp_priv);
 716
 717         stmmac_remove_config_dt(pdev, plat);
 718
 719         return ret;
 720 }
 721 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
 722
 723 /**
 724  * stmmac_pltfr_suspend
 725  * @dev: device pointer
 726  * Description: this function is invoked when suspend the driver and it direcly
 727  * call the main suspend function and then, if required, on some platform, it
 728  * can call an exit helper.
 729  */
 730 static int __maybe_unused stmmac_pltfr_suspend(struct device *dev)
 731 {
 732         int ret;
 733         struct net_device *ndev = dev_get_drvdata(dev);
 734         struct stmmac_priv *priv = netdev_priv(ndev);
 735         struct platform_device *pdev = to_platform_device(dev);
 736
 737         ret = stmmac_suspend(dev);
 738         if (priv->plat->exit)
 739                 priv->plat->exit(pdev, priv->plat->bsp_priv);
 740
 741         return ret;
 742 }
 743
 744 /**
 745  * stmmac_pltfr_resume
 746  * @dev: device pointer
 747  * Description: this function is invoked when resume the driver before calling
 748  * the main resume function, on some platforms, it can call own init helper
 749  * if required.
 750  */
 751 static int __maybe_unused stmmac_pltfr_resume(struct device *dev)
 752 {
 753         struct net_device *ndev = dev_get_drvdata(dev);
 754         struct stmmac_priv *priv = netdev_priv(ndev);
 755         struct platform_device *pdev = to_platform_device(dev);
 756
 757         if (priv->plat->init)
 758                 priv->plat->init(pdev, priv->plat->bsp_priv);
 759
 760         return stmmac_resume(dev);
 761 }
 762
 763 static int __maybe_unused stmmac_runtime_suspend(struct device *dev)
 764 {
 765         struct net_device *ndev = dev_get_drvdata(dev);
 766         struct stmmac_priv *priv = netdev_priv(ndev);
 767
 768         stmmac_bus_clks_config(priv, false);
 769
 770         return 0;
 771 }
 772
 773 static int __maybe_unused stmmac_runtime_resume(struct device *dev)
 774 {
 775         struct net_device *ndev = dev_get_drvdata(dev);
 776         struct stmmac_priv *priv = netdev_priv(ndev);
 777
 778         return stmmac_bus_clks_config(priv, true);
 779 }
 780
 781 static int __maybe_unused stmmac_pltfr_noirq_suspend(struct device *dev)
 782 {
 783         struct net_device *ndev = dev_get_drvdata(dev);
 784         struct stmmac_priv *priv = netdev_priv(ndev);
 785         int ret;
 786
 787         if (!netif_running(ndev))
 788                 return 0;
 789
 790         if (!device_may_wakeup(priv->device) || !priv->plat->pmt) {
 791                 /* Disable clock in case of PWM is off */
 792                 clk_disable_unprepare(priv->plat->clk_ptp_ref);
 793
 794                 ret = pm_runtime_force_suspend(dev);
 795                 if (ret)
 796                         return ret;
 797         }
 798
 799         return 0;
 800 }
 801
 802 static int __maybe_unused stmmac_pltfr_noirq_resume(struct device *dev)
 803 {
 804         struct net_device *ndev = dev_get_drvdata(dev);
 805         struct stmmac_priv *priv = netdev_priv(ndev);
 806         int ret;
 807
 808         if (!netif_running(ndev))
 809                 return 0;
 810
 811         if (!device_may_wakeup(priv->device) || !priv->plat->pmt) {
 812                 /* enable the clk previously disabled */
 813                 ret = pm_runtime_force_resume(dev);
 814                 if (ret)
 815                         return ret;
 816
 817                 ret = clk_prepare_enable(priv->plat->clk_ptp_ref);
 818                 if (ret < 0) {
 819                         netdev_warn(priv->dev,
 820                                     "failed to enable PTP reference clock: %pe\n",
 821                                     ERR_PTR(ret));
 822                         return ret;
 823                 }
 824         }
 825
 826         return 0;
 827 }
 828
 829 const struct dev_pm_ops stmmac_pltfr_pm_ops = {
 830         SET_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_suspend, stmmac_pltfr_resume)
 831         SET_RUNTIME_PM_OPS(stmmac_runtime_suspend, stmmac_runtime_resume, NULL)
 832         SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_noirq_suspend, stmmac_pltfr_noirq_resume)
 833 };
 834 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
 835
 836 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
 837 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
 838 MODULE_LICENSE("GPL");