drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

   1 /*******************************************************************************
   2   STMMAC Ethtool support
   3
   4   Copyright (C) 2007-2009  STMicroelectronics Ltd
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  23 *******************************************************************************/
  24
  25 #include <linux/etherdevice.h>
  26 #include <linux/ethtool.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/mii.h>
  29 #include <linux/phy.h>
  30 #include <linux/net_tstamp.h>
  31 #include <asm/io.h>
  32
  33 #include "stmmac.h"
  34 #include "dwmac_dma.h"
  35
  36 #define REG_SPACE_SIZE  0x1054
  37 #define MAC100_ETHTOOL_NAME     "st_mac100"
  38 #define GMAC_ETHTOOL_NAME       "st_gmac"
  39
  40 struct stmmac_stats {
  41         char stat_string[ETH_GSTRING_LEN];
  42         int sizeof_stat;
  43         int stat_offset;
  44 };
  45
  46 #define STMMAC_STAT(m)  \
  47         { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m),       \
  48         offsetof(struct stmmac_priv, xstats.m)}
  49
  50 static const struct stmmac_stats stmmac_gstrings_stats[] = {
  51         /* Transmit errors */
  52         STMMAC_STAT(tx_underflow),
  53         STMMAC_STAT(tx_carrier),
  54         STMMAC_STAT(tx_losscarrier),
  55         STMMAC_STAT(vlan_tag),
  56         STMMAC_STAT(tx_deferred),
  57         STMMAC_STAT(tx_vlan),
  58         STMMAC_STAT(tx_jabber),
  59         STMMAC_STAT(tx_frame_flushed),
  60         STMMAC_STAT(tx_payload_error),
  61         STMMAC_STAT(tx_ip_header_error),
  62         /* Receive errors */
  63         STMMAC_STAT(rx_desc),
  64         STMMAC_STAT(sa_filter_fail),
  65         STMMAC_STAT(overflow_error),
  66         STMMAC_STAT(ipc_csum_error),
  67         STMMAC_STAT(rx_collision),
  68         STMMAC_STAT(rx_crc),
  69         STMMAC_STAT(dribbling_bit),
  70         STMMAC_STAT(rx_length),
  71         STMMAC_STAT(rx_mii),
  72         STMMAC_STAT(rx_multicast),
  73         STMMAC_STAT(rx_gmac_overflow),
  74         STMMAC_STAT(rx_watchdog),
  75         STMMAC_STAT(da_rx_filter_fail),
  76         STMMAC_STAT(sa_rx_filter_fail),
  77         STMMAC_STAT(rx_missed_cntr),
  78         STMMAC_STAT(rx_overflow_cntr),
  79         STMMAC_STAT(rx_vlan),
  80         /* Tx/Rx IRQ error info */
  81         STMMAC_STAT(tx_undeflow_irq),
  82         STMMAC_STAT(tx_process_stopped_irq),
  83         STMMAC_STAT(tx_jabber_irq),
  84         STMMAC_STAT(rx_overflow_irq),
  85         STMMAC_STAT(rx_buf_unav_irq),
  86         STMMAC_STAT(rx_process_stopped_irq),
  87         STMMAC_STAT(rx_watchdog_irq),
  88         STMMAC_STAT(tx_early_irq),
  89         STMMAC_STAT(fatal_bus_error_irq),
  90         /* Tx/Rx IRQ Events */
  91         STMMAC_STAT(rx_early_irq),
  92         STMMAC_STAT(threshold),
  93         STMMAC_STAT(tx_pkt_n),
  94         STMMAC_STAT(rx_pkt_n),
  95         STMMAC_STAT(normal_irq_n),
  96         STMMAC_STAT(rx_normal_irq_n),
  97         STMMAC_STAT(napi_poll),
  98         STMMAC_STAT(tx_normal_irq_n),
  99         STMMAC_STAT(tx_clean),
 100         STMMAC_STAT(tx_set_ic_bit),
 101         STMMAC_STAT(irq_receive_pmt_irq_n),
 102         /* MMC info */
 103         STMMAC_STAT(mmc_tx_irq_n),
 104         STMMAC_STAT(mmc_rx_irq_n),
 105         STMMAC_STAT(mmc_rx_csum_offload_irq_n),
 106         /* EEE */
 107         STMMAC_STAT(irq_tx_path_in_lpi_mode_n),
 108         STMMAC_STAT(irq_tx_path_exit_lpi_mode_n),
 109         STMMAC_STAT(irq_rx_path_in_lpi_mode_n),
 110         STMMAC_STAT(irq_rx_path_exit_lpi_mode_n),
 111         STMMAC_STAT(phy_eee_wakeup_error_n),
 112         /* Extended RDES status */
 113         STMMAC_STAT(ip_hdr_err),
 114         STMMAC_STAT(ip_payload_err),
 115         STMMAC_STAT(ip_csum_bypassed),
 116         STMMAC_STAT(ipv4_pkt_rcvd),
 117         STMMAC_STAT(ipv6_pkt_rcvd),
 118         STMMAC_STAT(no_ptp_rx_msg_type_ext),
 119         STMMAC_STAT(ptp_rx_msg_type_sync),
 120         STMMAC_STAT(ptp_rx_msg_type_follow_up),
 121         STMMAC_STAT(ptp_rx_msg_type_delay_req),
 122         STMMAC_STAT(ptp_rx_msg_type_delay_resp),
 123         STMMAC_STAT(ptp_rx_msg_type_pdelay_req),
 124         STMMAC_STAT(ptp_rx_msg_type_pdelay_resp),
 125         STMMAC_STAT(ptp_rx_msg_type_pdelay_follow_up),
 126         STMMAC_STAT(ptp_rx_msg_type_announce),
 127         STMMAC_STAT(ptp_rx_msg_type_management),
 128         STMMAC_STAT(ptp_rx_msg_pkt_reserved_type),
 129         STMMAC_STAT(ptp_frame_type),
 130         STMMAC_STAT(ptp_ver),
 131         STMMAC_STAT(timestamp_dropped),
 132         STMMAC_STAT(av_pkt_rcvd),
 133         STMMAC_STAT(av_tagged_pkt_rcvd),
 134         STMMAC_STAT(vlan_tag_priority_val),
 135         STMMAC_STAT(l3_filter_match),
 136         STMMAC_STAT(l4_filter_match),
 137         STMMAC_STAT(l3_l4_filter_no_match),
 138         /* PCS */
 139         STMMAC_STAT(irq_pcs_ane_n),
 140         STMMAC_STAT(irq_pcs_link_n),
 141         STMMAC_STAT(irq_rgmii_n),
 142         /* DEBUG */
 143         STMMAC_STAT(mtl_tx_status_fifo_full),
 144         STMMAC_STAT(mtl_tx_fifo_not_empty),
 145         STMMAC_STAT(mmtl_fifo_ctrl),
 146         STMMAC_STAT(mtl_tx_fifo_read_ctrl_write),
 147         STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait),
 148         STMMAC_STAT(mtl_tx_fifo_read_ctrl_read),
 149         STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle),
 150         STMMAC_STAT(mac_tx_in_pause),
 151         STMMAC_STAT(mac_tx_frame_ctrl_xfer),
 152         STMMAC_STAT(mac_tx_frame_ctrl_idle),
 153         STMMAC_STAT(mac_tx_frame_ctrl_wait),
 154         STMMAC_STAT(mac_tx_frame_ctrl_pause),
 155         STMMAC_STAT(mac_gmii_tx_proto_engine),
 156         STMMAC_STAT(mtl_rx_fifo_fill_level_full),
 157         STMMAC_STAT(mtl_rx_fifo_fill_above_thresh),
 158         STMMAC_STAT(mtl_rx_fifo_fill_below_thresh),
 159         STMMAC_STAT(mtl_rx_fifo_fill_level_empty),
 160         STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush),
 161         STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data),
 162         STMMAC_STAT(mtl_rx_fifo_read_ctrl_status),
 163         STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle),
 164         STMMAC_STAT(mtl_rx_fifo_ctrl_active),
 165         STMMAC_STAT(mac_rx_frame_ctrl_fifo),
 166         STMMAC_STAT(mac_gmii_rx_proto_engine),
 167         /* TSO */
 168         STMMAC_STAT(tx_tso_frames),
 169         STMMAC_STAT(tx_tso_nfrags),
 170 };
 171 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
 172
 173 /* HW MAC Management counters (if supported) */
 174 #define STMMAC_MMC_STAT(m)      \
 175         { #m, FIELD_SIZEOF(struct stmmac_counters, m),  \
 176         offsetof(struct stmmac_priv, mmc.m)}
 177
 178 static const struct stmmac_stats stmmac_mmc[] = {
 179         STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
 180         STMMAC_MMC_STAT(mmc_tx_framecount_gb),
 181         STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
 182         STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
 183         STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
 184         STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
 185         STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
 186         STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
 187         STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
 188         STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
 189         STMMAC_MMC_STAT(mmc_tx_unicast_gb),
 190         STMMAC_MMC_STAT(mmc_tx_multicast_gb),
 191         STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
 192         STMMAC_MMC_STAT(mmc_tx_underflow_error),
 193         STMMAC_MMC_STAT(mmc_tx_singlecol_g),
 194         STMMAC_MMC_STAT(mmc_tx_multicol_g),
 195         STMMAC_MMC_STAT(mmc_tx_deferred),
 196         STMMAC_MMC_STAT(mmc_tx_latecol),
 197         STMMAC_MMC_STAT(mmc_tx_exesscol),
 198         STMMAC_MMC_STAT(mmc_tx_carrier_error),
 199         STMMAC_MMC_STAT(mmc_tx_octetcount_g),
 200         STMMAC_MMC_STAT(mmc_tx_framecount_g),
 201         STMMAC_MMC_STAT(mmc_tx_excessdef),
 202         STMMAC_MMC_STAT(mmc_tx_pause_frame),
 203         STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
 204         STMMAC_MMC_STAT(mmc_rx_framecount_gb),
 205         STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
 206         STMMAC_MMC_STAT(mmc_rx_octetcount_g),
 207         STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
 208         STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
 209         STMMAC_MMC_STAT(mmc_rx_crc_error),
 210         STMMAC_MMC_STAT(mmc_rx_align_error),
 211         STMMAC_MMC_STAT(mmc_rx_run_error),
 212         STMMAC_MMC_STAT(mmc_rx_jabber_error),
 213         STMMAC_MMC_STAT(mmc_rx_undersize_g),
 214         STMMAC_MMC_STAT(mmc_rx_oversize_g),
 215         STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
 216         STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
 217         STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
 218         STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
 219         STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
 220         STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
 221         STMMAC_MMC_STAT(mmc_rx_unicast_g),
 222         STMMAC_MMC_STAT(mmc_rx_length_error),
 223         STMMAC_MMC_STAT(mmc_rx_autofrangetype),
 224         STMMAC_MMC_STAT(mmc_rx_pause_frames),
 225         STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
 226         STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
 227         STMMAC_MMC_STAT(mmc_rx_watchdog_error),
 228         STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
 229         STMMAC_MMC_STAT(mmc_rx_ipc_intr),
 230         STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
 231         STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
 232         STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
 233         STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
 234         STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
 235         STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
 236         STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
 237         STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
 238         STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
 239         STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
 240         STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
 241         STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
 242         STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
 243         STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
 244         STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
 245         STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
 246         STMMAC_MMC_STAT(mmc_rx_udp_gd),
 247         STMMAC_MMC_STAT(mmc_rx_udp_err),
 248         STMMAC_MMC_STAT(mmc_rx_tcp_gd),
 249         STMMAC_MMC_STAT(mmc_rx_tcp_err),
 250         STMMAC_MMC_STAT(mmc_rx_icmp_gd),
 251         STMMAC_MMC_STAT(mmc_rx_icmp_err),
 252         STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
 253         STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
 254         STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
 255         STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
 256         STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
 257         STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
 258 };
 259 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc)
 260
 261 static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
 262                                       struct ethtool_drvinfo *info)
 263 {
 264         struct stmmac_priv *priv = netdev_priv(dev);
 265
 266         if (priv->plat->has_gmac)
 267                 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
 268         else
 269                 strlcpy(info->driver, MAC100_ETHTOOL_NAME,
 270                         sizeof(info->driver));
 271
 272         strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
 273 }
 274
 275 static int stmmac_ethtool_getsettings(struct net_device *dev,
 276                                       struct ethtool_cmd *cmd)
 277 {
 278         struct stmmac_priv *priv = netdev_priv(dev);
 279         struct phy_device *phy = priv->phydev;
 280         int rc;
 281
 282         if (priv->hw->pcs & STMMAC_PCS_RGMII ||
 283             priv->hw->pcs & STMMAC_PCS_SGMII) {
 284                 struct rgmii_adv adv;
 285
 286                 if (!priv->xstats.pcs_link) {
 287                         ethtool_cmd_speed_set(cmd, SPEED_UNKNOWN);
 288                         cmd->duplex = DUPLEX_UNKNOWN;
 289                         return 0;
 290                 }
 291                 cmd->duplex = priv->xstats.pcs_duplex;
 292
 293                 ethtool_cmd_speed_set(cmd, priv->xstats.pcs_speed);
 294
 295                 /* Get and convert ADV/LP_ADV from the HW AN registers */
 296                 if (!priv->hw->mac->pcs_get_adv_lp)
 297                         return -EOPNOTSUPP;     /* should never happen indeed */
 298
 299                 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv);
 300
 301                 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */
 302
 303                 if (adv.pause & STMMAC_PCS_PAUSE)
 304                         cmd->advertising |= ADVERTISED_Pause;
 305                 if (adv.pause & STMMAC_PCS_ASYM_PAUSE)
 306                         cmd->advertising |= ADVERTISED_Asym_Pause;
 307                 if (adv.lp_pause & STMMAC_PCS_PAUSE)
 308                         cmd->lp_advertising |= ADVERTISED_Pause;
 309                 if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE)
 310                         cmd->lp_advertising |= ADVERTISED_Asym_Pause;
 311
 312                 /* Reg49[3] always set because ANE is always supported */
 313                 cmd->autoneg = ADVERTISED_Autoneg;
 314                 cmd->supported |= SUPPORTED_Autoneg;
 315                 cmd->advertising |= ADVERTISED_Autoneg;
 316                 cmd->lp_advertising |= ADVERTISED_Autoneg;
 317
 318                 if (adv.duplex) {
 319                         cmd->supported |= (SUPPORTED_1000baseT_Full |
 320                                            SUPPORTED_100baseT_Full |
 321                                            SUPPORTED_10baseT_Full);
 322                         cmd->advertising |= (ADVERTISED_1000baseT_Full |
 323                                              ADVERTISED_100baseT_Full |
 324                                              ADVERTISED_10baseT_Full);
 325                 } else {
 326                         cmd->supported |= (SUPPORTED_1000baseT_Half |
 327                                            SUPPORTED_100baseT_Half |
 328                                            SUPPORTED_10baseT_Half);
 329                         cmd->advertising |= (ADVERTISED_1000baseT_Half |
 330                                              ADVERTISED_100baseT_Half |
 331                                              ADVERTISED_10baseT_Half);
 332                 }
 333                 if (adv.lp_duplex)
 334                         cmd->lp_advertising |= (ADVERTISED_1000baseT_Full |
 335                                                 ADVERTISED_100baseT_Full |
 336                                                 ADVERTISED_10baseT_Full);
 337                 else
 338                         cmd->lp_advertising |= (ADVERTISED_1000baseT_Half |
 339                                                 ADVERTISED_100baseT_Half |
 340                                                 ADVERTISED_10baseT_Half);
 341                 cmd->port = PORT_OTHER;
 342
 343                 return 0;
 344         }
 345
 346         if (phy == NULL) {
 347                 pr_err("%s: %s: PHY is not registered\n",
 348                        __func__, dev->name);
 349                 return -ENODEV;
 350         }
 351         if (!netif_running(dev)) {
 352                 pr_err("%s: interface is disabled: we cannot track "
 353                 "link speed / duplex setting\n", dev->name);
 354                 return -EBUSY;
 355         }
 356         cmd->transceiver = XCVR_INTERNAL;
 357         rc = phy_ethtool_gset(phy, cmd);
 358         return rc;
 359 }
 360
 361 static int stmmac_ethtool_setsettings(struct net_device *dev,
 362                                       struct ethtool_cmd *cmd)
 363 {
 364         struct stmmac_priv *priv = netdev_priv(dev);
 365         struct phy_device *phy = priv->phydev;
 366         int rc;
 367
 368         if (priv->hw->pcs & STMMAC_PCS_RGMII ||
 369             priv->hw->pcs & STMMAC_PCS_SGMII) {
 370                 u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause;
 371
 372                 /* Only support ANE */
 373                 if (cmd->autoneg != AUTONEG_ENABLE)
 374                         return -EINVAL;
 375
 376                 mask &= (ADVERTISED_1000baseT_Half |
 377                         ADVERTISED_1000baseT_Full |
 378                         ADVERTISED_100baseT_Half |
 379                         ADVERTISED_100baseT_Full |
 380                         ADVERTISED_10baseT_Half |
 381                         ADVERTISED_10baseT_Full);
 382
 383                 spin_lock(&priv->lock);
 384
 385                 if (priv->hw->mac->pcs_ctrl_ane)
 386                         priv->hw->mac->pcs_ctrl_ane(priv->ioaddr, 1,
 387                                                     priv->hw->ps, 0);
 388
 389                 spin_unlock(&priv->lock);
 390
 391                 return 0;
 392         }
 393
 394         spin_lock(&priv->lock);
 395         rc = phy_ethtool_sset(phy, cmd);
 396         spin_unlock(&priv->lock);
 397
 398         return rc;
 399 }
 400
 401 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
 402 {
 403         struct stmmac_priv *priv = netdev_priv(dev);
 404         return priv->msg_enable;
 405 }
 406
 407 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
 408 {
 409         struct stmmac_priv *priv = netdev_priv(dev);
 410         priv->msg_enable = level;
 411
 412 }
 413
 414 static int stmmac_check_if_running(struct net_device *dev)
 415 {
 416         if (!netif_running(dev))
 417                 return -EBUSY;
 418         return 0;
 419 }
 420
 421 static int stmmac_ethtool_get_regs_len(struct net_device *dev)
 422 {
 423         return REG_SPACE_SIZE;
 424 }
 425
 426 static void stmmac_ethtool_gregs(struct net_device *dev,
 427                           struct ethtool_regs *regs, void *space)
 428 {
 429         int i;
 430         u32 *reg_space = (u32 *) space;
 431
 432         struct stmmac_priv *priv = netdev_priv(dev);
 433
 434         memset(reg_space, 0x0, REG_SPACE_SIZE);
 435
 436         if (!priv->plat->has_gmac) {
 437                 /* MAC registers */
 438                 for (i = 0; i < 12; i++)
 439                         reg_space[i] = readl(priv->ioaddr + (i * 4));
 440                 /* DMA registers */
 441                 for (i = 0; i < 9; i++)
 442                         reg_space[i + 12] =
 443                             readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4)));
 444                 reg_space[22] = readl(priv->ioaddr + DMA_CUR_TX_BUF_ADDR);
 445                 reg_space[23] = readl(priv->ioaddr + DMA_CUR_RX_BUF_ADDR);
 446         } else {
 447                 /* MAC registers */
 448                 for (i = 0; i < 55; i++)
 449                         reg_space[i] = readl(priv->ioaddr + (i * 4));
 450                 /* DMA registers */
 451                 for (i = 0; i < 22; i++)
 452                         reg_space[i + 55] =
 453                             readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4)));
 454         }
 455 }
 456
 457 static void
 458 stmmac_get_pauseparam(struct net_device *netdev,
 459                       struct ethtool_pauseparam *pause)
 460 {
 461         struct stmmac_priv *priv = netdev_priv(netdev);
 462
 463         pause->rx_pause = 0;
 464         pause->tx_pause = 0;
 465
 466         if (priv->hw->pcs && priv->hw->mac->pcs_get_adv_lp) {
 467                 struct rgmii_adv adv_lp;
 468
 469                 pause->autoneg = 1;
 470                 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv_lp);
 471                 if (!adv_lp.pause)
 472                         return;
 473         } else {
 474                 if (!(priv->phydev->supported & SUPPORTED_Pause) ||
 475                     !(priv->phydev->supported & SUPPORTED_Asym_Pause))
 476                         return;
 477         }
 478
 479         pause->autoneg = priv->phydev->autoneg;
 480
 481         if (priv->flow_ctrl & FLOW_RX)
 482                 pause->rx_pause = 1;
 483         if (priv->flow_ctrl & FLOW_TX)
 484                 pause->tx_pause = 1;
 485
 486 }
 487
 488 static int
 489 stmmac_set_pauseparam(struct net_device *netdev,
 490                       struct ethtool_pauseparam *pause)
 491 {
 492         struct stmmac_priv *priv = netdev_priv(netdev);
 493         struct phy_device *phy = priv->phydev;
 494         int new_pause = FLOW_OFF;
 495
 496         if (priv->hw->pcs && priv->hw->mac->pcs_get_adv_lp) {
 497                 struct rgmii_adv adv_lp;
 498
 499                 pause->autoneg = 1;
 500                 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv_lp);
 501                 if (!adv_lp.pause)
 502                         return -EOPNOTSUPP;
 503         } else {
 504                 if (!(phy->supported & SUPPORTED_Pause) ||
 505                     !(phy->supported & SUPPORTED_Asym_Pause))
 506                         return -EOPNOTSUPP;
 507         }
 508
 509         if (pause->rx_pause)
 510                 new_pause |= FLOW_RX;
 511         if (pause->tx_pause)
 512                 new_pause |= FLOW_TX;
 513
 514         priv->flow_ctrl = new_pause;
 515         phy->autoneg = pause->autoneg;
 516
 517         if (phy->autoneg) {
 518                 if (netif_running(netdev))
 519                         return phy_start_aneg(phy);
 520         }
 521
 522         priv->hw->mac->flow_ctrl(priv->hw, phy->duplex, priv->flow_ctrl,
 523                                  priv->pause);
 524         return 0;
 525 }
 526
 527 static void stmmac_get_ethtool_stats(struct net_device *dev,
 528                                  struct ethtool_stats *dummy, u64 *data)
 529 {
 530         struct stmmac_priv *priv = netdev_priv(dev);
 531         int i, j = 0;
 532
 533         /* Update the DMA HW counters for dwmac10/100 */
 534         if (priv->hw->dma->dma_diagnostic_fr)
 535                 priv->hw->dma->dma_diagnostic_fr(&dev->stats,
 536                                                  (void *) &priv->xstats,
 537                                                  priv->ioaddr);
 538         else {
 539                 /* If supported, for new GMAC chips expose the MMC counters */
 540                 if (priv->dma_cap.rmon) {
 541                         dwmac_mmc_read(priv->mmcaddr, &priv->mmc);
 542
 543                         for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
 544                                 char *p;
 545                                 p = (char *)priv + stmmac_mmc[i].stat_offset;
 546
 547                                 data[j++] = (stmmac_mmc[i].sizeof_stat ==
 548                                              sizeof(u64)) ? (*(u64 *)p) :
 549                                              (*(u32 *)p);
 550                         }
 551                 }
 552                 if (priv->eee_enabled) {
 553                         int val = phy_get_eee_err(priv->phydev);
 554                         if (val)
 555                                 priv->xstats.phy_eee_wakeup_error_n = val;
 556                 }
 557
 558                 if ((priv->hw->mac->debug) &&
 559                     (priv->synopsys_id >= DWMAC_CORE_3_50))
 560                         priv->hw->mac->debug(priv->ioaddr,
 561                                              (void *)&priv->xstats);
 562         }
 563         for (i = 0; i < STMMAC_STATS_LEN; i++) {
 564                 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
 565                 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
 566                              sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
 567         }
 568 }
 569
 570 static int stmmac_get_sset_count(struct net_device *netdev, int sset)
 571 {
 572         struct stmmac_priv *priv = netdev_priv(netdev);
 573         int len;
 574
 575         switch (sset) {
 576         case ETH_SS_STATS:
 577                 len = STMMAC_STATS_LEN;
 578
 579                 if (priv->dma_cap.rmon)
 580                         len += STMMAC_MMC_STATS_LEN;
 581
 582                 return len;
 583         default:
 584                 return -EOPNOTSUPP;
 585         }
 586 }
 587
 588 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
 589 {
 590         int i;
 591         u8 *p = data;
 592         struct stmmac_priv *priv = netdev_priv(dev);
 593
 594         switch (stringset) {
 595         case ETH_SS_STATS:
 596                 if (priv->dma_cap.rmon)
 597                         for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
 598                                 memcpy(p, stmmac_mmc[i].stat_string,
 599                                        ETH_GSTRING_LEN);
 600                                 p += ETH_GSTRING_LEN;
 601                         }
 602                 for (i = 0; i < STMMAC_STATS_LEN; i++) {
 603                         memcpy(p, stmmac_gstrings_stats[i].stat_string,
 604                                 ETH_GSTRING_LEN);
 605                         p += ETH_GSTRING_LEN;
 606                 }
 607                 break;
 608         default:
 609                 WARN_ON(1);
 610                 break;
 611         }
 612 }
 613
 614 /* Currently only support WOL through Magic packet. */
 615 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 616 {
 617         struct stmmac_priv *priv = netdev_priv(dev);
 618
 619         spin_lock_irq(&priv->lock);
 620         if (device_can_wakeup(priv->device)) {
 621                 wol->supported = WAKE_MAGIC | WAKE_UCAST;
 622                 wol->wolopts = priv->wolopts;
 623         }
 624         spin_unlock_irq(&priv->lock);
 625 }
 626
 627 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 628 {
 629         struct stmmac_priv *priv = netdev_priv(dev);
 630         u32 support = WAKE_MAGIC | WAKE_UCAST;
 631
 632         /* By default almost all GMAC devices support the WoL via
 633          * magic frame but we can disable it if the HW capability
 634          * register shows no support for pmt_magic_frame. */
 635         if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame))
 636                 wol->wolopts &= ~WAKE_MAGIC;
 637
 638         if (!device_can_wakeup(priv->device))
 639                 return -EINVAL;
 640
 641         if (wol->wolopts & ~support)
 642                 return -EINVAL;
 643
 644         if (wol->wolopts) {
 645                 pr_info("stmmac: wakeup enable\n");
 646                 device_set_wakeup_enable(priv->device, 1);
 647                 enable_irq_wake(priv->wol_irq);
 648         } else {
 649                 device_set_wakeup_enable(priv->device, 0);
 650                 disable_irq_wake(priv->wol_irq);
 651         }
 652
 653         spin_lock_irq(&priv->lock);
 654         priv->wolopts = wol->wolopts;
 655         spin_unlock_irq(&priv->lock);
 656
 657         return 0;
 658 }
 659
 660 static int stmmac_ethtool_op_get_eee(struct net_device *dev,
 661                                      struct ethtool_eee *edata)
 662 {
 663         struct stmmac_priv *priv = netdev_priv(dev);
 664
 665         if (!priv->dma_cap.eee)
 666                 return -EOPNOTSUPP;
 667
 668         edata->eee_enabled = priv->eee_enabled;
 669         edata->eee_active = priv->eee_active;
 670         edata->tx_lpi_timer = priv->tx_lpi_timer;
 671
 672         return phy_ethtool_get_eee(priv->phydev, edata);
 673 }
 674
 675 static int stmmac_ethtool_op_set_eee(struct net_device *dev,
 676                                      struct ethtool_eee *edata)
 677 {
 678         struct stmmac_priv *priv = netdev_priv(dev);
 679         int ret;
 680
 681         if (!priv->dma_cap.eee)
 682                 return -EOPNOTSUPP;
 683
 684         if (!edata->eee_enabled)
 685                 stmmac_disable_eee_mode(priv);
 686
 687         ret = phy_ethtool_set_eee(dev->phydev, edata);
 688         if (ret)
 689                 return ret;
 690
 691         priv->tx_lpi_timer = edata->tx_lpi_timer;
 692         return 0;
 693 }
 694
 695 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
 696 {
 697         unsigned long clk = clk_get_rate(priv->stmmac_clk);
 698
 699         if (!clk)
 700                 return 0;
 701
 702         return (usec * (clk / 1000000)) / 256;
 703 }
 704
 705 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
 706 {
 707         unsigned long clk = clk_get_rate(priv->stmmac_clk);
 708
 709         if (!clk)
 710                 return 0;
 711
 712         return (riwt * 256) / (clk / 1000000);
 713 }
 714
 715 static int stmmac_get_coalesce(struct net_device *dev,
 716                                struct ethtool_coalesce *ec)
 717 {
 718         struct stmmac_priv *priv = netdev_priv(dev);
 719
 720         ec->tx_coalesce_usecs = priv->tx_coal_timer;
 721         ec->tx_max_coalesced_frames = priv->tx_coal_frames;
 722
 723         if (priv->use_riwt)
 724                 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt, priv);
 725
 726         return 0;
 727 }
 728
 729 static int stmmac_set_coalesce(struct net_device *dev,
 730                                struct ethtool_coalesce *ec)
 731 {
 732         struct stmmac_priv *priv = netdev_priv(dev);
 733         unsigned int rx_riwt;
 734
 735         /* Check not supported parameters  */
 736         if ((ec->rx_max_coalesced_frames) || (ec->rx_coalesce_usecs_irq) ||
 737             (ec->rx_max_coalesced_frames_irq) || (ec->tx_coalesce_usecs_irq) ||
 738             (ec->use_adaptive_rx_coalesce) || (ec->use_adaptive_tx_coalesce) ||
 739             (ec->pkt_rate_low) || (ec->rx_coalesce_usecs_low) ||
 740             (ec->rx_max_coalesced_frames_low) || (ec->tx_coalesce_usecs_high) ||
 741             (ec->tx_max_coalesced_frames_low) || (ec->pkt_rate_high) ||
 742             (ec->tx_coalesce_usecs_low) || (ec->rx_coalesce_usecs_high) ||
 743             (ec->rx_max_coalesced_frames_high) ||
 744             (ec->tx_max_coalesced_frames_irq) ||
 745             (ec->stats_block_coalesce_usecs) ||
 746             (ec->tx_max_coalesced_frames_high) || (ec->rate_sample_interval))
 747                 return -EOPNOTSUPP;
 748
 749         if (ec->rx_coalesce_usecs == 0)
 750                 return -EINVAL;
 751
 752         if ((ec->tx_coalesce_usecs == 0) &&
 753             (ec->tx_max_coalesced_frames == 0))
 754                 return -EINVAL;
 755
 756         if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) ||
 757             (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES))
 758                 return -EINVAL;
 759
 760         rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv);
 761
 762         if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT))
 763                 return -EINVAL;
 764         else if (!priv->use_riwt)
 765                 return -EOPNOTSUPP;
 766
 767         /* Only copy relevant parameters, ignore all others. */
 768         priv->tx_coal_frames = ec->tx_max_coalesced_frames;
 769         priv->tx_coal_timer = ec->tx_coalesce_usecs;
 770         priv->rx_riwt = rx_riwt;
 771         priv->hw->dma->rx_watchdog(priv->ioaddr, priv->rx_riwt);
 772
 773         return 0;
 774 }
 775
 776 static int stmmac_get_ts_info(struct net_device *dev,
 777                               struct ethtool_ts_info *info)
 778 {
 779         struct stmmac_priv *priv = netdev_priv(dev);
 780
 781         if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) {
 782
 783                 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
 784                                         SOF_TIMESTAMPING_TX_HARDWARE |
 785                                         SOF_TIMESTAMPING_RX_SOFTWARE |
 786                                         SOF_TIMESTAMPING_RX_HARDWARE |
 787                                         SOF_TIMESTAMPING_SOFTWARE |
 788                                         SOF_TIMESTAMPING_RAW_HARDWARE;
 789
 790                 if (priv->ptp_clock)
 791                         info->phc_index = ptp_clock_index(priv->ptp_clock);
 792
 793                 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
 794
 795                 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
 796                                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
 797                                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
 798                                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
 799                                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
 800                                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
 801                                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
 802                                     (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
 803                                     (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
 804                                     (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
 805                                     (1 << HWTSTAMP_FILTER_ALL));
 806                 return 0;
 807         } else
 808                 return ethtool_op_get_ts_info(dev, info);
 809 }
 810
 811 static int stmmac_get_tunable(struct net_device *dev,
 812                               const struct ethtool_tunable *tuna, void *data)
 813 {
 814         struct stmmac_priv *priv = netdev_priv(dev);
 815         int ret = 0;
 816
 817         switch (tuna->id) {
 818         case ETHTOOL_RX_COPYBREAK:
 819                 *(u32 *)data = priv->rx_copybreak;
 820                 break;
 821         default:
 822                 ret = -EINVAL;
 823                 break;
 824         }
 825
 826         return ret;
 827 }
 828
 829 static int stmmac_set_tunable(struct net_device *dev,
 830                               const struct ethtool_tunable *tuna,
 831                               const void *data)
 832 {
 833         struct stmmac_priv *priv = netdev_priv(dev);
 834         int ret = 0;
 835
 836         switch (tuna->id) {
 837         case ETHTOOL_RX_COPYBREAK:
 838                 priv->rx_copybreak = *(u32 *)data;
 839                 break;
 840         default:
 841                 ret = -EINVAL;
 842                 break;
 843         }
 844
 845         return ret;
 846 }
 847
 848 static const struct ethtool_ops stmmac_ethtool_ops = {
 849         .begin = stmmac_check_if_running,
 850         .get_drvinfo = stmmac_ethtool_getdrvinfo,
 851         .get_settings = stmmac_ethtool_getsettings,
 852         .set_settings = stmmac_ethtool_setsettings,
 853         .get_msglevel = stmmac_ethtool_getmsglevel,
 854         .set_msglevel = stmmac_ethtool_setmsglevel,
 855         .get_regs = stmmac_ethtool_gregs,
 856         .get_regs_len = stmmac_ethtool_get_regs_len,
 857         .get_link = ethtool_op_get_link,
 858         .get_pauseparam = stmmac_get_pauseparam,
 859         .set_pauseparam = stmmac_set_pauseparam,
 860         .get_ethtool_stats = stmmac_get_ethtool_stats,
 861         .get_strings = stmmac_get_strings,
 862         .get_wol = stmmac_get_wol,
 863         .set_wol = stmmac_set_wol,
 864         .get_eee = stmmac_ethtool_op_get_eee,
 865         .set_eee = stmmac_ethtool_op_set_eee,
 866         .get_sset_count = stmmac_get_sset_count,
 867         .get_ts_info = stmmac_get_ts_info,
 868         .get_coalesce = stmmac_get_coalesce,
 869         .set_coalesce = stmmac_set_coalesce,
 870         .get_tunable = stmmac_get_tunable,
 871         .set_tunable = stmmac_set_tunable,
 872 };
 873
 874 void stmmac_set_ethtool_ops(struct net_device *netdev)
 875 {
 876         netdev->ethtool_ops = &stmmac_ethtool_ops;
 877 }