3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
7 * and the smsc911x.c reference driver by SMSC
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, see <http://www.gnu.org/licenses/>.
23 * watchdog = TX watchdog timeout
24 * tx_fifo_kb = Size of TX FIFO in KB
27 * 04/16/05 Dustin McIntire Initial version
29 static const char version[] =
30 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
32 /* Debugging options */
33 #define ENABLE_SMC_DEBUG_RX 0
34 #define ENABLE_SMC_DEBUG_TX 0
35 #define ENABLE_SMC_DEBUG_DMA 0
36 #define ENABLE_SMC_DEBUG_PKTS 0
37 #define ENABLE_SMC_DEBUG_MISC 0
38 #define ENABLE_SMC_DEBUG_FUNC 0
40 #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
41 #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
42 #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
43 #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
44 #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
45 #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
48 #define SMC_DEBUG ( SMC_DEBUG_RX | \
57 #include <linux/module.h>
58 #include <linux/kernel.h>
59 #include <linux/sched.h>
60 #include <linux/delay.h>
61 #include <linux/interrupt.h>
62 #include <linux/errno.h>
63 #include <linux/ioport.h>
64 #include <linux/crc32.h>
65 #include <linux/device.h>
66 #include <linux/platform_device.h>
67 #include <linux/spinlock.h>
68 #include <linux/ethtool.h>
69 #include <linux/mii.h>
70 #include <linux/workqueue.h>
72 #include <linux/netdevice.h>
73 #include <linux/etherdevice.h>
74 #include <linux/skbuff.h>
76 #include <linux/dmaengine.h>
77 #include <linux/dma/pxa-dma.h>
84 * Transmit timeout, default 5 seconds.
86 static int watchdog = 5000;
87 module_param(watchdog, int, 0400);
88 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
90 static int tx_fifo_kb=8;
91 module_param(tx_fifo_kb, int, 0400);
92 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
94 MODULE_LICENSE("GPL");
95 MODULE_ALIAS("platform:smc911x");
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
102 #define CARDNAME "smc911x"
105 * Use power-down feature of the chip
110 #define DBG(n, dev, args...) \
112 if (SMC_DEBUG & (n)) \
113 netdev_dbg(dev, args); \
116 #define PRINTK(dev, args...) netdev_info(dev, args)
118 #define DBG(n, dev, args...) do { } while (0)
119 #define PRINTK(dev, args...) netdev_dbg(dev, args)
122 #if SMC_DEBUG_PKTS > 0
123 static void PRINT_PKT(u_char *buf, int length)
130 remainder = length % 16;
132 for (i = 0; i < lines ; i ++) {
135 for (cur = 0; cur < 8; cur++) {
139 pr_cont("%02x%02x ", a, b);
144 for (i = 0; i < remainder/2 ; i++) {
148 pr_cont("%02x%02x ", a, b);
153 #define PRINT_PKT(x...) do { } while (0)
157 /* this enables an interrupt in the interrupt mask register */
158 #define SMC_ENABLE_INT(lp, x) do { \
159 unsigned int __mask; \
160 __mask = SMC_GET_INT_EN((lp)); \
162 SMC_SET_INT_EN((lp), __mask); \
165 /* this disables an interrupt from the interrupt mask register */
166 #define SMC_DISABLE_INT(lp, x) do { \
167 unsigned int __mask; \
168 __mask = SMC_GET_INT_EN((lp)); \
170 SMC_SET_INT_EN((lp), __mask); \
174 * this does a soft reset on the device
176 static void smc911x_reset(struct net_device *dev)
178 struct smc911x_local *lp = netdev_priv(dev);
179 unsigned int reg, timeout=0, resets=1, irq_cfg;
182 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
184 /* Take out of PM setting first */
185 if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
186 /* Write to the bytetest will take out of powerdown */
187 SMC_SET_BYTE_TEST(lp, 0);
191 reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
192 } while (--timeout && !reg);
194 PRINTK(dev, "smc911x_reset timeout waiting for PM restore\n");
199 /* Disable all interrupts */
200 spin_lock_irqsave(&lp->lock, flags);
201 SMC_SET_INT_EN(lp, 0);
202 spin_unlock_irqrestore(&lp->lock, flags);
205 SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
209 reg = SMC_GET_HW_CFG(lp);
210 /* If chip indicates reset timeout then try again */
211 if (reg & HW_CFG_SRST_TO_) {
212 PRINTK(dev, "chip reset timeout, retrying...\n");
216 } while (--timeout && (reg & HW_CFG_SRST_));
219 PRINTK(dev, "smc911x_reset timeout waiting for reset\n");
223 /* make sure EEPROM has finished loading before setting GPIO_CFG */
225 while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
229 PRINTK(dev, "smc911x_reset timeout waiting for EEPROM busy\n");
233 /* Initialize interrupts */
234 SMC_SET_INT_EN(lp, 0);
237 /* Reset the FIFO level and flow control settings */
238 SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
239 //TODO: Figure out what appropriate pause time is
240 SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
241 SMC_SET_AFC_CFG(lp, lp->afc_cfg);
244 /* Set to LED outputs */
245 SMC_SET_GPIO_CFG(lp, 0x70070000);
248 * Deassert IRQ for 1*10us for edge type interrupts
249 * and drive IRQ pin push-pull
251 irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
252 #ifdef SMC_DYNAMIC_BUS_CONFIG
253 if (lp->cfg.irq_polarity)
254 irq_cfg |= INT_CFG_IRQ_POL_;
256 SMC_SET_IRQ_CFG(lp, irq_cfg);
258 /* clear anything saved */
259 if (lp->pending_tx_skb != NULL) {
260 dev_kfree_skb (lp->pending_tx_skb);
261 lp->pending_tx_skb = NULL;
262 dev->stats.tx_errors++;
263 dev->stats.tx_aborted_errors++;
268 * Enable Interrupts, Receive, and Transmit
270 static void smc911x_enable(struct net_device *dev)
272 struct smc911x_local *lp = netdev_priv(dev);
273 unsigned mask, cfg, cr;
276 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
278 spin_lock_irqsave(&lp->lock, flags);
280 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
283 cfg = SMC_GET_HW_CFG(lp);
284 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
286 SMC_SET_HW_CFG(lp, cfg);
287 SMC_SET_FIFO_TDA(lp, 0xFF);
288 /* Update TX stats on every 64 packets received or every 1 sec */
289 SMC_SET_FIFO_TSL(lp, 64);
290 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
292 SMC_GET_MAC_CR(lp, cr);
293 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
294 SMC_SET_MAC_CR(lp, cr);
295 SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
297 /* Add 2 byte padding to start of packets */
298 SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
300 /* Turn on receiver and enable RX */
301 if (cr & MAC_CR_RXEN_)
302 DBG(SMC_DEBUG_RX, dev, "Receiver already enabled\n");
304 SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
306 /* Interrupt on every received packet */
307 SMC_SET_FIFO_RSA(lp, 0x01);
308 SMC_SET_FIFO_RSL(lp, 0x00);
310 /* now, enable interrupts */
311 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
312 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
314 if (IS_REV_A(lp->revision))
315 mask|=INT_EN_RDFL_EN_;
317 mask|=INT_EN_RDFO_EN_;
319 SMC_ENABLE_INT(lp, mask);
321 spin_unlock_irqrestore(&lp->lock, flags);
325 * this puts the device in an inactive state
327 static void smc911x_shutdown(struct net_device *dev)
329 struct smc911x_local *lp = netdev_priv(dev);
333 DBG(SMC_DEBUG_FUNC, dev, "%s: --> %s\n", CARDNAME, __func__);
336 SMC_SET_INT_EN(lp, 0);
338 /* Turn of Rx and TX */
339 spin_lock_irqsave(&lp->lock, flags);
340 SMC_GET_MAC_CR(lp, cr);
341 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
342 SMC_SET_MAC_CR(lp, cr);
343 SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
344 spin_unlock_irqrestore(&lp->lock, flags);
347 static inline void smc911x_drop_pkt(struct net_device *dev)
349 struct smc911x_local *lp = netdev_priv(dev);
350 unsigned int fifo_count, timeout, reg;
352 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "%s: --> %s\n",
354 fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
355 if (fifo_count <= 4) {
356 /* Manually dump the packet data */
360 /* Fast forward through the bad packet */
361 SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
365 reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
366 } while (--timeout && reg);
368 PRINTK(dev, "timeout waiting for RX fast forward\n");
374 * This is the procedure to handle the receipt of a packet.
375 * It should be called after checking for packet presence in
376 * the RX status FIFO. It must be called with the spin lock
379 static inline void smc911x_rcv(struct net_device *dev)
381 struct smc911x_local *lp = netdev_priv(dev);
382 unsigned int pkt_len, status;
386 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "--> %s\n",
388 status = SMC_GET_RX_STS_FIFO(lp);
389 DBG(SMC_DEBUG_RX, dev, "Rx pkt len %d status 0x%08x\n",
390 (status & 0x3fff0000) >> 16, status & 0xc000ffff);
391 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
392 if (status & RX_STS_ES_) {
393 /* Deal with a bad packet */
394 dev->stats.rx_errors++;
395 if (status & RX_STS_CRC_ERR_)
396 dev->stats.rx_crc_errors++;
398 if (status & RX_STS_LEN_ERR_)
399 dev->stats.rx_length_errors++;
400 if (status & RX_STS_MCAST_)
401 dev->stats.multicast++;
403 /* Remove the bad packet data from the RX FIFO */
404 smc911x_drop_pkt(dev);
406 /* Receive a valid packet */
407 /* Alloc a buffer with extra room for DMA alignment */
408 skb = netdev_alloc_skb(dev, pkt_len+32);
409 if (unlikely(skb == NULL)) {
410 PRINTK(dev, "Low memory, rcvd packet dropped.\n");
411 dev->stats.rx_dropped++;
412 smc911x_drop_pkt(dev);
415 /* Align IP header to 32 bits
416 * Note that the device is configured to add a 2
417 * byte padding to the packet start, so we really
418 * want to write to the orignal data pointer */
421 skb_put(skb,pkt_len-4);
425 /* Lower the FIFO threshold if possible */
426 fifo = SMC_GET_FIFO_INT(lp);
427 if (fifo & 0xFF) fifo--;
428 DBG(SMC_DEBUG_RX, dev, "Setting RX stat FIFO threshold to %d\n",
430 SMC_SET_FIFO_INT(lp, fifo);
432 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
433 lp->rxdma_active = 1;
434 lp->current_rx_skb = skb;
435 SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
436 /* Packet processing deferred to DMA RX interrupt */
439 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
440 SMC_PULL_DATA(lp, data, pkt_len+2+3);
442 DBG(SMC_DEBUG_PKTS, dev, "Received packet\n");
443 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
444 skb->protocol = eth_type_trans(skb, dev);
446 dev->stats.rx_packets++;
447 dev->stats.rx_bytes += pkt_len-4;
453 * This is called to actually send a packet to the chip.
455 static void smc911x_hardware_send_pkt(struct net_device *dev)
457 struct smc911x_local *lp = netdev_priv(dev);
459 unsigned int cmdA, cmdB, len;
462 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n", __func__);
463 BUG_ON(lp->pending_tx_skb == NULL);
465 skb = lp->pending_tx_skb;
466 lp->pending_tx_skb = NULL;
468 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
469 /* cmdB {31:16] pkt tag [10:0] length */
471 /* 16 byte buffer alignment mode */
472 buf = (char*)((u32)(skb->data) & ~0xF);
473 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
474 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
475 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
478 buf = (char*)((u32)skb->data & ~0x3);
479 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
480 cmdA = (((u32)skb->data & 0x3) << 16) |
481 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
484 /* tag is packet length so we can use this in stats update later */
485 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
487 DBG(SMC_DEBUG_TX, dev, "TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
488 len, len, buf, cmdA, cmdB);
489 SMC_SET_TX_FIFO(lp, cmdA);
490 SMC_SET_TX_FIFO(lp, cmdB);
492 DBG(SMC_DEBUG_PKTS, dev, "Transmitted packet\n");
493 PRINT_PKT(buf, len <= 64 ? len : 64);
495 /* Send pkt via PIO or DMA */
497 lp->current_tx_skb = skb;
498 SMC_PUSH_DATA(lp, buf, len);
499 /* DMA complete IRQ will free buffer and set jiffies */
501 SMC_PUSH_DATA(lp, buf, len);
502 netif_trans_update(dev);
503 dev_kfree_skb_irq(skb);
505 if (!lp->tx_throttle) {
506 netif_wake_queue(dev);
508 SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
512 * Since I am not sure if I will have enough room in the chip's ram
513 * to store the packet, I call this routine which either sends it
514 * now, or set the card to generates an interrupt when ready
518 smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
520 struct smc911x_local *lp = netdev_priv(dev);
524 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
527 spin_lock_irqsave(&lp->lock, flags);
529 BUG_ON(lp->pending_tx_skb != NULL);
531 free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
532 DBG(SMC_DEBUG_TX, dev, "TX free space %d\n", free);
534 /* Turn off the flow when running out of space in FIFO */
535 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
536 DBG(SMC_DEBUG_TX, dev, "Disabling data flow due to low FIFO space (%d)\n",
538 /* Reenable when at least 1 packet of size MTU present */
539 SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
541 netif_stop_queue(dev);
544 /* Drop packets when we run out of space in TX FIFO
545 * Account for overhead required for:
547 * Tx command words 8 bytes
548 * Start offset 15 bytes
549 * End padding 15 bytes
551 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
552 netdev_warn(dev, "No Tx free space %d < %d\n",
554 lp->pending_tx_skb = NULL;
555 dev->stats.tx_errors++;
556 dev->stats.tx_dropped++;
557 spin_unlock_irqrestore(&lp->lock, flags);
558 dev_kfree_skb_any(skb);
564 /* If the DMA is already running then defer this packet Tx until
565 * the DMA IRQ starts it
567 if (lp->txdma_active) {
568 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Tx DMA running, deferring packet\n");
569 lp->pending_tx_skb = skb;
570 netif_stop_queue(dev);
571 spin_unlock_irqrestore(&lp->lock, flags);
574 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Activating Tx DMA\n");
575 lp->txdma_active = 1;
579 lp->pending_tx_skb = skb;
580 smc911x_hardware_send_pkt(dev);
581 spin_unlock_irqrestore(&lp->lock, flags);
587 * This handles a TX status interrupt, which is only called when:
588 * - a TX error occurred, or
589 * - TX of a packet completed.
591 static void smc911x_tx(struct net_device *dev)
593 struct smc911x_local *lp = netdev_priv(dev);
594 unsigned int tx_status;
596 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
599 /* Collect the TX status */
600 while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
601 DBG(SMC_DEBUG_TX, dev, "Tx stat FIFO used 0x%04x\n",
602 (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
603 tx_status = SMC_GET_TX_STS_FIFO(lp);
604 dev->stats.tx_packets++;
605 dev->stats.tx_bytes+=tx_status>>16;
606 DBG(SMC_DEBUG_TX, dev, "Tx FIFO tag 0x%04x status 0x%04x\n",
607 (tx_status & 0xffff0000) >> 16,
608 tx_status & 0x0000ffff);
609 /* count Tx errors, but ignore lost carrier errors when in
610 * full-duplex mode */
611 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
612 !(tx_status & 0x00000306))) {
613 dev->stats.tx_errors++;
615 if (tx_status & TX_STS_MANY_COLL_) {
616 dev->stats.collisions+=16;
617 dev->stats.tx_aborted_errors++;
619 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
621 /* carrier error only has meaning for half-duplex communication */
622 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
624 dev->stats.tx_carrier_errors++;
626 if (tx_status & TX_STS_LATE_COLL_) {
627 dev->stats.collisions++;
628 dev->stats.tx_aborted_errors++;
634 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
636 * Reads a register from the MII Management serial interface
639 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
641 struct smc911x_local *lp = netdev_priv(dev);
642 unsigned int phydata;
644 SMC_GET_MII(lp, phyreg, phyaddr, phydata);
646 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
647 __func__, phyaddr, phyreg, phydata);
653 * Writes a register to the MII Management serial interface
655 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
658 struct smc911x_local *lp = netdev_priv(dev);
660 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
661 __func__, phyaddr, phyreg, phydata);
663 SMC_SET_MII(lp, phyreg, phyaddr, phydata);
667 * Finds and reports the PHY address (115 and 117 have external
668 * PHY interface 118 has internal only
670 static void smc911x_phy_detect(struct net_device *dev)
672 struct smc911x_local *lp = netdev_priv(dev);
674 unsigned int cfg, id1, id2;
676 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
681 * Scan all 32 PHY addresses if necessary, starting at
682 * PHY#1 to PHY#31, and then PHY#0 last.
684 switch(lp->version) {
689 cfg = SMC_GET_HW_CFG(lp);
690 if (cfg & HW_CFG_EXT_PHY_DET_) {
691 cfg &= ~HW_CFG_PHY_CLK_SEL_;
692 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
693 SMC_SET_HW_CFG(lp, cfg);
694 udelay(10); /* Wait for clocks to stop */
696 cfg |= HW_CFG_EXT_PHY_EN_;
697 SMC_SET_HW_CFG(lp, cfg);
698 udelay(10); /* Wait for clocks to stop */
700 cfg &= ~HW_CFG_PHY_CLK_SEL_;
701 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
702 SMC_SET_HW_CFG(lp, cfg);
703 udelay(10); /* Wait for clocks to stop */
705 cfg |= HW_CFG_SMI_SEL_;
706 SMC_SET_HW_CFG(lp, cfg);
708 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
710 /* Read the PHY identifiers */
711 SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
712 SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
714 /* Make sure it is a valid identifier */
715 if (id1 != 0x0000 && id1 != 0xffff &&
716 id1 != 0x8000 && id2 != 0x0000 &&
717 id2 != 0xffff && id2 != 0x8000) {
718 /* Save the PHY's address */
719 lp->mii.phy_id = phyaddr & 31;
720 lp->phy_type = id1 << 16 | id2;
725 /* Found an external PHY */
729 /* Internal media only */
730 SMC_GET_PHY_ID1(lp, 1, id1);
731 SMC_GET_PHY_ID2(lp, 1, id2);
732 /* Save the PHY's address */
734 lp->phy_type = id1 << 16 | id2;
737 DBG(SMC_DEBUG_MISC, dev, "phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%x\n",
738 id1, id2, lp->mii.phy_id);
742 * Sets the PHY to a configuration as determined by the user.
743 * Called with spin_lock held.
745 static int smc911x_phy_fixed(struct net_device *dev)
747 struct smc911x_local *lp = netdev_priv(dev);
748 int phyaddr = lp->mii.phy_id;
751 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
753 /* Enter Link Disable state */
754 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
756 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
759 * Set our fixed capabilities
760 * Disable auto-negotiation
762 bmcr &= ~BMCR_ANENABLE;
764 bmcr |= BMCR_FULLDPLX;
766 if (lp->ctl_rspeed == 100)
767 bmcr |= BMCR_SPEED100;
769 /* Write our capabilities to the phy control register */
770 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
772 /* Re-Configure the Receive/Phy Control register */
774 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
780 * smc911x_phy_reset - reset the phy
784 * Issue a software reset for the specified PHY and
785 * wait up to 100ms for the reset to complete. We should
786 * not access the PHY for 50ms after issuing the reset.
788 * The time to wait appears to be dependent on the PHY.
791 static int smc911x_phy_reset(struct net_device *dev, int phy)
793 struct smc911x_local *lp = netdev_priv(dev);
798 DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
800 spin_lock_irqsave(&lp->lock, flags);
801 reg = SMC_GET_PMT_CTRL(lp);
803 reg |= PMT_CTRL_PHY_RST_;
804 SMC_SET_PMT_CTRL(lp, reg);
805 spin_unlock_irqrestore(&lp->lock, flags);
806 for (timeout = 2; timeout; timeout--) {
808 spin_lock_irqsave(&lp->lock, flags);
809 reg = SMC_GET_PMT_CTRL(lp);
810 spin_unlock_irqrestore(&lp->lock, flags);
811 if (!(reg & PMT_CTRL_PHY_RST_)) {
812 /* extra delay required because the phy may
813 * not be completed with its reset
814 * when PHY_BCR_RESET_ is cleared. 256us
815 * should suffice, but use 500us to be safe
822 return reg & PMT_CTRL_PHY_RST_;
826 * smc911x_phy_powerdown - powerdown phy
830 * Power down the specified PHY
832 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
834 struct smc911x_local *lp = netdev_priv(dev);
837 /* Enter Link Disable state */
838 SMC_GET_PHY_BMCR(lp, phy, bmcr);
840 SMC_SET_PHY_BMCR(lp, phy, bmcr);
844 * smc911x_phy_check_media - check the media status and adjust BMCR
846 * @init: set true for initialisation
848 * Select duplex mode depending on negotiation state. This
849 * also updates our carrier state.
851 static void smc911x_phy_check_media(struct net_device *dev, int init)
853 struct smc911x_local *lp = netdev_priv(dev);
854 int phyaddr = lp->mii.phy_id;
855 unsigned int bmcr, cr;
857 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
859 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
860 /* duplex state has changed */
861 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
862 SMC_GET_MAC_CR(lp, cr);
863 if (lp->mii.full_duplex) {
864 DBG(SMC_DEBUG_MISC, dev, "Configuring for full-duplex mode\n");
865 bmcr |= BMCR_FULLDPLX;
866 cr |= MAC_CR_RCVOWN_;
868 DBG(SMC_DEBUG_MISC, dev, "Configuring for half-duplex mode\n");
869 bmcr &= ~BMCR_FULLDPLX;
870 cr &= ~MAC_CR_RCVOWN_;
872 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
873 SMC_SET_MAC_CR(lp, cr);
878 * Configures the specified PHY through the MII management interface
879 * using Autonegotiation.
880 * Calls smc911x_phy_fixed() if the user has requested a certain config.
881 * If RPC ANEG bit is set, the media selection is dependent purely on
882 * the selection by the MII (either in the MII BMCR reg or the result
883 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
884 * is controlled by the RPC SPEED and RPC DPLX bits.
886 static void smc911x_phy_configure(struct work_struct *work)
888 struct smc911x_local *lp = container_of(work, struct smc911x_local,
890 struct net_device *dev = lp->netdev;
891 int phyaddr = lp->mii.phy_id;
892 int my_phy_caps; /* My PHY capabilities */
893 int my_ad_caps; /* My Advertised capabilities */
897 DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
900 * We should not be called if phy_type is zero.
902 if (lp->phy_type == 0)
905 if (smc911x_phy_reset(dev, phyaddr)) {
906 netdev_info(dev, "PHY reset timed out\n");
909 spin_lock_irqsave(&lp->lock, flags);
912 * Enable PHY Interrupts (for register 18)
913 * Interrupts listed here are enabled
915 SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
916 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
917 PHY_INT_MASK_LINK_DOWN_);
919 /* If the user requested no auto neg, then go set his request */
920 if (lp->mii.force_media) {
921 smc911x_phy_fixed(dev);
922 goto smc911x_phy_configure_exit;
925 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
926 SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
927 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
928 netdev_info(dev, "Auto negotiation NOT supported\n");
929 smc911x_phy_fixed(dev);
930 goto smc911x_phy_configure_exit;
933 /* CSMA capable w/ both pauses */
934 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
936 if (my_phy_caps & BMSR_100BASE4)
937 my_ad_caps |= ADVERTISE_100BASE4;
938 if (my_phy_caps & BMSR_100FULL)
939 my_ad_caps |= ADVERTISE_100FULL;
940 if (my_phy_caps & BMSR_100HALF)
941 my_ad_caps |= ADVERTISE_100HALF;
942 if (my_phy_caps & BMSR_10FULL)
943 my_ad_caps |= ADVERTISE_10FULL;
944 if (my_phy_caps & BMSR_10HALF)
945 my_ad_caps |= ADVERTISE_10HALF;
947 /* Disable capabilities not selected by our user */
948 if (lp->ctl_rspeed != 100)
949 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
951 if (!lp->ctl_rfduplx)
952 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
954 /* Update our Auto-Neg Advertisement Register */
955 SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
956 lp->mii.advertising = my_ad_caps;
959 * Read the register back. Without this, it appears that when
960 * auto-negotiation is restarted, sometimes it isn't ready and
961 * the link does not come up.
964 SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
966 DBG(SMC_DEBUG_MISC, dev, "phy caps=0x%04x\n", my_phy_caps);
967 DBG(SMC_DEBUG_MISC, dev, "phy advertised caps=0x%04x\n", my_ad_caps);
969 /* Restart auto-negotiation process in order to advertise my caps */
970 SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
972 smc911x_phy_check_media(dev, 1);
974 smc911x_phy_configure_exit:
975 spin_unlock_irqrestore(&lp->lock, flags);
979 * smc911x_phy_interrupt
981 * Purpose: Handle interrupts relating to PHY register 18. This is
982 * called from the "hard" interrupt handler under our private spinlock.
984 static void smc911x_phy_interrupt(struct net_device *dev)
986 struct smc911x_local *lp = netdev_priv(dev);
987 int phyaddr = lp->mii.phy_id;
990 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
992 if (lp->phy_type == 0)
995 smc911x_phy_check_media(dev, 0);
996 /* read to clear status bits */
997 SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
998 DBG(SMC_DEBUG_MISC, dev, "PHY interrupt status 0x%04x\n",
1000 DBG(SMC_DEBUG_MISC, dev, "AFC_CFG 0x%08x\n",
1001 SMC_GET_AFC_CFG(lp));
1004 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1007 * This is the main routine of the driver, to handle the device when
1008 * it needs some attention.
1010 static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
1012 struct net_device *dev = dev_id;
1013 struct smc911x_local *lp = netdev_priv(dev);
1014 unsigned int status, mask, timeout;
1015 unsigned int rx_overrun=0, cr, pkts;
1016 unsigned long flags;
1018 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1020 spin_lock_irqsave(&lp->lock, flags);
1022 /* Spurious interrupt check */
1023 if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1024 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1025 spin_unlock_irqrestore(&lp->lock, flags);
1029 mask = SMC_GET_INT_EN(lp);
1030 SMC_SET_INT_EN(lp, 0);
1032 /* set a timeout value, so I don't stay here forever */
1037 status = SMC_GET_INT(lp);
1039 DBG(SMC_DEBUG_MISC, dev, "INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1040 status, mask, status & ~mask);
1046 /* Handle SW interrupt condition */
1047 if (status & INT_STS_SW_INT_) {
1048 SMC_ACK_INT(lp, INT_STS_SW_INT_);
1049 mask &= ~INT_EN_SW_INT_EN_;
1051 /* Handle various error conditions */
1052 if (status & INT_STS_RXE_) {
1053 SMC_ACK_INT(lp, INT_STS_RXE_);
1054 dev->stats.rx_errors++;
1056 if (status & INT_STS_RXDFH_INT_) {
1057 SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
1058 dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
1060 /* Undocumented interrupt-what is the right thing to do here? */
1061 if (status & INT_STS_RXDF_INT_) {
1062 SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
1065 /* Rx Data FIFO exceeds set level */
1066 if (status & INT_STS_RDFL_) {
1067 if (IS_REV_A(lp->revision)) {
1069 SMC_GET_MAC_CR(lp, cr);
1070 cr &= ~MAC_CR_RXEN_;
1071 SMC_SET_MAC_CR(lp, cr);
1072 DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1073 dev->stats.rx_errors++;
1074 dev->stats.rx_fifo_errors++;
1076 SMC_ACK_INT(lp, INT_STS_RDFL_);
1078 if (status & INT_STS_RDFO_) {
1079 if (!IS_REV_A(lp->revision)) {
1080 SMC_GET_MAC_CR(lp, cr);
1081 cr &= ~MAC_CR_RXEN_;
1082 SMC_SET_MAC_CR(lp, cr);
1084 DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1085 dev->stats.rx_errors++;
1086 dev->stats.rx_fifo_errors++;
1088 SMC_ACK_INT(lp, INT_STS_RDFO_);
1090 /* Handle receive condition */
1091 if ((status & INT_STS_RSFL_) || rx_overrun) {
1093 DBG(SMC_DEBUG_RX, dev, "RX irq\n");
1094 fifo = SMC_GET_RX_FIFO_INF(lp);
1095 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1096 DBG(SMC_DEBUG_RX, dev, "Rx FIFO pkts %d, bytes %d\n",
1097 pkts, fifo & 0xFFFF);
1101 if (lp->rxdma_active){
1102 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1104 /* The DMA is already running so up the IRQ threshold */
1105 fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
1106 fifo |= pkts & 0xFF;
1107 DBG(SMC_DEBUG_RX, dev,
1108 "Setting RX stat FIFO threshold to %d\n",
1110 SMC_SET_FIFO_INT(lp, fifo);
1115 SMC_ACK_INT(lp, INT_STS_RSFL_);
1117 /* Handle transmit FIFO available */
1118 if (status & INT_STS_TDFA_) {
1119 DBG(SMC_DEBUG_TX, dev, "TX data FIFO space available irq\n");
1120 SMC_SET_FIFO_TDA(lp, 0xFF);
1121 lp->tx_throttle = 0;
1123 if (!lp->txdma_active)
1125 netif_wake_queue(dev);
1126 SMC_ACK_INT(lp, INT_STS_TDFA_);
1128 /* Handle transmit done condition */
1130 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1131 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, dev,
1132 "Tx stat FIFO limit (%d) /GPT irq\n",
1133 (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
1135 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1136 SMC_ACK_INT(lp, INT_STS_TSFL_);
1137 SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
1140 if (status & INT_STS_TSFL_) {
1141 DBG(SMC_DEBUG_TX, dev, "TX status FIFO limit (%d) irq\n", ?);
1143 SMC_ACK_INT(lp, INT_STS_TSFL_);
1146 if (status & INT_STS_GPT_INT_) {
1147 DBG(SMC_DEBUG_RX, dev, "IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1148 SMC_GET_IRQ_CFG(lp),
1149 SMC_GET_FIFO_INT(lp),
1150 SMC_GET_RX_CFG(lp));
1151 DBG(SMC_DEBUG_RX, dev, "Rx Stat FIFO Used 0x%02x Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1152 (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
1153 SMC_GET_RX_FIFO_INF(lp) & 0xffff,
1154 SMC_GET_RX_STS_FIFO_PEEK(lp));
1155 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1156 SMC_ACK_INT(lp, INT_STS_GPT_INT_);
1160 /* Handle PHY interrupt condition */
1161 if (status & INT_STS_PHY_INT_) {
1162 DBG(SMC_DEBUG_MISC, dev, "PHY irq\n");
1163 smc911x_phy_interrupt(dev);
1164 SMC_ACK_INT(lp, INT_STS_PHY_INT_);
1166 } while (--timeout);
1168 /* restore mask state */
1169 SMC_SET_INT_EN(lp, mask);
1171 DBG(SMC_DEBUG_MISC, dev, "Interrupt done (%d loops)\n",
1174 spin_unlock_irqrestore(&lp->lock, flags);
1181 smc911x_tx_dma_irq(void *data)
1183 struct smc911x_local *lp = data;
1184 struct net_device *dev = lp->netdev;
1185 struct sk_buff *skb = lp->current_tx_skb;
1186 unsigned long flags;
1188 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1190 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "TX DMA irq handler\n");
1191 BUG_ON(skb == NULL);
1192 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1193 netif_trans_update(dev);
1194 dev_kfree_skb_irq(skb);
1195 lp->current_tx_skb = NULL;
1196 if (lp->pending_tx_skb != NULL)
1197 smc911x_hardware_send_pkt(dev);
1199 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1200 "No pending Tx packets. DMA disabled\n");
1201 spin_lock_irqsave(&lp->lock, flags);
1202 lp->txdma_active = 0;
1203 if (!lp->tx_throttle) {
1204 netif_wake_queue(dev);
1206 spin_unlock_irqrestore(&lp->lock, flags);
1209 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1210 "TX DMA irq completed\n");
1213 smc911x_rx_dma_irq(void *data)
1215 struct smc911x_local *lp = data;
1216 struct net_device *dev = lp->netdev;
1217 struct sk_buff *skb = lp->current_rx_skb;
1218 unsigned long flags;
1221 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1222 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev, "RX DMA irq handler\n");
1223 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1224 BUG_ON(skb == NULL);
1225 lp->current_rx_skb = NULL;
1226 PRINT_PKT(skb->data, skb->len);
1227 skb->protocol = eth_type_trans(skb, dev);
1228 dev->stats.rx_packets++;
1229 dev->stats.rx_bytes += skb->len;
1232 spin_lock_irqsave(&lp->lock, flags);
1233 pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
1237 lp->rxdma_active = 0;
1239 spin_unlock_irqrestore(&lp->lock, flags);
1240 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1241 "RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1244 #endif /* SMC_USE_DMA */
1246 #ifdef CONFIG_NET_POLL_CONTROLLER
1248 * Polling receive - used by netconsole and other diagnostic tools
1249 * to allow network i/o with interrupts disabled.
1251 static void smc911x_poll_controller(struct net_device *dev)
1253 disable_irq(dev->irq);
1254 smc911x_interrupt(dev->irq, dev);
1255 enable_irq(dev->irq);
1259 /* Our watchdog timed out. Called by the networking layer */
1260 static void smc911x_timeout(struct net_device *dev)
1262 struct smc911x_local *lp = netdev_priv(dev);
1264 unsigned long flags;
1266 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1268 spin_lock_irqsave(&lp->lock, flags);
1269 status = SMC_GET_INT(lp);
1270 mask = SMC_GET_INT_EN(lp);
1271 spin_unlock_irqrestore(&lp->lock, flags);
1272 DBG(SMC_DEBUG_MISC, dev, "INT 0x%02x MASK 0x%02x\n",
1275 /* Dump the current TX FIFO contents and restart */
1276 mask = SMC_GET_TX_CFG(lp);
1277 SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1279 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1280 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1281 * which calls schedule(). Hence we use a work queue.
1283 if (lp->phy_type != 0)
1284 schedule_work(&lp->phy_configure);
1286 /* We can accept TX packets again */
1287 netif_trans_update(dev); /* prevent tx timeout */
1288 netif_wake_queue(dev);
1292 * This routine will, depending on the values passed to it,
1293 * either make it accept multicast packets, go into
1294 * promiscuous mode (for TCPDUMP and cousins) or accept
1295 * a select set of multicast packets
1297 static void smc911x_set_multicast_list(struct net_device *dev)
1299 struct smc911x_local *lp = netdev_priv(dev);
1300 unsigned int multicast_table[2];
1301 unsigned int mcr, update_multicast = 0;
1302 unsigned long flags;
1304 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1306 spin_lock_irqsave(&lp->lock, flags);
1307 SMC_GET_MAC_CR(lp, mcr);
1308 spin_unlock_irqrestore(&lp->lock, flags);
1310 if (dev->flags & IFF_PROMISC) {
1312 DBG(SMC_DEBUG_MISC, dev, "RCR_PRMS\n");
1313 mcr |= MAC_CR_PRMS_;
1316 * Here, I am setting this to accept all multicast packets.
1317 * I don't need to zero the multicast table, because the flag is
1318 * checked before the table is
1320 else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
1321 DBG(SMC_DEBUG_MISC, dev, "RCR_ALMUL\n");
1322 mcr |= MAC_CR_MCPAS_;
1326 * This sets the internal hardware table to filter out unwanted
1327 * multicast packets before they take up memory.
1329 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1330 * address are the offset into the table. If that bit is 1, then the
1331 * multicast packet is accepted. Otherwise, it's dropped silently.
1333 * To use the 6 bits as an offset into the table, the high 1 bit is
1334 * the number of the 32 bit register, while the low 5 bits are the bit
1335 * within that register.
1337 else if (!netdev_mc_empty(dev)) {
1338 struct netdev_hw_addr *ha;
1340 /* Set the Hash perfec mode */
1341 mcr |= MAC_CR_HPFILT_;
1343 /* start with a table of all zeros: reject all */
1344 memset(multicast_table, 0, sizeof(multicast_table));
1346 netdev_for_each_mc_addr(ha, dev) {
1349 /* upper 6 bits are used as hash index */
1350 position = ether_crc(ETH_ALEN, ha->addr)>>26;
1352 multicast_table[position>>5] |= 1 << (position&0x1f);
1355 /* be sure I get rid of flags I might have set */
1356 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1358 /* now, the table can be loaded into the chipset */
1359 update_multicast = 1;
1361 DBG(SMC_DEBUG_MISC, dev, "~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n");
1362 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1365 * since I'm disabling all multicast entirely, I need to
1366 * clear the multicast list
1368 memset(multicast_table, 0, sizeof(multicast_table));
1369 update_multicast = 1;
1372 spin_lock_irqsave(&lp->lock, flags);
1373 SMC_SET_MAC_CR(lp, mcr);
1374 if (update_multicast) {
1375 DBG(SMC_DEBUG_MISC, dev,
1376 "update mcast hash table 0x%08x 0x%08x\n",
1377 multicast_table[0], multicast_table[1]);
1378 SMC_SET_HASHL(lp, multicast_table[0]);
1379 SMC_SET_HASHH(lp, multicast_table[1]);
1381 spin_unlock_irqrestore(&lp->lock, flags);
1386 * Open and Initialize the board
1388 * Set up everything, reset the card, etc..
1391 smc911x_open(struct net_device *dev)
1393 struct smc911x_local *lp = netdev_priv(dev);
1395 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1397 /* reset the hardware */
1400 /* Configure the PHY, initialize the link state */
1401 smc911x_phy_configure(&lp->phy_configure);
1403 /* Turn on Tx + Rx */
1404 smc911x_enable(dev);
1406 netif_start_queue(dev);
1414 * this makes the board clean up everything that it can
1415 * and not talk to the outside world. Caused by
1416 * an 'ifconfig ethX down'
1418 static int smc911x_close(struct net_device *dev)
1420 struct smc911x_local *lp = netdev_priv(dev);
1422 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1424 netif_stop_queue(dev);
1425 netif_carrier_off(dev);
1427 /* clear everything */
1428 smc911x_shutdown(dev);
1430 if (lp->phy_type != 0) {
1431 /* We need to ensure that no calls to
1432 * smc911x_phy_configure are pending.
1434 cancel_work_sync(&lp->phy_configure);
1435 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1438 if (lp->pending_tx_skb) {
1439 dev_kfree_skb(lp->pending_tx_skb);
1440 lp->pending_tx_skb = NULL;
1450 smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1452 struct smc911x_local *lp = netdev_priv(dev);
1454 unsigned long flags;
1456 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1460 if (lp->phy_type != 0) {
1461 spin_lock_irqsave(&lp->lock, flags);
1462 ret = mii_ethtool_gset(&lp->mii, cmd);
1463 spin_unlock_irqrestore(&lp->lock, flags);
1465 cmd->supported = SUPPORTED_10baseT_Half |
1466 SUPPORTED_10baseT_Full |
1467 SUPPORTED_TP | SUPPORTED_AUI;
1469 if (lp->ctl_rspeed == 10)
1470 ethtool_cmd_speed_set(cmd, SPEED_10);
1471 else if (lp->ctl_rspeed == 100)
1472 ethtool_cmd_speed_set(cmd, SPEED_100);
1474 cmd->autoneg = AUTONEG_DISABLE;
1475 if (lp->mii.phy_id==1)
1476 cmd->transceiver = XCVR_INTERNAL;
1478 cmd->transceiver = XCVR_EXTERNAL;
1480 SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
1482 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1483 DUPLEX_FULL : DUPLEX_HALF;
1491 smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1493 struct smc911x_local *lp = netdev_priv(dev);
1495 unsigned long flags;
1497 if (lp->phy_type != 0) {
1498 spin_lock_irqsave(&lp->lock, flags);
1499 ret = mii_ethtool_sset(&lp->mii, cmd);
1500 spin_unlock_irqrestore(&lp->lock, flags);
1502 if (cmd->autoneg != AUTONEG_DISABLE ||
1503 cmd->speed != SPEED_10 ||
1504 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1505 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1508 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1517 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1519 strlcpy(info->driver, CARDNAME, sizeof(info->driver));
1520 strlcpy(info->version, version, sizeof(info->version));
1521 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1522 sizeof(info->bus_info));
1525 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1527 struct smc911x_local *lp = netdev_priv(dev);
1529 unsigned long flags;
1531 if (lp->phy_type != 0) {
1532 spin_lock_irqsave(&lp->lock, flags);
1533 ret = mii_nway_restart(&lp->mii);
1534 spin_unlock_irqrestore(&lp->lock, flags);
1540 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1542 struct smc911x_local *lp = netdev_priv(dev);
1543 return lp->msg_enable;
1546 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1548 struct smc911x_local *lp = netdev_priv(dev);
1549 lp->msg_enable = level;
1552 static int smc911x_ethtool_getregslen(struct net_device *dev)
1554 /* System regs + MAC regs + PHY regs */
1555 return (((E2P_CMD - ID_REV)/4 + 1) +
1556 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1559 static void smc911x_ethtool_getregs(struct net_device *dev,
1560 struct ethtool_regs* regs, void *buf)
1562 struct smc911x_local *lp = netdev_priv(dev);
1563 unsigned long flags;
1565 u32 *data = (u32*)buf;
1567 regs->version = lp->version;
1568 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1569 data[j++] = SMC_inl(lp, i);
1571 for(i=MAC_CR;i<=WUCSR;i++) {
1572 spin_lock_irqsave(&lp->lock, flags);
1573 SMC_GET_MAC_CSR(lp, i, reg);
1574 spin_unlock_irqrestore(&lp->lock, flags);
1577 for(i=0;i<=31;i++) {
1578 spin_lock_irqsave(&lp->lock, flags);
1579 SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
1580 spin_unlock_irqrestore(&lp->lock, flags);
1581 data[j++] = reg & 0xFFFF;
1585 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1587 struct smc911x_local *lp = netdev_priv(dev);
1588 unsigned int timeout;
1591 e2p_cmd = SMC_GET_E2P_CMD(lp);
1592 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1593 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1594 PRINTK(dev, "%s timeout waiting for EEPROM to respond\n",
1599 e2p_cmd = SMC_GET_E2P_CMD(lp);
1602 PRINTK(dev, "%s timeout waiting for EEPROM CMD not busy\n",
1609 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1612 struct smc911x_local *lp = netdev_priv(dev);
1615 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1617 SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
1618 ((cmd) & (0x7<<28)) |
1623 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1626 struct smc911x_local *lp = netdev_priv(dev);
1629 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1631 *data = SMC_GET_E2P_DATA(lp);
1635 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1638 struct smc911x_local *lp = netdev_priv(dev);
1641 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1643 SMC_SET_E2P_DATA(lp, data);
1647 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1648 struct ethtool_eeprom *eeprom, u8 *data)
1650 u8 eebuf[SMC911X_EEPROM_LEN];
1653 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1654 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1656 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1659 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1663 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1664 struct ethtool_eeprom *eeprom, u8 *data)
1669 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1671 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1673 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1676 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1678 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1684 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1686 return SMC911X_EEPROM_LEN;
1689 static const struct ethtool_ops smc911x_ethtool_ops = {
1690 .get_settings = smc911x_ethtool_getsettings,
1691 .set_settings = smc911x_ethtool_setsettings,
1692 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1693 .get_msglevel = smc911x_ethtool_getmsglevel,
1694 .set_msglevel = smc911x_ethtool_setmsglevel,
1695 .nway_reset = smc911x_ethtool_nwayreset,
1696 .get_link = ethtool_op_get_link,
1697 .get_regs_len = smc911x_ethtool_getregslen,
1698 .get_regs = smc911x_ethtool_getregs,
1699 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1700 .get_eeprom = smc911x_ethtool_geteeprom,
1701 .set_eeprom = smc911x_ethtool_seteeprom,
1707 * This routine has a simple purpose -- make the SMC chip generate an
1708 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1710 static int smc911x_findirq(struct net_device *dev)
1712 struct smc911x_local *lp = netdev_priv(dev);
1714 unsigned long cookie;
1716 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1718 cookie = probe_irq_on();
1721 * Force a SW interrupt
1724 SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
1727 * Wait until positive that the interrupt has been generated
1732 int_status = SMC_GET_INT_EN(lp);
1733 if (int_status & INT_EN_SW_INT_EN_)
1734 break; /* got the interrupt */
1735 } while (--timeout);
1738 * there is really nothing that I can do here if timeout fails,
1739 * as autoirq_report will return a 0 anyway, which is what I
1740 * want in this case. Plus, the clean up is needed in both
1744 /* and disable all interrupts again */
1745 SMC_SET_INT_EN(lp, 0);
1747 /* and return what I found */
1748 return probe_irq_off(cookie);
1751 static const struct net_device_ops smc911x_netdev_ops = {
1752 .ndo_open = smc911x_open,
1753 .ndo_stop = smc911x_close,
1754 .ndo_start_xmit = smc911x_hard_start_xmit,
1755 .ndo_tx_timeout = smc911x_timeout,
1756 .ndo_set_rx_mode = smc911x_set_multicast_list,
1757 .ndo_change_mtu = eth_change_mtu,
1758 .ndo_validate_addr = eth_validate_addr,
1759 .ndo_set_mac_address = eth_mac_addr,
1760 #ifdef CONFIG_NET_POLL_CONTROLLER
1761 .ndo_poll_controller = smc911x_poll_controller,
1766 * Function: smc911x_probe(unsigned long ioaddr)
1769 * Tests to see if a given ioaddr points to an SMC911x chip.
1770 * Returns a 0 on success
1773 * (1) see if the endian word is OK
1774 * (1) see if I recognize the chip ID in the appropriate register
1776 * Here I do typical initialization tasks.
1778 * o Initialize the structure if needed
1779 * o print out my vanity message if not done so already
1780 * o print out what type of hardware is detected
1781 * o print out the ethernet address
1783 * o set up my private data
1784 * o configure the dev structure with my subroutines
1785 * o actually GRAB the irq.
1788 static int smc911x_probe(struct net_device *dev)
1790 struct smc911x_local *lp = netdev_priv(dev);
1792 unsigned int val, chip_id, revision;
1793 const char *version_string;
1794 unsigned long irq_flags;
1796 struct dma_slave_config config;
1797 dma_cap_mask_t mask;
1798 struct pxad_param param;
1801 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1803 /* First, see if the endian word is recognized */
1804 val = SMC_GET_BYTE_TEST(lp);
1805 DBG(SMC_DEBUG_MISC, dev, "%s: endian probe returned 0x%04x\n",
1807 if (val != 0x87654321) {
1808 netdev_err(dev, "Invalid chip endian 0x%08x\n", val);
1814 * check if the revision register is something that I
1815 * recognize. These might need to be added to later,
1816 * as future revisions could be added.
1818 chip_id = SMC_GET_PN(lp);
1819 DBG(SMC_DEBUG_MISC, dev, "%s: id probe returned 0x%04x\n",
1821 for(i=0;chip_ids[i].id != 0; i++) {
1822 if (chip_ids[i].id == chip_id) break;
1824 if (!chip_ids[i].id) {
1825 netdev_err(dev, "Unknown chip ID %04x\n", chip_id);
1829 version_string = chip_ids[i].name;
1831 revision = SMC_GET_REV(lp);
1832 DBG(SMC_DEBUG_MISC, dev, "%s: revision = 0x%04x\n", CARDNAME, revision);
1834 /* At this point I'll assume that the chip is an SMC911x. */
1835 DBG(SMC_DEBUG_MISC, dev, "%s: Found a %s\n",
1836 CARDNAME, chip_ids[i].name);
1838 /* Validate the TX FIFO size requested */
1839 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1840 netdev_err(dev, "Invalid TX FIFO size requested %d\n",
1846 /* fill in some of the fields */
1847 lp->version = chip_ids[i].id;
1848 lp->revision = revision;
1849 lp->tx_fifo_kb = tx_fifo_kb;
1850 /* Reverse calculate the RX FIFO size from the TX */
1851 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1852 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1854 /* Set the automatic flow control values */
1855 switch(lp->tx_fifo_kb) {
1857 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1858 * AFC_LO is AFC_HI/2
1859 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1861 case 2:/* 13440 Rx Data Fifo Size */
1862 lp->afc_cfg=0x008C46AF;break;
1863 case 3:/* 12480 Rx Data Fifo Size */
1864 lp->afc_cfg=0x0082419F;break;
1865 case 4:/* 11520 Rx Data Fifo Size */
1866 lp->afc_cfg=0x00783C9F;break;
1867 case 5:/* 10560 Rx Data Fifo Size */
1868 lp->afc_cfg=0x006E374F;break;
1869 case 6:/* 9600 Rx Data Fifo Size */
1870 lp->afc_cfg=0x0064328F;break;
1871 case 7:/* 8640 Rx Data Fifo Size */
1872 lp->afc_cfg=0x005A2D7F;break;
1873 case 8:/* 7680 Rx Data Fifo Size */
1874 lp->afc_cfg=0x0050287F;break;
1875 case 9:/* 6720 Rx Data Fifo Size */
1876 lp->afc_cfg=0x0046236F;break;
1877 case 10:/* 5760 Rx Data Fifo Size */
1878 lp->afc_cfg=0x003C1E6F;break;
1879 case 11:/* 4800 Rx Data Fifo Size */
1880 lp->afc_cfg=0x0032195F;break;
1882 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1883 * AFC_LO is AFC_HI/2
1884 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1886 case 12:/* 3840 Rx Data Fifo Size */
1887 lp->afc_cfg=0x0024124F;break;
1888 case 13:/* 2880 Rx Data Fifo Size */
1889 lp->afc_cfg=0x0015073F;break;
1890 case 14:/* 1920 Rx Data Fifo Size */
1891 lp->afc_cfg=0x0006032F;break;
1893 PRINTK(dev, "ERROR -- no AFC_CFG setting found");
1897 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, dev,
1898 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
1899 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1901 spin_lock_init(&lp->lock);
1903 /* Get the MAC address */
1904 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1906 /* now, reset the chip, and put it into a known state */
1910 * If dev->irq is 0, then the device has to be banged on to see
1913 * Specifying an IRQ is done with the assumption that the user knows
1914 * what (s)he is doing. No checking is done!!!!
1921 dev->irq = smc911x_findirq(dev);
1924 /* kick the card and try again */
1928 if (dev->irq == 0) {
1929 netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n");
1933 dev->irq = irq_canonicalize(dev->irq);
1935 dev->netdev_ops = &smc911x_netdev_ops;
1936 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1937 dev->ethtool_ops = &smc911x_ethtool_ops;
1939 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
1940 lp->mii.phy_id_mask = 0x1f;
1941 lp->mii.reg_num_mask = 0x1f;
1942 lp->mii.force_media = 0;
1943 lp->mii.full_duplex = 0;
1945 lp->mii.mdio_read = smc911x_phy_read;
1946 lp->mii.mdio_write = smc911x_phy_write;
1949 * Locate the phy, if any.
1951 smc911x_phy_detect(dev);
1953 /* Set default parameters */
1954 lp->msg_enable = NETIF_MSG_LINK;
1955 lp->ctl_rfduplx = 1;
1956 lp->ctl_rspeed = 100;
1958 #ifdef SMC_DYNAMIC_BUS_CONFIG
1959 irq_flags = lp->cfg.irq_flags;
1961 irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
1965 retval = request_irq(dev->irq, smc911x_interrupt,
1966 irq_flags, dev->name, dev);
1973 dma_cap_set(DMA_SLAVE, mask);
1974 param.prio = PXAD_PRIO_LOWEST;
1978 dma_request_slave_channel_compat(mask, pxad_filter_fn,
1979 ¶m, &dev->dev, "rx");
1981 dma_request_slave_channel_compat(mask, pxad_filter_fn,
1982 ¶m, &dev->dev, "tx");
1983 lp->rxdma_active = 0;
1984 lp->txdma_active = 0;
1986 memset(&config, 0, sizeof(config));
1987 config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1988 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1989 config.src_addr = lp->physaddr + RX_DATA_FIFO;
1990 config.dst_addr = lp->physaddr + TX_DATA_FIFO;
1991 config.src_maxburst = 32;
1992 config.dst_maxburst = 32;
1993 retval = dmaengine_slave_config(lp->rxdma, &config);
1995 dev_err(lp->dev, "dma rx channel configuration failed: %d\n",
1999 retval = dmaengine_slave_config(lp->txdma, &config);
2001 dev_err(lp->dev, "dma tx channel configuration failed: %d\n",
2007 retval = register_netdev(dev);
2009 /* now, print out the card info, in a short format.. */
2010 netdev_info(dev, "%s (rev %d) at %#lx IRQ %d",
2011 version_string, lp->revision,
2012 dev->base_addr, dev->irq);
2016 pr_cont(" RXDMA %p", lp->rxdma);
2019 pr_cont(" TXDMA %p", lp->txdma);
2022 if (!is_valid_ether_addr(dev->dev_addr)) {
2023 netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n");
2025 /* Print the Ethernet address */
2026 netdev_info(dev, "Ethernet addr: %pM\n",
2030 if (lp->phy_type == 0) {
2031 PRINTK(dev, "No PHY found\n");
2032 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2033 PRINTK(dev, "LAN911x Internal PHY\n");
2035 PRINTK(dev, "External PHY 0x%08x\n", lp->phy_type);
2043 dma_release_channel(lp->rxdma);
2045 dma_release_channel(lp->txdma);
2052 * smc911x_drv_probe(void)
2055 * 0 --> there is a device
2056 * anything else, error
2058 static int smc911x_drv_probe(struct platform_device *pdev)
2060 struct net_device *ndev;
2061 struct resource *res;
2062 struct smc911x_local *lp;
2066 /* ndev is not valid yet, so avoid passing it in. */
2067 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
2068 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2075 * Request the regions.
2077 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2082 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2087 SET_NETDEV_DEV(ndev, &pdev->dev);
2089 ndev->dma = (unsigned char)-1;
2090 ndev->irq = platform_get_irq(pdev, 0);
2091 if (ndev->irq < 0) {
2096 lp = netdev_priv(ndev);
2098 #ifdef SMC_DYNAMIC_BUS_CONFIG
2100 struct smc911x_platdata *pd = dev_get_platdata(&pdev->dev);
2105 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2109 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2115 platform_set_drvdata(pdev, ndev);
2117 ndev->base_addr = res->start;
2118 ret = smc911x_probe(ndev);
2124 release_mem_region(res->start, SMC911X_IO_EXTENT);
2126 pr_info("%s: not found (%d).\n", CARDNAME, ret);
2130 lp->physaddr = res->start;
2131 lp->dev = &pdev->dev;
2138 static int smc911x_drv_remove(struct platform_device *pdev)
2140 struct net_device *ndev = platform_get_drvdata(pdev);
2141 struct smc911x_local *lp = netdev_priv(ndev);
2142 struct resource *res;
2144 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2146 unregister_netdev(ndev);
2148 free_irq(ndev->irq, ndev);
2153 dma_release_channel(lp->rxdma);
2155 dma_release_channel(lp->txdma);
2159 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2160 release_mem_region(res->start, SMC911X_IO_EXTENT);
2166 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2168 struct net_device *ndev = platform_get_drvdata(dev);
2169 struct smc911x_local *lp = netdev_priv(ndev);
2171 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2173 if (netif_running(ndev)) {
2174 netif_device_detach(ndev);
2175 smc911x_shutdown(ndev);
2177 /* Set D2 - Energy detect only setting */
2178 SMC_SET_PMT_CTRL(lp, 2<<12);
2185 static int smc911x_drv_resume(struct platform_device *dev)
2187 struct net_device *ndev = platform_get_drvdata(dev);
2189 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2191 struct smc911x_local *lp = netdev_priv(ndev);
2193 if (netif_running(ndev)) {
2194 smc911x_reset(ndev);
2195 if (lp->phy_type != 0)
2196 smc911x_phy_configure(&lp->phy_configure);
2197 smc911x_enable(ndev);
2198 netif_device_attach(ndev);
2204 static struct platform_driver smc911x_driver = {
2205 .probe = smc911x_drv_probe,
2206 .remove = smc911x_drv_remove,
2207 .suspend = smc911x_drv_suspend,
2208 .resume = smc911x_drv_resume,
2214 module_platform_driver(smc911x_driver);