1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
32 #include "workarounds.h"
34 /**************************************************************************
38 **************************************************************************
41 /* Loopback mode names (see LOOPBACK_MODE()) */
42 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
43 const char *const efx_loopback_mode_names[] = {
44 [LOOPBACK_NONE] = "NONE",
45 [LOOPBACK_DATA] = "DATAPATH",
46 [LOOPBACK_GMAC] = "GMAC",
47 [LOOPBACK_XGMII] = "XGMII",
48 [LOOPBACK_XGXS] = "XGXS",
49 [LOOPBACK_XAUI] = "XAUI",
50 [LOOPBACK_GMII] = "GMII",
51 [LOOPBACK_SGMII] = "SGMII",
52 [LOOPBACK_XGBR] = "XGBR",
53 [LOOPBACK_XFI] = "XFI",
54 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
55 [LOOPBACK_GMII_FAR] = "GMII_FAR",
56 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
57 [LOOPBACK_XFI_FAR] = "XFI_FAR",
58 [LOOPBACK_GPHY] = "GPHY",
59 [LOOPBACK_PHYXS] = "PHYXS",
60 [LOOPBACK_PCS] = "PCS",
61 [LOOPBACK_PMAPMD] = "PMA/PMD",
62 [LOOPBACK_XPORT] = "XPORT",
63 [LOOPBACK_XGMII_WS] = "XGMII_WS",
64 [LOOPBACK_XAUI_WS] = "XAUI_WS",
65 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
66 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
67 [LOOPBACK_GMII_WS] = "GMII_WS",
68 [LOOPBACK_XFI_WS] = "XFI_WS",
69 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
70 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
73 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
74 const char *const efx_reset_type_names[] = {
75 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
76 [RESET_TYPE_ALL] = "ALL",
77 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
78 [RESET_TYPE_WORLD] = "WORLD",
79 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
80 [RESET_TYPE_DATAPATH] = "DATAPATH",
81 [RESET_TYPE_MC_BIST] = "MC_BIST",
82 [RESET_TYPE_DISABLE] = "DISABLE",
83 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
84 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
85 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
86 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
87 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
88 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
89 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
92 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
93 * queued onto this work queue. This is not a per-nic work queue, because
94 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
96 static struct workqueue_struct *reset_workqueue;
98 /* How often and how many times to poll for a reset while waiting for a
99 * BIST that another function started to complete.
101 #define BIST_WAIT_DELAY_MS 100
102 #define BIST_WAIT_DELAY_COUNT 100
104 /**************************************************************************
106 * Configurable values
108 *************************************************************************/
111 * Use separate channels for TX and RX events
113 * Set this to 1 to use separate channels for TX and RX. It allows us
114 * to control interrupt affinity separately for TX and RX.
116 * This is only used in MSI-X interrupt mode
118 bool efx_separate_tx_channels;
119 module_param(efx_separate_tx_channels, bool, 0444);
120 MODULE_PARM_DESC(efx_separate_tx_channels,
121 "Use separate channels for TX and RX");
123 /* This is the weight assigned to each of the (per-channel) virtual
126 static int napi_weight = 64;
128 /* This is the time (in jiffies) between invocations of the hardware
130 * On Falcon-based NICs, this will:
131 * - Check the on-board hardware monitor;
132 * - Poll the link state and reconfigure the hardware as necessary.
133 * On Siena-based NICs for power systems with EEH support, this will give EEH a
136 static unsigned int efx_monitor_interval = 1 * HZ;
138 /* Initial interrupt moderation settings. They can be modified after
139 * module load with ethtool.
141 * The default for RX should strike a balance between increasing the
142 * round-trip latency and reducing overhead.
144 static unsigned int rx_irq_mod_usec = 60;
146 /* Initial interrupt moderation settings. They can be modified after
147 * module load with ethtool.
149 * This default is chosen to ensure that a 10G link does not go idle
150 * while a TX queue is stopped after it has become full. A queue is
151 * restarted when it drops below half full. The time this takes (assuming
152 * worst case 3 descriptors per packet and 1024 descriptors) is
153 * 512 / 3 * 1.2 = 205 usec.
155 static unsigned int tx_irq_mod_usec = 150;
157 /* This is the first interrupt mode to try out of:
162 static unsigned int interrupt_mode;
164 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
165 * i.e. the number of CPUs among which we may distribute simultaneous
166 * interrupt handling.
168 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
169 * The default (0) means to assign an interrupt to each core.
171 static unsigned int rss_cpus;
172 module_param(rss_cpus, uint, 0444);
173 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
175 static bool phy_flash_cfg;
176 module_param(phy_flash_cfg, bool, 0644);
177 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
179 static unsigned irq_adapt_low_thresh = 8000;
180 module_param(irq_adapt_low_thresh, uint, 0644);
181 MODULE_PARM_DESC(irq_adapt_low_thresh,
182 "Threshold score for reducing IRQ moderation");
184 static unsigned irq_adapt_high_thresh = 16000;
185 module_param(irq_adapt_high_thresh, uint, 0644);
186 MODULE_PARM_DESC(irq_adapt_high_thresh,
187 "Threshold score for increasing IRQ moderation");
189 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
190 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
191 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
192 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
193 module_param(debug, uint, 0);
194 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
196 /**************************************************************************
198 * Utility functions and prototypes
200 *************************************************************************/
202 static int efx_soft_enable_interrupts(struct efx_nic *efx);
203 static void efx_soft_disable_interrupts(struct efx_nic *efx);
204 static void efx_remove_channel(struct efx_channel *channel);
205 static void efx_remove_channels(struct efx_nic *efx);
206 static const struct efx_channel_type efx_default_channel_type;
207 static void efx_remove_port(struct efx_nic *efx);
208 static void efx_init_napi_channel(struct efx_channel *channel);
209 static void efx_fini_napi(struct efx_nic *efx);
210 static void efx_fini_napi_channel(struct efx_channel *channel);
211 static void efx_fini_struct(struct efx_nic *efx);
212 static void efx_start_all(struct efx_nic *efx);
213 static void efx_stop_all(struct efx_nic *efx);
215 #define EFX_ASSERT_RESET_SERIALISED(efx) \
217 if ((efx->state == STATE_READY) || \
218 (efx->state == STATE_RECOVERY) || \
219 (efx->state == STATE_DISABLED)) \
223 static int efx_check_disabled(struct efx_nic *efx)
225 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
226 netif_err(efx, drv, efx->net_dev,
227 "device is disabled due to earlier errors\n");
233 /**************************************************************************
235 * Event queue processing
237 *************************************************************************/
239 /* Process channel's event queue
241 * This function is responsible for processing the event queue of a
242 * single channel. The caller must guarantee that this function will
243 * never be concurrently called more than once on the same channel,
244 * though different channels may be being processed concurrently.
246 static int efx_process_channel(struct efx_channel *channel, int budget)
248 struct efx_tx_queue *tx_queue;
251 if (unlikely(!channel->enabled))
254 efx_for_each_channel_tx_queue(tx_queue, channel) {
255 tx_queue->pkts_compl = 0;
256 tx_queue->bytes_compl = 0;
259 spent = efx_nic_process_eventq(channel, budget);
260 if (spent && efx_channel_has_rx_queue(channel)) {
261 struct efx_rx_queue *rx_queue =
262 efx_channel_get_rx_queue(channel);
264 efx_rx_flush_packet(channel);
265 efx_fast_push_rx_descriptors(rx_queue, true);
269 efx_for_each_channel_tx_queue(tx_queue, channel) {
270 if (tx_queue->bytes_compl) {
271 netdev_tx_completed_queue(tx_queue->core_txq,
272 tx_queue->pkts_compl, tx_queue->bytes_compl);
281 * NAPI guarantees serialisation of polls of the same device, which
282 * provides the guarantee required by efx_process_channel().
284 static void efx_update_irq_mod(struct efx_nic *efx, struct efx_channel *channel)
286 int step = efx->irq_mod_step_us;
288 if (channel->irq_mod_score < irq_adapt_low_thresh) {
289 if (channel->irq_moderation_us > step) {
290 channel->irq_moderation_us -= step;
291 efx->type->push_irq_moderation(channel);
293 } else if (channel->irq_mod_score > irq_adapt_high_thresh) {
294 if (channel->irq_moderation_us <
295 efx->irq_rx_moderation_us) {
296 channel->irq_moderation_us += step;
297 efx->type->push_irq_moderation(channel);
301 channel->irq_count = 0;
302 channel->irq_mod_score = 0;
305 static int efx_poll(struct napi_struct *napi, int budget)
307 struct efx_channel *channel =
308 container_of(napi, struct efx_channel, napi_str);
309 struct efx_nic *efx = channel->efx;
312 if (!efx_channel_lock_napi(channel))
315 netif_vdbg(efx, intr, efx->net_dev,
316 "channel %d NAPI poll executing on CPU %d\n",
317 channel->channel, raw_smp_processor_id());
319 spent = efx_process_channel(channel, budget);
321 if (spent < budget) {
322 if (efx_channel_has_rx_queue(channel) &&
323 efx->irq_rx_adaptive &&
324 unlikely(++channel->irq_count == 1000)) {
325 efx_update_irq_mod(efx, channel);
328 efx_filter_rfs_expire(channel);
330 /* There is no race here; although napi_disable() will
331 * only wait for napi_complete(), this isn't a problem
332 * since efx_nic_eventq_read_ack() will have no effect if
333 * interrupts have already been disabled.
336 efx_nic_eventq_read_ack(channel);
339 efx_channel_unlock_napi(channel);
343 /* Create event queue
344 * Event queue memory allocations are done only once. If the channel
345 * is reset, the memory buffer will be reused; this guards against
346 * errors during channel reset and also simplifies interrupt handling.
348 static int efx_probe_eventq(struct efx_channel *channel)
350 struct efx_nic *efx = channel->efx;
351 unsigned long entries;
353 netif_dbg(efx, probe, efx->net_dev,
354 "chan %d create event queue\n", channel->channel);
356 /* Build an event queue with room for one event per tx and rx buffer,
357 * plus some extra for link state events and MCDI completions. */
358 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
359 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
360 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
362 return efx_nic_probe_eventq(channel);
365 /* Prepare channel's event queue */
366 static int efx_init_eventq(struct efx_channel *channel)
368 struct efx_nic *efx = channel->efx;
371 EFX_WARN_ON_PARANOID(channel->eventq_init);
373 netif_dbg(efx, drv, efx->net_dev,
374 "chan %d init event queue\n", channel->channel);
376 rc = efx_nic_init_eventq(channel);
378 efx->type->push_irq_moderation(channel);
379 channel->eventq_read_ptr = 0;
380 channel->eventq_init = true;
385 /* Enable event queue processing and NAPI */
386 void efx_start_eventq(struct efx_channel *channel)
388 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
389 "chan %d start event queue\n", channel->channel);
391 /* Make sure the NAPI handler sees the enabled flag set */
392 channel->enabled = true;
395 efx_channel_enable(channel);
396 napi_enable(&channel->napi_str);
397 efx_nic_eventq_read_ack(channel);
400 /* Disable event queue processing and NAPI */
401 void efx_stop_eventq(struct efx_channel *channel)
403 if (!channel->enabled)
406 napi_disable(&channel->napi_str);
407 while (!efx_channel_disable(channel))
408 usleep_range(1000, 20000);
409 channel->enabled = false;
412 static void efx_fini_eventq(struct efx_channel *channel)
414 if (!channel->eventq_init)
417 netif_dbg(channel->efx, drv, channel->efx->net_dev,
418 "chan %d fini event queue\n", channel->channel);
420 efx_nic_fini_eventq(channel);
421 channel->eventq_init = false;
424 static void efx_remove_eventq(struct efx_channel *channel)
426 netif_dbg(channel->efx, drv, channel->efx->net_dev,
427 "chan %d remove event queue\n", channel->channel);
429 efx_nic_remove_eventq(channel);
432 /**************************************************************************
436 *************************************************************************/
438 /* Allocate and initialise a channel structure. */
439 static struct efx_channel *
440 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
442 struct efx_channel *channel;
443 struct efx_rx_queue *rx_queue;
444 struct efx_tx_queue *tx_queue;
447 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
452 channel->channel = i;
453 channel->type = &efx_default_channel_type;
455 for (j = 0; j < EFX_TXQ_TYPES; j++) {
456 tx_queue = &channel->tx_queue[j];
458 tx_queue->queue = i * EFX_TXQ_TYPES + j;
459 tx_queue->channel = channel;
462 rx_queue = &channel->rx_queue;
464 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
465 (unsigned long)rx_queue);
470 /* Allocate and initialise a channel structure, copying parameters
471 * (but not resources) from an old channel structure.
473 static struct efx_channel *
474 efx_copy_channel(const struct efx_channel *old_channel)
476 struct efx_channel *channel;
477 struct efx_rx_queue *rx_queue;
478 struct efx_tx_queue *tx_queue;
481 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
485 *channel = *old_channel;
487 channel->napi_dev = NULL;
488 INIT_HLIST_NODE(&channel->napi_str.napi_hash_node);
489 channel->napi_str.napi_id = 0;
490 channel->napi_str.state = 0;
491 memset(&channel->eventq, 0, sizeof(channel->eventq));
493 for (j = 0; j < EFX_TXQ_TYPES; j++) {
494 tx_queue = &channel->tx_queue[j];
495 if (tx_queue->channel)
496 tx_queue->channel = channel;
497 tx_queue->buffer = NULL;
498 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
501 rx_queue = &channel->rx_queue;
502 rx_queue->buffer = NULL;
503 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
504 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
505 (unsigned long)rx_queue);
510 static int efx_probe_channel(struct efx_channel *channel)
512 struct efx_tx_queue *tx_queue;
513 struct efx_rx_queue *rx_queue;
516 netif_dbg(channel->efx, probe, channel->efx->net_dev,
517 "creating channel %d\n", channel->channel);
519 rc = channel->type->pre_probe(channel);
523 rc = efx_probe_eventq(channel);
527 efx_for_each_channel_tx_queue(tx_queue, channel) {
528 rc = efx_probe_tx_queue(tx_queue);
533 efx_for_each_channel_rx_queue(rx_queue, channel) {
534 rc = efx_probe_rx_queue(rx_queue);
542 efx_remove_channel(channel);
547 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
549 struct efx_nic *efx = channel->efx;
553 number = channel->channel;
554 if (efx->tx_channel_offset == 0) {
556 } else if (channel->channel < efx->tx_channel_offset) {
560 number -= efx->tx_channel_offset;
562 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
565 static void efx_set_channel_names(struct efx_nic *efx)
567 struct efx_channel *channel;
569 efx_for_each_channel(channel, efx)
570 channel->type->get_name(channel,
571 efx->msi_context[channel->channel].name,
572 sizeof(efx->msi_context[0].name));
575 static int efx_probe_channels(struct efx_nic *efx)
577 struct efx_channel *channel;
580 /* Restart special buffer allocation */
581 efx->next_buffer_table = 0;
583 /* Probe channels in reverse, so that any 'extra' channels
584 * use the start of the buffer table. This allows the traffic
585 * channels to be resized without moving them or wasting the
586 * entries before them.
588 efx_for_each_channel_rev(channel, efx) {
589 rc = efx_probe_channel(channel);
591 netif_err(efx, probe, efx->net_dev,
592 "failed to create channel %d\n",
597 efx_set_channel_names(efx);
602 efx_remove_channels(efx);
606 /* Channels are shutdown and reinitialised whilst the NIC is running
607 * to propagate configuration changes (mtu, checksum offload), or
608 * to clear hardware error conditions
610 static void efx_start_datapath(struct efx_nic *efx)
612 netdev_features_t old_features = efx->net_dev->features;
613 bool old_rx_scatter = efx->rx_scatter;
614 struct efx_tx_queue *tx_queue;
615 struct efx_rx_queue *rx_queue;
616 struct efx_channel *channel;
619 /* Calculate the rx buffer allocation parameters required to
620 * support the current MTU, including padding for header
621 * alignment and overruns.
623 efx->rx_dma_len = (efx->rx_prefix_size +
624 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
625 efx->type->rx_buffer_padding);
626 rx_buf_len = (sizeof(struct efx_rx_page_state) +
627 efx->rx_ip_align + efx->rx_dma_len);
628 if (rx_buf_len <= PAGE_SIZE) {
629 efx->rx_scatter = efx->type->always_rx_scatter;
630 efx->rx_buffer_order = 0;
631 } else if (efx->type->can_rx_scatter) {
632 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
633 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
634 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
635 EFX_RX_BUF_ALIGNMENT) >
637 efx->rx_scatter = true;
638 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
639 efx->rx_buffer_order = 0;
641 efx->rx_scatter = false;
642 efx->rx_buffer_order = get_order(rx_buf_len);
645 efx_rx_config_page_split(efx);
646 if (efx->rx_buffer_order)
647 netif_dbg(efx, drv, efx->net_dev,
648 "RX buf len=%u; page order=%u batch=%u\n",
649 efx->rx_dma_len, efx->rx_buffer_order,
650 efx->rx_pages_per_batch);
652 netif_dbg(efx, drv, efx->net_dev,
653 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
654 efx->rx_dma_len, efx->rx_page_buf_step,
655 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
657 /* Restore previously fixed features in hw_features and remove
658 * features which are fixed now
660 efx->net_dev->hw_features |= efx->net_dev->features;
661 efx->net_dev->hw_features &= ~efx->fixed_features;
662 efx->net_dev->features |= efx->fixed_features;
663 if (efx->net_dev->features != old_features)
664 netdev_features_change(efx->net_dev);
666 /* RX filters may also have scatter-enabled flags */
667 if (efx->rx_scatter != old_rx_scatter)
668 efx->type->filter_update_rx_scatter(efx);
670 /* We must keep at least one descriptor in a TX ring empty.
671 * We could avoid this when the queue size does not exactly
672 * match the hardware ring size, but it's not that important.
673 * Therefore we stop the queue when one more skb might fill
674 * the ring completely. We wake it when half way back to
677 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
678 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
680 /* Initialise the channels */
681 efx_for_each_channel(channel, efx) {
682 efx_for_each_channel_tx_queue(tx_queue, channel) {
683 efx_init_tx_queue(tx_queue);
684 atomic_inc(&efx->active_queues);
687 efx_for_each_channel_rx_queue(rx_queue, channel) {
688 efx_init_rx_queue(rx_queue);
689 atomic_inc(&efx->active_queues);
690 efx_stop_eventq(channel);
691 efx_fast_push_rx_descriptors(rx_queue, false);
692 efx_start_eventq(channel);
695 WARN_ON(channel->rx_pkt_n_frags);
698 efx_ptp_start_datapath(efx);
700 if (netif_device_present(efx->net_dev))
701 netif_tx_wake_all_queues(efx->net_dev);
704 static void efx_stop_datapath(struct efx_nic *efx)
706 struct efx_channel *channel;
707 struct efx_tx_queue *tx_queue;
708 struct efx_rx_queue *rx_queue;
711 EFX_ASSERT_RESET_SERIALISED(efx);
712 BUG_ON(efx->port_enabled);
714 efx_ptp_stop_datapath(efx);
717 efx_for_each_channel(channel, efx) {
718 efx_for_each_channel_rx_queue(rx_queue, channel)
719 rx_queue->refill_enabled = false;
722 efx_for_each_channel(channel, efx) {
723 /* RX packet processing is pipelined, so wait for the
724 * NAPI handler to complete. At least event queue 0
725 * might be kept active by non-data events, so don't
726 * use napi_synchronize() but actually disable NAPI
729 if (efx_channel_has_rx_queue(channel)) {
730 efx_stop_eventq(channel);
731 efx_start_eventq(channel);
735 rc = efx->type->fini_dmaq(efx);
736 if (rc && EFX_WORKAROUND_7803(efx)) {
737 /* Schedule a reset to recover from the flush failure. The
738 * descriptor caches reference memory we're about to free,
739 * but falcon_reconfigure_mac_wrapper() won't reconnect
740 * the MACs because of the pending reset.
742 netif_err(efx, drv, efx->net_dev,
743 "Resetting to recover from flush failure\n");
744 efx_schedule_reset(efx, RESET_TYPE_ALL);
746 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
748 netif_dbg(efx, drv, efx->net_dev,
749 "successfully flushed all queues\n");
752 efx_for_each_channel(channel, efx) {
753 efx_for_each_channel_rx_queue(rx_queue, channel)
754 efx_fini_rx_queue(rx_queue);
755 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
756 efx_fini_tx_queue(tx_queue);
760 static void efx_remove_channel(struct efx_channel *channel)
762 struct efx_tx_queue *tx_queue;
763 struct efx_rx_queue *rx_queue;
765 netif_dbg(channel->efx, drv, channel->efx->net_dev,
766 "destroy chan %d\n", channel->channel);
768 efx_for_each_channel_rx_queue(rx_queue, channel)
769 efx_remove_rx_queue(rx_queue);
770 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
771 efx_remove_tx_queue(tx_queue);
772 efx_remove_eventq(channel);
773 channel->type->post_remove(channel);
776 static void efx_remove_channels(struct efx_nic *efx)
778 struct efx_channel *channel;
780 efx_for_each_channel(channel, efx)
781 efx_remove_channel(channel);
785 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
787 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
788 u32 old_rxq_entries, old_txq_entries;
789 unsigned i, next_buffer_table = 0;
792 rc = efx_check_disabled(efx);
796 /* Not all channels should be reallocated. We must avoid
797 * reallocating their buffer table entries.
799 efx_for_each_channel(channel, efx) {
800 struct efx_rx_queue *rx_queue;
801 struct efx_tx_queue *tx_queue;
803 if (channel->type->copy)
805 next_buffer_table = max(next_buffer_table,
806 channel->eventq.index +
807 channel->eventq.entries);
808 efx_for_each_channel_rx_queue(rx_queue, channel)
809 next_buffer_table = max(next_buffer_table,
810 rx_queue->rxd.index +
811 rx_queue->rxd.entries);
812 efx_for_each_channel_tx_queue(tx_queue, channel)
813 next_buffer_table = max(next_buffer_table,
814 tx_queue->txd.index +
815 tx_queue->txd.entries);
818 efx_device_detach_sync(efx);
820 efx_soft_disable_interrupts(efx);
822 /* Clone channels (where possible) */
823 memset(other_channel, 0, sizeof(other_channel));
824 for (i = 0; i < efx->n_channels; i++) {
825 channel = efx->channel[i];
826 if (channel->type->copy)
827 channel = channel->type->copy(channel);
832 other_channel[i] = channel;
835 /* Swap entry counts and channel pointers */
836 old_rxq_entries = efx->rxq_entries;
837 old_txq_entries = efx->txq_entries;
838 efx->rxq_entries = rxq_entries;
839 efx->txq_entries = txq_entries;
840 for (i = 0; i < efx->n_channels; i++) {
841 channel = efx->channel[i];
842 efx->channel[i] = other_channel[i];
843 other_channel[i] = channel;
846 /* Restart buffer table allocation */
847 efx->next_buffer_table = next_buffer_table;
849 for (i = 0; i < efx->n_channels; i++) {
850 channel = efx->channel[i];
851 if (!channel->type->copy)
853 rc = efx_probe_channel(channel);
856 efx_init_napi_channel(efx->channel[i]);
860 /* Destroy unused channel structures */
861 for (i = 0; i < efx->n_channels; i++) {
862 channel = other_channel[i];
863 if (channel && channel->type->copy) {
864 efx_fini_napi_channel(channel);
865 efx_remove_channel(channel);
870 rc2 = efx_soft_enable_interrupts(efx);
873 netif_err(efx, drv, efx->net_dev,
874 "unable to restart interrupts on channel reallocation\n");
875 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
878 netif_device_attach(efx->net_dev);
884 efx->rxq_entries = old_rxq_entries;
885 efx->txq_entries = old_txq_entries;
886 for (i = 0; i < efx->n_channels; i++) {
887 channel = efx->channel[i];
888 efx->channel[i] = other_channel[i];
889 other_channel[i] = channel;
894 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
896 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
899 static const struct efx_channel_type efx_default_channel_type = {
900 .pre_probe = efx_channel_dummy_op_int,
901 .post_remove = efx_channel_dummy_op_void,
902 .get_name = efx_get_channel_name,
903 .copy = efx_copy_channel,
904 .keep_eventq = false,
907 int efx_channel_dummy_op_int(struct efx_channel *channel)
912 void efx_channel_dummy_op_void(struct efx_channel *channel)
916 /**************************************************************************
920 **************************************************************************/
922 /* This ensures that the kernel is kept informed (via
923 * netif_carrier_on/off) of the link status, and also maintains the
924 * link status's stop on the port's TX queue.
926 void efx_link_status_changed(struct efx_nic *efx)
928 struct efx_link_state *link_state = &efx->link_state;
930 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
931 * that no events are triggered between unregister_netdev() and the
932 * driver unloading. A more general condition is that NETDEV_CHANGE
933 * can only be generated between NETDEV_UP and NETDEV_DOWN */
934 if (!netif_running(efx->net_dev))
937 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
938 efx->n_link_state_changes++;
941 netif_carrier_on(efx->net_dev);
943 netif_carrier_off(efx->net_dev);
946 /* Status message for kernel log */
948 netif_info(efx, link, efx->net_dev,
949 "link up at %uMbps %s-duplex (MTU %d)\n",
950 link_state->speed, link_state->fd ? "full" : "half",
953 netif_info(efx, link, efx->net_dev, "link down\n");
956 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
958 efx->link_advertising = advertising;
960 if (advertising & ADVERTISED_Pause)
961 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
963 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
964 if (advertising & ADVERTISED_Asym_Pause)
965 efx->wanted_fc ^= EFX_FC_TX;
969 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
971 efx->wanted_fc = wanted_fc;
972 if (efx->link_advertising) {
973 if (wanted_fc & EFX_FC_RX)
974 efx->link_advertising |= (ADVERTISED_Pause |
975 ADVERTISED_Asym_Pause);
977 efx->link_advertising &= ~(ADVERTISED_Pause |
978 ADVERTISED_Asym_Pause);
979 if (wanted_fc & EFX_FC_TX)
980 efx->link_advertising ^= ADVERTISED_Asym_Pause;
984 static void efx_fini_port(struct efx_nic *efx);
986 /* We assume that efx->type->reconfigure_mac will always try to sync RX
987 * filters and therefore needs to read-lock the filter table against freeing
989 void efx_mac_reconfigure(struct efx_nic *efx)
991 down_read(&efx->filter_sem);
992 efx->type->reconfigure_mac(efx);
993 up_read(&efx->filter_sem);
996 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
997 * the MAC appropriately. All other PHY configuration changes are pushed
998 * through phy_op->set_settings(), and pushed asynchronously to the MAC
999 * through efx_monitor().
1001 * Callers must hold the mac_lock
1003 int __efx_reconfigure_port(struct efx_nic *efx)
1005 enum efx_phy_mode phy_mode;
1008 WARN_ON(!mutex_is_locked(&efx->mac_lock));
1010 /* Disable PHY transmit in mac level loopbacks */
1011 phy_mode = efx->phy_mode;
1012 if (LOOPBACK_INTERNAL(efx))
1013 efx->phy_mode |= PHY_MODE_TX_DISABLED;
1015 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
1017 rc = efx->type->reconfigure_port(efx);
1020 efx->phy_mode = phy_mode;
1025 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
1027 int efx_reconfigure_port(struct efx_nic *efx)
1031 EFX_ASSERT_RESET_SERIALISED(efx);
1033 mutex_lock(&efx->mac_lock);
1034 rc = __efx_reconfigure_port(efx);
1035 mutex_unlock(&efx->mac_lock);
1040 /* Asynchronous work item for changing MAC promiscuity and multicast
1041 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
1043 static void efx_mac_work(struct work_struct *data)
1045 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
1047 mutex_lock(&efx->mac_lock);
1048 if (efx->port_enabled)
1049 efx_mac_reconfigure(efx);
1050 mutex_unlock(&efx->mac_lock);
1053 static int efx_probe_port(struct efx_nic *efx)
1057 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1060 efx->phy_mode = PHY_MODE_SPECIAL;
1062 /* Connect up MAC/PHY operations table */
1063 rc = efx->type->probe_port(efx);
1067 /* Initialise MAC address to permanent address */
1068 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1073 static int efx_init_port(struct efx_nic *efx)
1077 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1079 mutex_lock(&efx->mac_lock);
1081 rc = efx->phy_op->init(efx);
1085 efx->port_initialized = true;
1087 /* Reconfigure the MAC before creating dma queues (required for
1088 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1089 efx_mac_reconfigure(efx);
1091 /* Ensure the PHY advertises the correct flow control settings */
1092 rc = efx->phy_op->reconfigure(efx);
1093 if (rc && rc != -EPERM)
1096 mutex_unlock(&efx->mac_lock);
1100 efx->phy_op->fini(efx);
1102 mutex_unlock(&efx->mac_lock);
1106 static void efx_start_port(struct efx_nic *efx)
1108 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1109 BUG_ON(efx->port_enabled);
1111 mutex_lock(&efx->mac_lock);
1112 efx->port_enabled = true;
1114 /* Ensure MAC ingress/egress is enabled */
1115 efx_mac_reconfigure(efx);
1117 mutex_unlock(&efx->mac_lock);
1120 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1121 * and the async self-test, wait for them to finish and prevent them
1122 * being scheduled again. This doesn't cover online resets, which
1123 * should only be cancelled when removing the device.
1125 static void efx_stop_port(struct efx_nic *efx)
1127 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1129 EFX_ASSERT_RESET_SERIALISED(efx);
1131 mutex_lock(&efx->mac_lock);
1132 efx->port_enabled = false;
1133 mutex_unlock(&efx->mac_lock);
1135 /* Serialise against efx_set_multicast_list() */
1136 netif_addr_lock_bh(efx->net_dev);
1137 netif_addr_unlock_bh(efx->net_dev);
1139 cancel_delayed_work_sync(&efx->monitor_work);
1140 efx_selftest_async_cancel(efx);
1141 cancel_work_sync(&efx->mac_work);
1144 static void efx_fini_port(struct efx_nic *efx)
1146 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1148 if (!efx->port_initialized)
1151 efx->phy_op->fini(efx);
1152 efx->port_initialized = false;
1154 efx->link_state.up = false;
1155 efx_link_status_changed(efx);
1158 static void efx_remove_port(struct efx_nic *efx)
1160 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1162 efx->type->remove_port(efx);
1165 /**************************************************************************
1169 **************************************************************************/
1171 static LIST_HEAD(efx_primary_list);
1172 static LIST_HEAD(efx_unassociated_list);
1174 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right)
1176 return left->type == right->type &&
1177 left->vpd_sn && right->vpd_sn &&
1178 !strcmp(left->vpd_sn, right->vpd_sn);
1181 static void efx_associate(struct efx_nic *efx)
1183 struct efx_nic *other, *next;
1185 if (efx->primary == efx) {
1186 /* Adding primary function; look for secondaries */
1188 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1189 list_add_tail(&efx->node, &efx_primary_list);
1191 list_for_each_entry_safe(other, next, &efx_unassociated_list,
1193 if (efx_same_controller(efx, other)) {
1194 list_del(&other->node);
1195 netif_dbg(other, probe, other->net_dev,
1196 "moving to secondary list of %s %s\n",
1197 pci_name(efx->pci_dev),
1198 efx->net_dev->name);
1199 list_add_tail(&other->node,
1200 &efx->secondary_list);
1201 other->primary = efx;
1205 /* Adding secondary function; look for primary */
1207 list_for_each_entry(other, &efx_primary_list, node) {
1208 if (efx_same_controller(efx, other)) {
1209 netif_dbg(efx, probe, efx->net_dev,
1210 "adding to secondary list of %s %s\n",
1211 pci_name(other->pci_dev),
1212 other->net_dev->name);
1213 list_add_tail(&efx->node,
1214 &other->secondary_list);
1215 efx->primary = other;
1220 netif_dbg(efx, probe, efx->net_dev,
1221 "adding to unassociated list\n");
1222 list_add_tail(&efx->node, &efx_unassociated_list);
1226 static void efx_dissociate(struct efx_nic *efx)
1228 struct efx_nic *other, *next;
1230 list_del(&efx->node);
1231 efx->primary = NULL;
1233 list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1234 list_del(&other->node);
1235 netif_dbg(other, probe, other->net_dev,
1236 "moving to unassociated list\n");
1237 list_add_tail(&other->node, &efx_unassociated_list);
1238 other->primary = NULL;
1242 /* This configures the PCI device to enable I/O and DMA. */
1243 static int efx_init_io(struct efx_nic *efx)
1245 struct pci_dev *pci_dev = efx->pci_dev;
1246 dma_addr_t dma_mask = efx->type->max_dma_mask;
1247 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1250 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1252 bar = efx->type->mem_bar;
1254 rc = pci_enable_device(pci_dev);
1256 netif_err(efx, probe, efx->net_dev,
1257 "failed to enable PCI device\n");
1261 pci_set_master(pci_dev);
1263 /* Set the PCI DMA mask. Try all possibilities from our
1264 * genuine mask down to 32 bits, because some architectures
1265 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1266 * masks event though they reject 46 bit masks.
1268 while (dma_mask > 0x7fffffffUL) {
1269 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1275 netif_err(efx, probe, efx->net_dev,
1276 "could not find a suitable DMA mask\n");
1279 netif_dbg(efx, probe, efx->net_dev,
1280 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1282 efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1283 rc = pci_request_region(pci_dev, bar, "sfc");
1285 netif_err(efx, probe, efx->net_dev,
1286 "request for memory BAR failed\n");
1290 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1291 if (!efx->membase) {
1292 netif_err(efx, probe, efx->net_dev,
1293 "could not map memory BAR at %llx+%x\n",
1294 (unsigned long long)efx->membase_phys, mem_map_size);
1298 netif_dbg(efx, probe, efx->net_dev,
1299 "memory BAR at %llx+%x (virtual %p)\n",
1300 (unsigned long long)efx->membase_phys, mem_map_size,
1306 pci_release_region(efx->pci_dev, bar);
1308 efx->membase_phys = 0;
1310 pci_disable_device(efx->pci_dev);
1315 static void efx_fini_io(struct efx_nic *efx)
1319 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1322 iounmap(efx->membase);
1323 efx->membase = NULL;
1326 if (efx->membase_phys) {
1327 bar = efx->type->mem_bar;
1328 pci_release_region(efx->pci_dev, bar);
1329 efx->membase_phys = 0;
1332 /* Don't disable bus-mastering if VFs are assigned */
1333 if (!pci_vfs_assigned(efx->pci_dev))
1334 pci_disable_device(efx->pci_dev);
1337 void efx_set_default_rx_indir_table(struct efx_nic *efx)
1341 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1342 efx->rx_indir_table[i] =
1343 ethtool_rxfh_indir_default(i, efx->rss_spread);
1346 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1348 cpumask_var_t thread_mask;
1355 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1356 netif_warn(efx, probe, efx->net_dev,
1357 "RSS disabled due to allocation failure\n");
1362 for_each_online_cpu(cpu) {
1363 if (!cpumask_test_cpu(cpu, thread_mask)) {
1365 cpumask_or(thread_mask, thread_mask,
1366 topology_sibling_cpumask(cpu));
1370 free_cpumask_var(thread_mask);
1373 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1374 * table entries that are inaccessible to VFs
1376 #ifdef CONFIG_SFC_SRIOV
1377 if (efx->type->sriov_wanted) {
1378 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1379 count > efx_vf_size(efx)) {
1380 netif_warn(efx, probe, efx->net_dev,
1381 "Reducing number of RSS channels from %u to %u for "
1382 "VF support. Increase vf-msix-limit to use more "
1383 "channels on the PF.\n",
1384 count, efx_vf_size(efx));
1385 count = efx_vf_size(efx);
1393 /* Probe the number and type of interrupts we are able to obtain, and
1394 * the resulting numbers of channels and RX queues.
1396 static int efx_probe_interrupts(struct efx_nic *efx)
1398 unsigned int extra_channels = 0;
1402 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1403 if (efx->extra_channel_type[i])
1406 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1407 struct msix_entry xentries[EFX_MAX_CHANNELS];
1408 unsigned int n_channels;
1410 n_channels = efx_wanted_parallelism(efx);
1411 if (efx_separate_tx_channels)
1413 n_channels += extra_channels;
1414 n_channels = min(n_channels, efx->max_channels);
1416 for (i = 0; i < n_channels; i++)
1417 xentries[i].entry = i;
1418 rc = pci_enable_msix_range(efx->pci_dev,
1419 xentries, 1, n_channels);
1421 /* Fall back to single channel MSI */
1422 efx->interrupt_mode = EFX_INT_MODE_MSI;
1423 netif_err(efx, drv, efx->net_dev,
1424 "could not enable MSI-X\n");
1425 } else if (rc < n_channels) {
1426 netif_err(efx, drv, efx->net_dev,
1427 "WARNING: Insufficient MSI-X vectors"
1428 " available (%d < %u).\n", rc, n_channels);
1429 netif_err(efx, drv, efx->net_dev,
1430 "WARNING: Performance may be reduced.\n");
1435 efx->n_channels = n_channels;
1436 if (n_channels > extra_channels)
1437 n_channels -= extra_channels;
1438 if (efx_separate_tx_channels) {
1439 efx->n_tx_channels = min(max(n_channels / 2,
1441 efx->max_tx_channels);
1442 efx->n_rx_channels = max(n_channels -
1446 efx->n_tx_channels = min(n_channels,
1447 efx->max_tx_channels);
1448 efx->n_rx_channels = n_channels;
1450 for (i = 0; i < efx->n_channels; i++)
1451 efx_get_channel(efx, i)->irq =
1456 /* Try single interrupt MSI */
1457 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1458 efx->n_channels = 1;
1459 efx->n_rx_channels = 1;
1460 efx->n_tx_channels = 1;
1461 rc = pci_enable_msi(efx->pci_dev);
1463 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1465 netif_err(efx, drv, efx->net_dev,
1466 "could not enable MSI\n");
1467 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1471 /* Assume legacy interrupts */
1472 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1473 efx->n_channels = 1 + (efx_separate_tx_channels ? 1 : 0);
1474 efx->n_rx_channels = 1;
1475 efx->n_tx_channels = 1;
1476 efx->legacy_irq = efx->pci_dev->irq;
1479 /* Assign extra channels if possible */
1480 j = efx->n_channels;
1481 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1482 if (!efx->extra_channel_type[i])
1484 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1485 efx->n_channels <= extra_channels) {
1486 efx->extra_channel_type[i]->handle_no_channel(efx);
1489 efx_get_channel(efx, j)->type =
1490 efx->extra_channel_type[i];
1494 /* RSS might be usable on VFs even if it is disabled on the PF */
1495 #ifdef CONFIG_SFC_SRIOV
1496 if (efx->type->sriov_wanted) {
1497 efx->rss_spread = ((efx->n_rx_channels > 1 ||
1498 !efx->type->sriov_wanted(efx)) ?
1499 efx->n_rx_channels : efx_vf_size(efx));
1503 efx->rss_spread = efx->n_rx_channels;
1508 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1510 struct efx_channel *channel, *end_channel;
1513 BUG_ON(efx->state == STATE_DISABLED);
1515 efx->irq_soft_enabled = true;
1518 efx_for_each_channel(channel, efx) {
1519 if (!channel->type->keep_eventq) {
1520 rc = efx_init_eventq(channel);
1524 efx_start_eventq(channel);
1527 efx_mcdi_mode_event(efx);
1531 end_channel = channel;
1532 efx_for_each_channel(channel, efx) {
1533 if (channel == end_channel)
1535 efx_stop_eventq(channel);
1536 if (!channel->type->keep_eventq)
1537 efx_fini_eventq(channel);
1543 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1545 struct efx_channel *channel;
1547 if (efx->state == STATE_DISABLED)
1550 efx_mcdi_mode_poll(efx);
1552 efx->irq_soft_enabled = false;
1555 if (efx->legacy_irq)
1556 synchronize_irq(efx->legacy_irq);
1558 efx_for_each_channel(channel, efx) {
1560 synchronize_irq(channel->irq);
1562 efx_stop_eventq(channel);
1563 if (!channel->type->keep_eventq)
1564 efx_fini_eventq(channel);
1567 /* Flush the asynchronous MCDI request queue */
1568 efx_mcdi_flush_async(efx);
1571 static int efx_enable_interrupts(struct efx_nic *efx)
1573 struct efx_channel *channel, *end_channel;
1576 BUG_ON(efx->state == STATE_DISABLED);
1578 if (efx->eeh_disabled_legacy_irq) {
1579 enable_irq(efx->legacy_irq);
1580 efx->eeh_disabled_legacy_irq = false;
1583 efx->type->irq_enable_master(efx);
1585 efx_for_each_channel(channel, efx) {
1586 if (channel->type->keep_eventq) {
1587 rc = efx_init_eventq(channel);
1593 rc = efx_soft_enable_interrupts(efx);
1600 end_channel = channel;
1601 efx_for_each_channel(channel, efx) {
1602 if (channel == end_channel)
1604 if (channel->type->keep_eventq)
1605 efx_fini_eventq(channel);
1608 efx->type->irq_disable_non_ev(efx);
1613 static void efx_disable_interrupts(struct efx_nic *efx)
1615 struct efx_channel *channel;
1617 efx_soft_disable_interrupts(efx);
1619 efx_for_each_channel(channel, efx) {
1620 if (channel->type->keep_eventq)
1621 efx_fini_eventq(channel);
1624 efx->type->irq_disable_non_ev(efx);
1627 static void efx_remove_interrupts(struct efx_nic *efx)
1629 struct efx_channel *channel;
1631 /* Remove MSI/MSI-X interrupts */
1632 efx_for_each_channel(channel, efx)
1634 pci_disable_msi(efx->pci_dev);
1635 pci_disable_msix(efx->pci_dev);
1637 /* Remove legacy interrupt */
1638 efx->legacy_irq = 0;
1641 static void efx_set_channels(struct efx_nic *efx)
1643 struct efx_channel *channel;
1644 struct efx_tx_queue *tx_queue;
1646 efx->tx_channel_offset =
1647 efx_separate_tx_channels ?
1648 efx->n_channels - efx->n_tx_channels : 0;
1650 /* We need to mark which channels really have RX and TX
1651 * queues, and adjust the TX queue numbers if we have separate
1652 * RX-only and TX-only channels.
1654 efx_for_each_channel(channel, efx) {
1655 if (channel->channel < efx->n_rx_channels)
1656 channel->rx_queue.core_index = channel->channel;
1658 channel->rx_queue.core_index = -1;
1660 efx_for_each_channel_tx_queue(tx_queue, channel)
1661 tx_queue->queue -= (efx->tx_channel_offset *
1666 static int efx_probe_nic(struct efx_nic *efx)
1670 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1672 /* Carry out hardware-type specific initialisation */
1673 rc = efx->type->probe(efx);
1678 if (!efx->max_channels || !efx->max_tx_channels) {
1679 netif_err(efx, drv, efx->net_dev,
1680 "Insufficient resources to allocate"
1686 /* Determine the number of channels and queues by trying
1687 * to hook in MSI-X interrupts.
1689 rc = efx_probe_interrupts(efx);
1693 efx_set_channels(efx);
1695 /* dimension_resources can fail with EAGAIN */
1696 rc = efx->type->dimension_resources(efx);
1697 if (rc != 0 && rc != -EAGAIN)
1701 /* try again with new max_channels */
1702 efx_remove_interrupts(efx);
1704 } while (rc == -EAGAIN);
1706 if (efx->n_channels > 1)
1707 netdev_rss_key_fill(&efx->rx_hash_key,
1708 sizeof(efx->rx_hash_key));
1709 efx_set_default_rx_indir_table(efx);
1711 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1712 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1714 /* Initialise the interrupt moderation settings */
1715 efx->irq_mod_step_us = DIV_ROUND_UP(efx->timer_quantum_ns, 1000);
1716 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1722 efx_remove_interrupts(efx);
1724 efx->type->remove(efx);
1728 static void efx_remove_nic(struct efx_nic *efx)
1730 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1732 efx_remove_interrupts(efx);
1733 efx->type->remove(efx);
1736 static int efx_probe_filters(struct efx_nic *efx)
1740 spin_lock_init(&efx->filter_lock);
1741 init_rwsem(&efx->filter_sem);
1742 mutex_lock(&efx->mac_lock);
1743 down_write(&efx->filter_sem);
1744 rc = efx->type->filter_table_probe(efx);
1748 #ifdef CONFIG_RFS_ACCEL
1749 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1750 struct efx_channel *channel;
1753 efx_for_each_channel(channel, efx) {
1754 channel->rps_flow_id =
1755 kcalloc(efx->type->max_rx_ip_filters,
1756 sizeof(*channel->rps_flow_id),
1758 if (!channel->rps_flow_id)
1762 i < efx->type->max_rx_ip_filters;
1764 channel->rps_flow_id[i] =
1765 RPS_FLOW_ID_INVALID;
1769 efx_for_each_channel(channel, efx)
1770 kfree(channel->rps_flow_id);
1771 efx->type->filter_table_remove(efx);
1776 efx->rps_expire_index = efx->rps_expire_channel = 0;
1780 up_write(&efx->filter_sem);
1781 mutex_unlock(&efx->mac_lock);
1785 static void efx_remove_filters(struct efx_nic *efx)
1787 #ifdef CONFIG_RFS_ACCEL
1788 struct efx_channel *channel;
1790 efx_for_each_channel(channel, efx)
1791 kfree(channel->rps_flow_id);
1793 down_write(&efx->filter_sem);
1794 efx->type->filter_table_remove(efx);
1795 up_write(&efx->filter_sem);
1798 static void efx_restore_filters(struct efx_nic *efx)
1800 down_read(&efx->filter_sem);
1801 efx->type->filter_table_restore(efx);
1802 up_read(&efx->filter_sem);
1805 /**************************************************************************
1807 * NIC startup/shutdown
1809 *************************************************************************/
1811 static int efx_probe_all(struct efx_nic *efx)
1815 rc = efx_probe_nic(efx);
1817 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1821 rc = efx_probe_port(efx);
1823 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1827 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1828 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1832 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1834 #ifdef CONFIG_SFC_SRIOV
1835 rc = efx->type->vswitching_probe(efx);
1836 if (rc) /* not fatal; the PF will still work fine */
1837 netif_warn(efx, probe, efx->net_dev,
1838 "failed to setup vswitching rc=%d;"
1839 " VFs may not function\n", rc);
1842 rc = efx_probe_filters(efx);
1844 netif_err(efx, probe, efx->net_dev,
1845 "failed to create filter tables\n");
1849 rc = efx_probe_channels(efx);
1856 efx_remove_filters(efx);
1858 #ifdef CONFIG_SFC_SRIOV
1859 efx->type->vswitching_remove(efx);
1862 efx_remove_port(efx);
1864 efx_remove_nic(efx);
1869 /* If the interface is supposed to be running but is not, start
1870 * the hardware and software data path, regular activity for the port
1871 * (MAC statistics, link polling, etc.) and schedule the port to be
1872 * reconfigured. Interrupts must already be enabled. This function
1873 * is safe to call multiple times, so long as the NIC is not disabled.
1874 * Requires the RTNL lock.
1876 static void efx_start_all(struct efx_nic *efx)
1878 EFX_ASSERT_RESET_SERIALISED(efx);
1879 BUG_ON(efx->state == STATE_DISABLED);
1881 /* Check that it is appropriate to restart the interface. All
1882 * of these flags are safe to read under just the rtnl lock */
1883 if (efx->port_enabled || !netif_running(efx->net_dev) ||
1887 efx_start_port(efx);
1888 efx_start_datapath(efx);
1890 /* Start the hardware monitor if there is one */
1891 if (efx->type->monitor != NULL)
1892 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1893 efx_monitor_interval);
1895 /* If link state detection is normally event-driven, we have
1896 * to poll now because we could have missed a change
1898 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1899 mutex_lock(&efx->mac_lock);
1900 if (efx->phy_op->poll(efx))
1901 efx_link_status_changed(efx);
1902 mutex_unlock(&efx->mac_lock);
1905 efx->type->start_stats(efx);
1906 efx->type->pull_stats(efx);
1907 spin_lock_bh(&efx->stats_lock);
1908 efx->type->update_stats(efx, NULL, NULL);
1909 spin_unlock_bh(&efx->stats_lock);
1912 /* Quiesce the hardware and software data path, and regular activity
1913 * for the port without bringing the link down. Safe to call multiple
1914 * times with the NIC in almost any state, but interrupts should be
1915 * enabled. Requires the RTNL lock.
1917 static void efx_stop_all(struct efx_nic *efx)
1919 EFX_ASSERT_RESET_SERIALISED(efx);
1921 /* port_enabled can be read safely under the rtnl lock */
1922 if (!efx->port_enabled)
1925 /* update stats before we go down so we can accurately count
1928 efx->type->pull_stats(efx);
1929 spin_lock_bh(&efx->stats_lock);
1930 efx->type->update_stats(efx, NULL, NULL);
1931 spin_unlock_bh(&efx->stats_lock);
1932 efx->type->stop_stats(efx);
1935 /* Stop the kernel transmit interface. This is only valid if
1936 * the device is stopped or detached; otherwise the watchdog
1937 * may fire immediately.
1939 WARN_ON(netif_running(efx->net_dev) &&
1940 netif_device_present(efx->net_dev));
1941 netif_tx_disable(efx->net_dev);
1943 efx_stop_datapath(efx);
1946 static void efx_remove_all(struct efx_nic *efx)
1948 efx_remove_channels(efx);
1949 efx_remove_filters(efx);
1950 #ifdef CONFIG_SFC_SRIOV
1951 efx->type->vswitching_remove(efx);
1953 efx_remove_port(efx);
1954 efx_remove_nic(efx);
1957 /**************************************************************************
1959 * Interrupt moderation
1961 **************************************************************************/
1962 unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs)
1966 if (usecs * 1000 < efx->timer_quantum_ns)
1967 return 1; /* never round down to 0 */
1968 return usecs * 1000 / efx->timer_quantum_ns;
1971 unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks)
1973 /* We must round up when converting ticks to microseconds
1974 * because we round down when converting the other way.
1976 return DIV_ROUND_UP(ticks * efx->timer_quantum_ns, 1000);
1979 /* Set interrupt moderation parameters */
1980 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1981 unsigned int rx_usecs, bool rx_adaptive,
1982 bool rx_may_override_tx)
1984 struct efx_channel *channel;
1985 unsigned int timer_max_us;
1987 EFX_ASSERT_RESET_SERIALISED(efx);
1989 timer_max_us = efx->timer_max_ns / 1000;
1991 if (tx_usecs > timer_max_us || rx_usecs > timer_max_us)
1994 if (tx_usecs != rx_usecs && efx->tx_channel_offset == 0 &&
1995 !rx_may_override_tx) {
1996 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1997 "RX and TX IRQ moderation must be equal\n");
2001 efx->irq_rx_adaptive = rx_adaptive;
2002 efx->irq_rx_moderation_us = rx_usecs;
2003 efx_for_each_channel(channel, efx) {
2004 if (efx_channel_has_rx_queue(channel))
2005 channel->irq_moderation_us = rx_usecs;
2006 else if (efx_channel_has_tx_queues(channel))
2007 channel->irq_moderation_us = tx_usecs;
2013 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
2014 unsigned int *rx_usecs, bool *rx_adaptive)
2016 *rx_adaptive = efx->irq_rx_adaptive;
2017 *rx_usecs = efx->irq_rx_moderation_us;
2019 /* If channels are shared between RX and TX, so is IRQ
2020 * moderation. Otherwise, IRQ moderation is the same for all
2021 * TX channels and is not adaptive.
2023 if (efx->tx_channel_offset == 0) {
2024 *tx_usecs = *rx_usecs;
2026 struct efx_channel *tx_channel;
2028 tx_channel = efx->channel[efx->tx_channel_offset];
2029 *tx_usecs = tx_channel->irq_moderation_us;
2033 /**************************************************************************
2037 **************************************************************************/
2039 /* Run periodically off the general workqueue */
2040 static void efx_monitor(struct work_struct *data)
2042 struct efx_nic *efx = container_of(data, struct efx_nic,
2045 netif_vdbg(efx, timer, efx->net_dev,
2046 "hardware monitor executing on CPU %d\n",
2047 raw_smp_processor_id());
2048 BUG_ON(efx->type->monitor == NULL);
2050 /* If the mac_lock is already held then it is likely a port
2051 * reconfiguration is already in place, which will likely do
2052 * most of the work of monitor() anyway. */
2053 if (mutex_trylock(&efx->mac_lock)) {
2054 if (efx->port_enabled)
2055 efx->type->monitor(efx);
2056 mutex_unlock(&efx->mac_lock);
2059 queue_delayed_work(efx->workqueue, &efx->monitor_work,
2060 efx_monitor_interval);
2063 /**************************************************************************
2067 *************************************************************************/
2070 * Context: process, rtnl_lock() held.
2072 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
2074 struct efx_nic *efx = netdev_priv(net_dev);
2075 struct mii_ioctl_data *data = if_mii(ifr);
2077 if (cmd == SIOCSHWTSTAMP)
2078 return efx_ptp_set_ts_config(efx, ifr);
2079 if (cmd == SIOCGHWTSTAMP)
2080 return efx_ptp_get_ts_config(efx, ifr);
2082 /* Convert phy_id from older PRTAD/DEVAD format */
2083 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
2084 (data->phy_id & 0xfc00) == 0x0400)
2085 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
2087 return mdio_mii_ioctl(&efx->mdio, data, cmd);
2090 /**************************************************************************
2094 **************************************************************************/
2096 static void efx_init_napi_channel(struct efx_channel *channel)
2098 struct efx_nic *efx = channel->efx;
2100 channel->napi_dev = efx->net_dev;
2101 netif_napi_add(channel->napi_dev, &channel->napi_str,
2102 efx_poll, napi_weight);
2103 efx_channel_busy_poll_init(channel);
2106 static void efx_init_napi(struct efx_nic *efx)
2108 struct efx_channel *channel;
2110 efx_for_each_channel(channel, efx)
2111 efx_init_napi_channel(channel);
2114 static void efx_fini_napi_channel(struct efx_channel *channel)
2116 if (channel->napi_dev) {
2117 netif_napi_del(&channel->napi_str);
2118 napi_hash_del(&channel->napi_str);
2120 channel->napi_dev = NULL;
2123 static void efx_fini_napi(struct efx_nic *efx)
2125 struct efx_channel *channel;
2127 efx_for_each_channel(channel, efx)
2128 efx_fini_napi_channel(channel);
2131 /**************************************************************************
2133 * Kernel netpoll interface
2135 *************************************************************************/
2137 #ifdef CONFIG_NET_POLL_CONTROLLER
2139 /* Although in the common case interrupts will be disabled, this is not
2140 * guaranteed. However, all our work happens inside the NAPI callback,
2141 * so no locking is required.
2143 static void efx_netpoll(struct net_device *net_dev)
2145 struct efx_nic *efx = netdev_priv(net_dev);
2146 struct efx_channel *channel;
2148 efx_for_each_channel(channel, efx)
2149 efx_schedule_channel(channel);
2154 #ifdef CONFIG_NET_RX_BUSY_POLL
2155 static int efx_busy_poll(struct napi_struct *napi)
2157 struct efx_channel *channel =
2158 container_of(napi, struct efx_channel, napi_str);
2159 struct efx_nic *efx = channel->efx;
2161 int old_rx_packets, rx_packets;
2163 if (!netif_running(efx->net_dev))
2164 return LL_FLUSH_FAILED;
2166 if (!efx_channel_try_lock_poll(channel))
2167 return LL_FLUSH_BUSY;
2169 old_rx_packets = channel->rx_queue.rx_packets;
2170 efx_process_channel(channel, budget);
2172 rx_packets = channel->rx_queue.rx_packets - old_rx_packets;
2174 /* There is no race condition with NAPI here.
2175 * NAPI will automatically be rescheduled if it yielded during busy
2176 * polling, because it was not able to take the lock and thus returned
2179 efx_channel_unlock_poll(channel);
2185 /**************************************************************************
2187 * Kernel net device interface
2189 *************************************************************************/
2191 /* Context: process, rtnl_lock() held. */
2192 int efx_net_open(struct net_device *net_dev)
2194 struct efx_nic *efx = netdev_priv(net_dev);
2197 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2198 raw_smp_processor_id());
2200 rc = efx_check_disabled(efx);
2203 if (efx->phy_mode & PHY_MODE_SPECIAL)
2205 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
2208 /* Notify the kernel of the link state polled during driver load,
2209 * before the monitor starts running */
2210 efx_link_status_changed(efx);
2213 efx_selftest_async_start(efx);
2217 /* Context: process, rtnl_lock() held.
2218 * Note that the kernel will ignore our return code; this method
2219 * should really be a void.
2221 int efx_net_stop(struct net_device *net_dev)
2223 struct efx_nic *efx = netdev_priv(net_dev);
2225 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2226 raw_smp_processor_id());
2228 /* Stop the device and flush all the channels */
2234 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
2235 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
2236 struct rtnl_link_stats64 *stats)
2238 struct efx_nic *efx = netdev_priv(net_dev);
2240 spin_lock_bh(&efx->stats_lock);
2241 efx->type->update_stats(efx, NULL, stats);
2242 spin_unlock_bh(&efx->stats_lock);
2247 /* Context: netif_tx_lock held, BHs disabled. */
2248 static void efx_watchdog(struct net_device *net_dev)
2250 struct efx_nic *efx = netdev_priv(net_dev);
2252 netif_err(efx, tx_err, efx->net_dev,
2253 "TX stuck with port_enabled=%d: resetting channels\n",
2256 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2260 /* Context: process, rtnl_lock() held. */
2261 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2263 struct efx_nic *efx = netdev_priv(net_dev);
2266 rc = efx_check_disabled(efx);
2269 if (new_mtu > EFX_MAX_MTU) {
2270 netif_err(efx, drv, efx->net_dev,
2271 "Requested MTU of %d too big (max: %d)\n",
2272 new_mtu, EFX_MAX_MTU);
2275 if (new_mtu < EFX_MIN_MTU) {
2276 netif_err(efx, drv, efx->net_dev,
2277 "Requested MTU of %d too small (min: %d)\n",
2278 new_mtu, EFX_MIN_MTU);
2282 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2284 efx_device_detach_sync(efx);
2287 mutex_lock(&efx->mac_lock);
2288 net_dev->mtu = new_mtu;
2289 efx_mac_reconfigure(efx);
2290 mutex_unlock(&efx->mac_lock);
2293 netif_device_attach(efx->net_dev);
2297 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2299 struct efx_nic *efx = netdev_priv(net_dev);
2300 struct sockaddr *addr = data;
2301 u8 *new_addr = addr->sa_data;
2305 if (!is_valid_ether_addr(new_addr)) {
2306 netif_err(efx, drv, efx->net_dev,
2307 "invalid ethernet MAC address requested: %pM\n",
2309 return -EADDRNOTAVAIL;
2312 /* save old address */
2313 ether_addr_copy(old_addr, net_dev->dev_addr);
2314 ether_addr_copy(net_dev->dev_addr, new_addr);
2315 if (efx->type->set_mac_address) {
2316 rc = efx->type->set_mac_address(efx);
2318 ether_addr_copy(net_dev->dev_addr, old_addr);
2323 /* Reconfigure the MAC */
2324 mutex_lock(&efx->mac_lock);
2325 efx_mac_reconfigure(efx);
2326 mutex_unlock(&efx->mac_lock);
2331 /* Context: netif_addr_lock held, BHs disabled. */
2332 static void efx_set_rx_mode(struct net_device *net_dev)
2334 struct efx_nic *efx = netdev_priv(net_dev);
2336 if (efx->port_enabled)
2337 queue_work(efx->workqueue, &efx->mac_work);
2338 /* Otherwise efx_start_port() will do this */
2341 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2343 struct efx_nic *efx = netdev_priv(net_dev);
2346 /* If disabling RX n-tuple filtering, clear existing filters */
2347 if (net_dev->features & ~data & NETIF_F_NTUPLE) {
2348 rc = efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2353 /* If Rx VLAN filter is changed, update filters via mac_reconfigure */
2354 if ((net_dev->features ^ data) & NETIF_F_HW_VLAN_CTAG_FILTER) {
2355 /* efx_set_rx_mode() will schedule MAC work to update filters
2356 * when a new features are finally set in net_dev.
2358 efx_set_rx_mode(net_dev);
2364 static int efx_vlan_rx_add_vid(struct net_device *net_dev, __be16 proto, u16 vid)
2366 struct efx_nic *efx = netdev_priv(net_dev);
2368 if (efx->type->vlan_rx_add_vid)
2369 return efx->type->vlan_rx_add_vid(efx, proto, vid);
2374 static int efx_vlan_rx_kill_vid(struct net_device *net_dev, __be16 proto, u16 vid)
2376 struct efx_nic *efx = netdev_priv(net_dev);
2378 if (efx->type->vlan_rx_kill_vid)
2379 return efx->type->vlan_rx_kill_vid(efx, proto, vid);
2384 static const struct net_device_ops efx_netdev_ops = {
2385 .ndo_open = efx_net_open,
2386 .ndo_stop = efx_net_stop,
2387 .ndo_get_stats64 = efx_net_stats,
2388 .ndo_tx_timeout = efx_watchdog,
2389 .ndo_start_xmit = efx_hard_start_xmit,
2390 .ndo_validate_addr = eth_validate_addr,
2391 .ndo_do_ioctl = efx_ioctl,
2392 .ndo_change_mtu = efx_change_mtu,
2393 .ndo_set_mac_address = efx_set_mac_address,
2394 .ndo_set_rx_mode = efx_set_rx_mode,
2395 .ndo_set_features = efx_set_features,
2396 .ndo_vlan_rx_add_vid = efx_vlan_rx_add_vid,
2397 .ndo_vlan_rx_kill_vid = efx_vlan_rx_kill_vid,
2398 #ifdef CONFIG_SFC_SRIOV
2399 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2400 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2401 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2402 .ndo_get_vf_config = efx_sriov_get_vf_config,
2403 .ndo_set_vf_link_state = efx_sriov_set_vf_link_state,
2404 .ndo_get_phys_port_id = efx_sriov_get_phys_port_id,
2406 #ifdef CONFIG_NET_POLL_CONTROLLER
2407 .ndo_poll_controller = efx_netpoll,
2409 .ndo_setup_tc = efx_setup_tc,
2410 #ifdef CONFIG_NET_RX_BUSY_POLL
2411 .ndo_busy_poll = efx_busy_poll,
2413 #ifdef CONFIG_RFS_ACCEL
2414 .ndo_rx_flow_steer = efx_filter_rfs,
2418 static void efx_update_name(struct efx_nic *efx)
2420 strcpy(efx->name, efx->net_dev->name);
2421 efx_mtd_rename(efx);
2422 efx_set_channel_names(efx);
2425 static int efx_netdev_event(struct notifier_block *this,
2426 unsigned long event, void *ptr)
2428 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2430 if ((net_dev->netdev_ops == &efx_netdev_ops) &&
2431 event == NETDEV_CHANGENAME)
2432 efx_update_name(netdev_priv(net_dev));
2437 static struct notifier_block efx_netdev_notifier = {
2438 .notifier_call = efx_netdev_event,
2442 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2444 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2445 return sprintf(buf, "%d\n", efx->phy_type);
2447 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2449 #ifdef CONFIG_SFC_MCDI_LOGGING
2450 static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr,
2453 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2454 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2456 return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled);
2458 static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr,
2459 const char *buf, size_t count)
2461 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2462 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2463 bool enable = count > 0 && *buf != '0';
2465 mcdi->logging_enabled = enable;
2468 static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log);
2471 static int efx_register_netdev(struct efx_nic *efx)
2473 struct net_device *net_dev = efx->net_dev;
2474 struct efx_channel *channel;
2477 net_dev->watchdog_timeo = 5 * HZ;
2478 net_dev->irq = efx->pci_dev->irq;
2479 net_dev->netdev_ops = &efx_netdev_ops;
2480 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0)
2481 net_dev->priv_flags |= IFF_UNICAST_FLT;
2482 net_dev->ethtool_ops = &efx_ethtool_ops;
2483 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2487 /* Enable resets to be scheduled and check whether any were
2488 * already requested. If so, the NIC is probably hosed so we
2491 efx->state = STATE_READY;
2492 smp_mb(); /* ensure we change state before checking reset_pending */
2493 if (efx->reset_pending) {
2494 netif_err(efx, probe, efx->net_dev,
2495 "aborting probe due to scheduled reset\n");
2500 rc = dev_alloc_name(net_dev, net_dev->name);
2503 efx_update_name(efx);
2505 /* Always start with carrier off; PHY events will detect the link */
2506 netif_carrier_off(net_dev);
2508 rc = register_netdevice(net_dev);
2512 efx_for_each_channel(channel, efx) {
2513 struct efx_tx_queue *tx_queue;
2514 efx_for_each_channel_tx_queue(tx_queue, channel)
2515 efx_init_tx_queue_core_txq(tx_queue);
2522 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2524 netif_err(efx, drv, efx->net_dev,
2525 "failed to init net dev attributes\n");
2526 goto fail_registered;
2528 #ifdef CONFIG_SFC_MCDI_LOGGING
2529 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2531 netif_err(efx, drv, efx->net_dev,
2532 "failed to init net dev attributes\n");
2533 goto fail_attr_mcdi_logging;
2539 #ifdef CONFIG_SFC_MCDI_LOGGING
2540 fail_attr_mcdi_logging:
2541 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2545 efx_dissociate(efx);
2546 unregister_netdevice(net_dev);
2548 efx->state = STATE_UNINIT;
2550 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2554 static void efx_unregister_netdev(struct efx_nic *efx)
2559 BUG_ON(netdev_priv(efx->net_dev) != efx);
2561 if (efx_dev_registered(efx)) {
2562 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2563 #ifdef CONFIG_SFC_MCDI_LOGGING
2564 device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2566 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2567 unregister_netdev(efx->net_dev);
2571 /**************************************************************************
2573 * Device reset and suspend
2575 **************************************************************************/
2577 /* Tears down the entire software state and most of the hardware state
2579 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2581 EFX_ASSERT_RESET_SERIALISED(efx);
2583 if (method == RESET_TYPE_MCDI_TIMEOUT)
2584 efx->type->prepare_flr(efx);
2587 efx_disable_interrupts(efx);
2589 mutex_lock(&efx->mac_lock);
2590 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2591 method != RESET_TYPE_DATAPATH)
2592 efx->phy_op->fini(efx);
2593 efx->type->fini(efx);
2596 /* This function will always ensure that the locks acquired in
2597 * efx_reset_down() are released. A failure return code indicates
2598 * that we were unable to reinitialise the hardware, and the
2599 * driver should be disabled. If ok is false, then the rx and tx
2600 * engines are not restarted, pending a RESET_DISABLE. */
2601 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2605 EFX_ASSERT_RESET_SERIALISED(efx);
2607 if (method == RESET_TYPE_MCDI_TIMEOUT)
2608 efx->type->finish_flr(efx);
2610 /* Ensure that SRAM is initialised even if we're disabling the device */
2611 rc = efx->type->init(efx);
2613 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2620 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2621 method != RESET_TYPE_DATAPATH) {
2622 rc = efx->phy_op->init(efx);
2625 rc = efx->phy_op->reconfigure(efx);
2626 if (rc && rc != -EPERM)
2627 netif_err(efx, drv, efx->net_dev,
2628 "could not restore PHY settings\n");
2631 rc = efx_enable_interrupts(efx);
2635 #ifdef CONFIG_SFC_SRIOV
2636 rc = efx->type->vswitching_restore(efx);
2637 if (rc) /* not fatal; the PF will still work fine */
2638 netif_warn(efx, probe, efx->net_dev,
2639 "failed to restore vswitching rc=%d;"
2640 " VFs may not function\n", rc);
2643 down_read(&efx->filter_sem);
2644 efx_restore_filters(efx);
2645 up_read(&efx->filter_sem);
2646 if (efx->type->sriov_reset)
2647 efx->type->sriov_reset(efx);
2649 mutex_unlock(&efx->mac_lock);
2656 efx->port_initialized = false;
2658 mutex_unlock(&efx->mac_lock);
2663 /* Reset the NIC using the specified method. Note that the reset may
2664 * fail, in which case the card will be left in an unusable state.
2666 * Caller must hold the rtnl_lock.
2668 int efx_reset(struct efx_nic *efx, enum reset_type method)
2673 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2674 RESET_TYPE(method));
2676 efx_device_detach_sync(efx);
2677 efx_reset_down(efx, method);
2679 rc = efx->type->reset(efx, method);
2681 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2685 /* Clear flags for the scopes we covered. We assume the NIC and
2686 * driver are now quiescent so that there is no race here.
2688 if (method < RESET_TYPE_MAX_METHOD)
2689 efx->reset_pending &= -(1 << (method + 1));
2690 else /* it doesn't fit into the well-ordered scope hierarchy */
2691 __clear_bit(method, &efx->reset_pending);
2693 /* Reinitialise bus-mastering, which may have been turned off before
2694 * the reset was scheduled. This is still appropriate, even in the
2695 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2696 * can respond to requests. */
2697 pci_set_master(efx->pci_dev);
2700 /* Leave device stopped if necessary */
2702 method == RESET_TYPE_DISABLE ||
2703 method == RESET_TYPE_RECOVER_OR_DISABLE;
2704 rc2 = efx_reset_up(efx, method, !disabled);
2712 dev_close(efx->net_dev);
2713 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2714 efx->state = STATE_DISABLED;
2716 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2717 netif_device_attach(efx->net_dev);
2722 /* Try recovery mechanisms.
2723 * For now only EEH is supported.
2724 * Returns 0 if the recovery mechanisms are unsuccessful.
2725 * Returns a non-zero value otherwise.
2727 int efx_try_recovery(struct efx_nic *efx)
2730 /* A PCI error can occur and not be seen by EEH because nothing
2731 * happens on the PCI bus. In this case the driver may fail and
2732 * schedule a 'recover or reset', leading to this recovery handler.
2733 * Manually call the eeh failure check function.
2735 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
2736 if (eeh_dev_check_failure(eehdev)) {
2737 /* The EEH mechanisms will handle the error and reset the
2738 * device if necessary.
2746 static void efx_wait_for_bist_end(struct efx_nic *efx)
2750 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2751 if (efx_mcdi_poll_reboot(efx))
2753 msleep(BIST_WAIT_DELAY_MS);
2756 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2758 /* Either way unset the BIST flag. If we found no reboot we probably
2759 * won't recover, but we should try.
2761 efx->mc_bist_for_other_fn = false;
2764 /* The worker thread exists so that code that cannot sleep can
2765 * schedule a reset for later.
2767 static void efx_reset_work(struct work_struct *data)
2769 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2770 unsigned long pending;
2771 enum reset_type method;
2773 pending = ACCESS_ONCE(efx->reset_pending);
2774 method = fls(pending) - 1;
2776 if (method == RESET_TYPE_MC_BIST)
2777 efx_wait_for_bist_end(efx);
2779 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2780 method == RESET_TYPE_RECOVER_OR_ALL) &&
2781 efx_try_recovery(efx))
2789 /* We checked the state in efx_schedule_reset() but it may
2790 * have changed by now. Now that we have the RTNL lock,
2791 * it cannot change again.
2793 if (efx->state == STATE_READY)
2794 (void)efx_reset(efx, method);
2799 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2801 enum reset_type method;
2803 if (efx->state == STATE_RECOVERY) {
2804 netif_dbg(efx, drv, efx->net_dev,
2805 "recovering: skip scheduling %s reset\n",
2811 case RESET_TYPE_INVISIBLE:
2812 case RESET_TYPE_ALL:
2813 case RESET_TYPE_RECOVER_OR_ALL:
2814 case RESET_TYPE_WORLD:
2815 case RESET_TYPE_DISABLE:
2816 case RESET_TYPE_RECOVER_OR_DISABLE:
2817 case RESET_TYPE_DATAPATH:
2818 case RESET_TYPE_MC_BIST:
2819 case RESET_TYPE_MCDI_TIMEOUT:
2821 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2822 RESET_TYPE(method));
2825 method = efx->type->map_reset_reason(type);
2826 netif_dbg(efx, drv, efx->net_dev,
2827 "scheduling %s reset for %s\n",
2828 RESET_TYPE(method), RESET_TYPE(type));
2832 set_bit(method, &efx->reset_pending);
2833 smp_mb(); /* ensure we change reset_pending before checking state */
2835 /* If we're not READY then just leave the flags set as the cue
2836 * to abort probing or reschedule the reset later.
2838 if (ACCESS_ONCE(efx->state) != STATE_READY)
2841 /* efx_process_channel() will no longer read events once a
2842 * reset is scheduled. So switch back to poll'd MCDI completions. */
2843 efx_mcdi_mode_poll(efx);
2845 queue_work(reset_workqueue, &efx->reset_work);
2848 /**************************************************************************
2850 * List of NICs we support
2852 **************************************************************************/
2854 /* PCI device ID table */
2855 static const struct pci_device_id efx_pci_table[] = {
2856 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2857 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2858 .driver_data = (unsigned long) &falcon_a1_nic_type},
2859 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2860 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2861 .driver_data = (unsigned long) &falcon_b0_nic_type},
2862 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2863 .driver_data = (unsigned long) &siena_a0_nic_type},
2864 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2865 .driver_data = (unsigned long) &siena_a0_nic_type},
2866 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2867 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2868 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */
2869 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2870 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */
2871 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2872 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1923), /* SFC9140 VF */
2873 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2874 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0a03), /* SFC9220 PF */
2875 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2876 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1a03), /* SFC9220 VF */
2877 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2878 {0} /* end of list */
2881 /**************************************************************************
2883 * Dummy PHY/MAC operations
2885 * Can be used for some unimplemented operations
2886 * Needed so all function pointers are valid and do not have to be tested
2889 **************************************************************************/
2890 int efx_port_dummy_op_int(struct efx_nic *efx)
2894 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2896 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2901 static const struct efx_phy_operations efx_dummy_phy_operations = {
2902 .init = efx_port_dummy_op_int,
2903 .reconfigure = efx_port_dummy_op_int,
2904 .poll = efx_port_dummy_op_poll,
2905 .fini = efx_port_dummy_op_void,
2908 /**************************************************************************
2912 **************************************************************************/
2914 /* This zeroes out and then fills in the invariants in a struct
2915 * efx_nic (including all sub-structures).
2917 static int efx_init_struct(struct efx_nic *efx,
2918 struct pci_dev *pci_dev, struct net_device *net_dev)
2922 /* Initialise common structures */
2923 INIT_LIST_HEAD(&efx->node);
2924 INIT_LIST_HEAD(&efx->secondary_list);
2925 spin_lock_init(&efx->biu_lock);
2926 #ifdef CONFIG_SFC_MTD
2927 INIT_LIST_HEAD(&efx->mtd_list);
2929 INIT_WORK(&efx->reset_work, efx_reset_work);
2930 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2931 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2932 efx->pci_dev = pci_dev;
2933 efx->msg_enable = debug;
2934 efx->state = STATE_UNINIT;
2935 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2937 efx->net_dev = net_dev;
2938 efx->rx_prefix_size = efx->type->rx_prefix_size;
2940 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2941 efx->rx_packet_hash_offset =
2942 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2943 efx->rx_packet_ts_offset =
2944 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
2945 spin_lock_init(&efx->stats_lock);
2946 mutex_init(&efx->mac_lock);
2947 efx->phy_op = &efx_dummy_phy_operations;
2948 efx->mdio.dev = net_dev;
2949 INIT_WORK(&efx->mac_work, efx_mac_work);
2950 init_waitqueue_head(&efx->flush_wq);
2952 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2953 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2954 if (!efx->channel[i])
2956 efx->msi_context[i].efx = efx;
2957 efx->msi_context[i].index = i;
2960 /* Higher numbered interrupt modes are less capable! */
2961 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2964 /* Would be good to use the net_dev name, but we're too early */
2965 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2967 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2968 if (!efx->workqueue)
2974 efx_fini_struct(efx);
2978 static void efx_fini_struct(struct efx_nic *efx)
2982 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2983 kfree(efx->channel[i]);
2987 if (efx->workqueue) {
2988 destroy_workqueue(efx->workqueue);
2989 efx->workqueue = NULL;
2993 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats)
2995 u64 n_rx_nodesc_trunc = 0;
2996 struct efx_channel *channel;
2998 efx_for_each_channel(channel, efx)
2999 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
3000 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
3001 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
3004 /**************************************************************************
3008 **************************************************************************/
3010 /* Main body of final NIC shutdown code
3011 * This is called only at module unload (or hotplug removal).
3013 static void efx_pci_remove_main(struct efx_nic *efx)
3015 /* Flush reset_work. It can no longer be scheduled since we
3018 BUG_ON(efx->state == STATE_READY);
3019 cancel_work_sync(&efx->reset_work);
3021 efx_disable_interrupts(efx);
3022 efx_nic_fini_interrupt(efx);
3024 efx->type->fini(efx);
3026 efx_remove_all(efx);
3029 /* Final NIC shutdown
3030 * This is called only at module unload (or hotplug removal). A PF can call
3031 * this on its VFs to ensure they are unbound first.
3033 static void efx_pci_remove(struct pci_dev *pci_dev)
3035 struct efx_nic *efx;
3037 efx = pci_get_drvdata(pci_dev);
3041 /* Mark the NIC as fini, then stop the interface */
3043 efx_dissociate(efx);
3044 dev_close(efx->net_dev);
3045 efx_disable_interrupts(efx);
3046 efx->state = STATE_UNINIT;
3049 if (efx->type->sriov_fini)
3050 efx->type->sriov_fini(efx);
3052 efx_unregister_netdev(efx);
3054 efx_mtd_remove(efx);
3056 efx_pci_remove_main(efx);
3059 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
3061 efx_fini_struct(efx);
3062 free_netdev(efx->net_dev);
3064 pci_disable_pcie_error_reporting(pci_dev);
3067 /* NIC VPD information
3068 * Called during probe to display the part number of the
3069 * installed NIC. VPD is potentially very large but this should
3070 * always appear within the first 512 bytes.
3072 #define SFC_VPD_LEN 512
3073 static void efx_probe_vpd_strings(struct efx_nic *efx)
3075 struct pci_dev *dev = efx->pci_dev;
3076 char vpd_data[SFC_VPD_LEN];
3078 int ro_start, ro_size, i, j;
3080 /* Get the vpd data from the device */
3081 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
3082 if (vpd_size <= 0) {
3083 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
3087 /* Get the Read only section */
3088 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
3090 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
3094 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
3096 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3097 if (i + j > vpd_size)
3100 /* Get the Part number */
3101 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
3103 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
3107 j = pci_vpd_info_field_size(&vpd_data[i]);
3108 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3109 if (i + j > vpd_size) {
3110 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
3114 netif_info(efx, drv, efx->net_dev,
3115 "Part Number : %.*s\n", j, &vpd_data[i]);
3117 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3119 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
3121 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
3125 j = pci_vpd_info_field_size(&vpd_data[i]);
3126 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3127 if (i + j > vpd_size) {
3128 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
3132 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
3136 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
3140 /* Main body of NIC initialisation
3141 * This is called at module load (or hotplug insertion, theoretically).
3143 static int efx_pci_probe_main(struct efx_nic *efx)
3147 /* Do start-of-day initialisation */
3148 rc = efx_probe_all(efx);
3154 rc = efx->type->init(efx);
3156 netif_err(efx, probe, efx->net_dev,
3157 "failed to initialise NIC\n");
3161 rc = efx_init_port(efx);
3163 netif_err(efx, probe, efx->net_dev,
3164 "failed to initialise port\n");
3168 rc = efx_nic_init_interrupt(efx);
3171 rc = efx_enable_interrupts(efx);
3178 efx_nic_fini_interrupt(efx);
3182 efx->type->fini(efx);
3185 efx_remove_all(efx);
3190 /* NIC initialisation
3192 * This is called at module load (or hotplug insertion,
3193 * theoretically). It sets up PCI mappings, resets the NIC,
3194 * sets up and registers the network devices with the kernel and hooks
3195 * the interrupt service routine. It does not prepare the device for
3196 * transmission; this is left to the first time one of the network
3197 * interfaces is brought up (i.e. efx_net_open).
3199 static int efx_pci_probe(struct pci_dev *pci_dev,
3200 const struct pci_device_id *entry)
3202 struct net_device *net_dev;
3203 struct efx_nic *efx;
3206 /* Allocate and initialise a struct net_device and struct efx_nic */
3207 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
3211 efx = netdev_priv(net_dev);
3212 efx->type = (const struct efx_nic_type *) entry->driver_data;
3213 efx->fixed_features |= NETIF_F_HIGHDMA;
3214 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
3215 NETIF_F_TSO | NETIF_F_RXCSUM);
3216 if (efx->type->offload_features & (NETIF_F_IPV6_CSUM | NETIF_F_HW_CSUM))
3217 net_dev->features |= NETIF_F_TSO6;
3218 /* Mask for features that also apply to VLAN devices */
3219 net_dev->vlan_features |= (NETIF_F_HW_CSUM | NETIF_F_SG |
3220 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
3223 net_dev->hw_features = net_dev->features & ~efx->fixed_features;
3225 /* Disable VLAN filtering by default. It may be enforced if
3226 * the feature is fixed (i.e. VLAN filters are required to
3227 * receive VLAN tagged packets due to vPort restrictions).
3229 net_dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
3230 net_dev->features |= efx->fixed_features;
3232 pci_set_drvdata(pci_dev, efx);
3233 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
3234 rc = efx_init_struct(efx, pci_dev, net_dev);
3238 netif_info(efx, probe, efx->net_dev,
3239 "Solarflare NIC detected\n");
3241 if (!efx->type->is_vf)
3242 efx_probe_vpd_strings(efx);
3244 /* Set up basic I/O (BAR mappings etc) */
3245 rc = efx_init_io(efx);
3249 rc = efx_pci_probe_main(efx);
3253 rc = efx_register_netdev(efx);
3257 if (efx->type->sriov_init) {
3258 rc = efx->type->sriov_init(efx);
3260 netif_err(efx, probe, efx->net_dev,
3261 "SR-IOV can't be enabled rc %d\n", rc);
3264 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
3266 /* Try to create MTDs, but allow this to fail */
3268 rc = efx_mtd_probe(efx);
3270 if (rc && rc != -EPERM)
3271 netif_warn(efx, probe, efx->net_dev,
3272 "failed to create MTDs (%d)\n", rc);
3274 rc = pci_enable_pcie_error_reporting(pci_dev);
3275 if (rc && rc != -EINVAL)
3276 netif_notice(efx, probe, efx->net_dev,
3277 "PCIE error reporting unavailable (%d).\n",
3283 efx_pci_remove_main(efx);
3287 efx_fini_struct(efx);
3290 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
3291 free_netdev(net_dev);
3295 /* efx_pci_sriov_configure returns the actual number of Virtual Functions
3296 * enabled on success
3298 #ifdef CONFIG_SFC_SRIOV
3299 static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
3302 struct efx_nic *efx = pci_get_drvdata(dev);
3304 if (efx->type->sriov_configure) {
3305 rc = efx->type->sriov_configure(efx, num_vfs);
3315 static int efx_pm_freeze(struct device *dev)
3317 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3321 if (efx->state != STATE_DISABLED) {
3322 efx->state = STATE_UNINIT;
3324 efx_device_detach_sync(efx);
3327 efx_disable_interrupts(efx);
3335 static int efx_pm_thaw(struct device *dev)
3338 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3342 if (efx->state != STATE_DISABLED) {
3343 rc = efx_enable_interrupts(efx);
3347 mutex_lock(&efx->mac_lock);
3348 efx->phy_op->reconfigure(efx);
3349 mutex_unlock(&efx->mac_lock);
3353 netif_device_attach(efx->net_dev);
3355 efx->state = STATE_READY;
3357 efx->type->resume_wol(efx);
3362 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
3363 queue_work(reset_workqueue, &efx->reset_work);
3373 static int efx_pm_poweroff(struct device *dev)
3375 struct pci_dev *pci_dev = to_pci_dev(dev);
3376 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3378 efx->type->fini(efx);
3380 efx->reset_pending = 0;
3382 pci_save_state(pci_dev);
3383 return pci_set_power_state(pci_dev, PCI_D3hot);
3386 /* Used for both resume and restore */
3387 static int efx_pm_resume(struct device *dev)
3389 struct pci_dev *pci_dev = to_pci_dev(dev);
3390 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3393 rc = pci_set_power_state(pci_dev, PCI_D0);
3396 pci_restore_state(pci_dev);
3397 rc = pci_enable_device(pci_dev);
3400 pci_set_master(efx->pci_dev);
3401 rc = efx->type->reset(efx, RESET_TYPE_ALL);
3404 rc = efx->type->init(efx);
3407 rc = efx_pm_thaw(dev);
3411 static int efx_pm_suspend(struct device *dev)
3416 rc = efx_pm_poweroff(dev);
3422 static const struct dev_pm_ops efx_pm_ops = {
3423 .suspend = efx_pm_suspend,
3424 .resume = efx_pm_resume,
3425 .freeze = efx_pm_freeze,
3426 .thaw = efx_pm_thaw,
3427 .poweroff = efx_pm_poweroff,
3428 .restore = efx_pm_resume,
3431 /* A PCI error affecting this device was detected.
3432 * At this point MMIO and DMA may be disabled.
3433 * Stop the software path and request a slot reset.
3435 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3436 enum pci_channel_state state)
3438 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3439 struct efx_nic *efx = pci_get_drvdata(pdev);
3441 if (state == pci_channel_io_perm_failure)
3442 return PCI_ERS_RESULT_DISCONNECT;
3446 if (efx->state != STATE_DISABLED) {
3447 efx->state = STATE_RECOVERY;
3448 efx->reset_pending = 0;
3450 efx_device_detach_sync(efx);
3453 efx_disable_interrupts(efx);
3455 status = PCI_ERS_RESULT_NEED_RESET;
3457 /* If the interface is disabled we don't want to do anything
3460 status = PCI_ERS_RESULT_RECOVERED;
3465 pci_disable_device(pdev);
3470 /* Fake a successful reset, which will be performed later in efx_io_resume. */
3471 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3473 struct efx_nic *efx = pci_get_drvdata(pdev);
3474 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3477 if (pci_enable_device(pdev)) {
3478 netif_err(efx, hw, efx->net_dev,
3479 "Cannot re-enable PCI device after reset.\n");
3480 status = PCI_ERS_RESULT_DISCONNECT;
3483 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3485 netif_err(efx, hw, efx->net_dev,
3486 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3487 /* Non-fatal error. Continue. */
3493 /* Perform the actual reset and resume I/O operations. */
3494 static void efx_io_resume(struct pci_dev *pdev)
3496 struct efx_nic *efx = pci_get_drvdata(pdev);
3501 if (efx->state == STATE_DISABLED)
3504 rc = efx_reset(efx, RESET_TYPE_ALL);
3506 netif_err(efx, hw, efx->net_dev,
3507 "efx_reset failed after PCI error (%d)\n", rc);
3509 efx->state = STATE_READY;
3510 netif_dbg(efx, hw, efx->net_dev,
3511 "Done resetting and resuming IO after PCI error.\n");
3518 /* For simplicity and reliability, we always require a slot reset and try to
3519 * reset the hardware when a pci error affecting the device is detected.
3520 * We leave both the link_reset and mmio_enabled callback unimplemented:
3521 * with our request for slot reset the mmio_enabled callback will never be
3522 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3524 static const struct pci_error_handlers efx_err_handlers = {
3525 .error_detected = efx_io_error_detected,
3526 .slot_reset = efx_io_slot_reset,
3527 .resume = efx_io_resume,
3530 static struct pci_driver efx_pci_driver = {
3531 .name = KBUILD_MODNAME,
3532 .id_table = efx_pci_table,
3533 .probe = efx_pci_probe,
3534 .remove = efx_pci_remove,
3535 .driver.pm = &efx_pm_ops,
3536 .err_handler = &efx_err_handlers,
3537 #ifdef CONFIG_SFC_SRIOV
3538 .sriov_configure = efx_pci_sriov_configure,
3542 /**************************************************************************
3544 * Kernel module interface
3546 *************************************************************************/
3548 module_param(interrupt_mode, uint, 0444);
3549 MODULE_PARM_DESC(interrupt_mode,
3550 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3552 static int __init efx_init_module(void)
3556 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3558 rc = register_netdevice_notifier(&efx_netdev_notifier);
3562 #ifdef CONFIG_SFC_SRIOV
3563 rc = efx_init_sriov();
3568 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3569 if (!reset_workqueue) {
3574 rc = pci_register_driver(&efx_pci_driver);
3581 destroy_workqueue(reset_workqueue);
3583 #ifdef CONFIG_SFC_SRIOV
3587 unregister_netdevice_notifier(&efx_netdev_notifier);
3592 static void __exit efx_exit_module(void)
3594 printk(KERN_INFO "Solarflare NET driver unloading\n");
3596 pci_unregister_driver(&efx_pci_driver);
3597 destroy_workqueue(reset_workqueue);
3598 #ifdef CONFIG_SFC_SRIOV
3601 unregister_netdevice_notifier(&efx_netdev_notifier);
3605 module_init(efx_init_module);
3606 module_exit(efx_exit_module);
3608 MODULE_AUTHOR("Solarflare Communications and "
3609 "Michael Brown <mbrown@fensystems.co.uk>");
3610 MODULE_DESCRIPTION("Solarflare network driver");
3611 MODULE_LICENSE("GPL");
3612 MODULE_DEVICE_TABLE(pci, efx_pci_table);