1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
5 /* Qualcomm Technologies, Inc. EMAC PHY Controller driver.
8 #include <linux/of_mdio.h>
10 #include <linux/iopoll.h>
11 #include <linux/acpi.h>
14 /* EMAC base register offsets */
15 #define EMAC_MDIO_CTRL 0x001414
16 #define EMAC_PHY_STS 0x001418
17 #define EMAC_MDIO_EX_CTRL 0x001440
20 #define MDIO_MODE BIT(30)
21 #define MDIO_PR BIT(29)
22 #define MDIO_AP_EN BIT(28)
23 #define MDIO_BUSY BIT(27)
24 #define MDIO_CLK_SEL_BMSK 0x7000000
25 #define MDIO_CLK_SEL_SHFT 24
26 #define MDIO_START BIT(23)
27 #define SUP_PREAMBLE BIT(22)
28 #define MDIO_RD_NWR BIT(21)
29 #define MDIO_REG_ADDR_BMSK 0x1f0000
30 #define MDIO_REG_ADDR_SHFT 16
31 #define MDIO_DATA_BMSK 0xffff
32 #define MDIO_DATA_SHFT 0
35 #define PHY_ADDR_BMSK 0x1f0000
36 #define PHY_ADDR_SHFT 16
38 #define MDIO_CLK_25_4 0
39 #define MDIO_CLK_25_28 7
41 #define MDIO_WAIT_TIMES 1000
42 #define MDIO_STATUS_DELAY_TIME 1
44 static int emac_mdio_read(struct mii_bus *bus, int addr, int regnum)
46 struct emac_adapter *adpt = bus->priv;
49 emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK,
50 (addr << PHY_ADDR_SHFT));
53 ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) |
54 ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) |
55 MDIO_START | MDIO_RD_NWR;
57 writel(reg, adpt->base + EMAC_MDIO_CTRL);
59 if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg,
60 !(reg & (MDIO_START | MDIO_BUSY)),
61 MDIO_STATUS_DELAY_TIME, MDIO_WAIT_TIMES * 100))
64 return (reg >> MDIO_DATA_SHFT) & MDIO_DATA_BMSK;
67 static int emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
69 struct emac_adapter *adpt = bus->priv;
72 emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK,
73 (addr << PHY_ADDR_SHFT));
76 ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) |
77 ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) |
78 ((val << MDIO_DATA_SHFT) & MDIO_DATA_BMSK) |
81 writel(reg, adpt->base + EMAC_MDIO_CTRL);
83 if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg,
84 !(reg & (MDIO_START | MDIO_BUSY)),
85 MDIO_STATUS_DELAY_TIME, MDIO_WAIT_TIMES * 100))
91 /* Configure the MDIO bus and connect the external PHY */
92 int emac_phy_config(struct platform_device *pdev, struct emac_adapter *adpt)
94 struct device_node *np = pdev->dev.of_node;
95 struct mii_bus *mii_bus;
98 /* Create the mii_bus object for talking to the MDIO bus */
99 adpt->mii_bus = mii_bus = devm_mdiobus_alloc(&pdev->dev);
103 mii_bus->name = "emac-mdio";
104 snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
105 mii_bus->read = emac_mdio_read;
106 mii_bus->write = emac_mdio_write;
107 mii_bus->parent = &pdev->dev;
108 mii_bus->priv = adpt;
110 if (has_acpi_companion(&pdev->dev)) {
113 ret = mdiobus_register(mii_bus);
115 dev_err(&pdev->dev, "could not register mdio bus\n");
118 ret = device_property_read_u32(&pdev->dev, "phy-channel",
121 /* If we can't read a valid phy address, then assume
122 * that there is only one phy on this mdio bus.
124 adpt->phydev = phy_find_first(mii_bus);
126 adpt->phydev = mdiobus_get_phy(mii_bus, phy_addr);
128 /* of_phy_find_device() claims a reference to the phydev,
129 * so we do that here manually as well. When the driver
130 * later unloads, it can unilaterally drop the reference
131 * without worrying about ACPI vs DT.
134 get_device(&adpt->phydev->mdio.dev);
136 struct device_node *phy_np;
138 ret = of_mdiobus_register(mii_bus, np);
140 dev_err(&pdev->dev, "could not register mdio bus\n");
144 phy_np = of_parse_phandle(np, "phy-handle", 0);
145 adpt->phydev = of_phy_find_device(phy_np);
150 dev_err(&pdev->dev, "could not find external phy\n");
151 mdiobus_unregister(mii_bus);