drivers/net/ethernet/qlogic/qed/qed_sp_commands.c

   1 /* QLogic qed NIC Driver
   2  * Copyright (c) 2015-2017  QLogic Corporation
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and /or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <linux/types.h>
  34 #include <asm/byteorder.h>
  35 #include <linux/bitops.h>
  36 #include <linux/errno.h>
  37 #include <linux/kernel.h>
  38 #include <linux/string.h>
  39 #include "qed.h"
  40 #include <linux/qed/qed_chain.h>
  41 #include "qed_cxt.h"
  42 #include "qed_dcbx.h"
  43 #include "qed_hsi.h"
  44 #include "qed_hw.h"
  45 #include "qed_int.h"
  46 #include "qed_reg_addr.h"
  47 #include "qed_sp.h"
  48 #include "qed_sriov.h"
  49
  50 int qed_sp_init_request(struct qed_hwfn *p_hwfn,
  51                         struct qed_spq_entry **pp_ent,
  52                         u8 cmd, u8 protocol, struct qed_sp_init_data *p_data)
  53 {
  54         u32 opaque_cid = p_data->opaque_fid << 16 | p_data->cid;
  55         struct qed_spq_entry *p_ent = NULL;
  56         int rc;
  57
  58         if (!pp_ent)
  59                 return -ENOMEM;
  60
  61         rc = qed_spq_get_entry(p_hwfn, pp_ent);
  62
  63         if (rc)
  64                 return rc;
  65
  66         p_ent = *pp_ent;
  67
  68         p_ent->elem.hdr.cid             = cpu_to_le32(opaque_cid);
  69         p_ent->elem.hdr.cmd_id          = cmd;
  70         p_ent->elem.hdr.protocol_id     = protocol;
  71
  72         p_ent->priority         = QED_SPQ_PRIORITY_NORMAL;
  73         p_ent->comp_mode        = p_data->comp_mode;
  74         p_ent->comp_done.done   = 0;
  75
  76         switch (p_ent->comp_mode) {
  77         case QED_SPQ_MODE_EBLOCK:
  78                 p_ent->comp_cb.cookie = &p_ent->comp_done;
  79                 break;
  80
  81         case QED_SPQ_MODE_BLOCK:
  82                 if (!p_data->p_comp_data)
  83                         goto err;
  84
  85                 p_ent->comp_cb.cookie = p_data->p_comp_data->cookie;
  86                 break;
  87
  88         case QED_SPQ_MODE_CB:
  89                 if (!p_data->p_comp_data)
  90                         p_ent->comp_cb.function = NULL;
  91                 else
  92                         p_ent->comp_cb = *p_data->p_comp_data;
  93                 break;
  94
  95         default:
  96                 DP_NOTICE(p_hwfn, "Unknown SPQE completion mode %d\n",
  97                           p_ent->comp_mode);
  98                 goto err;
  99         }
 100
 101         DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
 102                    "Initialized: CID %08x cmd %02x protocol %02x data_addr %lu comp_mode [%s]\n",
 103                    opaque_cid, cmd, protocol,
 104                    (unsigned long)&p_ent->ramrod,
 105                    D_TRINE(p_ent->comp_mode, QED_SPQ_MODE_EBLOCK,
 106                            QED_SPQ_MODE_BLOCK, "MODE_EBLOCK", "MODE_BLOCK",
 107                            "MODE_CB"));
 108
 109         memset(&p_ent->ramrod, 0, sizeof(p_ent->ramrod));
 110
 111         return 0;
 112
 113 err:
 114         /* qed_spq_get_entry() can either get an entry from the free_pool,
 115          * or, if no entries are left, allocate a new entry and add it to
 116          * the unlimited_pending list.
 117          */
 118         if (p_ent->queue == &p_hwfn->p_spq->unlimited_pending)
 119                 kfree(p_ent);
 120         else
 121                 qed_spq_return_entry(p_hwfn, p_ent);
 122
 123         return -EINVAL;
 124 }
 125
 126 static enum tunnel_clss qed_tunn_clss_to_fw_clss(u8 type)
 127 {
 128         switch (type) {
 129         case QED_TUNN_CLSS_MAC_VLAN:
 130                 return TUNNEL_CLSS_MAC_VLAN;
 131         case QED_TUNN_CLSS_MAC_VNI:
 132                 return TUNNEL_CLSS_MAC_VNI;
 133         case QED_TUNN_CLSS_INNER_MAC_VLAN:
 134                 return TUNNEL_CLSS_INNER_MAC_VLAN;
 135         case QED_TUNN_CLSS_INNER_MAC_VNI:
 136                 return TUNNEL_CLSS_INNER_MAC_VNI;
 137         case QED_TUNN_CLSS_MAC_VLAN_DUAL_STAGE:
 138                 return TUNNEL_CLSS_MAC_VLAN_DUAL_STAGE;
 139         default:
 140                 return TUNNEL_CLSS_MAC_VLAN;
 141         }
 142 }
 143
 144 static void
 145 qed_set_pf_update_tunn_mode(struct qed_tunnel_info *p_tun,
 146                             struct qed_tunnel_info *p_src, bool b_pf_start)
 147 {
 148         if (p_src->vxlan.b_update_mode || b_pf_start)
 149                 p_tun->vxlan.b_mode_enabled = p_src->vxlan.b_mode_enabled;
 150
 151         if (p_src->l2_gre.b_update_mode || b_pf_start)
 152                 p_tun->l2_gre.b_mode_enabled = p_src->l2_gre.b_mode_enabled;
 153
 154         if (p_src->ip_gre.b_update_mode || b_pf_start)
 155                 p_tun->ip_gre.b_mode_enabled = p_src->ip_gre.b_mode_enabled;
 156
 157         if (p_src->l2_geneve.b_update_mode || b_pf_start)
 158                 p_tun->l2_geneve.b_mode_enabled =
 159                     p_src->l2_geneve.b_mode_enabled;
 160
 161         if (p_src->ip_geneve.b_update_mode || b_pf_start)
 162                 p_tun->ip_geneve.b_mode_enabled =
 163                     p_src->ip_geneve.b_mode_enabled;
 164 }
 165
 166 static void qed_set_tunn_cls_info(struct qed_tunnel_info *p_tun,
 167                                   struct qed_tunnel_info *p_src)
 168 {
 169         int type;
 170
 171         p_tun->b_update_rx_cls = p_src->b_update_rx_cls;
 172         p_tun->b_update_tx_cls = p_src->b_update_tx_cls;
 173
 174         type = qed_tunn_clss_to_fw_clss(p_src->vxlan.tun_cls);
 175         p_tun->vxlan.tun_cls = type;
 176         type = qed_tunn_clss_to_fw_clss(p_src->l2_gre.tun_cls);
 177         p_tun->l2_gre.tun_cls = type;
 178         type = qed_tunn_clss_to_fw_clss(p_src->ip_gre.tun_cls);
 179         p_tun->ip_gre.tun_cls = type;
 180         type = qed_tunn_clss_to_fw_clss(p_src->l2_geneve.tun_cls);
 181         p_tun->l2_geneve.tun_cls = type;
 182         type = qed_tunn_clss_to_fw_clss(p_src->ip_geneve.tun_cls);
 183         p_tun->ip_geneve.tun_cls = type;
 184 }
 185
 186 static void qed_set_tunn_ports(struct qed_tunnel_info *p_tun,
 187                                struct qed_tunnel_info *p_src)
 188 {
 189         p_tun->geneve_port.b_update_port = p_src->geneve_port.b_update_port;
 190         p_tun->vxlan_port.b_update_port = p_src->vxlan_port.b_update_port;
 191
 192         if (p_src->geneve_port.b_update_port)
 193                 p_tun->geneve_port.port = p_src->geneve_port.port;
 194
 195         if (p_src->vxlan_port.b_update_port)
 196                 p_tun->vxlan_port.port = p_src->vxlan_port.port;
 197 }
 198
 199 static void
 200 __qed_set_ramrod_tunnel_param(u8 *p_tunn_cls,
 201                               struct qed_tunn_update_type *tun_type)
 202 {
 203         *p_tunn_cls = tun_type->tun_cls;
 204 }
 205
 206 static void
 207 qed_set_ramrod_tunnel_param(u8 *p_tunn_cls,
 208                             struct qed_tunn_update_type *tun_type,
 209                             u8 *p_update_port,
 210                             __le16 *p_port,
 211                             struct qed_tunn_update_udp_port *p_udp_port)
 212 {
 213         __qed_set_ramrod_tunnel_param(p_tunn_cls, tun_type);
 214         if (p_udp_port->b_update_port) {
 215                 *p_update_port = 1;
 216                 *p_port = cpu_to_le16(p_udp_port->port);
 217         }
 218 }
 219
 220 static void
 221 qed_tunn_set_pf_update_params(struct qed_hwfn *p_hwfn,
 222                               struct qed_tunnel_info *p_src,
 223                               struct pf_update_tunnel_config *p_tunn_cfg)
 224 {
 225         struct qed_tunnel_info *p_tun = &p_hwfn->cdev->tunnel;
 226
 227         qed_set_pf_update_tunn_mode(p_tun, p_src, false);
 228         qed_set_tunn_cls_info(p_tun, p_src);
 229         qed_set_tunn_ports(p_tun, p_src);
 230
 231         qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_vxlan,
 232                                     &p_tun->vxlan,
 233                                     &p_tunn_cfg->set_vxlan_udp_port_flg,
 234                                     &p_tunn_cfg->vxlan_udp_port,
 235                                     &p_tun->vxlan_port);
 236
 237         qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_l2geneve,
 238                                     &p_tun->l2_geneve,
 239                                     &p_tunn_cfg->set_geneve_udp_port_flg,
 240                                     &p_tunn_cfg->geneve_udp_port,
 241                                     &p_tun->geneve_port);
 242
 243         __qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_ipgeneve,
 244                                       &p_tun->ip_geneve);
 245
 246         __qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_l2gre,
 247                                       &p_tun->l2_gre);
 248
 249         __qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_ipgre,
 250                                       &p_tun->ip_gre);
 251
 252         p_tunn_cfg->update_rx_pf_clss = p_tun->b_update_rx_cls;
 253 }
 254
 255 static void qed_set_hw_tunn_mode(struct qed_hwfn *p_hwfn,
 256                                  struct qed_ptt *p_ptt,
 257                                  struct qed_tunnel_info *p_tun)
 258 {
 259         qed_set_gre_enable(p_hwfn, p_ptt, p_tun->l2_gre.b_mode_enabled,
 260                            p_tun->ip_gre.b_mode_enabled);
 261         qed_set_vxlan_enable(p_hwfn, p_ptt, p_tun->vxlan.b_mode_enabled);
 262
 263         qed_set_geneve_enable(p_hwfn, p_ptt, p_tun->l2_geneve.b_mode_enabled,
 264                               p_tun->ip_geneve.b_mode_enabled);
 265 }
 266
 267 static void qed_set_hw_tunn_mode_port(struct qed_hwfn *p_hwfn,
 268                                       struct qed_ptt *p_ptt,
 269                                       struct qed_tunnel_info *p_tunn)
 270 {
 271         if (p_tunn->vxlan_port.b_update_port)
 272                 qed_set_vxlan_dest_port(p_hwfn, p_ptt,
 273                                         p_tunn->vxlan_port.port);
 274
 275         if (p_tunn->geneve_port.b_update_port)
 276                 qed_set_geneve_dest_port(p_hwfn, p_ptt,
 277                                          p_tunn->geneve_port.port);
 278
 279         qed_set_hw_tunn_mode(p_hwfn, p_ptt, p_tunn);
 280 }
 281
 282 static void
 283 qed_tunn_set_pf_start_params(struct qed_hwfn *p_hwfn,
 284                              struct qed_tunnel_info *p_src,
 285                              struct pf_start_tunnel_config *p_tunn_cfg)
 286 {
 287         struct qed_tunnel_info *p_tun = &p_hwfn->cdev->tunnel;
 288
 289         if (!p_src)
 290                 return;
 291
 292         qed_set_pf_update_tunn_mode(p_tun, p_src, true);
 293         qed_set_tunn_cls_info(p_tun, p_src);
 294         qed_set_tunn_ports(p_tun, p_src);
 295
 296         qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_vxlan,
 297                                     &p_tun->vxlan,
 298                                     &p_tunn_cfg->set_vxlan_udp_port_flg,
 299                                     &p_tunn_cfg->vxlan_udp_port,
 300                                     &p_tun->vxlan_port);
 301
 302         qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_l2geneve,
 303                                     &p_tun->l2_geneve,
 304                                     &p_tunn_cfg->set_geneve_udp_port_flg,
 305                                     &p_tunn_cfg->geneve_udp_port,
 306                                     &p_tun->geneve_port);
 307
 308         __qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_ipgeneve,
 309                                       &p_tun->ip_geneve);
 310
 311         __qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_l2gre,
 312                                       &p_tun->l2_gre);
 313
 314         __qed_set_ramrod_tunnel_param(&p_tunn_cfg->tunnel_clss_ipgre,
 315                                       &p_tun->ip_gre);
 316 }
 317
 318 int qed_sp_pf_start(struct qed_hwfn *p_hwfn,
 319                     struct qed_ptt *p_ptt,
 320                     struct qed_tunnel_info *p_tunn,
 321                     enum qed_mf_mode mode, bool allow_npar_tx_switch)
 322 {
 323         struct pf_start_ramrod_data *p_ramrod = NULL;
 324         u16 sb = qed_int_get_sp_sb_id(p_hwfn);
 325         u8 sb_index = p_hwfn->p_eq->eq_sb_index;
 326         struct qed_spq_entry *p_ent = NULL;
 327         struct qed_sp_init_data init_data;
 328         int rc = -EINVAL;
 329         u8 page_cnt;
 330
 331         /* update initial eq producer */
 332         qed_eq_prod_update(p_hwfn,
 333                            qed_chain_get_prod_idx(&p_hwfn->p_eq->chain));
 334
 335         memset(&init_data, 0, sizeof(init_data));
 336         init_data.cid = qed_spq_get_cid(p_hwfn);
 337         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 338         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 339
 340         rc = qed_sp_init_request(p_hwfn, &p_ent,
 341                                  COMMON_RAMROD_PF_START,
 342                                  PROTOCOLID_COMMON, &init_data);
 343         if (rc)
 344                 return rc;
 345
 346         p_ramrod = &p_ent->ramrod.pf_start;
 347
 348         p_ramrod->event_ring_sb_id      = cpu_to_le16(sb);
 349         p_ramrod->event_ring_sb_index   = sb_index;
 350         p_ramrod->path_id               = QED_PATH_ID(p_hwfn);
 351         p_ramrod->dont_log_ramrods      = 0;
 352         p_ramrod->log_type_mask         = cpu_to_le16(0xf);
 353
 354         switch (mode) {
 355         case QED_MF_DEFAULT:
 356         case QED_MF_NPAR:
 357                 p_ramrod->mf_mode = MF_NPAR;
 358                 break;
 359         case QED_MF_OVLAN:
 360                 p_ramrod->mf_mode = MF_OVLAN;
 361                 break;
 362         default:
 363                 DP_NOTICE(p_hwfn, "Unsupported MF mode, init as DEFAULT\n");
 364                 p_ramrod->mf_mode = MF_NPAR;
 365         }
 366         p_ramrod->outer_tag = p_hwfn->hw_info.ovlan;
 367
 368         /* Place EQ address in RAMROD */
 369         DMA_REGPAIR_LE(p_ramrod->event_ring_pbl_addr,
 370                        p_hwfn->p_eq->chain.pbl_sp.p_phys_table);
 371         page_cnt = (u8)qed_chain_get_page_cnt(&p_hwfn->p_eq->chain);
 372         p_ramrod->event_ring_num_pages = page_cnt;
 373         DMA_REGPAIR_LE(p_ramrod->consolid_q_pbl_addr,
 374                        p_hwfn->p_consq->chain.pbl_sp.p_phys_table);
 375
 376         qed_tunn_set_pf_start_params(p_hwfn, p_tunn, &p_ramrod->tunnel_config);
 377
 378         if (IS_MF_SI(p_hwfn))
 379                 p_ramrod->allow_npar_tx_switching = allow_npar_tx_switch;
 380
 381         switch (p_hwfn->hw_info.personality) {
 382         case QED_PCI_ETH:
 383                 p_ramrod->personality = PERSONALITY_ETH;
 384                 break;
 385         case QED_PCI_FCOE:
 386                 p_ramrod->personality = PERSONALITY_FCOE;
 387                 break;
 388         case QED_PCI_ISCSI:
 389                 p_ramrod->personality = PERSONALITY_ISCSI;
 390                 break;
 391         case QED_PCI_ETH_ROCE:
 392                 p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
 393                 break;
 394         default:
 395                 DP_NOTICE(p_hwfn, "Unknown personality %d\n",
 396                           p_hwfn->hw_info.personality);
 397                 p_ramrod->personality = PERSONALITY_ETH;
 398         }
 399
 400         if (p_hwfn->cdev->p_iov_info) {
 401                 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
 402
 403                 p_ramrod->base_vf_id = (u8) p_iov->first_vf_in_pf;
 404                 p_ramrod->num_vfs = (u8) p_iov->total_vfs;
 405         }
 406         p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
 407         p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MINOR;
 408
 409         DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
 410                    "Setting event_ring_sb [id %04x index %02x], outer_tag [%d]\n",
 411                    sb, sb_index, p_ramrod->outer_tag);
 412
 413         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 414
 415         if (p_tunn)
 416                 qed_set_hw_tunn_mode_port(p_hwfn, p_ptt,
 417                                           &p_hwfn->cdev->tunnel);
 418
 419         return rc;
 420 }
 421
 422 int qed_sp_pf_update(struct qed_hwfn *p_hwfn)
 423 {
 424         struct qed_spq_entry *p_ent = NULL;
 425         struct qed_sp_init_data init_data;
 426         int rc = -EINVAL;
 427
 428         /* Get SPQ entry */
 429         memset(&init_data, 0, sizeof(init_data));
 430         init_data.cid = qed_spq_get_cid(p_hwfn);
 431         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 432         init_data.comp_mode = QED_SPQ_MODE_CB;
 433
 434         rc = qed_sp_init_request(p_hwfn, &p_ent,
 435                                  COMMON_RAMROD_PF_UPDATE, PROTOCOLID_COMMON,
 436                                  &init_data);
 437         if (rc)
 438                 return rc;
 439
 440         qed_dcbx_set_pf_update_params(&p_hwfn->p_dcbx_info->results,
 441                                       &p_ent->ramrod.pf_update);
 442
 443         return qed_spq_post(p_hwfn, p_ent, NULL);
 444 }
 445
 446 /* Set pf update ramrod command params */
 447 int qed_sp_pf_update_tunn_cfg(struct qed_hwfn *p_hwfn,
 448                               struct qed_ptt *p_ptt,
 449                               struct qed_tunnel_info *p_tunn,
 450                               enum spq_mode comp_mode,
 451                               struct qed_spq_comp_cb *p_comp_data)
 452 {
 453         struct qed_spq_entry *p_ent = NULL;
 454         struct qed_sp_init_data init_data;
 455         int rc = -EINVAL;
 456
 457         if (IS_VF(p_hwfn->cdev))
 458                 return qed_vf_pf_tunnel_param_update(p_hwfn, p_tunn);
 459
 460         if (!p_tunn)
 461                 return -EINVAL;
 462
 463         /* Get SPQ entry */
 464         memset(&init_data, 0, sizeof(init_data));
 465         init_data.cid = qed_spq_get_cid(p_hwfn);
 466         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 467         init_data.comp_mode = comp_mode;
 468         init_data.p_comp_data = p_comp_data;
 469
 470         rc = qed_sp_init_request(p_hwfn, &p_ent,
 471                                  COMMON_RAMROD_PF_UPDATE, PROTOCOLID_COMMON,
 472                                  &init_data);
 473         if (rc)
 474                 return rc;
 475
 476         qed_tunn_set_pf_update_params(p_hwfn, p_tunn,
 477                                       &p_ent->ramrod.pf_update.tunnel_config);
 478
 479         rc = qed_spq_post(p_hwfn, p_ent, NULL);
 480         if (rc)
 481                 return rc;
 482
 483         qed_set_hw_tunn_mode_port(p_hwfn, p_ptt, &p_hwfn->cdev->tunnel);
 484
 485         return rc;
 486 }
 487
 488 int qed_sp_pf_stop(struct qed_hwfn *p_hwfn)
 489 {
 490         struct qed_spq_entry *p_ent = NULL;
 491         struct qed_sp_init_data init_data;
 492         int rc = -EINVAL;
 493
 494         /* Get SPQ entry */
 495         memset(&init_data, 0, sizeof(init_data));
 496         init_data.cid = qed_spq_get_cid(p_hwfn);
 497         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 498         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 499
 500         rc = qed_sp_init_request(p_hwfn, &p_ent,
 501                                  COMMON_RAMROD_PF_STOP, PROTOCOLID_COMMON,
 502                                  &init_data);
 503         if (rc)
 504                 return rc;
 505
 506         return qed_spq_post(p_hwfn, p_ent, NULL);
 507 }
 508
 509 int qed_sp_heartbeat_ramrod(struct qed_hwfn *p_hwfn)
 510 {
 511         struct qed_spq_entry *p_ent = NULL;
 512         struct qed_sp_init_data init_data;
 513         int rc;
 514
 515         /* Get SPQ entry */
 516         memset(&init_data, 0, sizeof(init_data));
 517         init_data.cid = qed_spq_get_cid(p_hwfn);
 518         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 519         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 520
 521         rc = qed_sp_init_request(p_hwfn, &p_ent,
 522                                  COMMON_RAMROD_EMPTY, PROTOCOLID_COMMON,
 523                                  &init_data);
 524         if (rc)
 525                 return rc;
 526
 527         return qed_spq_post(p_hwfn, p_ent, NULL);
 528 }
 529
 530 int qed_sp_pf_update_stag(struct qed_hwfn *p_hwfn)
 531 {
 532         struct qed_spq_entry *p_ent = NULL;
 533         struct qed_sp_init_data init_data;
 534         int rc = -EINVAL;
 535
 536         /* Get SPQ entry */
 537         memset(&init_data, 0, sizeof(init_data));
 538         init_data.cid = qed_spq_get_cid(p_hwfn);
 539         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 540         init_data.comp_mode = QED_SPQ_MODE_CB;
 541
 542         rc = qed_sp_init_request(p_hwfn, &p_ent,
 543                                  COMMON_RAMROD_PF_UPDATE, PROTOCOLID_COMMON,
 544                                  &init_data);
 545         if (rc)
 546                 return rc;
 547
 548         p_ent->ramrod.pf_update.update_mf_vlan_flag = true;
 549         p_ent->ramrod.pf_update.mf_vlan = cpu_to_le16(p_hwfn->hw_info.ovlan);
 550
 551         return qed_spq_post(p_hwfn, p_ent, NULL);
 552 }