drivers/net/ethernet/qlogic/qed/qed_main.c

   1 /* QLogic qed NIC Driver
   2  * Copyright (c) 2015 QLogic Corporation
   3  *
   4  * This software is available under the terms of the GNU General Public License
   5  * (GPL) Version 2, available from the file COPYING in the main directory of
   6  * this source tree.
   7  */
   8
   9 #include <linux/stddef.h>
  10 #include <linux/pci.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/version.h>
  14 #include <linux/delay.h>
  15 #include <asm/byteorder.h>
  16 #include <linux/dma-mapping.h>
  17 #include <linux/string.h>
  18 #include <linux/module.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/workqueue.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/vmalloc.h>
  24 #include <linux/qed/qed_if.h>
  25 #include <linux/crash_dump.h>
  26
  27 #include "qed.h"
  28 #include "qed_sp.h"
  29 #include "qed_dev_api.h"
  30 #include "qed_mcp.h"
  31 #include "qed_hw.h"
  32
  33 static const char version[] =
  34         "QLogic QL4xxx 40G/100G Ethernet Driver qed " DRV_MODULE_VERSION "\n";
  35
  36 MODULE_DESCRIPTION("QLogic 25G/40G/50G/100G Core Module");
  37 MODULE_LICENSE("GPL");
  38 MODULE_VERSION(DRV_MODULE_VERSION);
  39
  40 #define FW_FILE_VERSION                         \
  41         __stringify(FW_MAJOR_VERSION) "."       \
  42         __stringify(FW_MINOR_VERSION) "."       \
  43         __stringify(FW_REVISION_VERSION) "."    \
  44         __stringify(FW_ENGINEERING_VERSION)
  45
  46 #define QED_FW_FILE_NAME        \
  47         "/*(DEBLOBBED)*/"
  48
  49 static int __init qed_init(void)
  50 {
  51         pr_notice("qed_init called\n");
  52
  53         pr_info("%s", version);
  54
  55         return 0;
  56 }
  57
  58 static void __exit qed_cleanup(void)
  59 {
  60         pr_notice("qed_cleanup called\n");
  61 }
  62
  63 module_init(qed_init);
  64 module_exit(qed_cleanup);
  65
  66 /* Check if the DMA controller on the machine can properly handle the DMA
  67  * addressing required by the device.
  68 */
  69 static int qed_set_coherency_mask(struct qed_dev *cdev)
  70 {
  71         struct device *dev = &cdev->pdev->dev;
  72
  73         if (dma_set_mask(dev, DMA_BIT_MASK(64)) == 0) {
  74                 if (dma_set_coherent_mask(dev, DMA_BIT_MASK(64)) != 0) {
  75                         DP_NOTICE(cdev,
  76                                   "Can't request 64-bit consistent allocations\n");
  77                         return -EIO;
  78                 }
  79         } else if (dma_set_mask(dev, DMA_BIT_MASK(32)) != 0) {
  80                 DP_NOTICE(cdev, "Can't request 64b/32b DMA addresses\n");
  81                 return -EIO;
  82         }
  83
  84         return 0;
  85 }
  86
  87 static void qed_free_pci(struct qed_dev *cdev)
  88 {
  89         struct pci_dev *pdev = cdev->pdev;
  90
  91         if (cdev->doorbells)
  92                 iounmap(cdev->doorbells);
  93         if (cdev->regview)
  94                 iounmap(cdev->regview);
  95         if (atomic_read(&pdev->enable_cnt) == 1)
  96                 pci_release_regions(pdev);
  97
  98         pci_disable_device(pdev);
  99 }
 100
 101 /* Performs PCI initializations as well as initializing PCI-related parameters
 102  * in the device structrue. Returns 0 in case of success.
 103  */
 104 static int qed_init_pci(struct qed_dev *cdev,
 105                         struct pci_dev *pdev)
 106 {
 107         int rc;
 108
 109         cdev->pdev = pdev;
 110
 111         rc = pci_enable_device(pdev);
 112         if (rc) {
 113                 DP_NOTICE(cdev, "Cannot enable PCI device\n");
 114                 goto err0;
 115         }
 116
 117         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
 118                 DP_NOTICE(cdev, "No memory region found in bar #0\n");
 119                 rc = -EIO;
 120                 goto err1;
 121         }
 122
 123         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
 124                 DP_NOTICE(cdev, "No memory region found in bar #2\n");
 125                 rc = -EIO;
 126                 goto err1;
 127         }
 128
 129         if (atomic_read(&pdev->enable_cnt) == 1) {
 130                 rc = pci_request_regions(pdev, "qed");
 131                 if (rc) {
 132                         DP_NOTICE(cdev,
 133                                   "Failed to request PCI memory resources\n");
 134                         goto err1;
 135                 }
 136                 pci_set_master(pdev);
 137                 pci_save_state(pdev);
 138         }
 139
 140         if (!pci_is_pcie(pdev)) {
 141                 DP_NOTICE(cdev, "The bus is not PCI Express\n");
 142                 rc = -EIO;
 143                 goto err2;
 144         }
 145
 146         cdev->pci_params.pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
 147         if (cdev->pci_params.pm_cap == 0)
 148                 DP_NOTICE(cdev, "Cannot find power management capability\n");
 149
 150         rc = qed_set_coherency_mask(cdev);
 151         if (rc)
 152                 goto err2;
 153
 154         cdev->pci_params.mem_start = pci_resource_start(pdev, 0);
 155         cdev->pci_params.mem_end = pci_resource_end(pdev, 0);
 156         cdev->pci_params.irq = pdev->irq;
 157
 158         cdev->regview = pci_ioremap_bar(pdev, 0);
 159         if (!cdev->regview) {
 160                 DP_NOTICE(cdev, "Cannot map register space, aborting\n");
 161                 rc = -ENOMEM;
 162                 goto err2;
 163         }
 164
 165         cdev->db_phys_addr = pci_resource_start(cdev->pdev, 2);
 166         cdev->db_size = pci_resource_len(cdev->pdev, 2);
 167         cdev->doorbells = ioremap_wc(cdev->db_phys_addr, cdev->db_size);
 168         if (!cdev->doorbells) {
 169                 DP_NOTICE(cdev, "Cannot map doorbell space\n");
 170                 return -ENOMEM;
 171         }
 172
 173         return 0;
 174
 175 err2:
 176         pci_release_regions(pdev);
 177 err1:
 178         pci_disable_device(pdev);
 179 err0:
 180         return rc;
 181 }
 182
 183 int qed_fill_dev_info(struct qed_dev *cdev,
 184                       struct qed_dev_info *dev_info)
 185 {
 186         struct qed_ptt  *ptt;
 187
 188         memset(dev_info, 0, sizeof(struct qed_dev_info));
 189
 190         dev_info->num_hwfns = cdev->num_hwfns;
 191         dev_info->pci_mem_start = cdev->pci_params.mem_start;
 192         dev_info->pci_mem_end = cdev->pci_params.mem_end;
 193         dev_info->pci_irq = cdev->pci_params.irq;
 194         dev_info->is_mf = IS_MF(&cdev->hwfns[0]);
 195         ether_addr_copy(dev_info->hw_mac, cdev->hwfns[0].hw_info.hw_mac_addr);
 196
 197         dev_info->fw_major = FW_MAJOR_VERSION;
 198         dev_info->fw_minor = FW_MINOR_VERSION;
 199         dev_info->fw_rev = FW_REVISION_VERSION;
 200         dev_info->fw_eng = FW_ENGINEERING_VERSION;
 201         dev_info->mf_mode = cdev->mf_mode;
 202
 203         qed_mcp_get_mfw_ver(cdev, &dev_info->mfw_rev);
 204
 205         ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
 206         if (ptt) {
 207                 qed_mcp_get_flash_size(QED_LEADING_HWFN(cdev), ptt,
 208                                        &dev_info->flash_size);
 209
 210                 qed_ptt_release(QED_LEADING_HWFN(cdev), ptt);
 211         }
 212
 213         return 0;
 214 }
 215
 216 static void qed_free_cdev(struct qed_dev *cdev)
 217 {
 218         kfree((void *)cdev);
 219 }
 220
 221 static struct qed_dev *qed_alloc_cdev(struct pci_dev *pdev)
 222 {
 223         struct qed_dev *cdev;
 224
 225         cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
 226         if (!cdev)
 227                 return cdev;
 228
 229         qed_init_struct(cdev);
 230
 231         return cdev;
 232 }
 233
 234 /* Sets the requested power state */
 235 static int qed_set_power_state(struct qed_dev *cdev,
 236                                pci_power_t state)
 237 {
 238         if (!cdev)
 239                 return -ENODEV;
 240
 241         DP_VERBOSE(cdev, NETIF_MSG_DRV, "Omitting Power state change\n");
 242         return 0;
 243 }
 244
 245 /* probing */
 246 static struct qed_dev *qed_probe(struct pci_dev *pdev,
 247                                  enum qed_protocol protocol,
 248                                  u32 dp_module,
 249                                  u8 dp_level)
 250 {
 251         struct qed_dev *cdev;
 252         int rc;
 253
 254         cdev = qed_alloc_cdev(pdev);
 255         if (!cdev)
 256                 goto err0;
 257
 258         cdev->protocol = protocol;
 259
 260         qed_init_dp(cdev, dp_module, dp_level);
 261
 262         rc = qed_init_pci(cdev, pdev);
 263         if (rc) {
 264                 DP_ERR(cdev, "init pci failed\n");
 265                 goto err1;
 266         }
 267         DP_INFO(cdev, "PCI init completed successfully\n");
 268
 269         rc = qed_hw_prepare(cdev, QED_PCI_DEFAULT);
 270         if (rc) {
 271                 DP_ERR(cdev, "hw prepare failed\n");
 272                 goto err2;
 273         }
 274
 275         DP_INFO(cdev, "qed_probe completed successffuly\n");
 276
 277         return cdev;
 278
 279 err2:
 280         qed_free_pci(cdev);
 281 err1:
 282         qed_free_cdev(cdev);
 283 err0:
 284         return NULL;
 285 }
 286
 287 static void qed_remove(struct qed_dev *cdev)
 288 {
 289         if (!cdev)
 290                 return;
 291
 292         qed_hw_remove(cdev);
 293
 294         qed_free_pci(cdev);
 295
 296         qed_set_power_state(cdev, PCI_D3hot);
 297
 298         qed_free_cdev(cdev);
 299 }
 300
 301 static void qed_disable_msix(struct qed_dev *cdev)
 302 {
 303         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 304                 pci_disable_msix(cdev->pdev);
 305                 kfree(cdev->int_params.msix_table);
 306         } else if (cdev->int_params.out.int_mode == QED_INT_MODE_MSI) {
 307                 pci_disable_msi(cdev->pdev);
 308         }
 309
 310         memset(&cdev->int_params.out, 0, sizeof(struct qed_int_param));
 311 }
 312
 313 static int qed_enable_msix(struct qed_dev *cdev,
 314                            struct qed_int_params *int_params)
 315 {
 316         int i, rc, cnt;
 317
 318         cnt = int_params->in.num_vectors;
 319
 320         for (i = 0; i < cnt; i++)
 321                 int_params->msix_table[i].entry = i;
 322
 323         rc = pci_enable_msix_range(cdev->pdev, int_params->msix_table,
 324                                    int_params->in.min_msix_cnt, cnt);
 325         if (rc < cnt && rc >= int_params->in.min_msix_cnt &&
 326             (rc % cdev->num_hwfns)) {
 327                 pci_disable_msix(cdev->pdev);
 328
 329                 /* If fastpath is initialized, we need at least one interrupt
 330                  * per hwfn [and the slow path interrupts]. New requested number
 331                  * should be a multiple of the number of hwfns.
 332                  */
 333                 cnt = (rc / cdev->num_hwfns) * cdev->num_hwfns;
 334                 DP_NOTICE(cdev,
 335                           "Trying to enable MSI-X with less vectors (%d out of %d)\n",
 336                           cnt, int_params->in.num_vectors);
 337                 rc = pci_enable_msix_exact(cdev->pdev,
 338                                            int_params->msix_table, cnt);
 339                 if (!rc)
 340                         rc = cnt;
 341         }
 342
 343         if (rc > 0) {
 344                 /* MSI-x configuration was achieved */
 345                 int_params->out.int_mode = QED_INT_MODE_MSIX;
 346                 int_params->out.num_vectors = rc;
 347                 rc = 0;
 348         } else {
 349                 DP_NOTICE(cdev,
 350                           "Failed to enable MSI-X [Requested %d vectors][rc %d]\n",
 351                           cnt, rc);
 352         }
 353
 354         return rc;
 355 }
 356
 357 /* This function outputs the int mode and the number of enabled msix vector */
 358 static int qed_set_int_mode(struct qed_dev *cdev, bool force_mode)
 359 {
 360         struct qed_int_params *int_params = &cdev->int_params;
 361         struct msix_entry *tbl;
 362         int rc = 0, cnt;
 363
 364         switch (int_params->in.int_mode) {
 365         case QED_INT_MODE_MSIX:
 366                 /* Allocate MSIX table */
 367                 cnt = int_params->in.num_vectors;
 368                 int_params->msix_table = kcalloc(cnt, sizeof(*tbl), GFP_KERNEL);
 369                 if (!int_params->msix_table) {
 370                         rc = -ENOMEM;
 371                         goto out;
 372                 }
 373
 374                 /* Enable MSIX */
 375                 rc = qed_enable_msix(cdev, int_params);
 376                 if (!rc)
 377                         goto out;
 378
 379                 DP_NOTICE(cdev, "Failed to enable MSI-X\n");
 380                 kfree(int_params->msix_table);
 381                 if (force_mode)
 382                         goto out;
 383                 /* Fallthrough */
 384
 385         case QED_INT_MODE_MSI:
 386                 rc = pci_enable_msi(cdev->pdev);
 387                 if (!rc) {
 388                         int_params->out.int_mode = QED_INT_MODE_MSI;
 389                         goto out;
 390                 }
 391
 392                 DP_NOTICE(cdev, "Failed to enable MSI\n");
 393                 if (force_mode)
 394                         goto out;
 395                 /* Fallthrough */
 396
 397         case QED_INT_MODE_INTA:
 398                         int_params->out.int_mode = QED_INT_MODE_INTA;
 399                         rc = 0;
 400                         goto out;
 401         default:
 402                 DP_NOTICE(cdev, "Unknown int_mode value %d\n",
 403                           int_params->in.int_mode);
 404                 rc = -EINVAL;
 405         }
 406
 407 out:
 408         cdev->int_coalescing_mode = QED_COAL_MODE_ENABLE;
 409
 410         return rc;
 411 }
 412
 413 static void qed_simd_handler_config(struct qed_dev *cdev, void *token,
 414                                     int index, void(*handler)(void *))
 415 {
 416         struct qed_hwfn *hwfn = &cdev->hwfns[index % cdev->num_hwfns];
 417         int relative_idx = index / cdev->num_hwfns;
 418
 419         hwfn->simd_proto_handler[relative_idx].func = handler;
 420         hwfn->simd_proto_handler[relative_idx].token = token;
 421 }
 422
 423 static void qed_simd_handler_clean(struct qed_dev *cdev, int index)
 424 {
 425         struct qed_hwfn *hwfn = &cdev->hwfns[index % cdev->num_hwfns];
 426         int relative_idx = index / cdev->num_hwfns;
 427
 428         memset(&hwfn->simd_proto_handler[relative_idx], 0,
 429                sizeof(struct qed_simd_fp_handler));
 430 }
 431
 432 static irqreturn_t qed_msix_sp_int(int irq, void *tasklet)
 433 {
 434         tasklet_schedule((struct tasklet_struct *)tasklet);
 435         return IRQ_HANDLED;
 436 }
 437
 438 static irqreturn_t qed_single_int(int irq, void *dev_instance)
 439 {
 440         struct qed_dev *cdev = (struct qed_dev *)dev_instance;
 441         struct qed_hwfn *hwfn;
 442         irqreturn_t rc = IRQ_NONE;
 443         u64 status;
 444         int i, j;
 445
 446         for (i = 0; i < cdev->num_hwfns; i++) {
 447                 status = qed_int_igu_read_sisr_reg(&cdev->hwfns[i]);
 448
 449                 if (!status)
 450                         continue;
 451
 452                 hwfn = &cdev->hwfns[i];
 453
 454                 /* Slowpath interrupt */
 455                 if (unlikely(status & 0x1)) {
 456                         tasklet_schedule(hwfn->sp_dpc);
 457                         status &= ~0x1;
 458                         rc = IRQ_HANDLED;
 459                 }
 460
 461                 /* Fastpath interrupts */
 462                 for (j = 0; j < 64; j++) {
 463                         if ((0x2ULL << j) & status) {
 464                                 struct qed_simd_fp_handler *p_handler =
 465                                         &hwfn->simd_proto_handler[j];
 466
 467                                 if (p_handler->func)
 468                                         p_handler->func(p_handler->token);
 469                                 else
 470                                         DP_NOTICE(hwfn,
 471                                                   "Not calling fastpath handler as it is NULL [handler #%d, status 0x%llx]\n",
 472                                                   j, status);
 473
 474                                 status &= ~(0x2ULL << j);
 475                                 rc = IRQ_HANDLED;
 476                         }
 477                 }
 478
 479                 if (unlikely(status))
 480                         DP_VERBOSE(hwfn, NETIF_MSG_INTR,
 481                                    "got an unknown interrupt status 0x%llx\n",
 482                                    status);
 483         }
 484
 485         return rc;
 486 }
 487
 488 int qed_slowpath_irq_req(struct qed_hwfn *hwfn)
 489 {
 490         struct qed_dev *cdev = hwfn->cdev;
 491         int rc = 0;
 492         u8 id;
 493
 494         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 495                 id = hwfn->my_id;
 496                 snprintf(hwfn->name, NAME_SIZE, "sp-%d-%02x:%02x.%02x",
 497                          id, cdev->pdev->bus->number,
 498                          PCI_SLOT(cdev->pdev->devfn), hwfn->abs_pf_id);
 499                 rc = request_irq(cdev->int_params.msix_table[id].vector,
 500                                  qed_msix_sp_int, 0, hwfn->name, hwfn->sp_dpc);
 501                 if (!rc)
 502                         DP_VERBOSE(hwfn, (NETIF_MSG_INTR | QED_MSG_SP),
 503                                    "Requested slowpath MSI-X\n");
 504         } else {
 505                 unsigned long flags = 0;
 506
 507                 snprintf(cdev->name, NAME_SIZE, "%02x:%02x.%02x",
 508                          cdev->pdev->bus->number, PCI_SLOT(cdev->pdev->devfn),
 509                          PCI_FUNC(cdev->pdev->devfn));
 510
 511                 if (cdev->int_params.out.int_mode == QED_INT_MODE_INTA)
 512                         flags |= IRQF_SHARED;
 513
 514                 rc = request_irq(cdev->pdev->irq, qed_single_int,
 515                                  flags, cdev->name, cdev);
 516         }
 517
 518         return rc;
 519 }
 520
 521 static void qed_slowpath_irq_free(struct qed_dev *cdev)
 522 {
 523         int i;
 524
 525         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 526                 for_each_hwfn(cdev, i) {
 527                         if (!cdev->hwfns[i].b_int_requested)
 528                                 break;
 529                         synchronize_irq(cdev->int_params.msix_table[i].vector);
 530                         free_irq(cdev->int_params.msix_table[i].vector,
 531                                  cdev->hwfns[i].sp_dpc);
 532                 }
 533         } else {
 534                 if (QED_LEADING_HWFN(cdev)->b_int_requested)
 535                         free_irq(cdev->pdev->irq, cdev);
 536         }
 537         qed_int_disable_post_isr_release(cdev);
 538 }
 539
 540 static int qed_nic_stop(struct qed_dev *cdev)
 541 {
 542         int i, rc;
 543
 544         rc = qed_hw_stop(cdev);
 545
 546         for (i = 0; i < cdev->num_hwfns; i++) {
 547                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 548
 549                 if (p_hwfn->b_sp_dpc_enabled) {
 550                         tasklet_disable(p_hwfn->sp_dpc);
 551                         p_hwfn->b_sp_dpc_enabled = false;
 552                         DP_VERBOSE(cdev, NETIF_MSG_IFDOWN,
 553                                    "Disabled sp taskelt [hwfn %d] at %p\n",
 554                                    i, p_hwfn->sp_dpc);
 555                 }
 556         }
 557
 558         return rc;
 559 }
 560
 561 static int qed_nic_reset(struct qed_dev *cdev)
 562 {
 563         int rc;
 564
 565         rc = qed_hw_reset(cdev);
 566         if (rc)
 567                 return rc;
 568
 569         qed_resc_free(cdev);
 570
 571         return 0;
 572 }
 573
 574 static int qed_nic_setup(struct qed_dev *cdev)
 575 {
 576         int rc;
 577
 578         rc = qed_resc_alloc(cdev);
 579         if (rc)
 580                 return rc;
 581
 582         DP_INFO(cdev, "Allocated qed resources\n");
 583
 584         qed_resc_setup(cdev);
 585
 586         return rc;
 587 }
 588
 589 static int qed_set_int_fp(struct qed_dev *cdev, u16 cnt)
 590 {
 591         int limit = 0;
 592
 593         /* Mark the fastpath as free/used */
 594         cdev->int_params.fp_initialized = cnt ? true : false;
 595
 596         if (cdev->int_params.out.int_mode != QED_INT_MODE_MSIX)
 597                 limit = cdev->num_hwfns * 63;
 598         else if (cdev->int_params.fp_msix_cnt)
 599                 limit = cdev->int_params.fp_msix_cnt;
 600
 601         if (!limit)
 602                 return -ENOMEM;
 603
 604         return min_t(int, cnt, limit);
 605 }
 606
 607 static int qed_get_int_fp(struct qed_dev *cdev, struct qed_int_info *info)
 608 {
 609         memset(info, 0, sizeof(struct qed_int_info));
 610
 611         if (!cdev->int_params.fp_initialized) {
 612                 DP_INFO(cdev,
 613                         "Protocol driver requested interrupt information, but its support is not yet configured\n");
 614                 return -EINVAL;
 615         }
 616
 617         /* Need to expose only MSI-X information; Single IRQ is handled solely
 618          * by qed.
 619          */
 620         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 621                 int msix_base = cdev->int_params.fp_msix_base;
 622
 623                 info->msix_cnt = cdev->int_params.fp_msix_cnt;
 624                 info->msix = &cdev->int_params.msix_table[msix_base];
 625         }
 626
 627         return 0;
 628 }
 629
 630 static int qed_slowpath_setup_int(struct qed_dev *cdev,
 631                                   enum qed_int_mode int_mode)
 632 {
 633         int rc, i;
 634         u8 num_vectors = 0;
 635
 636         memset(&cdev->int_params, 0, sizeof(struct qed_int_params));
 637
 638         cdev->int_params.in.int_mode = int_mode;
 639         for_each_hwfn(cdev, i)
 640                 num_vectors +=  qed_int_get_num_sbs(&cdev->hwfns[i], NULL) + 1;
 641         cdev->int_params.in.num_vectors = num_vectors;
 642
 643         /* We want a minimum of one slowpath and one fastpath vector per hwfn */
 644         cdev->int_params.in.min_msix_cnt = cdev->num_hwfns * 2;
 645
 646         if (is_kdump_kernel()) {
 647                 DP_INFO(cdev,
 648                         "Kdump kernel: Limit the max number of requested MSI-X vectors to %hd\n",
 649                         cdev->int_params.in.min_msix_cnt);
 650                 cdev->int_params.in.num_vectors =
 651                         cdev->int_params.in.min_msix_cnt;
 652         }
 653
 654         rc = qed_set_int_mode(cdev, false);
 655         if (rc)  {
 656                 DP_ERR(cdev, "qed_slowpath_setup_int ERR\n");
 657                 return rc;
 658         }
 659
 660         cdev->int_params.fp_msix_base = cdev->num_hwfns;
 661         cdev->int_params.fp_msix_cnt = cdev->int_params.out.num_vectors -
 662                                        cdev->num_hwfns;
 663
 664         return 0;
 665 }
 666
 667 u32 qed_unzip_data(struct qed_hwfn *p_hwfn, u32 input_len,
 668                    u8 *input_buf, u32 max_size, u8 *unzip_buf)
 669 {
 670         int rc;
 671
 672         p_hwfn->stream->next_in = input_buf;
 673         p_hwfn->stream->avail_in = input_len;
 674         p_hwfn->stream->next_out = unzip_buf;
 675         p_hwfn->stream->avail_out = max_size;
 676
 677         rc = zlib_inflateInit2(p_hwfn->stream, MAX_WBITS);
 678
 679         if (rc != Z_OK) {
 680                 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, "zlib init failed, rc = %d\n",
 681                            rc);
 682                 return 0;
 683         }
 684
 685         rc = zlib_inflate(p_hwfn->stream, Z_FINISH);
 686         zlib_inflateEnd(p_hwfn->stream);
 687
 688         if (rc != Z_OK && rc != Z_STREAM_END) {
 689                 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, "FW unzip error: %s, rc=%d\n",
 690                            p_hwfn->stream->msg, rc);
 691                 return 0;
 692         }
 693
 694         return p_hwfn->stream->total_out / 4;
 695 }
 696
 697 static int qed_alloc_stream_mem(struct qed_dev *cdev)
 698 {
 699         int i;
 700         void *workspace;
 701
 702         for_each_hwfn(cdev, i) {
 703                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 704
 705                 p_hwfn->stream = kzalloc(sizeof(*p_hwfn->stream), GFP_KERNEL);
 706                 if (!p_hwfn->stream)
 707                         return -ENOMEM;
 708
 709                 workspace = vzalloc(zlib_inflate_workspacesize());
 710                 if (!workspace)
 711                         return -ENOMEM;
 712                 p_hwfn->stream->workspace = workspace;
 713         }
 714
 715         return 0;
 716 }
 717
 718 static void qed_free_stream_mem(struct qed_dev *cdev)
 719 {
 720         int i;
 721
 722         for_each_hwfn(cdev, i) {
 723                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 724
 725                 if (!p_hwfn->stream)
 726                         return;
 727
 728                 vfree(p_hwfn->stream->workspace);
 729                 kfree(p_hwfn->stream);
 730         }
 731 }
 732
 733 static void qed_update_pf_params(struct qed_dev *cdev,
 734                                  struct qed_pf_params *params)
 735 {
 736         int i;
 737
 738         for (i = 0; i < cdev->num_hwfns; i++) {
 739                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 740
 741                 p_hwfn->pf_params = *params;
 742         }
 743 }
 744
 745 static int qed_slowpath_start(struct qed_dev *cdev,
 746                               struct qed_slowpath_params *params)
 747 {
 748         struct qed_mcp_drv_version drv_version;
 749         const u8 *data = NULL;
 750         struct qed_hwfn *hwfn;
 751         int rc;
 752
 753         rc = reject_firmware(&cdev->firmware, QED_FW_FILE_NAME,
 754                               &cdev->pdev->dev);
 755         if (rc) {
 756                 DP_NOTICE(cdev,
 757                           "Failed to find fw file - /lib/firmware/%s\n",
 758                           QED_FW_FILE_NAME);
 759                 goto err;
 760         }
 761
 762         rc = qed_nic_setup(cdev);
 763         if (rc)
 764                 goto err;
 765
 766         rc = qed_slowpath_setup_int(cdev, params->int_mode);
 767         if (rc)
 768                 goto err1;
 769
 770         /* Allocate stream for unzipping */
 771         rc = qed_alloc_stream_mem(cdev);
 772         if (rc) {
 773                 DP_NOTICE(cdev, "Failed to allocate stream memory\n");
 774                 goto err2;
 775         }
 776
 777         /* Start the slowpath */
 778         data = cdev->firmware->data;
 779
 780         rc = qed_hw_init(cdev, true, cdev->int_params.out.int_mode,
 781                          true, data);
 782         if (rc)
 783                 goto err3;
 784
 785         DP_INFO(cdev,
 786                 "HW initialization and function start completed successfully\n");
 787
 788         hwfn = QED_LEADING_HWFN(cdev);
 789         drv_version.version = (params->drv_major << 24) |
 790                               (params->drv_minor << 16) |
 791                               (params->drv_rev << 8) |
 792                               (params->drv_eng);
 793         strlcpy(drv_version.name, params->name,
 794                 MCP_DRV_VER_STR_SIZE - 4);
 795         rc = qed_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
 796                                       &drv_version);
 797         if (rc) {
 798                 DP_NOTICE(cdev, "Failed sending drv version command\n");
 799                 return rc;
 800         }
 801
 802         return 0;
 803
 804 err3:
 805         qed_free_stream_mem(cdev);
 806         qed_slowpath_irq_free(cdev);
 807 err2:
 808         qed_disable_msix(cdev);
 809 err1:
 810         qed_resc_free(cdev);
 811 err:
 812         release_firmware(cdev->firmware);
 813
 814         return rc;
 815 }
 816
 817 static int qed_slowpath_stop(struct qed_dev *cdev)
 818 {
 819         if (!cdev)
 820                 return -ENODEV;
 821
 822         qed_free_stream_mem(cdev);
 823
 824         qed_nic_stop(cdev);
 825         qed_slowpath_irq_free(cdev);
 826
 827         qed_disable_msix(cdev);
 828         qed_nic_reset(cdev);
 829
 830         release_firmware(cdev->firmware);
 831
 832         return 0;
 833 }
 834
 835 static void qed_set_id(struct qed_dev *cdev, char name[NAME_SIZE],
 836                        char ver_str[VER_SIZE])
 837 {
 838         int i;
 839
 840         memcpy(cdev->name, name, NAME_SIZE);
 841         for_each_hwfn(cdev, i)
 842                 snprintf(cdev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
 843
 844         memcpy(cdev->ver_str, ver_str, VER_SIZE);
 845         cdev->drv_type = DRV_ID_DRV_TYPE_LINUX;
 846 }
 847
 848 static u32 qed_sb_init(struct qed_dev *cdev,
 849                        struct qed_sb_info *sb_info,
 850                        void *sb_virt_addr,
 851                        dma_addr_t sb_phy_addr, u16 sb_id,
 852                        enum qed_sb_type type)
 853 {
 854         struct qed_hwfn *p_hwfn;
 855         int hwfn_index;
 856         u16 rel_sb_id;
 857         u8 n_hwfns;
 858         u32 rc;
 859
 860         /* RoCE uses single engine and CMT uses two engines. When using both
 861          * we force only a single engine. Storage uses only engine 0 too.
 862          */
 863         if (type == QED_SB_TYPE_L2_QUEUE)
 864                 n_hwfns = cdev->num_hwfns;
 865         else
 866                 n_hwfns = 1;
 867
 868         hwfn_index = sb_id % n_hwfns;
 869         p_hwfn = &cdev->hwfns[hwfn_index];
 870         rel_sb_id = sb_id / n_hwfns;
 871
 872         DP_VERBOSE(cdev, NETIF_MSG_INTR,
 873                    "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
 874                    hwfn_index, rel_sb_id, sb_id);
 875
 876         rc = qed_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
 877                              sb_virt_addr, sb_phy_addr, rel_sb_id);
 878
 879         return rc;
 880 }
 881
 882 static u32 qed_sb_release(struct qed_dev *cdev,
 883                           struct qed_sb_info *sb_info,
 884                           u16 sb_id)
 885 {
 886         struct qed_hwfn *p_hwfn;
 887         int hwfn_index;
 888         u16 rel_sb_id;
 889         u32 rc;
 890
 891         hwfn_index = sb_id % cdev->num_hwfns;
 892         p_hwfn = &cdev->hwfns[hwfn_index];
 893         rel_sb_id = sb_id / cdev->num_hwfns;
 894
 895         DP_VERBOSE(cdev, NETIF_MSG_INTR,
 896                    "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
 897                    hwfn_index, rel_sb_id, sb_id);
 898
 899         rc = qed_int_sb_release(p_hwfn, sb_info, rel_sb_id);
 900
 901         return rc;
 902 }
 903
 904 static int qed_set_link(struct qed_dev *cdev,
 905                         struct qed_link_params *params)
 906 {
 907         struct qed_hwfn *hwfn;
 908         struct qed_mcp_link_params *link_params;
 909         struct qed_ptt *ptt;
 910         int rc;
 911
 912         if (!cdev)
 913                 return -ENODEV;
 914
 915         /* The link should be set only once per PF */
 916         hwfn = &cdev->hwfns[0];
 917
 918         ptt = qed_ptt_acquire(hwfn);
 919         if (!ptt)
 920                 return -EBUSY;
 921
 922         link_params = qed_mcp_get_link_params(hwfn);
 923         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
 924                 link_params->speed.autoneg = params->autoneg;
 925         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS) {
 926                 link_params->speed.advertised_speeds = 0;
 927                 if ((params->adv_speeds & SUPPORTED_1000baseT_Half) ||
 928                     (params->adv_speeds & SUPPORTED_1000baseT_Full))
 929                         link_params->speed.advertised_speeds |=
 930                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G;
 931                 if (params->adv_speeds & SUPPORTED_10000baseKR_Full)
 932                         link_params->speed.advertised_speeds |=
 933                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G;
 934                 if (params->adv_speeds & SUPPORTED_40000baseLR4_Full)
 935                         link_params->speed.advertised_speeds |=
 936                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G;
 937                 if (params->adv_speeds & 0)
 938                         link_params->speed.advertised_speeds |=
 939                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G;
 940                 if (params->adv_speeds & 0)
 941                         link_params->speed.advertised_speeds |=
 942                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G;
 943         }
 944         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_FORCED_SPEED)
 945                 link_params->speed.forced_speed = params->forced_speed;
 946
 947         rc = qed_mcp_set_link(hwfn, ptt, params->link_up);
 948
 949         qed_ptt_release(hwfn, ptt);
 950
 951         return rc;
 952 }
 953
 954 static int qed_get_port_type(u32 media_type)
 955 {
 956         int port_type;
 957
 958         switch (media_type) {
 959         case MEDIA_SFPP_10G_FIBER:
 960         case MEDIA_SFP_1G_FIBER:
 961         case MEDIA_XFP_FIBER:
 962         case MEDIA_KR:
 963                 port_type = PORT_FIBRE;
 964                 break;
 965         case MEDIA_DA_TWINAX:
 966                 port_type = PORT_DA;
 967                 break;
 968         case MEDIA_BASE_T:
 969                 port_type = PORT_TP;
 970                 break;
 971         case MEDIA_NOT_PRESENT:
 972                 port_type = PORT_NONE;
 973                 break;
 974         case MEDIA_UNSPECIFIED:
 975         default:
 976                 port_type = PORT_OTHER;
 977                 break;
 978         }
 979         return port_type;
 980 }
 981
 982 static void qed_fill_link(struct qed_hwfn *hwfn,
 983                           struct qed_link_output *if_link)
 984 {
 985         struct qed_mcp_link_params params;
 986         struct qed_mcp_link_state link;
 987         struct qed_mcp_link_capabilities link_caps;
 988         u32 media_type;
 989
 990         memset(if_link, 0, sizeof(*if_link));
 991
 992         /* Prepare source inputs */
 993         memcpy(&params, qed_mcp_get_link_params(hwfn), sizeof(params));
 994         memcpy(&link, qed_mcp_get_link_state(hwfn), sizeof(link));
 995         memcpy(&link_caps, qed_mcp_get_link_capabilities(hwfn),
 996                sizeof(link_caps));
 997
 998         /* Set the link parameters to pass to protocol driver */
 999         if (link.link_up)
1000                 if_link->link_up = true;
1001
1002         /* TODO - at the moment assume supported and advertised speed equal */
1003         if_link->supported_caps = SUPPORTED_FIBRE;
1004         if (params.speed.autoneg)
1005                 if_link->supported_caps |= SUPPORTED_Autoneg;
1006         if (params.pause.autoneg ||
1007             (params.pause.forced_rx && params.pause.forced_tx))
1008                 if_link->supported_caps |= SUPPORTED_Asym_Pause;
1009         if (params.pause.autoneg || params.pause.forced_rx ||
1010             params.pause.forced_tx)
1011                 if_link->supported_caps |= SUPPORTED_Pause;
1012
1013         if_link->advertised_caps = if_link->supported_caps;
1014         if (params.speed.advertised_speeds &
1015             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1016                 if_link->advertised_caps |= SUPPORTED_1000baseT_Half |
1017                                            SUPPORTED_1000baseT_Full;
1018         if (params.speed.advertised_speeds &
1019             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1020                 if_link->advertised_caps |= SUPPORTED_10000baseKR_Full;
1021         if (params.speed.advertised_speeds &
1022                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1023                 if_link->advertised_caps |= SUPPORTED_40000baseLR4_Full;
1024         if (params.speed.advertised_speeds &
1025                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1026                 if_link->advertised_caps |= 0;
1027         if (params.speed.advertised_speeds &
1028                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G)
1029                 if_link->advertised_caps |= 0;
1030
1031         if (link_caps.speed_capabilities &
1032             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1033                 if_link->supported_caps |= SUPPORTED_1000baseT_Half |
1034                                            SUPPORTED_1000baseT_Full;
1035         if (link_caps.speed_capabilities &
1036             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1037                 if_link->supported_caps |= SUPPORTED_10000baseKR_Full;
1038         if (link_caps.speed_capabilities &
1039                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1040                 if_link->supported_caps |= SUPPORTED_40000baseLR4_Full;
1041         if (link_caps.speed_capabilities &
1042                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1043                 if_link->supported_caps |= 0;
1044         if (link_caps.speed_capabilities &
1045                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G)
1046                 if_link->supported_caps |= 0;
1047
1048         if (link.link_up)
1049                 if_link->speed = link.speed;
1050
1051         /* TODO - fill duplex properly */
1052         if_link->duplex = DUPLEX_FULL;
1053         qed_mcp_get_media_type(hwfn->cdev, &media_type);
1054         if_link->port = qed_get_port_type(media_type);
1055
1056         if_link->autoneg = params.speed.autoneg;
1057
1058         if (params.pause.autoneg)
1059                 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
1060         if (params.pause.forced_rx)
1061                 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
1062         if (params.pause.forced_tx)
1063                 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
1064
1065         /* Link partner capabilities */
1066         if (link.partner_adv_speed &
1067             QED_LINK_PARTNER_SPEED_1G_HD)
1068                 if_link->lp_caps |= SUPPORTED_1000baseT_Half;
1069         if (link.partner_adv_speed &
1070             QED_LINK_PARTNER_SPEED_1G_FD)
1071                 if_link->lp_caps |= SUPPORTED_1000baseT_Full;
1072         if (link.partner_adv_speed &
1073             QED_LINK_PARTNER_SPEED_10G)
1074                 if_link->lp_caps |= SUPPORTED_10000baseKR_Full;
1075         if (link.partner_adv_speed &
1076             QED_LINK_PARTNER_SPEED_40G)
1077                 if_link->lp_caps |= SUPPORTED_40000baseLR4_Full;
1078         if (link.partner_adv_speed &
1079             QED_LINK_PARTNER_SPEED_50G)
1080                 if_link->lp_caps |= 0;
1081         if (link.partner_adv_speed &
1082             QED_LINK_PARTNER_SPEED_100G)
1083                 if_link->lp_caps |= 0;
1084
1085         if (link.an_complete)
1086                 if_link->lp_caps |= SUPPORTED_Autoneg;
1087
1088         if (link.partner_adv_pause)
1089                 if_link->lp_caps |= SUPPORTED_Pause;
1090         if (link.partner_adv_pause == QED_LINK_PARTNER_ASYMMETRIC_PAUSE ||
1091             link.partner_adv_pause == QED_LINK_PARTNER_BOTH_PAUSE)
1092                 if_link->lp_caps |= SUPPORTED_Asym_Pause;
1093 }
1094
1095 static void qed_get_current_link(struct qed_dev *cdev,
1096                                  struct qed_link_output *if_link)
1097 {
1098         qed_fill_link(&cdev->hwfns[0], if_link);
1099 }
1100
1101 void qed_link_update(struct qed_hwfn *hwfn)
1102 {
1103         void *cookie = hwfn->cdev->ops_cookie;
1104         struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common;
1105         struct qed_link_output if_link;
1106
1107         qed_fill_link(hwfn, &if_link);
1108
1109         if (IS_LEAD_HWFN(hwfn) && cookie)
1110                 op->link_update(cookie, &if_link);
1111 }
1112
1113 static int qed_drain(struct qed_dev *cdev)
1114 {
1115         struct qed_hwfn *hwfn;
1116         struct qed_ptt *ptt;
1117         int i, rc;
1118
1119         for_each_hwfn(cdev, i) {
1120                 hwfn = &cdev->hwfns[i];
1121                 ptt = qed_ptt_acquire(hwfn);
1122                 if (!ptt) {
1123                         DP_NOTICE(hwfn, "Failed to drain NIG; No PTT\n");
1124                         return -EBUSY;
1125                 }
1126                 rc = qed_mcp_drain(hwfn, ptt);
1127                 qed_ptt_release(hwfn, ptt);
1128                 if (rc)
1129                         return rc;
1130         }
1131
1132         return 0;
1133 }
1134
1135 const struct qed_common_ops qed_common_ops_pass = {
1136         .probe = &qed_probe,
1137         .remove = &qed_remove,
1138         .set_power_state = &qed_set_power_state,
1139         .set_id = &qed_set_id,
1140         .update_pf_params = &qed_update_pf_params,
1141         .slowpath_start = &qed_slowpath_start,
1142         .slowpath_stop = &qed_slowpath_stop,
1143         .set_fp_int = &qed_set_int_fp,
1144         .get_fp_int = &qed_get_int_fp,
1145         .sb_init = &qed_sb_init,
1146         .sb_release = &qed_sb_release,
1147         .simd_handler_config = &qed_simd_handler_config,
1148         .simd_handler_clean = &qed_simd_handler_clean,
1149         .set_link = &qed_set_link,
1150         .get_link = &qed_get_current_link,
1151         .drain = &qed_drain,
1152         .update_msglvl = &qed_init_dp,
1153         .chain_alloc = &qed_chain_alloc,
1154         .chain_free = &qed_chain_free,
1155 };
1156
1157 u32 qed_get_protocol_version(enum qed_protocol protocol)
1158 {
1159         switch (protocol) {
1160         case QED_PROTOCOL_ETH:
1161                 return QED_ETH_INTERFACE_VERSION;
1162         default:
1163                 return 0;
1164         }
1165 }
1166 EXPORT_SYMBOL(qed_get_protocol_version);