drivers/net/ethernet/qlogic/qed/qed_ll2.c

   1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
   2 /* QLogic qed NIC Driver
   3  * Copyright (c) 2015-2017  QLogic Corporation
   4  * Copyright (c) 2019-2020 Marvell International Ltd.
   5  */
   6
   7 #include <linux/types.h>
   8 #include <asm/byteorder.h>
   9 #include <linux/dma-mapping.h>
  10 #include <linux/if_vlan.h>
  11 #include <linux/kernel.h>
  12 #include <linux/pci.h>
  13 #include <linux/slab.h>
  14 #include <linux/stddef.h>
  15 #include <linux/workqueue.h>
  16 #include <net/ipv6.h>
  17 #include <linux/bitops.h>
  18 #include <linux/delay.h>
  19 #include <linux/errno.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/io.h>
  22 #include <linux/list.h>
  23 #include <linux/mutex.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/string.h>
  26 #include <linux/qed/qed_ll2_if.h>
  27 #include "qed.h"
  28 #include "qed_cxt.h"
  29 #include "qed_dev_api.h"
  30 #include "qed_hsi.h"
  31 #include "qed_hw.h"
  32 #include "qed_int.h"
  33 #include "qed_ll2.h"
  34 #include "qed_mcp.h"
  35 #include "qed_ooo.h"
  36 #include "qed_reg_addr.h"
  37 #include "qed_sp.h"
  38 #include "qed_rdma.h"
  39
  40 #define QED_LL2_RX_REGISTERED(ll2)      ((ll2)->rx_queue.b_cb_registered)
  41 #define QED_LL2_TX_REGISTERED(ll2)      ((ll2)->tx_queue.b_cb_registered)
  42
  43 #define QED_LL2_TX_SIZE (256)
  44 #define QED_LL2_RX_SIZE (4096)
  45
  46 struct qed_cb_ll2_info {
  47         int rx_cnt;
  48         u32 rx_size;
  49         u8 handle;
  50
  51         /* Lock protecting LL2 buffer lists in sleepless context */
  52         spinlock_t lock;
  53         struct list_head list;
  54
  55         const struct qed_ll2_cb_ops *cbs;
  56         void *cb_cookie;
  57 };
  58
  59 struct qed_ll2_buffer {
  60         struct list_head list;
  61         void *data;
  62         dma_addr_t phys_addr;
  63 };
  64
  65 static void qed_ll2b_complete_tx_packet(void *cxt,
  66                                         u8 connection_handle,
  67                                         void *cookie,
  68                                         dma_addr_t first_frag_addr,
  69                                         bool b_last_fragment,
  70                                         bool b_last_packet)
  71 {
  72         struct qed_hwfn *p_hwfn = cxt;
  73         struct qed_dev *cdev = p_hwfn->cdev;
  74         struct sk_buff *skb = cookie;
  75
  76         /* All we need to do is release the mapping */
  77         dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
  78                          skb_headlen(skb), DMA_TO_DEVICE);
  79
  80         if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
  81                 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
  82                                       b_last_fragment);
  83
  84         dev_kfree_skb_any(skb);
  85 }
  86
  87 static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
  88                                 u8 **data, dma_addr_t *phys_addr)
  89 {
  90         size_t size = cdev->ll2->rx_size + NET_SKB_PAD +
  91                       SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
  92
  93         *data = kmalloc(size, GFP_ATOMIC);
  94         if (!(*data)) {
  95                 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
  96                 return -ENOMEM;
  97         }
  98
  99         *phys_addr = dma_map_single(&cdev->pdev->dev,
 100                                     ((*data) + NET_SKB_PAD),
 101                                     cdev->ll2->rx_size, DMA_FROM_DEVICE);
 102         if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
 103                 DP_INFO(cdev, "Failed to map LL2 buffer data\n");
 104                 kfree((*data));
 105                 return -ENOMEM;
 106         }
 107
 108         return 0;
 109 }
 110
 111 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
 112                                  struct qed_ll2_buffer *buffer)
 113 {
 114         spin_lock_bh(&cdev->ll2->lock);
 115
 116         dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
 117                          cdev->ll2->rx_size, DMA_FROM_DEVICE);
 118         kfree(buffer->data);
 119         list_del(&buffer->list);
 120
 121         cdev->ll2->rx_cnt--;
 122         if (!cdev->ll2->rx_cnt)
 123                 DP_INFO(cdev, "All LL2 entries were removed\n");
 124
 125         spin_unlock_bh(&cdev->ll2->lock);
 126
 127         return 0;
 128 }
 129
 130 static void qed_ll2_kill_buffers(struct qed_dev *cdev)
 131 {
 132         struct qed_ll2_buffer *buffer, *tmp_buffer;
 133
 134         list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
 135                 qed_ll2_dealloc_buffer(cdev, buffer);
 136 }
 137
 138 static void qed_ll2b_complete_rx_packet(void *cxt,
 139                                         struct qed_ll2_comp_rx_data *data)
 140 {
 141         struct qed_hwfn *p_hwfn = cxt;
 142         struct qed_ll2_buffer *buffer = data->cookie;
 143         struct qed_dev *cdev = p_hwfn->cdev;
 144         dma_addr_t new_phys_addr;
 145         struct sk_buff *skb;
 146         bool reuse = false;
 147         int rc = -EINVAL;
 148         u8 *new_data;
 149
 150         DP_VERBOSE(p_hwfn,
 151                    (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
 152                    "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
 153                    (u64)data->rx_buf_addr,
 154                    data->u.placement_offset,
 155                    data->length.packet_length,
 156                    data->parse_flags,
 157                    data->vlan, data->opaque_data_0, data->opaque_data_1);
 158
 159         if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
 160                 print_hex_dump(KERN_INFO, "",
 161                                DUMP_PREFIX_OFFSET, 16, 1,
 162                                buffer->data, data->length.packet_length, false);
 163         }
 164
 165         /* Determine if data is valid */
 166         if (data->length.packet_length < ETH_HLEN)
 167                 reuse = true;
 168
 169         /* Allocate a replacement for buffer; Reuse upon failure */
 170         if (!reuse)
 171                 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
 172                                           &new_phys_addr);
 173
 174         /* If need to reuse or there's no replacement buffer, repost this */
 175         if (rc)
 176                 goto out_post;
 177         dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
 178                          cdev->ll2->rx_size, DMA_FROM_DEVICE);
 179
 180         skb = build_skb(buffer->data, 0);
 181         if (!skb) {
 182                 DP_INFO(cdev, "Failed to build SKB\n");
 183                 kfree(buffer->data);
 184                 goto out_post1;
 185         }
 186
 187         data->u.placement_offset += NET_SKB_PAD;
 188         skb_reserve(skb, data->u.placement_offset);
 189         skb_put(skb, data->length.packet_length);
 190         skb_checksum_none_assert(skb);
 191
 192         /* Get parital ethernet information instead of eth_type_trans(),
 193          * Since we don't have an associated net_device.
 194          */
 195         skb_reset_mac_header(skb);
 196         skb->protocol = eth_hdr(skb)->h_proto;
 197
 198         /* Pass SKB onward */
 199         if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
 200                 if (data->vlan)
 201                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
 202                                                data->vlan);
 203                 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
 204                                       data->opaque_data_0,
 205                                       data->opaque_data_1);
 206         } else {
 207                 DP_VERBOSE(p_hwfn, (NETIF_MSG_RX_STATUS | NETIF_MSG_PKTDATA |
 208                                     QED_MSG_LL2 | QED_MSG_STORAGE),
 209                            "Dropping the packet\n");
 210                 kfree(buffer->data);
 211         }
 212
 213 out_post1:
 214         /* Update Buffer information and update FW producer */
 215         buffer->data = new_data;
 216         buffer->phys_addr = new_phys_addr;
 217
 218 out_post:
 219         rc = qed_ll2_post_rx_buffer(p_hwfn, cdev->ll2->handle,
 220                                     buffer->phys_addr, 0, buffer, 1);
 221         if (rc)
 222                 qed_ll2_dealloc_buffer(cdev, buffer);
 223 }
 224
 225 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
 226                                                     u8 connection_handle,
 227                                                     bool b_lock,
 228                                                     bool b_only_active)
 229 {
 230         struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
 231
 232         if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
 233                 return NULL;
 234
 235         if (!p_hwfn->p_ll2_info)
 236                 return NULL;
 237
 238         p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
 239
 240         if (b_only_active) {
 241                 if (b_lock)
 242                         mutex_lock(&p_ll2_conn->mutex);
 243                 if (p_ll2_conn->b_active)
 244                         p_ret = p_ll2_conn;
 245                 if (b_lock)
 246                         mutex_unlock(&p_ll2_conn->mutex);
 247         } else {
 248                 p_ret = p_ll2_conn;
 249         }
 250
 251         return p_ret;
 252 }
 253
 254 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
 255                                                   u8 connection_handle)
 256 {
 257         return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
 258 }
 259
 260 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
 261                                                        u8 connection_handle)
 262 {
 263         return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
 264 }
 265
 266 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
 267                                                            *p_hwfn,
 268                                                            u8 connection_handle)
 269 {
 270         return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
 271 }
 272
 273 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
 274 {
 275         bool b_last_packet = false, b_last_frag = false;
 276         struct qed_ll2_tx_packet *p_pkt = NULL;
 277         struct qed_ll2_info *p_ll2_conn;
 278         struct qed_ll2_tx_queue *p_tx;
 279         unsigned long flags = 0;
 280         dma_addr_t tx_frag;
 281
 282         p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
 283         if (!p_ll2_conn)
 284                 return;
 285
 286         p_tx = &p_ll2_conn->tx_queue;
 287
 288         spin_lock_irqsave(&p_tx->lock, flags);
 289         while (!list_empty(&p_tx->active_descq)) {
 290                 p_pkt = list_first_entry(&p_tx->active_descq,
 291                                          struct qed_ll2_tx_packet, list_entry);
 292                 if (!p_pkt)
 293                         break;
 294
 295                 list_del(&p_pkt->list_entry);
 296                 b_last_packet = list_empty(&p_tx->active_descq);
 297                 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
 298                 spin_unlock_irqrestore(&p_tx->lock, flags);
 299                 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
 300                         struct qed_ooo_buffer *p_buffer;
 301
 302                         p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
 303                         qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
 304                                                 p_buffer);
 305                 } else {
 306                         p_tx->cur_completing_packet = *p_pkt;
 307                         p_tx->cur_completing_bd_idx = 1;
 308                         b_last_frag =
 309                                 p_tx->cur_completing_bd_idx == p_pkt->bd_used;
 310                         tx_frag = p_pkt->bds_set[0].tx_frag;
 311                         p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie,
 312                                                       p_ll2_conn->my_id,
 313                                                       p_pkt->cookie,
 314                                                       tx_frag,
 315                                                       b_last_frag,
 316                                                       b_last_packet);
 317                 }
 318                 spin_lock_irqsave(&p_tx->lock, flags);
 319         }
 320         spin_unlock_irqrestore(&p_tx->lock, flags);
 321 }
 322
 323 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
 324 {
 325         struct qed_ll2_info *p_ll2_conn = p_cookie;
 326         struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
 327         u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
 328         struct qed_ll2_tx_packet *p_pkt;
 329         bool b_last_frag = false;
 330         unsigned long flags;
 331         int rc = -EINVAL;
 332
 333         if (!p_ll2_conn)
 334                 return rc;
 335
 336         spin_lock_irqsave(&p_tx->lock, flags);
 337         if (p_tx->b_completing_packet) {
 338                 rc = -EBUSY;
 339                 goto out;
 340         }
 341
 342         new_idx = le16_to_cpu(*p_tx->p_fw_cons);
 343         num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
 344         while (num_bds) {
 345                 if (list_empty(&p_tx->active_descq))
 346                         goto out;
 347
 348                 p_pkt = list_first_entry(&p_tx->active_descq,
 349                                          struct qed_ll2_tx_packet, list_entry);
 350                 if (!p_pkt)
 351                         goto out;
 352
 353                 p_tx->b_completing_packet = true;
 354                 p_tx->cur_completing_packet = *p_pkt;
 355                 num_bds_in_packet = p_pkt->bd_used;
 356                 list_del(&p_pkt->list_entry);
 357
 358                 if (num_bds < num_bds_in_packet) {
 359                         DP_NOTICE(p_hwfn,
 360                                   "Rest of BDs does not cover whole packet\n");
 361                         goto out;
 362                 }
 363
 364                 num_bds -= num_bds_in_packet;
 365                 p_tx->bds_idx += num_bds_in_packet;
 366                 while (num_bds_in_packet--)
 367                         qed_chain_consume(&p_tx->txq_chain);
 368
 369                 p_tx->cur_completing_bd_idx = 1;
 370                 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
 371                 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
 372
 373                 spin_unlock_irqrestore(&p_tx->lock, flags);
 374
 375                 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie,
 376                                            p_ll2_conn->my_id,
 377                                            p_pkt->cookie,
 378                                            p_pkt->bds_set[0].tx_frag,
 379                                            b_last_frag, !num_bds);
 380
 381                 spin_lock_irqsave(&p_tx->lock, flags);
 382         }
 383
 384         p_tx->b_completing_packet = false;
 385         rc = 0;
 386 out:
 387         spin_unlock_irqrestore(&p_tx->lock, flags);
 388         return rc;
 389 }
 390
 391 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn,
 392                                   union core_rx_cqe_union *p_cqe,
 393                                   struct qed_ll2_comp_rx_data *data)
 394 {
 395         data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
 396         data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
 397         data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
 398         data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
 399         data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
 400         data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error;
 401         data->qp_id = le16_to_cpu(p_cqe->rx_cqe_gsi.qp_id);
 402
 403         data->src_qp = le32_to_cpu(p_cqe->rx_cqe_gsi.src_qp);
 404 }
 405
 406 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn,
 407                                   union core_rx_cqe_union *p_cqe,
 408                                   struct qed_ll2_comp_rx_data *data)
 409 {
 410         data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags);
 411         data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags);
 412         data->length.packet_length =
 413             le16_to_cpu(p_cqe->rx_cqe_fp.packet_length);
 414         data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan);
 415         data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]);
 416         data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]);
 417         data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset;
 418 }
 419
 420 static int
 421 qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn,
 422                         struct qed_ll2_info *p_ll2_conn,
 423                         union core_rx_cqe_union *p_cqe,
 424                         unsigned long *p_lock_flags)
 425 {
 426         struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
 427         struct core_rx_slow_path_cqe *sp_cqe;
 428
 429         sp_cqe = &p_cqe->rx_cqe_sp;
 430         if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) {
 431                 DP_NOTICE(p_hwfn,
 432                           "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n",
 433                           sp_cqe->ramrod_cmd_id);
 434                 return -EINVAL;
 435         }
 436
 437         if (!p_ll2_conn->cbs.slowpath_cb) {
 438                 DP_NOTICE(p_hwfn,
 439                           "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n");
 440                 return -EINVAL;
 441         }
 442
 443         spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
 444
 445         p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie,
 446                                     p_ll2_conn->my_id,
 447                                     le32_to_cpu(sp_cqe->opaque_data.data[0]),
 448                                     le32_to_cpu(sp_cqe->opaque_data.data[1]));
 449
 450         spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
 451
 452         return 0;
 453 }
 454
 455 static int
 456 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn,
 457                               struct qed_ll2_info *p_ll2_conn,
 458                               union core_rx_cqe_union *p_cqe,
 459                               unsigned long *p_lock_flags, bool b_last_cqe)
 460 {
 461         struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
 462         struct qed_ll2_rx_packet *p_pkt = NULL;
 463         struct qed_ll2_comp_rx_data data;
 464
 465         if (!list_empty(&p_rx->active_descq))
 466                 p_pkt = list_first_entry(&p_rx->active_descq,
 467                                          struct qed_ll2_rx_packet, list_entry);
 468         if (!p_pkt) {
 469                 DP_NOTICE(p_hwfn,
 470                           "[%d] LL2 Rx completion but active_descq is empty\n",
 471                           p_ll2_conn->input.conn_type);
 472
 473                 return -EIO;
 474         }
 475         list_del(&p_pkt->list_entry);
 476
 477         if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR)
 478                 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data);
 479         else
 480                 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data);
 481         if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd)
 482                 DP_NOTICE(p_hwfn,
 483                           "Mismatch between active_descq and the LL2 Rx chain\n");
 484
 485         list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
 486
 487         data.connection_handle = p_ll2_conn->my_id;
 488         data.cookie = p_pkt->cookie;
 489         data.rx_buf_addr = p_pkt->rx_buf_addr;
 490         data.b_last_packet = b_last_cqe;
 491
 492         spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
 493         p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data);
 494
 495         spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
 496
 497         return 0;
 498 }
 499
 500 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
 501 {
 502         struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie;
 503         struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
 504         union core_rx_cqe_union *cqe = NULL;
 505         u16 cq_new_idx = 0, cq_old_idx = 0;
 506         unsigned long flags = 0;
 507         int rc = 0;
 508
 509         if (!p_ll2_conn)
 510                 return rc;
 511
 512         spin_lock_irqsave(&p_rx->lock, flags);
 513
 514         if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) {
 515                 spin_unlock_irqrestore(&p_rx->lock, flags);
 516                 return 0;
 517         }
 518
 519         cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
 520         cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
 521
 522         while (cq_new_idx != cq_old_idx) {
 523                 bool b_last_cqe = (cq_new_idx == cq_old_idx);
 524
 525                 cqe =
 526                     (union core_rx_cqe_union *)
 527                     qed_chain_consume(&p_rx->rcq_chain);
 528                 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
 529
 530                 DP_VERBOSE(p_hwfn,
 531                            QED_MSG_LL2,
 532                            "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
 533                            cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
 534
 535                 switch (cqe->rx_cqe_sp.type) {
 536                 case CORE_RX_CQE_TYPE_SLOW_PATH:
 537                         rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn,
 538                                                      cqe, &flags);
 539                         break;
 540                 case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
 541                 case CORE_RX_CQE_TYPE_REGULAR:
 542                         rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn,
 543                                                            cqe, &flags,
 544                                                            b_last_cqe);
 545                         break;
 546                 default:
 547                         rc = -EIO;
 548                 }
 549         }
 550
 551         spin_unlock_irqrestore(&p_rx->lock, flags);
 552         return rc;
 553 }
 554
 555 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
 556 {
 557         struct qed_ll2_info *p_ll2_conn = NULL;
 558         struct qed_ll2_rx_packet *p_pkt = NULL;
 559         struct qed_ll2_rx_queue *p_rx;
 560         unsigned long flags = 0;
 561
 562         p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
 563         if (!p_ll2_conn)
 564                 return;
 565
 566         p_rx = &p_ll2_conn->rx_queue;
 567
 568         spin_lock_irqsave(&p_rx->lock, flags);
 569         while (!list_empty(&p_rx->active_descq)) {
 570                 p_pkt = list_first_entry(&p_rx->active_descq,
 571                                          struct qed_ll2_rx_packet, list_entry);
 572                 if (!p_pkt)
 573                         break;
 574                 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
 575                 spin_unlock_irqrestore(&p_rx->lock, flags);
 576
 577                 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
 578                         struct qed_ooo_buffer *p_buffer;
 579
 580                         p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
 581                         qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
 582                                                 p_buffer);
 583                 } else {
 584                         dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr;
 585                         void *cookie = p_pkt->cookie;
 586                         bool b_last;
 587
 588                         b_last = list_empty(&p_rx->active_descq);
 589                         p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie,
 590                                                       p_ll2_conn->my_id,
 591                                                       cookie,
 592                                                       rx_buf_addr, b_last);
 593                 }
 594                 spin_lock_irqsave(&p_rx->lock, flags);
 595         }
 596         spin_unlock_irqrestore(&p_rx->lock, flags);
 597 }
 598
 599 static bool
 600 qed_ll2_lb_rxq_handler_slowpath(struct qed_hwfn *p_hwfn,
 601                                 struct core_rx_slow_path_cqe *p_cqe)
 602 {
 603         struct ooo_opaque *iscsi_ooo;
 604         u32 cid;
 605
 606         if (p_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH)
 607                 return false;
 608
 609         iscsi_ooo = (struct ooo_opaque *)&p_cqe->opaque_data;
 610         if (iscsi_ooo->ooo_opcode != TCP_EVENT_DELETE_ISLES)
 611                 return false;
 612
 613         /* Need to make a flush */
 614         cid = le32_to_cpu(iscsi_ooo->cid);
 615         qed_ooo_release_connection_isles(p_hwfn, p_hwfn->p_ooo_info, cid);
 616
 617         return true;
 618 }
 619
 620 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
 621                                   struct qed_ll2_info *p_ll2_conn)
 622 {
 623         struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
 624         u16 packet_length = 0, parse_flags = 0, vlan = 0;
 625         struct qed_ll2_rx_packet *p_pkt = NULL;
 626         u32 num_ooo_add_to_peninsula = 0, cid;
 627         union core_rx_cqe_union *cqe = NULL;
 628         u16 cq_new_idx = 0, cq_old_idx = 0;
 629         struct qed_ooo_buffer *p_buffer;
 630         struct ooo_opaque *iscsi_ooo;
 631         u8 placement_offset = 0;
 632         u8 cqe_type;
 633
 634         cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
 635         cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
 636         if (cq_new_idx == cq_old_idx)
 637                 return 0;
 638
 639         while (cq_new_idx != cq_old_idx) {
 640                 struct core_rx_fast_path_cqe *p_cqe_fp;
 641
 642                 cqe = qed_chain_consume(&p_rx->rcq_chain);
 643                 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
 644                 cqe_type = cqe->rx_cqe_sp.type;
 645
 646                 if (cqe_type == CORE_RX_CQE_TYPE_SLOW_PATH)
 647                         if (qed_ll2_lb_rxq_handler_slowpath(p_hwfn,
 648                                                             &cqe->rx_cqe_sp))
 649                                 continue;
 650
 651                 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) {
 652                         DP_NOTICE(p_hwfn,
 653                                   "Got a non-regular LB LL2 completion [type 0x%02x]\n",
 654                                   cqe_type);
 655                         return -EINVAL;
 656                 }
 657                 p_cqe_fp = &cqe->rx_cqe_fp;
 658
 659                 placement_offset = p_cqe_fp->placement_offset;
 660                 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
 661                 packet_length = le16_to_cpu(p_cqe_fp->packet_length);
 662                 vlan = le16_to_cpu(p_cqe_fp->vlan);
 663                 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
 664                 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info,
 665                                            iscsi_ooo);
 666                 cid = le32_to_cpu(iscsi_ooo->cid);
 667
 668                 /* Process delete isle first */
 669                 if (iscsi_ooo->drop_size)
 670                         qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
 671                                              iscsi_ooo->drop_isle,
 672                                              iscsi_ooo->drop_size);
 673
 674                 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP)
 675                         continue;
 676
 677                 /* Now process create/add/join isles */
 678                 if (list_empty(&p_rx->active_descq)) {
 679                         DP_NOTICE(p_hwfn,
 680                                   "LL2 OOO RX chain has no submitted buffers\n"
 681                                   );
 682                         return -EIO;
 683                 }
 684
 685                 p_pkt = list_first_entry(&p_rx->active_descq,
 686                                          struct qed_ll2_rx_packet, list_entry);
 687
 688                 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) ||
 689                     (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) ||
 690                     (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) ||
 691                     (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) ||
 692                     (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) {
 693                         if (!p_pkt) {
 694                                 DP_NOTICE(p_hwfn,
 695                                           "LL2 OOO RX packet is not valid\n");
 696                                 return -EIO;
 697                         }
 698                         list_del(&p_pkt->list_entry);
 699                         p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
 700                         p_buffer->packet_length = packet_length;
 701                         p_buffer->parse_flags = parse_flags;
 702                         p_buffer->vlan = vlan;
 703                         p_buffer->placement_offset = placement_offset;
 704                         qed_chain_consume(&p_rx->rxq_chain);
 705                         list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
 706
 707                         switch (iscsi_ooo->ooo_opcode) {
 708                         case TCP_EVENT_ADD_NEW_ISLE:
 709                                 qed_ooo_add_new_isle(p_hwfn,
 710                                                      p_hwfn->p_ooo_info,
 711                                                      cid,
 712                                                      iscsi_ooo->ooo_isle,
 713                                                      p_buffer);
 714                                 break;
 715                         case TCP_EVENT_ADD_ISLE_RIGHT:
 716                                 qed_ooo_add_new_buffer(p_hwfn,
 717                                                        p_hwfn->p_ooo_info,
 718                                                        cid,
 719                                                        iscsi_ooo->ooo_isle,
 720                                                        p_buffer,
 721                                                        QED_OOO_RIGHT_BUF);
 722                                 break;
 723                         case TCP_EVENT_ADD_ISLE_LEFT:
 724                                 qed_ooo_add_new_buffer(p_hwfn,
 725                                                        p_hwfn->p_ooo_info,
 726                                                        cid,
 727                                                        iscsi_ooo->ooo_isle,
 728                                                        p_buffer,
 729                                                        QED_OOO_LEFT_BUF);
 730                                 break;
 731                         case TCP_EVENT_JOIN:
 732                                 qed_ooo_add_new_buffer(p_hwfn,
 733                                                        p_hwfn->p_ooo_info,
 734                                                        cid,
 735                                                        iscsi_ooo->ooo_isle +
 736                                                        1,
 737                                                        p_buffer,
 738                                                        QED_OOO_LEFT_BUF);
 739                                 qed_ooo_join_isles(p_hwfn,
 740                                                    p_hwfn->p_ooo_info,
 741                                                    cid, iscsi_ooo->ooo_isle);
 742                                 break;
 743                         case TCP_EVENT_ADD_PEN:
 744                                 num_ooo_add_to_peninsula++;
 745                                 qed_ooo_put_ready_buffer(p_hwfn,
 746                                                          p_hwfn->p_ooo_info,
 747                                                          p_buffer, true);
 748                                 break;
 749                         }
 750                 } else {
 751                         DP_NOTICE(p_hwfn,
 752                                   "Unexpected event (%d) TX OOO completion\n",
 753                                   iscsi_ooo->ooo_opcode);
 754                 }
 755         }
 756
 757         return 0;
 758 }
 759
 760 static void
 761 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
 762                           struct qed_ll2_info *p_ll2_conn)
 763 {
 764         struct qed_ll2_tx_pkt_info tx_pkt;
 765         struct qed_ooo_buffer *p_buffer;
 766         u16 l4_hdr_offset_w;
 767         dma_addr_t first_frag;
 768         u8 bd_flags;
 769         int rc;
 770
 771         /* Submit Tx buffers here */
 772         while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
 773                                                     p_hwfn->p_ooo_info))) {
 774                 l4_hdr_offset_w = 0;
 775                 bd_flags = 0;
 776
 777                 first_frag = p_buffer->rx_buffer_phys_addr +
 778                              p_buffer->placement_offset;
 779                 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1);
 780                 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1);
 781
 782                 memset(&tx_pkt, 0, sizeof(tx_pkt));
 783                 tx_pkt.num_of_bds = 1;
 784                 tx_pkt.vlan = p_buffer->vlan;
 785                 tx_pkt.bd_flags = bd_flags;
 786                 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w;
 787                 switch (p_ll2_conn->tx_dest) {
 788                 case CORE_TX_DEST_NW:
 789                         tx_pkt.tx_dest = QED_LL2_TX_DEST_NW;
 790                         break;
 791                 case CORE_TX_DEST_LB:
 792                         tx_pkt.tx_dest = QED_LL2_TX_DEST_LB;
 793                         break;
 794                 case CORE_TX_DEST_DROP:
 795                 default:
 796                         tx_pkt.tx_dest = QED_LL2_TX_DEST_DROP;
 797                         break;
 798                 }
 799                 tx_pkt.first_frag = first_frag;
 800                 tx_pkt.first_frag_len = p_buffer->packet_length;
 801                 tx_pkt.cookie = p_buffer;
 802
 803                 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id,
 804                                                &tx_pkt, true);
 805                 if (rc) {
 806                         qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
 807                                                  p_buffer, false);
 808                         break;
 809                 }
 810         }
 811 }
 812
 813 static void
 814 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
 815                           struct qed_ll2_info *p_ll2_conn)
 816 {
 817         struct qed_ooo_buffer *p_buffer;
 818         int rc;
 819
 820         while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
 821                                                    p_hwfn->p_ooo_info))) {
 822                 rc = qed_ll2_post_rx_buffer(p_hwfn,
 823                                             p_ll2_conn->my_id,
 824                                             p_buffer->rx_buffer_phys_addr,
 825                                             0, p_buffer, true);
 826                 if (rc) {
 827                         qed_ooo_put_free_buffer(p_hwfn,
 828                                                 p_hwfn->p_ooo_info, p_buffer);
 829                         break;
 830                 }
 831         }
 832 }
 833
 834 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
 835 {
 836         struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
 837         int rc;
 838
 839         if (!p_ll2_conn)
 840                 return 0;
 841
 842         if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
 843                 return 0;
 844
 845         rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
 846         if (rc)
 847                 return rc;
 848
 849         qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
 850         qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
 851
 852         return 0;
 853 }
 854
 855 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
 856 {
 857         struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
 858         struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
 859         struct qed_ll2_tx_packet *p_pkt = NULL;
 860         struct qed_ooo_buffer *p_buffer;
 861         bool b_dont_submit_rx = false;
 862         u16 new_idx = 0, num_bds = 0;
 863         int rc;
 864
 865         if (!p_ll2_conn)
 866                 return 0;
 867
 868         if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
 869                 return 0;
 870
 871         new_idx = le16_to_cpu(*p_tx->p_fw_cons);
 872         num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
 873
 874         if (!num_bds)
 875                 return 0;
 876
 877         while (num_bds) {
 878                 if (list_empty(&p_tx->active_descq))
 879                         return -EINVAL;
 880
 881                 p_pkt = list_first_entry(&p_tx->active_descq,
 882                                          struct qed_ll2_tx_packet, list_entry);
 883                 if (!p_pkt)
 884                         return -EINVAL;
 885
 886                 if (p_pkt->bd_used != 1) {
 887                         DP_NOTICE(p_hwfn,
 888                                   "Unexpectedly many BDs(%d) in TX OOO completion\n",
 889                                   p_pkt->bd_used);
 890                         return -EINVAL;
 891                 }
 892
 893                 list_del(&p_pkt->list_entry);
 894
 895                 num_bds--;
 896                 p_tx->bds_idx++;
 897                 qed_chain_consume(&p_tx->txq_chain);
 898
 899                 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
 900                 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
 901
 902                 if (b_dont_submit_rx) {
 903                         qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
 904                                                 p_buffer);
 905                         continue;
 906                 }
 907
 908                 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
 909                                             p_buffer->rx_buffer_phys_addr, 0,
 910                                             p_buffer, true);
 911                 if (rc != 0) {
 912                         qed_ooo_put_free_buffer(p_hwfn,
 913                                                 p_hwfn->p_ooo_info, p_buffer);
 914                         b_dont_submit_rx = true;
 915                 }
 916         }
 917
 918         qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
 919
 920         return 0;
 921 }
 922
 923 static void qed_ll2_stop_ooo(struct qed_hwfn *p_hwfn)
 924 {
 925         u8 *handle = &p_hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
 926
 927         DP_VERBOSE(p_hwfn, (QED_MSG_STORAGE | QED_MSG_LL2),
 928                    "Stopping LL2 OOO queue [%02x]\n", *handle);
 929
 930         qed_ll2_terminate_connection(p_hwfn, *handle);
 931         qed_ll2_release_connection(p_hwfn, *handle);
 932         *handle = QED_LL2_UNUSED_HANDLE;
 933 }
 934
 935 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
 936                                      struct qed_ll2_info *p_ll2_conn,
 937                                      u8 action_on_error)
 938 {
 939         enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
 940         struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
 941         struct core_rx_start_ramrod_data *p_ramrod = NULL;
 942         struct qed_spq_entry *p_ent = NULL;
 943         struct qed_sp_init_data init_data;
 944         u16 cqe_pbl_size;
 945         int rc = 0;
 946
 947         /* Get SPQ entry */
 948         memset(&init_data, 0, sizeof(init_data));
 949         init_data.cid = p_ll2_conn->cid;
 950         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 951         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 952
 953         rc = qed_sp_init_request(p_hwfn, &p_ent,
 954                                  CORE_RAMROD_RX_QUEUE_START,
 955                                  PROTOCOLID_CORE, &init_data);
 956         if (rc)
 957                 return rc;
 958
 959         p_ramrod = &p_ent->ramrod.core_rx_queue_start;
 960         memset(p_ramrod, 0, sizeof(*p_ramrod));
 961         p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
 962         p_ramrod->sb_index = p_rx->rx_sb_index;
 963         p_ramrod->complete_event_flg = 1;
 964
 965         p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
 966         DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr);
 967         cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
 968         p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
 969         DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
 970                        qed_chain_get_pbl_phys(&p_rx->rcq_chain));
 971
 972         p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg;
 973         p_ramrod->inner_vlan_stripping_en =
 974                 p_ll2_conn->input.rx_vlan_removal_en;
 975
 976         if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
 977             p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE)
 978                 p_ramrod->report_outer_vlan = 1;
 979         p_ramrod->queue_id = p_ll2_conn->queue_id;
 980         p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0;
 981
 982         if (test_bit(QED_MF_LL2_NON_UNICAST, &p_hwfn->cdev->mf_bits) &&
 983             p_ramrod->main_func_queue && conn_type != QED_LL2_TYPE_ROCE &&
 984             conn_type != QED_LL2_TYPE_IWARP) {
 985                 p_ramrod->mf_si_bcast_accept_all = 1;
 986                 p_ramrod->mf_si_mcast_accept_all = 1;
 987         } else {
 988                 p_ramrod->mf_si_bcast_accept_all = 0;
 989                 p_ramrod->mf_si_mcast_accept_all = 0;
 990         }
 991
 992         p_ramrod->action_on_error.error_type = action_on_error;
 993         p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
 994         p_ramrod->zero_prod_flg = 1;
 995
 996         return qed_spq_post(p_hwfn, p_ent, NULL);
 997 }
 998
 999 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
1000                                      struct qed_ll2_info *p_ll2_conn)
1001 {
1002         enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
1003         struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1004         struct core_tx_start_ramrod_data *p_ramrod = NULL;
1005         struct qed_spq_entry *p_ent = NULL;
1006         struct qed_sp_init_data init_data;
1007         u16 pq_id = 0, pbl_size;
1008         int rc = -EINVAL;
1009
1010         if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
1011                 return 0;
1012
1013         if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
1014                 p_ll2_conn->tx_stats_en = 0;
1015         else
1016                 p_ll2_conn->tx_stats_en = 1;
1017
1018         /* Get SPQ entry */
1019         memset(&init_data, 0, sizeof(init_data));
1020         init_data.cid = p_ll2_conn->cid;
1021         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1022         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1023
1024         rc = qed_sp_init_request(p_hwfn, &p_ent,
1025                                  CORE_RAMROD_TX_QUEUE_START,
1026                                  PROTOCOLID_CORE, &init_data);
1027         if (rc)
1028                 return rc;
1029
1030         p_ramrod = &p_ent->ramrod.core_tx_queue_start;
1031
1032         p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
1033         p_ramrod->sb_index = p_tx->tx_sb_index;
1034         p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
1035         p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
1036         p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
1037
1038         DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
1039                        qed_chain_get_pbl_phys(&p_tx->txq_chain));
1040         pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
1041         p_ramrod->pbl_size = cpu_to_le16(pbl_size);
1042
1043         switch (p_ll2_conn->input.tx_tc) {
1044         case PURE_LB_TC:
1045                 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
1046                 break;
1047         case PKT_LB_TC:
1048                 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO);
1049                 break;
1050         default:
1051                 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
1052                 break;
1053         }
1054
1055         p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
1056
1057         switch (conn_type) {
1058         case QED_LL2_TYPE_FCOE:
1059                 p_ramrod->conn_type = PROTOCOLID_FCOE;
1060                 break;
1061         case QED_LL2_TYPE_ISCSI:
1062                 p_ramrod->conn_type = PROTOCOLID_ISCSI;
1063                 break;
1064         case QED_LL2_TYPE_ROCE:
1065                 p_ramrod->conn_type = PROTOCOLID_ROCE;
1066                 break;
1067         case QED_LL2_TYPE_IWARP:
1068                 p_ramrod->conn_type = PROTOCOLID_IWARP;
1069                 break;
1070         case QED_LL2_TYPE_OOO:
1071                 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI)
1072                         p_ramrod->conn_type = PROTOCOLID_ISCSI;
1073                 else
1074                         p_ramrod->conn_type = PROTOCOLID_IWARP;
1075                 break;
1076         default:
1077                 p_ramrod->conn_type = PROTOCOLID_ETH;
1078                 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
1079         }
1080
1081         p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
1082
1083         rc = qed_spq_post(p_hwfn, p_ent, NULL);
1084         if (rc)
1085                 return rc;
1086
1087         rc = qed_db_recovery_add(p_hwfn->cdev, p_tx->doorbell_addr,
1088                                  &p_tx->db_msg, DB_REC_WIDTH_32B,
1089                                  DB_REC_KERNEL);
1090         return rc;
1091 }
1092
1093 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
1094                                     struct qed_ll2_info *p_ll2_conn)
1095 {
1096         struct core_rx_stop_ramrod_data *p_ramrod = NULL;
1097         struct qed_spq_entry *p_ent = NULL;
1098         struct qed_sp_init_data init_data;
1099         int rc = -EINVAL;
1100
1101         /* Get SPQ entry */
1102         memset(&init_data, 0, sizeof(init_data));
1103         init_data.cid = p_ll2_conn->cid;
1104         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1105         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1106
1107         rc = qed_sp_init_request(p_hwfn, &p_ent,
1108                                  CORE_RAMROD_RX_QUEUE_STOP,
1109                                  PROTOCOLID_CORE, &init_data);
1110         if (rc)
1111                 return rc;
1112
1113         p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
1114
1115         p_ramrod->complete_event_flg = 1;
1116         p_ramrod->queue_id = p_ll2_conn->queue_id;
1117
1118         return qed_spq_post(p_hwfn, p_ent, NULL);
1119 }
1120
1121 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
1122                                     struct qed_ll2_info *p_ll2_conn)
1123 {
1124         struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1125         struct qed_spq_entry *p_ent = NULL;
1126         struct qed_sp_init_data init_data;
1127         int rc = -EINVAL;
1128         qed_db_recovery_del(p_hwfn->cdev, p_tx->doorbell_addr, &p_tx->db_msg);
1129
1130         /* Get SPQ entry */
1131         memset(&init_data, 0, sizeof(init_data));
1132         init_data.cid = p_ll2_conn->cid;
1133         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1134         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1135
1136         rc = qed_sp_init_request(p_hwfn, &p_ent,
1137                                  CORE_RAMROD_TX_QUEUE_STOP,
1138                                  PROTOCOLID_CORE, &init_data);
1139         if (rc)
1140                 return rc;
1141
1142         return qed_spq_post(p_hwfn, p_ent, NULL);
1143 }
1144
1145 static int
1146 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
1147                               struct qed_ll2_info *p_ll2_info)
1148 {
1149         struct qed_chain_init_params params = {
1150                 .intended_use   = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1151                 .cnt_type       = QED_CHAIN_CNT_TYPE_U16,
1152                 .num_elems      = p_ll2_info->input.rx_num_desc,
1153         };
1154         struct qed_dev *cdev = p_hwfn->cdev;
1155         struct qed_ll2_rx_packet *p_descq;
1156         u32 capacity;
1157         int rc = 0;
1158
1159         if (!p_ll2_info->input.rx_num_desc)
1160                 goto out;
1161
1162         params.mode = QED_CHAIN_MODE_NEXT_PTR;
1163         params.elem_size = sizeof(struct core_rx_bd);
1164
1165         rc = qed_chain_alloc(cdev, &p_ll2_info->rx_queue.rxq_chain, &params);
1166         if (rc) {
1167                 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
1168                 goto out;
1169         }
1170
1171         capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
1172         p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet),
1173                           GFP_KERNEL);
1174         if (!p_descq) {
1175                 rc = -ENOMEM;
1176                 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
1177                 goto out;
1178         }
1179         p_ll2_info->rx_queue.descq_array = p_descq;
1180
1181         params.mode = QED_CHAIN_MODE_PBL;
1182         params.elem_size = sizeof(struct core_rx_fast_path_cqe);
1183
1184         rc = qed_chain_alloc(cdev, &p_ll2_info->rx_queue.rcq_chain, &params);
1185         if (rc) {
1186                 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
1187                 goto out;
1188         }
1189
1190         DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1191                    "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
1192                    p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc);
1193
1194 out:
1195         return rc;
1196 }
1197
1198 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
1199                                          struct qed_ll2_info *p_ll2_info)
1200 {
1201         struct qed_chain_init_params params = {
1202                 .mode           = QED_CHAIN_MODE_PBL,
1203                 .intended_use   = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1204                 .cnt_type       = QED_CHAIN_CNT_TYPE_U16,
1205                 .num_elems      = p_ll2_info->input.tx_num_desc,
1206                 .elem_size      = sizeof(struct core_tx_bd),
1207         };
1208         struct qed_ll2_tx_packet *p_descq;
1209         size_t desc_size;
1210         u32 capacity;
1211         int rc = 0;
1212
1213         if (!p_ll2_info->input.tx_num_desc)
1214                 goto out;
1215
1216         rc = qed_chain_alloc(p_hwfn->cdev, &p_ll2_info->tx_queue.txq_chain,
1217                              &params);
1218         if (rc)
1219                 goto out;
1220
1221         capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
1222         /* All bds_set elements are flexibily added. */
1223         desc_size = struct_size(p_descq, bds_set,
1224                                 p_ll2_info->input.tx_max_bds_per_packet);
1225
1226         p_descq = kcalloc(capacity, desc_size, GFP_KERNEL);
1227         if (!p_descq) {
1228                 rc = -ENOMEM;
1229                 goto out;
1230         }
1231         p_ll2_info->tx_queue.descq_mem = p_descq;
1232
1233         DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1234                    "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
1235                    p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc);
1236
1237 out:
1238         if (rc)
1239                 DP_NOTICE(p_hwfn,
1240                           "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
1241                           p_ll2_info->input.tx_num_desc);
1242         return rc;
1243 }
1244
1245 static int
1246 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
1247                                struct qed_ll2_info *p_ll2_info, u16 mtu)
1248 {
1249         struct qed_ooo_buffer *p_buf = NULL;
1250         void *p_virt;
1251         u16 buf_idx;
1252         int rc = 0;
1253
1254         if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO)
1255                 return rc;
1256
1257         /* Correct number of requested OOO buffers if needed */
1258         if (!p_ll2_info->input.rx_num_ooo_buffers) {
1259                 u16 num_desc = p_ll2_info->input.rx_num_desc;
1260
1261                 if (!num_desc)
1262                         return -EINVAL;
1263                 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2;
1264         }
1265
1266         for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers;
1267              buf_idx++) {
1268                 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL);
1269                 if (!p_buf) {
1270                         rc = -ENOMEM;
1271                         goto out;
1272                 }
1273
1274                 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
1275                 p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
1276                                          ETH_CACHE_LINE_SIZE - 1) &
1277                                         ~(ETH_CACHE_LINE_SIZE - 1);
1278                 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1279                                             p_buf->rx_buffer_size,
1280                                             &p_buf->rx_buffer_phys_addr,
1281                                             GFP_KERNEL);
1282                 if (!p_virt) {
1283                         kfree(p_buf);
1284                         rc = -ENOMEM;
1285                         goto out;
1286                 }
1287
1288                 p_buf->rx_buffer_virt_addr = p_virt;
1289                 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
1290         }
1291
1292         DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1293                    "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
1294                    p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size);
1295
1296 out:
1297         return rc;
1298 }
1299
1300 static int
1301 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs)
1302 {
1303         if (!cbs || (!cbs->rx_comp_cb ||
1304                      !cbs->rx_release_cb ||
1305                      !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie))
1306                 return -EINVAL;
1307
1308         p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb;
1309         p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb;
1310         p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb;
1311         p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb;
1312         p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb;
1313         p_ll2_info->cbs.cookie = cbs->cookie;
1314
1315         return 0;
1316 }
1317
1318 static void _qed_ll2_calc_allowed_conns(struct qed_hwfn *p_hwfn,
1319                                         struct qed_ll2_acquire_data *data,
1320                                         u8 *start_idx, u8 *last_idx)
1321 {
1322         /* LL2 queues handles will be split as follows:
1323          * First will be the legacy queues, and then the ctx based.
1324          */
1325         if (data->input.rx_conn_type == QED_LL2_RX_TYPE_LEGACY) {
1326                 *start_idx = QED_LL2_LEGACY_CONN_BASE_PF;
1327                 *last_idx = *start_idx +
1328                         QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF;
1329         } else {
1330                 /* QED_LL2_RX_TYPE_CTX */
1331                 *start_idx = QED_LL2_CTX_CONN_BASE_PF;
1332                 *last_idx = *start_idx +
1333                         QED_MAX_NUM_OF_CTX_LL2_CONNS_PF;
1334         }
1335 }
1336
1337 static enum core_error_handle
1338 qed_ll2_get_error_choice(enum qed_ll2_error_handle err)
1339 {
1340         switch (err) {
1341         case QED_LL2_DROP_PACKET:
1342                 return LL2_DROP_PACKET;
1343         case QED_LL2_DO_NOTHING:
1344                 return LL2_DO_NOTHING;
1345         case QED_LL2_ASSERT:
1346                 return LL2_ASSERT;
1347         default:
1348                 return LL2_DO_NOTHING;
1349         }
1350 }
1351
1352 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data)
1353 {
1354         struct qed_hwfn *p_hwfn = cxt;
1355         qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
1356         struct qed_ll2_info *p_ll2_info = NULL;
1357         u8 i, first_idx, last_idx, *p_tx_max;
1358         int rc;
1359
1360         if (!data->p_connection_handle || !p_hwfn->p_ll2_info)
1361                 return -EINVAL;
1362
1363         _qed_ll2_calc_allowed_conns(p_hwfn, data, &first_idx, &last_idx);
1364
1365         /* Find a free connection to be used */
1366         for (i = first_idx; i < last_idx; i++) {
1367                 mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
1368                 if (p_hwfn->p_ll2_info[i].b_active) {
1369                         mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1370                         continue;
1371                 }
1372
1373                 p_hwfn->p_ll2_info[i].b_active = true;
1374                 p_ll2_info = &p_hwfn->p_ll2_info[i];
1375                 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1376                 break;
1377         }
1378         if (!p_ll2_info)
1379                 return -EBUSY;
1380
1381         memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input));
1382
1383         switch (data->input.tx_dest) {
1384         case QED_LL2_TX_DEST_NW:
1385                 p_ll2_info->tx_dest = CORE_TX_DEST_NW;
1386                 break;
1387         case QED_LL2_TX_DEST_LB:
1388                 p_ll2_info->tx_dest = CORE_TX_DEST_LB;
1389                 break;
1390         case QED_LL2_TX_DEST_DROP:
1391                 p_ll2_info->tx_dest = CORE_TX_DEST_DROP;
1392                 break;
1393         default:
1394                 return -EINVAL;
1395         }
1396
1397         if (data->input.conn_type == QED_LL2_TYPE_OOO ||
1398             data->input.secondary_queue)
1399                 p_ll2_info->main_func_queue = false;
1400         else
1401                 p_ll2_info->main_func_queue = true;
1402
1403         /* Correct maximum number of Tx BDs */
1404         p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet;
1405         if (*p_tx_max == 0)
1406                 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET;
1407         else
1408                 *p_tx_max = min_t(u8, *p_tx_max,
1409                                   CORE_LL2_TX_MAX_BDS_PER_PACKET);
1410
1411         rc = qed_ll2_set_cbs(p_ll2_info, data->cbs);
1412         if (rc) {
1413                 DP_NOTICE(p_hwfn, "Invalid callback functions\n");
1414                 goto q_allocate_fail;
1415         }
1416
1417         rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info);
1418         if (rc)
1419                 goto q_allocate_fail;
1420
1421         rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info);
1422         if (rc)
1423                 goto q_allocate_fail;
1424
1425         rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
1426                                             data->input.mtu);
1427         if (rc)
1428                 goto q_allocate_fail;
1429
1430         /* Register callbacks for the Rx/Tx queues */
1431         if (data->input.conn_type == QED_LL2_TYPE_OOO) {
1432                 comp_rx_cb = qed_ll2_lb_rxq_completion;
1433                 comp_tx_cb = qed_ll2_lb_txq_completion;
1434         } else {
1435                 comp_rx_cb = qed_ll2_rxq_completion;
1436                 comp_tx_cb = qed_ll2_txq_completion;
1437         }
1438
1439         if (data->input.rx_num_desc) {
1440                 qed_int_register_cb(p_hwfn, comp_rx_cb,
1441                                     &p_hwfn->p_ll2_info[i],
1442                                     &p_ll2_info->rx_queue.rx_sb_index,
1443                                     &p_ll2_info->rx_queue.p_fw_cons);
1444                 p_ll2_info->rx_queue.b_cb_registered = true;
1445         }
1446
1447         if (data->input.tx_num_desc) {
1448                 qed_int_register_cb(p_hwfn,
1449                                     comp_tx_cb,
1450                                     &p_hwfn->p_ll2_info[i],
1451                                     &p_ll2_info->tx_queue.tx_sb_index,
1452                                     &p_ll2_info->tx_queue.p_fw_cons);
1453                 p_ll2_info->tx_queue.b_cb_registered = true;
1454         }
1455
1456         *data->p_connection_handle = i;
1457         return rc;
1458
1459 q_allocate_fail:
1460         qed_ll2_release_connection(p_hwfn, i);
1461         return -ENOMEM;
1462 }
1463
1464 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
1465                                            struct qed_ll2_info *p_ll2_conn)
1466 {
1467         enum qed_ll2_error_handle error_input;
1468         enum core_error_handle error_mode;
1469         u8 action_on_error = 0;
1470         int rc;
1471
1472         if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
1473                 return 0;
1474
1475         DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
1476         error_input = p_ll2_conn->input.ai_err_packet_too_big;
1477         error_mode = qed_ll2_get_error_choice(error_input);
1478         SET_FIELD(action_on_error,
1479                   CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode);
1480         error_input = p_ll2_conn->input.ai_err_no_buf;
1481         error_mode = qed_ll2_get_error_choice(error_input);
1482         SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode);
1483
1484         rc = qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
1485         if (rc)
1486                 return rc;
1487
1488         if (p_ll2_conn->rx_queue.ctx_based) {
1489                 rc = qed_db_recovery_add(p_hwfn->cdev,
1490                                          p_ll2_conn->rx_queue.set_prod_addr,
1491                                          &p_ll2_conn->rx_queue.db_data,
1492                                          DB_REC_WIDTH_64B, DB_REC_KERNEL);
1493         }
1494
1495         return rc;
1496 }
1497
1498 static void
1499 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
1500                                  struct qed_ll2_info *p_ll2_conn)
1501 {
1502         if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
1503                 return;
1504
1505         qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1506         qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
1507 }
1508
1509 static inline u8 qed_ll2_handle_to_queue_id(struct qed_hwfn *p_hwfn,
1510                                             u8 handle,
1511                                             u8 ll2_queue_type)
1512 {
1513         u8 qid;
1514
1515         if (ll2_queue_type == QED_LL2_RX_TYPE_LEGACY)
1516                 return p_hwfn->hw_info.resc_start[QED_LL2_RAM_QUEUE] + handle;
1517
1518         /* QED_LL2_RX_TYPE_CTX
1519          * FW distinguishes between the legacy queues (ram based) and the
1520          * ctx based queues by the queue_id.
1521          * The first MAX_NUM_LL2_RX_RAM_QUEUES queues are legacy
1522          * and the queue ids above that are ctx base.
1523          */
1524         qid = p_hwfn->hw_info.resc_start[QED_LL2_CTX_QUEUE] +
1525               MAX_NUM_LL2_RX_RAM_QUEUES;
1526
1527         /* See comment on the acquire connection for how the ll2
1528          * queues handles are divided.
1529          */
1530         qid += (handle - QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF);
1531
1532         return qid;
1533 }
1534
1535 int qed_ll2_establish_connection(void *cxt, u8 connection_handle)
1536 {
1537         struct e4_core_conn_context *p_cxt;
1538         struct qed_ll2_tx_packet *p_pkt;
1539         struct qed_ll2_info *p_ll2_conn;
1540         struct qed_hwfn *p_hwfn = cxt;
1541         struct qed_ll2_rx_queue *p_rx;
1542         struct qed_ll2_tx_queue *p_tx;
1543         struct qed_cxt_info cxt_info;
1544         struct qed_ptt *p_ptt;
1545         int rc = -EINVAL;
1546         u32 i, capacity;
1547         size_t desc_size;
1548         u8 qid;
1549
1550         p_ptt = qed_ptt_acquire(p_hwfn);
1551         if (!p_ptt)
1552                 return -EAGAIN;
1553
1554         p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
1555         if (!p_ll2_conn) {
1556                 rc = -EINVAL;
1557                 goto out;
1558         }
1559
1560         p_rx = &p_ll2_conn->rx_queue;
1561         p_tx = &p_ll2_conn->tx_queue;
1562
1563         qed_chain_reset(&p_rx->rxq_chain);
1564         qed_chain_reset(&p_rx->rcq_chain);
1565         INIT_LIST_HEAD(&p_rx->active_descq);
1566         INIT_LIST_HEAD(&p_rx->free_descq);
1567         INIT_LIST_HEAD(&p_rx->posting_descq);
1568         spin_lock_init(&p_rx->lock);
1569         capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
1570         for (i = 0; i < capacity; i++)
1571                 list_add_tail(&p_rx->descq_array[i].list_entry,
1572                               &p_rx->free_descq);
1573         *p_rx->p_fw_cons = 0;
1574
1575         qed_chain_reset(&p_tx->txq_chain);
1576         INIT_LIST_HEAD(&p_tx->active_descq);
1577         INIT_LIST_HEAD(&p_tx->free_descq);
1578         INIT_LIST_HEAD(&p_tx->sending_descq);
1579         spin_lock_init(&p_tx->lock);
1580         capacity = qed_chain_get_capacity(&p_tx->txq_chain);
1581         /* All bds_set elements are flexibily added. */
1582         desc_size = struct_size(p_pkt, bds_set,
1583                                 p_ll2_conn->input.tx_max_bds_per_packet);
1584
1585         for (i = 0; i < capacity; i++) {
1586                 p_pkt = p_tx->descq_mem + desc_size * i;
1587                 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
1588         }
1589         p_tx->cur_completing_bd_idx = 0;
1590         p_tx->bds_idx = 0;
1591         p_tx->b_completing_packet = false;
1592         p_tx->cur_send_packet = NULL;
1593         p_tx->cur_send_frag_num = 0;
1594         p_tx->cur_completing_frag_num = 0;
1595         *p_tx->p_fw_cons = 0;
1596
1597         rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
1598         if (rc)
1599                 goto out;
1600         cxt_info.iid = p_ll2_conn->cid;
1601         rc = qed_cxt_get_cid_info(p_hwfn, &cxt_info);
1602         if (rc) {
1603                 DP_NOTICE(p_hwfn, "Cannot find context info for cid=%d\n",
1604                           p_ll2_conn->cid);
1605                 goto out;
1606         }
1607
1608         p_cxt = cxt_info.p_cxt;
1609
1610         memset(p_cxt, 0, sizeof(*p_cxt));
1611
1612         qid = qed_ll2_handle_to_queue_id(p_hwfn, connection_handle,
1613                                          p_ll2_conn->input.rx_conn_type);
1614         p_ll2_conn->queue_id = qid;
1615         p_ll2_conn->tx_stats_id = qid;
1616
1617         DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1618                    "Establishing ll2 queue. PF %d ctx_based=%d abs qid=%d\n",
1619                    p_hwfn->rel_pf_id, p_ll2_conn->input.rx_conn_type, qid);
1620
1621         if (p_ll2_conn->input.rx_conn_type == QED_LL2_RX_TYPE_LEGACY) {
1622                 p_rx->set_prod_addr = p_hwfn->regview +
1623                     GTT_BAR0_MAP_REG_TSDM_RAM + TSTORM_LL2_RX_PRODS_OFFSET(qid);
1624         } else {
1625                 /* QED_LL2_RX_TYPE_CTX - using doorbell */
1626                 p_rx->ctx_based = 1;
1627
1628                 p_rx->set_prod_addr = p_hwfn->doorbells +
1629                         p_hwfn->dpi_start_offset +
1630                         DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_LL2_PROD_UPDATE);
1631
1632                 /* prepare db data */
1633                 p_rx->db_data.icid = cpu_to_le16((u16)p_ll2_conn->cid);
1634                 SET_FIELD(p_rx->db_data.params,
1635                           CORE_PWM_PROD_UPDATE_DATA_AGG_CMD, DB_AGG_CMD_SET);
1636                 SET_FIELD(p_rx->db_data.params,
1637                           CORE_PWM_PROD_UPDATE_DATA_RESERVED1, 0);
1638         }
1639
1640         p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
1641                                             qed_db_addr(p_ll2_conn->cid,
1642                                                         DQ_DEMS_LEGACY);
1643         /* prepare db data */
1644         SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
1645         SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
1646         SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
1647                   DQ_XCM_CORE_TX_BD_PROD_CMD);
1648         p_tx->db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
1649
1650         rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
1651         if (rc)
1652                 goto out;
1653
1654         rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
1655         if (rc)
1656                 goto out;
1657
1658         if (!QED_IS_RDMA_PERSONALITY(p_hwfn))
1659                 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);
1660
1661         qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
1662
1663         if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
1664                 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
1665                         qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
1666                                                     QED_LLH_FILTER_ETHERTYPE,
1667                                                     ETH_P_FCOE, 0);
1668                 qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
1669                                             QED_LLH_FILTER_ETHERTYPE,
1670                                             ETH_P_FIP, 0);
1671         }
1672
1673 out:
1674         qed_ptt_release(p_hwfn, p_ptt);
1675         return rc;
1676 }
1677
1678 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
1679                                              struct qed_ll2_rx_queue *p_rx,
1680                                              struct qed_ll2_rx_packet *p_curp)
1681 {
1682         struct qed_ll2_rx_packet *p_posting_packet = NULL;
1683         struct core_ll2_rx_prod rx_prod = { 0, 0 };
1684         bool b_notify_fw = false;
1685         u16 bd_prod, cq_prod;
1686
1687         /* This handles the flushing of already posted buffers */
1688         while (!list_empty(&p_rx->posting_descq)) {
1689                 p_posting_packet = list_first_entry(&p_rx->posting_descq,
1690                                                     struct qed_ll2_rx_packet,
1691                                                     list_entry);
1692                 list_move_tail(&p_posting_packet->list_entry,
1693                                &p_rx->active_descq);
1694                 b_notify_fw = true;
1695         }
1696
1697         /* This handles the supplied packet [if there is one] */
1698         if (p_curp) {
1699                 list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
1700                 b_notify_fw = true;
1701         }
1702
1703         if (!b_notify_fw)
1704                 return;
1705
1706         bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
1707         cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
1708         if (p_rx->ctx_based) {
1709                 /* update producer by giving a doorbell */
1710                 p_rx->db_data.prod.bd_prod = cpu_to_le16(bd_prod);
1711                 p_rx->db_data.prod.cqe_prod = cpu_to_le16(cq_prod);
1712                 /* Make sure chain element is updated before ringing the
1713                  * doorbell
1714                  */
1715                 dma_wmb();
1716                 DIRECT_REG_WR64(p_rx->set_prod_addr,
1717                                 *((u64 *)&p_rx->db_data));
1718         } else {
1719                 rx_prod.bd_prod = cpu_to_le16(bd_prod);
1720                 rx_prod.cqe_prod = cpu_to_le16(cq_prod);
1721
1722                 /* Make sure chain element is updated before ringing the
1723                  * doorbell
1724                  */
1725                 dma_wmb();
1726
1727                 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
1728         }
1729 }
1730
1731 int qed_ll2_post_rx_buffer(void *cxt,
1732                            u8 connection_handle,
1733                            dma_addr_t addr,
1734                            u16 buf_len, void *cookie, u8 notify_fw)
1735 {
1736         struct qed_hwfn *p_hwfn = cxt;
1737         struct core_rx_bd_with_buff_len *p_curb = NULL;
1738         struct qed_ll2_rx_packet *p_curp = NULL;
1739         struct qed_ll2_info *p_ll2_conn;
1740         struct qed_ll2_rx_queue *p_rx;
1741         unsigned long flags;
1742         void *p_data;
1743         int rc = 0;
1744
1745         p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1746         if (!p_ll2_conn)
1747                 return -EINVAL;
1748         p_rx = &p_ll2_conn->rx_queue;
1749         if (!p_rx->set_prod_addr)
1750                 return -EIO;
1751
1752         spin_lock_irqsave(&p_rx->lock, flags);
1753         if (!list_empty(&p_rx->free_descq))
1754                 p_curp = list_first_entry(&p_rx->free_descq,
1755                                           struct qed_ll2_rx_packet, list_entry);
1756         if (p_curp) {
1757                 if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
1758                     qed_chain_get_elem_left(&p_rx->rcq_chain)) {
1759                         p_data = qed_chain_produce(&p_rx->rxq_chain);
1760                         p_curb = (struct core_rx_bd_with_buff_len *)p_data;
1761                         qed_chain_produce(&p_rx->rcq_chain);
1762                 }
1763         }
1764
1765         /* If we're lacking entires, let's try to flush buffers to FW */
1766         if (!p_curp || !p_curb) {
1767                 rc = -EBUSY;
1768                 p_curp = NULL;
1769                 goto out_notify;
1770         }
1771
1772         /* We have an Rx packet we can fill */
1773         DMA_REGPAIR_LE(p_curb->addr, addr);
1774         p_curb->buff_length = cpu_to_le16(buf_len);
1775         p_curp->rx_buf_addr = addr;
1776         p_curp->cookie = cookie;
1777         p_curp->rxq_bd = p_curb;
1778         p_curp->buf_length = buf_len;
1779         list_del(&p_curp->list_entry);
1780
1781         /* Check if we only want to enqueue this packet without informing FW */
1782         if (!notify_fw) {
1783                 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
1784                 goto out;
1785         }
1786
1787 out_notify:
1788         qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
1789 out:
1790         spin_unlock_irqrestore(&p_rx->lock, flags);
1791         return rc;
1792 }
1793
1794 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
1795                                           struct qed_ll2_tx_queue *p_tx,
1796                                           struct qed_ll2_tx_packet *p_curp,
1797                                           struct qed_ll2_tx_pkt_info *pkt,
1798                                           u8 notify_fw)
1799 {
1800         list_del(&p_curp->list_entry);
1801         p_curp->cookie = pkt->cookie;
1802         p_curp->bd_used = pkt->num_of_bds;
1803         p_curp->notify_fw = notify_fw;
1804         p_tx->cur_send_packet = p_curp;
1805         p_tx->cur_send_frag_num = 0;
1806
1807         p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag;
1808         p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len;
1809         p_tx->cur_send_frag_num++;
1810 }
1811
1812 static void
1813 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
1814                                  struct qed_ll2_info *p_ll2,
1815                                  struct qed_ll2_tx_packet *p_curp,
1816                                  struct qed_ll2_tx_pkt_info *pkt)
1817 {
1818         struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
1819         u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
1820         struct core_tx_bd *start_bd = NULL;
1821         enum core_roce_flavor_type roce_flavor;
1822         enum core_tx_dest tx_dest;
1823         u16 bd_data = 0, frag_idx;
1824         u16 bitfield1;
1825
1826         roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE
1827                                                              : CORE_RROCE;
1828
1829         switch (pkt->tx_dest) {
1830         case QED_LL2_TX_DEST_NW:
1831                 tx_dest = CORE_TX_DEST_NW;
1832                 break;
1833         case QED_LL2_TX_DEST_LB:
1834                 tx_dest = CORE_TX_DEST_LB;
1835                 break;
1836         case QED_LL2_TX_DEST_DROP:
1837                 tx_dest = CORE_TX_DEST_DROP;
1838                 break;
1839         default:
1840                 tx_dest = CORE_TX_DEST_LB;
1841                 break;
1842         }
1843
1844         start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1845         if (QED_IS_IWARP_PERSONALITY(p_hwfn) &&
1846             p_ll2->input.conn_type == QED_LL2_TYPE_OOO) {
1847                 start_bd->nw_vlan_or_lb_echo =
1848                     cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE);
1849         } else {
1850                 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan);
1851                 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
1852                     p_ll2->input.conn_type == QED_LL2_TYPE_FCOE)
1853                         pkt->remove_stag = true;
1854         }
1855
1856         bitfield1 = le16_to_cpu(start_bd->bitfield1);
1857         SET_FIELD(bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, pkt->l4_hdr_offset_w);
1858         SET_FIELD(bitfield1, CORE_TX_BD_TX_DST, tx_dest);
1859         start_bd->bitfield1 = cpu_to_le16(bitfield1);
1860
1861         bd_data |= pkt->bd_flags;
1862         SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1);
1863         SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds);
1864         SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor);
1865         SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum));
1866         SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum));
1867         SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len));
1868         SET_FIELD(bd_data, CORE_TX_BD_DATA_DISABLE_STAG_INSERTION,
1869                   !!(pkt->remove_stag));
1870
1871         start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data);
1872         DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag);
1873         start_bd->nbytes = cpu_to_le16(pkt->first_frag_len);
1874
1875         DP_VERBOSE(p_hwfn,
1876                    (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1877                    "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
1878                    p_ll2->queue_id,
1879                    p_ll2->cid,
1880                    p_ll2->input.conn_type,
1881                    prod_idx,
1882                    pkt->first_frag_len,
1883                    pkt->num_of_bds,
1884                    le32_to_cpu(start_bd->addr.hi),
1885                    le32_to_cpu(start_bd->addr.lo));
1886
1887         if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds)
1888                 return;
1889
1890         /* Need to provide the packet with additional BDs for frags */
1891         for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
1892              frag_idx < pkt->num_of_bds; frag_idx++) {
1893                 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
1894
1895                 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1896                 (*p_bd)->bd_data.as_bitfield = 0;
1897                 (*p_bd)->bitfield1 = 0;
1898                 p_curp->bds_set[frag_idx].tx_frag = 0;
1899                 p_curp->bds_set[frag_idx].frag_len = 0;
1900         }
1901 }
1902
1903 /* This should be called while the Txq spinlock is being held */
1904 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
1905                                      struct qed_ll2_info *p_ll2_conn)
1906 {
1907         bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
1908         struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1909         struct qed_ll2_tx_packet *p_pkt = NULL;
1910         u16 bd_prod;
1911
1912         /* If there are missing BDs, don't do anything now */
1913         if (p_ll2_conn->tx_queue.cur_send_frag_num !=
1914             p_ll2_conn->tx_queue.cur_send_packet->bd_used)
1915                 return;
1916
1917         /* Push the current packet to the list and clean after it */
1918         list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
1919                       &p_ll2_conn->tx_queue.sending_descq);
1920         p_ll2_conn->tx_queue.cur_send_packet = NULL;
1921         p_ll2_conn->tx_queue.cur_send_frag_num = 0;
1922
1923         /* Notify FW of packet only if requested to */
1924         if (!b_notify)
1925                 return;
1926
1927         bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
1928
1929         while (!list_empty(&p_tx->sending_descq)) {
1930                 p_pkt = list_first_entry(&p_tx->sending_descq,
1931                                          struct qed_ll2_tx_packet, list_entry);
1932                 if (!p_pkt)
1933                         break;
1934
1935                 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
1936         }
1937
1938         p_tx->db_msg.spq_prod = cpu_to_le16(bd_prod);
1939
1940         /* Make sure the BDs data is updated before ringing the doorbell */
1941         wmb();
1942
1943         DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&p_tx->db_msg));
1944
1945         DP_VERBOSE(p_hwfn,
1946                    (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1947                    "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
1948                    p_ll2_conn->queue_id,
1949                    p_ll2_conn->cid,
1950                    p_ll2_conn->input.conn_type, p_tx->db_msg.spq_prod);
1951 }
1952
1953 int qed_ll2_prepare_tx_packet(void *cxt,
1954                               u8 connection_handle,
1955                               struct qed_ll2_tx_pkt_info *pkt,
1956                               bool notify_fw)
1957 {
1958         struct qed_hwfn *p_hwfn = cxt;
1959         struct qed_ll2_tx_packet *p_curp = NULL;
1960         struct qed_ll2_info *p_ll2_conn = NULL;
1961         struct qed_ll2_tx_queue *p_tx;
1962         struct qed_chain *p_tx_chain;
1963         unsigned long flags;
1964         int rc = 0;
1965
1966         p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1967         if (!p_ll2_conn)
1968                 return -EINVAL;
1969         p_tx = &p_ll2_conn->tx_queue;
1970         p_tx_chain = &p_tx->txq_chain;
1971
1972         if (pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet)
1973                 return -EIO;
1974
1975         spin_lock_irqsave(&p_tx->lock, flags);
1976         if (p_tx->cur_send_packet) {
1977                 rc = -EEXIST;
1978                 goto out;
1979         }
1980
1981         /* Get entry, but only if we have tx elements for it */
1982         if (!list_empty(&p_tx->free_descq))
1983                 p_curp = list_first_entry(&p_tx->free_descq,
1984                                           struct qed_ll2_tx_packet, list_entry);
1985         if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds)
1986                 p_curp = NULL;
1987
1988         if (!p_curp) {
1989                 rc = -EBUSY;
1990                 goto out;
1991         }
1992
1993         /* Prepare packet and BD, and perhaps send a doorbell to FW */
1994         qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw);
1995
1996         qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt);
1997
1998         qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1999
2000 out:
2001         spin_unlock_irqrestore(&p_tx->lock, flags);
2002         return rc;
2003 }
2004
2005 int qed_ll2_set_fragment_of_tx_packet(void *cxt,
2006                                       u8 connection_handle,
2007                                       dma_addr_t addr, u16 nbytes)
2008 {
2009         struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
2010         struct qed_hwfn *p_hwfn = cxt;
2011         struct qed_ll2_info *p_ll2_conn = NULL;
2012         u16 cur_send_frag_num = 0;
2013         struct core_tx_bd *p_bd;
2014         unsigned long flags;
2015
2016         p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2017         if (!p_ll2_conn)
2018                 return -EINVAL;
2019
2020         if (!p_ll2_conn->tx_queue.cur_send_packet)
2021                 return -EINVAL;
2022
2023         p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
2024         cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
2025
2026         if (cur_send_frag_num >= p_cur_send_packet->bd_used)
2027                 return -EINVAL;
2028
2029         /* Fill the BD information, and possibly notify FW */
2030         p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
2031         DMA_REGPAIR_LE(p_bd->addr, addr);
2032         p_bd->nbytes = cpu_to_le16(nbytes);
2033         p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
2034         p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
2035
2036         p_ll2_conn->tx_queue.cur_send_frag_num++;
2037
2038         spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
2039         qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
2040         spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
2041
2042         return 0;
2043 }
2044
2045 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle)
2046 {
2047         struct qed_hwfn *p_hwfn = cxt;
2048         struct qed_ll2_info *p_ll2_conn = NULL;
2049         int rc = -EINVAL;
2050         struct qed_ptt *p_ptt;
2051
2052         p_ptt = qed_ptt_acquire(p_hwfn);
2053         if (!p_ptt)
2054                 return -EAGAIN;
2055
2056         p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
2057         if (!p_ll2_conn) {
2058                 rc = -EINVAL;
2059                 goto out;
2060         }
2061
2062         /* Stop Tx & Rx of connection, if needed */
2063         if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
2064                 p_ll2_conn->tx_queue.b_cb_registered = false;
2065                 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
2066                 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
2067                 if (rc)
2068                         goto out;
2069
2070                 qed_ll2_txq_flush(p_hwfn, connection_handle);
2071                 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
2072         }
2073
2074         if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
2075                 p_ll2_conn->rx_queue.b_cb_registered = false;
2076                 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
2077
2078                 if (p_ll2_conn->rx_queue.ctx_based)
2079                         qed_db_recovery_del(p_hwfn->cdev,
2080                                             p_ll2_conn->rx_queue.set_prod_addr,
2081                                             &p_ll2_conn->rx_queue.db_data);
2082
2083                 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
2084                 if (rc)
2085                         goto out;
2086
2087                 qed_ll2_rxq_flush(p_hwfn, connection_handle);
2088                 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
2089         }
2090
2091         if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
2092                 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
2093
2094         if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
2095                 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
2096                         qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
2097                                                        QED_LLH_FILTER_ETHERTYPE,
2098                                                        ETH_P_FCOE, 0);
2099                 qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
2100                                                QED_LLH_FILTER_ETHERTYPE,
2101                                                ETH_P_FIP, 0);
2102         }
2103
2104 out:
2105         qed_ptt_release(p_hwfn, p_ptt);
2106         return rc;
2107 }
2108
2109 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
2110                                            struct qed_ll2_info *p_ll2_conn)
2111 {
2112         struct qed_ooo_buffer *p_buffer;
2113
2114         if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
2115                 return;
2116
2117         qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
2118         while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
2119                                                    p_hwfn->p_ooo_info))) {
2120                 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
2121                                   p_buffer->rx_buffer_size,
2122                                   p_buffer->rx_buffer_virt_addr,
2123                                   p_buffer->rx_buffer_phys_addr);
2124                 kfree(p_buffer);
2125         }
2126 }
2127
2128 void qed_ll2_release_connection(void *cxt, u8 connection_handle)
2129 {
2130         struct qed_hwfn *p_hwfn = cxt;
2131         struct qed_ll2_info *p_ll2_conn = NULL;
2132
2133         p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2134         if (!p_ll2_conn)
2135                 return;
2136
2137         kfree(p_ll2_conn->tx_queue.descq_mem);
2138         qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
2139
2140         kfree(p_ll2_conn->rx_queue.descq_array);
2141         qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
2142         qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
2143
2144         qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
2145
2146         qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
2147
2148         mutex_lock(&p_ll2_conn->mutex);
2149         p_ll2_conn->b_active = false;
2150         mutex_unlock(&p_ll2_conn->mutex);
2151 }
2152
2153 int qed_ll2_alloc(struct qed_hwfn *p_hwfn)
2154 {
2155         struct qed_ll2_info *p_ll2_connections;
2156         u8 i;
2157
2158         /* Allocate LL2's set struct */
2159         p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS,
2160                                     sizeof(struct qed_ll2_info), GFP_KERNEL);
2161         if (!p_ll2_connections) {
2162                 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
2163                 return -ENOMEM;
2164         }
2165
2166         for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2167                 p_ll2_connections[i].my_id = i;
2168
2169         p_hwfn->p_ll2_info = p_ll2_connections;
2170         return 0;
2171 }
2172
2173 void qed_ll2_setup(struct qed_hwfn *p_hwfn)
2174 {
2175         int i;
2176
2177         for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2178                 mutex_init(&p_hwfn->p_ll2_info[i].mutex);
2179 }
2180
2181 void qed_ll2_free(struct qed_hwfn *p_hwfn)
2182 {
2183         if (!p_hwfn->p_ll2_info)
2184                 return;
2185
2186         kfree(p_hwfn->p_ll2_info);
2187         p_hwfn->p_ll2_info = NULL;
2188 }
2189
2190 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn,
2191                                     struct qed_ptt *p_ptt,
2192                                     struct qed_ll2_stats *p_stats)
2193 {
2194         struct core_ll2_port_stats port_stats;
2195
2196         memset(&port_stats, 0, sizeof(port_stats));
2197         qed_memcpy_from(p_hwfn, p_ptt, &port_stats,
2198                         BAR0_MAP_REG_TSDM_RAM +
2199                         TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)),
2200                         sizeof(port_stats));
2201
2202         p_stats->gsi_invalid_hdr += HILO_64_REGPAIR(port_stats.gsi_invalid_hdr);
2203         p_stats->gsi_invalid_pkt_length +=
2204             HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length);
2205         p_stats->gsi_unsupported_pkt_typ +=
2206             HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ);
2207         p_stats->gsi_crcchksm_error +=
2208             HILO_64_REGPAIR(port_stats.gsi_crcchksm_error);
2209 }
2210
2211 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
2212                                 struct qed_ptt *p_ptt,
2213                                 struct qed_ll2_info *p_ll2_conn,
2214                                 struct qed_ll2_stats *p_stats)
2215 {
2216         struct core_ll2_tstorm_per_queue_stat tstats;
2217         u8 qid = p_ll2_conn->queue_id;
2218         u32 tstats_addr;
2219
2220         memset(&tstats, 0, sizeof(tstats));
2221         tstats_addr = BAR0_MAP_REG_TSDM_RAM +
2222                       CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
2223         qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
2224
2225         p_stats->packet_too_big_discard +=
2226                         HILO_64_REGPAIR(tstats.packet_too_big_discard);
2227         p_stats->no_buff_discard += HILO_64_REGPAIR(tstats.no_buff_discard);
2228 }
2229
2230 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
2231                                 struct qed_ptt *p_ptt,
2232                                 struct qed_ll2_info *p_ll2_conn,
2233                                 struct qed_ll2_stats *p_stats)
2234 {
2235         struct core_ll2_ustorm_per_queue_stat ustats;
2236         u8 qid = p_ll2_conn->queue_id;
2237         u32 ustats_addr;
2238
2239         memset(&ustats, 0, sizeof(ustats));
2240         ustats_addr = BAR0_MAP_REG_USDM_RAM +
2241                       CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
2242         qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
2243
2244         p_stats->rcv_ucast_bytes += HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
2245         p_stats->rcv_mcast_bytes += HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
2246         p_stats->rcv_bcast_bytes += HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
2247         p_stats->rcv_ucast_pkts += HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
2248         p_stats->rcv_mcast_pkts += HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
2249         p_stats->rcv_bcast_pkts += HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
2250 }
2251
2252 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
2253                                 struct qed_ptt *p_ptt,
2254                                 struct qed_ll2_info *p_ll2_conn,
2255                                 struct qed_ll2_stats *p_stats)
2256 {
2257         struct core_ll2_pstorm_per_queue_stat pstats;
2258         u8 stats_id = p_ll2_conn->tx_stats_id;
2259         u32 pstats_addr;
2260
2261         memset(&pstats, 0, sizeof(pstats));
2262         pstats_addr = BAR0_MAP_REG_PSDM_RAM +
2263                       CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
2264         qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
2265
2266         p_stats->sent_ucast_bytes += HILO_64_REGPAIR(pstats.sent_ucast_bytes);
2267         p_stats->sent_mcast_bytes += HILO_64_REGPAIR(pstats.sent_mcast_bytes);
2268         p_stats->sent_bcast_bytes += HILO_64_REGPAIR(pstats.sent_bcast_bytes);
2269         p_stats->sent_ucast_pkts += HILO_64_REGPAIR(pstats.sent_ucast_pkts);
2270         p_stats->sent_mcast_pkts += HILO_64_REGPAIR(pstats.sent_mcast_pkts);
2271         p_stats->sent_bcast_pkts += HILO_64_REGPAIR(pstats.sent_bcast_pkts);
2272 }
2273
2274 static int __qed_ll2_get_stats(void *cxt, u8 connection_handle,
2275                                struct qed_ll2_stats *p_stats)
2276 {
2277         struct qed_hwfn *p_hwfn = cxt;
2278         struct qed_ll2_info *p_ll2_conn = NULL;
2279         struct qed_ptt *p_ptt;
2280
2281         if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
2282             !p_hwfn->p_ll2_info)
2283                 return -EINVAL;
2284
2285         p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
2286
2287         p_ptt = qed_ptt_acquire(p_hwfn);
2288         if (!p_ptt) {
2289                 DP_ERR(p_hwfn, "Failed to acquire ptt\n");
2290                 return -EINVAL;
2291         }
2292
2293         if (p_ll2_conn->input.gsi_enable)
2294                 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats);
2295
2296         _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2297
2298         _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2299
2300         if (p_ll2_conn->tx_stats_en)
2301                 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2302
2303         qed_ptt_release(p_hwfn, p_ptt);
2304
2305         return 0;
2306 }
2307
2308 int qed_ll2_get_stats(void *cxt,
2309                       u8 connection_handle, struct qed_ll2_stats *p_stats)
2310 {
2311         memset(p_stats, 0, sizeof(*p_stats));
2312         return __qed_ll2_get_stats(cxt, connection_handle, p_stats);
2313 }
2314
2315 static void qed_ll2b_release_rx_packet(void *cxt,
2316                                        u8 connection_handle,
2317                                        void *cookie,
2318                                        dma_addr_t rx_buf_addr,
2319                                        bool b_last_packet)
2320 {
2321         struct qed_hwfn *p_hwfn = cxt;
2322
2323         qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie);
2324 }
2325
2326 static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
2327                                     const struct qed_ll2_cb_ops *ops,
2328                                     void *cookie)
2329 {
2330         cdev->ll2->cbs = ops;
2331         cdev->ll2->cb_cookie = cookie;
2332 }
2333
2334 static struct qed_ll2_cbs ll2_cbs = {
2335         .rx_comp_cb = &qed_ll2b_complete_rx_packet,
2336         .rx_release_cb = &qed_ll2b_release_rx_packet,
2337         .tx_comp_cb = &qed_ll2b_complete_tx_packet,
2338         .tx_release_cb = &qed_ll2b_complete_tx_packet,
2339 };
2340
2341 static void qed_ll2_set_conn_data(struct qed_hwfn *p_hwfn,
2342                                   struct qed_ll2_acquire_data *data,
2343                                   struct qed_ll2_params *params,
2344                                   enum qed_ll2_conn_type conn_type,
2345                                   u8 *handle, bool lb)
2346 {
2347         memset(data, 0, sizeof(*data));
2348
2349         data->input.conn_type = conn_type;
2350         data->input.mtu = params->mtu;
2351         data->input.rx_num_desc = QED_LL2_RX_SIZE;
2352         data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets;
2353         data->input.rx_vlan_removal_en = params->rx_vlan_stripping;
2354         data->input.tx_num_desc = QED_LL2_TX_SIZE;
2355         data->p_connection_handle = handle;
2356         data->cbs = &ll2_cbs;
2357         ll2_cbs.cookie = p_hwfn;
2358
2359         if (lb) {
2360                 data->input.tx_tc = PKT_LB_TC;
2361                 data->input.tx_dest = QED_LL2_TX_DEST_LB;
2362         } else {
2363                 data->input.tx_tc = 0;
2364                 data->input.tx_dest = QED_LL2_TX_DEST_NW;
2365         }
2366 }
2367
2368 static int qed_ll2_start_ooo(struct qed_hwfn *p_hwfn,
2369                              struct qed_ll2_params *params)
2370 {
2371         u8 *handle = &p_hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
2372         struct qed_ll2_acquire_data data;
2373         int rc;
2374
2375         qed_ll2_set_conn_data(p_hwfn, &data, params,
2376                               QED_LL2_TYPE_OOO, handle, true);
2377
2378         rc = qed_ll2_acquire_connection(p_hwfn, &data);
2379         if (rc) {
2380                 DP_INFO(p_hwfn, "Failed to acquire LL2 OOO connection\n");
2381                 goto out;
2382         }
2383
2384         rc = qed_ll2_establish_connection(p_hwfn, *handle);
2385         if (rc) {
2386                 DP_INFO(p_hwfn, "Failed to establish LL2 OOO connection\n");
2387                 goto fail;
2388         }
2389
2390         return 0;
2391
2392 fail:
2393         qed_ll2_release_connection(p_hwfn, *handle);
2394 out:
2395         *handle = QED_LL2_UNUSED_HANDLE;
2396         return rc;
2397 }
2398
2399 static bool qed_ll2_is_storage_eng1(struct qed_dev *cdev)
2400 {
2401         return (QED_IS_FCOE_PERSONALITY(QED_LEADING_HWFN(cdev)) ||
2402                 QED_IS_ISCSI_PERSONALITY(QED_LEADING_HWFN(cdev))) &&
2403                 (QED_AFFIN_HWFN(cdev) != QED_LEADING_HWFN(cdev));
2404 }
2405
2406 static int __qed_ll2_stop(struct qed_hwfn *p_hwfn)
2407 {
2408         struct qed_dev *cdev = p_hwfn->cdev;
2409         int rc;
2410
2411         rc = qed_ll2_terminate_connection(p_hwfn, cdev->ll2->handle);
2412         if (rc)
2413                 DP_INFO(cdev, "Failed to terminate LL2 connection\n");
2414
2415         qed_ll2_release_connection(p_hwfn, cdev->ll2->handle);
2416
2417         return rc;
2418 }
2419
2420 static int qed_ll2_stop(struct qed_dev *cdev)
2421 {
2422         bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2423         struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2424         int rc = 0, rc2 = 0;
2425
2426         if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
2427                 return 0;
2428
2429         qed_llh_remove_mac_filter(cdev, 0, cdev->ll2_mac_address);
2430         eth_zero_addr(cdev->ll2_mac_address);
2431
2432         if (QED_IS_ISCSI_PERSONALITY(p_hwfn))
2433                 qed_ll2_stop_ooo(p_hwfn);
2434
2435         /* In CMT mode, LL2 is always started on engine 0 for a storage PF */
2436         if (b_is_storage_eng1) {
2437                 rc2 = __qed_ll2_stop(QED_LEADING_HWFN(cdev));
2438                 if (rc2)
2439                         DP_NOTICE(QED_LEADING_HWFN(cdev),
2440                                   "Failed to stop LL2 on engine 0\n");
2441         }
2442
2443         rc = __qed_ll2_stop(p_hwfn);
2444         if (rc)
2445                 DP_NOTICE(p_hwfn, "Failed to stop LL2\n");
2446
2447         qed_ll2_kill_buffers(cdev);
2448
2449         cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2450
2451         return rc | rc2;
2452 }
2453
2454 static int __qed_ll2_start(struct qed_hwfn *p_hwfn,
2455                            struct qed_ll2_params *params)
2456 {
2457         struct qed_ll2_buffer *buffer, *tmp_buffer;
2458         struct qed_dev *cdev = p_hwfn->cdev;
2459         enum qed_ll2_conn_type conn_type;
2460         struct qed_ll2_acquire_data data;
2461         int rc, rx_cnt;
2462
2463         switch (p_hwfn->hw_info.personality) {
2464         case QED_PCI_FCOE:
2465                 conn_type = QED_LL2_TYPE_FCOE;
2466                 break;
2467         case QED_PCI_ISCSI:
2468                 conn_type = QED_LL2_TYPE_ISCSI;
2469                 break;
2470         case QED_PCI_ETH_ROCE:
2471                 conn_type = QED_LL2_TYPE_ROCE;
2472                 break;
2473         default:
2474
2475                 conn_type = QED_LL2_TYPE_TEST;
2476         }
2477
2478         qed_ll2_set_conn_data(p_hwfn, &data, params, conn_type,
2479                               &cdev->ll2->handle, false);
2480
2481         rc = qed_ll2_acquire_connection(p_hwfn, &data);
2482         if (rc) {
2483                 DP_INFO(p_hwfn, "Failed to acquire LL2 connection\n");
2484                 return rc;
2485         }
2486
2487         rc = qed_ll2_establish_connection(p_hwfn, cdev->ll2->handle);
2488         if (rc) {
2489                 DP_INFO(p_hwfn, "Failed to establish LL2 connection\n");
2490                 goto release_conn;
2491         }
2492
2493         /* Post all Rx buffers to FW */
2494         spin_lock_bh(&cdev->ll2->lock);
2495         rx_cnt = cdev->ll2->rx_cnt;
2496         list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
2497                 rc = qed_ll2_post_rx_buffer(p_hwfn,
2498                                             cdev->ll2->handle,
2499                                             buffer->phys_addr, 0, buffer, 1);
2500                 if (rc) {
2501                         DP_INFO(p_hwfn,
2502                                 "Failed to post an Rx buffer; Deleting it\n");
2503                         dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
2504                                          cdev->ll2->rx_size, DMA_FROM_DEVICE);
2505                         kfree(buffer->data);
2506                         list_del(&buffer->list);
2507                         kfree(buffer);
2508                 } else {
2509                         rx_cnt++;
2510                 }
2511         }
2512         spin_unlock_bh(&cdev->ll2->lock);
2513
2514         if (rx_cnt == cdev->ll2->rx_cnt) {
2515                 DP_NOTICE(p_hwfn, "Failed passing even a single Rx buffer\n");
2516                 goto terminate_conn;
2517         }
2518         cdev->ll2->rx_cnt = rx_cnt;
2519
2520         return 0;
2521
2522 terminate_conn:
2523         qed_ll2_terminate_connection(p_hwfn, cdev->ll2->handle);
2524 release_conn:
2525         qed_ll2_release_connection(p_hwfn, cdev->ll2->handle);
2526         return rc;
2527 }
2528
2529 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
2530 {
2531         bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2532         struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2533         struct qed_ll2_buffer *buffer;
2534         int rx_num_desc, i, rc;
2535
2536         if (!is_valid_ether_addr(params->ll2_mac_address)) {
2537                 DP_NOTICE(cdev, "Invalid Ethernet address\n");
2538                 return -EINVAL;
2539         }
2540
2541         WARN_ON(!cdev->ll2->cbs);
2542
2543         /* Initialize LL2 locks & lists */
2544         INIT_LIST_HEAD(&cdev->ll2->list);
2545         spin_lock_init(&cdev->ll2->lock);
2546
2547         cdev->ll2->rx_size = PRM_DMA_PAD_BYTES_NUM + ETH_HLEN +
2548                              L1_CACHE_BYTES + params->mtu;
2549
2550         /* Allocate memory for LL2.
2551          * In CMT mode, in case of a storage PF which is affintized to engine 1,
2552          * LL2 is started also on engine 0 and thus we need twofold buffers.
2553          */
2554         rx_num_desc = QED_LL2_RX_SIZE * (b_is_storage_eng1 ? 2 : 1);
2555         DP_INFO(cdev, "Allocating %d LL2 buffers of size %08x bytes\n",
2556                 rx_num_desc, cdev->ll2->rx_size);
2557         for (i = 0; i < rx_num_desc; i++) {
2558                 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
2559                 if (!buffer) {
2560                         DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
2561                         rc = -ENOMEM;
2562                         goto err0;
2563                 }
2564
2565                 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
2566                                           &buffer->phys_addr);
2567                 if (rc) {
2568                         kfree(buffer);
2569                         goto err0;
2570                 }
2571
2572                 list_add_tail(&buffer->list, &cdev->ll2->list);
2573         }
2574
2575         rc = __qed_ll2_start(p_hwfn, params);
2576         if (rc) {
2577                 DP_NOTICE(cdev, "Failed to start LL2\n");
2578                 goto err0;
2579         }
2580
2581         /* In CMT mode, always need to start LL2 on engine 0 for a storage PF,
2582          * since broadcast/mutlicast packets are routed to engine 0.
2583          */
2584         if (b_is_storage_eng1) {
2585                 rc = __qed_ll2_start(QED_LEADING_HWFN(cdev), params);
2586                 if (rc) {
2587                         DP_NOTICE(QED_LEADING_HWFN(cdev),
2588                                   "Failed to start LL2 on engine 0\n");
2589                         goto err1;
2590                 }
2591         }
2592
2593         if (QED_IS_ISCSI_PERSONALITY(p_hwfn)) {
2594                 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
2595                 rc = qed_ll2_start_ooo(p_hwfn, params);
2596                 if (rc) {
2597                         DP_NOTICE(cdev, "Failed to start OOO LL2\n");
2598                         goto err2;
2599                 }
2600         }
2601
2602         rc = qed_llh_add_mac_filter(cdev, 0, params->ll2_mac_address);
2603         if (rc) {
2604                 DP_NOTICE(cdev, "Failed to add an LLH filter\n");
2605                 goto err3;
2606         }
2607
2608         ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
2609
2610         return 0;
2611
2612 err3:
2613         if (QED_IS_ISCSI_PERSONALITY(p_hwfn))
2614                 qed_ll2_stop_ooo(p_hwfn);
2615 err2:
2616         if (b_is_storage_eng1)
2617                 __qed_ll2_stop(QED_LEADING_HWFN(cdev));
2618 err1:
2619         __qed_ll2_stop(p_hwfn);
2620 err0:
2621         qed_ll2_kill_buffers(cdev);
2622         cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2623         return rc;
2624 }
2625
2626 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb,
2627                               unsigned long xmit_flags)
2628 {
2629         struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2630         struct qed_ll2_tx_pkt_info pkt;
2631         const skb_frag_t *frag;
2632         u8 flags = 0, nr_frags;
2633         int rc = -EINVAL, i;
2634         dma_addr_t mapping;
2635         u16 vlan = 0;
2636
2637         if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
2638                 DP_INFO(cdev, "Cannot transmit a checksummed packet\n");
2639                 return -EINVAL;
2640         }
2641
2642         /* Cache number of fragments from SKB since SKB may be freed by
2643          * the completion routine after calling qed_ll2_prepare_tx_packet()
2644          */
2645         nr_frags = skb_shinfo(skb)->nr_frags;
2646
2647         if (1 + nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) {
2648                 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
2649                        1 + nr_frags);
2650                 return -EINVAL;
2651         }
2652
2653         mapping = dma_map_single(&cdev->pdev->dev, skb->data,
2654                                  skb->len, DMA_TO_DEVICE);
2655         if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2656                 DP_NOTICE(cdev, "SKB mapping failed\n");
2657                 return -EINVAL;
2658         }
2659
2660         /* Request HW to calculate IP csum */
2661         if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
2662               ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
2663                 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT);
2664
2665         if (skb_vlan_tag_present(skb)) {
2666                 vlan = skb_vlan_tag_get(skb);
2667                 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT);
2668         }
2669
2670         memset(&pkt, 0, sizeof(pkt));
2671         pkt.num_of_bds = 1 + nr_frags;
2672         pkt.vlan = vlan;
2673         pkt.bd_flags = flags;
2674         pkt.tx_dest = QED_LL2_TX_DEST_NW;
2675         pkt.first_frag = mapping;
2676         pkt.first_frag_len = skb->len;
2677         pkt.cookie = skb;
2678         if (test_bit(QED_MF_UFP_SPECIFIC, &cdev->mf_bits) &&
2679             test_bit(QED_LL2_XMIT_FLAGS_FIP_DISCOVERY, &xmit_flags))
2680                 pkt.remove_stag = true;
2681
2682         /* qed_ll2_prepare_tx_packet() may actually send the packet if
2683          * there are no fragments in the skb and subsequently the completion
2684          * routine may run and free the SKB, so no dereferencing the SKB
2685          * beyond this point unless skb has any fragments.
2686          */
2687         rc = qed_ll2_prepare_tx_packet(p_hwfn, cdev->ll2->handle,
2688                                        &pkt, 1);
2689         if (rc)
2690                 goto err;
2691
2692         for (i = 0; i < nr_frags; i++) {
2693                 frag = &skb_shinfo(skb)->frags[i];
2694
2695                 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
2696                                            skb_frag_size(frag), DMA_TO_DEVICE);
2697
2698                 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2699                         DP_NOTICE(cdev,
2700                                   "Unable to map frag - dropping packet\n");
2701                         rc = -ENOMEM;
2702                         goto err;
2703                 }
2704
2705                 rc = qed_ll2_set_fragment_of_tx_packet(p_hwfn,
2706                                                        cdev->ll2->handle,
2707                                                        mapping,
2708                                                        skb_frag_size(frag));
2709
2710                 /* if failed not much to do here, partial packet has been posted
2711                  * we can't free memory, will need to wait for completion
2712                  */
2713                 if (rc)
2714                         goto err2;
2715         }
2716
2717         return 0;
2718
2719 err:
2720         dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
2721 err2:
2722         return rc;
2723 }
2724
2725 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
2726 {
2727         bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2728         struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2729         int rc;
2730
2731         if (!cdev->ll2)
2732                 return -EINVAL;
2733
2734         rc = qed_ll2_get_stats(p_hwfn, cdev->ll2->handle, stats);
2735         if (rc) {
2736                 DP_NOTICE(p_hwfn, "Failed to get LL2 stats\n");
2737                 return rc;
2738         }
2739
2740         /* In CMT mode, LL2 is always started on engine 0 for a storage PF */
2741         if (b_is_storage_eng1) {
2742                 rc = __qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
2743                                          cdev->ll2->handle, stats);
2744                 if (rc) {
2745                         DP_NOTICE(QED_LEADING_HWFN(cdev),
2746                                   "Failed to get LL2 stats on engine 0\n");
2747                         return rc;
2748                 }
2749         }
2750
2751         return 0;
2752 }
2753
2754 const struct qed_ll2_ops qed_ll2_ops_pass = {
2755         .start = &qed_ll2_start,
2756         .stop = &qed_ll2_stop,
2757         .start_xmit = &qed_ll2_start_xmit,
2758         .register_cb_ops = &qed_ll2_register_cb_ops,
2759         .get_stats = &qed_ll2_stats,
2760 };
2761
2762 int qed_ll2_alloc_if(struct qed_dev *cdev)
2763 {
2764         cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL);
2765         return cdev->ll2 ? 0 : -ENOMEM;
2766 }
2767
2768 void qed_ll2_dealloc_if(struct qed_dev *cdev)
2769 {
2770         kfree(cdev->ll2);
2771         cdev->ll2 = NULL;
2772 }