1 /* QLogic qed NIC Driver
2 * Copyright (c) 2015 QLogic Corporation
4 * This software is available under the terms of the GNU General Public License
5 * (GPL) Version 2, available from the file COPYING in the main directory of
12 #include <linux/types.h>
13 #include <linux/slab.h>
16 /* Fields of IGU PF CONFIGRATION REGISTER */
17 #define IGU_PF_CONF_FUNC_EN (0x1 << 0) /* function enable */
18 #define IGU_PF_CONF_MSI_MSIX_EN (0x1 << 1) /* MSI/MSIX enable */
19 #define IGU_PF_CONF_INT_LINE_EN (0x1 << 2) /* INT enable */
20 #define IGU_PF_CONF_ATTN_BIT_EN (0x1 << 3) /* attention enable */
21 #define IGU_PF_CONF_SINGLE_ISR_EN (0x1 << 4) /* single ISR mode enable */
22 #define IGU_PF_CONF_SIMD_MODE (0x1 << 5) /* simd all ones mode */
23 /* Fields of IGU VF CONFIGRATION REGISTER */
24 #define IGU_VF_CONF_FUNC_EN (0x1 << 0) /* function enable */
25 #define IGU_VF_CONF_MSI_MSIX_EN (0x1 << 1) /* MSI/MSIX enable */
26 #define IGU_VF_CONF_SINGLE_ISR_EN (0x1 << 4) /* single ISR mode enable */
27 #define IGU_VF_CONF_PARENT_MASK (0xF) /* Parent PF */
28 #define IGU_VF_CONF_PARENT_SHIFT 5 /* Parent PF */
30 /* Igu control commands
38 /* Control register for the IGU command register
42 #define IGU_CTRL_REG_FID_MASK 0xFFFF /* Opaque_FID */
43 #define IGU_CTRL_REG_FID_SHIFT 0
44 #define IGU_CTRL_REG_PXP_ADDR_MASK 0xFFF /* Command address */
45 #define IGU_CTRL_REG_PXP_ADDR_SHIFT 16
46 #define IGU_CTRL_REG_RESERVED_MASK 0x1
47 #define IGU_CTRL_REG_RESERVED_SHIFT 28
48 #define IGU_CTRL_REG_TYPE_MASK 0x1 /* use enum igu_ctrl_cmd */
49 #define IGU_CTRL_REG_TYPE_SHIFT 31
52 enum qed_coalescing_fsm {
53 QED_COAL_RX_STATE_MACHINE,
54 QED_COAL_TX_STATE_MACHINE
58 * @brief qed_int_cau_conf_pi - configure cau for a given
68 void qed_int_cau_conf_pi(struct qed_hwfn *p_hwfn,
69 struct qed_ptt *p_ptt,
72 enum qed_coalescing_fsm coalescing_fsm,
76 * @brief qed_int_igu_enable_int - enable device interrupts
80 * @param int_mode - interrupt mode to use
82 void qed_int_igu_enable_int(struct qed_hwfn *p_hwfn,
83 struct qed_ptt *p_ptt,
84 enum qed_int_mode int_mode);
87 * @brief qed_int_igu_disable_int - disable device interrupts
92 void qed_int_igu_disable_int(struct qed_hwfn *p_hwfn,
93 struct qed_ptt *p_ptt);
96 * @brief qed_int_igu_read_sisr_reg - Reads the single isr multiple dpc
103 u64 qed_int_igu_read_sisr_reg(struct qed_hwfn *p_hwfn);
105 #define QED_SP_SB_ID 0xffff
107 * @brief qed_int_sb_init - Initializes the sb_info structure.
109 * once the structure is initialized it can be passed to sb related functions.
113 * @param sb_info points to an uninitialized (but
114 * allocated) sb_info structure
115 * @param sb_virt_addr
117 * @param sb_id the sb_id to be used (zero based in driver)
118 * should use QED_SP_SB_ID for SP Status block
122 int qed_int_sb_init(struct qed_hwfn *p_hwfn,
123 struct qed_ptt *p_ptt,
124 struct qed_sb_info *sb_info,
126 dma_addr_t sb_phy_addr,
129 * @brief qed_int_sb_setup - Setup the sb.
133 * @param sb_info initialized sb_info structure
135 void qed_int_sb_setup(struct qed_hwfn *p_hwfn,
136 struct qed_ptt *p_ptt,
137 struct qed_sb_info *sb_info);
140 * @brief qed_int_sb_release - releases the sb_info structure.
142 * once the structure is released, it's memory can be freed
145 * @param sb_info points to an allocated sb_info structure
146 * @param sb_id the sb_id to be used (zero based in driver)
147 * should never be equal to QED_SP_SB_ID
152 int qed_int_sb_release(struct qed_hwfn *p_hwfn,
153 struct qed_sb_info *sb_info,
157 * @brief qed_int_sp_dpc - To be called when an interrupt is received on the
158 * default status block.
160 * @param p_hwfn - pointer to hwfn
163 void qed_int_sp_dpc(unsigned long hwfn_cookie);
166 * @brief qed_int_get_num_sbs - get the number of status
167 * blocks configured for this funciton in the igu.
170 * @param p_sb_cnt_info
172 * @return int - number of status blocks configured
174 void qed_int_get_num_sbs(struct qed_hwfn *p_hwfn,
175 struct qed_sb_cnt_info *p_sb_cnt_info);
178 * @brief qed_int_disable_post_isr_release - performs the cleanup post ISR
179 * release. The API need to be called after releasing all slowpath IRQs
185 void qed_int_disable_post_isr_release(struct qed_dev *cdev);
187 #define QED_CAU_DEF_RX_TIMER_RES 0
188 #define QED_CAU_DEF_TX_TIMER_RES 0
190 #define QED_SB_ATT_IDX 0x0001
191 #define QED_SB_EVENT_MASK 0x0003
193 #define SB_ALIGNED_SIZE(p_hwfn) \
194 ALIGNED_TYPE_SIZE(struct status_block, p_hwfn)
196 struct qed_igu_block {
198 #define QED_IGU_STATUS_FREE 0x01
199 #define QED_IGU_STATUS_VALID 0x02
200 #define QED_IGU_STATUS_PF 0x04
208 struct qed_igu_block igu_blocks[MAX_TOT_SB_PER_PATH];
211 struct qed_igu_info {
212 struct qed_igu_map igu_map;
221 /* TODO Names of function may change... */
222 void qed_int_igu_init_pure_rt(struct qed_hwfn *p_hwfn,
223 struct qed_ptt *p_ptt,
227 void qed_int_igu_init_rt(struct qed_hwfn *p_hwfn);
230 * @brief qed_int_igu_read_cam - Reads the IGU CAM.
231 * This function needs to be called during hardware
232 * prepare. It reads the info from igu cam to know which
233 * status block is the default / base status block etc.
240 int qed_int_igu_read_cam(struct qed_hwfn *p_hwfn,
241 struct qed_ptt *p_ptt);
243 typedef int (*qed_int_comp_cb_t)(struct qed_hwfn *p_hwfn,
246 * @brief qed_int_register_cb - Register callback func for
247 * slowhwfn statusblock.
249 * Every protocol that uses the slowhwfn status block
250 * should register a callback function that will be called
251 * once there is an update of the sp status block.
254 * @param comp_cb - function to be called when there is an
255 * interrupt on the sp sb
257 * @param cookie - passed to the callback function
258 * @param sb_idx - OUT parameter which gives the chosen index
260 * @param p_fw_cons - pointer to the actual address of the
261 * consumer for this protocol.
265 int qed_int_register_cb(struct qed_hwfn *p_hwfn,
266 qed_int_comp_cb_t comp_cb,
272 * @brief qed_int_unregister_cb - Unregisters callback
273 * function from sp sb.
274 * Partner of qed_int_register_cb -> should be called
275 * when no longer required.
282 int qed_int_unregister_cb(struct qed_hwfn *p_hwfn,
286 * @brief qed_int_get_sp_sb_id - Get the slowhwfn sb id.
292 u16 qed_int_get_sp_sb_id(struct qed_hwfn *p_hwfn);
295 * @brief Status block cleanup. Should be called for each status
296 * block that will be used -> both PF / VF
300 * @param sb_id - igu status block id
301 * @param opaque - opaque fid of the sb owner.
302 * @param b_set - set(1) / clear(0)
304 void qed_int_igu_init_pure_rt_single(struct qed_hwfn *p_hwfn,
305 struct qed_ptt *p_ptt,
311 * @brief qed_int_cau_conf - configure cau for a given status
321 void qed_int_cau_conf_sb(struct qed_hwfn *p_hwfn,
322 struct qed_ptt *p_ptt,
329 * @brief qed_int_alloc
336 int qed_int_alloc(struct qed_hwfn *p_hwfn,
337 struct qed_ptt *p_ptt);
340 * @brief qed_int_free
344 void qed_int_free(struct qed_hwfn *p_hwfn);
347 * @brief qed_int_setup
352 void qed_int_setup(struct qed_hwfn *p_hwfn,
353 struct qed_ptt *p_ptt);
356 * @brief - Returns an Rx queue index appropriate for usage with given SB.
359 * @param sb_id - absolute index of SB
361 * @return index of Rx queue
363 u16 qed_int_queue_id_from_sb_id(struct qed_hwfn *p_hwfn, u16 sb_id);
366 * @brief - Enable Interrupt & Attention for hw function
374 int qed_int_igu_enable(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
375 enum qed_int_mode int_mode);
378 * @brief - Initialize CAU status block entry
386 void qed_init_cau_sb_entry(struct qed_hwfn *p_hwfn,
387 struct cau_sb_entry *p_sb_entry,
392 int qed_int_set_timer_res(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
393 u8 timer_res, u16 sb_id, bool tx);
395 #define QED_MAPPING_MEMORY_SIZE(dev) (NUM_OF_SBS(dev))