2 * Copyright (C) 2015-2017 Netronome Systems, Inc.
4 * This software is dual licensed under the GNU General License Version 2,
5 * June 1991 as shown in the file COPYING in the top-level directory of this
6 * source tree or the BSD 2-Clause License provided below. You have the
7 * option to license this software under the complete terms of either license.
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12 * without modification, are permitted provided that the following
15 * 1. Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * 2. Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 /* Authors: David Brunecz <david.brunecz@netronome.com>
35 * Jakub Kicinski <jakub.kicinski@netronome.com>
36 * Jason Mcmullan <jason.mcmullan@netronome.com>
39 #include <linux/bitfield.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_ether.h>
42 #include <linux/kernel.h>
43 #include <linux/module.h>
47 #include "nfp6000/nfp6000.h"
49 #define NSP_ETH_NBI_PORT_COUNT 24
50 #define NSP_ETH_MAX_COUNT (2 * NSP_ETH_NBI_PORT_COUNT)
51 #define NSP_ETH_TABLE_SIZE (NSP_ETH_MAX_COUNT * \
52 sizeof(union eth_table_entry))
54 #define NSP_ETH_PORT_LANES GENMASK_ULL(3, 0)
55 #define NSP_ETH_PORT_INDEX GENMASK_ULL(15, 8)
56 #define NSP_ETH_PORT_LABEL GENMASK_ULL(53, 48)
57 #define NSP_ETH_PORT_PHYLABEL GENMASK_ULL(59, 54)
58 #define NSP_ETH_PORT_FEC_SUPP_BASER BIT_ULL(60)
59 #define NSP_ETH_PORT_FEC_SUPP_RS BIT_ULL(61)
61 #define NSP_ETH_PORT_LANES_MASK cpu_to_le64(NSP_ETH_PORT_LANES)
63 #define NSP_ETH_STATE_CONFIGURED BIT_ULL(0)
64 #define NSP_ETH_STATE_ENABLED BIT_ULL(1)
65 #define NSP_ETH_STATE_TX_ENABLED BIT_ULL(2)
66 #define NSP_ETH_STATE_RX_ENABLED BIT_ULL(3)
67 #define NSP_ETH_STATE_RATE GENMASK_ULL(11, 8)
68 #define NSP_ETH_STATE_INTERFACE GENMASK_ULL(19, 12)
69 #define NSP_ETH_STATE_MEDIA GENMASK_ULL(21, 20)
70 #define NSP_ETH_STATE_OVRD_CHNG BIT_ULL(22)
71 #define NSP_ETH_STATE_ANEG GENMASK_ULL(25, 23)
72 #define NSP_ETH_STATE_FEC GENMASK_ULL(27, 26)
74 #define NSP_ETH_CTRL_CONFIGURED BIT_ULL(0)
75 #define NSP_ETH_CTRL_ENABLED BIT_ULL(1)
76 #define NSP_ETH_CTRL_TX_ENABLED BIT_ULL(2)
77 #define NSP_ETH_CTRL_RX_ENABLED BIT_ULL(3)
78 #define NSP_ETH_CTRL_SET_RATE BIT_ULL(4)
79 #define NSP_ETH_CTRL_SET_LANES BIT_ULL(5)
80 #define NSP_ETH_CTRL_SET_ANEG BIT_ULL(6)
81 #define NSP_ETH_CTRL_SET_FEC BIT_ULL(7)
101 union eth_table_entry {
109 __le64 raw[NSP_ETH_NUM_RAW];
112 static const struct {
113 enum nfp_eth_rate rate;
115 } nsp_eth_rate_tbl[] = {
116 { RATE_INVALID, 0, },
117 { RATE_10M, SPEED_10, },
118 { RATE_100M, SPEED_100, },
119 { RATE_1G, SPEED_1000, },
120 { RATE_10G, SPEED_10000, },
121 { RATE_25G, SPEED_25000, },
124 static unsigned int nfp_eth_rate2speed(enum nfp_eth_rate rate)
128 for (i = 0; i < ARRAY_SIZE(nsp_eth_rate_tbl); i++)
129 if (nsp_eth_rate_tbl[i].rate == rate)
130 return nsp_eth_rate_tbl[i].speed;
135 static unsigned int nfp_eth_speed2rate(unsigned int speed)
139 for (i = 0; i < ARRAY_SIZE(nsp_eth_rate_tbl); i++)
140 if (nsp_eth_rate_tbl[i].speed == speed)
141 return nsp_eth_rate_tbl[i].rate;
146 static void nfp_eth_copy_mac_reverse(u8 *dst, const u8 *src)
150 for (i = 0; i < ETH_ALEN; i++)
151 dst[ETH_ALEN - i - 1] = src[i];
155 nfp_eth_port_translate(struct nfp_nsp *nsp, const union eth_table_entry *src,
156 unsigned int index, struct nfp_eth_table_port *dst)
162 port = le64_to_cpu(src->port);
163 state = le64_to_cpu(src->state);
165 dst->eth_index = FIELD_GET(NSP_ETH_PORT_INDEX, port);
167 dst->nbi = index / NSP_ETH_NBI_PORT_COUNT;
168 dst->base = index % NSP_ETH_NBI_PORT_COUNT;
169 dst->lanes = FIELD_GET(NSP_ETH_PORT_LANES, port);
171 dst->enabled = FIELD_GET(NSP_ETH_STATE_ENABLED, state);
172 dst->tx_enabled = FIELD_GET(NSP_ETH_STATE_TX_ENABLED, state);
173 dst->rx_enabled = FIELD_GET(NSP_ETH_STATE_RX_ENABLED, state);
175 rate = nfp_eth_rate2speed(FIELD_GET(NSP_ETH_STATE_RATE, state));
176 dst->speed = dst->lanes * rate;
178 dst->interface = FIELD_GET(NSP_ETH_STATE_INTERFACE, state);
179 dst->media = FIELD_GET(NSP_ETH_STATE_MEDIA, state);
181 nfp_eth_copy_mac_reverse(dst->mac_addr, src->mac_addr);
183 dst->label_port = FIELD_GET(NSP_ETH_PORT_PHYLABEL, port);
184 dst->label_subport = FIELD_GET(NSP_ETH_PORT_LABEL, port);
186 if (nfp_nsp_get_abi_ver_minor(nsp) < 17)
189 dst->override_changed = FIELD_GET(NSP_ETH_STATE_OVRD_CHNG, state);
190 dst->aneg = FIELD_GET(NSP_ETH_STATE_ANEG, state);
192 if (nfp_nsp_get_abi_ver_minor(nsp) < 22)
195 fec = FIELD_GET(NSP_ETH_PORT_FEC_SUPP_BASER, port);
196 dst->fec_modes_supported |= fec << NFP_FEC_BASER_BIT;
197 fec = FIELD_GET(NSP_ETH_PORT_FEC_SUPP_RS, port);
198 dst->fec_modes_supported |= fec << NFP_FEC_REED_SOLOMON_BIT;
199 if (dst->fec_modes_supported)
200 dst->fec_modes_supported |= NFP_FEC_AUTO | NFP_FEC_DISABLED;
202 dst->fec = 1 << FIELD_GET(NSP_ETH_STATE_FEC, state);
206 nfp_eth_calc_port_geometry(struct nfp_cpp *cpp, struct nfp_eth_table *table)
210 for (i = 0; i < table->count; i++) {
211 table->max_index = max(table->max_index, table->ports[i].index);
213 for (j = 0; j < table->count; j++) {
214 if (table->ports[i].label_port !=
215 table->ports[j].label_port)
217 table->ports[i].port_lanes += table->ports[j].lanes;
221 if (table->ports[i].label_subport ==
222 table->ports[j].label_subport)
224 "Port %d subport %d is a duplicate\n",
225 table->ports[i].label_port,
226 table->ports[i].label_subport);
228 table->ports[i].is_split = true;
234 nfp_eth_calc_port_type(struct nfp_cpp *cpp, struct nfp_eth_table_port *entry)
236 if (entry->interface == NFP_INTERFACE_NONE) {
237 entry->port_type = PORT_NONE;
241 if (entry->media == NFP_MEDIA_FIBRE)
242 entry->port_type = PORT_FIBRE;
244 entry->port_type = PORT_DA;
248 * nfp_eth_read_ports() - retrieve port information
249 * @cpp: NFP CPP handle
251 * Read the port information from the device. Returned structure should
252 * be freed with kfree() once no longer needed.
254 * Return: populated ETH table or NULL on error.
256 struct nfp_eth_table *nfp_eth_read_ports(struct nfp_cpp *cpp)
258 struct nfp_eth_table *ret;
261 nsp = nfp_nsp_open(cpp);
265 ret = __nfp_eth_read_ports(cpp, nsp);
271 struct nfp_eth_table *
272 __nfp_eth_read_ports(struct nfp_cpp *cpp, struct nfp_nsp *nsp)
274 union eth_table_entry *entries;
275 struct nfp_eth_table *table;
276 int i, j, ret, cnt = 0;
278 entries = kzalloc(NSP_ETH_TABLE_SIZE, GFP_KERNEL);
282 ret = nfp_nsp_read_eth_table(nsp, entries, NSP_ETH_TABLE_SIZE);
284 nfp_err(cpp, "reading port table failed %d\n", ret);
288 for (i = 0; i < NSP_ETH_MAX_COUNT; i++)
289 if (entries[i].port & NSP_ETH_PORT_LANES_MASK)
292 /* Some versions of flash will give us 0 instead of port count.
293 * For those that give a port count, verify it against the value
296 if (ret && ret != cnt) {
297 nfp_err(cpp, "table entry count reported (%d) does not match entries present (%d)\n",
302 table = kzalloc(sizeof(*table) +
303 sizeof(struct nfp_eth_table_port) * cnt, GFP_KERNEL);
308 for (i = 0, j = 0; i < NSP_ETH_MAX_COUNT; i++)
309 if (entries[i].port & NSP_ETH_PORT_LANES_MASK)
310 nfp_eth_port_translate(nsp, &entries[i], i,
313 nfp_eth_calc_port_geometry(cpp, table);
314 for (i = 0; i < table->count; i++)
315 nfp_eth_calc_port_type(cpp, &table->ports[i]);
326 struct nfp_nsp *nfp_eth_config_start(struct nfp_cpp *cpp, unsigned int idx)
328 union eth_table_entry *entries;
332 entries = kzalloc(NSP_ETH_TABLE_SIZE, GFP_KERNEL);
334 return ERR_PTR(-ENOMEM);
336 nsp = nfp_nsp_open(cpp);
342 ret = nfp_nsp_read_eth_table(nsp, entries, NSP_ETH_TABLE_SIZE);
344 nfp_err(cpp, "reading port table failed %d\n", ret);
348 if (!(entries[idx].port & NSP_ETH_PORT_LANES_MASK)) {
349 nfp_warn(cpp, "trying to set port state on disabled port %d\n",
354 nfp_nsp_config_set_state(nsp, entries, idx);
360 return ERR_PTR(-EIO);
363 void nfp_eth_config_cleanup_end(struct nfp_nsp *nsp)
365 union eth_table_entry *entries = nfp_nsp_config_entries(nsp);
367 nfp_nsp_config_set_modified(nsp, false);
368 nfp_nsp_config_clear_state(nsp);
374 * nfp_eth_config_commit_end() - perform recorded configuration changes
375 * @nsp: NFP NSP handle returned from nfp_eth_config_start()
377 * Perform the configuration which was requested with __nfp_eth_set_*()
378 * helpers and recorded in @nsp state. If device was already configured
379 * as requested or no __nfp_eth_set_*() operations were made no NSP command
383 * 0 - configuration successful;
384 * 1 - no changes were needed;
385 * -ERRNO - configuration failed.
387 int nfp_eth_config_commit_end(struct nfp_nsp *nsp)
389 union eth_table_entry *entries = nfp_nsp_config_entries(nsp);
392 if (nfp_nsp_config_modified(nsp)) {
393 ret = nfp_nsp_write_eth_table(nsp, entries, NSP_ETH_TABLE_SIZE);
394 ret = ret < 0 ? ret : 0;
397 nfp_eth_config_cleanup_end(nsp);
403 * nfp_eth_set_mod_enable() - set PHY module enable control bit
404 * @cpp: NFP CPP handle
405 * @idx: NFP chip-wide port index
406 * @enable: Desired state
408 * Enable or disable PHY module (this usually means setting the TX lanes
412 * 0 - configuration successful;
413 * 1 - no changes were needed;
414 * -ERRNO - configuration failed.
416 int nfp_eth_set_mod_enable(struct nfp_cpp *cpp, unsigned int idx, bool enable)
418 union eth_table_entry *entries;
422 nsp = nfp_eth_config_start(cpp, idx);
426 entries = nfp_nsp_config_entries(nsp);
428 /* Check if we are already in requested state */
429 reg = le64_to_cpu(entries[idx].state);
430 if (enable != FIELD_GET(NSP_ETH_CTRL_ENABLED, reg)) {
431 reg = le64_to_cpu(entries[idx].control);
432 reg &= ~NSP_ETH_CTRL_ENABLED;
433 reg |= FIELD_PREP(NSP_ETH_CTRL_ENABLED, enable);
434 entries[idx].control = cpu_to_le64(reg);
436 nfp_nsp_config_set_modified(nsp, true);
439 return nfp_eth_config_commit_end(nsp);
443 * nfp_eth_set_configured() - set PHY module configured control bit
444 * @cpp: NFP CPP handle
445 * @idx: NFP chip-wide port index
446 * @configed: Desired state
448 * Set the ifup/ifdown state on the PHY.
451 * 0 - configuration successful;
452 * 1 - no changes were needed;
453 * -ERRNO - configuration failed.
455 int nfp_eth_set_configured(struct nfp_cpp *cpp, unsigned int idx, bool configed)
457 union eth_table_entry *entries;
461 nsp = nfp_eth_config_start(cpp, idx);
465 /* Older ABI versions did support this feature, however this has only
466 * been reliable since ABI 20.
468 if (nfp_nsp_get_abi_ver_minor(nsp) < 20) {
469 nfp_eth_config_cleanup_end(nsp);
473 entries = nfp_nsp_config_entries(nsp);
475 /* Check if we are already in requested state */
476 reg = le64_to_cpu(entries[idx].state);
477 if (configed != FIELD_GET(NSP_ETH_STATE_CONFIGURED, reg)) {
478 reg = le64_to_cpu(entries[idx].control);
479 reg &= ~NSP_ETH_CTRL_CONFIGURED;
480 reg |= FIELD_PREP(NSP_ETH_CTRL_CONFIGURED, configed);
481 entries[idx].control = cpu_to_le64(reg);
483 nfp_nsp_config_set_modified(nsp, true);
486 return nfp_eth_config_commit_end(nsp);
490 nfp_eth_set_bit_config(struct nfp_nsp *nsp, unsigned int raw_idx,
491 const u64 mask, const unsigned int shift,
492 unsigned int val, const u64 ctrl_bit)
494 union eth_table_entry *entries = nfp_nsp_config_entries(nsp);
495 unsigned int idx = nfp_nsp_config_idx(nsp);
498 /* Note: set features were added in ABI 0.14 but the error
499 * codes were initially not populated correctly.
501 if (nfp_nsp_get_abi_ver_minor(nsp) < 17) {
502 nfp_err(nfp_nsp_cpp(nsp),
503 "set operations not supported, please update flash\n");
507 /* Check if we are already in requested state */
508 reg = le64_to_cpu(entries[idx].raw[raw_idx]);
509 if (val == (reg & mask) >> shift)
513 reg |= (val << shift) & mask;
514 entries[idx].raw[raw_idx] = cpu_to_le64(reg);
516 entries[idx].control |= cpu_to_le64(ctrl_bit);
518 nfp_nsp_config_set_modified(nsp, true);
523 #define NFP_ETH_SET_BIT_CONFIG(nsp, raw_idx, mask, val, ctrl_bit) \
525 __BF_FIELD_CHECK(mask, 0ULL, val, "NFP_ETH_SET_BIT_CONFIG: "); \
526 nfp_eth_set_bit_config(nsp, raw_idx, mask, __bf_shf(mask), \
531 * __nfp_eth_set_aneg() - set PHY autonegotiation control bit
532 * @nsp: NFP NSP handle returned from nfp_eth_config_start()
533 * @mode: Desired autonegotiation mode
535 * Allow/disallow PHY module to advertise/perform autonegotiation.
536 * Will write to hwinfo overrides in the flash (persistent config).
538 * Return: 0 or -ERRNO.
540 int __nfp_eth_set_aneg(struct nfp_nsp *nsp, enum nfp_eth_aneg mode)
542 return NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_STATE,
543 NSP_ETH_STATE_ANEG, mode,
544 NSP_ETH_CTRL_SET_ANEG);
548 * __nfp_eth_set_fec() - set PHY forward error correction control bit
549 * @nsp: NFP NSP handle returned from nfp_eth_config_start()
550 * @mode: Desired fec mode
552 * Set the PHY module forward error correction mode.
553 * Will write to hwinfo overrides in the flash (persistent config).
555 * Return: 0 or -ERRNO.
557 static int __nfp_eth_set_fec(struct nfp_nsp *nsp, enum nfp_eth_fec mode)
559 return NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_STATE,
560 NSP_ETH_STATE_FEC, mode,
561 NSP_ETH_CTRL_SET_FEC);
565 * nfp_eth_set_fec() - set PHY forward error correction control mode
566 * @cpp: NFP CPP handle
567 * @idx: NFP chip-wide port index
568 * @mode: Desired fec mode
571 * 0 - configuration successful;
572 * 1 - no changes were needed;
573 * -ERRNO - configuration failed.
576 nfp_eth_set_fec(struct nfp_cpp *cpp, unsigned int idx, enum nfp_eth_fec mode)
581 nsp = nfp_eth_config_start(cpp, idx);
585 err = __nfp_eth_set_fec(nsp, mode);
587 nfp_eth_config_cleanup_end(nsp);
591 return nfp_eth_config_commit_end(nsp);
595 * __nfp_eth_set_speed() - set interface speed/rate
596 * @nsp: NFP NSP handle returned from nfp_eth_config_start()
597 * @speed: Desired speed (per lane)
599 * Set lane speed. Provided @speed value should be subport speed divided
600 * by number of lanes this subport is spanning (i.e. 10000 for 40G, 25000 for
602 * Will write to hwinfo overrides in the flash (persistent config).
604 * Return: 0 or -ERRNO.
606 int __nfp_eth_set_speed(struct nfp_nsp *nsp, unsigned int speed)
608 enum nfp_eth_rate rate;
610 rate = nfp_eth_speed2rate(speed);
611 if (rate == RATE_INVALID) {
612 nfp_warn(nfp_nsp_cpp(nsp),
613 "could not find matching lane rate for speed %u\n",
618 return NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_STATE,
619 NSP_ETH_STATE_RATE, rate,
620 NSP_ETH_CTRL_SET_RATE);
624 * __nfp_eth_set_split() - set interface lane split
625 * @nsp: NFP NSP handle returned from nfp_eth_config_start()
626 * @lanes: Desired lanes per port
628 * Set number of lanes in the port.
629 * Will write to hwinfo overrides in the flash (persistent config).
631 * Return: 0 or -ERRNO.
633 int __nfp_eth_set_split(struct nfp_nsp *nsp, unsigned int lanes)
635 return NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_PORT, NSP_ETH_PORT_LANES,
636 lanes, NSP_ETH_CTRL_SET_LANES);