drivers/net/ethernet/mscc/ocelot_vcap.c

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /* Microsemi Ocelot Switch driver
   3  * Copyright (c) 2019 Microsemi Corporation
   4  */
   5
   6 #include <linux/iopoll.h>
   7 #include <linux/proc_fs.h>
   8
   9 #include <soc/mscc/ocelot_vcap.h>
  10 #include "ocelot_police.h"
  11 #include "ocelot_vcap.h"
  12
  13 #define ENTRY_WIDTH 32
  14
  15 enum vcap_sel {
  16         VCAP_SEL_ENTRY = 0x1,
  17         VCAP_SEL_ACTION = 0x2,
  18         VCAP_SEL_COUNTER = 0x4,
  19         VCAP_SEL_ALL = 0x7,
  20 };
  21
  22 enum vcap_cmd {
  23         VCAP_CMD_WRITE = 0, /* Copy from Cache to TCAM */
  24         VCAP_CMD_READ = 1, /* Copy from TCAM to Cache */
  25         VCAP_CMD_MOVE_UP = 2, /* Move <count> up */
  26         VCAP_CMD_MOVE_DOWN = 3, /* Move <count> down */
  27         VCAP_CMD_INITIALIZE = 4, /* Write all (from cache) */
  28 };
  29
  30 #define VCAP_ENTRY_WIDTH 12 /* Max entry width (32bit words) */
  31 #define VCAP_COUNTER_WIDTH 4 /* Max counter width (32bit words) */
  32
  33 struct vcap_data {
  34         u32 entry[VCAP_ENTRY_WIDTH]; /* ENTRY_DAT */
  35         u32 mask[VCAP_ENTRY_WIDTH]; /* MASK_DAT */
  36         u32 action[VCAP_ENTRY_WIDTH]; /* ACTION_DAT */
  37         u32 counter[VCAP_COUNTER_WIDTH]; /* CNT_DAT */
  38         u32 tg; /* TG_DAT */
  39         u32 type; /* Action type */
  40         u32 tg_sw; /* Current type-group */
  41         u32 cnt; /* Current counter */
  42         u32 key_offset; /* Current entry offset */
  43         u32 action_offset; /* Current action offset */
  44         u32 counter_offset; /* Current counter offset */
  45         u32 tg_value; /* Current type-group value */
  46         u32 tg_mask; /* Current type-group mask */
  47 };
  48
  49 static u32 vcap_read_update_ctrl(struct ocelot *ocelot,
  50                                  const struct vcap_props *vcap)
  51 {
  52         return ocelot_target_read(ocelot, vcap->target, VCAP_CORE_UPDATE_CTRL);
  53 }
  54
  55 static void vcap_cmd(struct ocelot *ocelot, const struct vcap_props *vcap,
  56                      u16 ix, int cmd, int sel)
  57 {
  58         u32 value = (VCAP_CORE_UPDATE_CTRL_UPDATE_CMD(cmd) |
  59                      VCAP_CORE_UPDATE_CTRL_UPDATE_ADDR(ix) |
  60                      VCAP_CORE_UPDATE_CTRL_UPDATE_SHOT);
  61
  62         if ((sel & VCAP_SEL_ENTRY) && ix >= vcap->entry_count)
  63                 return;
  64
  65         if (!(sel & VCAP_SEL_ENTRY))
  66                 value |= VCAP_CORE_UPDATE_CTRL_UPDATE_ENTRY_DIS;
  67
  68         if (!(sel & VCAP_SEL_ACTION))
  69                 value |= VCAP_CORE_UPDATE_CTRL_UPDATE_ACTION_DIS;
  70
  71         if (!(sel & VCAP_SEL_COUNTER))
  72                 value |= VCAP_CORE_UPDATE_CTRL_UPDATE_CNT_DIS;
  73
  74         ocelot_target_write(ocelot, vcap->target, value, VCAP_CORE_UPDATE_CTRL);
  75
  76         read_poll_timeout(vcap_read_update_ctrl, value,
  77                           (value & VCAP_CORE_UPDATE_CTRL_UPDATE_SHOT) == 0,
  78                           10, 100000, false, ocelot, vcap);
  79 }
  80
  81 /* Convert from 0-based row to VCAP entry row and run command */
  82 static void vcap_row_cmd(struct ocelot *ocelot, const struct vcap_props *vcap,
  83                          u32 row, int cmd, int sel)
  84 {
  85         vcap_cmd(ocelot, vcap, vcap->entry_count - row - 1, cmd, sel);
  86 }
  87
  88 static void vcap_entry2cache(struct ocelot *ocelot,
  89                              const struct vcap_props *vcap,
  90                              struct vcap_data *data)
  91 {
  92         u32 entry_words, i;
  93
  94         entry_words = DIV_ROUND_UP(vcap->entry_width, ENTRY_WIDTH);
  95
  96         for (i = 0; i < entry_words; i++) {
  97                 ocelot_target_write_rix(ocelot, vcap->target, data->entry[i],
  98                                         VCAP_CACHE_ENTRY_DAT, i);
  99                 ocelot_target_write_rix(ocelot, vcap->target, ~data->mask[i],
 100                                         VCAP_CACHE_MASK_DAT, i);
 101         }
 102         ocelot_target_write(ocelot, vcap->target, data->tg, VCAP_CACHE_TG_DAT);
 103 }
 104
 105 static void vcap_cache2entry(struct ocelot *ocelot,
 106                              const struct vcap_props *vcap,
 107                              struct vcap_data *data)
 108 {
 109         u32 entry_words, i;
 110
 111         entry_words = DIV_ROUND_UP(vcap->entry_width, ENTRY_WIDTH);
 112
 113         for (i = 0; i < entry_words; i++) {
 114                 data->entry[i] = ocelot_target_read_rix(ocelot, vcap->target,
 115                                                         VCAP_CACHE_ENTRY_DAT, i);
 116                 // Invert mask
 117                 data->mask[i] = ~ocelot_target_read_rix(ocelot, vcap->target,
 118                                                         VCAP_CACHE_MASK_DAT, i);
 119         }
 120         data->tg = ocelot_target_read(ocelot, vcap->target, VCAP_CACHE_TG_DAT);
 121 }
 122
 123 static void vcap_action2cache(struct ocelot *ocelot,
 124                               const struct vcap_props *vcap,
 125                               struct vcap_data *data)
 126 {
 127         u32 action_words, mask;
 128         int i, width;
 129
 130         /* Encode action type */
 131         width = vcap->action_type_width;
 132         if (width) {
 133                 mask = GENMASK(width, 0);
 134                 data->action[0] = ((data->action[0] & ~mask) | data->type);
 135         }
 136
 137         action_words = DIV_ROUND_UP(vcap->action_width, ENTRY_WIDTH);
 138
 139         for (i = 0; i < action_words; i++)
 140                 ocelot_target_write_rix(ocelot, vcap->target, data->action[i],
 141                                         VCAP_CACHE_ACTION_DAT, i);
 142
 143         for (i = 0; i < vcap->counter_words; i++)
 144                 ocelot_target_write_rix(ocelot, vcap->target, data->counter[i],
 145                                         VCAP_CACHE_CNT_DAT, i);
 146 }
 147
 148 static void vcap_cache2action(struct ocelot *ocelot,
 149                               const struct vcap_props *vcap,
 150                               struct vcap_data *data)
 151 {
 152         u32 action_words;
 153         int i, width;
 154
 155         action_words = DIV_ROUND_UP(vcap->action_width, ENTRY_WIDTH);
 156
 157         for (i = 0; i < action_words; i++)
 158                 data->action[i] = ocelot_target_read_rix(ocelot, vcap->target,
 159                                                          VCAP_CACHE_ACTION_DAT,
 160                                                          i);
 161
 162         for (i = 0; i < vcap->counter_words; i++)
 163                 data->counter[i] = ocelot_target_read_rix(ocelot, vcap->target,
 164                                                           VCAP_CACHE_CNT_DAT,
 165                                                           i);
 166
 167         /* Extract action type */
 168         width = vcap->action_type_width;
 169         data->type = (width ? (data->action[0] & GENMASK(width, 0)) : 0);
 170 }
 171
 172 /* Calculate offsets for entry */
 173 static void vcap_data_offset_get(const struct vcap_props *vcap,
 174                                  struct vcap_data *data, int ix)
 175 {
 176         int num_subwords_per_entry, num_subwords_per_action;
 177         int i, col, offset, num_entries_per_row, base;
 178         u32 width = vcap->tg_width;
 179
 180         switch (data->tg_sw) {
 181         case VCAP_TG_FULL:
 182                 num_entries_per_row = 1;
 183                 break;
 184         case VCAP_TG_HALF:
 185                 num_entries_per_row = 2;
 186                 break;
 187         case VCAP_TG_QUARTER:
 188                 num_entries_per_row = 4;
 189                 break;
 190         default:
 191                 return;
 192         }
 193
 194         col = (ix % num_entries_per_row);
 195         num_subwords_per_entry = (vcap->sw_count / num_entries_per_row);
 196         base = (vcap->sw_count - col * num_subwords_per_entry -
 197                 num_subwords_per_entry);
 198         data->tg_value = 0;
 199         data->tg_mask = 0;
 200         for (i = 0; i < num_subwords_per_entry; i++) {
 201                 offset = ((base + i) * width);
 202                 data->tg_value |= (data->tg_sw << offset);
 203                 data->tg_mask |= GENMASK(offset + width - 1, offset);
 204         }
 205
 206         /* Calculate key/action/counter offsets */
 207         col = (num_entries_per_row - col - 1);
 208         data->key_offset = (base * vcap->entry_width) / vcap->sw_count;
 209         data->counter_offset = (num_subwords_per_entry * col *
 210                                 vcap->counter_width);
 211         i = data->type;
 212         width = vcap->action_table[i].width;
 213         num_subwords_per_action = vcap->action_table[i].count;
 214         data->action_offset = ((num_subwords_per_action * col * width) /
 215                                 num_entries_per_row);
 216         data->action_offset += vcap->action_type_width;
 217 }
 218
 219 static void vcap_data_set(u32 *data, u32 offset, u32 len, u32 value)
 220 {
 221         u32 i, v, m;
 222
 223         for (i = 0; i < len; i++, offset++) {
 224                 v = data[offset / ENTRY_WIDTH];
 225                 m = (1 << (offset % ENTRY_WIDTH));
 226                 if (value & (1 << i))
 227                         v |= m;
 228                 else
 229                         v &= ~m;
 230                 data[offset / ENTRY_WIDTH] = v;
 231         }
 232 }
 233
 234 static u32 vcap_data_get(u32 *data, u32 offset, u32 len)
 235 {
 236         u32 i, v, m, value = 0;
 237
 238         for (i = 0; i < len; i++, offset++) {
 239                 v = data[offset / ENTRY_WIDTH];
 240                 m = (1 << (offset % ENTRY_WIDTH));
 241                 if (v & m)
 242                         value |= (1 << i);
 243         }
 244         return value;
 245 }
 246
 247 static void vcap_key_field_set(struct vcap_data *data, u32 offset, u32 width,
 248                                u32 value, u32 mask)
 249 {
 250         vcap_data_set(data->entry, offset + data->key_offset, width, value);
 251         vcap_data_set(data->mask, offset + data->key_offset, width, mask);
 252 }
 253
 254 static void vcap_key_set(const struct vcap_props *vcap, struct vcap_data *data,
 255                          int field, u32 value, u32 mask)
 256 {
 257         u32 offset = vcap->keys[field].offset;
 258         u32 length = vcap->keys[field].length;
 259
 260         vcap_key_field_set(data, offset, length, value, mask);
 261 }
 262
 263 static void vcap_key_bytes_set(const struct vcap_props *vcap,
 264                                struct vcap_data *data, int field,
 265                                u8 *val, u8 *msk)
 266 {
 267         u32 offset = vcap->keys[field].offset;
 268         u32 count  = vcap->keys[field].length;
 269         u32 i, j, n = 0, value = 0, mask = 0;
 270
 271         WARN_ON(count % 8);
 272
 273         /* Data wider than 32 bits are split up in chunks of maximum 32 bits.
 274          * The 32 LSB of the data are written to the 32 MSB of the TCAM.
 275          */
 276         offset += count;
 277         count /= 8;
 278
 279         for (i = 0; i < count; i++) {
 280                 j = (count - i - 1);
 281                 value += (val[j] << n);
 282                 mask += (msk[j] << n);
 283                 n += 8;
 284                 if (n == ENTRY_WIDTH || (i + 1) == count) {
 285                         offset -= n;
 286                         vcap_key_field_set(data, offset, n, value, mask);
 287                         n = 0;
 288                         value = 0;
 289                         mask = 0;
 290                 }
 291         }
 292 }
 293
 294 static void vcap_key_l4_port_set(const struct vcap_props *vcap,
 295                                  struct vcap_data *data, int field,
 296                                  struct ocelot_vcap_udp_tcp *port)
 297 {
 298         u32 offset = vcap->keys[field].offset;
 299         u32 length = vcap->keys[field].length;
 300
 301         WARN_ON(length != 16);
 302
 303         vcap_key_field_set(data, offset, length, port->value, port->mask);
 304 }
 305
 306 static void vcap_key_bit_set(const struct vcap_props *vcap,
 307                              struct vcap_data *data, int field,
 308                              enum ocelot_vcap_bit val)
 309 {
 310         u32 value = (val == OCELOT_VCAP_BIT_1 ? 1 : 0);
 311         u32 msk = (val == OCELOT_VCAP_BIT_ANY ? 0 : 1);
 312         u32 offset = vcap->keys[field].offset;
 313         u32 length = vcap->keys[field].length;
 314
 315         WARN_ON(length != 1);
 316
 317         vcap_key_field_set(data, offset, length, value, msk);
 318 }
 319
 320 static void vcap_action_set(const struct vcap_props *vcap,
 321                             struct vcap_data *data, int field, u32 value)
 322 {
 323         int offset = vcap->actions[field].offset;
 324         int length = vcap->actions[field].length;
 325
 326         vcap_data_set(data->action, offset + data->action_offset, length,
 327                       value);
 328 }
 329
 330 static void is2_action_set(struct ocelot *ocelot, struct vcap_data *data,
 331                            struct ocelot_vcap_filter *filter)
 332 {
 333         const struct vcap_props *vcap = &ocelot->vcap[VCAP_IS2];
 334         struct ocelot_vcap_action *a = &filter->action;
 335
 336         vcap_action_set(vcap, data, VCAP_IS2_ACT_MASK_MODE, a->mask_mode);
 337         vcap_action_set(vcap, data, VCAP_IS2_ACT_PORT_MASK, a->port_mask);
 338         vcap_action_set(vcap, data, VCAP_IS2_ACT_POLICE_ENA, a->police_ena);
 339         vcap_action_set(vcap, data, VCAP_IS2_ACT_POLICE_IDX, a->pol_ix);
 340         vcap_action_set(vcap, data, VCAP_IS2_ACT_CPU_QU_NUM, a->cpu_qu_num);
 341         vcap_action_set(vcap, data, VCAP_IS2_ACT_CPU_COPY_ENA, a->cpu_copy_ena);
 342 }
 343
 344 static void is2_entry_set(struct ocelot *ocelot, int ix,
 345                           struct ocelot_vcap_filter *filter)
 346 {
 347         const struct vcap_props *vcap = &ocelot->vcap[VCAP_IS2];
 348         struct ocelot_vcap_key_vlan *tag = &filter->vlan;
 349         u32 val, msk, type, type_mask = 0xf, i, count;
 350         struct ocelot_vcap_u64 payload;
 351         struct vcap_data data;
 352         int row = (ix / 2);
 353
 354         memset(&payload, 0, sizeof(payload));
 355         memset(&data, 0, sizeof(data));
 356
 357         /* Read row */
 358         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_READ, VCAP_SEL_ALL);
 359         vcap_cache2entry(ocelot, vcap, &data);
 360         vcap_cache2action(ocelot, vcap, &data);
 361
 362         data.tg_sw = VCAP_TG_HALF;
 363         vcap_data_offset_get(vcap, &data, ix);
 364         data.tg = (data.tg & ~data.tg_mask);
 365         if (filter->prio != 0)
 366                 data.tg |= data.tg_value;
 367
 368         data.type = IS2_ACTION_TYPE_NORMAL;
 369
 370         vcap_key_set(vcap, &data, VCAP_IS2_HK_PAG, filter->pag, 0xff);
 371         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_FIRST,
 372                          (filter->lookup == 0) ? OCELOT_VCAP_BIT_1 :
 373                          OCELOT_VCAP_BIT_0);
 374         vcap_key_set(vcap, &data, VCAP_IS2_HK_IGR_PORT_MASK, 0,
 375                      ~filter->ingress_port_mask);
 376         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_HOST_MATCH,
 377                          OCELOT_VCAP_BIT_ANY);
 378         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L2_MC, filter->dmac_mc);
 379         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L2_BC, filter->dmac_bc);
 380         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_VLAN_TAGGED, tag->tagged);
 381         vcap_key_set(vcap, &data, VCAP_IS2_HK_VID,
 382                      tag->vid.value, tag->vid.mask);
 383         vcap_key_set(vcap, &data, VCAP_IS2_HK_PCP,
 384                      tag->pcp.value[0], tag->pcp.mask[0]);
 385         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_DEI, tag->dei);
 386
 387         switch (filter->key_type) {
 388         case OCELOT_VCAP_KEY_ETYPE: {
 389                 struct ocelot_vcap_key_etype *etype = &filter->key.etype;
 390
 391                 type = IS2_TYPE_ETYPE;
 392                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_DMAC,
 393                                    etype->dmac.value, etype->dmac.mask);
 394                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_SMAC,
 395                                    etype->smac.value, etype->smac.mask);
 396                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_MAC_ETYPE_ETYPE,
 397                                    etype->etype.value, etype->etype.mask);
 398                 /* Clear unused bits */
 399                 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD0,
 400                              0, 0);
 401                 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD1,
 402                              0, 0);
 403                 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD2,
 404                              0, 0);
 405                 vcap_key_bytes_set(vcap, &data,
 406                                    VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD0,
 407                                    etype->data.value, etype->data.mask);
 408                 break;
 409         }
 410         case OCELOT_VCAP_KEY_LLC: {
 411                 struct ocelot_vcap_key_llc *llc = &filter->key.llc;
 412
 413                 type = IS2_TYPE_LLC;
 414                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_DMAC,
 415                                    llc->dmac.value, llc->dmac.mask);
 416                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_SMAC,
 417                                    llc->smac.value, llc->smac.mask);
 418                 for (i = 0; i < 4; i++) {
 419                         payload.value[i] = llc->llc.value[i];
 420                         payload.mask[i] = llc->llc.mask[i];
 421                 }
 422                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_MAC_LLC_L2_LLC,
 423                                    payload.value, payload.mask);
 424                 break;
 425         }
 426         case OCELOT_VCAP_KEY_SNAP: {
 427                 struct ocelot_vcap_key_snap *snap = &filter->key.snap;
 428
 429                 type = IS2_TYPE_SNAP;
 430                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_DMAC,
 431                                    snap->dmac.value, snap->dmac.mask);
 432                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_SMAC,
 433                                    snap->smac.value, snap->smac.mask);
 434                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_MAC_SNAP_L2_SNAP,
 435                                    filter->key.snap.snap.value,
 436                                    filter->key.snap.snap.mask);
 437                 break;
 438         }
 439         case OCELOT_VCAP_KEY_ARP: {
 440                 struct ocelot_vcap_key_arp *arp = &filter->key.arp;
 441
 442                 type = IS2_TYPE_ARP;
 443                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_MAC_ARP_SMAC,
 444                                    arp->smac.value, arp->smac.mask);
 445                 vcap_key_bit_set(vcap, &data,
 446                                  VCAP_IS2_HK_MAC_ARP_ADDR_SPACE_OK,
 447                                  arp->ethernet);
 448                 vcap_key_bit_set(vcap, &data,
 449                                  VCAP_IS2_HK_MAC_ARP_PROTO_SPACE_OK,
 450                                  arp->ip);
 451                 vcap_key_bit_set(vcap, &data,
 452                                  VCAP_IS2_HK_MAC_ARP_LEN_OK,
 453                                  arp->length);
 454                 vcap_key_bit_set(vcap, &data,
 455                                  VCAP_IS2_HK_MAC_ARP_TARGET_MATCH,
 456                                  arp->dmac_match);
 457                 vcap_key_bit_set(vcap, &data,
 458                                  VCAP_IS2_HK_MAC_ARP_SENDER_MATCH,
 459                                  arp->smac_match);
 460                 vcap_key_bit_set(vcap, &data,
 461                                  VCAP_IS2_HK_MAC_ARP_OPCODE_UNKNOWN,
 462                                  arp->unknown);
 463
 464                 /* OPCODE is inverse, bit 0 is reply flag, bit 1 is RARP flag */
 465                 val = ((arp->req == OCELOT_VCAP_BIT_0 ? 1 : 0) |
 466                        (arp->arp == OCELOT_VCAP_BIT_0 ? 2 : 0));
 467                 msk = ((arp->req == OCELOT_VCAP_BIT_ANY ? 0 : 1) |
 468                        (arp->arp == OCELOT_VCAP_BIT_ANY ? 0 : 2));
 469                 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ARP_OPCODE,
 470                              val, msk);
 471                 vcap_key_bytes_set(vcap, &data,
 472                                    VCAP_IS2_HK_MAC_ARP_L3_IP4_DIP,
 473                                    arp->dip.value.addr, arp->dip.mask.addr);
 474                 vcap_key_bytes_set(vcap, &data,
 475                                    VCAP_IS2_HK_MAC_ARP_L3_IP4_SIP,
 476                                    arp->sip.value.addr, arp->sip.mask.addr);
 477                 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ARP_DIP_EQ_SIP,
 478                              0, 0);
 479                 break;
 480         }
 481         case OCELOT_VCAP_KEY_IPV4:
 482         case OCELOT_VCAP_KEY_IPV6: {
 483                 enum ocelot_vcap_bit sip_eq_dip, sport_eq_dport, seq_zero, tcp;
 484                 enum ocelot_vcap_bit ttl, fragment, options, tcp_ack, tcp_urg;
 485                 enum ocelot_vcap_bit tcp_fin, tcp_syn, tcp_rst, tcp_psh;
 486                 struct ocelot_vcap_key_ipv4 *ipv4 = NULL;
 487                 struct ocelot_vcap_key_ipv6 *ipv6 = NULL;
 488                 struct ocelot_vcap_udp_tcp *sport, *dport;
 489                 struct ocelot_vcap_ipv4 sip, dip;
 490                 struct ocelot_vcap_u8 proto, ds;
 491                 struct ocelot_vcap_u48 *ip_data;
 492
 493                 if (filter->key_type == OCELOT_VCAP_KEY_IPV4) {
 494                         ipv4 = &filter->key.ipv4;
 495                         ttl = ipv4->ttl;
 496                         fragment = ipv4->fragment;
 497                         options = ipv4->options;
 498                         proto = ipv4->proto;
 499                         ds = ipv4->ds;
 500                         ip_data = &ipv4->data;
 501                         sip = ipv4->sip;
 502                         dip = ipv4->dip;
 503                         sport = &ipv4->sport;
 504                         dport = &ipv4->dport;
 505                         tcp_fin = ipv4->tcp_fin;
 506                         tcp_syn = ipv4->tcp_syn;
 507                         tcp_rst = ipv4->tcp_rst;
 508                         tcp_psh = ipv4->tcp_psh;
 509                         tcp_ack = ipv4->tcp_ack;
 510                         tcp_urg = ipv4->tcp_urg;
 511                         sip_eq_dip = ipv4->sip_eq_dip;
 512                         sport_eq_dport = ipv4->sport_eq_dport;
 513                         seq_zero = ipv4->seq_zero;
 514                 } else {
 515                         ipv6 = &filter->key.ipv6;
 516                         ttl = ipv6->ttl;
 517                         fragment = OCELOT_VCAP_BIT_ANY;
 518                         options = OCELOT_VCAP_BIT_ANY;
 519                         proto = ipv6->proto;
 520                         ds = ipv6->ds;
 521                         ip_data = &ipv6->data;
 522                         for (i = 0; i < 8; i++) {
 523                                 val = ipv6->sip.value[i + 8];
 524                                 msk = ipv6->sip.mask[i + 8];
 525                                 if (i < 4) {
 526                                         dip.value.addr[i] = val;
 527                                         dip.mask.addr[i] = msk;
 528                                 } else {
 529                                         sip.value.addr[i - 4] = val;
 530                                         sip.mask.addr[i - 4] = msk;
 531                                 }
 532                         }
 533                         sport = &ipv6->sport;
 534                         dport = &ipv6->dport;
 535                         tcp_fin = ipv6->tcp_fin;
 536                         tcp_syn = ipv6->tcp_syn;
 537                         tcp_rst = ipv6->tcp_rst;
 538                         tcp_psh = ipv6->tcp_psh;
 539                         tcp_ack = ipv6->tcp_ack;
 540                         tcp_urg = ipv6->tcp_urg;
 541                         sip_eq_dip = ipv6->sip_eq_dip;
 542                         sport_eq_dport = ipv6->sport_eq_dport;
 543                         seq_zero = ipv6->seq_zero;
 544                 }
 545
 546                 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_IP4,
 547                                  ipv4 ? OCELOT_VCAP_BIT_1 : OCELOT_VCAP_BIT_0);
 548                 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L3_FRAGMENT,
 549                                  fragment);
 550                 vcap_key_set(vcap, &data, VCAP_IS2_HK_L3_FRAG_OFS_GT0, 0, 0);
 551                 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L3_OPTIONS,
 552                                  options);
 553                 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_IP4_L3_TTL_GT0,
 554                                  ttl);
 555                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L3_TOS,
 556                                    ds.value, ds.mask);
 557                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L3_IP4_DIP,
 558                                    dip.value.addr, dip.mask.addr);
 559                 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L3_IP4_SIP,
 560                                    sip.value.addr, sip.mask.addr);
 561                 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_DIP_EQ_SIP,
 562                                  sip_eq_dip);
 563                 val = proto.value[0];
 564                 msk = proto.mask[0];
 565                 type = IS2_TYPE_IP_UDP_TCP;
 566                 if (msk == 0xff && (val == 6 || val == 17)) {
 567                         /* UDP/TCP protocol match */
 568                         tcp = (val == 6 ?
 569                                OCELOT_VCAP_BIT_1 : OCELOT_VCAP_BIT_0);
 570                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_TCP, tcp);
 571                         vcap_key_l4_port_set(vcap, &data,
 572                                              VCAP_IS2_HK_L4_DPORT, dport);
 573                         vcap_key_l4_port_set(vcap, &data,
 574                                              VCAP_IS2_HK_L4_SPORT, sport);
 575                         vcap_key_set(vcap, &data, VCAP_IS2_HK_L4_RNG, 0, 0);
 576                         vcap_key_bit_set(vcap, &data,
 577                                          VCAP_IS2_HK_L4_SPORT_EQ_DPORT,
 578                                          sport_eq_dport);
 579                         vcap_key_bit_set(vcap, &data,
 580                                          VCAP_IS2_HK_L4_SEQUENCE_EQ0,
 581                                          seq_zero);
 582                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_FIN,
 583                                          tcp_fin);
 584                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_SYN,
 585                                          tcp_syn);
 586                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_RST,
 587                                          tcp_rst);
 588                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_PSH,
 589                                          tcp_psh);
 590                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_ACK,
 591                                          tcp_ack);
 592                         vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_URG,
 593                                          tcp_urg);
 594                         vcap_key_set(vcap, &data, VCAP_IS2_HK_L4_1588_DOM,
 595                                      0, 0);
 596                         vcap_key_set(vcap, &data, VCAP_IS2_HK_L4_1588_VER,
 597                                      0, 0);
 598                 } else {
 599                         if (msk == 0) {
 600                                 /* Any IP protocol match */
 601                                 type_mask = IS2_TYPE_MASK_IP_ANY;
 602                         } else {
 603                                 /* Non-UDP/TCP protocol match */
 604                                 type = IS2_TYPE_IP_OTHER;
 605                                 for (i = 0; i < 6; i++) {
 606                                         payload.value[i] = ip_data->value[i];
 607                                         payload.mask[i] = ip_data->mask[i];
 608                                 }
 609                         }
 610                         vcap_key_bytes_set(vcap, &data,
 611                                            VCAP_IS2_HK_IP4_L3_PROTO,
 612                                            proto.value, proto.mask);
 613                         vcap_key_bytes_set(vcap, &data,
 614                                            VCAP_IS2_HK_L3_PAYLOAD,
 615                                            payload.value, payload.mask);
 616                 }
 617                 break;
 618         }
 619         case OCELOT_VCAP_KEY_ANY:
 620         default:
 621                 type = 0;
 622                 type_mask = 0;
 623                 count = vcap->entry_width / 2;
 624                 /* Iterate over the non-common part of the key and
 625                  * clear entry data
 626                  */
 627                 for (i = vcap->keys[VCAP_IS2_HK_L2_DMAC].offset;
 628                      i < count; i += ENTRY_WIDTH) {
 629                         vcap_key_field_set(&data, i, min(32u, count - i), 0, 0);
 630                 }
 631                 break;
 632         }
 633
 634         vcap_key_set(vcap, &data, VCAP_IS2_TYPE, type, type_mask);
 635         is2_action_set(ocelot, &data, filter);
 636         vcap_data_set(data.counter, data.counter_offset,
 637                       vcap->counter_width, filter->stats.pkts);
 638
 639         /* Write row */
 640         vcap_entry2cache(ocelot, vcap, &data);
 641         vcap_action2cache(ocelot, vcap, &data);
 642         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_WRITE, VCAP_SEL_ALL);
 643 }
 644
 645 static void is1_action_set(struct ocelot *ocelot, struct vcap_data *data,
 646                            const struct ocelot_vcap_filter *filter)
 647 {
 648         const struct vcap_props *vcap = &ocelot->vcap[VCAP_IS1];
 649         const struct ocelot_vcap_action *a = &filter->action;
 650
 651         vcap_action_set(vcap, data, VCAP_IS1_ACT_VID_REPLACE_ENA,
 652                         a->vid_replace_ena);
 653         vcap_action_set(vcap, data, VCAP_IS1_ACT_VID_ADD_VAL, a->vid);
 654         vcap_action_set(vcap, data, VCAP_IS1_ACT_VLAN_POP_CNT_ENA,
 655                         a->vlan_pop_cnt_ena);
 656         vcap_action_set(vcap, data, VCAP_IS1_ACT_VLAN_POP_CNT,
 657                         a->vlan_pop_cnt);
 658         vcap_action_set(vcap, data, VCAP_IS1_ACT_PCP_DEI_ENA, a->pcp_dei_ena);
 659         vcap_action_set(vcap, data, VCAP_IS1_ACT_PCP_VAL, a->pcp);
 660         vcap_action_set(vcap, data, VCAP_IS1_ACT_DEI_VAL, a->dei);
 661         vcap_action_set(vcap, data, VCAP_IS1_ACT_QOS_ENA, a->qos_ena);
 662         vcap_action_set(vcap, data, VCAP_IS1_ACT_QOS_VAL, a->qos_val);
 663         vcap_action_set(vcap, data, VCAP_IS1_ACT_PAG_OVERRIDE_MASK,
 664                         a->pag_override_mask);
 665         vcap_action_set(vcap, data, VCAP_IS1_ACT_PAG_VAL, a->pag_val);
 666 }
 667
 668 static void is1_entry_set(struct ocelot *ocelot, int ix,
 669                           struct ocelot_vcap_filter *filter)
 670 {
 671         const struct vcap_props *vcap = &ocelot->vcap[VCAP_IS1];
 672         struct ocelot_vcap_key_vlan *tag = &filter->vlan;
 673         struct ocelot_vcap_u64 payload;
 674         struct vcap_data data;
 675         int row = ix / 2;
 676         u32 type;
 677
 678         memset(&payload, 0, sizeof(payload));
 679         memset(&data, 0, sizeof(data));
 680
 681         /* Read row */
 682         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_READ, VCAP_SEL_ALL);
 683         vcap_cache2entry(ocelot, vcap, &data);
 684         vcap_cache2action(ocelot, vcap, &data);
 685
 686         data.tg_sw = VCAP_TG_HALF;
 687         data.type = IS1_ACTION_TYPE_NORMAL;
 688         vcap_data_offset_get(vcap, &data, ix);
 689         data.tg = (data.tg & ~data.tg_mask);
 690         if (filter->prio != 0)
 691                 data.tg |= data.tg_value;
 692
 693         vcap_key_set(vcap, &data, VCAP_IS1_HK_LOOKUP, filter->lookup, 0x3);
 694         vcap_key_set(vcap, &data, VCAP_IS1_HK_IGR_PORT_MASK, 0,
 695                      ~filter->ingress_port_mask);
 696         vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_L2_MC, filter->dmac_mc);
 697         vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_L2_BC, filter->dmac_bc);
 698         vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_VLAN_TAGGED, tag->tagged);
 699         vcap_key_set(vcap, &data, VCAP_IS1_HK_VID,
 700                      tag->vid.value, tag->vid.mask);
 701         vcap_key_set(vcap, &data, VCAP_IS1_HK_PCP,
 702                      tag->pcp.value[0], tag->pcp.mask[0]);
 703         type = IS1_TYPE_S1_NORMAL;
 704
 705         switch (filter->key_type) {
 706         case OCELOT_VCAP_KEY_ETYPE: {
 707                 struct ocelot_vcap_key_etype *etype = &filter->key.etype;
 708
 709                 vcap_key_bytes_set(vcap, &data, VCAP_IS1_HK_L2_SMAC,
 710                                    etype->smac.value, etype->smac.mask);
 711                 vcap_key_bytes_set(vcap, &data, VCAP_IS1_HK_ETYPE,
 712                                    etype->etype.value, etype->etype.mask);
 713                 break;
 714         }
 715         case OCELOT_VCAP_KEY_IPV4: {
 716                 struct ocelot_vcap_key_ipv4 *ipv4 = &filter->key.ipv4;
 717                 struct ocelot_vcap_udp_tcp *sport = &ipv4->sport;
 718                 struct ocelot_vcap_udp_tcp *dport = &ipv4->dport;
 719                 enum ocelot_vcap_bit tcp_udp = OCELOT_VCAP_BIT_0;
 720                 struct ocelot_vcap_u8 proto = ipv4->proto;
 721                 struct ocelot_vcap_ipv4 sip = ipv4->sip;
 722                 u32 val, msk;
 723
 724                 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_IP_SNAP,
 725                                  OCELOT_VCAP_BIT_1);
 726                 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_IP4,
 727                                  OCELOT_VCAP_BIT_1);
 728                 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_ETYPE_LEN,
 729                                  OCELOT_VCAP_BIT_1);
 730                 vcap_key_bytes_set(vcap, &data, VCAP_IS1_HK_L3_IP4_SIP,
 731                                    sip.value.addr, sip.mask.addr);
 732
 733                 val = proto.value[0];
 734                 msk = proto.mask[0];
 735
 736                 if ((val == NEXTHDR_TCP || val == NEXTHDR_UDP) && msk == 0xff)
 737                         tcp_udp = OCELOT_VCAP_BIT_1;
 738                 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_TCP_UDP, tcp_udp);
 739
 740                 if (tcp_udp) {
 741                         enum ocelot_vcap_bit tcp = OCELOT_VCAP_BIT_0;
 742
 743                         if (val == NEXTHDR_TCP)
 744                                 tcp = OCELOT_VCAP_BIT_1;
 745
 746                         vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_TCP, tcp);
 747                         vcap_key_l4_port_set(vcap, &data, VCAP_IS1_HK_L4_SPORT,
 748                                              sport);
 749                         /* Overloaded field */
 750                         vcap_key_l4_port_set(vcap, &data, VCAP_IS1_HK_ETYPE,
 751                                              dport);
 752                 } else {
 753                         /* IPv4 "other" frame */
 754                         struct ocelot_vcap_u16 etype = {0};
 755
 756                         /* Overloaded field */
 757                         etype.value[0] = proto.value[0];
 758                         etype.mask[0] = proto.mask[0];
 759
 760                         vcap_key_bytes_set(vcap, &data, VCAP_IS1_HK_ETYPE,
 761                                            etype.value, etype.mask);
 762                 }
 763         }
 764         default:
 765                 break;
 766         }
 767         vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_TYPE,
 768                          type ? OCELOT_VCAP_BIT_1 : OCELOT_VCAP_BIT_0);
 769
 770         is1_action_set(ocelot, &data, filter);
 771         vcap_data_set(data.counter, data.counter_offset,
 772                       vcap->counter_width, filter->stats.pkts);
 773
 774         /* Write row */
 775         vcap_entry2cache(ocelot, vcap, &data);
 776         vcap_action2cache(ocelot, vcap, &data);
 777         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_WRITE, VCAP_SEL_ALL);
 778 }
 779
 780 static void es0_action_set(struct ocelot *ocelot, struct vcap_data *data,
 781                            const struct ocelot_vcap_filter *filter)
 782 {
 783         const struct vcap_props *vcap = &ocelot->vcap[VCAP_ES0];
 784         const struct ocelot_vcap_action *a = &filter->action;
 785
 786         vcap_action_set(vcap, data, VCAP_ES0_ACT_PUSH_OUTER_TAG,
 787                         a->push_outer_tag);
 788         vcap_action_set(vcap, data, VCAP_ES0_ACT_PUSH_INNER_TAG,
 789                         a->push_inner_tag);
 790         vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_A_TPID_SEL,
 791                         a->tag_a_tpid_sel);
 792         vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_A_VID_SEL,
 793                         a->tag_a_vid_sel);
 794         vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_A_PCP_SEL,
 795                         a->tag_a_pcp_sel);
 796         vcap_action_set(vcap, data, VCAP_ES0_ACT_VID_A_VAL, a->vid_a_val);
 797         vcap_action_set(vcap, data, VCAP_ES0_ACT_PCP_A_VAL, a->pcp_a_val);
 798         vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_B_TPID_SEL,
 799                         a->tag_b_tpid_sel);
 800         vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_B_VID_SEL,
 801                         a->tag_b_vid_sel);
 802         vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_B_PCP_SEL,
 803                         a->tag_b_pcp_sel);
 804         vcap_action_set(vcap, data, VCAP_ES0_ACT_VID_B_VAL, a->vid_b_val);
 805         vcap_action_set(vcap, data, VCAP_ES0_ACT_PCP_B_VAL, a->pcp_b_val);
 806 }
 807
 808 static void es0_entry_set(struct ocelot *ocelot, int ix,
 809                           struct ocelot_vcap_filter *filter)
 810 {
 811         const struct vcap_props *vcap = &ocelot->vcap[VCAP_ES0];
 812         struct ocelot_vcap_key_vlan *tag = &filter->vlan;
 813         struct ocelot_vcap_u64 payload;
 814         struct vcap_data data;
 815         int row = ix;
 816
 817         memset(&payload, 0, sizeof(payload));
 818         memset(&data, 0, sizeof(data));
 819
 820         /* Read row */
 821         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_READ, VCAP_SEL_ALL);
 822         vcap_cache2entry(ocelot, vcap, &data);
 823         vcap_cache2action(ocelot, vcap, &data);
 824
 825         data.tg_sw = VCAP_TG_FULL;
 826         data.type = ES0_ACTION_TYPE_NORMAL;
 827         vcap_data_offset_get(vcap, &data, ix);
 828         data.tg = (data.tg & ~data.tg_mask);
 829         if (filter->prio != 0)
 830                 data.tg |= data.tg_value;
 831
 832         vcap_key_set(vcap, &data, VCAP_ES0_IGR_PORT, filter->ingress_port.value,
 833                      filter->ingress_port.mask);
 834         vcap_key_set(vcap, &data, VCAP_ES0_EGR_PORT, filter->egress_port.value,
 835                      filter->egress_port.mask);
 836         vcap_key_bit_set(vcap, &data, VCAP_ES0_L2_MC, filter->dmac_mc);
 837         vcap_key_bit_set(vcap, &data, VCAP_ES0_L2_BC, filter->dmac_bc);
 838         vcap_key_set(vcap, &data, VCAP_ES0_VID,
 839                      tag->vid.value, tag->vid.mask);
 840         vcap_key_set(vcap, &data, VCAP_ES0_PCP,
 841                      tag->pcp.value[0], tag->pcp.mask[0]);
 842
 843         es0_action_set(ocelot, &data, filter);
 844         vcap_data_set(data.counter, data.counter_offset,
 845                       vcap->counter_width, filter->stats.pkts);
 846
 847         /* Write row */
 848         vcap_entry2cache(ocelot, vcap, &data);
 849         vcap_action2cache(ocelot, vcap, &data);
 850         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_WRITE, VCAP_SEL_ALL);
 851 }
 852
 853 static void vcap_entry_get(struct ocelot *ocelot, int ix,
 854                            struct ocelot_vcap_filter *filter)
 855 {
 856         const struct vcap_props *vcap = &ocelot->vcap[filter->block_id];
 857         struct vcap_data data;
 858         int row, count;
 859         u32 cnt;
 860
 861         if (filter->block_id == VCAP_ES0)
 862                 data.tg_sw = VCAP_TG_FULL;
 863         else
 864                 data.tg_sw = VCAP_TG_HALF;
 865
 866         count = (1 << (data.tg_sw - 1));
 867         row = (ix / count);
 868         vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_READ, VCAP_SEL_COUNTER);
 869         vcap_cache2action(ocelot, vcap, &data);
 870         vcap_data_offset_get(vcap, &data, ix);
 871         cnt = vcap_data_get(data.counter, data.counter_offset,
 872                             vcap->counter_width);
 873
 874         filter->stats.pkts = cnt;
 875 }
 876
 877 static void vcap_entry_set(struct ocelot *ocelot, int ix,
 878                            struct ocelot_vcap_filter *filter)
 879 {
 880         if (filter->block_id == VCAP_IS1)
 881                 return is1_entry_set(ocelot, ix, filter);
 882         if (filter->block_id == VCAP_IS2)
 883                 return is2_entry_set(ocelot, ix, filter);
 884         if (filter->block_id == VCAP_ES0)
 885                 return es0_entry_set(ocelot, ix, filter);
 886 }
 887
 888 static int ocelot_vcap_policer_add(struct ocelot *ocelot, u32 pol_ix,
 889                                    struct ocelot_policer *pol)
 890 {
 891         struct qos_policer_conf pp = { 0 };
 892
 893         if (!pol)
 894                 return -EINVAL;
 895
 896         pp.mode = MSCC_QOS_RATE_MODE_DATA;
 897         pp.pir = pol->rate;
 898         pp.pbs = pol->burst;
 899
 900         return qos_policer_conf_set(ocelot, 0, pol_ix, &pp);
 901 }
 902
 903 static void ocelot_vcap_policer_del(struct ocelot *ocelot,
 904                                     struct ocelot_vcap_block *block,
 905                                     u32 pol_ix)
 906 {
 907         struct ocelot_vcap_filter *filter;
 908         struct qos_policer_conf pp = {0};
 909         int index = -1;
 910
 911         if (pol_ix < block->pol_lpr)
 912                 return;
 913
 914         list_for_each_entry(filter, &block->rules, list) {
 915                 index++;
 916                 if (filter->block_id == VCAP_IS2 &&
 917                     filter->action.police_ena &&
 918                     filter->action.pol_ix < pol_ix) {
 919                         filter->action.pol_ix += 1;
 920                         ocelot_vcap_policer_add(ocelot, filter->action.pol_ix,
 921                                                 &filter->action.pol);
 922                         is2_entry_set(ocelot, index, filter);
 923                 }
 924         }
 925
 926         pp.mode = MSCC_QOS_RATE_MODE_DISABLED;
 927         qos_policer_conf_set(ocelot, 0, pol_ix, &pp);
 928
 929         block->pol_lpr++;
 930 }
 931
 932 static void ocelot_vcap_filter_add_to_block(struct ocelot *ocelot,
 933                                             struct ocelot_vcap_block *block,
 934                                             struct ocelot_vcap_filter *filter)
 935 {
 936         struct ocelot_vcap_filter *tmp;
 937         struct list_head *pos, *n;
 938
 939         if (filter->block_id == VCAP_IS2 && filter->action.police_ena) {
 940                 block->pol_lpr--;
 941                 filter->action.pol_ix = block->pol_lpr;
 942                 ocelot_vcap_policer_add(ocelot, filter->action.pol_ix,
 943                                         &filter->action.pol);
 944         }
 945
 946         block->count++;
 947
 948         if (list_empty(&block->rules)) {
 949                 list_add(&filter->list, &block->rules);
 950                 return;
 951         }
 952
 953         list_for_each_safe(pos, n, &block->rules) {
 954                 tmp = list_entry(pos, struct ocelot_vcap_filter, list);
 955                 if (filter->prio < tmp->prio)
 956                         break;
 957         }
 958         list_add(&filter->list, pos->prev);
 959 }
 960
 961 static int ocelot_vcap_block_get_filter_index(struct ocelot_vcap_block *block,
 962                                               struct ocelot_vcap_filter *filter)
 963 {
 964         struct ocelot_vcap_filter *tmp;
 965         int index = 0;
 966
 967         list_for_each_entry(tmp, &block->rules, list) {
 968                 if (filter->id == tmp->id)
 969                         return index;
 970                 index++;
 971         }
 972
 973         return -ENOENT;
 974 }
 975
 976 static struct ocelot_vcap_filter*
 977 ocelot_vcap_block_find_filter_by_index(struct ocelot_vcap_block *block,
 978                                        int index)
 979 {
 980         struct ocelot_vcap_filter *tmp;
 981         int i = 0;
 982
 983         list_for_each_entry(tmp, &block->rules, list) {
 984                 if (i == index)
 985                         return tmp;
 986                 ++i;
 987         }
 988
 989         return NULL;
 990 }
 991
 992 struct ocelot_vcap_filter *
 993 ocelot_vcap_block_find_filter_by_id(struct ocelot_vcap_block *block, int id)
 994 {
 995         struct ocelot_vcap_filter *filter;
 996
 997         list_for_each_entry(filter, &block->rules, list)
 998                 if (filter->id == id)
 999                         return filter;
1000
1001         return NULL;
1002 }
1003
1004 /* If @on=false, then SNAP, ARP, IP and OAM frames will not match on keys based
1005  * on destination and source MAC addresses, but only on higher-level protocol
1006  * information. The only frame types to match on keys containing MAC addresses
1007  * in this case are non-SNAP, non-ARP, non-IP and non-OAM frames.
1008  *
1009  * If @on=true, then the above frame types (SNAP, ARP, IP and OAM) will match
1010  * on MAC_ETYPE keys such as destination and source MAC on this ingress port.
1011  * However the setting has the side effect of making these frames not matching
1012  * on any _other_ keys than MAC_ETYPE ones.
1013  */
1014 static void ocelot_match_all_as_mac_etype(struct ocelot *ocelot, int port,
1015                                           int lookup, bool on)
1016 {
1017         u32 val = 0;
1018
1019         if (on)
1020                 val = ANA_PORT_VCAP_S2_CFG_S2_SNAP_DIS(BIT(lookup)) |
1021                       ANA_PORT_VCAP_S2_CFG_S2_ARP_DIS(BIT(lookup)) |
1022                       ANA_PORT_VCAP_S2_CFG_S2_IP_TCPUDP_DIS(BIT(lookup)) |
1023                       ANA_PORT_VCAP_S2_CFG_S2_IP_OTHER_DIS(BIT(lookup)) |
1024                       ANA_PORT_VCAP_S2_CFG_S2_OAM_DIS(BIT(lookup));
1025
1026         ocelot_rmw_gix(ocelot, val,
1027                        ANA_PORT_VCAP_S2_CFG_S2_SNAP_DIS(BIT(lookup)) |
1028                        ANA_PORT_VCAP_S2_CFG_S2_ARP_DIS(BIT(lookup)) |
1029                        ANA_PORT_VCAP_S2_CFG_S2_IP_TCPUDP_DIS(BIT(lookup)) |
1030                        ANA_PORT_VCAP_S2_CFG_S2_IP_OTHER_DIS(BIT(lookup)) |
1031                        ANA_PORT_VCAP_S2_CFG_S2_OAM_DIS(BIT(lookup)),
1032                        ANA_PORT_VCAP_S2_CFG, port);
1033 }
1034
1035 static bool
1036 ocelot_vcap_is_problematic_mac_etype(struct ocelot_vcap_filter *filter)
1037 {
1038         u16 proto, mask;
1039
1040         if (filter->key_type != OCELOT_VCAP_KEY_ETYPE)
1041                 return false;
1042
1043         proto = ntohs(*(__be16 *)filter->key.etype.etype.value);
1044         mask = ntohs(*(__be16 *)filter->key.etype.etype.mask);
1045
1046         /* ETH_P_ALL match, so all protocols below are included */
1047         if (mask == 0)
1048                 return true;
1049         if (proto == ETH_P_ARP)
1050                 return true;
1051         if (proto == ETH_P_IP)
1052                 return true;
1053         if (proto == ETH_P_IPV6)
1054                 return true;
1055
1056         return false;
1057 }
1058
1059 static bool
1060 ocelot_vcap_is_problematic_non_mac_etype(struct ocelot_vcap_filter *filter)
1061 {
1062         if (filter->key_type == OCELOT_VCAP_KEY_SNAP)
1063                 return true;
1064         if (filter->key_type == OCELOT_VCAP_KEY_ARP)
1065                 return true;
1066         if (filter->key_type == OCELOT_VCAP_KEY_IPV4)
1067                 return true;
1068         if (filter->key_type == OCELOT_VCAP_KEY_IPV6)
1069                 return true;
1070         return false;
1071 }
1072
1073 static bool
1074 ocelot_exclusive_mac_etype_filter_rules(struct ocelot *ocelot,
1075                                         struct ocelot_vcap_filter *filter)
1076 {
1077         struct ocelot_vcap_block *block = &ocelot->block[filter->block_id];
1078         struct ocelot_vcap_filter *tmp;
1079         unsigned long port;
1080         int i;
1081
1082         /* We only have the S2_IP_TCPUDP_DIS set of knobs for VCAP IS2 */
1083         if (filter->block_id != VCAP_IS2)
1084                 return true;
1085
1086         if (ocelot_vcap_is_problematic_mac_etype(filter)) {
1087                 /* Search for any non-MAC_ETYPE rules on the port */
1088                 for (i = 0; i < block->count; i++) {
1089                         tmp = ocelot_vcap_block_find_filter_by_index(block, i);
1090                         if (tmp->ingress_port_mask & filter->ingress_port_mask &&
1091                             tmp->lookup == filter->lookup &&
1092                             ocelot_vcap_is_problematic_non_mac_etype(tmp))
1093                                 return false;
1094                 }
1095
1096                 for_each_set_bit(port, &filter->ingress_port_mask,
1097                                  ocelot->num_phys_ports)
1098                         ocelot_match_all_as_mac_etype(ocelot, port,
1099                                                       filter->lookup, true);
1100         } else if (ocelot_vcap_is_problematic_non_mac_etype(filter)) {
1101                 /* Search for any MAC_ETYPE rules on the port */
1102                 for (i = 0; i < block->count; i++) {
1103                         tmp = ocelot_vcap_block_find_filter_by_index(block, i);
1104                         if (tmp->ingress_port_mask & filter->ingress_port_mask &&
1105                             tmp->lookup == filter->lookup &&
1106                             ocelot_vcap_is_problematic_mac_etype(tmp))
1107                                 return false;
1108                 }
1109
1110                 for_each_set_bit(port, &filter->ingress_port_mask,
1111                                  ocelot->num_phys_ports)
1112                         ocelot_match_all_as_mac_etype(ocelot, port,
1113                                                       filter->lookup, false);
1114         }
1115
1116         return true;
1117 }
1118
1119 int ocelot_vcap_filter_add(struct ocelot *ocelot,
1120                            struct ocelot_vcap_filter *filter,
1121                            struct netlink_ext_ack *extack)
1122 {
1123         struct ocelot_vcap_block *block = &ocelot->block[filter->block_id];
1124         int i, index;
1125
1126         if (!ocelot_exclusive_mac_etype_filter_rules(ocelot, filter)) {
1127                 NL_SET_ERR_MSG_MOD(extack,
1128                                    "Cannot mix MAC_ETYPE with non-MAC_ETYPE rules, use the other IS2 lookup");
1129                 return -EBUSY;
1130         }
1131
1132         /* Add filter to the linked list */
1133         ocelot_vcap_filter_add_to_block(ocelot, block, filter);
1134
1135         /* Get the index of the inserted filter */
1136         index = ocelot_vcap_block_get_filter_index(block, filter);
1137         if (index < 0)
1138                 return index;
1139
1140         /* Move down the rules to make place for the new filter */
1141         for (i = block->count - 1; i > index; i--) {
1142                 struct ocelot_vcap_filter *tmp;
1143
1144                 tmp = ocelot_vcap_block_find_filter_by_index(block, i);
1145                 /* Read back the filter's counters before moving it */
1146                 vcap_entry_get(ocelot, i - 1, tmp);
1147                 vcap_entry_set(ocelot, i, tmp);
1148         }
1149
1150         /* Now insert the new filter */
1151         vcap_entry_set(ocelot, index, filter);
1152         return 0;
1153 }
1154
1155 static void ocelot_vcap_block_remove_filter(struct ocelot *ocelot,
1156                                             struct ocelot_vcap_block *block,
1157                                             struct ocelot_vcap_filter *filter)
1158 {
1159         struct ocelot_vcap_filter *tmp;
1160         struct list_head *pos, *q;
1161
1162         list_for_each_safe(pos, q, &block->rules) {
1163                 tmp = list_entry(pos, struct ocelot_vcap_filter, list);
1164                 if (tmp->id == filter->id) {
1165                         if (tmp->block_id == VCAP_IS2 &&
1166                             tmp->action.police_ena)
1167                                 ocelot_vcap_policer_del(ocelot, block,
1168                                                         tmp->action.pol_ix);
1169
1170                         list_del(pos);
1171                         kfree(tmp);
1172                 }
1173         }
1174
1175         block->count--;
1176 }
1177
1178 int ocelot_vcap_filter_del(struct ocelot *ocelot,
1179                            struct ocelot_vcap_filter *filter)
1180 {
1181         struct ocelot_vcap_block *block = &ocelot->block[filter->block_id];
1182         struct ocelot_vcap_filter del_filter;
1183         int i, index;
1184
1185         /* Need to inherit the block_id so that vcap_entry_set()
1186          * does not get confused and knows where to install it.
1187          */
1188         memset(&del_filter, 0, sizeof(del_filter));
1189         del_filter.block_id = filter->block_id;
1190
1191         /* Gets index of the filter */
1192         index = ocelot_vcap_block_get_filter_index(block, filter);
1193         if (index < 0)
1194                 return index;
1195
1196         /* Delete filter */
1197         ocelot_vcap_block_remove_filter(ocelot, block, filter);
1198
1199         /* Move up all the blocks over the deleted filter */
1200         for (i = index; i < block->count; i++) {
1201                 struct ocelot_vcap_filter *tmp;
1202
1203                 tmp = ocelot_vcap_block_find_filter_by_index(block, i);
1204                 /* Read back the filter's counters before moving it */
1205                 vcap_entry_get(ocelot, i + 1, tmp);
1206                 vcap_entry_set(ocelot, i, tmp);
1207         }
1208
1209         /* Now delete the last filter, because it is duplicated */
1210         vcap_entry_set(ocelot, block->count, &del_filter);
1211
1212         return 0;
1213 }
1214
1215 int ocelot_vcap_filter_stats_update(struct ocelot *ocelot,
1216                                     struct ocelot_vcap_filter *filter)
1217 {
1218         struct ocelot_vcap_block *block = &ocelot->block[filter->block_id];
1219         struct ocelot_vcap_filter tmp;
1220         int index;
1221
1222         index = ocelot_vcap_block_get_filter_index(block, filter);
1223         if (index < 0)
1224                 return index;
1225
1226         vcap_entry_get(ocelot, index, filter);
1227
1228         /* After we get the result we need to clear the counters */
1229         tmp = *filter;
1230         tmp.stats.pkts = 0;
1231         vcap_entry_set(ocelot, index, &tmp);
1232
1233         return 0;
1234 }
1235
1236 static void ocelot_vcap_init_one(struct ocelot *ocelot,
1237                                  const struct vcap_props *vcap)
1238 {
1239         struct vcap_data data;
1240
1241         memset(&data, 0, sizeof(data));
1242
1243         vcap_entry2cache(ocelot, vcap, &data);
1244         ocelot_target_write(ocelot, vcap->target, vcap->entry_count,
1245                             VCAP_CORE_MV_CFG);
1246         vcap_cmd(ocelot, vcap, 0, VCAP_CMD_INITIALIZE, VCAP_SEL_ENTRY);
1247
1248         vcap_action2cache(ocelot, vcap, &data);
1249         ocelot_target_write(ocelot, vcap->target, vcap->action_count,
1250                             VCAP_CORE_MV_CFG);
1251         vcap_cmd(ocelot, vcap, 0, VCAP_CMD_INITIALIZE,
1252                  VCAP_SEL_ACTION | VCAP_SEL_COUNTER);
1253 }
1254
1255 static void ocelot_vcap_detect_constants(struct ocelot *ocelot,
1256                                          struct vcap_props *vcap)
1257 {
1258         int counter_memory_width;
1259         int num_default_actions;
1260         int version;
1261
1262         version = ocelot_target_read(ocelot, vcap->target,
1263                                      VCAP_CONST_VCAP_VER);
1264         /* Only version 0 VCAP supported for now */
1265         if (WARN_ON(version != 0))
1266                 return;
1267
1268         /* Width in bits of type-group field */
1269         vcap->tg_width = ocelot_target_read(ocelot, vcap->target,
1270                                             VCAP_CONST_ENTRY_TG_WIDTH);
1271         /* Number of subwords per TCAM row */
1272         vcap->sw_count = ocelot_target_read(ocelot, vcap->target,
1273                                             VCAP_CONST_ENTRY_SWCNT);
1274         /* Number of rows in TCAM. There can be this many full keys, or double
1275          * this number half keys, or 4 times this number quarter keys.
1276          */
1277         vcap->entry_count = ocelot_target_read(ocelot, vcap->target,
1278                                                VCAP_CONST_ENTRY_CNT);
1279         /* Assuming there are 4 subwords per TCAM row, their layout in the
1280          * actual TCAM (not in the cache) would be:
1281          *
1282          * |  SW 3  | TG 3 |  SW 2  | TG 2 |  SW 1  | TG 1 |  SW 0  | TG 0 |
1283          *
1284          * (where SW=subword and TG=Type-Group).
1285          *
1286          * What VCAP_CONST_ENTRY_CNT is giving us is the width of one full TCAM
1287          * row. But when software accesses the TCAM through the cache
1288          * registers, the Type-Group values are written through another set of
1289          * registers VCAP_TG_DAT, and therefore, it appears as though the 4
1290          * subwords are contiguous in the cache memory.
1291          * Important mention: regardless of the number of key entries per row
1292          * (and therefore of key size: 1 full key or 2 half keys or 4 quarter
1293          * keys), software always has to configure 4 Type-Group values. For
1294          * example, in the case of 1 full key, the driver needs to set all 4
1295          * Type-Group to be full key.
1296          *
1297          * For this reason, we need to fix up the value that the hardware is
1298          * giving us. We don't actually care about the width of the entry in
1299          * the TCAM. What we care about is the width of the entry in the cache
1300          * registers, which is how we get to interact with it. And since the
1301          * VCAP_ENTRY_DAT cache registers access only the subwords and not the
1302          * Type-Groups, this means we need to subtract the width of the
1303          * Type-Groups when packing and unpacking key entry data in a TCAM row.
1304          */
1305         vcap->entry_width = ocelot_target_read(ocelot, vcap->target,
1306                                                VCAP_CONST_ENTRY_WIDTH);
1307         vcap->entry_width -= vcap->tg_width * vcap->sw_count;
1308         num_default_actions = ocelot_target_read(ocelot, vcap->target,
1309                                                  VCAP_CONST_ACTION_DEF_CNT);
1310         vcap->action_count = vcap->entry_count + num_default_actions;
1311         vcap->action_width = ocelot_target_read(ocelot, vcap->target,
1312                                                 VCAP_CONST_ACTION_WIDTH);
1313         /* The width of the counter memory, this is the complete width of all
1314          * counter-fields associated with one full-word entry. There is one
1315          * counter per entry sub-word (see CAP_CORE::ENTRY_SWCNT for number of
1316          * subwords.)
1317          */
1318         vcap->counter_words = vcap->sw_count;
1319         counter_memory_width = ocelot_target_read(ocelot, vcap->target,
1320                                                   VCAP_CONST_CNT_WIDTH);
1321         vcap->counter_width = counter_memory_width / vcap->counter_words;
1322 }
1323
1324 int ocelot_vcap_init(struct ocelot *ocelot)
1325 {
1326         int i;
1327
1328         /* Create a policer that will drop the frames for the cpu.
1329          * This policer will be used as action in the acl rules to drop
1330          * frames.
1331          */
1332         ocelot_write_gix(ocelot, 0x299, ANA_POL_MODE_CFG,
1333                          OCELOT_POLICER_DISCARD);
1334         ocelot_write_gix(ocelot, 0x1, ANA_POL_PIR_CFG,
1335                          OCELOT_POLICER_DISCARD);
1336         ocelot_write_gix(ocelot, 0x3fffff, ANA_POL_PIR_STATE,
1337                          OCELOT_POLICER_DISCARD);
1338         ocelot_write_gix(ocelot, 0x0, ANA_POL_CIR_CFG,
1339                          OCELOT_POLICER_DISCARD);
1340         ocelot_write_gix(ocelot, 0x3fffff, ANA_POL_CIR_STATE,
1341                          OCELOT_POLICER_DISCARD);
1342
1343         for (i = 0; i < OCELOT_NUM_VCAP_BLOCKS; i++) {
1344                 struct ocelot_vcap_block *block = &ocelot->block[i];
1345                 struct vcap_props *vcap = &ocelot->vcap[i];
1346
1347                 INIT_LIST_HEAD(&block->rules);
1348                 block->pol_lpr = OCELOT_POLICER_DISCARD - 1;
1349
1350                 ocelot_vcap_detect_constants(ocelot, vcap);
1351                 ocelot_vcap_init_one(ocelot, vcap);
1352         }
1353
1354         INIT_LIST_HEAD(&ocelot->dummy_rules);
1355
1356         return 0;
1357 }