1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Microsemi SoCs FDMA driver
5 * Copyright (c) 2021 Microchip
7 * Page recycling code is mostly taken from gianfar driver.
10 #include <linux/align.h>
11 #include <linux/bitops.h>
12 #include <linux/dmapool.h>
13 #include <linux/dsa/ocelot.h>
14 #include <linux/netdevice.h>
15 #include <linux/skbuff.h>
17 #include "ocelot_fdma.h"
18 #include "ocelot_qs.h"
20 DEFINE_STATIC_KEY_FALSE(ocelot_fdma_enabled);
22 static void ocelot_fdma_writel(struct ocelot *ocelot, u32 reg, u32 data)
24 regmap_write(ocelot->targets[FDMA], reg, data);
27 static u32 ocelot_fdma_readl(struct ocelot *ocelot, u32 reg)
31 regmap_read(ocelot->targets[FDMA], reg, &retval);
36 static dma_addr_t ocelot_fdma_idx_dma(dma_addr_t base, u16 idx)
38 return base + idx * sizeof(struct ocelot_fdma_dcb);
41 static u16 ocelot_fdma_dma_idx(dma_addr_t base, dma_addr_t dma)
43 return (dma - base) / sizeof(struct ocelot_fdma_dcb);
46 static u16 ocelot_fdma_idx_next(u16 idx, u16 ring_sz)
48 return unlikely(idx == ring_sz - 1) ? 0 : idx + 1;
51 static u16 ocelot_fdma_idx_prev(u16 idx, u16 ring_sz)
53 return unlikely(idx == 0) ? ring_sz - 1 : idx - 1;
56 static int ocelot_fdma_rx_ring_free(struct ocelot_fdma *fdma)
58 struct ocelot_fdma_rx_ring *rx_ring = &fdma->rx_ring;
60 if (rx_ring->next_to_use >= rx_ring->next_to_clean)
61 return OCELOT_FDMA_RX_RING_SIZE -
62 (rx_ring->next_to_use - rx_ring->next_to_clean) - 1;
64 return rx_ring->next_to_clean - rx_ring->next_to_use - 1;
67 static int ocelot_fdma_tx_ring_free(struct ocelot_fdma *fdma)
69 struct ocelot_fdma_tx_ring *tx_ring = &fdma->tx_ring;
71 if (tx_ring->next_to_use >= tx_ring->next_to_clean)
72 return OCELOT_FDMA_TX_RING_SIZE -
73 (tx_ring->next_to_use - tx_ring->next_to_clean) - 1;
75 return tx_ring->next_to_clean - tx_ring->next_to_use - 1;
78 static bool ocelot_fdma_tx_ring_empty(struct ocelot_fdma *fdma)
80 struct ocelot_fdma_tx_ring *tx_ring = &fdma->tx_ring;
82 return tx_ring->next_to_clean == tx_ring->next_to_use;
85 static void ocelot_fdma_activate_chan(struct ocelot *ocelot, dma_addr_t dma,
88 ocelot_fdma_writel(ocelot, MSCC_FDMA_DCB_LLP(chan), dma);
89 /* Barrier to force memory writes to DCB to be completed before starting
93 ocelot_fdma_writel(ocelot, MSCC_FDMA_CH_ACTIVATE, BIT(chan));
96 static u32 ocelot_fdma_read_ch_safe(struct ocelot *ocelot)
98 return ocelot_fdma_readl(ocelot, MSCC_FDMA_CH_SAFE);
101 static int ocelot_fdma_wait_chan_safe(struct ocelot *ocelot, int chan)
105 return readx_poll_timeout_atomic(ocelot_fdma_read_ch_safe, ocelot, safe,
107 OCELOT_FDMA_CH_SAFE_TIMEOUT_US);
110 static void ocelot_fdma_dcb_set_data(struct ocelot_fdma_dcb *dcb,
114 u32 offset = dma_addr & 0x3;
117 dcb->datap = ALIGN_DOWN(dma_addr, 4);
118 dcb->datal = ALIGN_DOWN(size, 4);
119 dcb->stat = MSCC_FDMA_DCB_STAT_BLOCKO(offset);
122 static bool ocelot_fdma_rx_alloc_page(struct ocelot *ocelot,
123 struct ocelot_fdma_rx_buf *rxb)
128 page = dev_alloc_page();
132 mapping = dma_map_page(ocelot->dev, page, 0, PAGE_SIZE,
134 if (unlikely(dma_mapping_error(ocelot->dev, mapping))) {
140 rxb->page_offset = 0;
141 rxb->dma_addr = mapping;
146 static int ocelot_fdma_alloc_rx_buffs(struct ocelot *ocelot, u16 alloc_cnt)
148 struct ocelot_fdma *fdma = ocelot->fdma;
149 struct ocelot_fdma_rx_ring *rx_ring;
150 struct ocelot_fdma_rx_buf *rxb;
151 struct ocelot_fdma_dcb *dcb;
156 rx_ring = &fdma->rx_ring;
157 idx = rx_ring->next_to_use;
159 while (alloc_cnt--) {
160 rxb = &rx_ring->bufs[idx];
162 if (unlikely(!rxb->page)) {
163 if (unlikely(!ocelot_fdma_rx_alloc_page(ocelot, rxb))) {
164 dev_err_ratelimited(ocelot->dev,
165 "Failed to allocate rx\n");
171 dcb = &rx_ring->dcbs[idx];
172 dma_addr = rxb->dma_addr + rxb->page_offset;
173 ocelot_fdma_dcb_set_data(dcb, dma_addr, OCELOT_FDMA_RXB_SIZE);
175 idx = ocelot_fdma_idx_next(idx, OCELOT_FDMA_RX_RING_SIZE);
176 /* Chain the DCB to the next one */
177 dcb->llp = ocelot_fdma_idx_dma(rx_ring->dcbs_dma, idx);
180 rx_ring->next_to_use = idx;
181 rx_ring->next_to_alloc = idx;
186 static bool ocelot_fdma_tx_dcb_set_skb(struct ocelot *ocelot,
187 struct ocelot_fdma_tx_buf *tx_buf,
188 struct ocelot_fdma_dcb *dcb,
193 mapping = dma_map_single(ocelot->dev, skb->data, skb->len,
195 if (unlikely(dma_mapping_error(ocelot->dev, mapping)))
198 dma_unmap_addr_set(tx_buf, dma_addr, mapping);
200 ocelot_fdma_dcb_set_data(dcb, mapping, OCELOT_FDMA_RX_SIZE);
202 dcb->stat |= MSCC_FDMA_DCB_STAT_BLOCKL(skb->len);
203 dcb->stat |= MSCC_FDMA_DCB_STAT_SOF | MSCC_FDMA_DCB_STAT_EOF;
208 static bool ocelot_fdma_check_stop_rx(struct ocelot *ocelot)
212 /* Check if the FDMA hits the DCB with LLP == NULL */
213 llp = ocelot_fdma_readl(ocelot, MSCC_FDMA_DCB_LLP(MSCC_FDMA_XTR_CHAN));
217 ocelot_fdma_writel(ocelot, MSCC_FDMA_CH_DISABLE,
218 BIT(MSCC_FDMA_XTR_CHAN));
223 static void ocelot_fdma_rx_set_llp(struct ocelot_fdma_rx_ring *rx_ring)
225 struct ocelot_fdma_dcb *dcb;
228 idx = ocelot_fdma_idx_prev(rx_ring->next_to_use,
229 OCELOT_FDMA_RX_RING_SIZE);
230 dcb = &rx_ring->dcbs[idx];
234 static void ocelot_fdma_rx_restart(struct ocelot *ocelot)
236 struct ocelot_fdma *fdma = ocelot->fdma;
237 struct ocelot_fdma_rx_ring *rx_ring;
238 const u8 chan = MSCC_FDMA_XTR_CHAN;
239 dma_addr_t new_llp, dma_base;
244 rx_ring = &fdma->rx_ring;
245 ret = ocelot_fdma_wait_chan_safe(ocelot, chan);
247 dev_err_ratelimited(ocelot->dev,
248 "Unable to stop RX channel\n");
252 ocelot_fdma_rx_set_llp(rx_ring);
254 /* FDMA stopped on the last DCB that contained a NULL LLP, since
255 * we processed some DCBs in RX, there is free space, and we must set
256 * DCB_LLP to point to the next DCB
258 llp_prev = ocelot_fdma_readl(ocelot, MSCC_FDMA_DCB_LLP_PREV(chan));
259 dma_base = rx_ring->dcbs_dma;
261 /* Get the next DMA addr located after LLP == NULL DCB */
262 idx = ocelot_fdma_dma_idx(dma_base, llp_prev);
263 idx = ocelot_fdma_idx_next(idx, OCELOT_FDMA_RX_RING_SIZE);
264 new_llp = ocelot_fdma_idx_dma(dma_base, idx);
266 /* Finally reactivate the channel */
267 ocelot_fdma_activate_chan(ocelot, new_llp, chan);
270 static bool ocelot_fdma_add_rx_frag(struct ocelot_fdma_rx_buf *rxb, u32 stat,
271 struct sk_buff *skb, bool first)
273 int size = MSCC_FDMA_DCB_STAT_BLOCKL(stat);
274 struct page *page = rxb->page;
279 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
280 rxb->page_offset, size, OCELOT_FDMA_RX_SIZE);
283 /* Try to reuse page */
284 if (unlikely(page_ref_count(page) != 1 || page_is_pfmemalloc(page)))
287 /* Change offset to the other half */
288 rxb->page_offset ^= OCELOT_FDMA_RX_SIZE;
295 static void ocelot_fdma_reuse_rx_page(struct ocelot *ocelot,
296 struct ocelot_fdma_rx_buf *old_rxb)
298 struct ocelot_fdma_rx_ring *rx_ring = &ocelot->fdma->rx_ring;
299 struct ocelot_fdma_rx_buf *new_rxb;
301 new_rxb = &rx_ring->bufs[rx_ring->next_to_alloc];
302 rx_ring->next_to_alloc = ocelot_fdma_idx_next(rx_ring->next_to_alloc,
303 OCELOT_FDMA_RX_RING_SIZE);
305 /* Copy page reference */
308 /* Sync for use by the device */
309 dma_sync_single_range_for_device(ocelot->dev, old_rxb->dma_addr,
310 old_rxb->page_offset,
311 OCELOT_FDMA_RX_SIZE, DMA_FROM_DEVICE);
314 static struct sk_buff *ocelot_fdma_get_skb(struct ocelot *ocelot, u32 stat,
315 struct ocelot_fdma_rx_buf *rxb,
320 /* Allocate skb head and data */
322 void *buff_addr = page_address(rxb->page) +
325 skb = build_skb(buff_addr, OCELOT_FDMA_SKBFRAG_SIZE);
326 if (unlikely(!skb)) {
327 dev_err_ratelimited(ocelot->dev,
328 "build_skb failed !\n");
334 dma_sync_single_range_for_cpu(ocelot->dev, rxb->dma_addr,
335 rxb->page_offset, OCELOT_FDMA_RX_SIZE,
338 if (ocelot_fdma_add_rx_frag(rxb, stat, skb, first)) {
339 /* Reuse the free half of the page for the next_to_alloc DCB*/
340 ocelot_fdma_reuse_rx_page(ocelot, rxb);
342 /* page cannot be reused, unmap it */
343 dma_unmap_page(ocelot->dev, rxb->dma_addr, PAGE_SIZE,
347 /* clear rx buff content */
353 static bool ocelot_fdma_receive_skb(struct ocelot *ocelot, struct sk_buff *skb)
355 struct net_device *ndev;
356 void *xfh = skb->data;
360 skb_pull(skb, OCELOT_TAG_LEN);
362 ocelot_xfh_get_src_port(xfh, &src_port);
363 if (unlikely(src_port >= ocelot->num_phys_ports))
366 ndev = ocelot_port_to_netdev(ocelot, src_port);
370 if (pskb_trim(skb, skb->len - ETH_FCS_LEN))
374 skb->protocol = eth_type_trans(skb, skb->dev);
375 skb->dev->stats.rx_bytes += skb->len;
376 skb->dev->stats.rx_packets++;
379 ocelot_xfh_get_rew_val(xfh, ×tamp);
380 ocelot_ptp_rx_timestamp(ocelot, skb, timestamp);
383 if (likely(!skb_defer_rx_timestamp(skb)))
384 netif_receive_skb(skb);
389 static int ocelot_fdma_rx_get(struct ocelot *ocelot, int budget)
391 struct ocelot_fdma *fdma = ocelot->fdma;
392 struct ocelot_fdma_rx_ring *rx_ring;
393 struct ocelot_fdma_rx_buf *rxb;
394 struct ocelot_fdma_dcb *dcb;
401 cleaned_cnt = ocelot_fdma_rx_ring_free(fdma);
402 rx_ring = &fdma->rx_ring;
406 idx = rx_ring->next_to_clean;
407 dcb = &rx_ring->dcbs[idx];
409 if (MSCC_FDMA_DCB_STAT_BLOCKL(stat) == 0)
412 /* New packet is a start of frame but we already got a skb set,
413 * we probably lost an EOF packet, free skb
415 if (unlikely(skb && (stat & MSCC_FDMA_DCB_STAT_SOF))) {
420 rxb = &rx_ring->bufs[idx];
421 /* Fetch next to clean buffer from the rx_ring */
422 skb = ocelot_fdma_get_skb(ocelot, stat, rxb, skb);
429 idx = ocelot_fdma_idx_next(idx, OCELOT_FDMA_RX_RING_SIZE);
430 rx_ring->next_to_clean = idx;
432 if (unlikely(stat & MSCC_FDMA_DCB_STAT_ABORT ||
433 stat & MSCC_FDMA_DCB_STAT_PD)) {
434 dev_err_ratelimited(ocelot->dev,
435 "DCB aborted or pruned\n");
441 /* We still need to process the other fragment of the packet
442 * before delivering it to the network stack
444 if (!(stat & MSCC_FDMA_DCB_STAT_EOF))
447 if (unlikely(!ocelot_fdma_receive_skb(ocelot, skb)))
456 ocelot_fdma_alloc_rx_buffs(ocelot, cleaned_cnt);
461 static void ocelot_fdma_wakeup_netdev(struct ocelot *ocelot)
463 struct ocelot_port_private *priv;
464 struct ocelot_port *ocelot_port;
465 struct net_device *dev;
468 for (port = 0; port < ocelot->num_phys_ports; port++) {
469 ocelot_port = ocelot->ports[port];
472 priv = container_of(ocelot_port, struct ocelot_port_private,
476 if (unlikely(netif_queue_stopped(dev)))
477 netif_wake_queue(dev);
481 static void ocelot_fdma_tx_cleanup(struct ocelot *ocelot, int budget)
483 struct ocelot_fdma *fdma = ocelot->fdma;
484 struct ocelot_fdma_tx_ring *tx_ring;
485 struct ocelot_fdma_tx_buf *buf;
486 unsigned int new_null_llp_idx;
487 struct ocelot_fdma_dcb *dcb;
488 bool end_of_list = false;
495 tx_ring = &fdma->tx_ring;
497 /* Purge the TX packets that have been sent up to the NULL llp or the
500 while (!ocelot_fdma_tx_ring_empty(fdma)) {
501 ntc = tx_ring->next_to_clean;
502 dcb = &tx_ring->dcbs[ntc];
503 if (!(dcb->stat & MSCC_FDMA_DCB_STAT_PD))
506 buf = &tx_ring->bufs[ntc];
508 dma_unmap_single(ocelot->dev, dma_unmap_addr(buf, dma_addr),
509 skb->len, DMA_TO_DEVICE);
510 napi_consume_skb(skb, budget);
513 /* Only update after accessing all dcb fields */
514 tx_ring->next_to_clean = ocelot_fdma_idx_next(ntc,
515 OCELOT_FDMA_TX_RING_SIZE);
517 /* If we hit the NULL LLP, stop, we might need to reload FDMA */
524 /* No need to try to wake if there were no TX cleaned_cnt up. */
525 if (ocelot_fdma_tx_ring_free(fdma))
526 ocelot_fdma_wakeup_netdev(ocelot);
528 /* If there is still some DCBs to be processed by the FDMA or if the
529 * pending list is empty, there is no need to restart the FDMA.
531 if (!end_of_list || ocelot_fdma_tx_ring_empty(fdma))
534 ret = ocelot_fdma_wait_chan_safe(ocelot, MSCC_FDMA_INJ_CHAN);
536 dev_warn(ocelot->dev,
537 "Failed to wait for TX channel to stop\n");
541 /* Set NULL LLP to be the last DCB used */
542 new_null_llp_idx = ocelot_fdma_idx_prev(tx_ring->next_to_use,
543 OCELOT_FDMA_TX_RING_SIZE);
544 dcb = &tx_ring->dcbs[new_null_llp_idx];
547 dma = ocelot_fdma_idx_dma(tx_ring->dcbs_dma, tx_ring->next_to_clean);
548 ocelot_fdma_activate_chan(ocelot, dma, MSCC_FDMA_INJ_CHAN);
551 static int ocelot_fdma_napi_poll(struct napi_struct *napi, int budget)
553 struct ocelot_fdma *fdma = container_of(napi, struct ocelot_fdma, napi);
554 struct ocelot *ocelot = fdma->ocelot;
558 ocelot_fdma_tx_cleanup(ocelot, budget);
560 rx_stopped = ocelot_fdma_check_stop_rx(ocelot);
562 work_done = ocelot_fdma_rx_get(ocelot, budget);
565 ocelot_fdma_rx_restart(ocelot);
567 if (work_done < budget) {
568 napi_complete_done(&fdma->napi, work_done);
569 ocelot_fdma_writel(ocelot, MSCC_FDMA_INTR_ENA,
570 BIT(MSCC_FDMA_INJ_CHAN) |
571 BIT(MSCC_FDMA_XTR_CHAN));
577 static irqreturn_t ocelot_fdma_interrupt(int irq, void *dev_id)
579 u32 ident, llp, frm, err, err_code;
580 struct ocelot *ocelot = dev_id;
582 ident = ocelot_fdma_readl(ocelot, MSCC_FDMA_INTR_IDENT);
583 frm = ocelot_fdma_readl(ocelot, MSCC_FDMA_INTR_FRM);
584 llp = ocelot_fdma_readl(ocelot, MSCC_FDMA_INTR_LLP);
586 ocelot_fdma_writel(ocelot, MSCC_FDMA_INTR_LLP, llp & ident);
587 ocelot_fdma_writel(ocelot, MSCC_FDMA_INTR_FRM, frm & ident);
589 ocelot_fdma_writel(ocelot, MSCC_FDMA_INTR_ENA, 0);
590 napi_schedule(&ocelot->fdma->napi);
593 err = ocelot_fdma_readl(ocelot, MSCC_FDMA_EVT_ERR);
595 err_code = ocelot_fdma_readl(ocelot, MSCC_FDMA_EVT_ERR_CODE);
596 dev_err_ratelimited(ocelot->dev,
597 "Error ! chans mask: %#x, code: %#x\n",
600 ocelot_fdma_writel(ocelot, MSCC_FDMA_EVT_ERR, err);
601 ocelot_fdma_writel(ocelot, MSCC_FDMA_EVT_ERR_CODE, err_code);
607 static void ocelot_fdma_send_skb(struct ocelot *ocelot,
608 struct ocelot_fdma *fdma, struct sk_buff *skb)
610 struct ocelot_fdma_tx_ring *tx_ring = &fdma->tx_ring;
611 struct ocelot_fdma_tx_buf *tx_buf;
612 struct ocelot_fdma_dcb *dcb;
616 dcb = &tx_ring->dcbs[tx_ring->next_to_use];
617 tx_buf = &tx_ring->bufs[tx_ring->next_to_use];
618 if (!ocelot_fdma_tx_dcb_set_skb(ocelot, tx_buf, dcb, skb)) {
619 dev_kfree_skb_any(skb);
623 next_idx = ocelot_fdma_idx_next(tx_ring->next_to_use,
624 OCELOT_FDMA_TX_RING_SIZE);
625 skb_tx_timestamp(skb);
627 /* If the FDMA TX chan is empty, then enqueue the DCB directly */
628 if (ocelot_fdma_tx_ring_empty(fdma)) {
629 dma = ocelot_fdma_idx_dma(tx_ring->dcbs_dma,
630 tx_ring->next_to_use);
631 ocelot_fdma_activate_chan(ocelot, dma, MSCC_FDMA_INJ_CHAN);
634 dcb->llp = ocelot_fdma_idx_dma(tx_ring->dcbs_dma, next_idx);
637 tx_ring->next_to_use = next_idx;
640 static int ocelot_fdma_prepare_skb(struct ocelot *ocelot, int port, u32 rew_op,
641 struct sk_buff *skb, struct net_device *dev)
643 int needed_headroom = max_t(int, OCELOT_TAG_LEN - skb_headroom(skb), 0);
644 int needed_tailroom = max_t(int, ETH_FCS_LEN - skb_tailroom(skb), 0);
648 if (unlikely(needed_headroom || needed_tailroom ||
649 skb_header_cloned(skb))) {
650 err = pskb_expand_head(skb, needed_headroom, needed_tailroom,
653 dev_kfree_skb_any(skb);
658 err = skb_linearize(skb);
660 net_err_ratelimited("%s: skb_linearize error (%d)!\n",
662 dev_kfree_skb_any(skb);
666 ifh = skb_push(skb, OCELOT_TAG_LEN);
667 skb_put(skb, ETH_FCS_LEN);
668 memset(ifh, 0, OCELOT_TAG_LEN);
669 ocelot_ifh_port_set(ifh, port, rew_op, skb_vlan_tag_get(skb));
674 int ocelot_fdma_inject_frame(struct ocelot *ocelot, int port, u32 rew_op,
675 struct sk_buff *skb, struct net_device *dev)
677 struct ocelot_fdma *fdma = ocelot->fdma;
678 int ret = NETDEV_TX_OK;
680 spin_lock(&fdma->tx_ring.xmit_lock);
682 if (ocelot_fdma_tx_ring_free(fdma) == 0) {
683 netif_stop_queue(dev);
684 ret = NETDEV_TX_BUSY;
688 if (ocelot_fdma_prepare_skb(ocelot, port, rew_op, skb, dev))
691 ocelot_fdma_send_skb(ocelot, fdma, skb);
694 spin_unlock(&fdma->tx_ring.xmit_lock);
699 static void ocelot_fdma_free_rx_ring(struct ocelot *ocelot)
701 struct ocelot_fdma *fdma = ocelot->fdma;
702 struct ocelot_fdma_rx_ring *rx_ring;
703 struct ocelot_fdma_rx_buf *rxb;
706 rx_ring = &fdma->rx_ring;
707 idx = rx_ring->next_to_clean;
709 /* Free the pages held in the RX ring */
710 while (idx != rx_ring->next_to_use) {
711 rxb = &rx_ring->bufs[idx];
712 dma_unmap_page(ocelot->dev, rxb->dma_addr, PAGE_SIZE,
714 __free_page(rxb->page);
715 idx = ocelot_fdma_idx_next(idx, OCELOT_FDMA_RX_RING_SIZE);
718 if (fdma->rx_ring.skb)
719 dev_kfree_skb_any(fdma->rx_ring.skb);
722 static void ocelot_fdma_free_tx_ring(struct ocelot *ocelot)
724 struct ocelot_fdma *fdma = ocelot->fdma;
725 struct ocelot_fdma_tx_ring *tx_ring;
726 struct ocelot_fdma_tx_buf *txb;
730 tx_ring = &fdma->tx_ring;
731 idx = tx_ring->next_to_clean;
733 while (idx != tx_ring->next_to_use) {
734 txb = &tx_ring->bufs[idx];
736 dma_unmap_single(ocelot->dev, dma_unmap_addr(txb, dma_addr),
737 skb->len, DMA_TO_DEVICE);
738 dev_kfree_skb_any(skb);
739 idx = ocelot_fdma_idx_next(idx, OCELOT_FDMA_TX_RING_SIZE);
743 static int ocelot_fdma_rings_alloc(struct ocelot *ocelot)
745 struct ocelot_fdma *fdma = ocelot->fdma;
746 struct ocelot_fdma_dcb *dcbs;
751 /* Create a pool of consistent memory blocks for hardware descriptors */
752 fdma->dcbs_base = dmam_alloc_coherent(ocelot->dev,
753 OCELOT_DCBS_HW_ALLOC_SIZE,
754 &fdma->dcbs_dma_base, GFP_KERNEL);
755 if (!fdma->dcbs_base)
758 /* DCBs must be aligned on a 32bit boundary */
759 dcbs = fdma->dcbs_base;
760 dcbs_dma = fdma->dcbs_dma_base;
761 if (!IS_ALIGNED(dcbs_dma, 4)) {
762 adjust = dcbs_dma & 0x3;
763 dcbs_dma = ALIGN(dcbs_dma, 4);
764 dcbs = (void *)dcbs + adjust;
768 fdma->tx_ring.dcbs = dcbs;
769 fdma->tx_ring.dcbs_dma = dcbs_dma;
770 spin_lock_init(&fdma->tx_ring.xmit_lock);
773 fdma->rx_ring.dcbs = dcbs + OCELOT_FDMA_TX_RING_SIZE;
774 fdma->rx_ring.dcbs_dma = dcbs_dma + OCELOT_FDMA_TX_DCB_SIZE;
775 ret = ocelot_fdma_alloc_rx_buffs(ocelot,
776 ocelot_fdma_tx_ring_free(fdma));
778 ocelot_fdma_free_rx_ring(ocelot);
782 /* Set the last DCB LLP as NULL, this is normally done when restarting
783 * the RX chan, but this is for the first run
785 ocelot_fdma_rx_set_llp(&fdma->rx_ring);
790 void ocelot_fdma_netdev_init(struct ocelot *ocelot, struct net_device *dev)
792 struct ocelot_fdma *fdma = ocelot->fdma;
794 dev->needed_headroom = OCELOT_TAG_LEN;
795 dev->needed_tailroom = ETH_FCS_LEN;
801 netif_napi_add_weight(dev, &fdma->napi, ocelot_fdma_napi_poll,
805 void ocelot_fdma_netdev_deinit(struct ocelot *ocelot, struct net_device *dev)
807 struct ocelot_fdma *fdma = ocelot->fdma;
809 if (fdma->ndev == dev) {
810 netif_napi_del(&fdma->napi);
815 void ocelot_fdma_init(struct platform_device *pdev, struct ocelot *ocelot)
817 struct device *dev = ocelot->dev;
818 struct ocelot_fdma *fdma;
821 fdma = devm_kzalloc(dev, sizeof(*fdma), GFP_KERNEL);
826 ocelot->dev->coherent_dma_mask = DMA_BIT_MASK(32);
828 ocelot_fdma_writel(ocelot, MSCC_FDMA_INTR_ENA, 0);
830 fdma->ocelot = ocelot;
831 fdma->irq = platform_get_irq_byname(pdev, "fdma");
832 ret = devm_request_irq(dev, fdma->irq, ocelot_fdma_interrupt, 0,
833 dev_name(dev), ocelot);
837 ret = ocelot_fdma_rings_alloc(ocelot);
841 static_branch_enable(&ocelot_fdma_enabled);
846 devm_free_irq(dev, fdma->irq, fdma);
848 devm_kfree(dev, fdma);
853 void ocelot_fdma_start(struct ocelot *ocelot)
855 struct ocelot_fdma *fdma = ocelot->fdma;
857 /* Reconfigure for extraction and injection using DMA */
858 ocelot_write_rix(ocelot, QS_INJ_GRP_CFG_MODE(2), QS_INJ_GRP_CFG, 0);
859 ocelot_write_rix(ocelot, QS_INJ_CTRL_GAP_SIZE(0), QS_INJ_CTRL, 0);
861 ocelot_write_rix(ocelot, QS_XTR_GRP_CFG_MODE(2), QS_XTR_GRP_CFG, 0);
863 ocelot_fdma_writel(ocelot, MSCC_FDMA_INTR_LLP, 0xffffffff);
864 ocelot_fdma_writel(ocelot, MSCC_FDMA_INTR_FRM, 0xffffffff);
866 ocelot_fdma_writel(ocelot, MSCC_FDMA_INTR_LLP_ENA,
867 BIT(MSCC_FDMA_INJ_CHAN) | BIT(MSCC_FDMA_XTR_CHAN));
868 ocelot_fdma_writel(ocelot, MSCC_FDMA_INTR_FRM_ENA,
869 BIT(MSCC_FDMA_XTR_CHAN));
870 ocelot_fdma_writel(ocelot, MSCC_FDMA_INTR_ENA,
871 BIT(MSCC_FDMA_INJ_CHAN) | BIT(MSCC_FDMA_XTR_CHAN));
873 napi_enable(&fdma->napi);
875 ocelot_fdma_activate_chan(ocelot, ocelot->fdma->rx_ring.dcbs_dma,
879 void ocelot_fdma_deinit(struct ocelot *ocelot)
881 struct ocelot_fdma *fdma = ocelot->fdma;
883 ocelot_fdma_writel(ocelot, MSCC_FDMA_INTR_ENA, 0);
884 ocelot_fdma_writel(ocelot, MSCC_FDMA_CH_FORCEDIS,
885 BIT(MSCC_FDMA_XTR_CHAN));
886 ocelot_fdma_writel(ocelot, MSCC_FDMA_CH_FORCEDIS,
887 BIT(MSCC_FDMA_INJ_CHAN));
888 napi_synchronize(&fdma->napi);
889 napi_disable(&fdma->napi);
891 ocelot_fdma_free_rx_ring(ocelot);
892 ocelot_fdma_free_tx_ring(ocelot);