1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Copyright (C) 2018 Microchip Technology Inc. */
4 #ifndef _LAN743X_ETHTOOL_H
5 #define _LAN743X_ETHTOOL_H
7 #include "linux/ethtool.h"
9 #define LAN743X_ETH_REG_VERSION 1
27 ETH_EEE_TX_LPI_REQ_DLY,
31 /* Add new registers above */
32 MAX_LAN743X_ETH_COMMON_REGS
51 ETH_SR_MII_TIME_SYNC_ABL,
52 ETH_SR_MII_TIME_SYNC_TX_MAX_DLY_LWR,
53 ETH_SR_MII_TIME_SYNC_TX_MAX_DLY_UPR,
54 ETH_SR_MII_TIME_SYNC_TX_MIN_DLY_LWR,
55 ETH_SR_MII_TIME_SYNC_TX_MIN_DLY_UPR,
56 ETH_SR_MII_TIME_SYNC_RX_MAX_DLY_LWR,
57 ETH_SR_MII_TIME_SYNC_RX_MAX_DLY_UPR,
58 ETH_SR_MII_TIME_SYNC_RX_MIN_DLY_LWR,
59 ETH_SR_MII_TIME_SYNC_RX_MIN_DLY_UPR,
62 ETH_VR_MII_AN_INTR_STS,
65 ETH_VR_MII_EEE_MCTRL0,
66 ETH_VR_MII_EEE_TXTIMER,
67 ETH_VR_MII_EEE_RXTIMER,
68 ETH_VR_MII_LINK_TIMER_CTRL,
69 ETH_VR_MII_EEE_MCTRL1,
71 ETH_VR_MII_ICG_ERRCNT1,
73 ETH_VR_MII_EEE_LPI_STATUS,
77 ETH_VR_MII_GEN2_GEN4_TX_BSTCTRL0,
78 ETH_VR_MII_GEN2_GEN4_TX_LVLCTRL0,
79 ETH_VR_MII_GEN2_GEN4_TXGENCTRL0,
80 ETH_VR_MII_GEN2_GEN4_TXGENCTRL1,
81 ETH_VR_MII_GEN4_TXGENCTRL2,
82 ETH_VR_MII_GEN2_GEN4_TX_STS,
83 ETH_VR_MII_GEN2_GEN4_RXGENCTRL0,
84 ETH_VR_MII_GEN2_GEN4_RXGENCTRL1,
85 ETH_VR_MII_GEN4_RXEQ_CTRL,
86 ETH_VR_MII_GEN4_RXLOS_CTRL0,
87 ETH_VR_MII_GEN2_GEN4_MPLL_CTRL0,
88 ETH_VR_MII_GEN2_GEN4_MPLL_CTRL1,
89 ETH_VR_MII_GEN2_GEN4_MPLL_STS,
90 ETH_VR_MII_GEN2_GEN4_LVL_CTRL,
91 ETH_VR_MII_GEN4_MISC_CTRL2,
92 ETH_VR_MII_GEN2_GEN4_MISC_CTRL0,
93 ETH_VR_MII_GEN2_GEN4_MISC_CTRL1,
94 ETH_VR_MII_SNPS_CR_CTRL,
95 ETH_VR_MII_SNPS_CR_ADDR,
96 ETH_VR_MII_SNPS_CR_DATA,
98 ETH_VR_MII_DIG_ERRCNT,
100 /* Add new registers above */
101 MAX_LAN743X_ETH_SGMII_REGS
104 extern const struct ethtool_ops lan743x_ethtool_ops;
106 #endif /* _LAN743X_ETHTOOL_H */