2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.h
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
37 #ifndef _MLXSW_SPECTRUM_H
38 #define _MLXSW_SPECTRUM_H
40 #include <linux/types.h>
41 #include <linux/netdevice.h>
42 #include <linux/rhashtable.h>
43 #include <linux/bitops.h>
44 #include <linux/if_vlan.h>
45 #include <linux/list.h>
46 #include <linux/dcbnl.h>
47 #include <linux/in6.h>
48 #include <linux/notifier.h>
53 #define MLXSW_SP_VFID_BASE VLAN_N_VID
54 #define MLXSW_SP_VFID_MAX 6656 /* Bridged VLAN interfaces */
56 #define MLXSW_SP_RFID_BASE 15360
57 #define MLXSW_SP_INVALID_RIF 0xffff
59 #define MLXSW_SP_MID_MAX 7000
61 #define MLXSW_SP_PORTS_PER_CLUSTER_MAX 4
63 #define MLXSW_SP_LPM_TREE_MIN 2 /* trees 0 and 1 are reserved */
64 #define MLXSW_SP_LPM_TREE_MAX 22
65 #define MLXSW_SP_LPM_TREE_COUNT (MLXSW_SP_LPM_TREE_MAX - MLXSW_SP_LPM_TREE_MIN)
67 #define MLXSW_SP_PORT_BASE_SPEED 25000 /* Mb/s */
69 #define MLXSW_SP_BYTES_PER_CELL 96
71 #define MLXSW_SP_BYTES_TO_CELLS(b) DIV_ROUND_UP(b, MLXSW_SP_BYTES_PER_CELL)
72 #define MLXSW_SP_CELLS_TO_BYTES(c) (c * MLXSW_SP_BYTES_PER_CELL)
74 #define MLXSW_SP_KVD_LINEAR_SIZE 65536 /* entries */
75 #define MLXSW_SP_KVD_GRANULARITY 128
77 /* Maximum delay buffer needed in case of PAUSE frames, in cells.
78 * Assumes 100m cable and maximum MTU.
80 #define MLXSW_SP_PAUSE_DELAY 612
82 #define MLXSW_SP_CELL_FACTOR 2 /* 2 * cell_size / (IPG + cell_size + 1) */
84 static inline u16 mlxsw_sp_pfc_delay_get(int mtu, u16 delay)
86 delay = MLXSW_SP_BYTES_TO_CELLS(DIV_ROUND_UP(delay, BITS_PER_BYTE));
87 return MLXSW_SP_CELL_FACTOR * delay + MLXSW_SP_BYTES_TO_CELLS(mtu);
92 struct mlxsw_sp_upper {
93 struct net_device *dev;
94 unsigned int ref_count;
98 void (*leave)(struct mlxsw_sp_port *mlxsw_sp_vport);
99 struct list_head list;
100 unsigned int ref_count;
101 struct net_device *dev;
102 struct mlxsw_sp_rif *r;
106 struct mlxsw_sp_rif {
107 struct net_device *dev;
108 unsigned int ref_count;
109 struct mlxsw_sp_fid *f;
110 unsigned char addr[ETH_ALEN];
115 struct mlxsw_sp_mid {
116 struct list_head list;
117 unsigned char addr[ETH_ALEN];
120 unsigned int ref_count;
123 static inline u16 mlxsw_sp_vfid_to_fid(u16 vfid)
125 return MLXSW_SP_VFID_BASE + vfid;
128 static inline u16 mlxsw_sp_fid_to_vfid(u16 fid)
130 return fid - MLXSW_SP_VFID_BASE;
133 static inline bool mlxsw_sp_fid_is_vfid(u16 fid)
135 return fid >= MLXSW_SP_VFID_BASE && fid < MLXSW_SP_RFID_BASE;
138 static inline bool mlxsw_sp_fid_is_rfid(u16 fid)
140 return fid >= MLXSW_SP_RFID_BASE;
143 static inline u16 mlxsw_sp_rif_sp_to_fid(u16 rif)
145 return MLXSW_SP_RFID_BASE + rif;
148 struct mlxsw_sp_sb_pr {
149 enum mlxsw_reg_sbpr_mode mode;
153 struct mlxsw_cp_sb_occ {
158 struct mlxsw_sp_sb_cm {
162 struct mlxsw_cp_sb_occ occ;
165 struct mlxsw_sp_sb_pm {
168 struct mlxsw_cp_sb_occ occ;
171 #define MLXSW_SP_SB_POOL_COUNT 4
172 #define MLXSW_SP_SB_TC_COUNT 8
175 struct mlxsw_sp_sb_pr prs[2][MLXSW_SP_SB_POOL_COUNT];
177 struct mlxsw_sp_sb_cm cms[2][MLXSW_SP_SB_TC_COUNT];
178 struct mlxsw_sp_sb_pm pms[2][MLXSW_SP_SB_POOL_COUNT];
179 } ports[MLXSW_PORT_MAX_PORTS];
182 #define MLXSW_SP_PREFIX_COUNT (sizeof(struct in6_addr) * BITS_PER_BYTE)
184 struct mlxsw_sp_prefix_usage {
185 DECLARE_BITMAP(b, MLXSW_SP_PREFIX_COUNT);
188 enum mlxsw_sp_l3proto {
189 MLXSW_SP_L3_PROTO_IPV4,
190 MLXSW_SP_L3_PROTO_IPV6,
193 struct mlxsw_sp_lpm_tree {
195 unsigned int ref_count;
196 enum mlxsw_sp_l3proto proto;
197 struct mlxsw_sp_prefix_usage prefix_usage;
203 u16 id; /* virtual router ID */
205 enum mlxsw_sp_l3proto proto;
206 u32 tb_id; /* kernel fib table id */
207 struct mlxsw_sp_lpm_tree *lpm_tree;
208 struct mlxsw_sp_fib *fib;
211 enum mlxsw_sp_span_type {
212 MLXSW_SP_SPAN_EGRESS,
213 MLXSW_SP_SPAN_INGRESS
216 struct mlxsw_sp_span_inspected_port {
217 struct list_head list;
218 enum mlxsw_sp_span_type type;
222 struct mlxsw_sp_span_entry {
225 struct list_head bound_ports_list;
230 enum mlxsw_sp_port_mall_action_type {
231 MLXSW_SP_PORT_MALL_MIRROR,
234 struct mlxsw_sp_port_mall_mirror_tc_entry {
239 struct mlxsw_sp_port_mall_tc_entry {
240 struct list_head list;
241 unsigned long cookie;
242 enum mlxsw_sp_port_mall_action_type type;
244 struct mlxsw_sp_port_mall_mirror_tc_entry mirror;
248 struct mlxsw_sp_router {
249 struct mlxsw_sp_lpm_tree lpm_trees[MLXSW_SP_LPM_TREE_COUNT];
250 struct mlxsw_sp_vr *vrs;
251 struct rhashtable neigh_ht;
253 struct delayed_work dw;
254 unsigned long interval; /* ms */
256 struct delayed_work nexthop_probe_dw;
257 #define MLXSW_SP_UNRESOLVED_NH_PROBE_INTERVAL 5000 /* ms */
258 struct list_head nexthop_group_list;
259 struct list_head nexthop_neighs_list;
265 struct list_head list;
266 DECLARE_BITMAP(mapped, MLXSW_SP_VFID_MAX);
269 struct list_head list;
270 DECLARE_BITMAP(mapped, MLXSW_SP_MID_MAX);
272 struct list_head fids; /* VLAN-aware bridge FIDs */
273 struct mlxsw_sp_rif **rifs;
274 struct mlxsw_sp_port **ports;
275 struct mlxsw_core *core;
276 const struct mlxsw_bus_info *bus_info;
277 unsigned char base_mac[ETH_ALEN];
279 struct delayed_work dw;
280 #define MLXSW_SP_DEFAULT_LEARNING_INTERVAL 100
281 unsigned int interval; /* ms */
283 #define MLXSW_SP_MIN_AGEING_TIME 10
284 #define MLXSW_SP_MAX_AGEING_TIME 1000000
285 #define MLXSW_SP_DEFAULT_AGEING_TIME 300
287 struct mlxsw_sp_upper master_bridge;
288 struct mlxsw_sp_upper *lags;
289 u8 port_to_module[MLXSW_PORT_MAX_PORTS];
290 struct mlxsw_sp_sb sb;
291 struct mlxsw_sp_router router;
293 DECLARE_BITMAP(usage, MLXSW_SP_KVD_LINEAR_SIZE);
297 struct mlxsw_sp_span_entry *entries;
300 struct notifier_block fib_nb;
303 static inline struct mlxsw_sp_upper *
304 mlxsw_sp_lag_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
306 return &mlxsw_sp->lags[lag_id];
309 struct mlxsw_sp_port_pcpu_stats {
314 struct u64_stats_sync syncp;
318 struct mlxsw_sp_port {
319 struct mlxsw_core_port core_port; /* must be first */
320 struct net_device *dev;
321 struct mlxsw_sp_port_pcpu_stats __percpu *pcpu_stats;
322 struct mlxsw_sp *mlxsw_sp;
334 struct list_head list;
335 struct mlxsw_sp_fid *f;
344 struct ieee_ets *ets;
345 struct ieee_maxrate *maxrate;
346 struct ieee_pfc *pfc;
353 /* 802.1Q bridge VLANs */
354 unsigned long *active_vlans;
355 unsigned long *untagged_vlans;
356 /* VLAN interfaces */
357 struct list_head vports_list;
359 struct list_head mall_tc_list;
361 #define MLXSW_HW_STATS_UPDATE_TIME HZ
362 struct rtnl_link_stats64 *cache;
363 struct delayed_work update_dw;
367 struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev);
368 void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port);
371 mlxsw_sp_port_is_pause_en(const struct mlxsw_sp_port *mlxsw_sp_port)
373 return mlxsw_sp_port->link.tx_pause || mlxsw_sp_port->link.rx_pause;
376 static inline struct mlxsw_sp_port *
377 mlxsw_sp_port_lagged_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id, u8 port_index)
379 struct mlxsw_sp_port *mlxsw_sp_port;
382 local_port = mlxsw_core_lag_mapping_get(mlxsw_sp->core,
384 mlxsw_sp_port = mlxsw_sp->ports[local_port];
385 return mlxsw_sp_port && mlxsw_sp_port->lagged ? mlxsw_sp_port : NULL;
389 mlxsw_sp_vport_vid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
391 return mlxsw_sp_vport->vport.vid;
395 mlxsw_sp_port_is_vport(const struct mlxsw_sp_port *mlxsw_sp_port)
397 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
402 static inline void mlxsw_sp_vport_fid_set(struct mlxsw_sp_port *mlxsw_sp_vport,
403 struct mlxsw_sp_fid *f)
405 mlxsw_sp_vport->vport.f = f;
408 static inline struct mlxsw_sp_fid *
409 mlxsw_sp_vport_fid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
411 return mlxsw_sp_vport->vport.f;
414 static inline struct net_device *
415 mlxsw_sp_vport_dev_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
417 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
419 return f ? f->dev : NULL;
422 static inline struct mlxsw_sp_port *
423 mlxsw_sp_port_vport_find(const struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
425 struct mlxsw_sp_port *mlxsw_sp_vport;
427 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
429 if (mlxsw_sp_vport_vid_get(mlxsw_sp_vport) == vid)
430 return mlxsw_sp_vport;
436 static inline struct mlxsw_sp_port *
437 mlxsw_sp_port_vport_find_by_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
440 struct mlxsw_sp_port *mlxsw_sp_vport;
442 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
444 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
446 if (f && f->fid == fid)
447 return mlxsw_sp_vport;
453 static inline struct mlxsw_sp_fid *mlxsw_sp_fid_find(struct mlxsw_sp *mlxsw_sp,
456 struct mlxsw_sp_fid *f;
458 list_for_each_entry(f, &mlxsw_sp->fids, list)
465 static inline struct mlxsw_sp_fid *
466 mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp,
467 const struct net_device *br_dev)
469 struct mlxsw_sp_fid *f;
471 list_for_each_entry(f, &mlxsw_sp->vfids.list, list)
472 if (f->dev == br_dev)
478 static inline struct mlxsw_sp_rif *
479 mlxsw_sp_rif_find_by_dev(const struct mlxsw_sp *mlxsw_sp,
480 const struct net_device *dev)
482 struct mlxsw_resources *resources;
485 resources = mlxsw_core_resources_get(mlxsw_sp->core);
487 for (i = 0; i < resources->max_rif; i++)
488 if (mlxsw_sp->rifs[i] && mlxsw_sp->rifs[i]->dev == dev)
489 return mlxsw_sp->rifs[i];
494 enum mlxsw_sp_flood_table {
495 MLXSW_SP_FLOOD_TABLE_UC,
496 MLXSW_SP_FLOOD_TABLE_BM,
499 int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp);
500 void mlxsw_sp_buffers_fini(struct mlxsw_sp *mlxsw_sp);
501 int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port);
502 int mlxsw_sp_sb_pool_get(struct mlxsw_core *mlxsw_core,
503 unsigned int sb_index, u16 pool_index,
504 struct devlink_sb_pool_info *pool_info);
505 int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
506 unsigned int sb_index, u16 pool_index, u32 size,
507 enum devlink_sb_threshold_type threshold_type);
508 int mlxsw_sp_sb_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
509 unsigned int sb_index, u16 pool_index,
511 int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port,
512 unsigned int sb_index, u16 pool_index,
514 int mlxsw_sp_sb_tc_pool_bind_get(struct mlxsw_core_port *mlxsw_core_port,
515 unsigned int sb_index, u16 tc_index,
516 enum devlink_sb_pool_type pool_type,
517 u16 *p_pool_index, u32 *p_threshold);
518 int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port,
519 unsigned int sb_index, u16 tc_index,
520 enum devlink_sb_pool_type pool_type,
521 u16 pool_index, u32 threshold);
522 int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
523 unsigned int sb_index);
524 int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
525 unsigned int sb_index);
526 int mlxsw_sp_sb_occ_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
527 unsigned int sb_index, u16 pool_index,
528 u32 *p_cur, u32 *p_max);
529 int mlxsw_sp_sb_occ_tc_port_bind_get(struct mlxsw_core_port *mlxsw_core_port,
530 unsigned int sb_index, u16 tc_index,
531 enum devlink_sb_pool_type pool_type,
532 u32 *p_cur, u32 *p_max);
534 int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp);
535 void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp);
536 int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port);
537 void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port);
538 void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port);
539 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
540 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
542 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
543 u16 vid_end, bool is_member, bool untagged);
544 int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
546 void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port);
547 int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid);
548 int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid);
549 int mlxsw_sp_rif_fdb_op(struct mlxsw_sp *mlxsw_sp, const char *mac, u16 fid,
551 struct mlxsw_sp_fid *mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid);
552 void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, struct mlxsw_sp_fid *f);
553 void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
554 struct mlxsw_sp_rif *r);
555 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
556 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
557 bool dwrr, u8 dwrr_weight);
558 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
559 u8 switch_prio, u8 tclass);
560 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
561 u8 *prio_tc, bool pause_en,
562 struct ieee_pfc *my_pfc);
563 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
564 enum mlxsw_reg_qeec_hr hr, u8 index,
565 u8 next_index, u32 maxrate);
566 int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
567 u16 vid_begin, u16 vid_end,
570 #ifdef CONFIG_MLXSW_SPECTRUM_DCB
572 int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port);
573 void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port);
577 static inline int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port)
582 static inline void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port)
587 int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp);
588 void mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp);
589 int mlxsw_sp_router_neigh_construct(struct net_device *dev,
590 struct neighbour *n);
591 void mlxsw_sp_router_neigh_destroy(struct net_device *dev,
592 struct neighbour *n);
593 int mlxsw_sp_router_netevent_event(struct notifier_block *unused,
594 unsigned long event, void *ptr);
596 int mlxsw_sp_kvdl_alloc(struct mlxsw_sp *mlxsw_sp, unsigned int entry_count);
597 void mlxsw_sp_kvdl_free(struct mlxsw_sp *mlxsw_sp, int entry_index);