2 * drivers/net/ethernet/mellanox/mlxsw/core.h
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
40 #include <linux/module.h>
41 #include <linux/device.h>
42 #include <linux/slab.h>
43 #include <linux/gfp.h>
44 #include <linux/types.h>
45 #include <linux/skbuff.h>
46 #include <linux/workqueue.h>
47 #include <net/devlink.h>
52 #include "resources.h"
55 struct mlxsw_core_port;
58 struct mlxsw_bus_info;
60 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core);
62 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core);
64 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver);
65 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver);
67 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
68 const struct mlxsw_bus *mlxsw_bus,
70 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core);
72 struct mlxsw_tx_info {
77 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
78 const struct mlxsw_tx_info *tx_info);
79 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
80 const struct mlxsw_tx_info *tx_info);
82 struct mlxsw_rx_listener {
83 void (*func)(struct sk_buff *skb, u8 local_port, void *priv);
86 enum mlxsw_reg_hpkt_action action;
89 struct mlxsw_event_listener {
90 void (*func)(const struct mlxsw_reg_info *reg,
91 char *payload, void *priv);
92 enum mlxsw_event_trap_id trap_id;
95 struct mlxsw_listener {
98 struct mlxsw_rx_listener rx_listener;
99 struct mlxsw_event_listener event_listener;
101 enum mlxsw_reg_hpkt_action action;
102 enum mlxsw_reg_hpkt_action unreg_action;
104 bool is_ctrl; /* should go via control buffer or not */
108 #define MLXSW_RXL(_func, _trap_id, _action, _is_ctrl, _trap_group, \
111 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
115 .local_port = MLXSW_PORT_DONT_CARE, \
116 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
118 .action = MLXSW_REG_HPKT_ACTION_##_action, \
119 .unreg_action = MLXSW_REG_HPKT_ACTION_##_unreg_action, \
120 .trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \
121 .is_ctrl = _is_ctrl, \
125 #define MLXSW_EVENTL(_func, _trap_id, _trap_group) \
127 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
128 .u.event_listener = \
131 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
133 .action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU, \
134 .trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \
139 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
140 const struct mlxsw_rx_listener *rxl,
142 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
143 const struct mlxsw_rx_listener *rxl,
146 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
147 const struct mlxsw_event_listener *el,
149 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
150 const struct mlxsw_event_listener *el,
153 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
154 const struct mlxsw_listener *listener,
156 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
157 const struct mlxsw_listener *listener,
160 typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload,
161 size_t payload_len, unsigned long cb_priv);
163 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
164 const struct mlxsw_reg_info *reg, char *payload,
165 struct list_head *bulk_list,
166 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
167 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
168 const struct mlxsw_reg_info *reg, char *payload,
169 struct list_head *bulk_list,
170 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
171 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list);
173 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
174 const struct mlxsw_reg_info *reg, char *payload);
175 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
176 const struct mlxsw_reg_info *reg, char *payload);
178 struct mlxsw_rx_info {
188 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
189 struct mlxsw_rx_info *rx_info);
191 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
192 u16 lag_id, u8 port_index, u8 local_port);
193 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
194 u16 lag_id, u8 port_index);
195 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
196 u16 lag_id, u8 local_port);
198 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port);
199 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port);
200 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port);
201 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
202 void *port_driver_priv, struct net_device *dev,
203 bool split, u32 split_group);
204 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
205 void *port_driver_priv);
206 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
207 void *port_driver_priv);
208 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
211 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay);
212 bool mlxsw_core_schedule_work(struct work_struct *work);
213 void mlxsw_core_flush_owq(void);
215 #define MLXSW_CONFIG_PROFILE_SWID_COUNT 8
217 struct mlxsw_swid_config {
224 struct mlxsw_config_profile {
225 u16 used_max_vepa_channels:1,
228 used_max_system_port:1,
229 used_max_vlan_groups:1,
236 used_adaptive_routing_group_cap:1,
237 used_kvd_split_data:1; /* indicate for the kvd's values */
239 u8 max_vepa_channels;
246 u8 max_vid_flood_tables;
248 u8 max_fid_offset_flood_tables;
249 u16 fid_offset_flood_table_size;
250 u8 max_fid_flood_tables;
251 u16 fid_flood_table_size;
255 u16 adaptive_routing_group_cap;
258 u16 kvd_hash_granularity;
259 u8 kvd_hash_single_parts;
260 u8 kvd_hash_double_parts;
261 u8 resource_query_enable;
262 struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
265 struct mlxsw_driver {
266 struct list_head list;
269 int (*init)(struct mlxsw_core *mlxsw_core,
270 const struct mlxsw_bus_info *mlxsw_bus_info);
271 void (*fini)(struct mlxsw_core *mlxsw_core);
272 int (*basic_trap_groups_set)(struct mlxsw_core *mlxsw_core);
273 int (*port_type_set)(struct mlxsw_core *mlxsw_core, u8 local_port,
274 enum devlink_port_type new_type);
275 int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port,
277 int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port);
278 int (*sb_pool_get)(struct mlxsw_core *mlxsw_core,
279 unsigned int sb_index, u16 pool_index,
280 struct devlink_sb_pool_info *pool_info);
281 int (*sb_pool_set)(struct mlxsw_core *mlxsw_core,
282 unsigned int sb_index, u16 pool_index, u32 size,
283 enum devlink_sb_threshold_type threshold_type);
284 int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
285 unsigned int sb_index, u16 pool_index,
287 int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port,
288 unsigned int sb_index, u16 pool_index,
290 int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
291 unsigned int sb_index, u16 tc_index,
292 enum devlink_sb_pool_type pool_type,
293 u16 *p_pool_index, u32 *p_threshold);
294 int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port,
295 unsigned int sb_index, u16 tc_index,
296 enum devlink_sb_pool_type pool_type,
297 u16 pool_index, u32 threshold);
298 int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core,
299 unsigned int sb_index);
300 int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core,
301 unsigned int sb_index);
302 int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
303 unsigned int sb_index, u16 pool_index,
304 u32 *p_cur, u32 *p_max);
305 int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
306 unsigned int sb_index, u16 tc_index,
307 enum devlink_sb_pool_type pool_type,
308 u32 *p_cur, u32 *p_max);
309 void (*txhdr_construct)(struct sk_buff *skb,
310 const struct mlxsw_tx_info *tx_info);
312 const struct mlxsw_config_profile *profile;
315 void mlxsw_core_fw_flash_start(struct mlxsw_core *mlxsw_core);
316 void mlxsw_core_fw_flash_end(struct mlxsw_core *mlxsw_core);
318 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
319 enum mlxsw_res_id res_id);
321 #define MLXSW_CORE_RES_VALID(res, short_res_id) \
322 mlxsw_core_res_valid(res, MLXSW_RES_ID_##short_res_id)
324 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
325 enum mlxsw_res_id res_id);
327 #define MLXSW_CORE_RES_GET(res, short_res_id) \
328 mlxsw_core_res_get(res, MLXSW_RES_ID_##short_res_id)
330 #define MLXSW_BUS_F_TXRX BIT(0)
334 int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
335 const struct mlxsw_config_profile *profile,
336 struct mlxsw_res *res);
337 void (*fini)(void *bus_priv);
338 bool (*skb_transmit_busy)(void *bus_priv,
339 const struct mlxsw_tx_info *tx_info);
340 int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,
341 const struct mlxsw_tx_info *tx_info);
342 int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,
343 u32 in_mod, bool out_mbox_direct,
344 char *in_mbox, size_t in_mbox_size,
345 char *out_mbox, size_t out_mbox_size,
350 struct mlxsw_fw_rev {
356 struct mlxsw_bus_info {
357 const char *device_kind;
358 const char *device_name;
360 struct mlxsw_fw_rev fw_rev;
361 u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
362 u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
367 #ifdef CONFIG_MLXSW_CORE_HWMON
369 int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
370 const struct mlxsw_bus_info *mlxsw_bus_info,
371 struct mlxsw_hwmon **p_hwmon);
372 void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);
376 static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
377 const struct mlxsw_bus_info *mlxsw_bus_info,
378 struct mlxsw_hwmon **p_hwmon)
385 struct mlxsw_thermal;
387 #ifdef CONFIG_MLXSW_CORE_THERMAL
389 int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
390 const struct mlxsw_bus_info *mlxsw_bus_info,
391 struct mlxsw_thermal **p_thermal);
392 void mlxsw_thermal_fini(struct mlxsw_thermal *thermal);
396 static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
397 const struct mlxsw_bus_info *mlxsw_bus_info,
398 struct mlxsw_thermal **p_thermal)
403 static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)