2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/kernel.h>
34 #include <linux/module.h>
35 #include <linux/random.h>
36 #include <linux/vmalloc.h>
37 #include <linux/hardirq.h>
38 #include <linux/mlx5/driver.h>
39 #include <linux/mlx5/cmd.h>
40 #include "mlx5_core.h"
43 MLX5_HEALTH_POLL_INTERVAL = 2 * HZ,
48 MLX5_HEALTH_SYNDR_FW_ERR = 0x1,
49 MLX5_HEALTH_SYNDR_IRISC_ERR = 0x7,
50 MLX5_HEALTH_SYNDR_HW_UNRECOVERABLE_ERR = 0x8,
51 MLX5_HEALTH_SYNDR_CRC_ERR = 0x9,
52 MLX5_HEALTH_SYNDR_FETCH_PCI_ERR = 0xa,
53 MLX5_HEALTH_SYNDR_HW_FTL_ERR = 0xb,
54 MLX5_HEALTH_SYNDR_ASYNC_EQ_OVERRUN_ERR = 0xc,
55 MLX5_HEALTH_SYNDR_EQ_ERR = 0xd,
56 MLX5_HEALTH_SYNDR_EQ_INV = 0xe,
57 MLX5_HEALTH_SYNDR_FFSER_ERR = 0xf,
58 MLX5_HEALTH_SYNDR_HIGH_TEMP = 0x10
62 MLX5_NIC_IFC_FULL = 0,
63 MLX5_NIC_IFC_DISABLED = 1,
64 MLX5_NIC_IFC_NO_DRAM_NIC = 2,
65 MLX5_NIC_IFC_INVALID = 3
69 MLX5_DROP_NEW_HEALTH_WORK,
70 MLX5_DROP_NEW_RECOVERY_WORK,
73 static u8 get_nic_state(struct mlx5_core_dev *dev)
75 return (ioread32be(&dev->iseg->cmdq_addr_l_sz) >> 8) & 3;
78 static void trigger_cmd_completions(struct mlx5_core_dev *dev)
83 /* wait for pending handlers to complete */
84 synchronize_irq(dev->priv.msix_arr[MLX5_EQ_VEC_CMD].vector);
85 spin_lock_irqsave(&dev->cmd.alloc_lock, flags);
86 vector = ~dev->cmd.bitmask & ((1ul << (1 << dev->cmd.log_sz)) - 1);
90 vector |= MLX5_TRIGGERED_CMD_COMP;
91 spin_unlock_irqrestore(&dev->cmd.alloc_lock, flags);
93 mlx5_core_dbg(dev, "vector 0x%llx\n", vector);
94 mlx5_cmd_comp_handler(dev, vector, true);
98 spin_unlock_irqrestore(&dev->cmd.alloc_lock, flags);
101 static int in_fatal(struct mlx5_core_dev *dev)
103 struct mlx5_core_health *health = &dev->priv.health;
104 struct health_buffer __iomem *h = health->health;
106 if (get_nic_state(dev) == MLX5_NIC_IFC_DISABLED)
109 if (ioread32be(&h->fw_ver) == 0xffffffff)
115 void mlx5_enter_error_state(struct mlx5_core_dev *dev)
117 mutex_lock(&dev->intf_state_mutex);
118 if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
121 mlx5_core_err(dev, "start\n");
122 if (pci_channel_offline(dev->pdev) || in_fatal(dev)) {
123 dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR;
124 trigger_cmd_completions(dev);
127 mlx5_core_event(dev, MLX5_DEV_EVENT_SYS_ERROR, 0);
128 mlx5_core_err(dev, "end\n");
131 mutex_unlock(&dev->intf_state_mutex);
134 static void mlx5_handle_bad_state(struct mlx5_core_dev *dev)
136 u8 nic_interface = get_nic_state(dev);
138 switch (nic_interface) {
139 case MLX5_NIC_IFC_FULL:
140 mlx5_core_warn(dev, "Expected to see disabled NIC but it is full driver\n");
143 case MLX5_NIC_IFC_DISABLED:
144 mlx5_core_warn(dev, "starting teardown\n");
147 case MLX5_NIC_IFC_NO_DRAM_NIC:
148 mlx5_core_warn(dev, "Expected to see disabled NIC but it is no dram nic\n");
151 mlx5_core_warn(dev, "Expected to see disabled NIC but it is has invalid value %d\n",
155 mlx5_disable_device(dev);
158 static void health_recover(struct work_struct *work)
160 struct mlx5_core_health *health;
161 struct delayed_work *dwork;
162 struct mlx5_core_dev *dev;
163 struct mlx5_priv *priv;
166 dwork = container_of(work, struct delayed_work, work);
167 health = container_of(dwork, struct mlx5_core_health, recover_work);
168 priv = container_of(health, struct mlx5_priv, health);
169 dev = container_of(priv, struct mlx5_core_dev, priv);
171 nic_state = get_nic_state(dev);
172 if (nic_state == MLX5_NIC_IFC_INVALID) {
173 dev_err(&dev->pdev->dev, "health recovery flow aborted since the nic state is invalid\n");
177 dev_err(&dev->pdev->dev, "starting health recovery flow\n");
178 mlx5_recover_device(dev);
181 /* How much time to wait until health resetting the driver (in msecs) */
182 #define MLX5_RECOVERY_DELAY_MSECS 60000
183 static void health_care(struct work_struct *work)
185 unsigned long recover_delay = msecs_to_jiffies(MLX5_RECOVERY_DELAY_MSECS);
186 struct mlx5_core_health *health;
187 struct mlx5_core_dev *dev;
188 struct mlx5_priv *priv;
190 health = container_of(work, struct mlx5_core_health, work);
191 priv = container_of(health, struct mlx5_priv, health);
192 dev = container_of(priv, struct mlx5_core_dev, priv);
193 mlx5_core_warn(dev, "handling bad device here\n");
194 mlx5_handle_bad_state(dev);
196 spin_lock(&health->wq_lock);
197 if (!test_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags))
198 schedule_delayed_work(&health->recover_work, recover_delay);
200 dev_err(&dev->pdev->dev,
201 "new health works are not permitted at this stage\n");
202 spin_unlock(&health->wq_lock);
205 static const char *hsynd_str(u8 synd)
208 case MLX5_HEALTH_SYNDR_FW_ERR:
209 return "firmware internal error";
210 case MLX5_HEALTH_SYNDR_IRISC_ERR:
211 return "irisc not responding";
212 case MLX5_HEALTH_SYNDR_HW_UNRECOVERABLE_ERR:
213 return "unrecoverable hardware error";
214 case MLX5_HEALTH_SYNDR_CRC_ERR:
215 return "firmware CRC error";
216 case MLX5_HEALTH_SYNDR_FETCH_PCI_ERR:
217 return "ICM fetch PCI error";
218 case MLX5_HEALTH_SYNDR_HW_FTL_ERR:
219 return "HW fatal error\n";
220 case MLX5_HEALTH_SYNDR_ASYNC_EQ_OVERRUN_ERR:
221 return "async EQ buffer overrun";
222 case MLX5_HEALTH_SYNDR_EQ_ERR:
224 case MLX5_HEALTH_SYNDR_EQ_INV:
225 return "Invalid EQ referenced";
226 case MLX5_HEALTH_SYNDR_FFSER_ERR:
227 return "FFSER error";
228 case MLX5_HEALTH_SYNDR_HIGH_TEMP:
229 return "High temperature";
231 return "unrecognized error";
235 static u16 get_maj(u32 fw)
240 static u16 get_min(u32 fw)
242 return fw >> 16 & 0xfff;
245 static u16 get_sub(u32 fw)
250 static void print_health_info(struct mlx5_core_dev *dev)
252 struct mlx5_core_health *health = &dev->priv.health;
253 struct health_buffer __iomem *h = health->health;
258 /* If the syndrom is 0, the device is OK and no need to print buffer */
259 if (!ioread8(&h->synd))
262 for (i = 0; i < ARRAY_SIZE(h->assert_var); i++)
263 dev_err(&dev->pdev->dev, "assert_var[%d] 0x%08x\n", i, ioread32be(h->assert_var + i));
265 dev_err(&dev->pdev->dev, "assert_exit_ptr 0x%08x\n", ioread32be(&h->assert_exit_ptr));
266 dev_err(&dev->pdev->dev, "assert_callra 0x%08x\n", ioread32be(&h->assert_callra));
267 fw = ioread32be(&h->fw_ver);
268 sprintf(fw_str, "%d.%d.%d", get_maj(fw), get_min(fw), get_sub(fw));
269 dev_err(&dev->pdev->dev, "fw_ver %s\n", fw_str);
270 dev_err(&dev->pdev->dev, "hw_id 0x%08x\n", ioread32be(&h->hw_id));
271 dev_err(&dev->pdev->dev, "irisc_index %d\n", ioread8(&h->irisc_index));
272 dev_err(&dev->pdev->dev, "synd 0x%x: %s\n", ioread8(&h->synd), hsynd_str(ioread8(&h->synd)));
273 dev_err(&dev->pdev->dev, "ext_synd 0x%04x\n", ioread16be(&h->ext_synd));
276 static unsigned long get_next_poll_jiffies(void)
280 get_random_bytes(&next, sizeof(next));
282 next += jiffies + MLX5_HEALTH_POLL_INTERVAL;
287 static void poll_health(unsigned long data)
289 struct mlx5_core_dev *dev = (struct mlx5_core_dev *)data;
290 struct mlx5_core_health *health = &dev->priv.health;
293 if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
294 mod_timer(&health->timer, get_next_poll_jiffies());
298 count = ioread32be(health->health_counter);
299 if (count == health->prev)
300 ++health->miss_counter;
302 health->miss_counter = 0;
304 health->prev = count;
305 if (health->miss_counter == MAX_MISSES) {
306 dev_err(&dev->pdev->dev, "device's health compromised - reached miss count\n");
307 print_health_info(dev);
309 mod_timer(&health->timer, get_next_poll_jiffies());
312 if (in_fatal(dev) && !health->sick) {
314 print_health_info(dev);
315 spin_lock(&health->wq_lock);
316 if (!test_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags))
317 queue_work(health->wq, &health->work);
319 dev_err(&dev->pdev->dev,
320 "new health works are not permitted at this stage\n");
321 spin_unlock(&health->wq_lock);
325 void mlx5_start_health_poll(struct mlx5_core_dev *dev)
327 struct mlx5_core_health *health = &dev->priv.health;
329 init_timer(&health->timer);
331 clear_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags);
332 clear_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags);
333 health->health = &dev->iseg->health;
334 health->health_counter = &dev->iseg->health_counter;
336 health->timer.data = (unsigned long)dev;
337 health->timer.function = poll_health;
338 health->timer.expires = round_jiffies(jiffies + MLX5_HEALTH_POLL_INTERVAL);
339 add_timer(&health->timer);
342 void mlx5_stop_health_poll(struct mlx5_core_dev *dev, bool disable_health)
344 struct mlx5_core_health *health = &dev->priv.health;
347 if (disable_health) {
348 spin_lock_irqsave(&health->wq_lock, flags);
349 set_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags);
350 set_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags);
351 spin_unlock_irqrestore(&health->wq_lock, flags);
354 del_timer_sync(&health->timer);
357 void mlx5_drain_health_wq(struct mlx5_core_dev *dev)
359 struct mlx5_core_health *health = &dev->priv.health;
361 spin_lock(&health->wq_lock);
362 set_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags);
363 set_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags);
364 spin_unlock(&health->wq_lock);
365 cancel_delayed_work_sync(&health->recover_work);
366 cancel_work_sync(&health->work);
369 void mlx5_drain_health_recovery(struct mlx5_core_dev *dev)
371 struct mlx5_core_health *health = &dev->priv.health;
374 spin_lock_irqsave(&health->wq_lock, flags);
375 set_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags);
376 spin_unlock_irqrestore(&health->wq_lock, flags);
377 cancel_delayed_work_sync(&dev->priv.health.recover_work);
380 void mlx5_health_cleanup(struct mlx5_core_dev *dev)
382 struct mlx5_core_health *health = &dev->priv.health;
384 destroy_workqueue(health->wq);
387 int mlx5_health_init(struct mlx5_core_dev *dev)
389 struct mlx5_core_health *health;
392 health = &dev->priv.health;
393 name = kmalloc(64, GFP_KERNEL);
397 strcpy(name, "mlx5_health");
398 strcat(name, dev_name(&dev->pdev->dev));
399 health->wq = create_singlethread_workqueue(name);
403 spin_lock_init(&health->wq_lock);
404 INIT_WORK(&health->work, health_care);
405 INIT_DELAYED_WORK(&health->recover_work, health_recover);