2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/etherdevice.h>
34 #include <linux/mlx5/driver.h>
35 #include <linux/mlx5/mlx5_ifc.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/fs.h>
38 #include "mlx5_core.h"
46 struct mlx5_flow_rule *
47 mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
48 struct mlx5_flow_spec *spec,
49 struct mlx5_esw_flow_attr *attr)
51 struct mlx5_flow_destination dest = { 0 };
52 struct mlx5_fc *counter = NULL;
53 struct mlx5_flow_rule *rule;
57 if (esw->mode != SRIOV_OFFLOADS)
58 return ERR_PTR(-EOPNOTSUPP);
60 /* per flow vlan pop/push is emulated, don't set that into the firmware */
61 action = attr->action & ~(MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH | MLX5_FLOW_CONTEXT_ACTION_VLAN_POP);
63 if (action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
64 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
65 dest.vport_num = attr->out_rep->vport;
66 action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
67 } else if (action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
68 counter = mlx5_fc_create(esw->dev, true);
70 return ERR_CAST(counter);
71 dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
72 dest.counter = counter;
75 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
76 MLX5_SET(fte_match_set_misc, misc, source_port, attr->in_rep->vport);
78 misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
79 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
81 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS |
82 MLX5_MATCH_MISC_PARAMETERS;
84 rule = mlx5_add_flow_rule((struct mlx5_flow_table *)esw->fdb_table.fdb,
85 spec, action, 0, &dest);
88 mlx5_fc_destroy(esw->dev, counter);
93 static int esw_set_global_vlan_pop(struct mlx5_eswitch *esw, u8 val)
95 struct mlx5_eswitch_rep *rep;
96 int vf_vport, err = 0;
98 esw_debug(esw->dev, "%s applying global %s policy\n", __func__, val ? "pop" : "none");
99 for (vf_vport = 1; vf_vport < esw->enabled_vports; vf_vport++) {
100 rep = &esw->offloads.vport_reps[vf_vport];
104 err = __mlx5_eswitch_set_vport_vlan(esw, rep->vport, 0, 0, val);
113 static struct mlx5_eswitch_rep *
114 esw_vlan_action_get_vport(struct mlx5_esw_flow_attr *attr, bool push, bool pop)
116 struct mlx5_eswitch_rep *in_rep, *out_rep, *vport = NULL;
118 in_rep = attr->in_rep;
119 out_rep = attr->out_rep;
131 static int esw_add_vlan_action_check(struct mlx5_esw_flow_attr *attr,
132 bool push, bool pop, bool fwd)
134 struct mlx5_eswitch_rep *in_rep, *out_rep;
136 if ((push || pop) && !fwd)
139 in_rep = attr->in_rep;
140 out_rep = attr->out_rep;
142 if (push && in_rep->vport == FDB_UPLINK_VPORT)
145 if (pop && out_rep->vport == FDB_UPLINK_VPORT)
148 /* vport has vlan push configured, can't offload VF --> wire rules w.o it */
149 if (!push && !pop && fwd)
150 if (in_rep->vlan && out_rep->vport == FDB_UPLINK_VPORT)
153 /* protects against (1) setting rules with different vlans to push and
154 * (2) setting rules w.o vlans (attr->vlan = 0) && w. vlans to push (!= 0)
156 if (push && in_rep->vlan_refcount && (in_rep->vlan != attr->vlan))
165 int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
166 struct mlx5_esw_flow_attr *attr)
168 struct offloads_fdb *offloads = &esw->fdb_table.offloads;
169 struct mlx5_eswitch_rep *vport = NULL;
173 push = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH);
174 pop = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP);
175 fwd = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST);
177 err = esw_add_vlan_action_check(attr, push, pop, fwd);
181 attr->vlan_handled = false;
183 vport = esw_vlan_action_get_vport(attr, push, pop);
185 if (!push && !pop && fwd) {
186 /* tracks VF --> wire rules without vlan push action */
187 if (attr->out_rep->vport == FDB_UPLINK_VPORT) {
188 vport->vlan_refcount++;
189 attr->vlan_handled = true;
198 if (!(offloads->vlan_push_pop_refcount)) {
199 /* it's the 1st vlan rule, apply global vlan pop policy */
200 err = esw_set_global_vlan_pop(esw, SET_VLAN_STRIP);
204 offloads->vlan_push_pop_refcount++;
207 if (vport->vlan_refcount)
210 err = __mlx5_eswitch_set_vport_vlan(esw, vport->vport, attr->vlan, 0,
211 SET_VLAN_INSERT | SET_VLAN_STRIP);
214 vport->vlan = attr->vlan;
216 vport->vlan_refcount++;
220 attr->vlan_handled = true;
224 int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
225 struct mlx5_esw_flow_attr *attr)
227 struct offloads_fdb *offloads = &esw->fdb_table.offloads;
228 struct mlx5_eswitch_rep *vport = NULL;
232 if (!attr->vlan_handled)
235 push = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH);
236 pop = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP);
237 fwd = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST);
239 vport = esw_vlan_action_get_vport(attr, push, pop);
241 if (!push && !pop && fwd) {
242 /* tracks VF --> wire rules without vlan push action */
243 if (attr->out_rep->vport == FDB_UPLINK_VPORT)
244 vport->vlan_refcount--;
250 vport->vlan_refcount--;
251 if (vport->vlan_refcount)
252 goto skip_unset_push;
255 err = __mlx5_eswitch_set_vport_vlan(esw, vport->vport,
256 0, 0, SET_VLAN_STRIP);
262 offloads->vlan_push_pop_refcount--;
263 if (offloads->vlan_push_pop_refcount)
266 /* no more vlan rules, stop global vlan pop policy */
267 err = esw_set_global_vlan_pop(esw, 0);
273 static struct mlx5_flow_rule *
274 mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *esw, int vport, u32 sqn)
276 struct mlx5_flow_destination dest;
277 struct mlx5_flow_rule *flow_rule;
278 struct mlx5_flow_spec *spec;
281 spec = mlx5_vzalloc(sizeof(*spec));
283 esw_warn(esw->dev, "FDB: Failed to alloc match parameters\n");
284 flow_rule = ERR_PTR(-ENOMEM);
288 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
289 MLX5_SET(fte_match_set_misc, misc, source_sqn, sqn);
290 MLX5_SET(fte_match_set_misc, misc, source_port, 0x0); /* source vport is 0 */
292 misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
293 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_sqn);
294 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
296 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS;
297 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
298 dest.vport_num = vport;
300 flow_rule = mlx5_add_flow_rule(esw->fdb_table.offloads.fdb, spec,
301 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,
303 if (IS_ERR(flow_rule))
304 esw_warn(esw->dev, "FDB: Failed to add send to vport rule err %ld\n", PTR_ERR(flow_rule));
310 void mlx5_eswitch_sqs2vport_stop(struct mlx5_eswitch *esw,
311 struct mlx5_eswitch_rep *rep)
313 struct mlx5_esw_sq *esw_sq, *tmp;
315 if (esw->mode != SRIOV_OFFLOADS)
318 list_for_each_entry_safe(esw_sq, tmp, &rep->vport_sqs_list, list) {
319 mlx5_del_flow_rule(esw_sq->send_to_vport_rule);
320 list_del(&esw_sq->list);
325 int mlx5_eswitch_sqs2vport_start(struct mlx5_eswitch *esw,
326 struct mlx5_eswitch_rep *rep,
327 u16 *sqns_array, int sqns_num)
329 struct mlx5_flow_rule *flow_rule;
330 struct mlx5_esw_sq *esw_sq;
334 if (esw->mode != SRIOV_OFFLOADS)
337 for (i = 0; i < sqns_num; i++) {
338 esw_sq = kzalloc(sizeof(*esw_sq), GFP_KERNEL);
344 /* Add re-inject rule to the PF/representor sqs */
345 flow_rule = mlx5_eswitch_add_send_to_vport_rule(esw,
348 if (IS_ERR(flow_rule)) {
349 err = PTR_ERR(flow_rule);
353 esw_sq->send_to_vport_rule = flow_rule;
354 list_add(&esw_sq->list, &rep->vport_sqs_list);
359 mlx5_eswitch_sqs2vport_stop(esw, rep);
363 static int esw_add_fdb_miss_rule(struct mlx5_eswitch *esw)
365 struct mlx5_flow_destination dest;
366 struct mlx5_flow_rule *flow_rule = NULL;
367 struct mlx5_flow_spec *spec;
370 spec = mlx5_vzalloc(sizeof(*spec));
372 esw_warn(esw->dev, "FDB: Failed to alloc match parameters\n");
377 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
380 flow_rule = mlx5_add_flow_rule(esw->fdb_table.offloads.fdb, spec,
381 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,
383 if (IS_ERR(flow_rule)) {
384 err = PTR_ERR(flow_rule);
385 esw_warn(esw->dev, "FDB: Failed to add miss flow rule err %d\n", err);
389 esw->fdb_table.offloads.miss_rule = flow_rule;
395 #define MAX_PF_SQ 256
396 #define ESW_OFFLOADS_NUM_ENTRIES (1 << 13) /* 8K */
397 #define ESW_OFFLOADS_NUM_GROUPS 4
399 static int esw_create_offloads_fdb_table(struct mlx5_eswitch *esw, int nvports)
401 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
402 struct mlx5_core_dev *dev = esw->dev;
403 struct mlx5_flow_namespace *root_ns;
404 struct mlx5_flow_table *fdb = NULL;
405 struct mlx5_flow_group *g;
407 void *match_criteria;
408 int table_size, ix, err = 0;
410 flow_group_in = mlx5_vzalloc(inlen);
414 root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
416 esw_warn(dev, "Failed to get FDB flow namespace\n");
421 esw_debug(dev, "Create offloads FDB table, log_max_size(%d)\n",
422 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
424 fdb = mlx5_create_auto_grouped_flow_table(root_ns, FDB_FAST_PATH,
425 ESW_OFFLOADS_NUM_ENTRIES,
426 ESW_OFFLOADS_NUM_GROUPS, 0);
429 esw_warn(dev, "Failed to create Fast path FDB Table err %d\n", err);
432 esw->fdb_table.fdb = fdb;
434 table_size = nvports + MAX_PF_SQ + 1;
435 fdb = mlx5_create_flow_table(root_ns, FDB_SLOW_PATH, table_size, 0);
438 esw_warn(dev, "Failed to create slow path FDB Table err %d\n", err);
441 esw->fdb_table.offloads.fdb = fdb;
443 /* create send-to-vport group */
444 memset(flow_group_in, 0, inlen);
445 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
446 MLX5_MATCH_MISC_PARAMETERS);
448 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
450 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_sqn);
451 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_port);
453 ix = nvports + MAX_PF_SQ;
454 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
455 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, ix - 1);
457 g = mlx5_create_flow_group(fdb, flow_group_in);
460 esw_warn(dev, "Failed to create send-to-vport flow group err(%d)\n", err);
463 esw->fdb_table.offloads.send_to_vport_grp = g;
465 /* create miss group */
466 memset(flow_group_in, 0, inlen);
467 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, 0);
469 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, ix);
470 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, ix + 1);
472 g = mlx5_create_flow_group(fdb, flow_group_in);
475 esw_warn(dev, "Failed to create miss flow group err(%d)\n", err);
478 esw->fdb_table.offloads.miss_grp = g;
480 err = esw_add_fdb_miss_rule(esw);
487 mlx5_destroy_flow_group(esw->fdb_table.offloads.miss_grp);
489 mlx5_destroy_flow_group(esw->fdb_table.offloads.send_to_vport_grp);
491 mlx5_destroy_flow_table(esw->fdb_table.offloads.fdb);
493 mlx5_destroy_flow_table(esw->fdb_table.fdb);
496 kvfree(flow_group_in);
500 static void esw_destroy_offloads_fdb_table(struct mlx5_eswitch *esw)
502 if (!esw->fdb_table.fdb)
505 esw_debug(esw->dev, "Destroy offloads FDB Table\n");
506 mlx5_del_flow_rule(esw->fdb_table.offloads.miss_rule);
507 mlx5_destroy_flow_group(esw->fdb_table.offloads.send_to_vport_grp);
508 mlx5_destroy_flow_group(esw->fdb_table.offloads.miss_grp);
510 mlx5_destroy_flow_table(esw->fdb_table.offloads.fdb);
511 mlx5_destroy_flow_table(esw->fdb_table.fdb);
514 static int esw_create_offloads_table(struct mlx5_eswitch *esw)
516 struct mlx5_flow_namespace *ns;
517 struct mlx5_flow_table *ft_offloads;
518 struct mlx5_core_dev *dev = esw->dev;
521 ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_OFFLOADS);
523 esw_warn(esw->dev, "Failed to get offloads flow namespace\n");
527 ft_offloads = mlx5_create_flow_table(ns, 0, dev->priv.sriov.num_vfs + 2, 0);
528 if (IS_ERR(ft_offloads)) {
529 err = PTR_ERR(ft_offloads);
530 esw_warn(esw->dev, "Failed to create offloads table, err %d\n", err);
534 esw->offloads.ft_offloads = ft_offloads;
538 static void esw_destroy_offloads_table(struct mlx5_eswitch *esw)
540 struct mlx5_esw_offload *offloads = &esw->offloads;
542 mlx5_destroy_flow_table(offloads->ft_offloads);
545 static int esw_create_vport_rx_group(struct mlx5_eswitch *esw)
547 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
548 struct mlx5_flow_group *g;
549 struct mlx5_priv *priv = &esw->dev->priv;
551 void *match_criteria, *misc;
553 int nvports = priv->sriov.num_vfs + 2;
555 flow_group_in = mlx5_vzalloc(inlen);
559 /* create vport rx group */
560 memset(flow_group_in, 0, inlen);
561 MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
562 MLX5_MATCH_MISC_PARAMETERS);
564 match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);
565 misc = MLX5_ADDR_OF(fte_match_param, match_criteria, misc_parameters);
566 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
568 MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 0);
569 MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, nvports - 1);
571 g = mlx5_create_flow_group(esw->offloads.ft_offloads, flow_group_in);
575 mlx5_core_warn(esw->dev, "Failed to create vport rx group err %d\n", err);
579 esw->offloads.vport_rx_group = g;
581 kfree(flow_group_in);
585 static void esw_destroy_vport_rx_group(struct mlx5_eswitch *esw)
587 mlx5_destroy_flow_group(esw->offloads.vport_rx_group);
590 struct mlx5_flow_rule *
591 mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, int vport, u32 tirn)
593 struct mlx5_flow_destination dest;
594 struct mlx5_flow_rule *flow_rule;
595 struct mlx5_flow_spec *spec;
598 spec = mlx5_vzalloc(sizeof(*spec));
600 esw_warn(esw->dev, "Failed to alloc match parameters\n");
601 flow_rule = ERR_PTR(-ENOMEM);
605 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
606 MLX5_SET(fte_match_set_misc, misc, source_port, vport);
608 misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
609 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);
611 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS;
612 dest.type = MLX5_FLOW_DESTINATION_TYPE_TIR;
615 flow_rule = mlx5_add_flow_rule(esw->offloads.ft_offloads, spec,
616 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,
618 if (IS_ERR(flow_rule)) {
619 esw_warn(esw->dev, "fs offloads: Failed to add vport rx rule err %ld\n", PTR_ERR(flow_rule));
628 static int esw_offloads_start(struct mlx5_eswitch *esw)
630 int err, err1, num_vfs = esw->dev->priv.sriov.num_vfs;
632 if (esw->mode != SRIOV_LEGACY) {
633 esw_warn(esw->dev, "Can't set offloads mode, SRIOV legacy not enabled\n");
637 mlx5_eswitch_disable_sriov(esw);
638 err = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_OFFLOADS);
640 esw_warn(esw->dev, "Failed setting eswitch to offloads, err %d\n", err);
641 err1 = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_LEGACY);
643 esw_warn(esw->dev, "Failed setting eswitch back to legacy, err %d\n", err1);
648 int esw_offloads_init(struct mlx5_eswitch *esw, int nvports)
650 struct mlx5_eswitch_rep *rep;
654 /* disable PF RoCE so missed packets don't go through RoCE steering */
655 mlx5_dev_list_lock();
656 mlx5_remove_dev_by_protocol(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
657 mlx5_dev_list_unlock();
659 err = esw_create_offloads_fdb_table(esw, nvports);
663 err = esw_create_offloads_table(esw);
667 err = esw_create_vport_rx_group(esw);
671 for (vport = 0; vport < nvports; vport++) {
672 rep = &esw->offloads.vport_reps[vport];
676 err = rep->load(esw, rep);
684 for (vport--; vport >= 0; vport--) {
685 rep = &esw->offloads.vport_reps[vport];
688 rep->unload(esw, rep);
690 esw_destroy_vport_rx_group(esw);
693 esw_destroy_offloads_table(esw);
696 esw_destroy_offloads_fdb_table(esw);
699 /* enable back PF RoCE */
700 mlx5_dev_list_lock();
701 mlx5_add_dev_by_protocol(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
702 mlx5_dev_list_unlock();
707 static int esw_offloads_stop(struct mlx5_eswitch *esw)
709 int err, err1, num_vfs = esw->dev->priv.sriov.num_vfs;
711 mlx5_eswitch_disable_sriov(esw);
712 err = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_LEGACY);
714 esw_warn(esw->dev, "Failed setting eswitch to legacy, err %d\n", err);
715 err1 = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_OFFLOADS);
717 esw_warn(esw->dev, "Failed setting eswitch back to offloads, err %d\n", err);
720 /* enable back PF RoCE */
721 mlx5_dev_list_lock();
722 mlx5_add_dev_by_protocol(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
723 mlx5_dev_list_unlock();
728 void esw_offloads_cleanup(struct mlx5_eswitch *esw, int nvports)
730 struct mlx5_eswitch_rep *rep;
733 for (vport = 0; vport < nvports; vport++) {
734 rep = &esw->offloads.vport_reps[vport];
737 rep->unload(esw, rep);
740 esw_destroy_vport_rx_group(esw);
741 esw_destroy_offloads_table(esw);
742 esw_destroy_offloads_fdb_table(esw);
745 static int esw_mode_from_devlink(u16 mode, u16 *mlx5_mode)
748 case DEVLINK_ESWITCH_MODE_LEGACY:
749 *mlx5_mode = SRIOV_LEGACY;
751 case DEVLINK_ESWITCH_MODE_SWITCHDEV:
752 *mlx5_mode = SRIOV_OFFLOADS;
761 static int esw_mode_to_devlink(u16 mlx5_mode, u16 *mode)
765 *mode = DEVLINK_ESWITCH_MODE_LEGACY;
768 *mode = DEVLINK_ESWITCH_MODE_SWITCHDEV;
777 int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode)
779 struct mlx5_core_dev *dev;
780 u16 cur_mlx5_mode, mlx5_mode = 0;
782 dev = devlink_priv(devlink);
784 if (!MLX5_CAP_GEN(dev, vport_group_manager))
787 cur_mlx5_mode = dev->priv.eswitch->mode;
789 if (cur_mlx5_mode == SRIOV_NONE)
792 if (esw_mode_from_devlink(mode, &mlx5_mode))
795 if (cur_mlx5_mode == mlx5_mode)
798 if (mode == DEVLINK_ESWITCH_MODE_SWITCHDEV)
799 return esw_offloads_start(dev->priv.eswitch);
800 else if (mode == DEVLINK_ESWITCH_MODE_LEGACY)
801 return esw_offloads_stop(dev->priv.eswitch);
806 int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode)
808 struct mlx5_core_dev *dev;
810 dev = devlink_priv(devlink);
812 if (!MLX5_CAP_GEN(dev, vport_group_manager))
815 if (dev->priv.eswitch->mode == SRIOV_NONE)
818 return esw_mode_to_devlink(dev->priv.eswitch->mode, mode);
821 void mlx5_eswitch_register_vport_rep(struct mlx5_eswitch *esw,
823 struct mlx5_eswitch_rep *__rep)
825 struct mlx5_esw_offload *offloads = &esw->offloads;
826 struct mlx5_eswitch_rep *rep;
828 rep = &offloads->vport_reps[vport_index];
830 memset(rep, 0, sizeof(*rep));
832 rep->load = __rep->load;
833 rep->unload = __rep->unload;
834 rep->vport = __rep->vport;
835 rep->priv_data = __rep->priv_data;
836 ether_addr_copy(rep->hw_id, __rep->hw_id);
838 INIT_LIST_HEAD(&rep->vport_sqs_list);
842 void mlx5_eswitch_unregister_vport_rep(struct mlx5_eswitch *esw,
845 struct mlx5_esw_offload *offloads = &esw->offloads;
846 struct mlx5_eswitch_rep *rep;
848 rep = &offloads->vport_reps[vport_index];
850 if (esw->mode == SRIOV_OFFLOADS && esw->vports[vport_index].enabled)
851 rep->unload(esw, rep);