drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

   1 /*
   2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include "en.h"
  34
  35 static void mlx5e_get_drvinfo(struct net_device *dev,
  36                               struct ethtool_drvinfo *drvinfo)
  37 {
  38         struct mlx5e_priv *priv = netdev_priv(dev);
  39         struct mlx5_core_dev *mdev = priv->mdev;
  40
  41         strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
  42         strlcpy(drvinfo->version, DRIVER_VERSION " (" DRIVER_RELDATE ")",
  43                 sizeof(drvinfo->version));
  44         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  45                  "%d.%d.%d",
  46                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev));
  47         strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
  48                 sizeof(drvinfo->bus_info));
  49 }
  50
  51 struct ptys2ethtool_config {
  52         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  53         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
  54         u32 speed;
  55 };
  56
  57 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
  58
  59 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...)               \
  60         ({                                                              \
  61                 struct ptys2ethtool_config *cfg;                        \
  62                 const unsigned int modes[] = { __VA_ARGS__ };           \
  63                 unsigned int i;                                         \
  64                 cfg = &ptys2ethtool_table[reg_];                        \
  65                 cfg->speed = speed_;                                    \
  66                 bitmap_zero(cfg->supported,                             \
  67                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  68                 bitmap_zero(cfg->advertised,                            \
  69                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  70                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
  71                         __set_bit(modes[i], cfg->supported);            \
  72                         __set_bit(modes[i], cfg->advertised);           \
  73                 }                                                       \
  74         })
  75
  76 void mlx5e_build_ptys2ethtool_map(void)
  77 {
  78         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, SPEED_1000,
  79                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  80         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, SPEED_1000,
  81                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  82         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, SPEED_10000,
  83                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
  84         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, SPEED_10000,
  85                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
  86         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, SPEED_10000,
  87                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
  88         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, SPEED_20000,
  89                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
  90         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, SPEED_40000,
  91                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
  92         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, SPEED_40000,
  93                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
  94         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, SPEED_56000,
  95                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
  96         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, SPEED_10000,
  97                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
  98         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, SPEED_10000,
  99                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 100         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, SPEED_10000,
 101                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 102         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, SPEED_40000,
 103                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
 104         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, SPEED_40000,
 105                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 106         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, SPEED_50000,
 107                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 108         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, SPEED_100000,
 109                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
 110         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, SPEED_100000,
 111                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
 112         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, SPEED_100000,
 113                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
 114         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, SPEED_100000,
 115                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 116         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, SPEED_10000,
 117                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
 118         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, SPEED_25000,
 119                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
 120         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, SPEED_25000,
 121                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
 122         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, SPEED_25000,
 123                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 124         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, SPEED_50000,
 125                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
 126         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, SPEED_50000,
 127                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
 128 }
 129
 130 static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv)
 131 {
 132         struct mlx5_core_dev *mdev = priv->mdev;
 133         u8 pfc_en_tx;
 134         u8 pfc_en_rx;
 135         int err;
 136
 137         err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx);
 138
 139         return err ? 0 : pfc_en_tx | pfc_en_rx;
 140 }
 141
 142 static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv)
 143 {
 144         struct mlx5_core_dev *mdev = priv->mdev;
 145         u32 rx_pause;
 146         u32 tx_pause;
 147         int err;
 148
 149         err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
 150
 151         return err ? false : rx_pause | tx_pause;
 152 }
 153
 154 #define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter))
 155 #define MLX5E_NUM_RQ_STATS(priv) \
 156         (NUM_RQ_STATS * priv->params.num_channels * \
 157          test_bit(MLX5E_STATE_OPENED, &priv->state))
 158 #define MLX5E_NUM_SQ_STATS(priv) \
 159         (NUM_SQ_STATS * priv->params.num_channels * priv->params.num_tc * \
 160          test_bit(MLX5E_STATE_OPENED, &priv->state))
 161 #define MLX5E_NUM_PFC_COUNTERS(priv) \
 162         ((mlx5e_query_global_pause_combined(priv) + hweight8(mlx5e_query_pfc_combined(priv))) * \
 163           NUM_PPORT_PER_PRIO_PFC_COUNTERS)
 164
 165 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
 166 {
 167         struct mlx5e_priv *priv = netdev_priv(dev);
 168
 169         switch (sset) {
 170         case ETH_SS_STATS:
 171                 return NUM_SW_COUNTERS +
 172                        MLX5E_NUM_Q_CNTRS(priv) +
 173                        NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS +
 174                        MLX5E_NUM_RQ_STATS(priv) +
 175                        MLX5E_NUM_SQ_STATS(priv) +
 176                        MLX5E_NUM_PFC_COUNTERS(priv);
 177         case ETH_SS_PRIV_FLAGS:
 178                 return ARRAY_SIZE(mlx5e_priv_flags);
 179         /* fallthrough */
 180         default:
 181                 return -EOPNOTSUPP;
 182         }
 183 }
 184
 185 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
 186 {
 187         int i, j, tc, prio, idx = 0;
 188         unsigned long pfc_combined;
 189
 190         /* SW counters */
 191         for (i = 0; i < NUM_SW_COUNTERS; i++)
 192                 strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format);
 193
 194         /* Q counters */
 195         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
 196                 strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].format);
 197
 198         /* VPORT counters */
 199         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
 200                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 201                        vport_stats_desc[i].format);
 202
 203         /* PPORT counters */
 204         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
 205                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 206                        pport_802_3_stats_desc[i].format);
 207
 208         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
 209                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 210                        pport_2863_stats_desc[i].format);
 211
 212         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
 213                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 214                        pport_2819_stats_desc[i].format);
 215
 216         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
 217                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
 218                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
 219                                 pport_per_prio_traffic_stats_desc[i].format, prio);
 220         }
 221
 222         pfc_combined = mlx5e_query_pfc_combined(priv);
 223         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
 224                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
 225                         char pfc_string[ETH_GSTRING_LEN];
 226
 227                         snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio);
 228                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
 229                                 pport_per_prio_pfc_stats_desc[i].format, pfc_string);
 230                 }
 231         }
 232
 233         if (mlx5e_query_global_pause_combined(priv)) {
 234                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
 235                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
 236                                 pport_per_prio_pfc_stats_desc[i].format, "global");
 237                 }
 238         }
 239
 240         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
 241                 return;
 242
 243         /* per channel counters */
 244         for (i = 0; i < priv->params.num_channels; i++)
 245                 for (j = 0; j < NUM_RQ_STATS; j++)
 246                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
 247                                 rq_stats_desc[j].format, i);
 248
 249         for (tc = 0; tc < priv->params.num_tc; tc++)
 250                 for (i = 0; i < priv->params.num_channels; i++)
 251                         for (j = 0; j < NUM_SQ_STATS; j++)
 252                                 sprintf(data + (idx++) * ETH_GSTRING_LEN,
 253                                         sq_stats_desc[j].format,
 254                                         priv->channeltc_to_txq_map[i][tc]);
 255 }
 256
 257 static void mlx5e_get_strings(struct net_device *dev,
 258                               uint32_t stringset, uint8_t *data)
 259 {
 260         struct mlx5e_priv *priv = netdev_priv(dev);
 261         int i;
 262
 263         switch (stringset) {
 264         case ETH_SS_PRIV_FLAGS:
 265                 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
 266                         strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
 267                 break;
 268
 269         case ETH_SS_TEST:
 270                 break;
 271
 272         case ETH_SS_STATS:
 273                 mlx5e_fill_stats_strings(priv, data);
 274                 break;
 275         }
 276 }
 277
 278 static void mlx5e_get_ethtool_stats(struct net_device *dev,
 279                                     struct ethtool_stats *stats, u64 *data)
 280 {
 281         struct mlx5e_priv *priv = netdev_priv(dev);
 282         int i, j, tc, prio, idx = 0;
 283         unsigned long pfc_combined;
 284
 285         if (!data)
 286                 return;
 287
 288         mutex_lock(&priv->state_lock);
 289         if (test_bit(MLX5E_STATE_OPENED, &priv->state))
 290                 mlx5e_update_stats(priv);
 291         mutex_unlock(&priv->state_lock);
 292
 293         for (i = 0; i < NUM_SW_COUNTERS; i++)
 294                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw,
 295                                                    sw_stats_desc, i);
 296
 297         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
 298                 data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
 299                                                    q_stats_desc, i);
 300
 301         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
 302                 data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out,
 303                                                   vport_stats_desc, i);
 304
 305         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
 306                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters,
 307                                                   pport_802_3_stats_desc, i);
 308
 309         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
 310                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters,
 311                                                   pport_2863_stats_desc, i);
 312
 313         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
 314                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters,
 315                                                   pport_2819_stats_desc, i);
 316
 317         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
 318                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
 319                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
 320                                                  pport_per_prio_traffic_stats_desc, i);
 321         }
 322
 323         pfc_combined = mlx5e_query_pfc_combined(priv);
 324         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
 325                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
 326                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
 327                                                           pport_per_prio_pfc_stats_desc, i);
 328                 }
 329         }
 330
 331         if (mlx5e_query_global_pause_combined(priv)) {
 332                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
 333                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0],
 334                                                           pport_per_prio_pfc_stats_desc, i);
 335                 }
 336         }
 337
 338         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
 339                 return;
 340
 341         /* per channel counters */
 342         for (i = 0; i < priv->params.num_channels; i++)
 343                 for (j = 0; j < NUM_RQ_STATS; j++)
 344                         data[idx++] =
 345                                MLX5E_READ_CTR64_CPU(&priv->channel[i]->rq.stats,
 346                                                     rq_stats_desc, j);
 347
 348         for (tc = 0; tc < priv->params.num_tc; tc++)
 349                 for (i = 0; i < priv->params.num_channels; i++)
 350                         for (j = 0; j < NUM_SQ_STATS; j++)
 351                                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->channel[i]->sq[tc].stats,
 352                                                                    sq_stats_desc, j);
 353 }
 354
 355 static u32 mlx5e_rx_wqes_to_packets(struct mlx5e_priv *priv, int rq_wq_type,
 356                                     int num_wqe)
 357 {
 358         int packets_per_wqe;
 359         int stride_size;
 360         int num_strides;
 361         int wqe_size;
 362
 363         if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
 364                 return num_wqe;
 365
 366         stride_size = 1 << priv->params.mpwqe_log_stride_sz;
 367         num_strides = 1 << priv->params.mpwqe_log_num_strides;
 368         wqe_size = stride_size * num_strides;
 369
 370         packets_per_wqe = wqe_size /
 371                           ALIGN(ETH_DATA_LEN, stride_size);
 372         return (1 << (order_base_2(num_wqe * packets_per_wqe) - 1));
 373 }
 374
 375 static u32 mlx5e_packets_to_rx_wqes(struct mlx5e_priv *priv, int rq_wq_type,
 376                                     int num_packets)
 377 {
 378         int packets_per_wqe;
 379         int stride_size;
 380         int num_strides;
 381         int wqe_size;
 382         int num_wqes;
 383
 384         if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
 385                 return num_packets;
 386
 387         stride_size = 1 << priv->params.mpwqe_log_stride_sz;
 388         num_strides = 1 << priv->params.mpwqe_log_num_strides;
 389         wqe_size = stride_size * num_strides;
 390
 391         num_packets = (1 << order_base_2(num_packets));
 392
 393         packets_per_wqe = wqe_size /
 394                           ALIGN(ETH_DATA_LEN, stride_size);
 395         num_wqes = DIV_ROUND_UP(num_packets, packets_per_wqe);
 396         return 1 << (order_base_2(num_wqes));
 397 }
 398
 399 static void mlx5e_get_ringparam(struct net_device *dev,
 400                                 struct ethtool_ringparam *param)
 401 {
 402         struct mlx5e_priv *priv = netdev_priv(dev);
 403         int rq_wq_type = priv->params.rq_wq_type;
 404
 405         param->rx_max_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
 406                                                          1 << mlx5_max_log_rq_size(rq_wq_type));
 407         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
 408         param->rx_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
 409                                                      1 << priv->params.log_rq_size);
 410         param->tx_pending     = 1 << priv->params.log_sq_size;
 411 }
 412
 413 static int mlx5e_set_ringparam(struct net_device *dev,
 414                                struct ethtool_ringparam *param)
 415 {
 416         struct mlx5e_priv *priv = netdev_priv(dev);
 417         bool was_opened;
 418         int rq_wq_type = priv->params.rq_wq_type;
 419         u32 rx_pending_wqes;
 420         u32 min_rq_size;
 421         u32 max_rq_size;
 422         u16 min_rx_wqes;
 423         u8 log_rq_size;
 424         u8 log_sq_size;
 425         u32 num_mtts;
 426         int err = 0;
 427
 428         if (param->rx_jumbo_pending) {
 429                 netdev_info(dev, "%s: rx_jumbo_pending not supported\n",
 430                             __func__);
 431                 return -EINVAL;
 432         }
 433         if (param->rx_mini_pending) {
 434                 netdev_info(dev, "%s: rx_mini_pending not supported\n",
 435                             __func__);
 436                 return -EINVAL;
 437         }
 438
 439         min_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
 440                                                1 << mlx5_min_log_rq_size(rq_wq_type));
 441         max_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
 442                                                1 << mlx5_max_log_rq_size(rq_wq_type));
 443         rx_pending_wqes = mlx5e_packets_to_rx_wqes(priv, rq_wq_type,
 444                                                    param->rx_pending);
 445
 446         if (param->rx_pending < min_rq_size) {
 447                 netdev_info(dev, "%s: rx_pending (%d) < min (%d)\n",
 448                             __func__, param->rx_pending,
 449                             min_rq_size);
 450                 return -EINVAL;
 451         }
 452         if (param->rx_pending > max_rq_size) {
 453                 netdev_info(dev, "%s: rx_pending (%d) > max (%d)\n",
 454                             __func__, param->rx_pending,
 455                             max_rq_size);
 456                 return -EINVAL;
 457         }
 458
 459         num_mtts = MLX5E_REQUIRED_MTTS(priv->params.num_channels,
 460                                        rx_pending_wqes);
 461         if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
 462             !MLX5E_VALID_NUM_MTTS(num_mtts)) {
 463                 netdev_info(dev, "%s: rx_pending (%d) request can't be satisfied, try to reduce.\n",
 464                             __func__, param->rx_pending);
 465                 return -EINVAL;
 466         }
 467
 468         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
 469                 netdev_info(dev, "%s: tx_pending (%d) < min (%d)\n",
 470                             __func__, param->tx_pending,
 471                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
 472                 return -EINVAL;
 473         }
 474         if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
 475                 netdev_info(dev, "%s: tx_pending (%d) > max (%d)\n",
 476                             __func__, param->tx_pending,
 477                             1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
 478                 return -EINVAL;
 479         }
 480
 481         log_rq_size = order_base_2(rx_pending_wqes);
 482         log_sq_size = order_base_2(param->tx_pending);
 483         min_rx_wqes = mlx5_min_rx_wqes(rq_wq_type, rx_pending_wqes);
 484
 485         if (log_rq_size == priv->params.log_rq_size &&
 486             log_sq_size == priv->params.log_sq_size &&
 487             min_rx_wqes == priv->params.min_rx_wqes)
 488                 return 0;
 489
 490         mutex_lock(&priv->state_lock);
 491
 492         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
 493         if (was_opened)
 494                 mlx5e_close_locked(dev);
 495
 496         priv->params.log_rq_size = log_rq_size;
 497         priv->params.log_sq_size = log_sq_size;
 498         priv->params.min_rx_wqes = min_rx_wqes;
 499
 500         if (was_opened)
 501                 err = mlx5e_open_locked(dev);
 502
 503         mutex_unlock(&priv->state_lock);
 504
 505         return err;
 506 }
 507
 508 static void mlx5e_get_channels(struct net_device *dev,
 509                                struct ethtool_channels *ch)
 510 {
 511         struct mlx5e_priv *priv = netdev_priv(dev);
 512
 513         ch->max_combined   = mlx5e_get_max_num_channels(priv->mdev);
 514         ch->combined_count = priv->params.num_channels;
 515 }
 516
 517 static int mlx5e_set_channels(struct net_device *dev,
 518                               struct ethtool_channels *ch)
 519 {
 520         struct mlx5e_priv *priv = netdev_priv(dev);
 521         int ncv = mlx5e_get_max_num_channels(priv->mdev);
 522         unsigned int count = ch->combined_count;
 523         bool arfs_enabled;
 524         bool was_opened;
 525         u32 num_mtts;
 526         int err = 0;
 527
 528         if (!count) {
 529                 netdev_info(dev, "%s: combined_count=0 not supported\n",
 530                             __func__);
 531                 return -EINVAL;
 532         }
 533         if (ch->rx_count || ch->tx_count) {
 534                 netdev_info(dev, "%s: separate rx/tx count not supported\n",
 535                             __func__);
 536                 return -EINVAL;
 537         }
 538         if (count > ncv) {
 539                 netdev_info(dev, "%s: count (%d) > max (%d)\n",
 540                             __func__, count, ncv);
 541                 return -EINVAL;
 542         }
 543
 544         num_mtts = MLX5E_REQUIRED_MTTS(count, BIT(priv->params.log_rq_size));
 545         if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
 546             !MLX5E_VALID_NUM_MTTS(num_mtts)) {
 547                 netdev_info(dev, "%s: rx count (%d) request can't be satisfied, try to reduce.\n",
 548                             __func__, count);
 549                 return -EINVAL;
 550         }
 551
 552         if (priv->params.num_channels == count)
 553                 return 0;
 554
 555         mutex_lock(&priv->state_lock);
 556
 557         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
 558         if (was_opened)
 559                 mlx5e_close_locked(dev);
 560
 561         arfs_enabled = dev->features & NETIF_F_NTUPLE;
 562         if (arfs_enabled)
 563                 mlx5e_arfs_disable(priv);
 564
 565         priv->params.num_channels = count;
 566         mlx5e_build_default_indir_rqt(priv->mdev, priv->params.indirection_rqt,
 567                                       MLX5E_INDIR_RQT_SIZE, count);
 568
 569         if (was_opened)
 570                 err = mlx5e_open_locked(dev);
 571         if (err)
 572                 goto out;
 573
 574         if (arfs_enabled) {
 575                 err = mlx5e_arfs_enable(priv);
 576                 if (err)
 577                         netdev_err(dev, "%s: mlx5e_arfs_enable failed: %d\n",
 578                                    __func__, err);
 579         }
 580
 581 out:
 582         mutex_unlock(&priv->state_lock);
 583
 584         return err;
 585 }
 586
 587 static int mlx5e_get_coalesce(struct net_device *netdev,
 588                               struct ethtool_coalesce *coal)
 589 {
 590         struct mlx5e_priv *priv = netdev_priv(netdev);
 591
 592         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
 593                 return -ENOTSUPP;
 594
 595         coal->rx_coalesce_usecs       = priv->params.rx_cq_moderation.usec;
 596         coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation.pkts;
 597         coal->tx_coalesce_usecs       = priv->params.tx_cq_moderation.usec;
 598         coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation.pkts;
 599         coal->use_adaptive_rx_coalesce = priv->params.rx_am_enabled;
 600
 601         return 0;
 602 }
 603
 604 static int mlx5e_set_coalesce(struct net_device *netdev,
 605                               struct ethtool_coalesce *coal)
 606 {
 607         struct mlx5e_priv *priv    = netdev_priv(netdev);
 608         struct mlx5_core_dev *mdev = priv->mdev;
 609         struct mlx5e_channel *c;
 610         bool restart =
 611                 !!coal->use_adaptive_rx_coalesce != priv->params.rx_am_enabled;
 612         bool was_opened;
 613         int err = 0;
 614         int tc;
 615         int i;
 616
 617         if (!MLX5_CAP_GEN(mdev, cq_moderation))
 618                 return -ENOTSUPP;
 619
 620         mutex_lock(&priv->state_lock);
 621
 622         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
 623         if (was_opened && restart) {
 624                 mlx5e_close_locked(netdev);
 625                 priv->params.rx_am_enabled = !!coal->use_adaptive_rx_coalesce;
 626         }
 627
 628         priv->params.tx_cq_moderation.usec = coal->tx_coalesce_usecs;
 629         priv->params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
 630         priv->params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
 631         priv->params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
 632
 633         if (!was_opened || restart)
 634                 goto out;
 635
 636         for (i = 0; i < priv->params.num_channels; ++i) {
 637                 c = priv->channel[i];
 638
 639                 for (tc = 0; tc < c->num_tc; tc++) {
 640                         mlx5_core_modify_cq_moderation(mdev,
 641                                                 &c->sq[tc].cq.mcq,
 642                                                 coal->tx_coalesce_usecs,
 643                                                 coal->tx_max_coalesced_frames);
 644                 }
 645
 646                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
 647                                                coal->rx_coalesce_usecs,
 648                                                coal->rx_max_coalesced_frames);
 649         }
 650
 651 out:
 652         if (was_opened && restart)
 653                 err = mlx5e_open_locked(netdev);
 654
 655         mutex_unlock(&priv->state_lock);
 656         return err;
 657 }
 658
 659 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
 660                                         u32 eth_proto_cap)
 661 {
 662         unsigned long proto_cap = eth_proto_cap;
 663         int proto;
 664
 665         for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
 666                 bitmap_or(supported_modes, supported_modes,
 667                           ptys2ethtool_table[proto].supported,
 668                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 669 }
 670
 671 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
 672                                     u32 eth_proto_cap)
 673 {
 674         unsigned long proto_cap = eth_proto_cap;
 675         int proto;
 676
 677         for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
 678                 bitmap_or(advertising_modes, advertising_modes,
 679                           ptys2ethtool_table[proto].advertised,
 680                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 681 }
 682
 683 static void ptys2ethtool_supported_port(struct ethtool_link_ksettings *link_ksettings,
 684                                         u32 eth_proto_cap)
 685 {
 686         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
 687                            | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
 688                            | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
 689                            | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
 690                            | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
 691                            | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 692                 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, FIBRE);
 693         }
 694
 695         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
 696                            | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
 697                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
 698                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
 699                            | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
 700                 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Backplane);
 701         }
 702 }
 703
 704 int mlx5e_get_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
 705 {
 706         u32 max_speed = 0;
 707         u32 proto_cap;
 708         int err;
 709         int i;
 710
 711         err = mlx5_query_port_proto_cap(mdev, &proto_cap, MLX5_PTYS_EN);
 712         if (err)
 713                 return err;
 714
 715         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i)
 716                 if (proto_cap & MLX5E_PROT_MASK(i))
 717                         max_speed = max(max_speed, ptys2ethtool_table[i].speed);
 718
 719         *speed = max_speed;
 720         return 0;
 721 }
 722
 723 static void get_speed_duplex(struct net_device *netdev,
 724                              u32 eth_proto_oper,
 725                              struct ethtool_link_ksettings *link_ksettings)
 726 {
 727         int i;
 728         u32 speed = SPEED_UNKNOWN;
 729         u8 duplex = DUPLEX_UNKNOWN;
 730
 731         if (!netif_carrier_ok(netdev))
 732                 goto out;
 733
 734         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
 735                 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
 736                         speed = ptys2ethtool_table[i].speed;
 737                         duplex = DUPLEX_FULL;
 738                         break;
 739                 }
 740         }
 741 out:
 742         link_ksettings->base.speed = speed;
 743         link_ksettings->base.duplex = duplex;
 744 }
 745
 746 static void get_supported(u32 eth_proto_cap,
 747                           struct ethtool_link_ksettings *link_ksettings)
 748 {
 749         unsigned long *supported = link_ksettings->link_modes.supported;
 750
 751         ptys2ethtool_supported_port(link_ksettings, eth_proto_cap);
 752         ptys2ethtool_supported_link(supported, eth_proto_cap);
 753         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
 754 }
 755
 756 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
 757                             u8 rx_pause,
 758                             struct ethtool_link_ksettings *link_ksettings)
 759 {
 760         unsigned long *advertising = link_ksettings->link_modes.advertising;
 761
 762         ptys2ethtool_adver_link(advertising, eth_proto_cap);
 763         if (rx_pause)
 764                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
 765         if (tx_pause ^ rx_pause)
 766                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
 767 }
 768
 769 static u8 get_connector_port(u32 eth_proto)
 770 {
 771         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
 772                          | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
 773                          | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
 774                          | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 775                         return PORT_FIBRE;
 776         }
 777
 778         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
 779                          | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
 780                          | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
 781                         return PORT_DA;
 782         }
 783
 784         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
 785                          | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
 786                          | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
 787                          | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
 788                         return PORT_NONE;
 789         }
 790
 791         return PORT_OTHER;
 792 }
 793
 794 static void get_lp_advertising(u32 eth_proto_lp,
 795                                struct ethtool_link_ksettings *link_ksettings)
 796 {
 797         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
 798
 799         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
 800 }
 801
 802 static int mlx5e_get_link_ksettings(struct net_device *netdev,
 803                                     struct ethtool_link_ksettings *link_ksettings)
 804 {
 805         struct mlx5e_priv *priv    = netdev_priv(netdev);
 806         struct mlx5_core_dev *mdev = priv->mdev;
 807         u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
 808         u32 rx_pause = 0;
 809         u32 tx_pause = 0;
 810         u32 eth_proto_cap;
 811         u32 eth_proto_admin;
 812         u32 eth_proto_lp;
 813         u32 eth_proto_oper;
 814         u8 an_disable_admin;
 815         u8 an_status;
 816         int err;
 817
 818         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
 819         if (err) {
 820                 netdev_err(netdev, "%s: query port ptys failed: %d\n",
 821                            __func__, err);
 822                 goto err_query_ptys;
 823         }
 824
 825         eth_proto_cap    = MLX5_GET(ptys_reg, out, eth_proto_capability);
 826         eth_proto_admin  = MLX5_GET(ptys_reg, out, eth_proto_admin);
 827         eth_proto_oper   = MLX5_GET(ptys_reg, out, eth_proto_oper);
 828         eth_proto_lp     = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
 829         an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
 830         an_status        = MLX5_GET(ptys_reg, out, an_status);
 831
 832         mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
 833
 834         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
 835         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
 836
 837         get_supported(eth_proto_cap, link_ksettings);
 838         get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings);
 839         get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
 840
 841         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
 842
 843         link_ksettings->base.port = get_connector_port(eth_proto_oper);
 844         get_lp_advertising(eth_proto_lp, link_ksettings);
 845
 846         if (an_status == MLX5_AN_COMPLETE)
 847                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 848                                                      lp_advertising, Autoneg);
 849
 850         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
 851                                                           AUTONEG_ENABLE;
 852         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
 853                                              Autoneg);
 854         if (!an_disable_admin)
 855                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 856                                                      advertising, Autoneg);
 857
 858 err_query_ptys:
 859         return err;
 860 }
 861
 862 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
 863 {
 864         u32 i, ptys_modes = 0;
 865
 866         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
 867                 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
 868                                       link_modes,
 869                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
 870                         ptys_modes |= MLX5E_PROT_MASK(i);
 871         }
 872
 873         return ptys_modes;
 874 }
 875
 876 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
 877 {
 878         u32 i, speed_links = 0;
 879
 880         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
 881                 if (ptys2ethtool_table[i].speed == speed)
 882                         speed_links |= MLX5E_PROT_MASK(i);
 883         }
 884
 885         return speed_links;
 886 }
 887
 888 static int mlx5e_set_link_ksettings(struct net_device *netdev,
 889                                     const struct ethtool_link_ksettings *link_ksettings)
 890 {
 891         struct mlx5e_priv *priv    = netdev_priv(netdev);
 892         struct mlx5_core_dev *mdev = priv->mdev;
 893         u32 eth_proto_cap, eth_proto_admin;
 894         bool an_changes = false;
 895         u8 an_disable_admin;
 896         u8 an_disable_cap;
 897         bool an_disable;
 898         u32 link_modes;
 899         u8 an_status;
 900         u32 speed;
 901         int err;
 902
 903         speed = link_ksettings->base.speed;
 904
 905         link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
 906                 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
 907                 mlx5e_ethtool2ptys_speed_link(speed);
 908
 909         err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
 910         if (err) {
 911                 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
 912                            __func__, err);
 913                 goto out;
 914         }
 915
 916         link_modes = link_modes & eth_proto_cap;
 917         if (!link_modes) {
 918                 netdev_err(netdev, "%s: Not supported link mode(s) requested",
 919                            __func__);
 920                 err = -EINVAL;
 921                 goto out;
 922         }
 923
 924         err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
 925         if (err) {
 926                 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
 927                            __func__, err);
 928                 goto out;
 929         }
 930
 931         mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
 932                                 &an_disable_cap, &an_disable_admin);
 933
 934         an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
 935         an_changes = ((!an_disable && an_disable_admin) ||
 936                       (an_disable && !an_disable_admin));
 937
 938         if (!an_changes && link_modes == eth_proto_admin)
 939                 goto out;
 940
 941         mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
 942         mlx5_toggle_port_link(mdev);
 943
 944 out:
 945         return err;
 946 }
 947
 948 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
 949 {
 950         struct mlx5e_priv *priv = netdev_priv(netdev);
 951
 952         return sizeof(priv->params.toeplitz_hash_key);
 953 }
 954
 955 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
 956 {
 957         return MLX5E_INDIR_RQT_SIZE;
 958 }
 959
 960 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
 961                           u8 *hfunc)
 962 {
 963         struct mlx5e_priv *priv = netdev_priv(netdev);
 964
 965         if (indir)
 966                 memcpy(indir, priv->params.indirection_rqt,
 967                        sizeof(priv->params.indirection_rqt));
 968
 969         if (key)
 970                 memcpy(key, priv->params.toeplitz_hash_key,
 971                        sizeof(priv->params.toeplitz_hash_key));
 972
 973         if (hfunc)
 974                 *hfunc = priv->params.rss_hfunc;
 975
 976         return 0;
 977 }
 978
 979 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
 980 {
 981         void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
 982         struct mlx5_core_dev *mdev = priv->mdev;
 983         int ctxlen = MLX5_ST_SZ_BYTES(tirc);
 984         int tt;
 985
 986         MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
 987
 988         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
 989                 memset(tirc, 0, ctxlen);
 990                 mlx5e_build_indir_tir_ctx_hash(priv, tirc, tt);
 991                 mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
 992         }
 993 }
 994
 995 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
 996                           const u8 *key, const u8 hfunc)
 997 {
 998         struct mlx5e_priv *priv = netdev_priv(dev);
 999         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
1000         bool hash_changed = false;
1001         void *in;
1002
1003         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
1004             (hfunc != ETH_RSS_HASH_XOR) &&
1005             (hfunc != ETH_RSS_HASH_TOP))
1006                 return -EINVAL;
1007
1008         in = mlx5_vzalloc(inlen);
1009         if (!in)
1010                 return -ENOMEM;
1011
1012         mutex_lock(&priv->state_lock);
1013
1014         if (indir) {
1015                 u32 rqtn = priv->indir_rqt.rqtn;
1016
1017                 memcpy(priv->params.indirection_rqt, indir,
1018                        sizeof(priv->params.indirection_rqt));
1019                 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, 0);
1020         }
1021
1022         if (hfunc != ETH_RSS_HASH_NO_CHANGE &&
1023             hfunc != priv->params.rss_hfunc) {
1024                 priv->params.rss_hfunc = hfunc;
1025                 hash_changed = true;
1026         }
1027
1028         if (key) {
1029                 memcpy(priv->params.toeplitz_hash_key, key,
1030                        sizeof(priv->params.toeplitz_hash_key));
1031                 hash_changed = hash_changed ||
1032                                priv->params.rss_hfunc == ETH_RSS_HASH_TOP;
1033         }
1034
1035         if (hash_changed)
1036                 mlx5e_modify_tirs_hash(priv, in, inlen);
1037
1038         mutex_unlock(&priv->state_lock);
1039
1040         kvfree(in);
1041
1042         return 0;
1043 }
1044
1045 static int mlx5e_get_rxnfc(struct net_device *netdev,
1046                            struct ethtool_rxnfc *info, u32 *rule_locs)
1047 {
1048         struct mlx5e_priv *priv = netdev_priv(netdev);
1049         int err = 0;
1050
1051         switch (info->cmd) {
1052         case ETHTOOL_GRXRINGS:
1053                 info->data = priv->params.num_channels;
1054                 break;
1055         case ETHTOOL_GRXCLSRLCNT:
1056                 info->rule_cnt = priv->fs.ethtool.tot_num_rules;
1057                 break;
1058         case ETHTOOL_GRXCLSRULE:
1059                 err = mlx5e_ethtool_get_flow(priv, info, info->fs.location);
1060                 break;
1061         case ETHTOOL_GRXCLSRLALL:
1062                 err = mlx5e_ethtool_get_all_flows(priv, info, rule_locs);
1063                 break;
1064         default:
1065                 err = -EOPNOTSUPP;
1066                 break;
1067         }
1068
1069         return err;
1070 }
1071
1072 static int mlx5e_get_tunable(struct net_device *dev,
1073                              const struct ethtool_tunable *tuna,
1074                              void *data)
1075 {
1076         const struct mlx5e_priv *priv = netdev_priv(dev);
1077         int err = 0;
1078
1079         switch (tuna->id) {
1080         case ETHTOOL_TX_COPYBREAK:
1081                 *(u32 *)data = priv->params.tx_max_inline;
1082                 break;
1083         default:
1084                 err = -EINVAL;
1085                 break;
1086         }
1087
1088         return err;
1089 }
1090
1091 static int mlx5e_set_tunable(struct net_device *dev,
1092                              const struct ethtool_tunable *tuna,
1093                              const void *data)
1094 {
1095         struct mlx5e_priv *priv = netdev_priv(dev);
1096         struct mlx5_core_dev *mdev = priv->mdev;
1097         bool was_opened;
1098         u32 val;
1099         int err = 0;
1100
1101         switch (tuna->id) {
1102         case ETHTOOL_TX_COPYBREAK:
1103                 val = *(u32 *)data;
1104                 if (val > mlx5e_get_max_inline_cap(mdev)) {
1105                         err = -EINVAL;
1106                         break;
1107                 }
1108
1109                 mutex_lock(&priv->state_lock);
1110
1111                 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
1112                 if (was_opened)
1113                         mlx5e_close_locked(dev);
1114
1115                 priv->params.tx_max_inline = val;
1116
1117                 if (was_opened)
1118                         err = mlx5e_open_locked(dev);
1119
1120                 mutex_unlock(&priv->state_lock);
1121                 break;
1122         default:
1123                 err = -EINVAL;
1124                 break;
1125         }
1126
1127         return err;
1128 }
1129
1130 static void mlx5e_get_pauseparam(struct net_device *netdev,
1131                                  struct ethtool_pauseparam *pauseparam)
1132 {
1133         struct mlx5e_priv *priv    = netdev_priv(netdev);
1134         struct mlx5_core_dev *mdev = priv->mdev;
1135         int err;
1136
1137         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1138                                     &pauseparam->tx_pause);
1139         if (err) {
1140                 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1141                            __func__, err);
1142         }
1143 }
1144
1145 static int mlx5e_set_pauseparam(struct net_device *netdev,
1146                                 struct ethtool_pauseparam *pauseparam)
1147 {
1148         struct mlx5e_priv *priv    = netdev_priv(netdev);
1149         struct mlx5_core_dev *mdev = priv->mdev;
1150         int err;
1151
1152         if (!MLX5_CAP_GEN(mdev, vport_group_manager))
1153                 return -EOPNOTSUPP;
1154
1155         if (pauseparam->autoneg)
1156                 return -EINVAL;
1157
1158         err = mlx5_set_port_pause(mdev,
1159                                   pauseparam->rx_pause ? 1 : 0,
1160                                   pauseparam->tx_pause ? 1 : 0);
1161         if (err) {
1162                 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1163                            __func__, err);
1164         }
1165
1166         return err;
1167 }
1168
1169 static int mlx5e_get_ts_info(struct net_device *dev,
1170                              struct ethtool_ts_info *info)
1171 {
1172         struct mlx5e_priv *priv = netdev_priv(dev);
1173
1174         info->phc_index = priv->tstamp.ptp ?
1175                           ptp_clock_index(priv->tstamp.ptp) : -1;
1176
1177         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
1178                 return 0;
1179
1180         info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1181                                 SOF_TIMESTAMPING_RX_HARDWARE |
1182                                 SOF_TIMESTAMPING_RAW_HARDWARE;
1183
1184         info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1185                          BIT(HWTSTAMP_TX_ON);
1186
1187         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1188                            BIT(HWTSTAMP_FILTER_ALL);
1189
1190         return 0;
1191 }
1192
1193 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1194 {
1195         __u32 ret = 0;
1196
1197         if (MLX5_CAP_GEN(mdev, wol_g))
1198                 ret |= WAKE_MAGIC;
1199
1200         if (MLX5_CAP_GEN(mdev, wol_s))
1201                 ret |= WAKE_MAGICSECURE;
1202
1203         if (MLX5_CAP_GEN(mdev, wol_a))
1204                 ret |= WAKE_ARP;
1205
1206         if (MLX5_CAP_GEN(mdev, wol_b))
1207                 ret |= WAKE_BCAST;
1208
1209         if (MLX5_CAP_GEN(mdev, wol_m))
1210                 ret |= WAKE_MCAST;
1211
1212         if (MLX5_CAP_GEN(mdev, wol_u))
1213                 ret |= WAKE_UCAST;
1214
1215         if (MLX5_CAP_GEN(mdev, wol_p))
1216                 ret |= WAKE_PHY;
1217
1218         return ret;
1219 }
1220
1221 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1222 {
1223         __u32 ret = 0;
1224
1225         if (mode & MLX5_WOL_MAGIC)
1226                 ret |= WAKE_MAGIC;
1227
1228         if (mode & MLX5_WOL_SECURED_MAGIC)
1229                 ret |= WAKE_MAGICSECURE;
1230
1231         if (mode & MLX5_WOL_ARP)
1232                 ret |= WAKE_ARP;
1233
1234         if (mode & MLX5_WOL_BROADCAST)
1235                 ret |= WAKE_BCAST;
1236
1237         if (mode & MLX5_WOL_MULTICAST)
1238                 ret |= WAKE_MCAST;
1239
1240         if (mode & MLX5_WOL_UNICAST)
1241                 ret |= WAKE_UCAST;
1242
1243         if (mode & MLX5_WOL_PHY_ACTIVITY)
1244                 ret |= WAKE_PHY;
1245
1246         return ret;
1247 }
1248
1249 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1250 {
1251         u8 ret = 0;
1252
1253         if (mode & WAKE_MAGIC)
1254                 ret |= MLX5_WOL_MAGIC;
1255
1256         if (mode & WAKE_MAGICSECURE)
1257                 ret |= MLX5_WOL_SECURED_MAGIC;
1258
1259         if (mode & WAKE_ARP)
1260                 ret |= MLX5_WOL_ARP;
1261
1262         if (mode & WAKE_BCAST)
1263                 ret |= MLX5_WOL_BROADCAST;
1264
1265         if (mode & WAKE_MCAST)
1266                 ret |= MLX5_WOL_MULTICAST;
1267
1268         if (mode & WAKE_UCAST)
1269                 ret |= MLX5_WOL_UNICAST;
1270
1271         if (mode & WAKE_PHY)
1272                 ret |= MLX5_WOL_PHY_ACTIVITY;
1273
1274         return ret;
1275 }
1276
1277 static void mlx5e_get_wol(struct net_device *netdev,
1278                           struct ethtool_wolinfo *wol)
1279 {
1280         struct mlx5e_priv *priv = netdev_priv(netdev);
1281         struct mlx5_core_dev *mdev = priv->mdev;
1282         u8 mlx5_wol_mode;
1283         int err;
1284
1285         memset(wol, 0, sizeof(*wol));
1286
1287         wol->supported = mlx5e_get_wol_supported(mdev);
1288         if (!wol->supported)
1289                 return;
1290
1291         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1292         if (err)
1293                 return;
1294
1295         wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1296 }
1297
1298 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1299 {
1300         struct mlx5e_priv *priv = netdev_priv(netdev);
1301         struct mlx5_core_dev *mdev = priv->mdev;
1302         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1303         u32 mlx5_wol_mode;
1304
1305         if (!wol_supported)
1306                 return -ENOTSUPP;
1307
1308         if (wol->wolopts & ~wol_supported)
1309                 return -EINVAL;
1310
1311         mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1312
1313         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1314 }
1315
1316 static int mlx5e_set_phys_id(struct net_device *dev,
1317                              enum ethtool_phys_id_state state)
1318 {
1319         struct mlx5e_priv *priv = netdev_priv(dev);
1320         struct mlx5_core_dev *mdev = priv->mdev;
1321         u16 beacon_duration;
1322
1323         if (!MLX5_CAP_GEN(mdev, beacon_led))
1324                 return -EOPNOTSUPP;
1325
1326         switch (state) {
1327         case ETHTOOL_ID_ACTIVE:
1328                 beacon_duration = MLX5_BEACON_DURATION_INF;
1329                 break;
1330         case ETHTOOL_ID_INACTIVE:
1331                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1332                 break;
1333         default:
1334                 return -EOPNOTSUPP;
1335         }
1336
1337         return mlx5_set_port_beacon(mdev, beacon_duration);
1338 }
1339
1340 static int mlx5e_get_module_info(struct net_device *netdev,
1341                                  struct ethtool_modinfo *modinfo)
1342 {
1343         struct mlx5e_priv *priv = netdev_priv(netdev);
1344         struct mlx5_core_dev *dev = priv->mdev;
1345         int size_read = 0;
1346         u8 data[4];
1347
1348         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1349         if (size_read < 2)
1350                 return -EIO;
1351
1352         /* data[0] = identifier byte */
1353         switch (data[0]) {
1354         case MLX5_MODULE_ID_QSFP:
1355                 modinfo->type       = ETH_MODULE_SFF_8436;
1356                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1357                 break;
1358         case MLX5_MODULE_ID_QSFP_PLUS:
1359         case MLX5_MODULE_ID_QSFP28:
1360                 /* data[1] = revision id */
1361                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1362                         modinfo->type       = ETH_MODULE_SFF_8636;
1363                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1364                 } else {
1365                         modinfo->type       = ETH_MODULE_SFF_8436;
1366                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1367                 }
1368                 break;
1369         case MLX5_MODULE_ID_SFP:
1370                 modinfo->type       = ETH_MODULE_SFF_8472;
1371                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1372                 break;
1373         default:
1374                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1375                            __func__, data[0]);
1376                 return -EINVAL;
1377         }
1378
1379         return 0;
1380 }
1381
1382 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1383                                    struct ethtool_eeprom *ee,
1384                                    u8 *data)
1385 {
1386         struct mlx5e_priv *priv = netdev_priv(netdev);
1387         struct mlx5_core_dev *mdev = priv->mdev;
1388         int offset = ee->offset;
1389         int size_read;
1390         int i = 0;
1391
1392         if (!ee->len)
1393                 return -EINVAL;
1394
1395         memset(data, 0, ee->len);
1396
1397         while (i < ee->len) {
1398                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1399                                                      data + i);
1400
1401                 if (!size_read)
1402                         /* Done reading */
1403                         return 0;
1404
1405                 if (size_read < 0) {
1406                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1407                                    __func__, size_read);
1408                         return size_read;
1409                 }
1410
1411                 i += size_read;
1412                 offset += size_read;
1413         }
1414
1415         return 0;
1416 }
1417
1418 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1419
1420 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1421 {
1422         struct mlx5e_priv *priv = netdev_priv(netdev);
1423         struct mlx5_core_dev *mdev = priv->mdev;
1424         bool rx_mode_changed;
1425         u8 rx_cq_period_mode;
1426         int err = 0;
1427         bool reset;
1428
1429         rx_cq_period_mode = enable ?
1430                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1431                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1432         rx_mode_changed = rx_cq_period_mode != priv->params.rx_cq_period_mode;
1433
1434         if (rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1435             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1436                 return -ENOTSUPP;
1437
1438         if (!rx_mode_changed)
1439                 return 0;
1440
1441         reset = test_bit(MLX5E_STATE_OPENED, &priv->state);
1442         if (reset)
1443                 mlx5e_close_locked(netdev);
1444
1445         mlx5e_set_rx_cq_mode_params(&priv->params, rx_cq_period_mode);
1446
1447         if (reset)
1448                 err = mlx5e_open_locked(netdev);
1449
1450         return err;
1451 }
1452
1453 static int mlx5e_handle_pflag(struct net_device *netdev,
1454                               u32 wanted_flags,
1455                               enum mlx5e_priv_flag flag,
1456                               mlx5e_pflag_handler pflag_handler)
1457 {
1458         struct mlx5e_priv *priv = netdev_priv(netdev);
1459         bool enable = !!(wanted_flags & flag);
1460         u32 changes = wanted_flags ^ priv->pflags;
1461         int err;
1462
1463         if (!(changes & flag))
1464                 return 0;
1465
1466         err = pflag_handler(netdev, enable);
1467         if (err) {
1468                 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1469                            enable ? "Enable" : "Disable", flag, err);
1470                 return err;
1471         }
1472
1473         MLX5E_SET_PRIV_FLAG(priv, flag, enable);
1474         return 0;
1475 }
1476
1477 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1478 {
1479         struct mlx5e_priv *priv = netdev_priv(netdev);
1480         int err;
1481
1482         mutex_lock(&priv->state_lock);
1483
1484         err = mlx5e_handle_pflag(netdev, pflags,
1485                                  MLX5E_PFLAG_RX_CQE_BASED_MODER,
1486                                  set_pflag_rx_cqe_based_moder);
1487
1488         mutex_unlock(&priv->state_lock);
1489         return err ? -EINVAL : 0;
1490 }
1491
1492 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1493 {
1494         struct mlx5e_priv *priv = netdev_priv(netdev);
1495
1496         return priv->pflags;
1497 }
1498
1499 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1500 {
1501         int err = 0;
1502         struct mlx5e_priv *priv = netdev_priv(dev);
1503
1504         switch (cmd->cmd) {
1505         case ETHTOOL_SRXCLSRLINS:
1506                 err = mlx5e_ethtool_flow_replace(priv, &cmd->fs);
1507                 break;
1508         case ETHTOOL_SRXCLSRLDEL:
1509                 err = mlx5e_ethtool_flow_remove(priv, cmd->fs.location);
1510                 break;
1511         default:
1512                 err = -EOPNOTSUPP;
1513                 break;
1514         }
1515
1516         return err;
1517 }
1518
1519 const struct ethtool_ops mlx5e_ethtool_ops = {
1520         .get_drvinfo       = mlx5e_get_drvinfo,
1521         .get_link          = ethtool_op_get_link,
1522         .get_strings       = mlx5e_get_strings,
1523         .get_sset_count    = mlx5e_get_sset_count,
1524         .get_ethtool_stats = mlx5e_get_ethtool_stats,
1525         .get_ringparam     = mlx5e_get_ringparam,
1526         .set_ringparam     = mlx5e_set_ringparam,
1527         .get_channels      = mlx5e_get_channels,
1528         .set_channels      = mlx5e_set_channels,
1529         .get_coalesce      = mlx5e_get_coalesce,
1530         .set_coalesce      = mlx5e_set_coalesce,
1531         .get_link_ksettings  = mlx5e_get_link_ksettings,
1532         .set_link_ksettings  = mlx5e_set_link_ksettings,
1533         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
1534         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1535         .get_rxfh          = mlx5e_get_rxfh,
1536         .set_rxfh          = mlx5e_set_rxfh,
1537         .get_rxnfc         = mlx5e_get_rxnfc,
1538         .set_rxnfc         = mlx5e_set_rxnfc,
1539         .get_tunable       = mlx5e_get_tunable,
1540         .set_tunable       = mlx5e_set_tunable,
1541         .get_pauseparam    = mlx5e_get_pauseparam,
1542         .set_pauseparam    = mlx5e_set_pauseparam,
1543         .get_ts_info       = mlx5e_get_ts_info,
1544         .set_phys_id       = mlx5e_set_phys_id,
1545         .get_wol           = mlx5e_get_wol,
1546         .set_wol           = mlx5e_set_wol,
1547         .get_module_info   = mlx5e_get_module_info,
1548         .get_module_eeprom = mlx5e_get_module_eeprom,
1549         .get_priv_flags    = mlx5e_get_priv_flags,
1550         .set_priv_flags    = mlx5e_set_priv_flags
1551 };