2 * Copyright (c) 2012 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
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6 * General Public License (GPL) Version 2, available from the file
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23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/mlx4/device.h>
35 #include <linux/clocksource.h>
39 /* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)
41 static cycle_t mlx4_en_read_clock(const struct cyclecounter *tc)
43 struct mlx4_en_dev *mdev =
44 container_of(tc, struct mlx4_en_dev, cycles);
45 struct mlx4_dev *dev = mdev->dev;
47 return mlx4_read_clock(dev) & tc->mask;
50 u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe)
53 struct mlx4_ts_cqe *ts_cqe = (struct mlx4_ts_cqe *)cqe;
55 lo = (u64)be16_to_cpu(ts_cqe->timestamp_lo);
56 hi = ((u64)be32_to_cpu(ts_cqe->timestamp_hi) + !lo) << 16;
61 void mlx4_en_fill_hwtstamps(struct mlx4_en_dev *mdev,
62 struct skb_shared_hwtstamps *hwts,
68 read_lock_irqsave(&mdev->clock_lock, flags);
69 nsec = timecounter_cyc2time(&mdev->clock, timestamp);
70 read_unlock_irqrestore(&mdev->clock_lock, flags);
72 memset(hwts, 0, sizeof(struct skb_shared_hwtstamps));
73 hwts->hwtstamp = ns_to_ktime(nsec);
77 * mlx4_en_remove_timestamp - disable PTP device
78 * @mdev: board private structure
80 * Stop the PTP support.
82 void mlx4_en_remove_timestamp(struct mlx4_en_dev *mdev)
84 if (mdev->ptp_clock) {
85 ptp_clock_unregister(mdev->ptp_clock);
86 mdev->ptp_clock = NULL;
87 mlx4_info(mdev, "removed PHC\n");
91 #define MLX4_EN_WRAP_AROUND_SEC 10UL
92 /* By scheduling the overflow check every 5 seconds, we have a reasonably
93 * good chance we wont miss a wrap around.
94 * TOTO: Use a timer instead of a work queue to increase the guarantee.
96 #define MLX4_EN_OVERFLOW_PERIOD (MLX4_EN_WRAP_AROUND_SEC * HZ / 2)
98 void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev)
100 bool timeout = time_is_before_jiffies(mdev->last_overflow_check +
101 MLX4_EN_OVERFLOW_PERIOD);
105 write_lock_irqsave(&mdev->clock_lock, flags);
106 timecounter_read(&mdev->clock);
107 write_unlock_irqrestore(&mdev->clock_lock, flags);
108 mdev->last_overflow_check = jiffies;
113 * mlx4_en_phc_adjfreq - adjust the frequency of the hardware clock
114 * @ptp: ptp clock structure
115 * @delta: Desired frequency change in parts per billion
117 * Adjust the frequency of the PHC cycle counter by the indicated delta from
118 * the base frequency.
120 static int mlx4_en_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
126 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
133 mult = mdev->nominal_c_mult;
136 diff = div_u64(adj, 1000000000ULL);
138 write_lock_irqsave(&mdev->clock_lock, flags);
139 timecounter_read(&mdev->clock);
140 mdev->cycles.mult = neg_adj ? mult - diff : mult + diff;
141 write_unlock_irqrestore(&mdev->clock_lock, flags);
147 * mlx4_en_phc_adjtime - Shift the time of the hardware clock
148 * @ptp: ptp clock structure
149 * @delta: Desired change in nanoseconds
151 * Adjust the timer by resetting the timecounter structure.
153 static int mlx4_en_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
155 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
159 write_lock_irqsave(&mdev->clock_lock, flags);
160 timecounter_adjtime(&mdev->clock, delta);
161 write_unlock_irqrestore(&mdev->clock_lock, flags);
167 * mlx4_en_phc_gettime - Reads the current time from the hardware clock
168 * @ptp: ptp clock structure
169 * @ts: timespec structure to hold the current time value
171 * Read the timecounter and return the correct value in ns after converting
172 * it into a struct timespec.
174 static int mlx4_en_phc_gettime(struct ptp_clock_info *ptp,
175 struct timespec64 *ts)
177 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
182 write_lock_irqsave(&mdev->clock_lock, flags);
183 ns = timecounter_read(&mdev->clock);
184 write_unlock_irqrestore(&mdev->clock_lock, flags);
186 *ts = ns_to_timespec64(ns);
192 * mlx4_en_phc_settime - Set the current time on the hardware clock
193 * @ptp: ptp clock structure
194 * @ts: timespec containing the new time for the cycle counter
196 * Reset the timecounter to use a new base value instead of the kernel
199 static int mlx4_en_phc_settime(struct ptp_clock_info *ptp,
200 const struct timespec64 *ts)
202 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
204 u64 ns = timespec64_to_ns(ts);
207 /* reset the timecounter */
208 write_lock_irqsave(&mdev->clock_lock, flags);
209 timecounter_init(&mdev->clock, &mdev->cycles, ns);
210 write_unlock_irqrestore(&mdev->clock_lock, flags);
216 * mlx4_en_phc_enable - enable or disable an ancillary feature
217 * @ptp: ptp clock structure
218 * @request: Desired resource to enable or disable
219 * @on: Caller passes one to enable or zero to disable
221 * Enable (or disable) ancillary features of the PHC subsystem.
222 * Currently, no ancillary features are supported.
224 static int mlx4_en_phc_enable(struct ptp_clock_info __always_unused *ptp,
225 struct ptp_clock_request __always_unused *request,
226 int __always_unused on)
231 static const struct ptp_clock_info mlx4_en_ptp_clock_info = {
232 .owner = THIS_MODULE,
233 .max_adj = 100000000,
239 .adjfreq = mlx4_en_phc_adjfreq,
240 .adjtime = mlx4_en_phc_adjtime,
241 .gettime64 = mlx4_en_phc_gettime,
242 .settime64 = mlx4_en_phc_settime,
243 .enable = mlx4_en_phc_enable,
247 /* This function calculates the max shift that enables the user range
248 * of MLX4_EN_WRAP_AROUND_SEC values in the cycles register.
250 static u32 freq_to_shift(u16 freq)
252 u32 freq_khz = freq * 1000;
253 u64 max_val_cycles = freq_khz * 1000 * MLX4_EN_WRAP_AROUND_SEC;
254 u64 max_val_cycles_rounded = 1ULL << fls64(max_val_cycles - 1);
255 /* calculate max possible multiplier in order to fit in 64bit */
256 u64 max_mul = div64_u64(ULLONG_MAX, max_val_cycles_rounded);
258 /* This comes from the reverse of clocksource_khz2mult */
259 return ilog2(div_u64(max_mul * freq_khz, 1000000));
262 void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev)
264 struct mlx4_dev *dev = mdev->dev;
267 /* mlx4_en_init_timestamp is called for each netdev.
268 * mdev->ptp_clock is common for all ports, skip initialization if
269 * was done for other port.
274 rwlock_init(&mdev->clock_lock);
276 memset(&mdev->cycles, 0, sizeof(mdev->cycles));
277 mdev->cycles.read = mlx4_en_read_clock;
278 mdev->cycles.mask = CLOCKSOURCE_MASK(48);
279 mdev->cycles.shift = freq_to_shift(dev->caps.hca_core_clock);
281 clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift);
282 mdev->nominal_c_mult = mdev->cycles.mult;
284 write_lock_irqsave(&mdev->clock_lock, flags);
285 timecounter_init(&mdev->clock, &mdev->cycles,
286 ktime_to_ns(ktime_get_real()));
287 write_unlock_irqrestore(&mdev->clock_lock, flags);
289 /* Configure the PHC */
290 mdev->ptp_clock_info = mlx4_en_ptp_clock_info;
291 snprintf(mdev->ptp_clock_info.name, 16, "mlx4 ptp");
293 mdev->ptp_clock = ptp_clock_register(&mdev->ptp_clock_info,
295 if (IS_ERR(mdev->ptp_clock)) {
296 mdev->ptp_clock = NULL;
297 mlx4_err(mdev, "ptp_clock_register failed\n");
298 } else if (mdev->ptp_clock) {
299 mlx4_info(mdev, "registered PHC clock\n");