1 // SPDX-License-Identifier: GPL-2.0
2 /* Marvell RVU Ethernet driver
4 * Copyright (C) 2021 Marvell.
8 #include "otx2_common.h"
10 static int otx2_dmacflt_do_add(struct otx2_nic *pf, const u8 *mac,
13 struct cgx_mac_addr_add_req *req;
14 struct cgx_mac_addr_add_rsp *rsp;
17 mutex_lock(&pf->mbox.lock);
19 req = otx2_mbox_alloc_msg_cgx_mac_addr_add(&pf->mbox);
21 mutex_unlock(&pf->mbox.lock);
25 ether_addr_copy(req->mac_addr, mac);
26 err = otx2_sync_mbox_msg(&pf->mbox);
29 rsp = (struct cgx_mac_addr_add_rsp *)
30 otx2_mbox_get_rsp(&pf->mbox.mbox, 0, &req->hdr);
31 *dmac_index = rsp->index;
34 mutex_unlock(&pf->mbox.lock);
38 static int otx2_dmacflt_add_pfmac(struct otx2_nic *pf, u32 *dmac_index)
40 struct cgx_mac_addr_set_or_get *req;
41 struct cgx_mac_addr_set_or_get *rsp;
44 mutex_lock(&pf->mbox.lock);
46 req = otx2_mbox_alloc_msg_cgx_mac_addr_set(&pf->mbox);
48 mutex_unlock(&pf->mbox.lock);
52 req->index = *dmac_index;
54 ether_addr_copy(req->mac_addr, pf->netdev->dev_addr);
55 err = otx2_sync_mbox_msg(&pf->mbox);
60 rsp = (struct cgx_mac_addr_set_or_get *)
61 otx2_mbox_get_rsp(&pf->mbox.mbox, 0, &req->hdr);
63 if (IS_ERR_OR_NULL(rsp)) {
68 *dmac_index = rsp->index;
70 mutex_unlock(&pf->mbox.lock);
74 int otx2_dmacflt_add(struct otx2_nic *pf, const u8 *mac, u32 bit_pos)
78 /* Store dmacindex returned by CGX/RPM driver which will
79 * be used for macaddr update/remove
81 dmacindex = &pf->flow_cfg->bmap_to_dmacindex[bit_pos];
83 if (ether_addr_equal(mac, pf->netdev->dev_addr))
84 return otx2_dmacflt_add_pfmac(pf, dmacindex);
86 return otx2_dmacflt_do_add(pf, mac, dmacindex);
89 static int otx2_dmacflt_do_remove(struct otx2_nic *pfvf, const u8 *mac,
92 struct cgx_mac_addr_del_req *req;
95 mutex_lock(&pfvf->mbox.lock);
96 req = otx2_mbox_alloc_msg_cgx_mac_addr_del(&pfvf->mbox);
98 mutex_unlock(&pfvf->mbox.lock);
102 req->index = dmac_index;
104 err = otx2_sync_mbox_msg(&pfvf->mbox);
105 mutex_unlock(&pfvf->mbox.lock);
110 static int otx2_dmacflt_remove_pfmac(struct otx2_nic *pf, u32 dmac_index)
112 struct cgx_mac_addr_reset_req *req;
115 mutex_lock(&pf->mbox.lock);
116 req = otx2_mbox_alloc_msg_cgx_mac_addr_reset(&pf->mbox);
118 mutex_unlock(&pf->mbox.lock);
121 req->index = dmac_index;
123 err = otx2_sync_mbox_msg(&pf->mbox);
125 mutex_unlock(&pf->mbox.lock);
129 int otx2_dmacflt_remove(struct otx2_nic *pf, const u8 *mac,
132 u32 dmacindex = pf->flow_cfg->bmap_to_dmacindex[bit_pos];
134 if (ether_addr_equal(mac, pf->netdev->dev_addr))
135 return otx2_dmacflt_remove_pfmac(pf, dmacindex);
137 return otx2_dmacflt_do_remove(pf, mac, dmacindex);
140 /* CGX/RPM blocks support max unicast entries of 32.
141 * on typical configuration MAC block associated
142 * with 4 lmacs, each lmac will have 8 dmac entries
144 int otx2_dmacflt_get_max_cnt(struct otx2_nic *pf)
146 struct cgx_max_dmac_entries_get_rsp *rsp;
150 mutex_lock(&pf->mbox.lock);
151 msg = otx2_mbox_alloc_msg_cgx_mac_max_entries_get(&pf->mbox);
154 mutex_unlock(&pf->mbox.lock);
158 err = otx2_sync_mbox_msg(&pf->mbox);
162 rsp = (struct cgx_max_dmac_entries_get_rsp *)
163 otx2_mbox_get_rsp(&pf->mbox.mbox, 0, &msg->hdr);
165 if (IS_ERR_OR_NULL(rsp)) {
170 pf->flow_cfg->dmacflt_max_flows = rsp->max_dmac_filters;
173 mutex_unlock(&pf->mbox.lock);
177 int otx2_dmacflt_update(struct otx2_nic *pf, u8 *mac, u32 bit_pos)
179 struct cgx_mac_addr_update_req *req;
180 struct cgx_mac_addr_update_rsp *rsp;
183 mutex_lock(&pf->mbox.lock);
185 req = otx2_mbox_alloc_msg_cgx_mac_addr_update(&pf->mbox);
188 mutex_unlock(&pf->mbox.lock);
192 ether_addr_copy(req->mac_addr, mac);
193 req->index = pf->flow_cfg->bmap_to_dmacindex[bit_pos];
195 /* check the response and change index */
197 rc = otx2_sync_mbox_msg(&pf->mbox);
201 rsp = (struct cgx_mac_addr_update_rsp *)
202 otx2_mbox_get_rsp(&pf->mbox.mbox, 0, &req->hdr);
204 pf->flow_cfg->bmap_to_dmacindex[bit_pos] = rsp->index;
207 mutex_unlock(&pf->mbox.lock);