drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/bpf.h>
  53 #include <linux/bpf_trace.h>
  54 #include <linux/atomic.h>
  55 #include <scsi/fc/fc_fcoe.h>
  56 #include <net/udp_tunnel.h>
  57 #include <net/pkt_cls.h>
  58 #include <net/tc_act/tc_gact.h>
  59 #include <net/tc_act/tc_mirred.h>
  60 #include <net/vxlan.h>
  61 #include <net/mpls.h>
  62
  63 #include "ixgbe.h"
  64 #include "ixgbe_common.h"
  65 #include "ixgbe_dcb_82599.h"
  66 #include "ixgbe_sriov.h"
  67 #include "ixgbe_model.h"
  68
  69 char ixgbe_driver_name[] = "ixgbe";
  70 static const char ixgbe_driver_string[] =
  71                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  72 #ifdef IXGBE_FCOE
  73 char ixgbe_default_device_descr[] =
  74                               "Intel(R) 10 Gigabit Network Connection";
  75 #else
  76 static char ixgbe_default_device_descr[] =
  77                               "Intel(R) 10 Gigabit Network Connection";
  78 #endif
  79 #define DRV_VERSION "5.1.0-k"
  80 const char ixgbe_driver_version[] = DRV_VERSION;
  81 static const char ixgbe_copyright[] =
  82                                 "Copyright (c) 1999-2016 Intel Corporation.";
  83
  84 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  85
  86 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  87         [board_82598]           = &ixgbe_82598_info,
  88         [board_82599]           = &ixgbe_82599_info,
  89         [board_X540]            = &ixgbe_X540_info,
  90         [board_X550]            = &ixgbe_X550_info,
  91         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  92         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  93         [board_x550em_a]        = &ixgbe_x550em_a_info,
  94         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  95 };
  96
  97 /* ixgbe_pci_tbl - PCI Device ID Table
  98  *
  99  * Wildcard entries (PCI_ANY_ID) should come last
 100  * Last entry must be all 0s
 101  *
 102  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 103  *   Class, Class Mask, private data (not used) }
 104  */
 105 static const struct pci_device_id ixgbe_pci_tbl[] = {
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 141         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 142         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 143         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 144         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 145         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 146         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 147         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 148         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 149         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 150         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 151         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 152         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 153         /* required last entry */
 154         {0, }
 155 };
 156 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 157
 158 #ifdef CONFIG_IXGBE_DCA
 159 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 160                             void *p);
 161 static struct notifier_block dca_notifier = {
 162         .notifier_call = ixgbe_notify_dca,
 163         .next          = NULL,
 164         .priority      = 0
 165 };
 166 #endif
 167
 168 #ifdef CONFIG_PCI_IOV
 169 static unsigned int max_vfs;
 170 module_param(max_vfs, uint, 0);
 171 MODULE_PARM_DESC(max_vfs,
 172                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 173 #endif /* CONFIG_PCI_IOV */
 174
 175 static unsigned int allow_unsupported_sfp;
 176 module_param(allow_unsupported_sfp, uint, 0);
 177 MODULE_PARM_DESC(allow_unsupported_sfp,
 178                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 179
 180 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 181 static int debug = -1;
 182 module_param(debug, int, 0);
 183 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 184
 185 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 186 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 187 MODULE_LICENSE("GPL");
 188 MODULE_VERSION(DRV_VERSION);
 189
 190 static struct workqueue_struct *ixgbe_wq;
 191
 192 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 193 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 194
 195 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 196                                           u32 reg, u16 *value)
 197 {
 198         struct pci_dev *parent_dev;
 199         struct pci_bus *parent_bus;
 200
 201         parent_bus = adapter->pdev->bus->parent;
 202         if (!parent_bus)
 203                 return -1;
 204
 205         parent_dev = parent_bus->self;
 206         if (!parent_dev)
 207                 return -1;
 208
 209         if (!pci_is_pcie(parent_dev))
 210                 return -1;
 211
 212         pcie_capability_read_word(parent_dev, reg, value);
 213         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 214             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 215                 return -1;
 216         return 0;
 217 }
 218
 219 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 220 {
 221         struct ixgbe_hw *hw = &adapter->hw;
 222         u16 link_status = 0;
 223         int err;
 224
 225         hw->bus.type = ixgbe_bus_type_pci_express;
 226
 227         /* Get the negotiated link width and speed from PCI config space of the
 228          * parent, as this device is behind a switch
 229          */
 230         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 231
 232         /* assume caller will handle error case */
 233         if (err)
 234                 return err;
 235
 236         hw->bus.width = ixgbe_convert_bus_width(link_status);
 237         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 238
 239         return 0;
 240 }
 241
 242 /**
 243  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 244  * @hw: hw specific details
 245  *
 246  * This function is used by probe to determine whether a device's PCI-Express
 247  * bandwidth details should be gathered from the parent bus instead of from the
 248  * device. Used to ensure that various locations all have the correct device ID
 249  * checks.
 250  */
 251 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 252 {
 253         switch (hw->device_id) {
 254         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 255         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 256                 return true;
 257         default:
 258                 return false;
 259         }
 260 }
 261
 262 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 263                                      int expected_gts)
 264 {
 265         struct ixgbe_hw *hw = &adapter->hw;
 266         int max_gts = 0;
 267         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 268         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 269         struct pci_dev *pdev;
 270
 271         /* Some devices are not connected over PCIe and thus do not negotiate
 272          * speed. These devices do not have valid bus info, and thus any report
 273          * we generate may not be correct.
 274          */
 275         if (hw->bus.type == ixgbe_bus_type_internal)
 276                 return;
 277
 278         /* determine whether to use the parent device */
 279         if (ixgbe_pcie_from_parent(&adapter->hw))
 280                 pdev = adapter->pdev->bus->parent->self;
 281         else
 282                 pdev = adapter->pdev;
 283
 284         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 285             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 286                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 287                 return;
 288         }
 289
 290         switch (speed) {
 291         case PCIE_SPEED_2_5GT:
 292                 /* 8b/10b encoding reduces max throughput by 20% */
 293                 max_gts = 2 * width;
 294                 break;
 295         case PCIE_SPEED_5_0GT:
 296                 /* 8b/10b encoding reduces max throughput by 20% */
 297                 max_gts = 4 * width;
 298                 break;
 299         case PCIE_SPEED_8_0GT:
 300                 /* 128b/130b encoding reduces throughput by less than 2% */
 301                 max_gts = 8 * width;
 302                 break;
 303         default:
 304                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 305                 return;
 306         }
 307
 308         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 309                    max_gts);
 310         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 311                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 312                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 313                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 314                     "Unknown"),
 315                    width,
 316                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 317                     speed == PCIE_SPEED_5_0GT ? "20%" :
 318                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 319                     "Unknown"));
 320
 321         if (max_gts < expected_gts) {
 322                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 323                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 324                         expected_gts);
 325                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 326         }
 327 }
 328
 329 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 330 {
 331         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 332             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 333             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 334                 queue_work(ixgbe_wq, &adapter->service_task);
 335 }
 336
 337 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 338 {
 339         struct ixgbe_adapter *adapter = hw->back;
 340
 341         if (!hw->hw_addr)
 342                 return;
 343         hw->hw_addr = NULL;
 344         e_dev_err("Adapter removed\n");
 345         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 346                 ixgbe_service_event_schedule(adapter);
 347 }
 348
 349 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 350 {
 351         u32 value;
 352
 353         /* The following check not only optimizes a bit by not
 354          * performing a read on the status register when the
 355          * register just read was a status register read that
 356          * returned IXGBE_FAILED_READ_REG. It also blocks any
 357          * potential recursion.
 358          */
 359         if (reg == IXGBE_STATUS) {
 360                 ixgbe_remove_adapter(hw);
 361                 return;
 362         }
 363         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 364         if (value == IXGBE_FAILED_READ_REG)
 365                 ixgbe_remove_adapter(hw);
 366 }
 367
 368 /**
 369  * ixgbe_read_reg - Read from device register
 370  * @hw: hw specific details
 371  * @reg: offset of register to read
 372  *
 373  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 374  *
 375  * This function is used to read device registers. It checks for device
 376  * removal by confirming any read that returns all ones by checking the
 377  * status register value for all ones. This function avoids reading from
 378  * the hardware if a removal was previously detected in which case it
 379  * returns IXGBE_FAILED_READ_REG (all ones).
 380  */
 381 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 382 {
 383         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 384         u32 value;
 385
 386         if (ixgbe_removed(reg_addr))
 387                 return IXGBE_FAILED_READ_REG;
 388         if (unlikely(hw->phy.nw_mng_if_sel &
 389                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 390                 struct ixgbe_adapter *adapter;
 391                 int i;
 392
 393                 for (i = 0; i < 200; ++i) {
 394                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 395                         if (likely(!value))
 396                                 goto writes_completed;
 397                         if (value == IXGBE_FAILED_READ_REG) {
 398                                 ixgbe_remove_adapter(hw);
 399                                 return IXGBE_FAILED_READ_REG;
 400                         }
 401                         udelay(5);
 402                 }
 403
 404                 adapter = hw->back;
 405                 e_warn(hw, "register writes incomplete %08x\n", value);
 406         }
 407
 408 writes_completed:
 409         value = readl(reg_addr + reg);
 410         if (unlikely(value == IXGBE_FAILED_READ_REG))
 411                 ixgbe_check_remove(hw, reg);
 412         return value;
 413 }
 414
 415 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 416 {
 417         u16 value;
 418
 419         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 420         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 421                 ixgbe_remove_adapter(hw);
 422                 return true;
 423         }
 424         return false;
 425 }
 426
 427 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 428 {
 429         struct ixgbe_adapter *adapter = hw->back;
 430         u16 value;
 431
 432         if (ixgbe_removed(hw->hw_addr))
 433                 return IXGBE_FAILED_READ_CFG_WORD;
 434         pci_read_config_word(adapter->pdev, reg, &value);
 435         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 436             ixgbe_check_cfg_remove(hw, adapter->pdev))
 437                 return IXGBE_FAILED_READ_CFG_WORD;
 438         return value;
 439 }
 440
 441 #ifdef CONFIG_PCI_IOV
 442 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 443 {
 444         struct ixgbe_adapter *adapter = hw->back;
 445         u32 value;
 446
 447         if (ixgbe_removed(hw->hw_addr))
 448                 return IXGBE_FAILED_READ_CFG_DWORD;
 449         pci_read_config_dword(adapter->pdev, reg, &value);
 450         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 451             ixgbe_check_cfg_remove(hw, adapter->pdev))
 452                 return IXGBE_FAILED_READ_CFG_DWORD;
 453         return value;
 454 }
 455 #endif /* CONFIG_PCI_IOV */
 456
 457 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 458 {
 459         struct ixgbe_adapter *adapter = hw->back;
 460
 461         if (ixgbe_removed(hw->hw_addr))
 462                 return;
 463         pci_write_config_word(adapter->pdev, reg, value);
 464 }
 465
 466 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 467 {
 468         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 469
 470         /* flush memory to make sure state is correct before next watchdog */
 471         smp_mb__before_atomic();
 472         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 473 }
 474
 475 struct ixgbe_reg_info {
 476         u32 ofs;
 477         char *name;
 478 };
 479
 480 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 481
 482         /* General Registers */
 483         {IXGBE_CTRL, "CTRL"},
 484         {IXGBE_STATUS, "STATUS"},
 485         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 486
 487         /* Interrupt Registers */
 488         {IXGBE_EICR, "EICR"},
 489
 490         /* RX Registers */
 491         {IXGBE_SRRCTL(0), "SRRCTL"},
 492         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 493         {IXGBE_RDLEN(0), "RDLEN"},
 494         {IXGBE_RDH(0), "RDH"},
 495         {IXGBE_RDT(0), "RDT"},
 496         {IXGBE_RXDCTL(0), "RXDCTL"},
 497         {IXGBE_RDBAL(0), "RDBAL"},
 498         {IXGBE_RDBAH(0), "RDBAH"},
 499
 500         /* TX Registers */
 501         {IXGBE_TDBAL(0), "TDBAL"},
 502         {IXGBE_TDBAH(0), "TDBAH"},
 503         {IXGBE_TDLEN(0), "TDLEN"},
 504         {IXGBE_TDH(0), "TDH"},
 505         {IXGBE_TDT(0), "TDT"},
 506         {IXGBE_TXDCTL(0), "TXDCTL"},
 507
 508         /* List Terminator */
 509         { .name = NULL }
 510 };
 511
 512
 513 /*
 514  * ixgbe_regdump - register printout routine
 515  */
 516 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 517 {
 518         int i;
 519         char rname[16];
 520         u32 regs[64];
 521
 522         switch (reginfo->ofs) {
 523         case IXGBE_SRRCTL(0):
 524                 for (i = 0; i < 64; i++)
 525                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 526                 break;
 527         case IXGBE_DCA_RXCTRL(0):
 528                 for (i = 0; i < 64; i++)
 529                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 530                 break;
 531         case IXGBE_RDLEN(0):
 532                 for (i = 0; i < 64; i++)
 533                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 534                 break;
 535         case IXGBE_RDH(0):
 536                 for (i = 0; i < 64; i++)
 537                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 538                 break;
 539         case IXGBE_RDT(0):
 540                 for (i = 0; i < 64; i++)
 541                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 542                 break;
 543         case IXGBE_RXDCTL(0):
 544                 for (i = 0; i < 64; i++)
 545                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 546                 break;
 547         case IXGBE_RDBAL(0):
 548                 for (i = 0; i < 64; i++)
 549                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 550                 break;
 551         case IXGBE_RDBAH(0):
 552                 for (i = 0; i < 64; i++)
 553                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 554                 break;
 555         case IXGBE_TDBAL(0):
 556                 for (i = 0; i < 64; i++)
 557                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 558                 break;
 559         case IXGBE_TDBAH(0):
 560                 for (i = 0; i < 64; i++)
 561                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 562                 break;
 563         case IXGBE_TDLEN(0):
 564                 for (i = 0; i < 64; i++)
 565                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 566                 break;
 567         case IXGBE_TDH(0):
 568                 for (i = 0; i < 64; i++)
 569                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 570                 break;
 571         case IXGBE_TDT(0):
 572                 for (i = 0; i < 64; i++)
 573                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 574                 break;
 575         case IXGBE_TXDCTL(0):
 576                 for (i = 0; i < 64; i++)
 577                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 578                 break;
 579         default:
 580                 pr_info("%-15s %08x\n",
 581                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 582                 return;
 583         }
 584
 585         i = 0;
 586         while (i < 64) {
 587                 int j;
 588                 char buf[9 * 8 + 1];
 589                 char *p = buf;
 590
 591                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 592                 for (j = 0; j < 8; j++)
 593                         p += sprintf(p, " %08x", regs[i++]);
 594                 pr_err("%-15s%s\n", rname, buf);
 595         }
 596
 597 }
 598
 599 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 600 {
 601         struct ixgbe_tx_buffer *tx_buffer;
 602
 603         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 604         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 605                 n, ring->next_to_use, ring->next_to_clean,
 606                 (u64)dma_unmap_addr(tx_buffer, dma),
 607                 dma_unmap_len(tx_buffer, len),
 608                 tx_buffer->next_to_watch,
 609                 (u64)tx_buffer->time_stamp);
 610 }
 611
 612 /*
 613  * ixgbe_dump - Print registers, tx-rings and rx-rings
 614  */
 615 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 616 {
 617         struct net_device *netdev = adapter->netdev;
 618         struct ixgbe_hw *hw = &adapter->hw;
 619         struct ixgbe_reg_info *reginfo;
 620         int n = 0;
 621         struct ixgbe_ring *ring;
 622         struct ixgbe_tx_buffer *tx_buffer;
 623         union ixgbe_adv_tx_desc *tx_desc;
 624         struct my_u0 { u64 a; u64 b; } *u0;
 625         struct ixgbe_ring *rx_ring;
 626         union ixgbe_adv_rx_desc *rx_desc;
 627         struct ixgbe_rx_buffer *rx_buffer_info;
 628         int i = 0;
 629
 630         if (!netif_msg_hw(adapter))
 631                 return;
 632
 633         /* Print netdevice Info */
 634         if (netdev) {
 635                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 636                 pr_info("Device Name     state            "
 637                         "trans_start\n");
 638                 pr_info("%-15s %016lX %016lX\n",
 639                         netdev->name,
 640                         netdev->state,
 641                         dev_trans_start(netdev));
 642         }
 643
 644         /* Print Registers */
 645         dev_info(&adapter->pdev->dev, "Register Dump\n");
 646         pr_info(" Register Name   Value\n");
 647         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 648              reginfo->name; reginfo++) {
 649                 ixgbe_regdump(hw, reginfo);
 650         }
 651
 652         /* Print TX Ring Summary */
 653         if (!netdev || !netif_running(netdev))
 654                 return;
 655
 656         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 657         pr_info(" %s     %s              %s        %s\n",
 658                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 659                 "leng", "ntw", "timestamp");
 660         for (n = 0; n < adapter->num_tx_queues; n++) {
 661                 ring = adapter->tx_ring[n];
 662                 ixgbe_print_buffer(ring, n);
 663         }
 664
 665         for (n = 0; n < adapter->num_xdp_queues; n++) {
 666                 ring = adapter->xdp_ring[n];
 667                 ixgbe_print_buffer(ring, n);
 668         }
 669
 670         /* Print TX Rings */
 671         if (!netif_msg_tx_done(adapter))
 672                 goto rx_ring_summary;
 673
 674         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 675
 676         /* Transmit Descriptor Formats
 677          *
 678          * 82598 Advanced Transmit Descriptor
 679          *   +--------------------------------------------------------------+
 680          * 0 |         Buffer Address [63:0]                                |
 681          *   +--------------------------------------------------------------+
 682          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 683          *   +--------------------------------------------------------------+
 684          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 685          *
 686          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 687          *   +--------------------------------------------------------------+
 688          * 0 |                          RSV [63:0]                          |
 689          *   +--------------------------------------------------------------+
 690          * 8 |            RSV           |  STA  |          NXTSEQ           |
 691          *   +--------------------------------------------------------------+
 692          *   63                       36 35   32 31                         0
 693          *
 694          * 82599+ Advanced Transmit Descriptor
 695          *   +--------------------------------------------------------------+
 696          * 0 |         Buffer Address [63:0]                                |
 697          *   +--------------------------------------------------------------+
 698          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 699          *   +--------------------------------------------------------------+
 700          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 701          *
 702          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 703          *   +--------------------------------------------------------------+
 704          * 0 |                          RSV [63:0]                          |
 705          *   +--------------------------------------------------------------+
 706          * 8 |            RSV           |  STA  |           RSV             |
 707          *   +--------------------------------------------------------------+
 708          *   63                       36 35   32 31                         0
 709          */
 710
 711         for (n = 0; n < adapter->num_tx_queues; n++) {
 712                 ring = adapter->tx_ring[n];
 713                 pr_info("------------------------------------\n");
 714                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 715                 pr_info("------------------------------------\n");
 716                 pr_info("%s%s    %s              %s        %s          %s\n",
 717                         "T [desc]     [address 63:0  ] ",
 718                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 719                         "leng", "ntw", "timestamp", "bi->skb");
 720
 721                 for (i = 0; ring->desc && (i < ring->count); i++) {
 722                         tx_desc = IXGBE_TX_DESC(ring, i);
 723                         tx_buffer = &ring->tx_buffer_info[i];
 724                         u0 = (struct my_u0 *)tx_desc;
 725                         if (dma_unmap_len(tx_buffer, len) > 0) {
 726                                 const char *ring_desc;
 727
 728                                 if (i == ring->next_to_use &&
 729                                     i == ring->next_to_clean)
 730                                         ring_desc = " NTC/U";
 731                                 else if (i == ring->next_to_use)
 732                                         ring_desc = " NTU";
 733                                 else if (i == ring->next_to_clean)
 734                                         ring_desc = " NTC";
 735                                 else
 736                                         ring_desc = "";
 737                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 738                                         i,
 739                                         le64_to_cpu(u0->a),
 740                                         le64_to_cpu(u0->b),
 741                                         (u64)dma_unmap_addr(tx_buffer, dma),
 742                                         dma_unmap_len(tx_buffer, len),
 743                                         tx_buffer->next_to_watch,
 744                                         (u64)tx_buffer->time_stamp,
 745                                         tx_buffer->skb,
 746                                         ring_desc);
 747
 748                                 if (netif_msg_pktdata(adapter) &&
 749                                     tx_buffer->skb)
 750                                         print_hex_dump(KERN_INFO, "",
 751                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 752                                                 tx_buffer->skb->data,
 753                                                 dma_unmap_len(tx_buffer, len),
 754                                                 true);
 755                         }
 756                 }
 757         }
 758
 759         /* Print RX Rings Summary */
 760 rx_ring_summary:
 761         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 762         pr_info("Queue [NTU] [NTC]\n");
 763         for (n = 0; n < adapter->num_rx_queues; n++) {
 764                 rx_ring = adapter->rx_ring[n];
 765                 pr_info("%5d %5X %5X\n",
 766                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 767         }
 768
 769         /* Print RX Rings */
 770         if (!netif_msg_rx_status(adapter))
 771                 return;
 772
 773         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 774
 775         /* Receive Descriptor Formats
 776          *
 777          * 82598 Advanced Receive Descriptor (Read) Format
 778          *    63                                           1        0
 779          *    +-----------------------------------------------------+
 780          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 781          *    +----------------------------------------------+------+
 782          *  8 |       Header Buffer Address [63:1]           |  DD  |
 783          *    +-----------------------------------------------------+
 784          *
 785          *
 786          * 82598 Advanced Receive Descriptor (Write-Back) Format
 787          *
 788          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 789          *   +------------------------------------------------------+
 790          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 791          *   | Packet   | IP     |   |          |     | Type | Type |
 792          *   | Checksum | Ident  |   |          |     |      |      |
 793          *   +------------------------------------------------------+
 794          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 795          *   +------------------------------------------------------+
 796          *   63       48 47    32 31            20 19               0
 797          *
 798          * 82599+ Advanced Receive Descriptor (Read) Format
 799          *    63                                           1        0
 800          *    +-----------------------------------------------------+
 801          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 802          *    +----------------------------------------------+------+
 803          *  8 |       Header Buffer Address [63:1]           |  DD  |
 804          *    +-----------------------------------------------------+
 805          *
 806          *
 807          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 808          *
 809          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 810          *   +------------------------------------------------------+
 811          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 812          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 813          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 814          *   +------------------------------------------------------+
 815          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 816          *   +------------------------------------------------------+
 817          *   63       48 47    32 31          20 19                 0
 818          */
 819
 820         for (n = 0; n < adapter->num_rx_queues; n++) {
 821                 rx_ring = adapter->rx_ring[n];
 822                 pr_info("------------------------------------\n");
 823                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 824                 pr_info("------------------------------------\n");
 825                 pr_info("%s%s%s\n",
 826                         "R  [desc]      [ PktBuf     A0] ",
 827                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 828                         "<-- Adv Rx Read format");
 829                 pr_info("%s%s%s\n",
 830                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 831                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 832                         "<-- Adv Rx Write-Back format");
 833
 834                 for (i = 0; i < rx_ring->count; i++) {
 835                         const char *ring_desc;
 836
 837                         if (i == rx_ring->next_to_use)
 838                                 ring_desc = " NTU";
 839                         else if (i == rx_ring->next_to_clean)
 840                                 ring_desc = " NTC";
 841                         else
 842                                 ring_desc = "";
 843
 844                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 845                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 846                         u0 = (struct my_u0 *)rx_desc;
 847                         if (rx_desc->wb.upper.length) {
 848                                 /* Descriptor Done */
 849                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 850                                         i,
 851                                         le64_to_cpu(u0->a),
 852                                         le64_to_cpu(u0->b),
 853                                         rx_buffer_info->skb,
 854                                         ring_desc);
 855                         } else {
 856                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 857                                         i,
 858                                         le64_to_cpu(u0->a),
 859                                         le64_to_cpu(u0->b),
 860                                         (u64)rx_buffer_info->dma,
 861                                         rx_buffer_info->skb,
 862                                         ring_desc);
 863
 864                                 if (netif_msg_pktdata(adapter) &&
 865                                     rx_buffer_info->dma) {
 866                                         print_hex_dump(KERN_INFO, "",
 867                                            DUMP_PREFIX_ADDRESS, 16, 1,
 868                                            page_address(rx_buffer_info->page) +
 869                                                     rx_buffer_info->page_offset,
 870                                            ixgbe_rx_bufsz(rx_ring), true);
 871                                 }
 872                         }
 873                 }
 874         }
 875 }
 876
 877 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 878 {
 879         u32 ctrl_ext;
 880
 881         /* Let firmware take over control of h/w */
 882         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 883         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 884                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 885 }
 886
 887 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 888 {
 889         u32 ctrl_ext;
 890
 891         /* Let firmware know the driver has taken over */
 892         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 893         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 894                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 895 }
 896
 897 /**
 898  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 899  * @adapter: pointer to adapter struct
 900  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 901  * @queue: queue to map the corresponding interrupt to
 902  * @msix_vector: the vector to map to the corresponding queue
 903  *
 904  */
 905 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 906                            u8 queue, u8 msix_vector)
 907 {
 908         u32 ivar, index;
 909         struct ixgbe_hw *hw = &adapter->hw;
 910         switch (hw->mac.type) {
 911         case ixgbe_mac_82598EB:
 912                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 913                 if (direction == -1)
 914                         direction = 0;
 915                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 916                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 917                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 918                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 919                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 920                 break;
 921         case ixgbe_mac_82599EB:
 922         case ixgbe_mac_X540:
 923         case ixgbe_mac_X550:
 924         case ixgbe_mac_X550EM_x:
 925         case ixgbe_mac_x550em_a:
 926                 if (direction == -1) {
 927                         /* other causes */
 928                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 929                         index = ((queue & 1) * 8);
 930                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 931                         ivar &= ~(0xFF << index);
 932                         ivar |= (msix_vector << index);
 933                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 934                         break;
 935                 } else {
 936                         /* tx or rx causes */
 937                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 938                         index = ((16 * (queue & 1)) + (8 * direction));
 939                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 940                         ivar &= ~(0xFF << index);
 941                         ivar |= (msix_vector << index);
 942                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 943                         break;
 944                 }
 945         default:
 946                 break;
 947         }
 948 }
 949
 950 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 951                                           u64 qmask)
 952 {
 953         u32 mask;
 954
 955         switch (adapter->hw.mac.type) {
 956         case ixgbe_mac_82598EB:
 957                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 958                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 959                 break;
 960         case ixgbe_mac_82599EB:
 961         case ixgbe_mac_X540:
 962         case ixgbe_mac_X550:
 963         case ixgbe_mac_X550EM_x:
 964         case ixgbe_mac_x550em_a:
 965                 mask = (qmask & 0xFFFFFFFF);
 966                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 967                 mask = (qmask >> 32);
 968                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 969                 break;
 970         default:
 971                 break;
 972         }
 973 }
 974
 975 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 976 {
 977         struct ixgbe_hw *hw = &adapter->hw;
 978         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 979         int i;
 980         u32 data;
 981
 982         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 983             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 984                 return;
 985
 986         switch (hw->mac.type) {
 987         case ixgbe_mac_82598EB:
 988                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 989                 break;
 990         default:
 991                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 992         }
 993         hwstats->lxoffrxc += data;
 994
 995         /* refill credits (no tx hang) if we received xoff */
 996         if (!data)
 997                 return;
 998
 999         for (i = 0; i < adapter->num_tx_queues; i++)
1000                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1001                           &adapter->tx_ring[i]->state);
1002
1003         for (i = 0; i < adapter->num_xdp_queues; i++)
1004                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1005                           &adapter->xdp_ring[i]->state);
1006 }
1007
1008 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
1009 {
1010         struct ixgbe_hw *hw = &adapter->hw;
1011         struct ixgbe_hw_stats *hwstats = &adapter->stats;
1012         u32 xoff[8] = {0};
1013         u8 tc;
1014         int i;
1015         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1016
1017         if (adapter->ixgbe_ieee_pfc)
1018                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1019
1020         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1021                 ixgbe_update_xoff_rx_lfc(adapter);
1022                 return;
1023         }
1024
1025         /* update stats for each tc, only valid with PFC enabled */
1026         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1027                 u32 pxoffrxc;
1028
1029                 switch (hw->mac.type) {
1030                 case ixgbe_mac_82598EB:
1031                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1032                         break;
1033                 default:
1034                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1035                 }
1036                 hwstats->pxoffrxc[i] += pxoffrxc;
1037                 /* Get the TC for given UP */
1038                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1039                 xoff[tc] += pxoffrxc;
1040         }
1041
1042         /* disarm tx queues that have received xoff frames */
1043         for (i = 0; i < adapter->num_tx_queues; i++) {
1044                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1045
1046                 tc = tx_ring->dcb_tc;
1047                 if (xoff[tc])
1048                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1049         }
1050
1051         for (i = 0; i < adapter->num_xdp_queues; i++) {
1052                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1053
1054                 tc = xdp_ring->dcb_tc;
1055                 if (xoff[tc])
1056                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1057         }
1058 }
1059
1060 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1061 {
1062         return ring->stats.packets;
1063 }
1064
1065 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1066 {
1067         struct ixgbe_adapter *adapter;
1068         struct ixgbe_hw *hw;
1069         u32 head, tail;
1070
1071         if (ring->l2_accel_priv)
1072                 adapter = ring->l2_accel_priv->real_adapter;
1073         else
1074                 adapter = netdev_priv(ring->netdev);
1075
1076         hw = &adapter->hw;
1077         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1078         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1079
1080         if (head != tail)
1081                 return (head < tail) ?
1082                         tail - head : (tail + ring->count - head);
1083
1084         return 0;
1085 }
1086
1087 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1088 {
1089         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1090         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1091         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1092
1093         clear_check_for_tx_hang(tx_ring);
1094
1095         /*
1096          * Check for a hung queue, but be thorough. This verifies
1097          * that a transmit has been completed since the previous
1098          * check AND there is at least one packet pending. The
1099          * ARMED bit is set to indicate a potential hang. The
1100          * bit is cleared if a pause frame is received to remove
1101          * false hang detection due to PFC or 802.3x frames. By
1102          * requiring this to fail twice we avoid races with
1103          * pfc clearing the ARMED bit and conditions where we
1104          * run the check_tx_hang logic with a transmit completion
1105          * pending but without time to complete it yet.
1106          */
1107         if (tx_done_old == tx_done && tx_pending)
1108                 /* make sure it is true for two checks in a row */
1109                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1110                                         &tx_ring->state);
1111         /* update completed stats and continue */
1112         tx_ring->tx_stats.tx_done_old = tx_done;
1113         /* reset the countdown */
1114         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1115
1116         return false;
1117 }
1118
1119 /**
1120  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1121  * @adapter: driver private struct
1122  **/
1123 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1124 {
1125
1126         /* Do the reset outside of interrupt context */
1127         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1128                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1129                 e_warn(drv, "initiating reset due to tx timeout\n");
1130                 ixgbe_service_event_schedule(adapter);
1131         }
1132 }
1133
1134 /**
1135  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1136  **/
1137 static int ixgbe_tx_maxrate(struct net_device *netdev,
1138                             int queue_index, u32 maxrate)
1139 {
1140         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1141         struct ixgbe_hw *hw = &adapter->hw;
1142         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1143
1144         if (!maxrate)
1145                 return 0;
1146
1147         /* Calculate the rate factor values to set */
1148         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1149         bcnrc_val /= maxrate;
1150
1151         /* clear everything but the rate factor */
1152         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1153         IXGBE_RTTBCNRC_RF_DEC_MASK;
1154
1155         /* enable the rate scheduler */
1156         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1157
1158         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1159         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1160
1161         return 0;
1162 }
1163
1164 /**
1165  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1166  * @q_vector: structure containing interrupt and ring information
1167  * @tx_ring: tx ring to clean
1168  * @napi_budget: Used to determine if we are in netpoll
1169  **/
1170 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1171                                struct ixgbe_ring *tx_ring, int napi_budget)
1172 {
1173         struct ixgbe_adapter *adapter = q_vector->adapter;
1174         struct ixgbe_tx_buffer *tx_buffer;
1175         union ixgbe_adv_tx_desc *tx_desc;
1176         unsigned int total_bytes = 0, total_packets = 0;
1177         unsigned int budget = q_vector->tx.work_limit;
1178         unsigned int i = tx_ring->next_to_clean;
1179
1180         if (test_bit(__IXGBE_DOWN, &adapter->state))
1181                 return true;
1182
1183         tx_buffer = &tx_ring->tx_buffer_info[i];
1184         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1185         i -= tx_ring->count;
1186
1187         do {
1188                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1189
1190                 /* if next_to_watch is not set then there is no work pending */
1191                 if (!eop_desc)
1192                         break;
1193
1194                 /* prevent any other reads prior to eop_desc */
1195                 smp_rmb();
1196
1197                 /* if DD is not set pending work has not been completed */
1198                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1199                         break;
1200
1201                 /* clear next_to_watch to prevent false hangs */
1202                 tx_buffer->next_to_watch = NULL;
1203
1204                 /* update the statistics for this packet */
1205                 total_bytes += tx_buffer->bytecount;
1206                 total_packets += tx_buffer->gso_segs;
1207
1208                 /* free the skb */
1209                 if (ring_is_xdp(tx_ring))
1210                         page_frag_free(tx_buffer->data);
1211                 else
1212                         napi_consume_skb(tx_buffer->skb, napi_budget);
1213
1214                 /* unmap skb header data */
1215                 dma_unmap_single(tx_ring->dev,
1216                                  dma_unmap_addr(tx_buffer, dma),
1217                                  dma_unmap_len(tx_buffer, len),
1218                                  DMA_TO_DEVICE);
1219
1220                 /* clear tx_buffer data */
1221                 dma_unmap_len_set(tx_buffer, len, 0);
1222
1223                 /* unmap remaining buffers */
1224                 while (tx_desc != eop_desc) {
1225                         tx_buffer++;
1226                         tx_desc++;
1227                         i++;
1228                         if (unlikely(!i)) {
1229                                 i -= tx_ring->count;
1230                                 tx_buffer = tx_ring->tx_buffer_info;
1231                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1232                         }
1233
1234                         /* unmap any remaining paged data */
1235                         if (dma_unmap_len(tx_buffer, len)) {
1236                                 dma_unmap_page(tx_ring->dev,
1237                                                dma_unmap_addr(tx_buffer, dma),
1238                                                dma_unmap_len(tx_buffer, len),
1239                                                DMA_TO_DEVICE);
1240                                 dma_unmap_len_set(tx_buffer, len, 0);
1241                         }
1242                 }
1243
1244                 /* move us one more past the eop_desc for start of next pkt */
1245                 tx_buffer++;
1246                 tx_desc++;
1247                 i++;
1248                 if (unlikely(!i)) {
1249                         i -= tx_ring->count;
1250                         tx_buffer = tx_ring->tx_buffer_info;
1251                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1252                 }
1253
1254                 /* issue prefetch for next Tx descriptor */
1255                 prefetch(tx_desc);
1256
1257                 /* update budget accounting */
1258                 budget--;
1259         } while (likely(budget));
1260
1261         i += tx_ring->count;
1262         tx_ring->next_to_clean = i;
1263         u64_stats_update_begin(&tx_ring->syncp);
1264         tx_ring->stats.bytes += total_bytes;
1265         tx_ring->stats.packets += total_packets;
1266         u64_stats_update_end(&tx_ring->syncp);
1267         q_vector->tx.total_bytes += total_bytes;
1268         q_vector->tx.total_packets += total_packets;
1269
1270         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1271                 /* schedule immediate reset if we believe we hung */
1272                 struct ixgbe_hw *hw = &adapter->hw;
1273                 e_err(drv, "Detected Tx Unit Hang %s\n"
1274                         "  Tx Queue             <%d>\n"
1275                         "  TDH, TDT             <%x>, <%x>\n"
1276                         "  next_to_use          <%x>\n"
1277                         "  next_to_clean        <%x>\n"
1278                         "tx_buffer_info[next_to_clean]\n"
1279                         "  time_stamp           <%lx>\n"
1280                         "  jiffies              <%lx>\n",
1281                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1282                         tx_ring->queue_index,
1283                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1284                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1285                         tx_ring->next_to_use, i,
1286                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1287
1288                 if (!ring_is_xdp(tx_ring))
1289                         netif_stop_subqueue(tx_ring->netdev,
1290                                             tx_ring->queue_index);
1291
1292                 e_info(probe,
1293                        "tx hang %d detected on queue %d, resetting adapter\n",
1294                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1295
1296                 /* schedule immediate reset if we believe we hung */
1297                 ixgbe_tx_timeout_reset(adapter);
1298
1299                 /* the adapter is about to reset, no point in enabling stuff */
1300                 return true;
1301         }
1302
1303         if (ring_is_xdp(tx_ring))
1304                 return !!budget;
1305
1306         netdev_tx_completed_queue(txring_txq(tx_ring),
1307                                   total_packets, total_bytes);
1308
1309 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1310         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1311                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1312                 /* Make sure that anybody stopping the queue after this
1313                  * sees the new next_to_clean.
1314                  */
1315                 smp_mb();
1316                 if (__netif_subqueue_stopped(tx_ring->netdev,
1317                                              tx_ring->queue_index)
1318                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1319                         netif_wake_subqueue(tx_ring->netdev,
1320                                             tx_ring->queue_index);
1321                         ++tx_ring->tx_stats.restart_queue;
1322                 }
1323         }
1324
1325         return !!budget;
1326 }
1327
1328 #ifdef CONFIG_IXGBE_DCA
1329 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1330                                 struct ixgbe_ring *tx_ring,
1331                                 int cpu)
1332 {
1333         struct ixgbe_hw *hw = &adapter->hw;
1334         u32 txctrl = 0;
1335         u16 reg_offset;
1336
1337         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1338                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1339
1340         switch (hw->mac.type) {
1341         case ixgbe_mac_82598EB:
1342                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1343                 break;
1344         case ixgbe_mac_82599EB:
1345         case ixgbe_mac_X540:
1346                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1347                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1348                 break;
1349         default:
1350                 /* for unknown hardware do not write register */
1351                 return;
1352         }
1353
1354         /*
1355          * We can enable relaxed ordering for reads, but not writes when
1356          * DCA is enabled.  This is due to a known issue in some chipsets
1357          * which will cause the DCA tag to be cleared.
1358          */
1359         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1360                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1361                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1362
1363         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1364 }
1365
1366 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1367                                 struct ixgbe_ring *rx_ring,
1368                                 int cpu)
1369 {
1370         struct ixgbe_hw *hw = &adapter->hw;
1371         u32 rxctrl = 0;
1372         u8 reg_idx = rx_ring->reg_idx;
1373
1374         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1375                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1376
1377         switch (hw->mac.type) {
1378         case ixgbe_mac_82599EB:
1379         case ixgbe_mac_X540:
1380                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1381                 break;
1382         default:
1383                 break;
1384         }
1385
1386         /*
1387          * We can enable relaxed ordering for reads, but not writes when
1388          * DCA is enabled.  This is due to a known issue in some chipsets
1389          * which will cause the DCA tag to be cleared.
1390          */
1391         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1392                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1393                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1394
1395         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1396 }
1397
1398 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1399 {
1400         struct ixgbe_adapter *adapter = q_vector->adapter;
1401         struct ixgbe_ring *ring;
1402         int cpu = get_cpu();
1403
1404         if (q_vector->cpu == cpu)
1405                 goto out_no_update;
1406
1407         ixgbe_for_each_ring(ring, q_vector->tx)
1408                 ixgbe_update_tx_dca(adapter, ring, cpu);
1409
1410         ixgbe_for_each_ring(ring, q_vector->rx)
1411                 ixgbe_update_rx_dca(adapter, ring, cpu);
1412
1413         q_vector->cpu = cpu;
1414 out_no_update:
1415         put_cpu();
1416 }
1417
1418 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1419 {
1420         int i;
1421
1422         /* always use CB2 mode, difference is masked in the CB driver */
1423         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1424                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1425                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1426         else
1427                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1428                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1429
1430         for (i = 0; i < adapter->num_q_vectors; i++) {
1431                 adapter->q_vector[i]->cpu = -1;
1432                 ixgbe_update_dca(adapter->q_vector[i]);
1433         }
1434 }
1435
1436 static int __ixgbe_notify_dca(struct device *dev, void *data)
1437 {
1438         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1439         unsigned long event = *(unsigned long *)data;
1440
1441         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1442                 return 0;
1443
1444         switch (event) {
1445         case DCA_PROVIDER_ADD:
1446                 /* if we're already enabled, don't do it again */
1447                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1448                         break;
1449                 if (dca_add_requester(dev) == 0) {
1450                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1451                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1452                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1453                         break;
1454                 }
1455                 /* fall through - DCA is disabled. */
1456         case DCA_PROVIDER_REMOVE:
1457                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1458                         dca_remove_requester(dev);
1459                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1460                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1461                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1462                 }
1463                 break;
1464         }
1465
1466         return 0;
1467 }
1468
1469 #endif /* CONFIG_IXGBE_DCA */
1470
1471 #define IXGBE_RSS_L4_TYPES_MASK \
1472         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1473          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1474          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1475          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1476
1477 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1478                                  union ixgbe_adv_rx_desc *rx_desc,
1479                                  struct sk_buff *skb)
1480 {
1481         u16 rss_type;
1482
1483         if (!(ring->netdev->features & NETIF_F_RXHASH))
1484                 return;
1485
1486         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1487                    IXGBE_RXDADV_RSSTYPE_MASK;
1488
1489         if (!rss_type)
1490                 return;
1491
1492         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1493                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1494                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1495 }
1496
1497 #ifdef IXGBE_FCOE
1498 /**
1499  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1500  * @ring: structure containing ring specific data
1501  * @rx_desc: advanced rx descriptor
1502  *
1503  * Returns : true if it is FCoE pkt
1504  */
1505 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1506                                     union ixgbe_adv_rx_desc *rx_desc)
1507 {
1508         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1509
1510         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1511                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1512                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1513                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1514 }
1515
1516 #endif /* IXGBE_FCOE */
1517 /**
1518  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1519  * @ring: structure containing ring specific data
1520  * @rx_desc: current Rx descriptor being processed
1521  * @skb: skb currently being received and modified
1522  **/
1523 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1524                                      union ixgbe_adv_rx_desc *rx_desc,
1525                                      struct sk_buff *skb)
1526 {
1527         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1528         bool encap_pkt = false;
1529
1530         skb_checksum_none_assert(skb);
1531
1532         /* Rx csum disabled */
1533         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1534                 return;
1535
1536         /* check for VXLAN and Geneve packets */
1537         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1538                 encap_pkt = true;
1539                 skb->encapsulation = 1;
1540         }
1541
1542         /* if IP and error */
1543         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1544             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1545                 ring->rx_stats.csum_err++;
1546                 return;
1547         }
1548
1549         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1550                 return;
1551
1552         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1553                 /*
1554                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1555                  * checksum errors.
1556                  */
1557                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1558                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1559                         return;
1560
1561                 ring->rx_stats.csum_err++;
1562                 return;
1563         }
1564
1565         /* It must be a TCP or UDP packet with a valid checksum */
1566         skb->ip_summed = CHECKSUM_UNNECESSARY;
1567         if (encap_pkt) {
1568                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1569                         return;
1570
1571                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1572                         skb->ip_summed = CHECKSUM_NONE;
1573                         return;
1574                 }
1575                 /* If we checked the outer header let the stack know */
1576                 skb->csum_level = 1;
1577         }
1578 }
1579
1580 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1581 {
1582         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1583 }
1584
1585 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1586                                     struct ixgbe_rx_buffer *bi)
1587 {
1588         struct page *page = bi->page;
1589         dma_addr_t dma;
1590
1591         /* since we are recycling buffers we should seldom need to alloc */
1592         if (likely(page))
1593                 return true;
1594
1595         /* alloc new page for storage */
1596         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1597         if (unlikely(!page)) {
1598                 rx_ring->rx_stats.alloc_rx_page_failed++;
1599                 return false;
1600         }
1601
1602         /* map page for use */
1603         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1604                                  ixgbe_rx_pg_size(rx_ring),
1605                                  DMA_FROM_DEVICE,
1606                                  IXGBE_RX_DMA_ATTR);
1607
1608         /*
1609          * if mapping failed free memory back to system since
1610          * there isn't much point in holding memory we can't use
1611          */
1612         if (dma_mapping_error(rx_ring->dev, dma)) {
1613                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1614
1615                 rx_ring->rx_stats.alloc_rx_page_failed++;
1616                 return false;
1617         }
1618
1619         bi->dma = dma;
1620         bi->page = page;
1621         bi->page_offset = ixgbe_rx_offset(rx_ring);
1622         bi->pagecnt_bias = 1;
1623
1624         return true;
1625 }
1626
1627 /**
1628  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1629  * @rx_ring: ring to place buffers on
1630  * @cleaned_count: number of buffers to replace
1631  **/
1632 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1633 {
1634         union ixgbe_adv_rx_desc *rx_desc;
1635         struct ixgbe_rx_buffer *bi;
1636         u16 i = rx_ring->next_to_use;
1637         u16 bufsz;
1638
1639         /* nothing to do */
1640         if (!cleaned_count)
1641                 return;
1642
1643         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1644         bi = &rx_ring->rx_buffer_info[i];
1645         i -= rx_ring->count;
1646
1647         bufsz = ixgbe_rx_bufsz(rx_ring);
1648
1649         do {
1650                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1651                         break;
1652
1653                 /* sync the buffer for use by the device */
1654                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1655                                                  bi->page_offset, bufsz,
1656                                                  DMA_FROM_DEVICE);
1657
1658                 /*
1659                  * Refresh the desc even if buffer_addrs didn't change
1660                  * because each write-back erases this info.
1661                  */
1662                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1663
1664                 rx_desc++;
1665                 bi++;
1666                 i++;
1667                 if (unlikely(!i)) {
1668                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1669                         bi = rx_ring->rx_buffer_info;
1670                         i -= rx_ring->count;
1671                 }
1672
1673                 /* clear the length for the next_to_use descriptor */
1674                 rx_desc->wb.upper.length = 0;
1675
1676                 cleaned_count--;
1677         } while (cleaned_count);
1678
1679         i += rx_ring->count;
1680
1681         if (rx_ring->next_to_use != i) {
1682                 rx_ring->next_to_use = i;
1683
1684                 /* update next to alloc since we have filled the ring */
1685                 rx_ring->next_to_alloc = i;
1686
1687                 /* Force memory writes to complete before letting h/w
1688                  * know there are new descriptors to fetch.  (Only
1689                  * applicable for weak-ordered memory model archs,
1690                  * such as IA-64).
1691                  */
1692                 wmb();
1693                 writel(i, rx_ring->tail);
1694         }
1695 }
1696
1697 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1698                                    struct sk_buff *skb)
1699 {
1700         u16 hdr_len = skb_headlen(skb);
1701
1702         /* set gso_size to avoid messing up TCP MSS */
1703         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1704                                                  IXGBE_CB(skb)->append_cnt);
1705         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1706 }
1707
1708 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1709                                    struct sk_buff *skb)
1710 {
1711         /* if append_cnt is 0 then frame is not RSC */
1712         if (!IXGBE_CB(skb)->append_cnt)
1713                 return;
1714
1715         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1716         rx_ring->rx_stats.rsc_flush++;
1717
1718         ixgbe_set_rsc_gso_size(rx_ring, skb);
1719
1720         /* gso_size is computed using append_cnt so always clear it last */
1721         IXGBE_CB(skb)->append_cnt = 0;
1722 }
1723
1724 /**
1725  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1726  * @rx_ring: rx descriptor ring packet is being transacted on
1727  * @rx_desc: pointer to the EOP Rx descriptor
1728  * @skb: pointer to current skb being populated
1729  *
1730  * This function checks the ring, descriptor, and packet information in
1731  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1732  * other fields within the skb.
1733  **/
1734 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1735                                      union ixgbe_adv_rx_desc *rx_desc,
1736                                      struct sk_buff *skb)
1737 {
1738         struct net_device *dev = rx_ring->netdev;
1739         u32 flags = rx_ring->q_vector->adapter->flags;
1740
1741         ixgbe_update_rsc_stats(rx_ring, skb);
1742
1743         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1744
1745         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1746
1747         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1748                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1749
1750         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1751             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1752                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1753                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1754         }
1755
1756         skb_record_rx_queue(skb, rx_ring->queue_index);
1757
1758         skb->protocol = eth_type_trans(skb, dev);
1759 }
1760
1761 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1762                          struct sk_buff *skb)
1763 {
1764         napi_gro_receive(&q_vector->napi, skb);
1765 }
1766
1767 /**
1768  * ixgbe_is_non_eop - process handling of non-EOP buffers
1769  * @rx_ring: Rx ring being processed
1770  * @rx_desc: Rx descriptor for current buffer
1771  * @skb: Current socket buffer containing buffer in progress
1772  *
1773  * This function updates next to clean.  If the buffer is an EOP buffer
1774  * this function exits returning false, otherwise it will place the
1775  * sk_buff in the next buffer to be chained and return true indicating
1776  * that this is in fact a non-EOP buffer.
1777  **/
1778 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1779                              union ixgbe_adv_rx_desc *rx_desc,
1780                              struct sk_buff *skb)
1781 {
1782         u32 ntc = rx_ring->next_to_clean + 1;
1783
1784         /* fetch, update, and store next to clean */
1785         ntc = (ntc < rx_ring->count) ? ntc : 0;
1786         rx_ring->next_to_clean = ntc;
1787
1788         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1789
1790         /* update RSC append count if present */
1791         if (ring_is_rsc_enabled(rx_ring)) {
1792                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1793                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1794
1795                 if (unlikely(rsc_enabled)) {
1796                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1797
1798                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1799                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1800
1801                         /* update ntc based on RSC value */
1802                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1803                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1804                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1805                 }
1806         }
1807
1808         /* if we are the last buffer then there is nothing else to do */
1809         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1810                 return false;
1811
1812         /* place skb in next buffer to be received */
1813         rx_ring->rx_buffer_info[ntc].skb = skb;
1814         rx_ring->rx_stats.non_eop_descs++;
1815
1816         return true;
1817 }
1818
1819 /**
1820  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1821  * @rx_ring: rx descriptor ring packet is being transacted on
1822  * @skb: pointer to current skb being adjusted
1823  *
1824  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1825  * main difference between this version and the original function is that
1826  * this function can make several assumptions about the state of things
1827  * that allow for significant optimizations versus the standard function.
1828  * As a result we can do things like drop a frag and maintain an accurate
1829  * truesize for the skb.
1830  */
1831 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1832                             struct sk_buff *skb)
1833 {
1834         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1835         unsigned char *va;
1836         unsigned int pull_len;
1837
1838         /*
1839          * it is valid to use page_address instead of kmap since we are
1840          * working with pages allocated out of the lomem pool per
1841          * alloc_page(GFP_ATOMIC)
1842          */
1843         va = skb_frag_address(frag);
1844
1845         /*
1846          * we need the header to contain the greater of either ETH_HLEN or
1847          * 60 bytes if the skb->len is less than 60 for skb_pad.
1848          */
1849         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1850
1851         /* align pull length to size of long to optimize memcpy performance */
1852         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1853
1854         /* update all of the pointers */
1855         skb_frag_size_sub(frag, pull_len);
1856         frag->page_offset += pull_len;
1857         skb->data_len -= pull_len;
1858         skb->tail += pull_len;
1859 }
1860
1861 /**
1862  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1863  * @rx_ring: rx descriptor ring packet is being transacted on
1864  * @skb: pointer to current skb being updated
1865  *
1866  * This function provides a basic DMA sync up for the first fragment of an
1867  * skb.  The reason for doing this is that the first fragment cannot be
1868  * unmapped until we have reached the end of packet descriptor for a buffer
1869  * chain.
1870  */
1871 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1872                                 struct sk_buff *skb)
1873 {
1874         if (ring_uses_build_skb(rx_ring)) {
1875                 unsigned long mask = (unsigned long)ixgbe_rx_pg_size(rx_ring) - 1;
1876                 unsigned long offset = (unsigned long)(skb->data) & mask;
1877
1878                 dma_sync_single_range_for_cpu(rx_ring->dev,
1879                                               IXGBE_CB(skb)->dma,
1880                                               offset,
1881                                               skb_headlen(skb),
1882                                               DMA_FROM_DEVICE);
1883         } else {
1884                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1885
1886                 dma_sync_single_range_for_cpu(rx_ring->dev,
1887                                               IXGBE_CB(skb)->dma,
1888                                               frag->page_offset,
1889                                               skb_frag_size(frag),
1890                                               DMA_FROM_DEVICE);
1891         }
1892
1893         /* If the page was released, just unmap it. */
1894         if (unlikely(IXGBE_CB(skb)->page_released)) {
1895                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1896                                      ixgbe_rx_pg_size(rx_ring),
1897                                      DMA_FROM_DEVICE,
1898                                      IXGBE_RX_DMA_ATTR);
1899         }
1900 }
1901
1902 /**
1903  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1904  * @rx_ring: rx descriptor ring packet is being transacted on
1905  * @rx_desc: pointer to the EOP Rx descriptor
1906  * @skb: pointer to current skb being fixed
1907  *
1908  * Check if the skb is valid in the XDP case it will be an error pointer.
1909  * Return true in this case to abort processing and advance to next
1910  * descriptor.
1911  *
1912  * Check for corrupted packet headers caused by senders on the local L2
1913  * embedded NIC switch not setting up their Tx Descriptors right.  These
1914  * should be very rare.
1915  *
1916  * Also address the case where we are pulling data in on pages only
1917  * and as such no data is present in the skb header.
1918  *
1919  * In addition if skb is not at least 60 bytes we need to pad it so that
1920  * it is large enough to qualify as a valid Ethernet frame.
1921  *
1922  * Returns true if an error was encountered and skb was freed.
1923  **/
1924 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1925                                   union ixgbe_adv_rx_desc *rx_desc,
1926                                   struct sk_buff *skb)
1927 {
1928         struct net_device *netdev = rx_ring->netdev;
1929
1930         /* XDP packets use error pointer so abort at this point */
1931         if (IS_ERR(skb))
1932                 return true;
1933
1934         /* verify that the packet does not have any known errors */
1935         if (unlikely(ixgbe_test_staterr(rx_desc,
1936                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1937             !(netdev->features & NETIF_F_RXALL))) {
1938                 dev_kfree_skb_any(skb);
1939                 return true;
1940         }
1941
1942         /* place header in linear portion of buffer */
1943         if (!skb_headlen(skb))
1944                 ixgbe_pull_tail(rx_ring, skb);
1945
1946 #ifdef IXGBE_FCOE
1947         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1948         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1949                 return false;
1950
1951 #endif
1952         /* if eth_skb_pad returns an error the skb was freed */
1953         if (eth_skb_pad(skb))
1954                 return true;
1955
1956         return false;
1957 }
1958
1959 /**
1960  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1961  * @rx_ring: rx descriptor ring to store buffers on
1962  * @old_buff: donor buffer to have page reused
1963  *
1964  * Synchronizes page for reuse by the adapter
1965  **/
1966 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1967                                 struct ixgbe_rx_buffer *old_buff)
1968 {
1969         struct ixgbe_rx_buffer *new_buff;
1970         u16 nta = rx_ring->next_to_alloc;
1971
1972         new_buff = &rx_ring->rx_buffer_info[nta];
1973
1974         /* update, and store next to alloc */
1975         nta++;
1976         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1977
1978         /* Transfer page from old buffer to new buffer.
1979          * Move each member individually to avoid possible store
1980          * forwarding stalls and unnecessary copy of skb.
1981          */
1982         new_buff->dma           = old_buff->dma;
1983         new_buff->page          = old_buff->page;
1984         new_buff->page_offset   = old_buff->page_offset;
1985         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1986 }
1987
1988 static inline bool ixgbe_page_is_reserved(struct page *page)
1989 {
1990         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1991 }
1992
1993 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1994 {
1995         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1996         struct page *page = rx_buffer->page;
1997
1998         /* avoid re-using remote pages */
1999         if (unlikely(ixgbe_page_is_reserved(page)))
2000                 return false;
2001
2002 #if (PAGE_SIZE < 8192)
2003         /* if we are only owner of page we can reuse it */
2004         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
2005                 return false;
2006 #else
2007         /* The last offset is a bit aggressive in that we assume the
2008          * worst case of FCoE being enabled and using a 3K buffer.
2009          * However this should have minimal impact as the 1K extra is
2010          * still less than one buffer in size.
2011          */
2012 #define IXGBE_LAST_OFFSET \
2013         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
2014         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
2015                 return false;
2016 #endif
2017
2018         /* If we have drained the page fragment pool we need to update
2019          * the pagecnt_bias and page count so that we fully restock the
2020          * number of references the driver holds.
2021          */
2022         if (unlikely(!pagecnt_bias)) {
2023                 page_ref_add(page, USHRT_MAX);
2024                 rx_buffer->pagecnt_bias = USHRT_MAX;
2025         }
2026
2027         return true;
2028 }
2029
2030 /**
2031  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
2032  * @rx_ring: rx descriptor ring to transact packets on
2033  * @rx_buffer: buffer containing page to add
2034  * @rx_desc: descriptor containing length of buffer written by hardware
2035  * @skb: sk_buff to place the data into
2036  *
2037  * This function will add the data contained in rx_buffer->page to the skb.
2038  * This is done either through a direct copy if the data in the buffer is
2039  * less than the skb header size, otherwise it will just attach the page as
2040  * a frag to the skb.
2041  *
2042  * The function will then update the page offset if necessary and return
2043  * true if the buffer can be reused by the adapter.
2044  **/
2045 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2046                               struct ixgbe_rx_buffer *rx_buffer,
2047                               struct sk_buff *skb,
2048                               unsigned int size)
2049 {
2050 #if (PAGE_SIZE < 8192)
2051         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2052 #else
2053         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2054                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2055                                 SKB_DATA_ALIGN(size);
2056 #endif
2057         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2058                         rx_buffer->page_offset, size, truesize);
2059 #if (PAGE_SIZE < 8192)
2060         rx_buffer->page_offset ^= truesize;
2061 #else
2062         rx_buffer->page_offset += truesize;
2063 #endif
2064 }
2065
2066 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2067                                                    union ixgbe_adv_rx_desc *rx_desc,
2068                                                    struct sk_buff **skb,
2069                                                    const unsigned int size)
2070 {
2071         struct ixgbe_rx_buffer *rx_buffer;
2072
2073         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2074         prefetchw(rx_buffer->page);
2075         *skb = rx_buffer->skb;
2076
2077         /* Delay unmapping of the first packet. It carries the header
2078          * information, HW may still access the header after the writeback.
2079          * Only unmap it when EOP is reached
2080          */
2081         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2082                 if (!*skb)
2083                         goto skip_sync;
2084         } else {
2085                 if (*skb)
2086                         ixgbe_dma_sync_frag(rx_ring, *skb);
2087         }
2088
2089         /* we are reusing so sync this buffer for CPU use */
2090         dma_sync_single_range_for_cpu(rx_ring->dev,
2091                                       rx_buffer->dma,
2092                                       rx_buffer->page_offset,
2093                                       size,
2094                                       DMA_FROM_DEVICE);
2095 skip_sync:
2096         rx_buffer->pagecnt_bias--;
2097
2098         return rx_buffer;
2099 }
2100
2101 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2102                                 struct ixgbe_rx_buffer *rx_buffer,
2103                                 struct sk_buff *skb)
2104 {
2105         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2106                 /* hand second half of page back to the ring */
2107                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2108         } else {
2109                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2110                         /* the page has been released from the ring */
2111                         IXGBE_CB(skb)->page_released = true;
2112                 } else {
2113                         /* we are not reusing the buffer so unmap it */
2114                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2115                                              ixgbe_rx_pg_size(rx_ring),
2116                                              DMA_FROM_DEVICE,
2117                                              IXGBE_RX_DMA_ATTR);
2118                 }
2119                 __page_frag_cache_drain(rx_buffer->page,
2120                                         rx_buffer->pagecnt_bias);
2121         }
2122
2123         /* clear contents of rx_buffer */
2124         rx_buffer->page = NULL;
2125         rx_buffer->skb = NULL;
2126 }
2127
2128 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2129                                            struct ixgbe_rx_buffer *rx_buffer,
2130                                            struct xdp_buff *xdp,
2131                                            union ixgbe_adv_rx_desc *rx_desc)
2132 {
2133         unsigned int size = xdp->data_end - xdp->data;
2134 #if (PAGE_SIZE < 8192)
2135         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2136 #else
2137         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2138                                                xdp->data_hard_start);
2139 #endif
2140         struct sk_buff *skb;
2141
2142         /* prefetch first cache line of first page */
2143         prefetch(xdp->data);
2144 #if L1_CACHE_BYTES < 128
2145         prefetch(xdp->data + L1_CACHE_BYTES);
2146 #endif
2147
2148         /* allocate a skb to store the frags */
2149         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2150         if (unlikely(!skb))
2151                 return NULL;
2152
2153         if (size > IXGBE_RX_HDR_SIZE) {
2154                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2155                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2156
2157                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2158                                 xdp->data - page_address(rx_buffer->page),
2159                                 size, truesize);
2160 #if (PAGE_SIZE < 8192)
2161                 rx_buffer->page_offset ^= truesize;
2162 #else
2163                 rx_buffer->page_offset += truesize;
2164 #endif
2165         } else {
2166                 memcpy(__skb_put(skb, size),
2167                        xdp->data, ALIGN(size, sizeof(long)));
2168                 rx_buffer->pagecnt_bias++;
2169         }
2170
2171         return skb;
2172 }
2173
2174 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2175                                        struct ixgbe_rx_buffer *rx_buffer,
2176                                        struct xdp_buff *xdp,
2177                                        union ixgbe_adv_rx_desc *rx_desc)
2178 {
2179 #if (PAGE_SIZE < 8192)
2180         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2181 #else
2182         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2183                                 SKB_DATA_ALIGN(xdp->data_end -
2184                                                xdp->data_hard_start);
2185 #endif
2186         struct sk_buff *skb;
2187
2188         /* prefetch first cache line of first page */
2189         prefetch(xdp->data);
2190 #if L1_CACHE_BYTES < 128
2191         prefetch(xdp->data + L1_CACHE_BYTES);
2192 #endif
2193
2194         /* build an skb to around the page buffer */
2195         skb = build_skb(xdp->data_hard_start, truesize);
2196         if (unlikely(!skb))
2197                 return NULL;
2198
2199         /* update pointers within the skb to store the data */
2200         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2201         __skb_put(skb, xdp->data_end - xdp->data);
2202
2203         /* record DMA address if this is the start of a chain of buffers */
2204         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2205                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2206
2207         /* update buffer offset */
2208 #if (PAGE_SIZE < 8192)
2209         rx_buffer->page_offset ^= truesize;
2210 #else
2211         rx_buffer->page_offset += truesize;
2212 #endif
2213
2214         return skb;
2215 }
2216
2217 #define IXGBE_XDP_PASS          0
2218 #define IXGBE_XDP_CONSUMED      BIT(0)
2219 #define IXGBE_XDP_TX            BIT(1)
2220 #define IXGBE_XDP_REDIR         BIT(2)
2221
2222 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
2223                                struct xdp_buff *xdp);
2224
2225 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2226                                      struct ixgbe_ring *rx_ring,
2227                                      struct xdp_buff *xdp)
2228 {
2229         int err, result = IXGBE_XDP_PASS;
2230         struct bpf_prog *xdp_prog;
2231         u32 act;
2232
2233         rcu_read_lock();
2234         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2235
2236         if (!xdp_prog)
2237                 goto xdp_out;
2238
2239         act = bpf_prog_run_xdp(xdp_prog, xdp);
2240         switch (act) {
2241         case XDP_PASS:
2242                 break;
2243         case XDP_TX:
2244                 result = ixgbe_xmit_xdp_ring(adapter, xdp);
2245                 break;
2246         case XDP_REDIRECT:
2247                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2248                 if (!err)
2249                         result = IXGBE_XDP_REDIR;
2250                 else
2251                         result = IXGBE_XDP_CONSUMED;
2252                 break;
2253         default:
2254                 bpf_warn_invalid_xdp_action(act);
2255                 /* fallthrough */
2256         case XDP_ABORTED:
2257                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2258                 /* fallthrough -- handle aborts by dropping packet */
2259         case XDP_DROP:
2260                 result = IXGBE_XDP_CONSUMED;
2261                 break;
2262         }
2263 xdp_out:
2264         rcu_read_unlock();
2265         return ERR_PTR(-result);
2266 }
2267
2268 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2269                                  struct ixgbe_rx_buffer *rx_buffer,
2270                                  unsigned int size)
2271 {
2272 #if (PAGE_SIZE < 8192)
2273         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2274
2275         rx_buffer->page_offset ^= truesize;
2276 #else
2277         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2278                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) +
2279                                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
2280                                 SKB_DATA_ALIGN(size);
2281
2282         rx_buffer->page_offset += truesize;
2283 #endif
2284 }
2285
2286 /**
2287  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2288  * @q_vector: structure containing interrupt and ring information
2289  * @rx_ring: rx descriptor ring to transact packets on
2290  * @budget: Total limit on number of packets to process
2291  *
2292  * This function provides a "bounce buffer" approach to Rx interrupt
2293  * processing.  The advantage to this is that on systems that have
2294  * expensive overhead for IOMMU access this provides a means of avoiding
2295  * it by maintaining the mapping of the page to the syste.
2296  *
2297  * Returns amount of work completed
2298  **/
2299 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2300                                struct ixgbe_ring *rx_ring,
2301                                const int budget)
2302 {
2303         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2304         struct ixgbe_adapter *adapter = q_vector->adapter;
2305 #ifdef IXGBE_FCOE
2306         int ddp_bytes;
2307         unsigned int mss = 0;
2308 #endif /* IXGBE_FCOE */
2309         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2310         unsigned int xdp_xmit = 0;
2311
2312         while (likely(total_rx_packets < budget)) {
2313                 union ixgbe_adv_rx_desc *rx_desc;
2314                 struct ixgbe_rx_buffer *rx_buffer;
2315                 struct sk_buff *skb;
2316                 struct xdp_buff xdp;
2317                 unsigned int size;
2318
2319                 /* return some buffers to hardware, one at a time is too slow */
2320                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2321                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2322                         cleaned_count = 0;
2323                 }
2324
2325                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2326                 size = le16_to_cpu(rx_desc->wb.upper.length);
2327                 if (!size)
2328                         break;
2329
2330                 /* This memory barrier is needed to keep us from reading
2331                  * any other fields out of the rx_desc until we know the
2332                  * descriptor has been written back
2333                  */
2334                 dma_rmb();
2335
2336                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2337
2338                 /* retrieve a buffer from the ring */
2339                 if (!skb) {
2340                         xdp.data = page_address(rx_buffer->page) +
2341                                    rx_buffer->page_offset;
2342                         xdp.data_hard_start = xdp.data -
2343                                               ixgbe_rx_offset(rx_ring);
2344                         xdp.data_end = xdp.data + size;
2345
2346                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2347                 }
2348
2349                 if (IS_ERR(skb)) {
2350                         unsigned int xdp_res = -PTR_ERR(skb);
2351
2352                         if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2353                                 xdp_xmit |= xdp_res;
2354                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2355                         } else {
2356                                 rx_buffer->pagecnt_bias++;
2357                         }
2358                         total_rx_packets++;
2359                         total_rx_bytes += size;
2360                 } else if (skb) {
2361                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2362                 } else if (ring_uses_build_skb(rx_ring)) {
2363                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2364                                               &xdp, rx_desc);
2365                 } else {
2366                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2367                                                   &xdp, rx_desc);
2368                 }
2369
2370                 /* exit if we failed to retrieve a buffer */
2371                 if (!skb) {
2372                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2373                         rx_buffer->pagecnt_bias++;
2374                         break;
2375                 }
2376
2377                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2378                 cleaned_count++;
2379
2380                 /* place incomplete frames back on ring for completion */
2381                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2382                         continue;
2383
2384                 /* verify the packet layout is correct */
2385                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2386                         continue;
2387
2388                 /* probably a little skewed due to removing CRC */
2389                 total_rx_bytes += skb->len;
2390
2391                 /* populate checksum, timestamp, VLAN, and protocol */
2392                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2393
2394 #ifdef IXGBE_FCOE
2395                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2396                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2397                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2398                         /* include DDPed FCoE data */
2399                         if (ddp_bytes > 0) {
2400                                 if (!mss) {
2401                                         mss = rx_ring->netdev->mtu -
2402                                                 sizeof(struct fcoe_hdr) -
2403                                                 sizeof(struct fc_frame_header) -
2404                                                 sizeof(struct fcoe_crc_eof);
2405                                         if (mss > 512)
2406                                                 mss &= ~511;
2407                                 }
2408                                 total_rx_bytes += ddp_bytes;
2409                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2410                                                                  mss);
2411                         }
2412                         if (!ddp_bytes) {
2413                                 dev_kfree_skb_any(skb);
2414                                 continue;
2415                         }
2416                 }
2417
2418 #endif /* IXGBE_FCOE */
2419                 ixgbe_rx_skb(q_vector, skb);
2420
2421                 /* update budget accounting */
2422                 total_rx_packets++;
2423         }
2424
2425         if (xdp_xmit & IXGBE_XDP_REDIR)
2426                 xdp_do_flush_map();
2427
2428         if (xdp_xmit & IXGBE_XDP_TX) {
2429                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2430
2431                 /* Force memory writes to complete before letting h/w
2432                  * know there are new descriptors to fetch.
2433                  */
2434                 wmb();
2435                 writel(ring->next_to_use, ring->tail);
2436         }
2437
2438         u64_stats_update_begin(&rx_ring->syncp);
2439         rx_ring->stats.packets += total_rx_packets;
2440         rx_ring->stats.bytes += total_rx_bytes;
2441         u64_stats_update_end(&rx_ring->syncp);
2442         q_vector->rx.total_packets += total_rx_packets;
2443         q_vector->rx.total_bytes += total_rx_bytes;
2444
2445         return total_rx_packets;
2446 }
2447
2448 /**
2449  * ixgbe_configure_msix - Configure MSI-X hardware
2450  * @adapter: board private structure
2451  *
2452  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2453  * interrupts.
2454  **/
2455 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2456 {
2457         struct ixgbe_q_vector *q_vector;
2458         int v_idx;
2459         u32 mask;
2460
2461         /* Populate MSIX to EITR Select */
2462         if (adapter->num_vfs > 32) {
2463                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2464                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2465         }
2466
2467         /*
2468          * Populate the IVAR table and set the ITR values to the
2469          * corresponding register.
2470          */
2471         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2472                 struct ixgbe_ring *ring;
2473                 q_vector = adapter->q_vector[v_idx];
2474
2475                 ixgbe_for_each_ring(ring, q_vector->rx)
2476                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2477
2478                 ixgbe_for_each_ring(ring, q_vector->tx)
2479                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2480
2481                 ixgbe_write_eitr(q_vector);
2482         }
2483
2484         switch (adapter->hw.mac.type) {
2485         case ixgbe_mac_82598EB:
2486                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2487                                v_idx);
2488                 break;
2489         case ixgbe_mac_82599EB:
2490         case ixgbe_mac_X540:
2491         case ixgbe_mac_X550:
2492         case ixgbe_mac_X550EM_x:
2493         case ixgbe_mac_x550em_a:
2494                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2495                 break;
2496         default:
2497                 break;
2498         }
2499         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2500
2501         /* set up to autoclear timer, and the vectors */
2502         mask = IXGBE_EIMS_ENABLE_MASK;
2503         mask &= ~(IXGBE_EIMS_OTHER |
2504                   IXGBE_EIMS_MAILBOX |
2505                   IXGBE_EIMS_LSC);
2506
2507         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2508 }
2509
2510 enum latency_range {
2511         lowest_latency = 0,
2512         low_latency = 1,
2513         bulk_latency = 2,
2514         latency_invalid = 255
2515 };
2516
2517 /**
2518  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2519  * @q_vector: structure containing interrupt and ring information
2520  * @ring_container: structure containing ring performance data
2521  *
2522  *      Stores a new ITR value based on packets and byte
2523  *      counts during the last interrupt.  The advantage of per interrupt
2524  *      computation is faster updates and more accurate ITR for the current
2525  *      traffic pattern.  Constants in this function were computed
2526  *      based on theoretical maximum wire speed and thresholds were set based
2527  *      on testing data as well as attempting to minimize response time
2528  *      while increasing bulk throughput.
2529  *      this functionality is controlled by the InterruptThrottleRate module
2530  *      parameter (see ixgbe_param.c)
2531  **/
2532 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2533                              struct ixgbe_ring_container *ring_container)
2534 {
2535         int bytes = ring_container->total_bytes;
2536         int packets = ring_container->total_packets;
2537         u32 timepassed_us;
2538         u64 bytes_perint;
2539         u8 itr_setting = ring_container->itr;
2540
2541         if (packets == 0)
2542                 return;
2543
2544         /* simple throttlerate management
2545          *   0-10MB/s   lowest (100000 ints/s)
2546          *  10-20MB/s   low    (20000 ints/s)
2547          *  20-1249MB/s bulk   (12000 ints/s)
2548          */
2549         /* what was last interrupt timeslice? */
2550         timepassed_us = q_vector->itr >> 2;
2551         if (timepassed_us == 0)
2552                 return;
2553
2554         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2555
2556         switch (itr_setting) {
2557         case lowest_latency:
2558                 if (bytes_perint > 10)
2559                         itr_setting = low_latency;
2560                 break;
2561         case low_latency:
2562                 if (bytes_perint > 20)
2563                         itr_setting = bulk_latency;
2564                 else if (bytes_perint <= 10)
2565                         itr_setting = lowest_latency;
2566                 break;
2567         case bulk_latency:
2568                 if (bytes_perint <= 20)
2569                         itr_setting = low_latency;
2570                 break;
2571         }
2572
2573         /* clear work counters since we have the values we need */
2574         ring_container->total_bytes = 0;
2575         ring_container->total_packets = 0;
2576
2577         /* write updated itr to ring container */
2578         ring_container->itr = itr_setting;
2579 }
2580
2581 /**
2582  * ixgbe_write_eitr - write EITR register in hardware specific way
2583  * @q_vector: structure containing interrupt and ring information
2584  *
2585  * This function is made to be called by ethtool and by the driver
2586  * when it needs to update EITR registers at runtime.  Hardware
2587  * specific quirks/differences are taken care of here.
2588  */
2589 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2590 {
2591         struct ixgbe_adapter *adapter = q_vector->adapter;
2592         struct ixgbe_hw *hw = &adapter->hw;
2593         int v_idx = q_vector->v_idx;
2594         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2595
2596         switch (adapter->hw.mac.type) {
2597         case ixgbe_mac_82598EB:
2598                 /* must write high and low 16 bits to reset counter */
2599                 itr_reg |= (itr_reg << 16);
2600                 break;
2601         case ixgbe_mac_82599EB:
2602         case ixgbe_mac_X540:
2603         case ixgbe_mac_X550:
2604         case ixgbe_mac_X550EM_x:
2605         case ixgbe_mac_x550em_a:
2606                 /*
2607                  * set the WDIS bit to not clear the timer bits and cause an
2608                  * immediate assertion of the interrupt
2609                  */
2610                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2611                 break;
2612         default:
2613                 break;
2614         }
2615         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2616 }
2617
2618 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2619 {
2620         u32 new_itr = q_vector->itr;
2621         u8 current_itr;
2622
2623         ixgbe_update_itr(q_vector, &q_vector->tx);
2624         ixgbe_update_itr(q_vector, &q_vector->rx);
2625
2626         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2627
2628         switch (current_itr) {
2629         /* counts and packets in update_itr are dependent on these numbers */
2630         case lowest_latency:
2631                 new_itr = IXGBE_100K_ITR;
2632                 break;
2633         case low_latency:
2634                 new_itr = IXGBE_20K_ITR;
2635                 break;
2636         case bulk_latency:
2637                 new_itr = IXGBE_12K_ITR;
2638                 break;
2639         default:
2640                 break;
2641         }
2642
2643         if (new_itr != q_vector->itr) {
2644                 /* do an exponential smoothing */
2645                 new_itr = (10 * new_itr * q_vector->itr) /
2646                           ((9 * new_itr) + q_vector->itr);
2647
2648                 /* save the algorithm value here */
2649                 q_vector->itr = new_itr;
2650
2651                 ixgbe_write_eitr(q_vector);
2652         }
2653 }
2654
2655 /**
2656  * ixgbe_check_overtemp_subtask - check for over temperature
2657  * @adapter: pointer to adapter
2658  **/
2659 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2660 {
2661         struct ixgbe_hw *hw = &adapter->hw;
2662         u32 eicr = adapter->interrupt_event;
2663         s32 rc;
2664
2665         if (test_bit(__IXGBE_DOWN, &adapter->state))
2666                 return;
2667
2668         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2669                 return;
2670
2671         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2672
2673         switch (hw->device_id) {
2674         case IXGBE_DEV_ID_82599_T3_LOM:
2675                 /*
2676                  * Since the warning interrupt is for both ports
2677                  * we don't have to check if:
2678                  *  - This interrupt wasn't for our port.
2679                  *  - We may have missed the interrupt so always have to
2680                  *    check if we  got a LSC
2681                  */
2682                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2683                     !(eicr & IXGBE_EICR_LSC))
2684                         return;
2685
2686                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2687                         u32 speed;
2688                         bool link_up = false;
2689
2690                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2691
2692                         if (link_up)
2693                                 return;
2694                 }
2695
2696                 /* Check if this is not due to overtemp */
2697                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2698                         return;
2699
2700                 break;
2701         case IXGBE_DEV_ID_X550EM_A_1G_T:
2702         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2703                 rc = hw->phy.ops.check_overtemp(hw);
2704                 if (rc != IXGBE_ERR_OVERTEMP)
2705                         return;
2706                 break;
2707         default:
2708                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2709                         return;
2710                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2711                         return;
2712                 break;
2713         }
2714         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2715
2716         adapter->interrupt_event = 0;
2717 }
2718
2719 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2720 {
2721         struct ixgbe_hw *hw = &adapter->hw;
2722
2723         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2724             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2725                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2726                 /* write to clear the interrupt */
2727                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2728         }
2729 }
2730
2731 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2732 {
2733         struct ixgbe_hw *hw = &adapter->hw;
2734
2735         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2736                 return;
2737
2738         switch (adapter->hw.mac.type) {
2739         case ixgbe_mac_82599EB:
2740                 /*
2741                  * Need to check link state so complete overtemp check
2742                  * on service task
2743                  */
2744                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2745                      (eicr & IXGBE_EICR_LSC)) &&
2746                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2747                         adapter->interrupt_event = eicr;
2748                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2749                         ixgbe_service_event_schedule(adapter);
2750                         return;
2751                 }
2752                 return;
2753         case ixgbe_mac_x550em_a:
2754                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2755                         adapter->interrupt_event = eicr;
2756                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2757                         ixgbe_service_event_schedule(adapter);
2758                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2759                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2760                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2761                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2762                 }
2763                 return;
2764         case ixgbe_mac_X550:
2765         case ixgbe_mac_X540:
2766                 if (!(eicr & IXGBE_EICR_TS))
2767                         return;
2768                 break;
2769         default:
2770                 return;
2771         }
2772
2773         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2774 }
2775
2776 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2777 {
2778         switch (hw->mac.type) {
2779         case ixgbe_mac_82598EB:
2780                 if (hw->phy.type == ixgbe_phy_nl)
2781                         return true;
2782                 return false;
2783         case ixgbe_mac_82599EB:
2784         case ixgbe_mac_X550EM_x:
2785         case ixgbe_mac_x550em_a:
2786                 switch (hw->mac.ops.get_media_type(hw)) {
2787                 case ixgbe_media_type_fiber:
2788                 case ixgbe_media_type_fiber_qsfp:
2789                         return true;
2790                 default:
2791                         return false;
2792                 }
2793         default:
2794                 return false;
2795         }
2796 }
2797
2798 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2799 {
2800         struct ixgbe_hw *hw = &adapter->hw;
2801         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2802
2803         if (!ixgbe_is_sfp(hw))
2804                 return;
2805
2806         /* Later MAC's use different SDP */
2807         if (hw->mac.type >= ixgbe_mac_X540)
2808                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2809
2810         if (eicr & eicr_mask) {
2811                 /* Clear the interrupt */
2812                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2813                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2814                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2815                         adapter->sfp_poll_time = 0;
2816                         ixgbe_service_event_schedule(adapter);
2817                 }
2818         }
2819
2820         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2821             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2822                 /* Clear the interrupt */
2823                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2824                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2825                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2826                         ixgbe_service_event_schedule(adapter);
2827                 }
2828         }
2829 }
2830
2831 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2832 {
2833         struct ixgbe_hw *hw = &adapter->hw;
2834
2835         adapter->lsc_int++;
2836         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2837         adapter->link_check_timeout = jiffies;
2838         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2839                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2840                 IXGBE_WRITE_FLUSH(hw);
2841                 ixgbe_service_event_schedule(adapter);
2842         }
2843 }
2844
2845 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2846                                            u64 qmask)
2847 {
2848         u32 mask;
2849         struct ixgbe_hw *hw = &adapter->hw;
2850
2851         switch (hw->mac.type) {
2852         case ixgbe_mac_82598EB:
2853                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2854                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2855                 break;
2856         case ixgbe_mac_82599EB:
2857         case ixgbe_mac_X540:
2858         case ixgbe_mac_X550:
2859         case ixgbe_mac_X550EM_x:
2860         case ixgbe_mac_x550em_a:
2861                 mask = (qmask & 0xFFFFFFFF);
2862                 if (mask)
2863                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2864                 mask = (qmask >> 32);
2865                 if (mask)
2866                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2867                 break;
2868         default:
2869                 break;
2870         }
2871         /* skip the flush */
2872 }
2873
2874 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2875                                             u64 qmask)
2876 {
2877         u32 mask;
2878         struct ixgbe_hw *hw = &adapter->hw;
2879
2880         switch (hw->mac.type) {
2881         case ixgbe_mac_82598EB:
2882                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2883                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2884                 break;
2885         case ixgbe_mac_82599EB:
2886         case ixgbe_mac_X540:
2887         case ixgbe_mac_X550:
2888         case ixgbe_mac_X550EM_x:
2889         case ixgbe_mac_x550em_a:
2890                 mask = (qmask & 0xFFFFFFFF);
2891                 if (mask)
2892                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2893                 mask = (qmask >> 32);
2894                 if (mask)
2895                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2896                 break;
2897         default:
2898                 break;
2899         }
2900         /* skip the flush */
2901 }
2902
2903 /**
2904  * ixgbe_irq_enable - Enable default interrupt generation settings
2905  * @adapter: board private structure
2906  **/
2907 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2908                                     bool flush)
2909 {
2910         struct ixgbe_hw *hw = &adapter->hw;
2911         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2912
2913         /* don't reenable LSC while waiting for link */
2914         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2915                 mask &= ~IXGBE_EIMS_LSC;
2916
2917         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2918                 switch (adapter->hw.mac.type) {
2919                 case ixgbe_mac_82599EB:
2920                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2921                         break;
2922                 case ixgbe_mac_X540:
2923                 case ixgbe_mac_X550:
2924                 case ixgbe_mac_X550EM_x:
2925                 case ixgbe_mac_x550em_a:
2926                         mask |= IXGBE_EIMS_TS;
2927                         break;
2928                 default:
2929                         break;
2930                 }
2931         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2932                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2933         switch (adapter->hw.mac.type) {
2934         case ixgbe_mac_82599EB:
2935                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2936                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2937                 /* fall through */
2938         case ixgbe_mac_X540:
2939         case ixgbe_mac_X550:
2940         case ixgbe_mac_X550EM_x:
2941         case ixgbe_mac_x550em_a:
2942                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
2943                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
2944                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
2945                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2946                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2947                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2948                 mask |= IXGBE_EIMS_ECC;
2949                 mask |= IXGBE_EIMS_MAILBOX;
2950                 break;
2951         default:
2952                 break;
2953         }
2954
2955         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2956             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2957                 mask |= IXGBE_EIMS_FLOW_DIR;
2958
2959         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2960         if (queues)
2961                 ixgbe_irq_enable_queues(adapter, ~0);
2962         if (flush)
2963                 IXGBE_WRITE_FLUSH(&adapter->hw);
2964 }
2965
2966 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2967 {
2968         struct ixgbe_adapter *adapter = data;
2969         struct ixgbe_hw *hw = &adapter->hw;
2970         u32 eicr;
2971
2972         /*
2973          * Workaround for Silicon errata.  Use clear-by-write instead
2974          * of clear-by-read.  Reading with EICS will return the
2975          * interrupt causes without clearing, which later be done
2976          * with the write to EICR.
2977          */
2978         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2979
2980         /* The lower 16bits of the EICR register are for the queue interrupts
2981          * which should be masked here in order to not accidentally clear them if
2982          * the bits are high when ixgbe_msix_other is called. There is a race
2983          * condition otherwise which results in possible performance loss
2984          * especially if the ixgbe_msix_other interrupt is triggering
2985          * consistently (as it would when PPS is turned on for the X540 device)
2986          */
2987         eicr &= 0xFFFF0000;
2988
2989         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2990
2991         if (eicr & IXGBE_EICR_LSC)
2992                 ixgbe_check_lsc(adapter);
2993
2994         if (eicr & IXGBE_EICR_MAILBOX)
2995                 ixgbe_msg_task(adapter);
2996
2997         switch (hw->mac.type) {
2998         case ixgbe_mac_82599EB:
2999         case ixgbe_mac_X540:
3000         case ixgbe_mac_X550:
3001         case ixgbe_mac_X550EM_x:
3002         case ixgbe_mac_x550em_a:
3003                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3004                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3005                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3006                         ixgbe_service_event_schedule(adapter);
3007                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3008                                         IXGBE_EICR_GPI_SDP0_X540);
3009                 }
3010                 if (eicr & IXGBE_EICR_ECC) {
3011                         e_info(link, "Received ECC Err, initiating reset\n");
3012                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3013                         ixgbe_service_event_schedule(adapter);
3014                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3015                 }
3016                 /* Handle Flow Director Full threshold interrupt */
3017                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3018                         int reinit_count = 0;
3019                         int i;
3020                         for (i = 0; i < adapter->num_tx_queues; i++) {
3021                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3022                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3023                                                        &ring->state))
3024                                         reinit_count++;
3025                         }
3026                         if (reinit_count) {
3027                                 /* no more flow director interrupts until after init */
3028                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3029                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3030                                 ixgbe_service_event_schedule(adapter);
3031                         }
3032                 }
3033                 ixgbe_check_sfp_event(adapter, eicr);
3034                 ixgbe_check_overtemp_event(adapter, eicr);
3035                 break;
3036         default:
3037                 break;
3038         }
3039
3040         ixgbe_check_fan_failure(adapter, eicr);
3041
3042         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3043                 ixgbe_ptp_check_pps_event(adapter);
3044
3045         /* re-enable the original interrupt state, no lsc, no queues */
3046         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3047                 ixgbe_irq_enable(adapter, false, false);
3048
3049         return IRQ_HANDLED;
3050 }
3051
3052 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3053 {
3054         struct ixgbe_q_vector *q_vector = data;
3055
3056         /* EIAM disabled interrupts (on this vector) for us */
3057
3058         if (q_vector->rx.ring || q_vector->tx.ring)
3059                 napi_schedule_irqoff(&q_vector->napi);
3060
3061         return IRQ_HANDLED;
3062 }
3063
3064 /**
3065  * ixgbe_poll - NAPI Rx polling callback
3066  * @napi: structure for representing this polling device
3067  * @budget: how many packets driver is allowed to clean
3068  *
3069  * This function is used for legacy and MSI, NAPI mode
3070  **/
3071 int ixgbe_poll(struct napi_struct *napi, int budget)
3072 {
3073         struct ixgbe_q_vector *q_vector =
3074                                 container_of(napi, struct ixgbe_q_vector, napi);
3075         struct ixgbe_adapter *adapter = q_vector->adapter;
3076         struct ixgbe_ring *ring;
3077         int per_ring_budget, work_done = 0;
3078         bool clean_complete = true;
3079
3080 #ifdef CONFIG_IXGBE_DCA
3081         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3082                 ixgbe_update_dca(q_vector);
3083 #endif
3084
3085         ixgbe_for_each_ring(ring, q_vector->tx) {
3086                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
3087                         clean_complete = false;
3088         }
3089
3090         /* Exit if we are called by netpoll */
3091         if (budget <= 0)
3092                 return budget;
3093
3094         /* attempt to distribute budget to each queue fairly, but don't allow
3095          * the budget to go below 1 because we'll exit polling */
3096         if (q_vector->rx.count > 1)
3097                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3098         else
3099                 per_ring_budget = budget;
3100
3101         ixgbe_for_each_ring(ring, q_vector->rx) {
3102                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
3103                                                  per_ring_budget);
3104
3105                 work_done += cleaned;
3106                 if (cleaned >= per_ring_budget)
3107                         clean_complete = false;
3108         }
3109
3110         /* If all work not completed, return budget and keep polling */
3111         if (!clean_complete)
3112                 return budget;
3113
3114         /* all work done, exit the polling mode */
3115         if (likely(napi_complete_done(napi, work_done))) {
3116                 if (adapter->rx_itr_setting & 1)
3117                         ixgbe_set_itr(q_vector);
3118                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3119                         ixgbe_irq_enable_queues(adapter,
3120                                                 BIT_ULL(q_vector->v_idx));
3121         }
3122
3123         return min(work_done, budget - 1);
3124 }
3125
3126 /**
3127  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3128  * @adapter: board private structure
3129  *
3130  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3131  * interrupts from the kernel.
3132  **/
3133 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3134 {
3135         struct net_device *netdev = adapter->netdev;
3136         unsigned int ri = 0, ti = 0;
3137         int vector, err;
3138
3139         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3140                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3141                 struct msix_entry *entry = &adapter->msix_entries[vector];
3142
3143                 if (q_vector->tx.ring && q_vector->rx.ring) {
3144                         snprintf(q_vector->name, sizeof(q_vector->name),
3145                                  "%s-TxRx-%u", netdev->name, ri++);
3146                         ti++;
3147                 } else if (q_vector->rx.ring) {
3148                         snprintf(q_vector->name, sizeof(q_vector->name),
3149                                  "%s-rx-%u", netdev->name, ri++);
3150                 } else if (q_vector->tx.ring) {
3151                         snprintf(q_vector->name, sizeof(q_vector->name),
3152                                  "%s-tx-%u", netdev->name, ti++);
3153                 } else {
3154                         /* skip this unused q_vector */
3155                         continue;
3156                 }
3157                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3158                                   q_vector->name, q_vector);
3159                 if (err) {
3160                         e_err(probe, "request_irq failed for MSIX interrupt "
3161                               "Error: %d\n", err);
3162                         goto free_queue_irqs;
3163                 }
3164                 /* If Flow Director is enabled, set interrupt affinity */
3165                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3166                         /* assign the mask for this irq */
3167                         irq_set_affinity_hint(entry->vector,
3168                                               &q_vector->affinity_mask);
3169                 }
3170         }
3171
3172         err = request_irq(adapter->msix_entries[vector].vector,
3173                           ixgbe_msix_other, 0, netdev->name, adapter);
3174         if (err) {
3175                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3176                 goto free_queue_irqs;
3177         }
3178
3179         return 0;
3180
3181 free_queue_irqs:
3182         while (vector) {
3183                 vector--;
3184                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3185                                       NULL);
3186                 free_irq(adapter->msix_entries[vector].vector,
3187                          adapter->q_vector[vector]);
3188         }
3189         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3190         pci_disable_msix(adapter->pdev);
3191         kfree(adapter->msix_entries);
3192         adapter->msix_entries = NULL;
3193         return err;
3194 }
3195
3196 /**
3197  * ixgbe_intr - legacy mode Interrupt Handler
3198  * @irq: interrupt number
3199  * @data: pointer to a network interface device structure
3200  **/
3201 static irqreturn_t ixgbe_intr(int irq, void *data)
3202 {
3203         struct ixgbe_adapter *adapter = data;
3204         struct ixgbe_hw *hw = &adapter->hw;
3205         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3206         u32 eicr;
3207
3208         /*
3209          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3210          * before the read of EICR.
3211          */
3212         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3213
3214         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3215          * therefore no explicit interrupt disable is necessary */
3216         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3217         if (!eicr) {
3218                 /*
3219                  * shared interrupt alert!
3220                  * make sure interrupts are enabled because the read will
3221                  * have disabled interrupts due to EIAM
3222                  * finish the workaround of silicon errata on 82598.  Unmask
3223                  * the interrupt that we masked before the EICR read.
3224                  */
3225                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3226                         ixgbe_irq_enable(adapter, true, true);
3227                 return IRQ_NONE;        /* Not our interrupt */
3228         }
3229
3230         if (eicr & IXGBE_EICR_LSC)
3231                 ixgbe_check_lsc(adapter);
3232
3233         switch (hw->mac.type) {
3234         case ixgbe_mac_82599EB:
3235                 ixgbe_check_sfp_event(adapter, eicr);
3236                 /* Fall through */
3237         case ixgbe_mac_X540:
3238         case ixgbe_mac_X550:
3239         case ixgbe_mac_X550EM_x:
3240         case ixgbe_mac_x550em_a:
3241                 if (eicr & IXGBE_EICR_ECC) {
3242                         e_info(link, "Received ECC Err, initiating reset\n");
3243                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3244                         ixgbe_service_event_schedule(adapter);
3245                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3246                 }
3247                 ixgbe_check_overtemp_event(adapter, eicr);
3248                 break;
3249         default:
3250                 break;
3251         }
3252
3253         ixgbe_check_fan_failure(adapter, eicr);
3254         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3255                 ixgbe_ptp_check_pps_event(adapter);
3256
3257         /* would disable interrupts here but EIAM disabled it */
3258         napi_schedule_irqoff(&q_vector->napi);
3259
3260         /*
3261          * re-enable link(maybe) and non-queue interrupts, no flush.
3262          * ixgbe_poll will re-enable the queue interrupts
3263          */
3264         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3265                 ixgbe_irq_enable(adapter, false, false);
3266
3267         return IRQ_HANDLED;
3268 }
3269
3270 /**
3271  * ixgbe_request_irq - initialize interrupts
3272  * @adapter: board private structure
3273  *
3274  * Attempts to configure interrupts using the best available
3275  * capabilities of the hardware and kernel.
3276  **/
3277 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3278 {
3279         struct net_device *netdev = adapter->netdev;
3280         int err;
3281
3282         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3283                 err = ixgbe_request_msix_irqs(adapter);
3284         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3285                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3286                                   netdev->name, adapter);
3287         else
3288                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3289                                   netdev->name, adapter);
3290
3291         if (err)
3292                 e_err(probe, "request_irq failed, Error %d\n", err);
3293
3294         return err;
3295 }
3296
3297 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3298 {
3299         int vector;
3300
3301         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3302                 free_irq(adapter->pdev->irq, adapter);
3303                 return;
3304         }
3305
3306         if (!adapter->msix_entries)
3307                 return;
3308
3309         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3310                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3311                 struct msix_entry *entry = &adapter->msix_entries[vector];
3312
3313                 /* free only the irqs that were actually requested */
3314                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3315                         continue;
3316
3317                 /* clear the affinity_mask in the IRQ descriptor */
3318                 irq_set_affinity_hint(entry->vector, NULL);
3319
3320                 free_irq(entry->vector, q_vector);
3321         }
3322
3323         free_irq(adapter->msix_entries[vector].vector, adapter);
3324 }
3325
3326 /**
3327  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3328  * @adapter: board private structure
3329  **/
3330 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3331 {
3332         switch (adapter->hw.mac.type) {
3333         case ixgbe_mac_82598EB:
3334                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3335                 break;
3336         case ixgbe_mac_82599EB:
3337         case ixgbe_mac_X540:
3338         case ixgbe_mac_X550:
3339         case ixgbe_mac_X550EM_x:
3340         case ixgbe_mac_x550em_a:
3341                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3342                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3343                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3344                 break;
3345         default:
3346                 break;
3347         }
3348         IXGBE_WRITE_FLUSH(&adapter->hw);
3349         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3350                 int vector;
3351
3352                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3353                         synchronize_irq(adapter->msix_entries[vector].vector);
3354
3355                 synchronize_irq(adapter->msix_entries[vector++].vector);
3356         } else {
3357                 synchronize_irq(adapter->pdev->irq);
3358         }
3359 }
3360
3361 /**
3362  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3363  *
3364  **/
3365 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3366 {
3367         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3368
3369         ixgbe_write_eitr(q_vector);
3370
3371         ixgbe_set_ivar(adapter, 0, 0, 0);
3372         ixgbe_set_ivar(adapter, 1, 0, 0);
3373
3374         e_info(hw, "Legacy interrupt IVAR setup done\n");
3375 }
3376
3377 /**
3378  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3379  * @adapter: board private structure
3380  * @ring: structure containing ring specific data
3381  *
3382  * Configure the Tx descriptor ring after a reset.
3383  **/
3384 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3385                              struct ixgbe_ring *ring)
3386 {
3387         struct ixgbe_hw *hw = &adapter->hw;
3388         u64 tdba = ring->dma;
3389         int wait_loop = 10;
3390         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3391         u8 reg_idx = ring->reg_idx;
3392
3393         /* disable queue to avoid issues while updating state */
3394         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3395         IXGBE_WRITE_FLUSH(hw);
3396
3397         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3398                         (tdba & DMA_BIT_MASK(32)));
3399         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3400         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3401                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3402         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3403         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3404         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3405
3406         /*
3407          * set WTHRESH to encourage burst writeback, it should not be set
3408          * higher than 1 when:
3409          * - ITR is 0 as it could cause false TX hangs
3410          * - ITR is set to > 100k int/sec and BQL is enabled
3411          *
3412          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3413          * to or less than the number of on chip descriptors, which is
3414          * currently 40.
3415          */
3416         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3417                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3418         else
3419                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3420
3421         /*
3422          * Setting PTHRESH to 32 both improves performance
3423          * and avoids a TX hang with DFP enabled
3424          */
3425         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3426                    32;          /* PTHRESH = 32 */
3427
3428         /* reinitialize flowdirector state */
3429         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3430                 ring->atr_sample_rate = adapter->atr_sample_rate;
3431                 ring->atr_count = 0;
3432                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3433         } else {
3434                 ring->atr_sample_rate = 0;
3435         }
3436
3437         /* initialize XPS */
3438         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3439                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3440
3441                 if (q_vector)
3442                         netif_set_xps_queue(ring->netdev,
3443                                             &q_vector->affinity_mask,
3444                                             ring->queue_index);
3445         }
3446
3447         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3448
3449         /* reinitialize tx_buffer_info */
3450         memset(ring->tx_buffer_info, 0,
3451                sizeof(struct ixgbe_tx_buffer) * ring->count);
3452
3453         /* enable queue */
3454         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3455
3456         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3457         if (hw->mac.type == ixgbe_mac_82598EB &&
3458             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3459                 return;
3460
3461         /* poll to verify queue is enabled */
3462         do {
3463                 usleep_range(1000, 2000);
3464                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3465         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3466         if (!wait_loop)
3467                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3468 }
3469
3470 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3471 {
3472         struct ixgbe_hw *hw = &adapter->hw;
3473         u32 rttdcs, mtqc;
3474         u8 tcs = netdev_get_num_tc(adapter->netdev);
3475
3476         if (hw->mac.type == ixgbe_mac_82598EB)
3477                 return;
3478
3479         /* disable the arbiter while setting MTQC */
3480         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3481         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3482         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3483
3484         /* set transmit pool layout */
3485         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3486                 mtqc = IXGBE_MTQC_VT_ENA;
3487                 if (tcs > 4)
3488                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3489                 else if (tcs > 1)
3490                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3491                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3492                          IXGBE_82599_VMDQ_4Q_MASK)
3493                         mtqc |= IXGBE_MTQC_32VF;
3494                 else
3495                         mtqc |= IXGBE_MTQC_64VF;
3496         } else {
3497                 if (tcs > 4) {
3498                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3499                 } else if (tcs > 1) {
3500                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3501                 } else {
3502                         u8 max_txq = adapter->num_tx_queues +
3503                                 adapter->num_xdp_queues;
3504                         if (max_txq > 63)
3505                                 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3506                         else
3507                                 mtqc = IXGBE_MTQC_64Q_1PB;
3508                 }
3509         }
3510
3511         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3512
3513         /* Enable Security TX Buffer IFG for multiple pb */
3514         if (tcs) {
3515                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3516                 sectx |= IXGBE_SECTX_DCB;
3517                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3518         }
3519
3520         /* re-enable the arbiter */
3521         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3522         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3523 }
3524
3525 /**
3526  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3527  * @adapter: board private structure
3528  *
3529  * Configure the Tx unit of the MAC after a reset.
3530  **/
3531 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3532 {
3533         struct ixgbe_hw *hw = &adapter->hw;
3534         u32 dmatxctl;
3535         u32 i;
3536
3537         ixgbe_setup_mtqc(adapter);
3538
3539         if (hw->mac.type != ixgbe_mac_82598EB) {
3540                 /* DMATXCTL.EN must be before Tx queues are enabled */
3541                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3542                 dmatxctl |= IXGBE_DMATXCTL_TE;
3543                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3544         }
3545
3546         /* Setup the HW Tx Head and Tail descriptor pointers */
3547         for (i = 0; i < adapter->num_tx_queues; i++)
3548                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3549         for (i = 0; i < adapter->num_xdp_queues; i++)
3550                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3551 }
3552
3553 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3554                                  struct ixgbe_ring *ring)
3555 {
3556         struct ixgbe_hw *hw = &adapter->hw;
3557         u8 reg_idx = ring->reg_idx;
3558         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3559
3560         srrctl |= IXGBE_SRRCTL_DROP_EN;
3561
3562         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3563 }
3564
3565 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3566                                   struct ixgbe_ring *ring)
3567 {
3568         struct ixgbe_hw *hw = &adapter->hw;
3569         u8 reg_idx = ring->reg_idx;
3570         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3571
3572         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3573
3574         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3575 }
3576
3577 #ifdef CONFIG_IXGBE_DCB
3578 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3579 #else
3580 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3581 #endif
3582 {
3583         int i;
3584         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3585
3586         if (adapter->ixgbe_ieee_pfc)
3587                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3588
3589         /*
3590          * We should set the drop enable bit if:
3591          *  SR-IOV is enabled
3592          *   or
3593          *  Number of Rx queues > 1 and flow control is disabled
3594          *
3595          *  This allows us to avoid head of line blocking for security
3596          *  and performance reasons.
3597          */
3598         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3599             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3600                 for (i = 0; i < adapter->num_rx_queues; i++)
3601                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3602         } else {
3603                 for (i = 0; i < adapter->num_rx_queues; i++)
3604                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3605         }
3606 }
3607
3608 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3609
3610 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3611                                    struct ixgbe_ring *rx_ring)
3612 {
3613         struct ixgbe_hw *hw = &adapter->hw;
3614         u32 srrctl;
3615         u8 reg_idx = rx_ring->reg_idx;
3616
3617         if (hw->mac.type == ixgbe_mac_82598EB) {
3618                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3619
3620                 /*
3621                  * if VMDq is not active we must program one srrctl register
3622                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3623                  */
3624                 reg_idx &= mask;
3625         }
3626
3627         /* configure header buffer length, needed for RSC */
3628         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3629
3630         /* configure the packet buffer length */
3631         if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3632                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3633         else
3634                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3635
3636         /* configure descriptor type */
3637         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3638
3639         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3640 }
3641
3642 /**
3643  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3644  * @adapter: device handle
3645  *
3646  *  - 82598/82599/X540:     128
3647  *  - X550(non-SRIOV mode): 512
3648  *  - X550(SRIOV mode):     64
3649  */
3650 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3651 {
3652         if (adapter->hw.mac.type < ixgbe_mac_X550)
3653                 return 128;
3654         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3655                 return 64;
3656         else
3657                 return 512;
3658 }
3659
3660 /**
3661  * ixgbe_store_key - Write the RSS key to HW
3662  * @adapter: device handle
3663  *
3664  * Write the RSS key stored in adapter.rss_key to HW.
3665  */
3666 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3667 {
3668         struct ixgbe_hw *hw = &adapter->hw;
3669         int i;
3670
3671         for (i = 0; i < 10; i++)
3672                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3673 }
3674
3675 /**
3676  * ixgbe_init_rss_key - Initialize adapter RSS key
3677  * @adapter: device handle
3678  *
3679  * Allocates and initializes the RSS key if it is not allocated.
3680  **/
3681 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3682 {
3683         u32 *rss_key;
3684
3685         if (!adapter->rss_key) {
3686                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3687                 if (unlikely(!rss_key))
3688                         return -ENOMEM;
3689
3690                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3691                 adapter->rss_key = rss_key;
3692         }
3693
3694         return 0;
3695 }
3696
3697 /**
3698  * ixgbe_store_reta - Write the RETA table to HW
3699  * @adapter: device handle
3700  *
3701  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3702  */
3703 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3704 {
3705         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3706         struct ixgbe_hw *hw = &adapter->hw;
3707         u32 reta = 0;
3708         u32 indices_multi;
3709         u8 *indir_tbl = adapter->rss_indir_tbl;
3710
3711         /* Fill out the redirection table as follows:
3712          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3713          *    indices.
3714          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3715          *  - X550:       8 bit wide entries containing 6 bit RSS index
3716          */
3717         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3718                 indices_multi = 0x11;
3719         else
3720                 indices_multi = 0x1;
3721
3722         /* Write redirection table to HW */
3723         for (i = 0; i < reta_entries; i++) {
3724                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3725                 if ((i & 3) == 3) {
3726                         if (i < 128)
3727                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3728                         else
3729                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3730                                                 reta);
3731                         reta = 0;
3732                 }
3733         }
3734 }
3735
3736 /**
3737  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3738  * @adapter: device handle
3739  *
3740  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3741  */
3742 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3743 {
3744         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3745         struct ixgbe_hw *hw = &adapter->hw;
3746         u32 vfreta = 0;
3747         unsigned int pf_pool = adapter->num_vfs;
3748
3749         /* Write redirection table to HW */
3750         for (i = 0; i < reta_entries; i++) {
3751                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3752                 if ((i & 3) == 3) {
3753                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3754                                         vfreta);
3755                         vfreta = 0;
3756                 }
3757         }
3758 }
3759
3760 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3761 {
3762         u32 i, j;
3763         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3764         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3765
3766         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3767          * make full use of any rings they may have.  We will use the
3768          * PSRTYPE register to control how many rings we use within the PF.
3769          */
3770         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3771                 rss_i = 4;
3772
3773         /* Fill out hash function seeds */
3774         ixgbe_store_key(adapter);
3775
3776         /* Fill out redirection table */
3777         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3778
3779         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3780                 if (j == rss_i)
3781                         j = 0;
3782
3783                 adapter->rss_indir_tbl[i] = j;
3784         }
3785
3786         ixgbe_store_reta(adapter);
3787 }
3788
3789 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3790 {
3791         struct ixgbe_hw *hw = &adapter->hw;
3792         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3793         unsigned int pf_pool = adapter->num_vfs;
3794         int i, j;
3795
3796         /* Fill out hash function seeds */
3797         for (i = 0; i < 10; i++)
3798                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3799                                 *(adapter->rss_key + i));
3800
3801         /* Fill out the redirection table */
3802         for (i = 0, j = 0; i < 64; i++, j++) {
3803                 if (j == rss_i)
3804                         j = 0;
3805
3806                 adapter->rss_indir_tbl[i] = j;
3807         }
3808
3809         ixgbe_store_vfreta(adapter);
3810 }
3811
3812 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3813 {
3814         struct ixgbe_hw *hw = &adapter->hw;
3815         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3816         u32 rxcsum;
3817
3818         /* Disable indicating checksum in descriptor, enables RSS hash */
3819         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3820         rxcsum |= IXGBE_RXCSUM_PCSD;
3821         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3822
3823         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3824                 if (adapter->ring_feature[RING_F_RSS].mask)
3825                         mrqc = IXGBE_MRQC_RSSEN;
3826         } else {
3827                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3828
3829                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3830                         if (tcs > 4)
3831                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3832                         else if (tcs > 1)
3833                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3834                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3835                                  IXGBE_82599_VMDQ_4Q_MASK)
3836                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3837                         else
3838                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3839
3840                         /* Enable L3/L4 for Tx Switched packets only for X550,
3841                          * older devices do not support this feature
3842                          */
3843                         if (hw->mac.type >= ixgbe_mac_X550)
3844                                 mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3845                 } else {
3846                         if (tcs > 4)
3847                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3848                         else if (tcs > 1)
3849                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3850                         else
3851                                 mrqc = IXGBE_MRQC_RSSEN;
3852                 }
3853         }
3854
3855         /* Perform hash on these packet types */
3856         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3857                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3858                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3859                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3860
3861         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3862                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3863         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3864                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3865
3866         if ((hw->mac.type >= ixgbe_mac_X550) &&
3867             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3868                 unsigned int pf_pool = adapter->num_vfs;
3869
3870                 /* Enable VF RSS mode */
3871                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3872                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3873
3874                 /* Setup RSS through the VF registers */
3875                 ixgbe_setup_vfreta(adapter);
3876                 vfmrqc = IXGBE_MRQC_RSSEN;
3877                 vfmrqc |= rss_field;
3878                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3879         } else {
3880                 ixgbe_setup_reta(adapter);
3881                 mrqc |= rss_field;
3882                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3883         }
3884 }
3885
3886 /**
3887  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3888  * @adapter:    address of board private structure
3889  * @index:      index of ring to set
3890  **/
3891 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3892                                    struct ixgbe_ring *ring)
3893 {
3894         struct ixgbe_hw *hw = &adapter->hw;
3895         u32 rscctrl;
3896         u8 reg_idx = ring->reg_idx;
3897
3898         if (!ring_is_rsc_enabled(ring))
3899                 return;
3900
3901         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3902         rscctrl |= IXGBE_RSCCTL_RSCEN;
3903         /*
3904          * we must limit the number of descriptors so that the
3905          * total size of max desc * buf_len is not greater
3906          * than 65536
3907          */
3908         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3909         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3910 }
3911
3912 #define IXGBE_MAX_RX_DESC_POLL 10
3913 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3914                                        struct ixgbe_ring *ring)
3915 {
3916         struct ixgbe_hw *hw = &adapter->hw;
3917         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3918         u32 rxdctl;
3919         u8 reg_idx = ring->reg_idx;
3920
3921         if (ixgbe_removed(hw->hw_addr))
3922                 return;
3923         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3924         if (hw->mac.type == ixgbe_mac_82598EB &&
3925             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3926                 return;
3927
3928         do {
3929                 usleep_range(1000, 2000);
3930                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3931         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3932
3933         if (!wait_loop) {
3934                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3935                       "the polling period\n", reg_idx);
3936         }
3937 }
3938
3939 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3940                             struct ixgbe_ring *ring)
3941 {
3942         struct ixgbe_hw *hw = &adapter->hw;
3943         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3944         u32 rxdctl;
3945         u8 reg_idx = ring->reg_idx;
3946
3947         if (ixgbe_removed(hw->hw_addr))
3948                 return;
3949         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3950         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3951
3952         /* write value back with RXDCTL.ENABLE bit cleared */
3953         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3954
3955         if (hw->mac.type == ixgbe_mac_82598EB &&
3956             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3957                 return;
3958
3959         /* the hardware may take up to 100us to really disable the rx queue */
3960         do {
3961                 udelay(10);
3962                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3963         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3964
3965         if (!wait_loop) {
3966                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3967                       "the polling period\n", reg_idx);
3968         }
3969 }
3970
3971 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3972                              struct ixgbe_ring *ring)
3973 {
3974         struct ixgbe_hw *hw = &adapter->hw;
3975         union ixgbe_adv_rx_desc *rx_desc;
3976         u64 rdba = ring->dma;
3977         u32 rxdctl;
3978         u8 reg_idx = ring->reg_idx;
3979
3980         /* disable queue to avoid issues while updating state */
3981         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3982         ixgbe_disable_rx_queue(adapter, ring);
3983
3984         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3985         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3986         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3987                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3988         /* Force flushing of IXGBE_RDLEN to prevent MDD */
3989         IXGBE_WRITE_FLUSH(hw);
3990
3991         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3992         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3993         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3994
3995         ixgbe_configure_srrctl(adapter, ring);
3996         ixgbe_configure_rscctl(adapter, ring);
3997
3998         if (hw->mac.type == ixgbe_mac_82598EB) {
3999                 /*
4000                  * enable cache line friendly hardware writes:
4001                  * PTHRESH=32 descriptors (half the internal cache),
4002                  * this also removes ugly rx_no_buffer_count increment
4003                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4004                  * WTHRESH=8 burst writeback up to two cache lines
4005                  */
4006                 rxdctl &= ~0x3FFFFF;
4007                 rxdctl |=  0x080420;
4008 #if (PAGE_SIZE < 8192)
4009         /* RXDCTL.RLPML does not work on 82599 */
4010         } else if (hw->mac.type != ixgbe_mac_82599EB) {
4011                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4012                             IXGBE_RXDCTL_RLPML_EN);
4013
4014                 /* Limit the maximum frame size so we don't overrun the skb.
4015                  * This can happen in SRIOV mode when the MTU of the VF is
4016                  * higher than the MTU of the PF.
4017                  */
4018                 if (ring_uses_build_skb(ring) &&
4019                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4020                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4021                                   IXGBE_RXDCTL_RLPML_EN;
4022 #endif
4023         }
4024
4025         /* initialize rx_buffer_info */
4026         memset(ring->rx_buffer_info, 0,
4027                sizeof(struct ixgbe_rx_buffer) * ring->count);
4028
4029         /* initialize Rx descriptor 0 */
4030         rx_desc = IXGBE_RX_DESC(ring, 0);
4031         rx_desc->wb.upper.length = 0;
4032
4033         /* enable receive descriptor ring */
4034         rxdctl |= IXGBE_RXDCTL_ENABLE;
4035         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4036
4037         ixgbe_rx_desc_queue_enable(adapter, ring);
4038         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4039 }
4040
4041 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4042 {
4043         struct ixgbe_hw *hw = &adapter->hw;
4044         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4045         u16 pool;
4046
4047         /* PSRTYPE must be initialized in non 82598 adapters */
4048         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4049                       IXGBE_PSRTYPE_UDPHDR |
4050                       IXGBE_PSRTYPE_IPV4HDR |
4051                       IXGBE_PSRTYPE_L2HDR |
4052                       IXGBE_PSRTYPE_IPV6HDR;
4053
4054         if (hw->mac.type == ixgbe_mac_82598EB)
4055                 return;
4056
4057         if (rss_i > 3)
4058                 psrtype |= 2u << 29;
4059         else if (rss_i > 1)
4060                 psrtype |= 1u << 29;
4061
4062         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
4063                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4064 }
4065
4066 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4067 {
4068         struct ixgbe_hw *hw = &adapter->hw;
4069         u32 reg_offset, vf_shift;
4070         u32 gcr_ext, vmdctl;
4071         int i;
4072
4073         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4074                 return;
4075
4076         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4077         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4078         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4079         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4080         vmdctl |= IXGBE_VT_CTL_REPLEN;
4081         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4082
4083         vf_shift = VMDQ_P(0) % 32;
4084         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4085
4086         /* Enable only the PF's pool for Tx/Rx */
4087         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4088         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4089         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4090         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4091         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4092                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4093
4094         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4095         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4096
4097         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4098         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4099
4100         /*
4101          * Set up VF register offsets for selected VT Mode,
4102          * i.e. 32 or 64 VFs for SR-IOV
4103          */
4104         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4105         case IXGBE_82599_VMDQ_8Q_MASK:
4106                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4107                 break;
4108         case IXGBE_82599_VMDQ_4Q_MASK:
4109                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4110                 break;
4111         default:
4112                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4113                 break;
4114         }
4115
4116         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4117
4118         for (i = 0; i < adapter->num_vfs; i++) {
4119                 /* configure spoof checking */
4120                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4121                                           adapter->vfinfo[i].spoofchk_enabled);
4122
4123                 /* Enable/Disable RSS query feature  */
4124                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4125                                           adapter->vfinfo[i].rss_query_enabled);
4126         }
4127 }
4128
4129 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4130 {
4131         struct ixgbe_hw *hw = &adapter->hw;
4132         struct net_device *netdev = adapter->netdev;
4133         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4134         struct ixgbe_ring *rx_ring;
4135         int i;
4136         u32 mhadd, hlreg0;
4137
4138 #ifdef IXGBE_FCOE
4139         /* adjust max frame to be able to do baby jumbo for FCoE */
4140         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4141             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4142                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4143
4144 #endif /* IXGBE_FCOE */
4145
4146         /* adjust max frame to be at least the size of a standard frame */
4147         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4148                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4149
4150         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4151         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4152                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4153                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4154
4155                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4156         }
4157
4158         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4159         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4160         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4161         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4162
4163         /*
4164          * Setup the HW Rx Head and Tail Descriptor Pointers and
4165          * the Base and Length of the Rx Descriptor Ring
4166          */
4167         for (i = 0; i < adapter->num_rx_queues; i++) {
4168                 rx_ring = adapter->rx_ring[i];
4169
4170                 clear_ring_rsc_enabled(rx_ring);
4171                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4172                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4173
4174                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4175                         set_ring_rsc_enabled(rx_ring);
4176
4177                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4178                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4179
4180                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4181                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4182                         continue;
4183
4184                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4185
4186 #if (PAGE_SIZE < 8192)
4187                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4188                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4189
4190                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4191                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4192                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4193 #endif
4194         }
4195 }
4196
4197 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4198 {
4199         struct ixgbe_hw *hw = &adapter->hw;
4200         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4201
4202         switch (hw->mac.type) {
4203         case ixgbe_mac_82598EB:
4204                 /*
4205                  * For VMDq support of different descriptor types or
4206                  * buffer sizes through the use of multiple SRRCTL
4207                  * registers, RDRXCTL.MVMEN must be set to 1
4208                  *
4209                  * also, the manual doesn't mention it clearly but DCA hints
4210                  * will only use queue 0's tags unless this bit is set.  Side
4211                  * effects of setting this bit are only that SRRCTL must be
4212                  * fully programmed [0..15]
4213                  */
4214                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4215                 break;
4216         case ixgbe_mac_X550:
4217         case ixgbe_mac_X550EM_x:
4218         case ixgbe_mac_x550em_a:
4219                 if (adapter->num_vfs)
4220                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4221                 /* fall through */
4222         case ixgbe_mac_82599EB:
4223         case ixgbe_mac_X540:
4224                 /* Disable RSC for ACK packets */
4225                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4226                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4227                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4228                 /* hardware requires some bits to be set by default */
4229                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4230                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4231                 break;
4232         default:
4233                 /* We should do nothing since we don't know this hardware */
4234                 return;
4235         }
4236
4237         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4238 }
4239
4240 /**
4241  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4242  * @adapter: board private structure
4243  *
4244  * Configure the Rx unit of the MAC after a reset.
4245  **/
4246 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4247 {
4248         struct ixgbe_hw *hw = &adapter->hw;
4249         int i;
4250         u32 rxctrl, rfctl;
4251
4252         /* disable receives while setting up the descriptors */
4253         hw->mac.ops.disable_rx(hw);
4254
4255         ixgbe_setup_psrtype(adapter);
4256         ixgbe_setup_rdrxctl(adapter);
4257
4258         /* RSC Setup */
4259         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4260         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4261         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4262                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4263
4264         /* disable NFS filtering */
4265         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4266         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4267
4268         /* Program registers for the distribution of queues */
4269         ixgbe_setup_mrqc(adapter);
4270
4271         /* set_rx_buffer_len must be called before ring initialization */
4272         ixgbe_set_rx_buffer_len(adapter);
4273
4274         /*
4275          * Setup the HW Rx Head and Tail Descriptor Pointers and
4276          * the Base and Length of the Rx Descriptor Ring
4277          */
4278         for (i = 0; i < adapter->num_rx_queues; i++)
4279                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4280
4281         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4282         /* disable drop enable for 82598 parts */
4283         if (hw->mac.type == ixgbe_mac_82598EB)
4284                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4285
4286         /* enable all receives */
4287         rxctrl |= IXGBE_RXCTRL_RXEN;
4288         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4289 }
4290
4291 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4292                                  __be16 proto, u16 vid)
4293 {
4294         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4295         struct ixgbe_hw *hw = &adapter->hw;
4296
4297         /* add VID to filter table */
4298         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4299                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4300
4301         set_bit(vid, adapter->active_vlans);
4302
4303         return 0;
4304 }
4305
4306 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4307 {
4308         u32 vlvf;
4309         int idx;
4310
4311         /* short cut the special case */
4312         if (vlan == 0)
4313                 return 0;
4314
4315         /* Search for the vlan id in the VLVF entries */
4316         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4317                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4318                 if ((vlvf & VLAN_VID_MASK) == vlan)
4319                         break;
4320         }
4321
4322         return idx;
4323 }
4324
4325 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4326 {
4327         struct ixgbe_hw *hw = &adapter->hw;
4328         u32 bits, word;
4329         int idx;
4330
4331         idx = ixgbe_find_vlvf_entry(hw, vid);
4332         if (!idx)
4333                 return;
4334
4335         /* See if any other pools are set for this VLAN filter
4336          * entry other than the PF.
4337          */
4338         word = idx * 2 + (VMDQ_P(0) / 32);
4339         bits = ~BIT(VMDQ_P(0) % 32);
4340         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4341
4342         /* Disable the filter so this falls into the default pool. */
4343         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4344                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4345                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4346                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4347         }
4348 }
4349
4350 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4351                                   __be16 proto, u16 vid)
4352 {
4353         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4354         struct ixgbe_hw *hw = &adapter->hw;
4355
4356         /* remove VID from filter table */
4357         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4358                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4359
4360         clear_bit(vid, adapter->active_vlans);
4361
4362         return 0;
4363 }
4364
4365 /**
4366  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4367  * @adapter: driver data
4368  */
4369 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4370 {
4371         struct ixgbe_hw *hw = &adapter->hw;
4372         u32 vlnctrl;
4373         int i, j;
4374
4375         switch (hw->mac.type) {
4376         case ixgbe_mac_82598EB:
4377                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4378                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4379                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4380                 break;
4381         case ixgbe_mac_82599EB:
4382         case ixgbe_mac_X540:
4383         case ixgbe_mac_X550:
4384         case ixgbe_mac_X550EM_x:
4385         case ixgbe_mac_x550em_a:
4386                 for (i = 0; i < adapter->num_rx_queues; i++) {
4387                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4388
4389                         if (ring->l2_accel_priv)
4390                                 continue;
4391                         j = ring->reg_idx;
4392                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4393                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4394                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4395                 }
4396                 break;
4397         default:
4398                 break;
4399         }
4400 }
4401
4402 /**
4403  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4404  * @adapter: driver data
4405  */
4406 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4407 {
4408         struct ixgbe_hw *hw = &adapter->hw;
4409         u32 vlnctrl;
4410         int i, j;
4411
4412         switch (hw->mac.type) {
4413         case ixgbe_mac_82598EB:
4414                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4415                 vlnctrl |= IXGBE_VLNCTRL_VME;
4416                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4417                 break;
4418         case ixgbe_mac_82599EB:
4419         case ixgbe_mac_X540:
4420         case ixgbe_mac_X550:
4421         case ixgbe_mac_X550EM_x:
4422         case ixgbe_mac_x550em_a:
4423                 for (i = 0; i < adapter->num_rx_queues; i++) {
4424                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4425
4426                         if (ring->l2_accel_priv)
4427                                 continue;
4428                         j = ring->reg_idx;
4429                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4430                         vlnctrl |= IXGBE_RXDCTL_VME;
4431                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4432                 }
4433                 break;
4434         default:
4435                 break;
4436         }
4437 }
4438
4439 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4440 {
4441         struct ixgbe_hw *hw = &adapter->hw;
4442         u32 vlnctrl, i;
4443
4444         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4445
4446         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4447         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4448                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4449                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4450         } else {
4451                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4452                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4453                 return;
4454         }
4455
4456         /* Nothing to do for 82598 */
4457         if (hw->mac.type == ixgbe_mac_82598EB)
4458                 return;
4459
4460         /* We are already in VLAN promisc, nothing to do */
4461         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4462                 return;
4463
4464         /* Set flag so we don't redo unnecessary work */
4465         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4466
4467         /* Add PF to all active pools */
4468         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4469                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4470                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4471
4472                 vlvfb |= BIT(VMDQ_P(0) % 32);
4473                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4474         }
4475
4476         /* Set all bits in the VLAN filter table array */
4477         for (i = hw->mac.vft_size; i--;)
4478                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4479 }
4480
4481 #define VFTA_BLOCK_SIZE 8
4482 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4483 {
4484         struct ixgbe_hw *hw = &adapter->hw;
4485         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4486         u32 vid_start = vfta_offset * 32;
4487         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4488         u32 i, vid, word, bits;
4489
4490         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4491                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4492
4493                 /* pull VLAN ID from VLVF */
4494                 vid = vlvf & VLAN_VID_MASK;
4495
4496                 /* only concern outselves with a certain range */
4497                 if (vid < vid_start || vid >= vid_end)
4498                         continue;
4499
4500                 if (vlvf) {
4501                         /* record VLAN ID in VFTA */
4502                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4503
4504                         /* if PF is part of this then continue */
4505                         if (test_bit(vid, adapter->active_vlans))
4506                                 continue;
4507                 }
4508
4509                 /* remove PF from the pool */
4510                 word = i * 2 + VMDQ_P(0) / 32;
4511                 bits = ~BIT(VMDQ_P(0) % 32);
4512                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4513                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4514         }
4515
4516         /* extract values from active_vlans and write back to VFTA */
4517         for (i = VFTA_BLOCK_SIZE; i--;) {
4518                 vid = (vfta_offset + i) * 32;
4519                 word = vid / BITS_PER_LONG;
4520                 bits = vid % BITS_PER_LONG;
4521
4522                 vfta[i] |= adapter->active_vlans[word] >> bits;
4523
4524                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4525         }
4526 }
4527
4528 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4529 {
4530         struct ixgbe_hw *hw = &adapter->hw;
4531         u32 vlnctrl, i;
4532
4533         /* Set VLAN filtering to enabled */
4534         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4535         vlnctrl |= IXGBE_VLNCTRL_VFE;
4536         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4537
4538         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4539             hw->mac.type == ixgbe_mac_82598EB)
4540                 return;
4541
4542         /* We are not in VLAN promisc, nothing to do */
4543         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4544                 return;
4545
4546         /* Set flag so we don't redo unnecessary work */
4547         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4548
4549         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4550                 ixgbe_scrub_vfta(adapter, i);
4551 }
4552
4553 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4554 {
4555         u16 vid = 1;
4556
4557         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4558
4559         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4560                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4561 }
4562
4563 /**
4564  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4565  * @netdev: network interface device structure
4566  *
4567  * Writes multicast address list to the MTA hash table.
4568  * Returns: -ENOMEM on failure
4569  *                0 on no addresses written
4570  *                X on writing X addresses to MTA
4571  **/
4572 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4573 {
4574         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4575         struct ixgbe_hw *hw = &adapter->hw;
4576
4577         if (!netif_running(netdev))
4578                 return 0;
4579
4580         if (hw->mac.ops.update_mc_addr_list)
4581                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4582         else
4583                 return -ENOMEM;
4584
4585 #ifdef CONFIG_PCI_IOV
4586         ixgbe_restore_vf_multicasts(adapter);
4587 #endif
4588
4589         return netdev_mc_count(netdev);
4590 }
4591
4592 #ifdef CONFIG_PCI_IOV
4593 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4594 {
4595         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4596         struct ixgbe_hw *hw = &adapter->hw;
4597         int i;
4598
4599         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4600                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4601
4602                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4603                         hw->mac.ops.set_rar(hw, i,
4604                                             mac_table->addr,
4605                                             mac_table->pool,
4606                                             IXGBE_RAH_AV);
4607                 else
4608                         hw->mac.ops.clear_rar(hw, i);
4609         }
4610 }
4611
4612 #endif
4613 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4614 {
4615         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4616         struct ixgbe_hw *hw = &adapter->hw;
4617         int i;
4618
4619         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4620                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4621                         continue;
4622
4623                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4624
4625                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4626                         hw->mac.ops.set_rar(hw, i,
4627                                             mac_table->addr,
4628                                             mac_table->pool,
4629                                             IXGBE_RAH_AV);
4630                 else
4631                         hw->mac.ops.clear_rar(hw, i);
4632         }
4633 }
4634
4635 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4636 {
4637         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4638         struct ixgbe_hw *hw = &adapter->hw;
4639         int i;
4640
4641         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4642                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4643                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4644         }
4645
4646         ixgbe_sync_mac_table(adapter);
4647 }
4648
4649 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4650 {
4651         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4652         struct ixgbe_hw *hw = &adapter->hw;
4653         int i, count = 0;
4654
4655         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4656                 /* do not count default RAR as available */
4657                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4658                         continue;
4659
4660                 /* only count unused and addresses that belong to us */
4661                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4662                         if (mac_table->pool != pool)
4663                                 continue;
4664                 }
4665
4666                 count++;
4667         }
4668
4669         return count;
4670 }
4671
4672 /* this function destroys the first RAR entry */
4673 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4674 {
4675         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4676         struct ixgbe_hw *hw = &adapter->hw;
4677
4678         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4679         mac_table->pool = VMDQ_P(0);
4680
4681         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4682
4683         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4684                             IXGBE_RAH_AV);
4685 }
4686
4687 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4688                          const u8 *addr, u16 pool)
4689 {
4690         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4691         struct ixgbe_hw *hw = &adapter->hw;
4692         int i;
4693
4694         if (is_zero_ether_addr(addr))
4695                 return -EINVAL;
4696
4697         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4698                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4699                         continue;
4700
4701                 ether_addr_copy(mac_table->addr, addr);
4702                 mac_table->pool = pool;
4703
4704                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4705                                     IXGBE_MAC_STATE_IN_USE;
4706
4707                 ixgbe_sync_mac_table(adapter);
4708
4709                 return i;
4710         }
4711
4712         return -ENOMEM;
4713 }
4714
4715 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4716                          const u8 *addr, u16 pool)
4717 {
4718         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4719         struct ixgbe_hw *hw = &adapter->hw;
4720         int i;
4721
4722         if (is_zero_ether_addr(addr))
4723                 return -EINVAL;
4724
4725         /* search table for addr, if found clear IN_USE flag and sync */
4726         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4727                 /* we can only delete an entry if it is in use */
4728                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4729                         continue;
4730                 /* we only care about entries that belong to the given pool */
4731                 if (mac_table->pool != pool)
4732                         continue;
4733                 /* we only care about a specific MAC address */
4734                 if (!ether_addr_equal(addr, mac_table->addr))
4735                         continue;
4736
4737                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4738                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4739
4740                 ixgbe_sync_mac_table(adapter);
4741
4742                 return 0;
4743         }
4744
4745         return -ENOMEM;
4746 }
4747 /**
4748  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4749  * @netdev: network interface device structure
4750  *
4751  * Writes unicast address list to the RAR table.
4752  * Returns: -ENOMEM on failure/insufficient address space
4753  *                0 on no addresses written
4754  *                X on writing X addresses to the RAR table
4755  **/
4756 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4757 {
4758         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4759         int count = 0;
4760
4761         /* return ENOMEM indicating insufficient memory for addresses */
4762         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4763                 return -ENOMEM;
4764
4765         if (!netdev_uc_empty(netdev)) {
4766                 struct netdev_hw_addr *ha;
4767                 netdev_for_each_uc_addr(ha, netdev) {
4768                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4769                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4770                         count++;
4771                 }
4772         }
4773         return count;
4774 }
4775
4776 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4777 {
4778         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4779         int ret;
4780
4781         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4782
4783         return min_t(int, ret, 0);
4784 }
4785
4786 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4787 {
4788         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4789
4790         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4791
4792         return 0;
4793 }
4794
4795 /**
4796  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4797  * @netdev: network interface device structure
4798  *
4799  * The set_rx_method entry point is called whenever the unicast/multicast
4800  * address list or the network interface flags are updated.  This routine is
4801  * responsible for configuring the hardware for proper unicast, multicast and
4802  * promiscuous mode.
4803  **/
4804 void ixgbe_set_rx_mode(struct net_device *netdev)
4805 {
4806         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4807         struct ixgbe_hw *hw = &adapter->hw;
4808         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4809         netdev_features_t features = netdev->features;
4810         int count;
4811
4812         /* Check for Promiscuous and All Multicast modes */
4813         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4814
4815         /* set all bits that we expect to always be set */
4816         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4817         fctrl |= IXGBE_FCTRL_BAM;
4818         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4819         fctrl |= IXGBE_FCTRL_PMCF;
4820
4821         /* clear the bits we are changing the status of */
4822         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4823         if (netdev->flags & IFF_PROMISC) {
4824                 hw->addr_ctrl.user_set_promisc = true;
4825                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4826                 vmolr |= IXGBE_VMOLR_MPE;
4827                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4828         } else {
4829                 if (netdev->flags & IFF_ALLMULTI) {
4830                         fctrl |= IXGBE_FCTRL_MPE;
4831                         vmolr |= IXGBE_VMOLR_MPE;
4832                 }
4833                 hw->addr_ctrl.user_set_promisc = false;
4834         }
4835
4836         /*
4837          * Write addresses to available RAR registers, if there is not
4838          * sufficient space to store all the addresses then enable
4839          * unicast promiscuous mode
4840          */
4841         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4842                 fctrl |= IXGBE_FCTRL_UPE;
4843                 vmolr |= IXGBE_VMOLR_ROPE;
4844         }
4845
4846         /* Write addresses to the MTA, if the attempt fails
4847          * then we should just turn on promiscuous mode so
4848          * that we can at least receive multicast traffic
4849          */
4850         count = ixgbe_write_mc_addr_list(netdev);
4851         if (count < 0) {
4852                 fctrl |= IXGBE_FCTRL_MPE;
4853                 vmolr |= IXGBE_VMOLR_MPE;
4854         } else if (count) {
4855                 vmolr |= IXGBE_VMOLR_ROMPE;
4856         }
4857
4858         if (hw->mac.type != ixgbe_mac_82598EB) {
4859                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4860                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4861                            IXGBE_VMOLR_ROPE);
4862                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4863         }
4864
4865         /* This is useful for sniffing bad packets. */
4866         if (features & NETIF_F_RXALL) {
4867                 /* UPE and MPE will be handled by normal PROMISC logic
4868                  * in e1000e_set_rx_mode */
4869                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4870                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4871                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4872
4873                 fctrl &= ~(IXGBE_FCTRL_DPF);
4874                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4875         }
4876
4877         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4878
4879         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4880                 ixgbe_vlan_strip_enable(adapter);
4881         else
4882                 ixgbe_vlan_strip_disable(adapter);
4883
4884         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4885                 ixgbe_vlan_promisc_disable(adapter);
4886         else
4887                 ixgbe_vlan_promisc_enable(adapter);
4888 }
4889
4890 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4891 {
4892         int q_idx;
4893
4894         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4895                 napi_enable(&adapter->q_vector[q_idx]->napi);
4896 }
4897
4898 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4899 {
4900         int q_idx;
4901
4902         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4903                 napi_disable(&adapter->q_vector[q_idx]->napi);
4904 }
4905
4906 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4907 {
4908         struct ixgbe_hw *hw = &adapter->hw;
4909         u32 vxlanctrl;
4910
4911         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4912                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4913                 return;
4914
4915         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
4916         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4917
4918         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4919                 adapter->vxlan_port = 0;
4920
4921         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4922                 adapter->geneve_port = 0;
4923 }
4924
4925 #ifdef CONFIG_IXGBE_DCB
4926 /**
4927  * ixgbe_configure_dcb - Configure DCB hardware
4928  * @adapter: ixgbe adapter struct
4929  *
4930  * This is called by the driver on open to configure the DCB hardware.
4931  * This is also called by the gennetlink interface when reconfiguring
4932  * the DCB state.
4933  */
4934 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4935 {
4936         struct ixgbe_hw *hw = &adapter->hw;
4937         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4938
4939         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4940                 if (hw->mac.type == ixgbe_mac_82598EB)
4941                         netif_set_gso_max_size(adapter->netdev, 65536);
4942                 return;
4943         }
4944
4945         if (hw->mac.type == ixgbe_mac_82598EB)
4946                 netif_set_gso_max_size(adapter->netdev, 32768);
4947
4948 #ifdef IXGBE_FCOE
4949         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4950                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4951 #endif
4952
4953         /* reconfigure the hardware */
4954         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4955                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4956                                                 DCB_TX_CONFIG);
4957                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4958                                                 DCB_RX_CONFIG);
4959                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4960         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4961                 ixgbe_dcb_hw_ets(&adapter->hw,
4962                                  adapter->ixgbe_ieee_ets,
4963                                  max_frame);
4964                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4965                                         adapter->ixgbe_ieee_pfc->pfc_en,
4966                                         adapter->ixgbe_ieee_ets->prio_tc);
4967         }
4968
4969         /* Enable RSS Hash per TC */
4970         if (hw->mac.type != ixgbe_mac_82598EB) {
4971                 u32 msb = 0;
4972                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4973
4974                 while (rss_i) {
4975                         msb++;
4976                         rss_i >>= 1;
4977                 }
4978
4979                 /* write msb to all 8 TCs in one write */
4980                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4981         }
4982 }
4983 #endif
4984
4985 /* Additional bittime to account for IXGBE framing */
4986 #define IXGBE_ETH_FRAMING 20
4987
4988 /**
4989  * ixgbe_hpbthresh - calculate high water mark for flow control
4990  *
4991  * @adapter: board private structure to calculate for
4992  * @pb: packet buffer to calculate
4993  */
4994 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4995 {
4996         struct ixgbe_hw *hw = &adapter->hw;
4997         struct net_device *dev = adapter->netdev;
4998         int link, tc, kb, marker;
4999         u32 dv_id, rx_pba;
5000
5001         /* Calculate max LAN frame size */
5002         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5003
5004 #ifdef IXGBE_FCOE
5005         /* FCoE traffic class uses FCOE jumbo frames */
5006         if ((dev->features & NETIF_F_FCOE_MTU) &&
5007             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5008             (pb == ixgbe_fcoe_get_tc(adapter)))
5009                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5010 #endif
5011
5012         /* Calculate delay value for device */
5013         switch (hw->mac.type) {
5014         case ixgbe_mac_X540:
5015         case ixgbe_mac_X550:
5016         case ixgbe_mac_X550EM_x:
5017         case ixgbe_mac_x550em_a:
5018                 dv_id = IXGBE_DV_X540(link, tc);
5019                 break;
5020         default:
5021                 dv_id = IXGBE_DV(link, tc);
5022                 break;
5023         }
5024
5025         /* Loopback switch introduces additional latency */
5026         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5027                 dv_id += IXGBE_B2BT(tc);
5028
5029         /* Delay value is calculated in bit times convert to KB */
5030         kb = IXGBE_BT2KB(dv_id);
5031         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5032
5033         marker = rx_pba - kb;
5034
5035         /* It is possible that the packet buffer is not large enough
5036          * to provide required headroom. In this case throw an error
5037          * to user and a do the best we can.
5038          */
5039         if (marker < 0) {
5040                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5041                             "headroom to support flow control."
5042                             "Decrease MTU or number of traffic classes\n", pb);
5043                 marker = tc + 1;
5044         }
5045
5046         return marker;
5047 }
5048
5049 /**
5050  * ixgbe_lpbthresh - calculate low water mark for for flow control
5051  *
5052  * @adapter: board private structure to calculate for
5053  * @pb: packet buffer to calculate
5054  */
5055 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5056 {
5057         struct ixgbe_hw *hw = &adapter->hw;
5058         struct net_device *dev = adapter->netdev;
5059         int tc;
5060         u32 dv_id;
5061
5062         /* Calculate max LAN frame size */
5063         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5064
5065 #ifdef IXGBE_FCOE
5066         /* FCoE traffic class uses FCOE jumbo frames */
5067         if ((dev->features & NETIF_F_FCOE_MTU) &&
5068             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5069             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5070                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5071 #endif
5072
5073         /* Calculate delay value for device */
5074         switch (hw->mac.type) {
5075         case ixgbe_mac_X540:
5076         case ixgbe_mac_X550:
5077         case ixgbe_mac_X550EM_x:
5078         case ixgbe_mac_x550em_a:
5079                 dv_id = IXGBE_LOW_DV_X540(tc);
5080                 break;
5081         default:
5082                 dv_id = IXGBE_LOW_DV(tc);
5083                 break;
5084         }
5085
5086         /* Delay value is calculated in bit times convert to KB */
5087         return IXGBE_BT2KB(dv_id);
5088 }
5089
5090 /*
5091  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5092  */
5093 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5094 {
5095         struct ixgbe_hw *hw = &adapter->hw;
5096         int num_tc = netdev_get_num_tc(adapter->netdev);
5097         int i;
5098
5099         if (!num_tc)
5100                 num_tc = 1;
5101
5102         for (i = 0; i < num_tc; i++) {
5103                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5104                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5105
5106                 /* Low water marks must not be larger than high water marks */
5107                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5108                         hw->fc.low_water[i] = 0;
5109         }
5110
5111         for (; i < MAX_TRAFFIC_CLASS; i++)
5112                 hw->fc.high_water[i] = 0;
5113 }
5114
5115 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5116 {
5117         struct ixgbe_hw *hw = &adapter->hw;
5118         int hdrm;
5119         u8 tc = netdev_get_num_tc(adapter->netdev);
5120
5121         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5122             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5123                 hdrm = 32 << adapter->fdir_pballoc;
5124         else
5125                 hdrm = 0;
5126
5127         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5128         ixgbe_pbthresh_setup(adapter);
5129 }
5130
5131 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5132 {
5133         struct ixgbe_hw *hw = &adapter->hw;
5134         struct hlist_node *node2;
5135         struct ixgbe_fdir_filter *filter;
5136         u8 queue;
5137
5138         spin_lock(&adapter->fdir_perfect_lock);
5139
5140         if (!hlist_empty(&adapter->fdir_filter_list))
5141                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5142
5143         hlist_for_each_entry_safe(filter, node2,
5144                                   &adapter->fdir_filter_list, fdir_node) {
5145                 if (filter->action == IXGBE_FDIR_DROP_QUEUE) {
5146                         queue = IXGBE_FDIR_DROP_QUEUE;
5147                 } else {
5148                         u32 ring = ethtool_get_flow_spec_ring(filter->action);
5149                         u8 vf = ethtool_get_flow_spec_ring_vf(filter->action);
5150
5151                         if (!vf && (ring >= adapter->num_rx_queues)) {
5152                                 e_err(drv, "FDIR restore failed without VF, ring: %u\n",
5153                                       ring);
5154                                 continue;
5155                         } else if (vf &&
5156                                    ((vf > adapter->num_vfs) ||
5157                                      ring >= adapter->num_rx_queues_per_pool)) {
5158                                 e_err(drv, "FDIR restore failed with VF, vf: %hhu, ring: %u\n",
5159                                       vf, ring);
5160                                 continue;
5161                         }
5162
5163                         /* Map the ring onto the absolute queue index */
5164                         if (!vf)
5165                                 queue = adapter->rx_ring[ring]->reg_idx;
5166                         else
5167                                 queue = ((vf - 1) *
5168                                         adapter->num_rx_queues_per_pool) + ring;
5169                 }
5170
5171                 ixgbe_fdir_write_perfect_filter_82599(hw,
5172                                 &filter->filter, filter->sw_idx, queue);
5173         }
5174
5175         spin_unlock(&adapter->fdir_perfect_lock);
5176 }
5177
5178 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
5179                                       struct ixgbe_adapter *adapter)
5180 {
5181         struct ixgbe_hw *hw = &adapter->hw;
5182         u32 vmolr;
5183
5184         /* No unicast promiscuous support for VMDQ devices. */
5185         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
5186         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
5187
5188         /* clear the affected bit */
5189         vmolr &= ~IXGBE_VMOLR_MPE;
5190
5191         if (dev->flags & IFF_ALLMULTI) {
5192                 vmolr |= IXGBE_VMOLR_MPE;
5193         } else {
5194                 vmolr |= IXGBE_VMOLR_ROMPE;
5195                 hw->mac.ops.update_mc_addr_list(hw, dev);
5196         }
5197         ixgbe_write_uc_addr_list(adapter->netdev, pool);
5198         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
5199 }
5200
5201 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
5202 {
5203         struct ixgbe_adapter *adapter = vadapter->real_adapter;
5204         int rss_i = adapter->num_rx_queues_per_pool;
5205         struct ixgbe_hw *hw = &adapter->hw;
5206         u16 pool = vadapter->pool;
5207         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
5208                       IXGBE_PSRTYPE_UDPHDR |
5209                       IXGBE_PSRTYPE_IPV4HDR |
5210                       IXGBE_PSRTYPE_L2HDR |
5211                       IXGBE_PSRTYPE_IPV6HDR;
5212
5213         if (hw->mac.type == ixgbe_mac_82598EB)
5214                 return;
5215
5216         if (rss_i > 3)
5217                 psrtype |= 2u << 29;
5218         else if (rss_i > 1)
5219                 psrtype |= 1u << 29;
5220
5221         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
5222 }
5223
5224 /**
5225  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5226  * @rx_ring: ring to free buffers from
5227  **/
5228 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5229 {
5230         u16 i = rx_ring->next_to_clean;
5231         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5232
5233         /* Free all the Rx ring sk_buffs */
5234         while (i != rx_ring->next_to_alloc) {
5235                 if (rx_buffer->skb) {
5236                         struct sk_buff *skb = rx_buffer->skb;
5237                         if (IXGBE_CB(skb)->page_released)
5238                                 dma_unmap_page_attrs(rx_ring->dev,
5239                                                      IXGBE_CB(skb)->dma,
5240                                                      ixgbe_rx_pg_size(rx_ring),
5241                                                      DMA_FROM_DEVICE,
5242                                                      IXGBE_RX_DMA_ATTR);
5243                         dev_kfree_skb(skb);
5244                 }
5245
5246                 /* Invalidate cache lines that may have been written to by
5247                  * device so that we avoid corrupting memory.
5248                  */
5249                 dma_sync_single_range_for_cpu(rx_ring->dev,
5250                                               rx_buffer->dma,
5251                                               rx_buffer->page_offset,
5252                                               ixgbe_rx_bufsz(rx_ring),
5253                                               DMA_FROM_DEVICE);
5254
5255                 /* free resources associated with mapping */
5256                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5257                                      ixgbe_rx_pg_size(rx_ring),
5258                                      DMA_FROM_DEVICE,
5259                                      IXGBE_RX_DMA_ATTR);
5260                 __page_frag_cache_drain(rx_buffer->page,
5261                                         rx_buffer->pagecnt_bias);
5262
5263                 i++;
5264                 rx_buffer++;
5265                 if (i == rx_ring->count) {
5266                         i = 0;
5267                         rx_buffer = rx_ring->rx_buffer_info;
5268                 }
5269         }
5270
5271         rx_ring->next_to_alloc = 0;
5272         rx_ring->next_to_clean = 0;
5273         rx_ring->next_to_use = 0;
5274 }
5275
5276 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
5277                                    struct ixgbe_ring *rx_ring)
5278 {
5279         struct ixgbe_adapter *adapter = vadapter->real_adapter;
5280         int index = rx_ring->queue_index + vadapter->rx_base_queue;
5281
5282         /* shutdown specific queue receive and wait for dma to settle */
5283         ixgbe_disable_rx_queue(adapter, rx_ring);
5284         usleep_range(10000, 20000);
5285         ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
5286         ixgbe_clean_rx_ring(rx_ring);
5287         rx_ring->l2_accel_priv = NULL;
5288 }
5289
5290 static int ixgbe_fwd_ring_down(struct net_device *vdev,
5291                                struct ixgbe_fwd_adapter *accel)
5292 {
5293         struct ixgbe_adapter *adapter = accel->real_adapter;
5294         unsigned int rxbase = accel->rx_base_queue;
5295         unsigned int txbase = accel->tx_base_queue;
5296         int i;
5297
5298         netif_tx_stop_all_queues(vdev);
5299
5300         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5301                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5302                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
5303         }
5304
5305         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5306                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
5307                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
5308         }
5309
5310
5311         return 0;
5312 }
5313
5314 static int ixgbe_fwd_ring_up(struct net_device *vdev,
5315                              struct ixgbe_fwd_adapter *accel)
5316 {
5317         struct ixgbe_adapter *adapter = accel->real_adapter;
5318         unsigned int rxbase, txbase, queues;
5319         int i, baseq, err = 0;
5320
5321         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
5322                 return 0;
5323
5324         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5325         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
5326                    accel->pool, adapter->num_rx_pools,
5327                    baseq, baseq + adapter->num_rx_queues_per_pool,
5328                    adapter->fwd_bitmask);
5329
5330         accel->netdev = vdev;
5331         accel->rx_base_queue = rxbase = baseq;
5332         accel->tx_base_queue = txbase = baseq;
5333
5334         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5335                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5336
5337         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5338                 adapter->rx_ring[rxbase + i]->netdev = vdev;
5339                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
5340                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
5341         }
5342
5343         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5344                 adapter->tx_ring[txbase + i]->netdev = vdev;
5345                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
5346         }
5347
5348         queues = min_t(unsigned int,
5349                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
5350         err = netif_set_real_num_tx_queues(vdev, queues);
5351         if (err)
5352                 goto fwd_queue_err;
5353
5354         err = netif_set_real_num_rx_queues(vdev, queues);
5355         if (err)
5356                 goto fwd_queue_err;
5357
5358         if (is_valid_ether_addr(vdev->dev_addr))
5359                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
5360
5361         ixgbe_fwd_psrtype(accel);
5362         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5363         return err;
5364 fwd_queue_err:
5365         ixgbe_fwd_ring_down(vdev, accel);
5366         return err;
5367 }
5368
5369 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5370 {
5371         if (netif_is_macvlan(upper)) {
5372                 struct macvlan_dev *dfwd = netdev_priv(upper);
5373                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5374
5375                 if (dfwd->fwd_priv)
5376                         ixgbe_fwd_ring_up(upper, vadapter);
5377         }
5378
5379         return 0;
5380 }
5381
5382 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5383 {
5384         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5385                                       ixgbe_upper_dev_walk, NULL);
5386 }
5387
5388 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5389 {
5390         struct ixgbe_hw *hw = &adapter->hw;
5391
5392         ixgbe_configure_pb(adapter);
5393 #ifdef CONFIG_IXGBE_DCB
5394         ixgbe_configure_dcb(adapter);
5395 #endif
5396         /*
5397          * We must restore virtualization before VLANs or else
5398          * the VLVF registers will not be populated
5399          */
5400         ixgbe_configure_virtualization(adapter);
5401
5402         ixgbe_set_rx_mode(adapter->netdev);
5403         ixgbe_restore_vlan(adapter);
5404
5405         switch (hw->mac.type) {
5406         case ixgbe_mac_82599EB:
5407         case ixgbe_mac_X540:
5408                 hw->mac.ops.disable_rx_buff(hw);
5409                 break;
5410         default:
5411                 break;
5412         }
5413
5414         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5415                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5416                                                 adapter->fdir_pballoc);
5417         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5418                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5419                                               adapter->fdir_pballoc);
5420                 ixgbe_fdir_filter_restore(adapter);
5421         }
5422
5423         switch (hw->mac.type) {
5424         case ixgbe_mac_82599EB:
5425         case ixgbe_mac_X540:
5426                 hw->mac.ops.enable_rx_buff(hw);
5427                 break;
5428         default:
5429                 break;
5430         }
5431
5432 #ifdef CONFIG_IXGBE_DCA
5433         /* configure DCA */
5434         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5435                 ixgbe_setup_dca(adapter);
5436 #endif /* CONFIG_IXGBE_DCA */
5437
5438 #ifdef IXGBE_FCOE
5439         /* configure FCoE L2 filters, redirection table, and Rx control */
5440         ixgbe_configure_fcoe(adapter);
5441
5442 #endif /* IXGBE_FCOE */
5443         ixgbe_configure_tx(adapter);
5444         ixgbe_configure_rx(adapter);
5445         ixgbe_configure_dfwd(adapter);
5446 }
5447
5448 /**
5449  * ixgbe_sfp_link_config - set up SFP+ link
5450  * @adapter: pointer to private adapter struct
5451  **/
5452 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5453 {
5454         /*
5455          * We are assuming the worst case scenario here, and that
5456          * is that an SFP was inserted/removed after the reset
5457          * but before SFP detection was enabled.  As such the best
5458          * solution is to just start searching as soon as we start
5459          */
5460         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5461                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5462
5463         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5464         adapter->sfp_poll_time = 0;
5465 }
5466
5467 /**
5468  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5469  * @hw: pointer to private hardware struct
5470  *
5471  * Returns 0 on success, negative on failure
5472  **/
5473 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5474 {
5475         u32 speed;
5476         bool autoneg, link_up = false;
5477         int ret = IXGBE_ERR_LINK_SETUP;
5478
5479         if (hw->mac.ops.check_link)
5480                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5481
5482         if (ret)
5483                 return ret;
5484
5485         speed = hw->phy.autoneg_advertised;
5486         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5487                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5488                                                         &autoneg);
5489         if (ret)
5490                 return ret;
5491
5492         if (hw->mac.ops.setup_link)
5493                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5494
5495         return ret;
5496 }
5497
5498 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5499 {
5500         struct ixgbe_hw *hw = &adapter->hw;
5501         u32 gpie = 0;
5502
5503         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5504                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5505                        IXGBE_GPIE_OCD;
5506                 gpie |= IXGBE_GPIE_EIAME;
5507                 /*
5508                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5509                  * this saves a register write for every interrupt
5510                  */
5511                 switch (hw->mac.type) {
5512                 case ixgbe_mac_82598EB:
5513                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5514                         break;
5515                 case ixgbe_mac_82599EB:
5516                 case ixgbe_mac_X540:
5517                 case ixgbe_mac_X550:
5518                 case ixgbe_mac_X550EM_x:
5519                 case ixgbe_mac_x550em_a:
5520                 default:
5521                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5522                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5523                         break;
5524                 }
5525         } else {
5526                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5527                  * specifically only auto mask tx and rx interrupts */
5528                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5529         }
5530
5531         /* XXX: to interrupt immediately for EICS writes, enable this */
5532         /* gpie |= IXGBE_GPIE_EIMEN; */
5533
5534         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5535                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5536
5537                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5538                 case IXGBE_82599_VMDQ_8Q_MASK:
5539                         gpie |= IXGBE_GPIE_VTMODE_16;
5540                         break;
5541                 case IXGBE_82599_VMDQ_4Q_MASK:
5542                         gpie |= IXGBE_GPIE_VTMODE_32;
5543                         break;
5544                 default:
5545                         gpie |= IXGBE_GPIE_VTMODE_64;
5546                         break;
5547                 }
5548         }
5549
5550         /* Enable Thermal over heat sensor interrupt */
5551         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5552                 switch (adapter->hw.mac.type) {
5553                 case ixgbe_mac_82599EB:
5554                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5555                         break;
5556                 default:
5557                         break;
5558                 }
5559         }
5560
5561         /* Enable fan failure interrupt */
5562         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5563                 gpie |= IXGBE_SDP1_GPIEN(hw);
5564
5565         switch (hw->mac.type) {
5566         case ixgbe_mac_82599EB:
5567                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5568                 break;
5569         case ixgbe_mac_X550EM_x:
5570         case ixgbe_mac_x550em_a:
5571                 gpie |= IXGBE_SDP0_GPIEN_X540;
5572                 break;
5573         default:
5574                 break;
5575         }
5576
5577         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5578 }
5579
5580 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5581 {
5582         struct ixgbe_hw *hw = &adapter->hw;
5583         int err;
5584         u32 ctrl_ext;
5585
5586         ixgbe_get_hw_control(adapter);
5587         ixgbe_setup_gpie(adapter);
5588
5589         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5590                 ixgbe_configure_msix(adapter);
5591         else
5592                 ixgbe_configure_msi_and_legacy(adapter);
5593
5594         /* enable the optics for 82599 SFP+ fiber */
5595         if (hw->mac.ops.enable_tx_laser)
5596                 hw->mac.ops.enable_tx_laser(hw);
5597
5598         if (hw->phy.ops.set_phy_power)
5599                 hw->phy.ops.set_phy_power(hw, true);
5600
5601         smp_mb__before_atomic();
5602         clear_bit(__IXGBE_DOWN, &adapter->state);
5603         ixgbe_napi_enable_all(adapter);
5604
5605         if (ixgbe_is_sfp(hw)) {
5606                 ixgbe_sfp_link_config(adapter);
5607         } else {
5608                 err = ixgbe_non_sfp_link_config(hw);
5609                 if (err)
5610                         e_err(probe, "link_config FAILED %d\n", err);
5611         }
5612
5613         /* clear any pending interrupts, may auto mask */
5614         IXGBE_READ_REG(hw, IXGBE_EICR);
5615         ixgbe_irq_enable(adapter, true, true);
5616
5617         /*
5618          * If this adapter has a fan, check to see if we had a failure
5619          * before we enabled the interrupt.
5620          */
5621         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5622                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5623                 if (esdp & IXGBE_ESDP_SDP1)
5624                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5625         }
5626
5627         /* bring the link up in the watchdog, this could race with our first
5628          * link up interrupt but shouldn't be a problem */
5629         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5630         adapter->link_check_timeout = jiffies;
5631         mod_timer(&adapter->service_timer, jiffies);
5632
5633         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5634         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5635         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5636         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5637 }
5638
5639 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5640 {
5641         WARN_ON(in_interrupt());
5642         /* put off any impending NetWatchDogTimeout */
5643         netif_trans_update(adapter->netdev);
5644
5645         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5646                 usleep_range(1000, 2000);
5647         if (adapter->hw.phy.type == ixgbe_phy_fw)
5648                 ixgbe_watchdog_link_is_down(adapter);
5649         ixgbe_down(adapter);
5650         /*
5651          * If SR-IOV enabled then wait a bit before bringing the adapter
5652          * back up to give the VFs time to respond to the reset.  The
5653          * two second wait is based upon the watchdog timer cycle in
5654          * the VF driver.
5655          */
5656         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5657                 msleep(2000);
5658         ixgbe_up(adapter);
5659         clear_bit(__IXGBE_RESETTING, &adapter->state);
5660 }
5661
5662 void ixgbe_up(struct ixgbe_adapter *adapter)
5663 {
5664         /* hardware has been reset, we need to reload some things */
5665         ixgbe_configure(adapter);
5666
5667         ixgbe_up_complete(adapter);
5668 }
5669
5670 void ixgbe_reset(struct ixgbe_adapter *adapter)
5671 {
5672         struct ixgbe_hw *hw = &adapter->hw;
5673         struct net_device *netdev = adapter->netdev;
5674         int err;
5675
5676         if (ixgbe_removed(hw->hw_addr))
5677                 return;
5678         /* lock SFP init bit to prevent race conditions with the watchdog */
5679         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5680                 usleep_range(1000, 2000);
5681
5682         /* clear all SFP and link config related flags while holding SFP_INIT */
5683         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5684                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5685         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5686
5687         err = hw->mac.ops.init_hw(hw);
5688         switch (err) {
5689         case 0:
5690         case IXGBE_ERR_SFP_NOT_PRESENT:
5691         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5692                 break;
5693         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5694                 e_dev_err("master disable timed out\n");
5695                 break;
5696         case IXGBE_ERR_EEPROM_VERSION:
5697                 /* We are running on a pre-production device, log a warning */
5698                 e_dev_warn("This device is a pre-production adapter/LOM. "
5699                            "Please be aware there may be issues associated with "
5700                            "your hardware.  If you are experiencing problems "
5701                            "please contact your Intel or hardware "
5702                            "representative who provided you with this "
5703                            "hardware.\n");
5704                 break;
5705         default:
5706                 e_dev_err("Hardware Error: %d\n", err);
5707         }
5708
5709         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5710
5711         /* flush entries out of MAC table */
5712         ixgbe_flush_sw_mac_table(adapter);
5713         __dev_uc_unsync(netdev, NULL);
5714
5715         /* do not flush user set addresses */
5716         ixgbe_mac_set_default_filter(adapter);
5717
5718         /* update SAN MAC vmdq pool selection */
5719         if (hw->mac.san_mac_rar_index)
5720                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5721
5722         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5723                 ixgbe_ptp_reset(adapter);
5724
5725         if (hw->phy.ops.set_phy_power) {
5726                 if (!netif_running(adapter->netdev) && !adapter->wol)
5727                         hw->phy.ops.set_phy_power(hw, false);
5728                 else
5729                         hw->phy.ops.set_phy_power(hw, true);
5730         }
5731 }
5732
5733 /**
5734  * ixgbe_clean_tx_ring - Free Tx Buffers
5735  * @tx_ring: ring to be cleaned
5736  **/
5737 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5738 {
5739         u16 i = tx_ring->next_to_clean;
5740         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5741
5742         while (i != tx_ring->next_to_use) {
5743                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5744
5745                 /* Free all the Tx ring sk_buffs */
5746                 if (ring_is_xdp(tx_ring))
5747                         page_frag_free(tx_buffer->data);
5748                 else
5749                         dev_kfree_skb_any(tx_buffer->skb);
5750
5751                 /* unmap skb header data */
5752                 dma_unmap_single(tx_ring->dev,
5753                                  dma_unmap_addr(tx_buffer, dma),
5754                                  dma_unmap_len(tx_buffer, len),
5755                                  DMA_TO_DEVICE);
5756
5757                 /* check for eop_desc to determine the end of the packet */
5758                 eop_desc = tx_buffer->next_to_watch;
5759                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5760
5761                 /* unmap remaining buffers */
5762                 while (tx_desc != eop_desc) {
5763                         tx_buffer++;
5764                         tx_desc++;
5765                         i++;
5766                         if (unlikely(i == tx_ring->count)) {
5767                                 i = 0;
5768                                 tx_buffer = tx_ring->tx_buffer_info;
5769                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5770                         }
5771
5772                         /* unmap any remaining paged data */
5773                         if (dma_unmap_len(tx_buffer, len))
5774                                 dma_unmap_page(tx_ring->dev,
5775                                                dma_unmap_addr(tx_buffer, dma),
5776                                                dma_unmap_len(tx_buffer, len),
5777                                                DMA_TO_DEVICE);
5778                 }
5779
5780                 /* move us one more past the eop_desc for start of next pkt */
5781                 tx_buffer++;
5782                 i++;
5783                 if (unlikely(i == tx_ring->count)) {
5784                         i = 0;
5785                         tx_buffer = tx_ring->tx_buffer_info;
5786                 }
5787         }
5788
5789         /* reset BQL for queue */
5790         if (!ring_is_xdp(tx_ring))
5791                 netdev_tx_reset_queue(txring_txq(tx_ring));
5792
5793         /* reset next_to_use and next_to_clean */
5794         tx_ring->next_to_use = 0;
5795         tx_ring->next_to_clean = 0;
5796 }
5797
5798 /**
5799  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5800  * @adapter: board private structure
5801  **/
5802 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5803 {
5804         int i;
5805
5806         for (i = 0; i < adapter->num_rx_queues; i++)
5807                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5808 }
5809
5810 /**
5811  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5812  * @adapter: board private structure
5813  **/
5814 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5815 {
5816         int i;
5817
5818         for (i = 0; i < adapter->num_tx_queues; i++)
5819                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5820         for (i = 0; i < adapter->num_xdp_queues; i++)
5821                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
5822 }
5823
5824 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5825 {
5826         struct hlist_node *node2;
5827         struct ixgbe_fdir_filter *filter;
5828
5829         spin_lock(&adapter->fdir_perfect_lock);
5830
5831         hlist_for_each_entry_safe(filter, node2,
5832                                   &adapter->fdir_filter_list, fdir_node) {
5833                 hlist_del(&filter->fdir_node);
5834                 kfree(filter);
5835         }
5836         adapter->fdir_filter_count = 0;
5837
5838         spin_unlock(&adapter->fdir_perfect_lock);
5839 }
5840
5841 static int ixgbe_disable_macvlan(struct net_device *upper, void *data)
5842 {
5843         if (netif_is_macvlan(upper)) {
5844                 struct macvlan_dev *vlan = netdev_priv(upper);
5845
5846                 if (vlan->fwd_priv) {
5847                         netif_tx_stop_all_queues(upper);
5848                         netif_carrier_off(upper);
5849                         netif_tx_disable(upper);
5850                 }
5851         }
5852
5853         return 0;
5854 }
5855
5856 void ixgbe_down(struct ixgbe_adapter *adapter)
5857 {
5858         struct net_device *netdev = adapter->netdev;
5859         struct ixgbe_hw *hw = &adapter->hw;
5860         int i;
5861
5862         /* signal that we are down to the interrupt handler */
5863         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5864                 return; /* do nothing if already down */
5865
5866         /* disable receives */
5867         hw->mac.ops.disable_rx(hw);
5868
5869         /* disable all enabled rx queues */
5870         for (i = 0; i < adapter->num_rx_queues; i++)
5871                 /* this call also flushes the previous write */
5872                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5873
5874         usleep_range(10000, 20000);
5875
5876         /* synchronize_sched() needed for pending XDP buffers to drain */
5877         if (adapter->xdp_ring[0])
5878                 synchronize_sched();
5879         netif_tx_stop_all_queues(netdev);
5880
5881         /* call carrier off first to avoid false dev_watchdog timeouts */
5882         netif_carrier_off(netdev);
5883         netif_tx_disable(netdev);
5884
5885         /* disable any upper devices */
5886         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5887                                       ixgbe_disable_macvlan, NULL);
5888
5889         ixgbe_irq_disable(adapter);
5890
5891         ixgbe_napi_disable_all(adapter);
5892
5893         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5894         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5895         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5896
5897         del_timer_sync(&adapter->service_timer);
5898
5899         if (adapter->num_vfs) {
5900                 /* Clear EITR Select mapping */
5901                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5902
5903                 /* Mark all the VFs as inactive */
5904                 for (i = 0 ; i < adapter->num_vfs; i++)
5905                         adapter->vfinfo[i].clear_to_send = false;
5906
5907                 /* ping all the active vfs to let them know we are going down */
5908                 ixgbe_ping_all_vfs(adapter);
5909
5910                 /* Disable all VFTE/VFRE TX/RX */
5911                 ixgbe_disable_tx_rx(adapter);
5912         }
5913
5914         /* disable transmits in the hardware now that interrupts are off */
5915         for (i = 0; i < adapter->num_tx_queues; i++) {
5916                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5917                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5918         }
5919         for (i = 0; i < adapter->num_xdp_queues; i++) {
5920                 u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
5921
5922                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5923         }
5924
5925         /* Disable the Tx DMA engine on 82599 and later MAC */
5926         switch (hw->mac.type) {
5927         case ixgbe_mac_82599EB:
5928         case ixgbe_mac_X540:
5929         case ixgbe_mac_X550:
5930         case ixgbe_mac_X550EM_x:
5931         case ixgbe_mac_x550em_a:
5932                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5933                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5934                                  ~IXGBE_DMATXCTL_TE));
5935                 break;
5936         default:
5937                 break;
5938         }
5939
5940         if (!pci_channel_offline(adapter->pdev))
5941                 ixgbe_reset(adapter);
5942
5943         /* power down the optics for 82599 SFP+ fiber */
5944         if (hw->mac.ops.disable_tx_laser)
5945                 hw->mac.ops.disable_tx_laser(hw);
5946
5947         ixgbe_clean_all_tx_rings(adapter);
5948         ixgbe_clean_all_rx_rings(adapter);
5949 }
5950
5951 /**
5952  * ixgbe_eee_capable - helper function to determine EEE support on X550
5953  * @adapter: board private structure
5954  */
5955 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
5956 {
5957         struct ixgbe_hw *hw = &adapter->hw;
5958
5959         switch (hw->device_id) {
5960         case IXGBE_DEV_ID_X550EM_A_1G_T:
5961         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5962                 if (!hw->phy.eee_speeds_supported)
5963                         break;
5964                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
5965                 if (!hw->phy.eee_speeds_advertised)
5966                         break;
5967                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
5968                 break;
5969         default:
5970                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
5971                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
5972                 break;
5973         }
5974 }
5975
5976 /**
5977  * ixgbe_tx_timeout - Respond to a Tx Hang
5978  * @netdev: network interface device structure
5979  **/
5980 static void ixgbe_tx_timeout(struct net_device *netdev)
5981 {
5982         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5983
5984         /* Do the reset outside of interrupt context */
5985         ixgbe_tx_timeout_reset(adapter);
5986 }
5987
5988 #ifdef CONFIG_IXGBE_DCB
5989 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
5990 {
5991         struct ixgbe_hw *hw = &adapter->hw;
5992         struct tc_configuration *tc;
5993         int j;
5994
5995         switch (hw->mac.type) {
5996         case ixgbe_mac_82598EB:
5997         case ixgbe_mac_82599EB:
5998                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5999                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6000                 break;
6001         case ixgbe_mac_X540:
6002         case ixgbe_mac_X550:
6003                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6004                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6005                 break;
6006         case ixgbe_mac_X550EM_x:
6007         case ixgbe_mac_x550em_a:
6008         default:
6009                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6010                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6011                 break;
6012         }
6013
6014         /* Configure DCB traffic classes */
6015         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6016                 tc = &adapter->dcb_cfg.tc_config[j];
6017                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6018                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6019                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6020                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6021                 tc->dcb_pfc = pfc_disabled;
6022         }
6023
6024         /* Initialize default user to priority mapping, UPx->TC0 */
6025         tc = &adapter->dcb_cfg.tc_config[0];
6026         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6027         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6028
6029         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6030         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6031         adapter->dcb_cfg.pfc_mode_enable = false;
6032         adapter->dcb_set_bitmap = 0x00;
6033         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6034                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6035         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6036                sizeof(adapter->temp_dcb_cfg));
6037 }
6038 #endif
6039
6040 /**
6041  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6042  * @adapter: board private structure to initialize
6043  *
6044  * ixgbe_sw_init initializes the Adapter private data structure.
6045  * Fields are initialized based on PCI device information and
6046  * OS network device settings (MTU size).
6047  **/
6048 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6049                          const struct ixgbe_info *ii)
6050 {
6051         struct ixgbe_hw *hw = &adapter->hw;
6052         struct pci_dev *pdev = adapter->pdev;
6053         unsigned int rss, fdir;
6054         u32 fwsm;
6055         int i;
6056
6057         /* PCI config space info */
6058
6059         hw->vendor_id = pdev->vendor;
6060         hw->device_id = pdev->device;
6061         hw->revision_id = pdev->revision;
6062         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6063         hw->subsystem_device_id = pdev->subsystem_device;
6064
6065         /* get_invariants needs the device IDs */
6066         ii->get_invariants(hw);
6067
6068         /* Set common capability flags and settings */
6069         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6070         adapter->ring_feature[RING_F_RSS].limit = rss;
6071         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6072         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6073         adapter->atr_sample_rate = 20;
6074         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6075         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6076         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6077 #ifdef CONFIG_IXGBE_DCA
6078         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6079 #endif
6080 #ifdef CONFIG_IXGBE_DCB
6081         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6082         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6083 #endif
6084 #ifdef IXGBE_FCOE
6085         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6086         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6087 #ifdef CONFIG_IXGBE_DCB
6088         /* Default traffic class to use for FCoE */
6089         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6090 #endif /* CONFIG_IXGBE_DCB */
6091 #endif /* IXGBE_FCOE */
6092
6093         /* initialize static ixgbe jump table entries */
6094         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6095                                           GFP_KERNEL);
6096         if (!adapter->jump_tables[0])
6097                 return -ENOMEM;
6098         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6099
6100         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6101                 adapter->jump_tables[i] = NULL;
6102
6103         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
6104                                      hw->mac.num_rar_entries,
6105                                      GFP_ATOMIC);
6106         if (!adapter->mac_table)
6107                 return -ENOMEM;
6108
6109         if (ixgbe_init_rss_key(adapter))
6110                 return -ENOMEM;
6111
6112         /* Set MAC specific capability flags and exceptions */
6113         switch (hw->mac.type) {
6114         case ixgbe_mac_82598EB:
6115                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6116
6117                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6118                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6119
6120                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6121                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6122                 adapter->atr_sample_rate = 0;
6123                 adapter->fdir_pballoc = 0;
6124 #ifdef IXGBE_FCOE
6125                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6126                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6127 #ifdef CONFIG_IXGBE_DCB
6128                 adapter->fcoe.up = 0;
6129 #endif /* IXGBE_DCB */
6130 #endif /* IXGBE_FCOE */
6131                 break;
6132         case ixgbe_mac_82599EB:
6133                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6134                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6135                 break;
6136         case ixgbe_mac_X540:
6137                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6138                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6139                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6140                 break;
6141         case ixgbe_mac_x550em_a:
6142                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6143                 switch (hw->device_id) {
6144                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6145                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6146                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6147                         break;
6148                 default:
6149                         break;
6150                 }
6151         /* fall through */
6152         case ixgbe_mac_X550EM_x:
6153 #ifdef CONFIG_IXGBE_DCB
6154                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6155 #endif
6156 #ifdef IXGBE_FCOE
6157                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6158 #ifdef CONFIG_IXGBE_DCB
6159                 adapter->fcoe.up = 0;
6160 #endif /* IXGBE_DCB */
6161 #endif /* IXGBE_FCOE */
6162         /* Fall Through */
6163         case ixgbe_mac_X550:
6164                 if (hw->mac.type == ixgbe_mac_X550)
6165                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6166 #ifdef CONFIG_IXGBE_DCA
6167                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6168 #endif
6169                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6170                 break;
6171         default:
6172                 break;
6173         }
6174
6175 #ifdef IXGBE_FCOE
6176         /* FCoE support exists, always init the FCoE lock */
6177         spin_lock_init(&adapter->fcoe.lock);
6178
6179 #endif
6180         /* n-tuple support exists, always init our spinlock */
6181         spin_lock_init(&adapter->fdir_perfect_lock);
6182
6183 #ifdef CONFIG_IXGBE_DCB
6184         ixgbe_init_dcb(adapter);
6185 #endif
6186
6187         /* default flow control settings */
6188         hw->fc.requested_mode = ixgbe_fc_full;
6189         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6190         ixgbe_pbthresh_setup(adapter);
6191         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6192         hw->fc.send_xon = true;
6193         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6194
6195 #ifdef CONFIG_PCI_IOV
6196         if (max_vfs > 0)
6197                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6198
6199         /* assign number of SR-IOV VFs */
6200         if (hw->mac.type != ixgbe_mac_82598EB) {
6201                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6202                         max_vfs = 0;
6203                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6204                 }
6205         }
6206 #endif /* CONFIG_PCI_IOV */
6207
6208         /* enable itr by default in dynamic mode */
6209         adapter->rx_itr_setting = 1;
6210         adapter->tx_itr_setting = 1;
6211
6212         /* set default ring sizes */
6213         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6214         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6215
6216         /* set default work limits */
6217         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6218
6219         /* initialize eeprom parameters */
6220         if (ixgbe_init_eeprom_params_generic(hw)) {
6221                 e_dev_err("EEPROM initialization failed\n");
6222                 return -EIO;
6223         }
6224
6225         /* PF holds first pool slot */
6226         set_bit(0, &adapter->fwd_bitmask);
6227         set_bit(__IXGBE_DOWN, &adapter->state);
6228
6229         return 0;
6230 }
6231
6232 /**
6233  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6234  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6235  *
6236  * Return 0 on success, negative on failure
6237  **/
6238 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6239 {
6240         struct device *dev = tx_ring->dev;
6241         int orig_node = dev_to_node(dev);
6242         int ring_node = -1;
6243         int size;
6244
6245         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6246
6247         if (tx_ring->q_vector)
6248                 ring_node = tx_ring->q_vector->numa_node;
6249
6250         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6251         if (!tx_ring->tx_buffer_info)
6252                 tx_ring->tx_buffer_info = vmalloc(size);
6253         if (!tx_ring->tx_buffer_info)
6254                 goto err;
6255
6256         /* round up to nearest 4K */
6257         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6258         tx_ring->size = ALIGN(tx_ring->size, 4096);
6259
6260         set_dev_node(dev, ring_node);
6261         tx_ring->desc = dma_alloc_coherent(dev,
6262                                            tx_ring->size,
6263                                            &tx_ring->dma,
6264                                            GFP_KERNEL);
6265         set_dev_node(dev, orig_node);
6266         if (!tx_ring->desc)
6267                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6268                                                    &tx_ring->dma, GFP_KERNEL);
6269         if (!tx_ring->desc)
6270                 goto err;
6271
6272         tx_ring->next_to_use = 0;
6273         tx_ring->next_to_clean = 0;
6274         return 0;
6275
6276 err:
6277         vfree(tx_ring->tx_buffer_info);
6278         tx_ring->tx_buffer_info = NULL;
6279         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6280         return -ENOMEM;
6281 }
6282
6283 /**
6284  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6285  * @adapter: board private structure
6286  *
6287  * If this function returns with an error, then it's possible one or
6288  * more of the rings is populated (while the rest are not).  It is the
6289  * callers duty to clean those orphaned rings.
6290  *
6291  * Return 0 on success, negative on failure
6292  **/
6293 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6294 {
6295         int i, j = 0, err = 0;
6296
6297         for (i = 0; i < adapter->num_tx_queues; i++) {
6298                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6299                 if (!err)
6300                         continue;
6301
6302                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6303                 goto err_setup_tx;
6304         }
6305         for (j = 0; j < adapter->num_xdp_queues; j++) {
6306                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6307                 if (!err)
6308                         continue;
6309
6310                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6311                 goto err_setup_tx;
6312         }
6313
6314         return 0;
6315 err_setup_tx:
6316         /* rewind the index freeing the rings as we go */
6317         while (j--)
6318                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6319         while (i--)
6320                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6321         return err;
6322 }
6323
6324 /**
6325  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6326  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6327  *
6328  * Returns 0 on success, negative on failure
6329  **/
6330 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6331                              struct ixgbe_ring *rx_ring)
6332 {
6333         struct device *dev = rx_ring->dev;
6334         int orig_node = dev_to_node(dev);
6335         int ring_node = -1;
6336         int size;
6337
6338         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6339
6340         if (rx_ring->q_vector)
6341                 ring_node = rx_ring->q_vector->numa_node;
6342
6343         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6344         if (!rx_ring->rx_buffer_info)
6345                 rx_ring->rx_buffer_info = vmalloc(size);
6346         if (!rx_ring->rx_buffer_info)
6347                 goto err;
6348
6349         /* Round up to nearest 4K */
6350         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6351         rx_ring->size = ALIGN(rx_ring->size, 4096);
6352
6353         set_dev_node(dev, ring_node);
6354         rx_ring->desc = dma_alloc_coherent(dev,
6355                                            rx_ring->size,
6356                                            &rx_ring->dma,
6357                                            GFP_KERNEL);
6358         set_dev_node(dev, orig_node);
6359         if (!rx_ring->desc)
6360                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6361                                                    &rx_ring->dma, GFP_KERNEL);
6362         if (!rx_ring->desc)
6363                 goto err;
6364
6365         rx_ring->next_to_clean = 0;
6366         rx_ring->next_to_use = 0;
6367
6368         rx_ring->xdp_prog = adapter->xdp_prog;
6369
6370         return 0;
6371 err:
6372         vfree(rx_ring->rx_buffer_info);
6373         rx_ring->rx_buffer_info = NULL;
6374         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6375         return -ENOMEM;
6376 }
6377
6378 /**
6379  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6380  * @adapter: board private structure
6381  *
6382  * If this function returns with an error, then it's possible one or
6383  * more of the rings is populated (while the rest are not).  It is the
6384  * callers duty to clean those orphaned rings.
6385  *
6386  * Return 0 on success, negative on failure
6387  **/
6388 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6389 {
6390         int i, err = 0;
6391
6392         for (i = 0; i < adapter->num_rx_queues; i++) {
6393                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6394                 if (!err)
6395                         continue;
6396
6397                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6398                 goto err_setup_rx;
6399         }
6400
6401 #ifdef IXGBE_FCOE
6402         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6403         if (!err)
6404 #endif
6405                 return 0;
6406 err_setup_rx:
6407         /* rewind the index freeing the rings as we go */
6408         while (i--)
6409                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6410         return err;
6411 }
6412
6413 /**
6414  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6415  * @tx_ring: Tx descriptor ring for a specific queue
6416  *
6417  * Free all transmit software resources
6418  **/
6419 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6420 {
6421         ixgbe_clean_tx_ring(tx_ring);
6422
6423         vfree(tx_ring->tx_buffer_info);
6424         tx_ring->tx_buffer_info = NULL;
6425
6426         /* if not set, then don't free */
6427         if (!tx_ring->desc)
6428                 return;
6429
6430         dma_free_coherent(tx_ring->dev, tx_ring->size,
6431                           tx_ring->desc, tx_ring->dma);
6432
6433         tx_ring->desc = NULL;
6434 }
6435
6436 /**
6437  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6438  * @adapter: board private structure
6439  *
6440  * Free all transmit software resources
6441  **/
6442 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6443 {
6444         int i;
6445
6446         for (i = 0; i < adapter->num_tx_queues; i++)
6447                 if (adapter->tx_ring[i]->desc)
6448                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6449         for (i = 0; i < adapter->num_xdp_queues; i++)
6450                 if (adapter->xdp_ring[i]->desc)
6451                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6452 }
6453
6454 /**
6455  * ixgbe_free_rx_resources - Free Rx Resources
6456  * @rx_ring: ring to clean the resources from
6457  *
6458  * Free all receive software resources
6459  **/
6460 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6461 {
6462         ixgbe_clean_rx_ring(rx_ring);
6463
6464         rx_ring->xdp_prog = NULL;
6465         vfree(rx_ring->rx_buffer_info);
6466         rx_ring->rx_buffer_info = NULL;
6467
6468         /* if not set, then don't free */
6469         if (!rx_ring->desc)
6470                 return;
6471
6472         dma_free_coherent(rx_ring->dev, rx_ring->size,
6473                           rx_ring->desc, rx_ring->dma);
6474
6475         rx_ring->desc = NULL;
6476 }
6477
6478 /**
6479  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6480  * @adapter: board private structure
6481  *
6482  * Free all receive software resources
6483  **/
6484 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6485 {
6486         int i;
6487
6488 #ifdef IXGBE_FCOE
6489         ixgbe_free_fcoe_ddp_resources(adapter);
6490
6491 #endif
6492         for (i = 0; i < adapter->num_rx_queues; i++)
6493                 if (adapter->rx_ring[i]->desc)
6494                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6495 }
6496
6497 /**
6498  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6499  * @netdev: network interface device structure
6500  * @new_mtu: new value for maximum frame size
6501  *
6502  * Returns 0 on success, negative on failure
6503  **/
6504 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6505 {
6506         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6507
6508         /*
6509          * For 82599EB we cannot allow legacy VFs to enable their receive
6510          * paths when MTU greater than 1500 is configured.  So display a
6511          * warning that legacy VFs will be disabled.
6512          */
6513         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6514             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6515             (new_mtu > ETH_DATA_LEN))
6516                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6517
6518         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6519
6520         /* must set new MTU before calling down or up */
6521         netdev->mtu = new_mtu;
6522
6523         if (netif_running(netdev))
6524                 ixgbe_reinit_locked(adapter);
6525
6526         return 0;
6527 }
6528
6529 /**
6530  * ixgbe_open - Called when a network interface is made active
6531  * @netdev: network interface device structure
6532  *
6533  * Returns 0 on success, negative value on failure
6534  *
6535  * The open entry point is called when a network interface is made
6536  * active by the system (IFF_UP).  At this point all resources needed
6537  * for transmit and receive operations are allocated, the interrupt
6538  * handler is registered with the OS, the watchdog timer is started,
6539  * and the stack is notified that the interface is ready.
6540  **/
6541 int ixgbe_open(struct net_device *netdev)
6542 {
6543         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6544         struct ixgbe_hw *hw = &adapter->hw;
6545         int err, queues;
6546
6547         /* disallow open during test */
6548         if (test_bit(__IXGBE_TESTING, &adapter->state))
6549                 return -EBUSY;
6550
6551         netif_carrier_off(netdev);
6552
6553         /* allocate transmit descriptors */
6554         err = ixgbe_setup_all_tx_resources(adapter);
6555         if (err)
6556                 goto err_setup_tx;
6557
6558         /* allocate receive descriptors */
6559         err = ixgbe_setup_all_rx_resources(adapter);
6560         if (err)
6561                 goto err_setup_rx;
6562
6563         ixgbe_configure(adapter);
6564
6565         err = ixgbe_request_irq(adapter);
6566         if (err)
6567                 goto err_req_irq;
6568
6569         /* Notify the stack of the actual queue counts. */
6570         if (adapter->num_rx_pools > 1)
6571                 queues = adapter->num_rx_queues_per_pool;
6572         else
6573                 queues = adapter->num_tx_queues;
6574
6575         err = netif_set_real_num_tx_queues(netdev, queues);
6576         if (err)
6577                 goto err_set_queues;
6578
6579         if (adapter->num_rx_pools > 1 &&
6580             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6581                 queues = IXGBE_MAX_L2A_QUEUES;
6582         else
6583                 queues = adapter->num_rx_queues;
6584         err = netif_set_real_num_rx_queues(netdev, queues);
6585         if (err)
6586                 goto err_set_queues;
6587
6588         ixgbe_ptp_init(adapter);
6589
6590         ixgbe_up_complete(adapter);
6591
6592         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6593         udp_tunnel_get_rx_info(netdev);
6594
6595         return 0;
6596
6597 err_set_queues:
6598         ixgbe_free_irq(adapter);
6599 err_req_irq:
6600         ixgbe_free_all_rx_resources(adapter);
6601         if (hw->phy.ops.set_phy_power && !adapter->wol)
6602                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6603 err_setup_rx:
6604         ixgbe_free_all_tx_resources(adapter);
6605 err_setup_tx:
6606         ixgbe_reset(adapter);
6607
6608         return err;
6609 }
6610
6611 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6612 {
6613         ixgbe_ptp_suspend(adapter);
6614
6615         if (adapter->hw.phy.ops.enter_lplu) {
6616                 adapter->hw.phy.reset_disable = true;
6617                 ixgbe_down(adapter);
6618                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6619                 adapter->hw.phy.reset_disable = false;
6620         } else {
6621                 ixgbe_down(adapter);
6622         }
6623
6624         ixgbe_free_irq(adapter);
6625
6626         ixgbe_free_all_tx_resources(adapter);
6627         ixgbe_free_all_rx_resources(adapter);
6628 }
6629
6630 /**
6631  * ixgbe_close - Disables a network interface
6632  * @netdev: network interface device structure
6633  *
6634  * Returns 0, this is not allowed to fail
6635  *
6636  * The close entry point is called when an interface is de-activated
6637  * by the OS.  The hardware is still under the drivers control, but
6638  * needs to be disabled.  A global MAC reset is issued to stop the
6639  * hardware, and all transmit and receive resources are freed.
6640  **/
6641 int ixgbe_close(struct net_device *netdev)
6642 {
6643         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6644
6645         ixgbe_ptp_stop(adapter);
6646
6647         if (netif_device_present(netdev))
6648                 ixgbe_close_suspend(adapter);
6649
6650         ixgbe_fdir_filter_exit(adapter);
6651
6652         ixgbe_release_hw_control(adapter);
6653
6654         return 0;
6655 }
6656
6657 #ifdef CONFIG_PM
6658 static int ixgbe_resume(struct pci_dev *pdev)
6659 {
6660         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6661         struct net_device *netdev = adapter->netdev;
6662         u32 err;
6663
6664         adapter->hw.hw_addr = adapter->io_addr;
6665         pci_set_power_state(pdev, PCI_D0);
6666         pci_restore_state(pdev);
6667         /*
6668          * pci_restore_state clears dev->state_saved so call
6669          * pci_save_state to restore it.
6670          */
6671         pci_save_state(pdev);
6672
6673         err = pci_enable_device_mem(pdev);
6674         if (err) {
6675                 e_dev_err("Cannot enable PCI device from suspend\n");
6676                 return err;
6677         }
6678         smp_mb__before_atomic();
6679         clear_bit(__IXGBE_DISABLED, &adapter->state);
6680         pci_set_master(pdev);
6681
6682         pci_wake_from_d3(pdev, false);
6683
6684         ixgbe_reset(adapter);
6685
6686         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6687
6688         rtnl_lock();
6689         err = ixgbe_init_interrupt_scheme(adapter);
6690         if (!err && netif_running(netdev))
6691                 err = ixgbe_open(netdev);
6692
6693
6694         if (!err)
6695                 netif_device_attach(netdev);
6696         rtnl_unlock();
6697
6698         return err;
6699 }
6700 #endif /* CONFIG_PM */
6701
6702 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6703 {
6704         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6705         struct net_device *netdev = adapter->netdev;
6706         struct ixgbe_hw *hw = &adapter->hw;
6707         u32 ctrl, fctrl;
6708         u32 wufc = adapter->wol;
6709 #ifdef CONFIG_PM
6710         int retval = 0;
6711 #endif
6712
6713         rtnl_lock();
6714         netif_device_detach(netdev);
6715
6716         if (netif_running(netdev))
6717                 ixgbe_close_suspend(adapter);
6718
6719         ixgbe_clear_interrupt_scheme(adapter);
6720         rtnl_unlock();
6721
6722 #ifdef CONFIG_PM
6723         retval = pci_save_state(pdev);
6724         if (retval)
6725                 return retval;
6726
6727 #endif
6728         if (hw->mac.ops.stop_link_on_d3)
6729                 hw->mac.ops.stop_link_on_d3(hw);
6730
6731         if (wufc) {
6732                 ixgbe_set_rx_mode(netdev);
6733
6734                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6735                 if (hw->mac.ops.enable_tx_laser)
6736                         hw->mac.ops.enable_tx_laser(hw);
6737
6738                 /* turn on all-multi mode if wake on multicast is enabled */
6739                 if (wufc & IXGBE_WUFC_MC) {
6740                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6741                         fctrl |= IXGBE_FCTRL_MPE;
6742                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6743                 }
6744
6745                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6746                 ctrl |= IXGBE_CTRL_GIO_DIS;
6747                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6748
6749                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6750         } else {
6751                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6752                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6753         }
6754
6755         switch (hw->mac.type) {
6756         case ixgbe_mac_82598EB:
6757                 pci_wake_from_d3(pdev, false);
6758                 break;
6759         case ixgbe_mac_82599EB:
6760         case ixgbe_mac_X540:
6761         case ixgbe_mac_X550:
6762         case ixgbe_mac_X550EM_x:
6763         case ixgbe_mac_x550em_a:
6764                 pci_wake_from_d3(pdev, !!wufc);
6765                 break;
6766         default:
6767                 break;
6768         }
6769
6770         *enable_wake = !!wufc;
6771         if (hw->phy.ops.set_phy_power && !*enable_wake)
6772                 hw->phy.ops.set_phy_power(hw, false);
6773
6774         ixgbe_release_hw_control(adapter);
6775
6776         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6777                 pci_disable_device(pdev);
6778
6779         return 0;
6780 }
6781
6782 #ifdef CONFIG_PM
6783 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6784 {
6785         int retval;
6786         bool wake;
6787
6788         retval = __ixgbe_shutdown(pdev, &wake);
6789         if (retval)
6790                 return retval;
6791
6792         if (wake) {
6793                 pci_prepare_to_sleep(pdev);
6794         } else {
6795                 pci_wake_from_d3(pdev, false);
6796                 pci_set_power_state(pdev, PCI_D3hot);
6797         }
6798
6799         return 0;
6800 }
6801 #endif /* CONFIG_PM */
6802
6803 static void ixgbe_shutdown(struct pci_dev *pdev)
6804 {
6805         bool wake;
6806
6807         __ixgbe_shutdown(pdev, &wake);
6808
6809         if (system_state == SYSTEM_POWER_OFF) {
6810                 pci_wake_from_d3(pdev, wake);
6811                 pci_set_power_state(pdev, PCI_D3hot);
6812         }
6813 }
6814
6815 /**
6816  * ixgbe_update_stats - Update the board statistics counters.
6817  * @adapter: board private structure
6818  **/
6819 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6820 {
6821         struct net_device *netdev = adapter->netdev;
6822         struct ixgbe_hw *hw = &adapter->hw;
6823         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6824         u64 total_mpc = 0;
6825         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6826         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6827         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6828         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6829
6830         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6831             test_bit(__IXGBE_RESETTING, &adapter->state))
6832                 return;
6833
6834         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6835                 u64 rsc_count = 0;
6836                 u64 rsc_flush = 0;
6837                 for (i = 0; i < adapter->num_rx_queues; i++) {
6838                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6839                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6840                 }
6841                 adapter->rsc_total_count = rsc_count;
6842                 adapter->rsc_total_flush = rsc_flush;
6843         }
6844
6845         for (i = 0; i < adapter->num_rx_queues; i++) {
6846                 struct ixgbe_ring *rx_ring = READ_ONCE(adapter->rx_ring[i]);
6847
6848                 if (!rx_ring)
6849                         continue;
6850                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6851                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6852                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6853                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6854                 bytes += rx_ring->stats.bytes;
6855                 packets += rx_ring->stats.packets;
6856         }
6857         adapter->non_eop_descs = non_eop_descs;
6858         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6859         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6860         adapter->hw_csum_rx_error = hw_csum_rx_error;
6861         netdev->stats.rx_bytes = bytes;
6862         netdev->stats.rx_packets = packets;
6863
6864         bytes = 0;
6865         packets = 0;
6866         /* gather some stats to the adapter struct that are per queue */
6867         for (i = 0; i < adapter->num_tx_queues; i++) {
6868                 struct ixgbe_ring *tx_ring = READ_ONCE(adapter->tx_ring[i]);
6869
6870                 if (!tx_ring)
6871                         continue;
6872                 restart_queue += tx_ring->tx_stats.restart_queue;
6873                 tx_busy += tx_ring->tx_stats.tx_busy;
6874                 bytes += tx_ring->stats.bytes;
6875                 packets += tx_ring->stats.packets;
6876         }
6877         for (i = 0; i < adapter->num_xdp_queues; i++) {
6878                 struct ixgbe_ring *xdp_ring = READ_ONCE(adapter->xdp_ring[i]);
6879
6880                 if (!xdp_ring)
6881                         continue;
6882                 restart_queue += xdp_ring->tx_stats.restart_queue;
6883                 tx_busy += xdp_ring->tx_stats.tx_busy;
6884                 bytes += xdp_ring->stats.bytes;
6885                 packets += xdp_ring->stats.packets;
6886         }
6887         adapter->restart_queue = restart_queue;
6888         adapter->tx_busy = tx_busy;
6889         netdev->stats.tx_bytes = bytes;
6890         netdev->stats.tx_packets = packets;
6891
6892         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6893
6894         /* 8 register reads */
6895         for (i = 0; i < 8; i++) {
6896                 /* for packet buffers not used, the register should read 0 */
6897                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6898                 missed_rx += mpc;
6899                 hwstats->mpc[i] += mpc;
6900                 total_mpc += hwstats->mpc[i];
6901                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6902                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6903                 switch (hw->mac.type) {
6904                 case ixgbe_mac_82598EB:
6905                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6906                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6907                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6908                         hwstats->pxonrxc[i] +=
6909                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6910                         break;
6911                 case ixgbe_mac_82599EB:
6912                 case ixgbe_mac_X540:
6913                 case ixgbe_mac_X550:
6914                 case ixgbe_mac_X550EM_x:
6915                 case ixgbe_mac_x550em_a:
6916                         hwstats->pxonrxc[i] +=
6917                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6918                         break;
6919                 default:
6920                         break;
6921                 }
6922         }
6923
6924         /*16 register reads */
6925         for (i = 0; i < 16; i++) {
6926                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6927                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6928                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6929                     (hw->mac.type == ixgbe_mac_X540) ||
6930                     (hw->mac.type == ixgbe_mac_X550) ||
6931                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
6932                     (hw->mac.type == ixgbe_mac_x550em_a)) {
6933                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6934                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6935                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6936                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6937                 }
6938         }
6939
6940         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6941         /* work around hardware counting issue */
6942         hwstats->gprc -= missed_rx;
6943
6944         ixgbe_update_xoff_received(adapter);
6945
6946         /* 82598 hardware only has a 32 bit counter in the high register */
6947         switch (hw->mac.type) {
6948         case ixgbe_mac_82598EB:
6949                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6950                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6951                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6952                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6953                 break;
6954         case ixgbe_mac_X540:
6955         case ixgbe_mac_X550:
6956         case ixgbe_mac_X550EM_x:
6957         case ixgbe_mac_x550em_a:
6958                 /* OS2BMC stats are X540 and later */
6959                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6960                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6961                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6962                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6963                 /* fall through */
6964         case ixgbe_mac_82599EB:
6965                 for (i = 0; i < 16; i++)
6966                         adapter->hw_rx_no_dma_resources +=
6967                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6968                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6969                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6970                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6971                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6972                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6973                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6974                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6975                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6976                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6977 #ifdef IXGBE_FCOE
6978                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6979                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6980                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6981                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6982                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6983                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6984                 /* Add up per cpu counters for total ddp aloc fail */
6985                 if (adapter->fcoe.ddp_pool) {
6986                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6987                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6988                         unsigned int cpu;
6989                         u64 noddp = 0, noddp_ext_buff = 0;
6990                         for_each_possible_cpu(cpu) {
6991                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6992                                 noddp += ddp_pool->noddp;
6993                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6994                         }
6995                         hwstats->fcoe_noddp = noddp;
6996                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6997                 }
6998 #endif /* IXGBE_FCOE */
6999                 break;
7000         default:
7001                 break;
7002         }
7003         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7004         hwstats->bprc += bprc;
7005         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7006         if (hw->mac.type == ixgbe_mac_82598EB)
7007                 hwstats->mprc -= bprc;
7008         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7009         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7010         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7011         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7012         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7013         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7014         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7015         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7016         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7017         hwstats->lxontxc += lxon;
7018         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7019         hwstats->lxofftxc += lxoff;
7020         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7021         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7022         /*
7023          * 82598 errata - tx of flow control packets is included in tx counters
7024          */
7025         xon_off_tot = lxon + lxoff;
7026         hwstats->gptc -= xon_off_tot;
7027         hwstats->mptc -= xon_off_tot;
7028         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7029         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7030         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7031         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7032         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7033         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7034         hwstats->ptc64 -= xon_off_tot;
7035         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7036         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7037         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7038         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7039         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7040         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7041
7042         /* Fill out the OS statistics structure */
7043         netdev->stats.multicast = hwstats->mprc;
7044
7045         /* Rx Errors */
7046         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7047         netdev->stats.rx_dropped = 0;
7048         netdev->stats.rx_length_errors = hwstats->rlec;
7049         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7050         netdev->stats.rx_missed_errors = total_mpc;
7051 }
7052
7053 /**
7054  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7055  * @adapter: pointer to the device adapter structure
7056  **/
7057 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7058 {
7059         struct ixgbe_hw *hw = &adapter->hw;
7060         int i;
7061
7062         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7063                 return;
7064
7065         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7066
7067         /* if interface is down do nothing */
7068         if (test_bit(__IXGBE_DOWN, &adapter->state))
7069                 return;
7070
7071         /* do nothing if we are not using signature filters */
7072         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7073                 return;
7074
7075         adapter->fdir_overflow++;
7076
7077         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7078                 for (i = 0; i < adapter->num_tx_queues; i++)
7079                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7080                                 &(adapter->tx_ring[i]->state));
7081                 for (i = 0; i < adapter->num_xdp_queues; i++)
7082                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7083                                 &adapter->xdp_ring[i]->state);
7084                 /* re-enable flow director interrupts */
7085                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7086         } else {
7087                 e_err(probe, "failed to finish FDIR re-initialization, "
7088                       "ignored adding FDIR ATR filters\n");
7089         }
7090 }
7091
7092 /**
7093  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7094  * @adapter: pointer to the device adapter structure
7095  *
7096  * This function serves two purposes.  First it strobes the interrupt lines
7097  * in order to make certain interrupts are occurring.  Secondly it sets the
7098  * bits needed to check for TX hangs.  As a result we should immediately
7099  * determine if a hang has occurred.
7100  */
7101 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7102 {
7103         struct ixgbe_hw *hw = &adapter->hw;
7104         u64 eics = 0;
7105         int i;
7106
7107         /* If we're down, removing or resetting, just bail */
7108         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7109             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7110             test_bit(__IXGBE_RESETTING, &adapter->state))
7111                 return;
7112
7113         /* Force detection of hung controller */
7114         if (netif_carrier_ok(adapter->netdev)) {
7115                 for (i = 0; i < adapter->num_tx_queues; i++)
7116                         set_check_for_tx_hang(adapter->tx_ring[i]);
7117                 for (i = 0; i < adapter->num_xdp_queues; i++)
7118                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7119         }
7120
7121         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7122                 /*
7123                  * for legacy and MSI interrupts don't set any bits
7124                  * that are enabled for EIAM, because this operation
7125                  * would set *both* EIMS and EICS for any bit in EIAM
7126                  */
7127                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7128                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7129         } else {
7130                 /* get one bit for every active tx/rx interrupt vector */
7131                 for (i = 0; i < adapter->num_q_vectors; i++) {
7132                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7133                         if (qv->rx.ring || qv->tx.ring)
7134                                 eics |= BIT_ULL(i);
7135                 }
7136         }
7137
7138         /* Cause software interrupt to ensure rings are cleaned */
7139         ixgbe_irq_rearm_queues(adapter, eics);
7140 }
7141
7142 /**
7143  * ixgbe_watchdog_update_link - update the link status
7144  * @adapter: pointer to the device adapter structure
7145  * @link_speed: pointer to a u32 to store the link_speed
7146  **/
7147 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7148 {
7149         struct ixgbe_hw *hw = &adapter->hw;
7150         u32 link_speed = adapter->link_speed;
7151         bool link_up = adapter->link_up;
7152         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7153
7154         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7155                 return;
7156
7157         if (hw->mac.ops.check_link) {
7158                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7159         } else {
7160                 /* always assume link is up, if no check link function */
7161                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7162                 link_up = true;
7163         }
7164
7165         if (adapter->ixgbe_ieee_pfc)
7166                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7167
7168         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7169                 hw->mac.ops.fc_enable(hw);
7170                 ixgbe_set_rx_drop_en(adapter);
7171         }
7172
7173         if (link_up ||
7174             time_after(jiffies, (adapter->link_check_timeout +
7175                                  IXGBE_TRY_LINK_TIMEOUT))) {
7176                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7177                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7178                 IXGBE_WRITE_FLUSH(hw);
7179         }
7180
7181         adapter->link_up = link_up;
7182         adapter->link_speed = link_speed;
7183 }
7184
7185 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7186 {
7187 #ifdef CONFIG_IXGBE_DCB
7188         struct net_device *netdev = adapter->netdev;
7189         struct dcb_app app = {
7190                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7191                               .protocol = 0,
7192                              };
7193         u8 up = 0;
7194
7195         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7196                 up = dcb_ieee_getapp_mask(netdev, &app);
7197
7198         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7199 #endif
7200 }
7201
7202 static int ixgbe_enable_macvlan(struct net_device *upper, void *data)
7203 {
7204         if (netif_is_macvlan(upper)) {
7205                 struct macvlan_dev *vlan = netdev_priv(upper);
7206
7207                 if (vlan->fwd_priv)
7208                         netif_tx_wake_all_queues(upper);
7209         }
7210
7211         return 0;
7212 }
7213
7214 /**
7215  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7216  *                             print link up message
7217  * @adapter: pointer to the device adapter structure
7218  **/
7219 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7220 {
7221         struct net_device *netdev = adapter->netdev;
7222         struct ixgbe_hw *hw = &adapter->hw;
7223         u32 link_speed = adapter->link_speed;
7224         const char *speed_str;
7225         bool flow_rx, flow_tx;
7226
7227         /* only continue if link was previously down */
7228         if (netif_carrier_ok(netdev))
7229                 return;
7230
7231         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7232
7233         switch (hw->mac.type) {
7234         case ixgbe_mac_82598EB: {
7235                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7236                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7237                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7238                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7239         }
7240                 break;
7241         case ixgbe_mac_X540:
7242         case ixgbe_mac_X550:
7243         case ixgbe_mac_X550EM_x:
7244         case ixgbe_mac_x550em_a:
7245         case ixgbe_mac_82599EB: {
7246                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7247                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7248                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7249                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7250         }
7251                 break;
7252         default:
7253                 flow_tx = false;
7254                 flow_rx = false;
7255                 break;
7256         }
7257
7258         adapter->last_rx_ptp_check = jiffies;
7259
7260         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7261                 ixgbe_ptp_start_cyclecounter(adapter);
7262
7263         switch (link_speed) {
7264         case IXGBE_LINK_SPEED_10GB_FULL:
7265                 speed_str = "10 Gbps";
7266                 break;
7267         case IXGBE_LINK_SPEED_2_5GB_FULL:
7268                 speed_str = "2.5 Gbps";
7269                 break;
7270         case IXGBE_LINK_SPEED_1GB_FULL:
7271                 speed_str = "1 Gbps";
7272                 break;
7273         case IXGBE_LINK_SPEED_100_FULL:
7274                 speed_str = "100 Mbps";
7275                 break;
7276         case IXGBE_LINK_SPEED_10_FULL:
7277                 speed_str = "10 Mbps";
7278                 break;
7279         default:
7280                 speed_str = "unknown speed";
7281                 break;
7282         }
7283         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7284                ((flow_rx && flow_tx) ? "RX/TX" :
7285                (flow_rx ? "RX" :
7286                (flow_tx ? "TX" : "None"))));
7287
7288         netif_carrier_on(netdev);
7289         ixgbe_check_vf_rate_limit(adapter);
7290
7291         /* enable transmits */
7292         netif_tx_wake_all_queues(adapter->netdev);
7293
7294         /* enable any upper devices */
7295         rtnl_lock();
7296         netdev_walk_all_upper_dev_rcu(adapter->netdev,
7297                                       ixgbe_enable_macvlan, NULL);
7298         rtnl_unlock();
7299
7300         /* update the default user priority for VFs */
7301         ixgbe_update_default_up(adapter);
7302
7303         /* ping all the active vfs to let them know link has changed */
7304         ixgbe_ping_all_vfs(adapter);
7305 }
7306
7307 /**
7308  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7309  *                               print link down message
7310  * @adapter: pointer to the adapter structure
7311  **/
7312 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7313 {
7314         struct net_device *netdev = adapter->netdev;
7315         struct ixgbe_hw *hw = &adapter->hw;
7316
7317         adapter->link_up = false;
7318         adapter->link_speed = 0;
7319
7320         /* only continue if link was up previously */
7321         if (!netif_carrier_ok(netdev))
7322                 return;
7323
7324         /* poll for SFP+ cable when link is down */
7325         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7326                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7327
7328         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7329                 ixgbe_ptp_start_cyclecounter(adapter);
7330
7331         e_info(drv, "NIC Link is Down\n");
7332         netif_carrier_off(netdev);
7333
7334         /* ping all the active vfs to let them know link has changed */
7335         ixgbe_ping_all_vfs(adapter);
7336 }
7337
7338 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7339 {
7340         int i;
7341
7342         for (i = 0; i < adapter->num_tx_queues; i++) {
7343                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7344
7345                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7346                         return true;
7347         }
7348
7349         for (i = 0; i < adapter->num_xdp_queues; i++) {
7350                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7351
7352                 if (ring->next_to_use != ring->next_to_clean)
7353                         return true;
7354         }
7355
7356         return false;
7357 }
7358
7359 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7360 {
7361         struct ixgbe_hw *hw = &adapter->hw;
7362         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7363         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7364
7365         int i, j;
7366
7367         if (!adapter->num_vfs)
7368                 return false;
7369
7370         /* resetting the PF is only needed for MAC before X550 */
7371         if (hw->mac.type >= ixgbe_mac_X550)
7372                 return false;
7373
7374         for (i = 0; i < adapter->num_vfs; i++) {
7375                 for (j = 0; j < q_per_pool; j++) {
7376                         u32 h, t;
7377
7378                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7379                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7380
7381                         if (h != t)
7382                                 return true;
7383                 }
7384         }
7385
7386         return false;
7387 }
7388
7389 /**
7390  * ixgbe_watchdog_flush_tx - flush queues on link down
7391  * @adapter: pointer to the device adapter structure
7392  **/
7393 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7394 {
7395         if (!netif_carrier_ok(adapter->netdev)) {
7396                 if (ixgbe_ring_tx_pending(adapter) ||
7397                     ixgbe_vf_tx_pending(adapter)) {
7398                         /* We've lost link, so the controller stops DMA,
7399                          * but we've got queued Tx work that's never going
7400                          * to get done, so reset controller to flush Tx.
7401                          * (Do the reset outside of interrupt context).
7402                          */
7403                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7404                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7405                 }
7406         }
7407 }
7408
7409 #ifdef CONFIG_PCI_IOV
7410 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7411 {
7412         struct ixgbe_hw *hw = &adapter->hw;
7413         struct pci_dev *pdev = adapter->pdev;
7414         unsigned int vf;
7415         u32 gpc;
7416
7417         if (!(netif_carrier_ok(adapter->netdev)))
7418                 return;
7419
7420         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7421         if (gpc) /* If incrementing then no need for the check below */
7422                 return;
7423         /* Check to see if a bad DMA write target from an errant or
7424          * malicious VF has caused a PCIe error.  If so then we can
7425          * issue a VFLR to the offending VF(s) and then resume without
7426          * requesting a full slot reset.
7427          */
7428
7429         if (!pdev)
7430                 return;
7431
7432         /* check status reg for all VFs owned by this PF */
7433         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7434                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7435                 u16 status_reg;
7436
7437                 if (!vfdev)
7438                         continue;
7439                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7440                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7441                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7442                         pcie_flr(vfdev);
7443         }
7444 }
7445
7446 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7447 {
7448         u32 ssvpc;
7449
7450         /* Do not perform spoof check for 82598 or if not in IOV mode */
7451         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7452             adapter->num_vfs == 0)
7453                 return;
7454
7455         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7456
7457         /*
7458          * ssvpc register is cleared on read, if zero then no
7459          * spoofed packets in the last interval.
7460          */
7461         if (!ssvpc)
7462                 return;
7463
7464         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7465 }
7466 #else
7467 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7468 {
7469 }
7470
7471 static void
7472 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7473 {
7474 }
7475 #endif /* CONFIG_PCI_IOV */
7476
7477
7478 /**
7479  * ixgbe_watchdog_subtask - check and bring link up
7480  * @adapter: pointer to the device adapter structure
7481  **/
7482 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7483 {
7484         /* if interface is down, removing or resetting, do nothing */
7485         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7486             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7487             test_bit(__IXGBE_RESETTING, &adapter->state))
7488                 return;
7489
7490         ixgbe_watchdog_update_link(adapter);
7491
7492         if (adapter->link_up)
7493                 ixgbe_watchdog_link_is_up(adapter);
7494         else
7495                 ixgbe_watchdog_link_is_down(adapter);
7496
7497         ixgbe_check_for_bad_vf(adapter);
7498         ixgbe_spoof_check(adapter);
7499         ixgbe_update_stats(adapter);
7500
7501         ixgbe_watchdog_flush_tx(adapter);
7502 }
7503
7504 /**
7505  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7506  * @adapter: the ixgbe adapter structure
7507  **/
7508 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7509 {
7510         struct ixgbe_hw *hw = &adapter->hw;
7511         s32 err;
7512
7513         /* not searching for SFP so there is nothing to do here */
7514         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7515             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7516                 return;
7517
7518         if (adapter->sfp_poll_time &&
7519             time_after(adapter->sfp_poll_time, jiffies))
7520                 return; /* If not yet time to poll for SFP */
7521
7522         /* someone else is in init, wait until next service event */
7523         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7524                 return;
7525
7526         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7527
7528         err = hw->phy.ops.identify_sfp(hw);
7529         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7530                 goto sfp_out;
7531
7532         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7533                 /* If no cable is present, then we need to reset
7534                  * the next time we find a good cable. */
7535                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7536         }
7537
7538         /* exit on error */
7539         if (err)
7540                 goto sfp_out;
7541
7542         /* exit if reset not needed */
7543         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7544                 goto sfp_out;
7545
7546         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7547
7548         /*
7549          * A module may be identified correctly, but the EEPROM may not have
7550          * support for that module.  setup_sfp() will fail in that case, so
7551          * we should not allow that module to load.
7552          */
7553         if (hw->mac.type == ixgbe_mac_82598EB)
7554                 err = hw->phy.ops.reset(hw);
7555         else
7556                 err = hw->mac.ops.setup_sfp(hw);
7557
7558         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7559                 goto sfp_out;
7560
7561         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7562         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7563
7564 sfp_out:
7565         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7566
7567         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7568             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7569                 e_dev_err("failed to initialize because an unsupported "
7570                           "SFP+ module type was detected.\n");
7571                 e_dev_err("Reload the driver after installing a "
7572                           "supported module.\n");
7573                 unregister_netdev(adapter->netdev);
7574         }
7575 }
7576
7577 /**
7578  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7579  * @adapter: the ixgbe adapter structure
7580  **/
7581 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7582 {
7583         struct ixgbe_hw *hw = &adapter->hw;
7584         u32 speed;
7585         bool autoneg = false;
7586
7587         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7588                 return;
7589
7590         /* someone else is in init, wait until next service event */
7591         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7592                 return;
7593
7594         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7595
7596         speed = hw->phy.autoneg_advertised;
7597         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7598                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7599
7600                 /* setup the highest link when no autoneg */
7601                 if (!autoneg) {
7602                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7603                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7604                 }
7605         }
7606
7607         if (hw->mac.ops.setup_link)
7608                 hw->mac.ops.setup_link(hw, speed, true);
7609
7610         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7611         adapter->link_check_timeout = jiffies;
7612         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7613 }
7614
7615 /**
7616  * ixgbe_service_timer - Timer Call-back
7617  * @data: pointer to adapter cast into an unsigned long
7618  **/
7619 static void ixgbe_service_timer(unsigned long data)
7620 {
7621         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
7622         unsigned long next_event_offset;
7623
7624         /* poll faster when waiting for link */
7625         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7626                 next_event_offset = HZ / 10;
7627         else
7628                 next_event_offset = HZ * 2;
7629
7630         /* Reset the timer */
7631         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7632
7633         ixgbe_service_event_schedule(adapter);
7634 }
7635
7636 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7637 {
7638         struct ixgbe_hw *hw = &adapter->hw;
7639         u32 status;
7640
7641         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7642                 return;
7643
7644         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7645
7646         if (!hw->phy.ops.handle_lasi)
7647                 return;
7648
7649         status = hw->phy.ops.handle_lasi(&adapter->hw);
7650         if (status != IXGBE_ERR_OVERTEMP)
7651                 return;
7652
7653         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7654 }
7655
7656 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7657 {
7658         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7659                 return;
7660
7661         /* If we're already down, removing or resetting, just bail */
7662         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7663             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7664             test_bit(__IXGBE_RESETTING, &adapter->state))
7665                 return;
7666
7667         ixgbe_dump(adapter);
7668         netdev_err(adapter->netdev, "Reset adapter\n");
7669         adapter->tx_timeout_count++;
7670
7671         rtnl_lock();
7672         ixgbe_reinit_locked(adapter);
7673         rtnl_unlock();
7674 }
7675
7676 /**
7677  * ixgbe_service_task - manages and runs subtasks
7678  * @work: pointer to work_struct containing our data
7679  **/
7680 static void ixgbe_service_task(struct work_struct *work)
7681 {
7682         struct ixgbe_adapter *adapter = container_of(work,
7683                                                      struct ixgbe_adapter,
7684                                                      service_task);
7685         if (ixgbe_removed(adapter->hw.hw_addr)) {
7686                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7687                         rtnl_lock();
7688                         ixgbe_down(adapter);
7689                         rtnl_unlock();
7690                 }
7691                 ixgbe_service_event_complete(adapter);
7692                 return;
7693         }
7694         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7695                 rtnl_lock();
7696                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7697                 udp_tunnel_get_rx_info(adapter->netdev);
7698                 rtnl_unlock();
7699         }
7700         ixgbe_reset_subtask(adapter);
7701         ixgbe_phy_interrupt_subtask(adapter);
7702         ixgbe_sfp_detection_subtask(adapter);
7703         ixgbe_sfp_link_config_subtask(adapter);
7704         ixgbe_check_overtemp_subtask(adapter);
7705         ixgbe_watchdog_subtask(adapter);
7706         ixgbe_fdir_reinit_subtask(adapter);
7707         ixgbe_check_hang_subtask(adapter);
7708
7709         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7710                 ixgbe_ptp_overflow_check(adapter);
7711                 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7712                         ixgbe_ptp_rx_hang(adapter);
7713                 ixgbe_ptp_tx_hang(adapter);
7714         }
7715
7716         ixgbe_service_event_complete(adapter);
7717 }
7718
7719 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7720                      struct ixgbe_tx_buffer *first,
7721                      u8 *hdr_len)
7722 {
7723         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7724         struct sk_buff *skb = first->skb;
7725         union {
7726                 struct iphdr *v4;
7727                 struct ipv6hdr *v6;
7728                 unsigned char *hdr;
7729         } ip;
7730         union {
7731                 struct tcphdr *tcp;
7732                 unsigned char *hdr;
7733         } l4;
7734         u32 paylen, l4_offset;
7735         int err;
7736
7737         if (skb->ip_summed != CHECKSUM_PARTIAL)
7738                 return 0;
7739
7740         if (!skb_is_gso(skb))
7741                 return 0;
7742
7743         err = skb_cow_head(skb, 0);
7744         if (err < 0)
7745                 return err;
7746
7747         if (eth_p_mpls(first->protocol))
7748                 ip.hdr = skb_inner_network_header(skb);
7749         else
7750                 ip.hdr = skb_network_header(skb);
7751         l4.hdr = skb_checksum_start(skb);
7752
7753         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7754         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7755
7756         /* initialize outer IP header fields */
7757         if (ip.v4->version == 4) {
7758                 unsigned char *csum_start = skb_checksum_start(skb);
7759                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7760
7761                 /* IP header will have to cancel out any data that
7762                  * is not a part of the outer IP header
7763                  */
7764                 ip.v4->check = csum_fold(csum_partial(trans_start,
7765                                                       csum_start - trans_start,
7766                                                       0));
7767                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7768
7769                 ip.v4->tot_len = 0;
7770                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7771                                    IXGBE_TX_FLAGS_CSUM |
7772                                    IXGBE_TX_FLAGS_IPV4;
7773         } else {
7774                 ip.v6->payload_len = 0;
7775                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7776                                    IXGBE_TX_FLAGS_CSUM;
7777         }
7778
7779         /* determine offset of inner transport header */
7780         l4_offset = l4.hdr - skb->data;
7781
7782         /* compute length of segmentation header */
7783         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7784
7785         /* remove payload length from inner checksum */
7786         paylen = skb->len - l4_offset;
7787         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7788
7789         /* update gso size and bytecount with header size */
7790         first->gso_segs = skb_shinfo(skb)->gso_segs;
7791         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7792
7793         /* mss_l4len_id: use 0 as index for TSO */
7794         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7795         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7796
7797         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7798         vlan_macip_lens = l4.hdr - ip.hdr;
7799         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7800         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7801
7802         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7803                           mss_l4len_idx);
7804
7805         return 1;
7806 }
7807
7808 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7809 {
7810         unsigned int offset = 0;
7811
7812         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7813
7814         return offset == skb_checksum_start_offset(skb);
7815 }
7816
7817 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7818                           struct ixgbe_tx_buffer *first)
7819 {
7820         struct sk_buff *skb = first->skb;
7821         u32 vlan_macip_lens = 0;
7822         u32 type_tucmd = 0;
7823
7824         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7825 csum_failed:
7826                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7827                                          IXGBE_TX_FLAGS_CC)))
7828                         return;
7829                 goto no_csum;
7830         }
7831
7832         switch (skb->csum_offset) {
7833         case offsetof(struct tcphdr, check):
7834                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7835                 /* fall through */
7836         case offsetof(struct udphdr, check):
7837                 break;
7838         case offsetof(struct sctphdr, checksum):
7839                 /* validate that this is actually an SCTP request */
7840                 if (((first->protocol == htons(ETH_P_IP)) &&
7841                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7842                     ((first->protocol == htons(ETH_P_IPV6)) &&
7843                      ixgbe_ipv6_csum_is_sctp(skb))) {
7844                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7845                         break;
7846                 }
7847                 /* fall through */
7848         default:
7849                 skb_checksum_help(skb);
7850                 goto csum_failed;
7851         }
7852
7853         /* update TX checksum flag */
7854         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7855         vlan_macip_lens = skb_checksum_start_offset(skb) -
7856                           skb_network_offset(skb);
7857 no_csum:
7858         /* vlan_macip_lens: MACLEN, VLAN tag */
7859         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7860         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7861
7862         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7863 }
7864
7865 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7866         ((_flag <= _result) ? \
7867          ((u32)(_input & _flag) * (_result / _flag)) : \
7868          ((u32)(_input & _flag) / (_flag / _result)))
7869
7870 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7871 {
7872         /* set type for advanced descriptor with frame checksum insertion */
7873         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7874                        IXGBE_ADVTXD_DCMD_DEXT |
7875                        IXGBE_ADVTXD_DCMD_IFCS;
7876
7877         /* set HW vlan bit if vlan is present */
7878         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7879                                    IXGBE_ADVTXD_DCMD_VLE);
7880
7881         /* set segmentation enable bits for TSO/FSO */
7882         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7883                                    IXGBE_ADVTXD_DCMD_TSE);
7884
7885         /* set timestamp bit if present */
7886         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7887                                    IXGBE_ADVTXD_MAC_TSTAMP);
7888
7889         /* insert frame checksum */
7890         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7891
7892         return cmd_type;
7893 }
7894
7895 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7896                                    u32 tx_flags, unsigned int paylen)
7897 {
7898         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7899
7900         /* enable L4 checksum for TSO and TX checksum offload */
7901         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7902                                         IXGBE_TX_FLAGS_CSUM,
7903                                         IXGBE_ADVTXD_POPTS_TXSM);
7904
7905         /* enble IPv4 checksum for TSO */
7906         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7907                                         IXGBE_TX_FLAGS_IPV4,
7908                                         IXGBE_ADVTXD_POPTS_IXSM);
7909
7910         /*
7911          * Check Context must be set if Tx switch is enabled, which it
7912          * always is for case where virtual functions are running
7913          */
7914         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7915                                         IXGBE_TX_FLAGS_CC,
7916                                         IXGBE_ADVTXD_CC);
7917
7918         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7919 }
7920
7921 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7922 {
7923         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7924
7925         /* Herbert's original patch had:
7926          *  smp_mb__after_netif_stop_queue();
7927          * but since that doesn't exist yet, just open code it.
7928          */
7929         smp_mb();
7930
7931         /* We need to check again in a case another CPU has just
7932          * made room available.
7933          */
7934         if (likely(ixgbe_desc_unused(tx_ring) < size))
7935                 return -EBUSY;
7936
7937         /* A reprieve! - use start_queue because it doesn't call schedule */
7938         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7939         ++tx_ring->tx_stats.restart_queue;
7940         return 0;
7941 }
7942
7943 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7944 {
7945         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7946                 return 0;
7947
7948         return __ixgbe_maybe_stop_tx(tx_ring, size);
7949 }
7950
7951 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7952                        IXGBE_TXD_CMD_RS)
7953
7954 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7955                         struct ixgbe_tx_buffer *first,
7956                         const u8 hdr_len)
7957 {
7958         struct sk_buff *skb = first->skb;
7959         struct ixgbe_tx_buffer *tx_buffer;
7960         union ixgbe_adv_tx_desc *tx_desc;
7961         struct skb_frag_struct *frag;
7962         dma_addr_t dma;
7963         unsigned int data_len, size;
7964         u32 tx_flags = first->tx_flags;
7965         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7966         u16 i = tx_ring->next_to_use;
7967
7968         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7969
7970         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7971
7972         size = skb_headlen(skb);
7973         data_len = skb->data_len;
7974
7975 #ifdef IXGBE_FCOE
7976         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7977                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7978                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7979                         data_len = 0;
7980                 } else {
7981                         data_len -= sizeof(struct fcoe_crc_eof);
7982                 }
7983         }
7984
7985 #endif
7986         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7987
7988         tx_buffer = first;
7989
7990         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7991                 if (dma_mapping_error(tx_ring->dev, dma))
7992                         goto dma_error;
7993
7994                 /* record length, and DMA address */
7995                 dma_unmap_len_set(tx_buffer, len, size);
7996                 dma_unmap_addr_set(tx_buffer, dma, dma);
7997
7998                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7999
8000                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8001                         tx_desc->read.cmd_type_len =
8002                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8003
8004                         i++;
8005                         tx_desc++;
8006                         if (i == tx_ring->count) {
8007                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8008                                 i = 0;
8009                         }
8010                         tx_desc->read.olinfo_status = 0;
8011
8012                         dma += IXGBE_MAX_DATA_PER_TXD;
8013                         size -= IXGBE_MAX_DATA_PER_TXD;
8014
8015                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8016                 }
8017
8018                 if (likely(!data_len))
8019                         break;
8020
8021                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8022
8023                 i++;
8024                 tx_desc++;
8025                 if (i == tx_ring->count) {
8026                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8027                         i = 0;
8028                 }
8029                 tx_desc->read.olinfo_status = 0;
8030
8031 #ifdef IXGBE_FCOE
8032                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8033 #else
8034                 size = skb_frag_size(frag);
8035 #endif
8036                 data_len -= size;
8037
8038                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8039                                        DMA_TO_DEVICE);
8040
8041                 tx_buffer = &tx_ring->tx_buffer_info[i];
8042         }
8043
8044         /* write last descriptor with RS and EOP bits */
8045         cmd_type |= size | IXGBE_TXD_CMD;
8046         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8047
8048         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8049
8050         /* set the timestamp */
8051         first->time_stamp = jiffies;
8052
8053         /*
8054          * Force memory writes to complete before letting h/w know there
8055          * are new descriptors to fetch.  (Only applicable for weak-ordered
8056          * memory model archs, such as IA-64).
8057          *
8058          * We also need this memory barrier to make certain all of the
8059          * status bits have been updated before next_to_watch is written.
8060          */
8061         wmb();
8062
8063         /* set next_to_watch value indicating a packet is present */
8064         first->next_to_watch = tx_desc;
8065
8066         i++;
8067         if (i == tx_ring->count)
8068                 i = 0;
8069
8070         tx_ring->next_to_use = i;
8071
8072         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8073
8074         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8075                 writel(i, tx_ring->tail);
8076
8077                 /* we need this if more than one processor can write to our tail
8078                  * at a time, it synchronizes IO on IA64/Altix systems
8079                  */
8080                 mmiowb();
8081         }
8082
8083         return 0;
8084 dma_error:
8085         dev_err(tx_ring->dev, "TX DMA map failed\n");
8086
8087         /* clear dma mappings for failed tx_buffer_info map */
8088         for (;;) {
8089                 tx_buffer = &tx_ring->tx_buffer_info[i];
8090                 if (dma_unmap_len(tx_buffer, len))
8091                         dma_unmap_page(tx_ring->dev,
8092                                        dma_unmap_addr(tx_buffer, dma),
8093                                        dma_unmap_len(tx_buffer, len),
8094                                        DMA_TO_DEVICE);
8095                 dma_unmap_len_set(tx_buffer, len, 0);
8096                 if (tx_buffer == first)
8097                         break;
8098                 if (i == 0)
8099                         i += tx_ring->count;
8100                 i--;
8101         }
8102
8103         dev_kfree_skb_any(first->skb);
8104         first->skb = NULL;
8105
8106         tx_ring->next_to_use = i;
8107
8108         return -1;
8109 }
8110
8111 static void ixgbe_atr(struct ixgbe_ring *ring,
8112                       struct ixgbe_tx_buffer *first)
8113 {
8114         struct ixgbe_q_vector *q_vector = ring->q_vector;
8115         union ixgbe_atr_hash_dword input = { .dword = 0 };
8116         union ixgbe_atr_hash_dword common = { .dword = 0 };
8117         union {
8118                 unsigned char *network;
8119                 struct iphdr *ipv4;
8120                 struct ipv6hdr *ipv6;
8121         } hdr;
8122         struct tcphdr *th;
8123         unsigned int hlen;
8124         struct sk_buff *skb;
8125         __be16 vlan_id;
8126         int l4_proto;
8127
8128         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8129         if (!q_vector)
8130                 return;
8131
8132         /* do nothing if sampling is disabled */
8133         if (!ring->atr_sample_rate)
8134                 return;
8135
8136         ring->atr_count++;
8137
8138         /* currently only IPv4/IPv6 with TCP is supported */
8139         if ((first->protocol != htons(ETH_P_IP)) &&
8140             (first->protocol != htons(ETH_P_IPV6)))
8141                 return;
8142
8143         /* snag network header to get L4 type and address */
8144         skb = first->skb;
8145         hdr.network = skb_network_header(skb);
8146         if (unlikely(hdr.network <= skb->data))
8147                 return;
8148         if (skb->encapsulation &&
8149             first->protocol == htons(ETH_P_IP) &&
8150             hdr.ipv4->protocol == IPPROTO_UDP) {
8151                 struct ixgbe_adapter *adapter = q_vector->adapter;
8152
8153                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8154                              VXLAN_HEADROOM))
8155                         return;
8156
8157                 /* verify the port is recognized as VXLAN */
8158                 if (adapter->vxlan_port &&
8159                     udp_hdr(skb)->dest == adapter->vxlan_port)
8160                         hdr.network = skb_inner_network_header(skb);
8161
8162                 if (adapter->geneve_port &&
8163                     udp_hdr(skb)->dest == adapter->geneve_port)
8164                         hdr.network = skb_inner_network_header(skb);
8165         }
8166
8167         /* Make sure we have at least [minimum IPv4 header + TCP]
8168          * or [IPv6 header] bytes
8169          */
8170         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8171                 return;
8172
8173         /* Currently only IPv4/IPv6 with TCP is supported */
8174         switch (hdr.ipv4->version) {
8175         case IPVERSION:
8176                 /* access ihl as u8 to avoid unaligned access on ia64 */
8177                 hlen = (hdr.network[0] & 0x0F) << 2;
8178                 l4_proto = hdr.ipv4->protocol;
8179                 break;
8180         case 6:
8181                 hlen = hdr.network - skb->data;
8182                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8183                 hlen -= hdr.network - skb->data;
8184                 break;
8185         default:
8186                 return;
8187         }
8188
8189         if (l4_proto != IPPROTO_TCP)
8190                 return;
8191
8192         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8193                      hlen + sizeof(struct tcphdr)))
8194                 return;
8195
8196         th = (struct tcphdr *)(hdr.network + hlen);
8197
8198         /* skip this packet since the socket is closing */
8199         if (th->fin)
8200                 return;
8201
8202         /* sample on all syn packets or once every atr sample count */
8203         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8204                 return;
8205
8206         /* reset sample count */
8207         ring->atr_count = 0;
8208
8209         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8210
8211         /*
8212          * src and dst are inverted, think how the receiver sees them
8213          *
8214          * The input is broken into two sections, a non-compressed section
8215          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8216          * is XORed together and stored in the compressed dword.
8217          */
8218         input.formatted.vlan_id = vlan_id;
8219
8220         /*
8221          * since src port and flex bytes occupy the same word XOR them together
8222          * and write the value to source port portion of compressed dword
8223          */
8224         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8225                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8226         else
8227                 common.port.src ^= th->dest ^ first->protocol;
8228         common.port.dst ^= th->source;
8229
8230         switch (hdr.ipv4->version) {
8231         case IPVERSION:
8232                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8233                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8234                 break;
8235         case 6:
8236                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8237                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8238                              hdr.ipv6->saddr.s6_addr32[1] ^
8239                              hdr.ipv6->saddr.s6_addr32[2] ^
8240                              hdr.ipv6->saddr.s6_addr32[3] ^
8241                              hdr.ipv6->daddr.s6_addr32[0] ^
8242                              hdr.ipv6->daddr.s6_addr32[1] ^
8243                              hdr.ipv6->daddr.s6_addr32[2] ^
8244                              hdr.ipv6->daddr.s6_addr32[3];
8245                 break;
8246         default:
8247                 break;
8248         }
8249
8250         if (hdr.network != skb_network_header(skb))
8251                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8252
8253         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8254         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8255                                               input, common, ring->queue_index);
8256 }
8257
8258 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8259                               void *accel_priv, select_queue_fallback_t fallback)
8260 {
8261         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
8262 #ifdef IXGBE_FCOE
8263         struct ixgbe_adapter *adapter;
8264         struct ixgbe_ring_feature *f;
8265         int txq;
8266 #endif
8267
8268         if (fwd_adapter)
8269                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
8270
8271 #ifdef IXGBE_FCOE
8272
8273         /*
8274          * only execute the code below if protocol is FCoE
8275          * or FIP and we have FCoE enabled on the adapter
8276          */
8277         switch (vlan_get_protocol(skb)) {
8278         case htons(ETH_P_FCOE):
8279         case htons(ETH_P_FIP):
8280                 adapter = netdev_priv(dev);
8281
8282                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
8283                         break;
8284                 /* fall through */
8285         default:
8286                 return fallback(dev, skb);
8287         }
8288
8289         f = &adapter->ring_feature[RING_F_FCOE];
8290
8291         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8292                                            smp_processor_id();
8293
8294         while (txq >= f->indices)
8295                 txq -= f->indices;
8296
8297         return txq + f->offset;
8298 #else
8299         return fallback(dev, skb);
8300 #endif
8301 }
8302
8303 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8304                                struct xdp_buff *xdp)
8305 {
8306         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8307         struct ixgbe_tx_buffer *tx_buffer;
8308         union ixgbe_adv_tx_desc *tx_desc;
8309         u32 len, cmd_type;
8310         dma_addr_t dma;
8311         u16 i;
8312
8313         len = xdp->data_end - xdp->data;
8314
8315         if (unlikely(!ixgbe_desc_unused(ring)))
8316                 return IXGBE_XDP_CONSUMED;
8317
8318         dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
8319         if (dma_mapping_error(ring->dev, dma))
8320                 return IXGBE_XDP_CONSUMED;
8321
8322         /* record the location of the first descriptor for this packet */
8323         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8324         tx_buffer->bytecount = len;
8325         tx_buffer->gso_segs = 1;
8326         tx_buffer->protocol = 0;
8327
8328         i = ring->next_to_use;
8329         tx_desc = IXGBE_TX_DESC(ring, i);
8330
8331         dma_unmap_len_set(tx_buffer, len, len);
8332         dma_unmap_addr_set(tx_buffer, dma, dma);
8333         tx_buffer->data = xdp->data;
8334         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8335
8336         /* put descriptor type bits */
8337         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8338                    IXGBE_ADVTXD_DCMD_DEXT |
8339                    IXGBE_ADVTXD_DCMD_IFCS;
8340         cmd_type |= len | IXGBE_TXD_CMD;
8341         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8342         tx_desc->read.olinfo_status =
8343                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8344
8345         /* Avoid any potential race with xdp_xmit and cleanup */
8346         smp_wmb();
8347
8348         /* set next_to_watch value indicating a packet is present */
8349         i++;
8350         if (i == ring->count)
8351                 i = 0;
8352
8353         tx_buffer->next_to_watch = tx_desc;
8354         ring->next_to_use = i;
8355
8356         return IXGBE_XDP_TX;
8357 }
8358
8359 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8360                           struct ixgbe_adapter *adapter,
8361                           struct ixgbe_ring *tx_ring)
8362 {
8363         struct ixgbe_tx_buffer *first;
8364         int tso;
8365         u32 tx_flags = 0;
8366         unsigned short f;
8367         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8368         __be16 protocol = skb->protocol;
8369         u8 hdr_len = 0;
8370
8371         /*
8372          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8373          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8374          *       + 2 desc gap to keep tail from touching head,
8375          *       + 1 desc for context descriptor,
8376          * otherwise try next time
8377          */
8378         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8379                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8380
8381         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8382                 tx_ring->tx_stats.tx_busy++;
8383                 return NETDEV_TX_BUSY;
8384         }
8385
8386         /* record the location of the first descriptor for this packet */
8387         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8388         first->skb = skb;
8389         first->bytecount = skb->len;
8390         first->gso_segs = 1;
8391
8392         /* if we have a HW VLAN tag being added default to the HW one */
8393         if (skb_vlan_tag_present(skb)) {
8394                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8395                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8396         /* else if it is a SW VLAN check the next protocol and store the tag */
8397         } else if (protocol == htons(ETH_P_8021Q)) {
8398                 struct vlan_hdr *vhdr, _vhdr;
8399                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8400                 if (!vhdr)
8401                         goto out_drop;
8402
8403                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8404                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8405                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8406         }
8407         protocol = vlan_get_protocol(skb);
8408
8409         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8410             adapter->ptp_clock) {
8411                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
8412                     !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8413                                            &adapter->state)) {
8414                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8415                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8416
8417                         /* schedule check for Tx timestamp */
8418                         adapter->ptp_tx_skb = skb_get(skb);
8419                         adapter->ptp_tx_start = jiffies;
8420                         schedule_work(&adapter->ptp_tx_work);
8421                 } else {
8422                         adapter->tx_hwtstamp_skipped++;
8423                 }
8424         }
8425
8426         skb_tx_timestamp(skb);
8427
8428 #ifdef CONFIG_PCI_IOV
8429         /*
8430          * Use the l2switch_enable flag - would be false if the DMA
8431          * Tx switch had been disabled.
8432          */
8433         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8434                 tx_flags |= IXGBE_TX_FLAGS_CC;
8435
8436 #endif
8437         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8438         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8439             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8440              (skb->priority != TC_PRIO_CONTROL))) {
8441                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8442                 tx_flags |= (skb->priority & 0x7) <<
8443                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8444                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8445                         struct vlan_ethhdr *vhdr;
8446
8447                         if (skb_cow_head(skb, 0))
8448                                 goto out_drop;
8449                         vhdr = (struct vlan_ethhdr *)skb->data;
8450                         vhdr->h_vlan_TCI = htons(tx_flags >>
8451                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8452                 } else {
8453                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8454                 }
8455         }
8456
8457         /* record initial flags and protocol */
8458         first->tx_flags = tx_flags;
8459         first->protocol = protocol;
8460
8461 #ifdef IXGBE_FCOE
8462         /* setup tx offload for FCoE */
8463         if ((protocol == htons(ETH_P_FCOE)) &&
8464             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8465                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8466                 if (tso < 0)
8467                         goto out_drop;
8468
8469                 goto xmit_fcoe;
8470         }
8471
8472 #endif /* IXGBE_FCOE */
8473         tso = ixgbe_tso(tx_ring, first, &hdr_len);
8474         if (tso < 0)
8475                 goto out_drop;
8476         else if (!tso)
8477                 ixgbe_tx_csum(tx_ring, first);
8478
8479         /* add the ATR filter if ATR is on */
8480         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8481                 ixgbe_atr(tx_ring, first);
8482
8483 #ifdef IXGBE_FCOE
8484 xmit_fcoe:
8485 #endif /* IXGBE_FCOE */
8486         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8487                 goto cleanup_tx_timestamp;
8488
8489         return NETDEV_TX_OK;
8490
8491 out_drop:
8492         dev_kfree_skb_any(first->skb);
8493         first->skb = NULL;
8494 cleanup_tx_timestamp:
8495         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8496                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8497                 adapter->ptp_tx_skb = NULL;
8498                 cancel_work_sync(&adapter->ptp_tx_work);
8499                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8500         }
8501
8502         return NETDEV_TX_OK;
8503 }
8504
8505 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8506                                       struct net_device *netdev,
8507                                       struct ixgbe_ring *ring)
8508 {
8509         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8510         struct ixgbe_ring *tx_ring;
8511
8512         /*
8513          * The minimum packet size for olinfo paylen is 17 so pad the skb
8514          * in order to meet this minimum size requirement.
8515          */
8516         if (skb_put_padto(skb, 17))
8517                 return NETDEV_TX_OK;
8518
8519         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8520
8521         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8522 }
8523
8524 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8525                                     struct net_device *netdev)
8526 {
8527         return __ixgbe_xmit_frame(skb, netdev, NULL);
8528 }
8529
8530 /**
8531  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8532  * @netdev: network interface device structure
8533  * @p: pointer to an address structure
8534  *
8535  * Returns 0 on success, negative on failure
8536  **/
8537 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8538 {
8539         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8540         struct ixgbe_hw *hw = &adapter->hw;
8541         struct sockaddr *addr = p;
8542
8543         if (!is_valid_ether_addr(addr->sa_data))
8544                 return -EADDRNOTAVAIL;
8545
8546         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8547         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8548
8549         ixgbe_mac_set_default_filter(adapter);
8550
8551         return 0;
8552 }
8553
8554 static int
8555 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8556 {
8557         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8558         struct ixgbe_hw *hw = &adapter->hw;
8559         u16 value;
8560         int rc;
8561
8562         if (prtad != hw->phy.mdio.prtad)
8563                 return -EINVAL;
8564         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8565         if (!rc)
8566                 rc = value;
8567         return rc;
8568 }
8569
8570 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8571                             u16 addr, u16 value)
8572 {
8573         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8574         struct ixgbe_hw *hw = &adapter->hw;
8575
8576         if (prtad != hw->phy.mdio.prtad)
8577                 return -EINVAL;
8578         return hw->phy.ops.write_reg(hw, addr, devad, value);
8579 }
8580
8581 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8582 {
8583         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8584
8585         switch (cmd) {
8586         case SIOCSHWTSTAMP:
8587                 return ixgbe_ptp_set_ts_config(adapter, req);
8588         case SIOCGHWTSTAMP:
8589                 return ixgbe_ptp_get_ts_config(adapter, req);
8590         case SIOCGMIIPHY:
8591                 if (!adapter->hw.phy.ops.read_reg)
8592                         return -EOPNOTSUPP;
8593                 /* fall through */
8594         default:
8595                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8596         }
8597 }
8598
8599 /**
8600  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8601  * netdev->dev_addrs
8602  * @netdev: network interface device structure
8603  *
8604  * Returns non-zero on failure
8605  **/
8606 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8607 {
8608         int err = 0;
8609         struct ixgbe_adapter *adapter = netdev_priv(dev);
8610         struct ixgbe_hw *hw = &adapter->hw;
8611
8612         if (is_valid_ether_addr(hw->mac.san_addr)) {
8613                 rtnl_lock();
8614                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8615                 rtnl_unlock();
8616
8617                 /* update SAN MAC vmdq pool selection */
8618                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8619         }
8620         return err;
8621 }
8622
8623 /**
8624  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8625  * netdev->dev_addrs
8626  * @netdev: network interface device structure
8627  *
8628  * Returns non-zero on failure
8629  **/
8630 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8631 {
8632         int err = 0;
8633         struct ixgbe_adapter *adapter = netdev_priv(dev);
8634         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8635
8636         if (is_valid_ether_addr(mac->san_addr)) {
8637                 rtnl_lock();
8638                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8639                 rtnl_unlock();
8640         }
8641         return err;
8642 }
8643
8644 #ifdef CONFIG_NET_POLL_CONTROLLER
8645 /*
8646  * Polling 'interrupt' - used by things like netconsole to send skbs
8647  * without having to re-enable interrupts. It's not called while
8648  * the interrupt routine is executing.
8649  */
8650 static void ixgbe_netpoll(struct net_device *netdev)
8651 {
8652         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8653         int i;
8654
8655         /* if interface is down do nothing */
8656         if (test_bit(__IXGBE_DOWN, &adapter->state))
8657                 return;
8658
8659         /* loop through and schedule all active queues */
8660         for (i = 0; i < adapter->num_q_vectors; i++)
8661                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8662 }
8663
8664 #endif
8665
8666 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8667                                    struct ixgbe_ring *ring)
8668 {
8669         u64 bytes, packets;
8670         unsigned int start;
8671
8672         if (ring) {
8673                 do {
8674                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8675                         packets = ring->stats.packets;
8676                         bytes   = ring->stats.bytes;
8677                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8678                 stats->tx_packets += packets;
8679                 stats->tx_bytes   += bytes;
8680         }
8681 }
8682
8683 static void ixgbe_get_stats64(struct net_device *netdev,
8684                               struct rtnl_link_stats64 *stats)
8685 {
8686         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8687         int i;
8688
8689         rcu_read_lock();
8690         for (i = 0; i < adapter->num_rx_queues; i++) {
8691                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
8692                 u64 bytes, packets;
8693                 unsigned int start;
8694
8695                 if (ring) {
8696                         do {
8697                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8698                                 packets = ring->stats.packets;
8699                                 bytes   = ring->stats.bytes;
8700                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8701                         stats->rx_packets += packets;
8702                         stats->rx_bytes   += bytes;
8703                 }
8704         }
8705
8706         for (i = 0; i < adapter->num_tx_queues; i++) {
8707                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
8708
8709                 ixgbe_get_ring_stats64(stats, ring);
8710         }
8711         for (i = 0; i < adapter->num_xdp_queues; i++) {
8712                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->xdp_ring[i]);
8713
8714                 ixgbe_get_ring_stats64(stats, ring);
8715         }
8716         rcu_read_unlock();
8717
8718         /* following stats updated by ixgbe_watchdog_task() */
8719         stats->multicast        = netdev->stats.multicast;
8720         stats->rx_errors        = netdev->stats.rx_errors;
8721         stats->rx_length_errors = netdev->stats.rx_length_errors;
8722         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8723         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8724 }
8725
8726 #ifdef CONFIG_IXGBE_DCB
8727 /**
8728  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8729  * @adapter: pointer to ixgbe_adapter
8730  * @tc: number of traffic classes currently enabled
8731  *
8732  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8733  * 802.1Q priority maps to a packet buffer that exists.
8734  */
8735 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8736 {
8737         struct ixgbe_hw *hw = &adapter->hw;
8738         u32 reg, rsave;
8739         int i;
8740
8741         /* 82598 have a static priority to TC mapping that can not
8742          * be changed so no validation is needed.
8743          */
8744         if (hw->mac.type == ixgbe_mac_82598EB)
8745                 return;
8746
8747         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8748         rsave = reg;
8749
8750         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8751                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8752
8753                 /* If up2tc is out of bounds default to zero */
8754                 if (up2tc > tc)
8755                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8756         }
8757
8758         if (reg != rsave)
8759                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8760
8761         return;
8762 }
8763
8764 /**
8765  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8766  * @adapter: Pointer to adapter struct
8767  *
8768  * Populate the netdev user priority to tc map
8769  */
8770 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8771 {
8772         struct net_device *dev = adapter->netdev;
8773         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8774         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8775         u8 prio;
8776
8777         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8778                 u8 tc = 0;
8779
8780                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8781                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8782                 else if (ets)
8783                         tc = ets->prio_tc[prio];
8784
8785                 netdev_set_prio_tc_map(dev, prio, tc);
8786         }
8787 }
8788
8789 #endif /* CONFIG_IXGBE_DCB */
8790 /**
8791  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8792  *
8793  * @netdev: net device to configure
8794  * @tc: number of traffic classes to enable
8795  */
8796 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8797 {
8798         struct ixgbe_adapter *adapter = netdev_priv(dev);
8799         struct ixgbe_hw *hw = &adapter->hw;
8800         bool pools;
8801
8802         /* Hardware supports up to 8 traffic classes */
8803         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8804                 return -EINVAL;
8805
8806         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8807                 return -EINVAL;
8808
8809         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8810         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8811                 return -EBUSY;
8812
8813         /* Hardware has to reinitialize queues and interrupts to
8814          * match packet buffer alignment. Unfortunately, the
8815          * hardware is not flexible enough to do this dynamically.
8816          */
8817         if (netif_running(dev))
8818                 ixgbe_close(dev);
8819         else
8820                 ixgbe_reset(adapter);
8821
8822         ixgbe_clear_interrupt_scheme(adapter);
8823
8824 #ifdef CONFIG_IXGBE_DCB
8825         if (tc) {
8826                 netdev_set_num_tc(dev, tc);
8827                 ixgbe_set_prio_tc_map(adapter);
8828
8829                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8830
8831                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8832                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8833                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8834                 }
8835         } else {
8836                 netdev_reset_tc(dev);
8837
8838                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8839                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8840
8841                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8842
8843                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8844                 adapter->dcb_cfg.pfc_mode_enable = false;
8845         }
8846
8847         ixgbe_validate_rtr(adapter, tc);
8848
8849 #endif /* CONFIG_IXGBE_DCB */
8850         ixgbe_init_interrupt_scheme(adapter);
8851
8852         if (netif_running(dev))
8853                 return ixgbe_open(dev);
8854
8855         return 0;
8856 }
8857
8858 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8859                                struct tc_cls_u32_offload *cls)
8860 {
8861         u32 hdl = cls->knode.handle;
8862         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8863         u32 loc = cls->knode.handle & 0xfffff;
8864         int err = 0, i, j;
8865         struct ixgbe_jump_table *jump = NULL;
8866
8867         if (loc > IXGBE_MAX_HW_ENTRIES)
8868                 return -EINVAL;
8869
8870         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8871                 return -EINVAL;
8872
8873         /* Clear this filter in the link data it is associated with */
8874         if (uhtid != 0x800) {
8875                 jump = adapter->jump_tables[uhtid];
8876                 if (!jump)
8877                         return -EINVAL;
8878                 if (!test_bit(loc - 1, jump->child_loc_map))
8879                         return -EINVAL;
8880                 clear_bit(loc - 1, jump->child_loc_map);
8881         }
8882
8883         /* Check if the filter being deleted is a link */
8884         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8885                 jump = adapter->jump_tables[i];
8886                 if (jump && jump->link_hdl == hdl) {
8887                         /* Delete filters in the hardware in the child hash
8888                          * table associated with this link
8889                          */
8890                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8891                                 if (!test_bit(j, jump->child_loc_map))
8892                                         continue;
8893                                 spin_lock(&adapter->fdir_perfect_lock);
8894                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
8895                                                                       NULL,
8896                                                                       j + 1);
8897                                 spin_unlock(&adapter->fdir_perfect_lock);
8898                                 clear_bit(j, jump->child_loc_map);
8899                         }
8900                         /* Remove resources for this link */
8901                         kfree(jump->input);
8902                         kfree(jump->mask);
8903                         kfree(jump);
8904                         adapter->jump_tables[i] = NULL;
8905                         return err;
8906                 }
8907         }
8908
8909         spin_lock(&adapter->fdir_perfect_lock);
8910         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8911         spin_unlock(&adapter->fdir_perfect_lock);
8912         return err;
8913 }
8914
8915 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8916                                             struct tc_cls_u32_offload *cls)
8917 {
8918         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8919
8920         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8921                 return -EINVAL;
8922
8923         /* This ixgbe devices do not support hash tables at the moment
8924          * so abort when given hash tables.
8925          */
8926         if (cls->hnode.divisor > 0)
8927                 return -EINVAL;
8928
8929         set_bit(uhtid - 1, &adapter->tables);
8930         return 0;
8931 }
8932
8933 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8934                                             struct tc_cls_u32_offload *cls)
8935 {
8936         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8937
8938         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8939                 return -EINVAL;
8940
8941         clear_bit(uhtid - 1, &adapter->tables);
8942         return 0;
8943 }
8944
8945 #ifdef CONFIG_NET_CLS_ACT
8946 struct upper_walk_data {
8947         struct ixgbe_adapter *adapter;
8948         u64 action;
8949         int ifindex;
8950         u8 queue;
8951 };
8952
8953 static int get_macvlan_queue(struct net_device *upper, void *_data)
8954 {
8955         if (netif_is_macvlan(upper)) {
8956                 struct macvlan_dev *dfwd = netdev_priv(upper);
8957                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8958                 struct upper_walk_data *data = _data;
8959                 struct ixgbe_adapter *adapter = data->adapter;
8960                 int ifindex = data->ifindex;
8961
8962                 if (vadapter && vadapter->netdev->ifindex == ifindex) {
8963                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8964                         data->action = data->queue;
8965                         return 1;
8966                 }
8967         }
8968
8969         return 0;
8970 }
8971
8972 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8973                                   u8 *queue, u64 *action)
8974 {
8975         unsigned int num_vfs = adapter->num_vfs, vf;
8976         struct upper_walk_data data;
8977         struct net_device *upper;
8978
8979         /* redirect to a SRIOV VF */
8980         for (vf = 0; vf < num_vfs; ++vf) {
8981                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8982                 if (upper->ifindex == ifindex) {
8983                         if (adapter->num_rx_pools > 1)
8984                                 *queue = vf * 2;
8985                         else
8986                                 *queue = vf * adapter->num_rx_queues_per_pool;
8987
8988                         *action = vf + 1;
8989                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
8990                         return 0;
8991                 }
8992         }
8993
8994         /* redirect to a offloaded macvlan netdev */
8995         data.adapter = adapter;
8996         data.ifindex = ifindex;
8997         data.action = 0;
8998         data.queue = 0;
8999         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9000                                           get_macvlan_queue, &data)) {
9001                 *action = data.action;
9002                 *queue = data.queue;
9003
9004                 return 0;
9005         }
9006
9007         return -EINVAL;
9008 }
9009
9010 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9011                             struct tcf_exts *exts, u64 *action, u8 *queue)
9012 {
9013         const struct tc_action *a;
9014         LIST_HEAD(actions);
9015         int err;
9016
9017         if (!tcf_exts_has_actions(exts))
9018                 return -EINVAL;
9019
9020         tcf_exts_to_list(exts, &actions);
9021         list_for_each_entry(a, &actions, list) {
9022
9023                 /* Drop action */
9024                 if (is_tcf_gact_shot(a)) {
9025                         *action = IXGBE_FDIR_DROP_QUEUE;
9026                         *queue = IXGBE_FDIR_DROP_QUEUE;
9027                         return 0;
9028                 }
9029
9030                 /* Redirect to a VF or a offloaded macvlan */
9031                 if (is_tcf_mirred_egress_redirect(a)) {
9032                         int ifindex = tcf_mirred_ifindex(a);
9033
9034                         err = handle_redirect_action(adapter, ifindex, queue,
9035                                                      action);
9036                         if (err == 0)
9037                                 return err;
9038                 }
9039         }
9040
9041         return -EINVAL;
9042 }
9043 #else
9044 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9045                             struct tcf_exts *exts, u64 *action, u8 *queue)
9046 {
9047         return -EINVAL;
9048 }
9049 #endif /* CONFIG_NET_CLS_ACT */
9050
9051 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9052                                     union ixgbe_atr_input *mask,
9053                                     struct tc_cls_u32_offload *cls,
9054                                     struct ixgbe_mat_field *field_ptr,
9055                                     struct ixgbe_nexthdr *nexthdr)
9056 {
9057         int i, j, off;
9058         __be32 val, m;
9059         bool found_entry = false, found_jump_field = false;
9060
9061         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9062                 off = cls->knode.sel->keys[i].off;
9063                 val = cls->knode.sel->keys[i].val;
9064                 m = cls->knode.sel->keys[i].mask;
9065
9066                 for (j = 0; field_ptr[j].val; j++) {
9067                         if (field_ptr[j].off == off) {
9068                                 field_ptr[j].val(input, mask, val, m);
9069                                 input->filter.formatted.flow_type |=
9070                                         field_ptr[j].type;
9071                                 found_entry = true;
9072                                 break;
9073                         }
9074                 }
9075                 if (nexthdr) {
9076                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9077                             nexthdr->val == cls->knode.sel->keys[i].val &&
9078                             nexthdr->mask == cls->knode.sel->keys[i].mask)
9079                                 found_jump_field = true;
9080                         else
9081                                 continue;
9082                 }
9083         }
9084
9085         if (nexthdr && !found_jump_field)
9086                 return -EINVAL;
9087
9088         if (!found_entry)
9089                 return 0;
9090
9091         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9092                                     IXGBE_ATR_L4TYPE_MASK;
9093
9094         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9095                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9096
9097         return 0;
9098 }
9099
9100 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9101                                   struct tc_cls_u32_offload *cls)
9102 {
9103         __be16 protocol = cls->common.protocol;
9104         u32 loc = cls->knode.handle & 0xfffff;
9105         struct ixgbe_hw *hw = &adapter->hw;
9106         struct ixgbe_mat_field *field_ptr;
9107         struct ixgbe_fdir_filter *input = NULL;
9108         union ixgbe_atr_input *mask = NULL;
9109         struct ixgbe_jump_table *jump = NULL;
9110         int i, err = -EINVAL;
9111         u8 queue;
9112         u32 uhtid, link_uhtid;
9113
9114         uhtid = TC_U32_USERHTID(cls->knode.handle);
9115         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9116
9117         /* At the moment cls_u32 jumps to network layer and skips past
9118          * L2 headers. The canonical method to match L2 frames is to use
9119          * negative values. However this is error prone at best but really
9120          * just broken because there is no way to "know" what sort of hdr
9121          * is in front of the network layer. Fix cls_u32 to support L2
9122          * headers when needed.
9123          */
9124         if (protocol != htons(ETH_P_IP))
9125                 return err;
9126
9127         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9128                 e_err(drv, "Location out of range\n");
9129                 return err;
9130         }
9131
9132         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9133          * links and also the fields used to advance the parser across each
9134          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9135          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9136          * To add support for new nodes update ixgbe_model.h parse structures
9137          * this function _should_ be generic try not to hardcode values here.
9138          */
9139         if (uhtid == 0x800) {
9140                 field_ptr = (adapter->jump_tables[0])->mat;
9141         } else {
9142                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9143                         return err;
9144                 if (!adapter->jump_tables[uhtid])
9145                         return err;
9146                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9147         }
9148
9149         if (!field_ptr)
9150                 return err;
9151
9152         /* At this point we know the field_ptr is valid and need to either
9153          * build cls_u32 link or attach filter. Because adding a link to
9154          * a handle that does not exist is invalid and the same for adding
9155          * rules to handles that don't exist.
9156          */
9157
9158         if (link_uhtid) {
9159                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9160
9161                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9162                         return err;
9163
9164                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9165                         return err;
9166
9167                 /* Multiple filters as links to the same hash table are not
9168                  * supported. To add a new filter with the same next header
9169                  * but different match/jump conditions, create a new hash table
9170                  * and link to it.
9171                  */
9172                 if (adapter->jump_tables[link_uhtid] &&
9173                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9174                         e_err(drv, "Link filter exists for link: %x\n",
9175                               link_uhtid);
9176                         return err;
9177                 }
9178
9179                 for (i = 0; nexthdr[i].jump; i++) {
9180                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9181                             nexthdr[i].s != cls->knode.sel->offshift ||
9182                             nexthdr[i].m != cls->knode.sel->offmask)
9183                                 return err;
9184
9185                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9186                         if (!jump)
9187                                 return -ENOMEM;
9188                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9189                         if (!input) {
9190                                 err = -ENOMEM;
9191                                 goto free_jump;
9192                         }
9193                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9194                         if (!mask) {
9195                                 err = -ENOMEM;
9196                                 goto free_input;
9197                         }
9198                         jump->input = input;
9199                         jump->mask = mask;
9200                         jump->link_hdl = cls->knode.handle;
9201
9202                         err = ixgbe_clsu32_build_input(input, mask, cls,
9203                                                        field_ptr, &nexthdr[i]);
9204                         if (!err) {
9205                                 jump->mat = nexthdr[i].jump;
9206                                 adapter->jump_tables[link_uhtid] = jump;
9207                                 break;
9208                         }
9209                 }
9210                 return 0;
9211         }
9212
9213         input = kzalloc(sizeof(*input), GFP_KERNEL);
9214         if (!input)
9215                 return -ENOMEM;
9216         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9217         if (!mask) {
9218                 err = -ENOMEM;
9219                 goto free_input;
9220         }
9221
9222         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9223                 if ((adapter->jump_tables[uhtid])->input)
9224                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9225                                sizeof(*input));
9226                 if ((adapter->jump_tables[uhtid])->mask)
9227                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9228                                sizeof(*mask));
9229
9230                 /* Lookup in all child hash tables if this location is already
9231                  * filled with a filter
9232                  */
9233                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9234                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9235
9236                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9237                                 e_err(drv, "Filter exists in location: %x\n",
9238                                       loc);
9239                                 err = -EINVAL;
9240                                 goto err_out;
9241                         }
9242                 }
9243         }
9244         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9245         if (err)
9246                 goto err_out;
9247
9248         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9249                                &queue);
9250         if (err < 0)
9251                 goto err_out;
9252
9253         input->sw_idx = loc;
9254
9255         spin_lock(&adapter->fdir_perfect_lock);
9256
9257         if (hlist_empty(&adapter->fdir_filter_list)) {
9258                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9259                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9260                 if (err)
9261                         goto err_out_w_lock;
9262         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9263                 err = -EINVAL;
9264                 goto err_out_w_lock;
9265         }
9266
9267         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9268         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9269                                                     input->sw_idx, queue);
9270         if (err)
9271                 goto err_out_w_lock;
9272
9273         ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9274         spin_unlock(&adapter->fdir_perfect_lock);
9275
9276         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9277                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9278
9279         kfree(mask);
9280         return err;
9281 err_out_w_lock:
9282         spin_unlock(&adapter->fdir_perfect_lock);
9283 err_out:
9284         kfree(mask);
9285 free_input:
9286         kfree(input);
9287 free_jump:
9288         kfree(jump);
9289         return err;
9290 }
9291
9292 static int ixgbe_setup_tc_cls_u32(struct net_device *dev,
9293                                   struct tc_cls_u32_offload *cls_u32)
9294 {
9295         struct ixgbe_adapter *adapter = netdev_priv(dev);
9296
9297         if (!is_classid_clsact_ingress(cls_u32->common.classid) ||
9298             cls_u32->common.chain_index)
9299                 return -EOPNOTSUPP;
9300
9301         switch (cls_u32->command) {
9302         case TC_CLSU32_NEW_KNODE:
9303         case TC_CLSU32_REPLACE_KNODE:
9304                 return ixgbe_configure_clsu32(adapter, cls_u32);
9305         case TC_CLSU32_DELETE_KNODE:
9306                 return ixgbe_delete_clsu32(adapter, cls_u32);
9307         case TC_CLSU32_NEW_HNODE:
9308         case TC_CLSU32_REPLACE_HNODE:
9309                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9310         case TC_CLSU32_DELETE_HNODE:
9311                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9312         default:
9313                 return -EOPNOTSUPP;
9314         }
9315 }
9316
9317 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9318                                  struct tc_mqprio_qopt *mqprio)
9319 {
9320         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9321         return ixgbe_setup_tc(dev, mqprio->num_tc);
9322 }
9323
9324 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9325                             void *type_data)
9326 {
9327         switch (type) {
9328         case TC_SETUP_CLSU32:
9329                 return ixgbe_setup_tc_cls_u32(dev, type_data);
9330         case TC_SETUP_MQPRIO:
9331                 return ixgbe_setup_tc_mqprio(dev, type_data);
9332         default:
9333                 return -EOPNOTSUPP;
9334         }
9335 }
9336
9337 #ifdef CONFIG_PCI_IOV
9338 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9339 {
9340         struct net_device *netdev = adapter->netdev;
9341
9342         rtnl_lock();
9343         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
9344         rtnl_unlock();
9345 }
9346
9347 #endif
9348 void ixgbe_do_reset(struct net_device *netdev)
9349 {
9350         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9351
9352         if (netif_running(netdev))
9353                 ixgbe_reinit_locked(adapter);
9354         else
9355                 ixgbe_reset(adapter);
9356 }
9357
9358 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9359                                             netdev_features_t features)
9360 {
9361         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9362
9363         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9364         if (!(features & NETIF_F_RXCSUM))
9365                 features &= ~NETIF_F_LRO;
9366
9367         /* Turn off LRO if not RSC capable */
9368         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9369                 features &= ~NETIF_F_LRO;
9370
9371         return features;
9372 }
9373
9374 static int ixgbe_set_features(struct net_device *netdev,
9375                               netdev_features_t features)
9376 {
9377         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9378         netdev_features_t changed = netdev->features ^ features;
9379         bool need_reset = false;
9380
9381         /* Make sure RSC matches LRO, reset if change */
9382         if (!(features & NETIF_F_LRO)) {
9383                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9384                         need_reset = true;
9385                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9386         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9387                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9388                 if (adapter->rx_itr_setting == 1 ||
9389                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9390                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9391                         need_reset = true;
9392                 } else if ((changed ^ features) & NETIF_F_LRO) {
9393                         e_info(probe, "rx-usecs set too low, "
9394                                "disabling RSC\n");
9395                 }
9396         }
9397
9398         /*
9399          * Check if Flow Director n-tuple support or hw_tc support was
9400          * enabled or disabled.  If the state changed, we need to reset.
9401          */
9402         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9403                 /* turn off ATR, enable perfect filters and reset */
9404                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9405                         need_reset = true;
9406
9407                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9408                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9409         } else {
9410                 /* turn off perfect filters, enable ATR and reset */
9411                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9412                         need_reset = true;
9413
9414                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9415
9416                 /* We cannot enable ATR if SR-IOV is enabled */
9417                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9418                     /* We cannot enable ATR if we have 2 or more tcs */
9419                     (netdev_get_num_tc(netdev) > 1) ||
9420                     /* We cannot enable ATR if RSS is disabled */
9421                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9422                     /* A sample rate of 0 indicates ATR disabled */
9423                     (!adapter->atr_sample_rate))
9424                         ; /* do nothing not supported */
9425                 else /* otherwise supported and set the flag */
9426                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9427         }
9428
9429         if (changed & NETIF_F_RXALL)
9430                 need_reset = true;
9431
9432         netdev->features = features;
9433
9434         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9435                 if (features & NETIF_F_RXCSUM) {
9436                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9437                 } else {
9438                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9439
9440                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9441                 }
9442         }
9443
9444         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9445                 if (features & NETIF_F_RXCSUM) {
9446                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9447                 } else {
9448                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9449
9450                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9451                 }
9452         }
9453
9454         if (need_reset)
9455                 ixgbe_do_reset(netdev);
9456         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9457                             NETIF_F_HW_VLAN_CTAG_FILTER))
9458                 ixgbe_set_rx_mode(netdev);
9459
9460         return 0;
9461 }
9462
9463 /**
9464  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9465  * @dev: The port's netdev
9466  * @ti: Tunnel endpoint information
9467  **/
9468 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9469                                       struct udp_tunnel_info *ti)
9470 {
9471         struct ixgbe_adapter *adapter = netdev_priv(dev);
9472         struct ixgbe_hw *hw = &adapter->hw;
9473         __be16 port = ti->port;
9474         u32 port_shift = 0;
9475         u32 reg;
9476
9477         if (ti->sa_family != AF_INET)
9478                 return;
9479
9480         switch (ti->type) {
9481         case UDP_TUNNEL_TYPE_VXLAN:
9482                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9483                         return;
9484
9485                 if (adapter->vxlan_port == port)
9486                         return;
9487
9488                 if (adapter->vxlan_port) {
9489                         netdev_info(dev,
9490                                     "VXLAN port %d set, not adding port %d\n",
9491                                     ntohs(adapter->vxlan_port),
9492                                     ntohs(port));
9493                         return;
9494                 }
9495
9496                 adapter->vxlan_port = port;
9497                 break;
9498         case UDP_TUNNEL_TYPE_GENEVE:
9499                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9500                         return;
9501
9502                 if (adapter->geneve_port == port)
9503                         return;
9504
9505                 if (adapter->geneve_port) {
9506                         netdev_info(dev,
9507                                     "GENEVE port %d set, not adding port %d\n",
9508                                     ntohs(adapter->geneve_port),
9509                                     ntohs(port));
9510                         return;
9511                 }
9512
9513                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9514                 adapter->geneve_port = port;
9515                 break;
9516         default:
9517                 return;
9518         }
9519
9520         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9521         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9522 }
9523
9524 /**
9525  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9526  * @dev: The port's netdev
9527  * @ti: Tunnel endpoint information
9528  **/
9529 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9530                                       struct udp_tunnel_info *ti)
9531 {
9532         struct ixgbe_adapter *adapter = netdev_priv(dev);
9533         u32 port_mask;
9534
9535         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9536             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9537                 return;
9538
9539         if (ti->sa_family != AF_INET)
9540                 return;
9541
9542         switch (ti->type) {
9543         case UDP_TUNNEL_TYPE_VXLAN:
9544                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9545                         return;
9546
9547                 if (adapter->vxlan_port != ti->port) {
9548                         netdev_info(dev, "VXLAN port %d not found\n",
9549                                     ntohs(ti->port));
9550                         return;
9551                 }
9552
9553                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9554                 break;
9555         case UDP_TUNNEL_TYPE_GENEVE:
9556                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9557                         return;
9558
9559                 if (adapter->geneve_port != ti->port) {
9560                         netdev_info(dev, "GENEVE port %d not found\n",
9561                                     ntohs(ti->port));
9562                         return;
9563                 }
9564
9565                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9566                 break;
9567         default:
9568                 return;
9569         }
9570
9571         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9572         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9573 }
9574
9575 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9576                              struct net_device *dev,
9577                              const unsigned char *addr, u16 vid,
9578                              u16 flags)
9579 {
9580         /* guarantee we can provide a unique filter for the unicast address */
9581         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9582                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9583                 u16 pool = VMDQ_P(0);
9584
9585                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9586                         return -ENOMEM;
9587         }
9588
9589         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9590 }
9591
9592 /**
9593  * ixgbe_configure_bridge_mode - set various bridge modes
9594  * @adapter - the private structure
9595  * @mode - requested bridge mode
9596  *
9597  * Configure some settings require for various bridge modes.
9598  **/
9599 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9600                                        __u16 mode)
9601 {
9602         struct ixgbe_hw *hw = &adapter->hw;
9603         unsigned int p, num_pools;
9604         u32 vmdctl;
9605
9606         switch (mode) {
9607         case BRIDGE_MODE_VEPA:
9608                 /* disable Tx loopback, rely on switch hairpin mode */
9609                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9610
9611                 /* must enable Rx switching replication to allow multicast
9612                  * packet reception on all VFs, and to enable source address
9613                  * pruning.
9614                  */
9615                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9616                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9617                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9618
9619                 /* enable Rx source address pruning. Note, this requires
9620                  * replication to be enabled or else it does nothing.
9621                  */
9622                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9623                 for (p = 0; p < num_pools; p++) {
9624                         if (hw->mac.ops.set_source_address_pruning)
9625                                 hw->mac.ops.set_source_address_pruning(hw,
9626                                                                        true,
9627                                                                        p);
9628                 }
9629                 break;
9630         case BRIDGE_MODE_VEB:
9631                 /* enable Tx loopback for internal VF/PF communication */
9632                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9633                                 IXGBE_PFDTXGSWC_VT_LBEN);
9634
9635                 /* disable Rx switching replication unless we have SR-IOV
9636                  * virtual functions
9637                  */
9638                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9639                 if (!adapter->num_vfs)
9640                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9641                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9642
9643                 /* disable Rx source address pruning, since we don't expect to
9644                  * be receiving external loopback of our transmitted frames.
9645                  */
9646                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9647                 for (p = 0; p < num_pools; p++) {
9648                         if (hw->mac.ops.set_source_address_pruning)
9649                                 hw->mac.ops.set_source_address_pruning(hw,
9650                                                                        false,
9651                                                                        p);
9652                 }
9653                 break;
9654         default:
9655                 return -EINVAL;
9656         }
9657
9658         adapter->bridge_mode = mode;
9659
9660         e_info(drv, "enabling bridge mode: %s\n",
9661                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9662
9663         return 0;
9664 }
9665
9666 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9667                                     struct nlmsghdr *nlh, u16 flags)
9668 {
9669         struct ixgbe_adapter *adapter = netdev_priv(dev);
9670         struct nlattr *attr, *br_spec;
9671         int rem;
9672
9673         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9674                 return -EOPNOTSUPP;
9675
9676         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9677         if (!br_spec)
9678                 return -EINVAL;
9679
9680         nla_for_each_nested(attr, br_spec, rem) {
9681                 int status;
9682                 __u16 mode;
9683
9684                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9685                         continue;
9686
9687                 if (nla_len(attr) < sizeof(mode))
9688                         return -EINVAL;
9689
9690                 mode = nla_get_u16(attr);
9691                 status = ixgbe_configure_bridge_mode(adapter, mode);
9692                 if (status)
9693                         return status;
9694
9695                 break;
9696         }
9697
9698         return 0;
9699 }
9700
9701 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9702                                     struct net_device *dev,
9703                                     u32 filter_mask, int nlflags)
9704 {
9705         struct ixgbe_adapter *adapter = netdev_priv(dev);
9706
9707         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9708                 return 0;
9709
9710         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9711                                        adapter->bridge_mode, 0, 0, nlflags,
9712                                        filter_mask, NULL);
9713 }
9714
9715 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9716 {
9717         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9718         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9719         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9720         unsigned int limit;
9721         int pool, err;
9722
9723         /* Hardware has a limited number of available pools. Each VF, and the
9724          * PF require a pool. Check to ensure we don't attempt to use more
9725          * then the available number of pools.
9726          */
9727         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9728                 return ERR_PTR(-EINVAL);
9729
9730 #ifdef CONFIG_RPS
9731         if (vdev->num_rx_queues != vdev->num_tx_queues) {
9732                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9733                             vdev->name);
9734                 return ERR_PTR(-EINVAL);
9735         }
9736 #endif
9737         /* Check for hardware restriction on number of rx/tx queues */
9738         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9739             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9740                 netdev_info(pdev,
9741                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9742                             pdev->name);
9743                 return ERR_PTR(-EINVAL);
9744         }
9745
9746         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9747               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
9748             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9749                 return ERR_PTR(-EBUSY);
9750
9751         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9752         if (!fwd_adapter)
9753                 return ERR_PTR(-ENOMEM);
9754
9755         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9756         adapter->num_rx_pools++;
9757         set_bit(pool, &adapter->fwd_bitmask);
9758         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9759
9760         /* Enable VMDq flag so device will be set in VM mode */
9761         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9762         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9763         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9764
9765         /* Force reinit of ring allocation with VMDQ enabled */
9766         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9767         if (err)
9768                 goto fwd_add_err;
9769         fwd_adapter->pool = pool;
9770         fwd_adapter->real_adapter = adapter;
9771
9772         if (netif_running(pdev)) {
9773                 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9774                 if (err)
9775                         goto fwd_add_err;
9776                 netif_tx_start_all_queues(vdev);
9777         }
9778
9779         return fwd_adapter;
9780 fwd_add_err:
9781         /* unwind counter and free adapter struct */
9782         netdev_info(pdev,
9783                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9784         clear_bit(pool, &adapter->fwd_bitmask);
9785         adapter->num_rx_pools--;
9786         kfree(fwd_adapter);
9787         return ERR_PTR(err);
9788 }
9789
9790 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9791 {
9792         struct ixgbe_fwd_adapter *fwd_adapter = priv;
9793         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9794         unsigned int limit;
9795
9796         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9797         adapter->num_rx_pools--;
9798
9799         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9800         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9801         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9802         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9803         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9804                    fwd_adapter->pool, adapter->num_rx_pools,
9805                    fwd_adapter->rx_base_queue,
9806                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9807                    adapter->fwd_bitmask);
9808         kfree(fwd_adapter);
9809 }
9810
9811 #define IXGBE_MAX_MAC_HDR_LEN           127
9812 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9813
9814 static netdev_features_t
9815 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9816                      netdev_features_t features)
9817 {
9818         unsigned int network_hdr_len, mac_hdr_len;
9819
9820         /* Make certain the headers can be described by a context descriptor */
9821         mac_hdr_len = skb_network_header(skb) - skb->data;
9822         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9823                 return features & ~(NETIF_F_HW_CSUM |
9824                                     NETIF_F_SCTP_CRC |
9825                                     NETIF_F_HW_VLAN_CTAG_TX |
9826                                     NETIF_F_TSO |
9827                                     NETIF_F_TSO6);
9828
9829         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9830         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9831                 return features & ~(NETIF_F_HW_CSUM |
9832                                     NETIF_F_SCTP_CRC |
9833                                     NETIF_F_TSO |
9834                                     NETIF_F_TSO6);
9835
9836         /* We can only support IPV4 TSO in tunnels if we can mangle the
9837          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9838          */
9839         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9840                 features &= ~NETIF_F_TSO;
9841
9842         return features;
9843 }
9844
9845 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
9846 {
9847         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
9848         struct ixgbe_adapter *adapter = netdev_priv(dev);
9849         struct bpf_prog *old_prog;
9850
9851         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
9852                 return -EINVAL;
9853
9854         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
9855                 return -EINVAL;
9856
9857         /* verify ixgbe ring attributes are sufficient for XDP */
9858         for (i = 0; i < adapter->num_rx_queues; i++) {
9859                 struct ixgbe_ring *ring = adapter->rx_ring[i];
9860
9861                 if (ring_is_rsc_enabled(ring))
9862                         return -EINVAL;
9863
9864                 if (frame_size > ixgbe_rx_bufsz(ring))
9865                         return -EINVAL;
9866         }
9867
9868         if (nr_cpu_ids > MAX_XDP_QUEUES)
9869                 return -ENOMEM;
9870
9871         old_prog = xchg(&adapter->xdp_prog, prog);
9872
9873         /* If transitioning XDP modes reconfigure rings */
9874         if (!!prog != !!old_prog) {
9875                 int err = ixgbe_setup_tc(dev, netdev_get_num_tc(dev));
9876
9877                 if (err) {
9878                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
9879                         return -EINVAL;
9880                 }
9881         } else {
9882                 for (i = 0; i < adapter->num_rx_queues; i++)
9883                         xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
9884         }
9885
9886         if (old_prog)
9887                 bpf_prog_put(old_prog);
9888
9889         return 0;
9890 }
9891
9892 static int ixgbe_xdp(struct net_device *dev, struct netdev_xdp *xdp)
9893 {
9894         struct ixgbe_adapter *adapter = netdev_priv(dev);
9895
9896         switch (xdp->command) {
9897         case XDP_SETUP_PROG:
9898                 return ixgbe_xdp_setup(dev, xdp->prog);
9899         case XDP_QUERY_PROG:
9900                 xdp->prog_attached = !!(adapter->xdp_prog);
9901                 xdp->prog_id = adapter->xdp_prog ?
9902                         adapter->xdp_prog->aux->id : 0;
9903                 return 0;
9904         default:
9905                 return -EINVAL;
9906         }
9907 }
9908
9909 static int ixgbe_xdp_xmit(struct net_device *dev, struct xdp_buff *xdp)
9910 {
9911         struct ixgbe_adapter *adapter = netdev_priv(dev);
9912         struct ixgbe_ring *ring;
9913         int err;
9914
9915         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
9916                 return -ENETDOWN;
9917
9918         /* During program transitions its possible adapter->xdp_prog is assigned
9919          * but ring has not been configured yet. In this case simply abort xmit.
9920          */
9921         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
9922         if (unlikely(!ring))
9923                 return -ENXIO;
9924
9925         err = ixgbe_xmit_xdp_ring(adapter, xdp);
9926         if (err != IXGBE_XDP_TX)
9927                 return -ENOSPC;
9928
9929         return 0;
9930 }
9931
9932 static void ixgbe_xdp_flush(struct net_device *dev)
9933 {
9934         struct ixgbe_adapter *adapter = netdev_priv(dev);
9935         struct ixgbe_ring *ring;
9936
9937         /* Its possible the device went down between xdp xmit and flush so
9938          * we need to ensure device is still up.
9939          */
9940         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
9941                 return;
9942
9943         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
9944         if (unlikely(!ring))
9945                 return;
9946
9947         /* Force memory writes to complete before letting h/w know there
9948          * are new descriptors to fetch.
9949          */
9950         wmb();
9951         writel(ring->next_to_use, ring->tail);
9952
9953         return;
9954 }
9955
9956 static const struct net_device_ops ixgbe_netdev_ops = {
9957         .ndo_open               = ixgbe_open,
9958         .ndo_stop               = ixgbe_close,
9959         .ndo_start_xmit         = ixgbe_xmit_frame,
9960         .ndo_select_queue       = ixgbe_select_queue,
9961         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
9962         .ndo_validate_addr      = eth_validate_addr,
9963         .ndo_set_mac_address    = ixgbe_set_mac,
9964         .ndo_change_mtu         = ixgbe_change_mtu,
9965         .ndo_tx_timeout         = ixgbe_tx_timeout,
9966         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
9967         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
9968         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
9969         .ndo_do_ioctl           = ixgbe_ioctl,
9970         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
9971         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
9972         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
9973         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
9974         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
9975         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
9976         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
9977         .ndo_get_stats64        = ixgbe_get_stats64,
9978         .ndo_setup_tc           = __ixgbe_setup_tc,
9979 #ifdef CONFIG_NET_POLL_CONTROLLER
9980         .ndo_poll_controller    = ixgbe_netpoll,
9981 #endif
9982 #ifdef IXGBE_FCOE
9983         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
9984         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
9985         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
9986         .ndo_fcoe_enable = ixgbe_fcoe_enable,
9987         .ndo_fcoe_disable = ixgbe_fcoe_disable,
9988         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
9989         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
9990 #endif /* IXGBE_FCOE */
9991         .ndo_set_features = ixgbe_set_features,
9992         .ndo_fix_features = ixgbe_fix_features,
9993         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
9994         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
9995         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
9996         .ndo_dfwd_add_station   = ixgbe_fwd_add,
9997         .ndo_dfwd_del_station   = ixgbe_fwd_del,
9998         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
9999         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10000         .ndo_features_check     = ixgbe_features_check,
10001         .ndo_xdp                = ixgbe_xdp,
10002         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10003         .ndo_xdp_flush          = ixgbe_xdp_flush,
10004 };
10005
10006 /**
10007  * ixgbe_enumerate_functions - Get the number of ports this device has
10008  * @adapter: adapter structure
10009  *
10010  * This function enumerates the phsyical functions co-located on a single slot,
10011  * in order to determine how many ports a device has. This is most useful in
10012  * determining the required GT/s of PCIe bandwidth necessary for optimal
10013  * performance.
10014  **/
10015 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10016 {
10017         struct pci_dev *entry, *pdev = adapter->pdev;
10018         int physfns = 0;
10019
10020         /* Some cards can not use the generic count PCIe functions method,
10021          * because they are behind a parent switch, so we hardcode these with
10022          * the correct number of functions.
10023          */
10024         if (ixgbe_pcie_from_parent(&adapter->hw))
10025                 physfns = 4;
10026
10027         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10028                 /* don't count virtual functions */
10029                 if (entry->is_virtfn)
10030                         continue;
10031
10032                 /* When the devices on the bus don't all match our device ID,
10033                  * we can't reliably determine the correct number of
10034                  * functions. This can occur if a function has been direct
10035                  * attached to a virtual machine using VT-d, for example. In
10036                  * this case, simply return -1 to indicate this.
10037                  */
10038                 if ((entry->vendor != pdev->vendor) ||
10039                     (entry->device != pdev->device))
10040                         return -1;
10041
10042                 physfns++;
10043         }
10044
10045         return physfns;
10046 }
10047
10048 /**
10049  * ixgbe_wol_supported - Check whether device supports WoL
10050  * @adapter: the adapter private structure
10051  * @device_id: the device ID
10052  * @subdev_id: the subsystem device ID
10053  *
10054  * This function is used by probe and ethtool to determine
10055  * which devices have WoL support
10056  *
10057  **/
10058 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10059                          u16 subdevice_id)
10060 {
10061         struct ixgbe_hw *hw = &adapter->hw;
10062         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10063
10064         /* WOL not supported on 82598 */
10065         if (hw->mac.type == ixgbe_mac_82598EB)
10066                 return false;
10067
10068         /* check eeprom to see if WOL is enabled for X540 and newer */
10069         if (hw->mac.type >= ixgbe_mac_X540) {
10070                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10071                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10072                      (hw->bus.func == 0)))
10073                         return true;
10074         }
10075
10076         /* WOL is determined based on device IDs for 82599 MACs */
10077         switch (device_id) {
10078         case IXGBE_DEV_ID_82599_SFP:
10079                 /* Only these subdevices could supports WOL */
10080                 switch (subdevice_id) {
10081                 case IXGBE_SUBDEV_ID_82599_560FLR:
10082                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10083                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10084                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10085                         /* only support first port */
10086                         if (hw->bus.func != 0)
10087                                 break;
10088                         /* fall through */
10089                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10090                 case IXGBE_SUBDEV_ID_82599_SFP:
10091                 case IXGBE_SUBDEV_ID_82599_RNDC:
10092                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10093                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10094                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10095                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10096                         return true;
10097                 }
10098                 break;
10099         case IXGBE_DEV_ID_82599EN_SFP:
10100                 /* Only these subdevices support WOL */
10101                 switch (subdevice_id) {
10102                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10103                         return true;
10104                 }
10105                 break;
10106         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10107                 /* All except this subdevice support WOL */
10108                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10109                         return true;
10110                 break;
10111         case IXGBE_DEV_ID_82599_KX4:
10112                 return  true;
10113         default:
10114                 break;
10115         }
10116
10117         return false;
10118 }
10119
10120 /**
10121  * ixgbe_probe - Device Initialization Routine
10122  * @pdev: PCI device information struct
10123  * @ent: entry in ixgbe_pci_tbl
10124  *
10125  * Returns 0 on success, negative on failure
10126  *
10127  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10128  * The OS initialization, configuring of the adapter private structure,
10129  * and a hardware reset occur.
10130  **/
10131 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10132 {
10133         struct net_device *netdev;
10134         struct ixgbe_adapter *adapter = NULL;
10135         struct ixgbe_hw *hw;
10136         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10137         int i, err, pci_using_dac, expected_gts;
10138         unsigned int indices = MAX_TX_QUEUES;
10139         u8 part_str[IXGBE_PBANUM_LENGTH];
10140         bool disable_dev = false;
10141 #ifdef IXGBE_FCOE
10142         u16 device_caps;
10143 #endif
10144         u32 eec;
10145
10146         /* Catch broken hardware that put the wrong VF device ID in
10147          * the PCIe SR-IOV capability.
10148          */
10149         if (pdev->is_virtfn) {
10150                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10151                      pci_name(pdev), pdev->vendor, pdev->device);
10152                 return -EINVAL;
10153         }
10154
10155         err = pci_enable_device_mem(pdev);
10156         if (err)
10157                 return err;
10158
10159         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10160                 pci_using_dac = 1;
10161         } else {
10162                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10163                 if (err) {
10164                         dev_err(&pdev->dev,
10165                                 "No usable DMA configuration, aborting\n");
10166                         goto err_dma;
10167                 }
10168                 pci_using_dac = 0;
10169         }
10170
10171         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10172         if (err) {
10173                 dev_err(&pdev->dev,
10174                         "pci_request_selected_regions failed 0x%x\n", err);
10175                 goto err_pci_reg;
10176         }
10177
10178         pci_enable_pcie_error_reporting(pdev);
10179
10180         pci_set_master(pdev);
10181         pci_save_state(pdev);
10182
10183         if (ii->mac == ixgbe_mac_82598EB) {
10184 #ifdef CONFIG_IXGBE_DCB
10185                 /* 8 TC w/ 4 queues per TC */
10186                 indices = 4 * MAX_TRAFFIC_CLASS;
10187 #else
10188                 indices = IXGBE_MAX_RSS_INDICES;
10189 #endif
10190         }
10191
10192         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10193         if (!netdev) {
10194                 err = -ENOMEM;
10195                 goto err_alloc_etherdev;
10196         }
10197
10198         SET_NETDEV_DEV(netdev, &pdev->dev);
10199
10200         adapter = netdev_priv(netdev);
10201
10202         adapter->netdev = netdev;
10203         adapter->pdev = pdev;
10204         hw = &adapter->hw;
10205         hw->back = adapter;
10206         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10207
10208         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10209                               pci_resource_len(pdev, 0));
10210         adapter->io_addr = hw->hw_addr;
10211         if (!hw->hw_addr) {
10212                 err = -EIO;
10213                 goto err_ioremap;
10214         }
10215
10216         netdev->netdev_ops = &ixgbe_netdev_ops;
10217         ixgbe_set_ethtool_ops(netdev);
10218         netdev->watchdog_timeo = 5 * HZ;
10219         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10220
10221         /* Setup hw api */
10222         hw->mac.ops   = *ii->mac_ops;
10223         hw->mac.type  = ii->mac;
10224         hw->mvals     = ii->mvals;
10225         if (ii->link_ops)
10226                 hw->link.ops  = *ii->link_ops;
10227
10228         /* EEPROM */
10229         hw->eeprom.ops = *ii->eeprom_ops;
10230         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10231         if (ixgbe_removed(hw->hw_addr)) {
10232                 err = -EIO;
10233                 goto err_ioremap;
10234         }
10235         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10236         if (!(eec & BIT(8)))
10237                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10238
10239         /* PHY */
10240         hw->phy.ops = *ii->phy_ops;
10241         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10242         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10243         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10244         hw->phy.mdio.mmds = 0;
10245         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10246         hw->phy.mdio.dev = netdev;
10247         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10248         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10249
10250         /* setup the private structure */
10251         err = ixgbe_sw_init(adapter, ii);
10252         if (err)
10253                 goto err_sw_init;
10254
10255         /* Make sure the SWFW semaphore is in a valid state */
10256         if (hw->mac.ops.init_swfw_sync)
10257                 hw->mac.ops.init_swfw_sync(hw);
10258
10259         /* Make it possible the adapter to be woken up via WOL */
10260         switch (adapter->hw.mac.type) {
10261         case ixgbe_mac_82599EB:
10262         case ixgbe_mac_X540:
10263         case ixgbe_mac_X550:
10264         case ixgbe_mac_X550EM_x:
10265         case ixgbe_mac_x550em_a:
10266                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10267                 break;
10268         default:
10269                 break;
10270         }
10271
10272         /*
10273          * If there is a fan on this device and it has failed log the
10274          * failure.
10275          */
10276         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10277                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10278                 if (esdp & IXGBE_ESDP_SDP1)
10279                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10280         }
10281
10282         if (allow_unsupported_sfp)
10283                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10284
10285         /* reset_hw fills in the perm_addr as well */
10286         hw->phy.reset_if_overtemp = true;
10287         err = hw->mac.ops.reset_hw(hw);
10288         hw->phy.reset_if_overtemp = false;
10289         ixgbe_set_eee_capable(adapter);
10290         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10291                 err = 0;
10292         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10293                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10294                 e_dev_err("Reload the driver after installing a supported module.\n");
10295                 goto err_sw_init;
10296         } else if (err) {
10297                 e_dev_err("HW Init failed: %d\n", err);
10298                 goto err_sw_init;
10299         }
10300
10301 #ifdef CONFIG_PCI_IOV
10302         /* SR-IOV not supported on the 82598 */
10303         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10304                 goto skip_sriov;
10305         /* Mailbox */
10306         ixgbe_init_mbx_params_pf(hw);
10307         hw->mbx.ops = ii->mbx_ops;
10308         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10309         ixgbe_enable_sriov(adapter, max_vfs);
10310 skip_sriov:
10311
10312 #endif
10313         netdev->features = NETIF_F_SG |
10314                            NETIF_F_TSO |
10315                            NETIF_F_TSO6 |
10316                            NETIF_F_RXHASH |
10317                            NETIF_F_RXCSUM |
10318                            NETIF_F_HW_CSUM;
10319
10320 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10321                                     NETIF_F_GSO_GRE_CSUM | \
10322                                     NETIF_F_GSO_IPXIP4 | \
10323                                     NETIF_F_GSO_IPXIP6 | \
10324                                     NETIF_F_GSO_UDP_TUNNEL | \
10325                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10326
10327         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10328         netdev->features |= NETIF_F_GSO_PARTIAL |
10329                             IXGBE_GSO_PARTIAL_FEATURES;
10330
10331         if (hw->mac.type >= ixgbe_mac_82599EB)
10332                 netdev->features |= NETIF_F_SCTP_CRC;
10333
10334         /* copy netdev features into list of user selectable features */
10335         netdev->hw_features |= netdev->features |
10336                                NETIF_F_HW_VLAN_CTAG_FILTER |
10337                                NETIF_F_HW_VLAN_CTAG_RX |
10338                                NETIF_F_HW_VLAN_CTAG_TX |
10339                                NETIF_F_RXALL |
10340                                NETIF_F_HW_L2FW_DOFFLOAD;
10341
10342         if (hw->mac.type >= ixgbe_mac_82599EB)
10343                 netdev->hw_features |= NETIF_F_NTUPLE |
10344                                        NETIF_F_HW_TC;
10345
10346         if (pci_using_dac)
10347                 netdev->features |= NETIF_F_HIGHDMA;
10348
10349         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10350         netdev->hw_enc_features |= netdev->vlan_features;
10351         netdev->mpls_features |= NETIF_F_SG |
10352                                  NETIF_F_TSO |
10353                                  NETIF_F_TSO6 |
10354                                  NETIF_F_HW_CSUM;
10355         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10356
10357         /* set this bit last since it cannot be part of vlan_features */
10358         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10359                             NETIF_F_HW_VLAN_CTAG_RX |
10360                             NETIF_F_HW_VLAN_CTAG_TX;
10361
10362         netdev->priv_flags |= IFF_UNICAST_FLT;
10363         netdev->priv_flags |= IFF_SUPP_NOFCS;
10364
10365         /* MTU range: 68 - 9710 */
10366         netdev->min_mtu = ETH_MIN_MTU;
10367         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10368
10369 #ifdef CONFIG_IXGBE_DCB
10370         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10371                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10372 #endif
10373
10374 #ifdef IXGBE_FCOE
10375         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10376                 unsigned int fcoe_l;
10377
10378                 if (hw->mac.ops.get_device_caps) {
10379                         hw->mac.ops.get_device_caps(hw, &device_caps);
10380                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10381                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10382                 }
10383
10384
10385                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10386                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10387
10388                 netdev->features |= NETIF_F_FSO |
10389                                     NETIF_F_FCOE_CRC;
10390
10391                 netdev->vlan_features |= NETIF_F_FSO |
10392                                          NETIF_F_FCOE_CRC |
10393                                          NETIF_F_FCOE_MTU;
10394         }
10395 #endif /* IXGBE_FCOE */
10396
10397         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10398                 netdev->hw_features |= NETIF_F_LRO;
10399         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10400                 netdev->features |= NETIF_F_LRO;
10401
10402         /* make sure the EEPROM is good */
10403         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10404                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10405                 err = -EIO;
10406                 goto err_sw_init;
10407         }
10408
10409         eth_platform_get_mac_address(&adapter->pdev->dev,
10410                                      adapter->hw.mac.perm_addr);
10411
10412         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10413
10414         if (!is_valid_ether_addr(netdev->dev_addr)) {
10415                 e_dev_err("invalid MAC address\n");
10416                 err = -EIO;
10417                 goto err_sw_init;
10418         }
10419
10420         /* Set hw->mac.addr to permanent MAC address */
10421         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10422         ixgbe_mac_set_default_filter(adapter);
10423
10424         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
10425                     (unsigned long) adapter);
10426
10427         if (ixgbe_removed(hw->hw_addr)) {
10428                 err = -EIO;
10429                 goto err_sw_init;
10430         }
10431         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10432         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10433         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10434
10435         err = ixgbe_init_interrupt_scheme(adapter);
10436         if (err)
10437                 goto err_sw_init;
10438
10439         for (i = 0; i < adapter->num_rx_queues; i++)
10440                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10441         for (i = 0; i < adapter->num_tx_queues; i++)
10442                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10443         for (i = 0; i < adapter->num_xdp_queues; i++)
10444                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10445
10446         /* WOL not supported for all devices */
10447         adapter->wol = 0;
10448         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10449         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10450                                                 pdev->subsystem_device);
10451         if (hw->wol_enabled)
10452                 adapter->wol = IXGBE_WUFC_MAG;
10453
10454         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10455
10456         /* save off EEPROM version number */
10457         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
10458         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
10459
10460         /* pick up the PCI bus settings for reporting later */
10461         if (ixgbe_pcie_from_parent(hw))
10462                 ixgbe_get_parent_bus_info(adapter);
10463         else
10464                  hw->mac.ops.get_bus_info(hw);
10465
10466         /* calculate the expected PCIe bandwidth required for optimal
10467          * performance. Note that some older parts will never have enough
10468          * bandwidth due to being older generation PCIe parts. We clamp these
10469          * parts to ensure no warning is displayed if it can't be fixed.
10470          */
10471         switch (hw->mac.type) {
10472         case ixgbe_mac_82598EB:
10473                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10474                 break;
10475         default:
10476                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10477                 break;
10478         }
10479
10480         /* don't check link if we failed to enumerate functions */
10481         if (expected_gts > 0)
10482                 ixgbe_check_minimum_link(adapter, expected_gts);
10483
10484         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10485         if (err)
10486                 strlcpy(part_str, "Unknown", sizeof(part_str));
10487         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10488                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10489                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10490                            part_str);
10491         else
10492                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10493                            hw->mac.type, hw->phy.type, part_str);
10494
10495         e_dev_info("%pM\n", netdev->dev_addr);
10496
10497         /* reset the hardware with the new settings */
10498         err = hw->mac.ops.start_hw(hw);
10499         if (err == IXGBE_ERR_EEPROM_VERSION) {
10500                 /* We are running on a pre-production device, log a warning */
10501                 e_dev_warn("This device is a pre-production adapter/LOM. "
10502                            "Please be aware there may be issues associated "
10503                            "with your hardware.  If you are experiencing "
10504                            "problems please contact your Intel or hardware "
10505                            "representative who provided you with this "
10506                            "hardware.\n");
10507         }
10508         strcpy(netdev->name, "eth%d");
10509         pci_set_drvdata(pdev, adapter);
10510         err = register_netdev(netdev);
10511         if (err)
10512                 goto err_register;
10513
10514
10515         /* power down the optics for 82599 SFP+ fiber */
10516         if (hw->mac.ops.disable_tx_laser)
10517                 hw->mac.ops.disable_tx_laser(hw);
10518
10519         /* carrier off reporting is important to ethtool even BEFORE open */
10520         netif_carrier_off(netdev);
10521
10522 #ifdef CONFIG_IXGBE_DCA
10523         if (dca_add_requester(&pdev->dev) == 0) {
10524                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10525                 ixgbe_setup_dca(adapter);
10526         }
10527 #endif
10528         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10529                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10530                 for (i = 0; i < adapter->num_vfs; i++)
10531                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
10532         }
10533
10534         /* firmware requires driver version to be 0xFFFFFFFF
10535          * since os does not support feature
10536          */
10537         if (hw->mac.ops.set_fw_drv_ver)
10538                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10539                                            sizeof(ixgbe_driver_version) - 1,
10540                                            ixgbe_driver_version);
10541
10542         /* add san mac addr to netdev */
10543         ixgbe_add_sanmac_netdev(netdev);
10544
10545         e_dev_info("%s\n", ixgbe_default_device_descr);
10546
10547 #ifdef CONFIG_IXGBE_HWMON
10548         if (ixgbe_sysfs_init(adapter))
10549                 e_err(probe, "failed to allocate sysfs resources\n");
10550 #endif /* CONFIG_IXGBE_HWMON */
10551
10552         ixgbe_dbg_adapter_init(adapter);
10553
10554         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10555         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10556                 hw->mac.ops.setup_link(hw,
10557                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10558                         true);
10559
10560         return 0;
10561
10562 err_register:
10563         ixgbe_release_hw_control(adapter);
10564         ixgbe_clear_interrupt_scheme(adapter);
10565 err_sw_init:
10566         ixgbe_disable_sriov(adapter);
10567         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10568         iounmap(adapter->io_addr);
10569         kfree(adapter->jump_tables[0]);
10570         kfree(adapter->mac_table);
10571         kfree(adapter->rss_key);
10572 err_ioremap:
10573         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10574         free_netdev(netdev);
10575 err_alloc_etherdev:
10576         pci_disable_pcie_error_reporting(pdev);
10577         pci_release_mem_regions(pdev);
10578 err_pci_reg:
10579 err_dma:
10580         if (!adapter || disable_dev)
10581                 pci_disable_device(pdev);
10582         return err;
10583 }
10584
10585 /**
10586  * ixgbe_remove - Device Removal Routine
10587  * @pdev: PCI device information struct
10588  *
10589  * ixgbe_remove is called by the PCI subsystem to alert the driver
10590  * that it should release a PCI device.  The could be caused by a
10591  * Hot-Plug event, or because the driver is going to be removed from
10592  * memory.
10593  **/
10594 static void ixgbe_remove(struct pci_dev *pdev)
10595 {
10596         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10597         struct net_device *netdev;
10598         bool disable_dev;
10599         int i;
10600
10601         /* if !adapter then we already cleaned up in probe */
10602         if (!adapter)
10603                 return;
10604
10605         netdev  = adapter->netdev;
10606         ixgbe_dbg_adapter_exit(adapter);
10607
10608         set_bit(__IXGBE_REMOVING, &adapter->state);
10609         cancel_work_sync(&adapter->service_task);
10610
10611
10612 #ifdef CONFIG_IXGBE_DCA
10613         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10614                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10615                 dca_remove_requester(&pdev->dev);
10616                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10617                                 IXGBE_DCA_CTRL_DCA_DISABLE);
10618         }
10619
10620 #endif
10621 #ifdef CONFIG_IXGBE_HWMON
10622         ixgbe_sysfs_exit(adapter);
10623 #endif /* CONFIG_IXGBE_HWMON */
10624
10625         /* remove the added san mac */
10626         ixgbe_del_sanmac_netdev(netdev);
10627
10628 #ifdef CONFIG_PCI_IOV
10629         ixgbe_disable_sriov(adapter);
10630 #endif
10631         if (netdev->reg_state == NETREG_REGISTERED)
10632                 unregister_netdev(netdev);
10633
10634         ixgbe_clear_interrupt_scheme(adapter);
10635
10636         ixgbe_release_hw_control(adapter);
10637
10638 #ifdef CONFIG_DCB
10639         kfree(adapter->ixgbe_ieee_pfc);
10640         kfree(adapter->ixgbe_ieee_ets);
10641
10642 #endif
10643         iounmap(adapter->io_addr);
10644         pci_release_mem_regions(pdev);
10645
10646         e_dev_info("complete\n");
10647
10648         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10649                 if (adapter->jump_tables[i]) {
10650                         kfree(adapter->jump_tables[i]->input);
10651                         kfree(adapter->jump_tables[i]->mask);
10652                 }
10653                 kfree(adapter->jump_tables[i]);
10654         }
10655
10656         kfree(adapter->mac_table);
10657         kfree(adapter->rss_key);
10658         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10659         free_netdev(netdev);
10660
10661         pci_disable_pcie_error_reporting(pdev);
10662
10663         if (disable_dev)
10664                 pci_disable_device(pdev);
10665 }
10666
10667 /**
10668  * ixgbe_io_error_detected - called when PCI error is detected
10669  * @pdev: Pointer to PCI device
10670  * @state: The current pci connection state
10671  *
10672  * This function is called after a PCI bus error affecting
10673  * this device has been detected.
10674  */
10675 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10676                                                 pci_channel_state_t state)
10677 {
10678         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10679         struct net_device *netdev = adapter->netdev;
10680
10681 #ifdef CONFIG_PCI_IOV
10682         struct ixgbe_hw *hw = &adapter->hw;
10683         struct pci_dev *bdev, *vfdev;
10684         u32 dw0, dw1, dw2, dw3;
10685         int vf, pos;
10686         u16 req_id, pf_func;
10687
10688         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10689             adapter->num_vfs == 0)
10690                 goto skip_bad_vf_detection;
10691
10692         bdev = pdev->bus->self;
10693         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10694                 bdev = bdev->bus->self;
10695
10696         if (!bdev)
10697                 goto skip_bad_vf_detection;
10698
10699         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10700         if (!pos)
10701                 goto skip_bad_vf_detection;
10702
10703         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10704         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10705         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10706         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10707         if (ixgbe_removed(hw->hw_addr))
10708                 goto skip_bad_vf_detection;
10709
10710         req_id = dw1 >> 16;
10711         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10712         if (!(req_id & 0x0080))
10713                 goto skip_bad_vf_detection;
10714
10715         pf_func = req_id & 0x01;
10716         if ((pf_func & 1) == (pdev->devfn & 1)) {
10717                 unsigned int device_id;
10718
10719                 vf = (req_id & 0x7F) >> 1;
10720                 e_dev_err("VF %d has caused a PCIe error\n", vf);
10721                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10722                                 "%8.8x\tdw3: %8.8x\n",
10723                 dw0, dw1, dw2, dw3);
10724                 switch (adapter->hw.mac.type) {
10725                 case ixgbe_mac_82599EB:
10726                         device_id = IXGBE_82599_VF_DEVICE_ID;
10727                         break;
10728                 case ixgbe_mac_X540:
10729                         device_id = IXGBE_X540_VF_DEVICE_ID;
10730                         break;
10731                 case ixgbe_mac_X550:
10732                         device_id = IXGBE_DEV_ID_X550_VF;
10733                         break;
10734                 case ixgbe_mac_X550EM_x:
10735                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
10736                         break;
10737                 case ixgbe_mac_x550em_a:
10738                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
10739                         break;
10740                 default:
10741                         device_id = 0;
10742                         break;
10743                 }
10744
10745                 /* Find the pci device of the offending VF */
10746                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10747                 while (vfdev) {
10748                         if (vfdev->devfn == (req_id & 0xFF))
10749                                 break;
10750                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10751                                                device_id, vfdev);
10752                 }
10753                 /*
10754                  * There's a slim chance the VF could have been hot plugged,
10755                  * so if it is no longer present we don't need to issue the
10756                  * VFLR.  Just clean up the AER in that case.
10757                  */
10758                 if (vfdev) {
10759                         pcie_flr(vfdev);
10760                         /* Free device reference count */
10761                         pci_dev_put(vfdev);
10762                 }
10763
10764                 pci_cleanup_aer_uncorrect_error_status(pdev);
10765         }
10766
10767         /*
10768          * Even though the error may have occurred on the other port
10769          * we still need to increment the vf error reference count for
10770          * both ports because the I/O resume function will be called
10771          * for both of them.
10772          */
10773         adapter->vferr_refcount++;
10774
10775         return PCI_ERS_RESULT_RECOVERED;
10776
10777 skip_bad_vf_detection:
10778 #endif /* CONFIG_PCI_IOV */
10779         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10780                 return PCI_ERS_RESULT_DISCONNECT;
10781
10782         rtnl_lock();
10783         netif_device_detach(netdev);
10784
10785         if (state == pci_channel_io_perm_failure) {
10786                 rtnl_unlock();
10787                 return PCI_ERS_RESULT_DISCONNECT;
10788         }
10789
10790         if (netif_running(netdev))
10791                 ixgbe_close_suspend(adapter);
10792
10793         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10794                 pci_disable_device(pdev);
10795         rtnl_unlock();
10796
10797         /* Request a slot reset. */
10798         return PCI_ERS_RESULT_NEED_RESET;
10799 }
10800
10801 /**
10802  * ixgbe_io_slot_reset - called after the pci bus has been reset.
10803  * @pdev: Pointer to PCI device
10804  *
10805  * Restart the card from scratch, as if from a cold-boot.
10806  */
10807 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10808 {
10809         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10810         pci_ers_result_t result;
10811         int err;
10812
10813         if (pci_enable_device_mem(pdev)) {
10814                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10815                 result = PCI_ERS_RESULT_DISCONNECT;
10816         } else {
10817                 smp_mb__before_atomic();
10818                 clear_bit(__IXGBE_DISABLED, &adapter->state);
10819                 adapter->hw.hw_addr = adapter->io_addr;
10820                 pci_set_master(pdev);
10821                 pci_restore_state(pdev);
10822                 pci_save_state(pdev);
10823
10824                 pci_wake_from_d3(pdev, false);
10825
10826                 ixgbe_reset(adapter);
10827                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10828                 result = PCI_ERS_RESULT_RECOVERED;
10829         }
10830
10831         err = pci_cleanup_aer_uncorrect_error_status(pdev);
10832         if (err) {
10833                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10834                           "failed 0x%0x\n", err);
10835                 /* non-fatal, continue */
10836         }
10837
10838         return result;
10839 }
10840
10841 /**
10842  * ixgbe_io_resume - called when traffic can start flowing again.
10843  * @pdev: Pointer to PCI device
10844  *
10845  * This callback is called when the error recovery driver tells us that
10846  * its OK to resume normal operation.
10847  */
10848 static void ixgbe_io_resume(struct pci_dev *pdev)
10849 {
10850         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10851         struct net_device *netdev = adapter->netdev;
10852
10853 #ifdef CONFIG_PCI_IOV
10854         if (adapter->vferr_refcount) {
10855                 e_info(drv, "Resuming after VF err\n");
10856                 adapter->vferr_refcount--;
10857                 return;
10858         }
10859
10860 #endif
10861         rtnl_lock();
10862         if (netif_running(netdev))
10863                 ixgbe_open(netdev);
10864
10865         netif_device_attach(netdev);
10866         rtnl_unlock();
10867 }
10868
10869 static const struct pci_error_handlers ixgbe_err_handler = {
10870         .error_detected = ixgbe_io_error_detected,
10871         .slot_reset = ixgbe_io_slot_reset,
10872         .resume = ixgbe_io_resume,
10873 };
10874
10875 static struct pci_driver ixgbe_driver = {
10876         .name     = ixgbe_driver_name,
10877         .id_table = ixgbe_pci_tbl,
10878         .probe    = ixgbe_probe,
10879         .remove   = ixgbe_remove,
10880 #ifdef CONFIG_PM
10881         .suspend  = ixgbe_suspend,
10882         .resume   = ixgbe_resume,
10883 #endif
10884         .shutdown = ixgbe_shutdown,
10885         .sriov_configure = ixgbe_pci_sriov_configure,
10886         .err_handler = &ixgbe_err_handler
10887 };
10888
10889 /**
10890  * ixgbe_init_module - Driver Registration Routine
10891  *
10892  * ixgbe_init_module is the first routine called when the driver is
10893  * loaded. All it does is register with the PCI subsystem.
10894  **/
10895 static int __init ixgbe_init_module(void)
10896 {
10897         int ret;
10898         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10899         pr_info("%s\n", ixgbe_copyright);
10900
10901         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10902         if (!ixgbe_wq) {
10903                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
10904                 return -ENOMEM;
10905         }
10906
10907         ixgbe_dbg_init();
10908
10909         ret = pci_register_driver(&ixgbe_driver);
10910         if (ret) {
10911                 destroy_workqueue(ixgbe_wq);
10912                 ixgbe_dbg_exit();
10913                 return ret;
10914         }
10915
10916 #ifdef CONFIG_IXGBE_DCA
10917         dca_register_notify(&dca_notifier);
10918 #endif
10919
10920         return 0;
10921 }
10922
10923 module_init(ixgbe_init_module);
10924
10925 /**
10926  * ixgbe_exit_module - Driver Exit Cleanup Routine
10927  *
10928  * ixgbe_exit_module is called just before the driver is removed
10929  * from memory.
10930  **/
10931 static void __exit ixgbe_exit_module(void)
10932 {
10933 #ifdef CONFIG_IXGBE_DCA
10934         dca_unregister_notify(&dca_notifier);
10935 #endif
10936         pci_unregister_driver(&ixgbe_driver);
10937
10938         ixgbe_dbg_exit();
10939         if (ixgbe_wq) {
10940                 destroy_workqueue(ixgbe_wq);
10941                 ixgbe_wq = NULL;
10942         }
10943 }
10944
10945 #ifdef CONFIG_IXGBE_DCA
10946 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
10947                             void *p)
10948 {
10949         int ret_val;
10950
10951         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
10952                                          __ixgbe_notify_dca);
10953
10954         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
10955 }
10956
10957 #endif /* CONFIG_IXGBE_DCA */
10958
10959 module_exit(ixgbe_exit_module);
10960
10961 /* ixgbe_main.c */