1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2015 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #include <linux/if_macvlan.h>
50 #include <linux/if_bridge.h>
51 #include <linux/prefetch.h>
52 #include <scsi/fc/fc_fcoe.h>
53 #include <net/vxlan.h>
56 #include <linux/of_net.h>
60 #include <asm/idprom.h>
65 #include "ixgbe_common.h"
66 #include "ixgbe_dcb_82599.h"
67 #include "ixgbe_sriov.h"
68 #ifdef CONFIG_IXGBE_VXLAN
69 #include <net/vxlan.h>
72 char ixgbe_driver_name[] = "ixgbe";
73 static const char ixgbe_driver_string[] =
74 "Intel(R) 10 Gigabit PCI Express Network Driver";
76 char ixgbe_default_device_descr[] =
77 "Intel(R) 10 Gigabit Network Connection";
79 static char ixgbe_default_device_descr[] =
80 "Intel(R) 10 Gigabit Network Connection";
82 #define DRV_VERSION "4.2.1-k"
83 const char ixgbe_driver_version[] = DRV_VERSION;
84 static const char ixgbe_copyright[] =
85 "Copyright (c) 1999-2015 Intel Corporation.";
87 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
89 static const struct ixgbe_info *ixgbe_info_tbl[] = {
90 [board_82598] = &ixgbe_82598_info,
91 [board_82599] = &ixgbe_82599_info,
92 [board_X540] = &ixgbe_X540_info,
93 [board_X550] = &ixgbe_X550_info,
94 [board_X550EM_x] = &ixgbe_X550EM_x_info,
97 /* ixgbe_pci_tbl - PCI Device ID Table
99 * Wildcard entries (PCI_ANY_ID) should come last
100 * Last entry must be all 0s
102 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
103 * Class, Class Mask, private data (not used) }
105 static const struct pci_device_id ixgbe_pci_tbl[] = {
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
128 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
129 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
130 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
131 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
132 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
133 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
134 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
135 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
136 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
137 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
138 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
139 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
140 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
141 /* required last entry */
144 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
146 #ifdef CONFIG_IXGBE_DCA
147 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
149 static struct notifier_block dca_notifier = {
150 .notifier_call = ixgbe_notify_dca,
156 #ifdef CONFIG_PCI_IOV
157 static unsigned int max_vfs;
158 module_param(max_vfs, uint, 0);
159 MODULE_PARM_DESC(max_vfs,
160 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
161 #endif /* CONFIG_PCI_IOV */
163 static unsigned int allow_unsupported_sfp;
164 module_param(allow_unsupported_sfp, uint, 0);
165 MODULE_PARM_DESC(allow_unsupported_sfp,
166 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
168 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
169 static int debug = -1;
170 module_param(debug, int, 0);
171 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
173 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
174 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
175 MODULE_LICENSE("GPL");
176 MODULE_VERSION(DRV_VERSION);
178 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
180 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
183 struct pci_dev *parent_dev;
184 struct pci_bus *parent_bus;
186 parent_bus = adapter->pdev->bus->parent;
190 parent_dev = parent_bus->self;
194 if (!pci_is_pcie(parent_dev))
197 pcie_capability_read_word(parent_dev, reg, value);
198 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
199 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
204 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
206 struct ixgbe_hw *hw = &adapter->hw;
210 hw->bus.type = ixgbe_bus_type_pci_express;
212 /* Get the negotiated link width and speed from PCI config space of the
213 * parent, as this device is behind a switch
215 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
217 /* assume caller will handle error case */
221 hw->bus.width = ixgbe_convert_bus_width(link_status);
222 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
228 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
229 * @hw: hw specific details
231 * This function is used by probe to determine whether a device's PCI-Express
232 * bandwidth details should be gathered from the parent bus instead of from the
233 * device. Used to ensure that various locations all have the correct device ID
236 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
238 switch (hw->device_id) {
239 case IXGBE_DEV_ID_82599_SFP_SF_QP:
240 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
247 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
250 struct ixgbe_hw *hw = &adapter->hw;
252 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
253 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
254 struct pci_dev *pdev;
256 /* Some devices are not connected over PCIe and thus do not negotiate
257 * speed. These devices do not have valid bus info, and thus any report
258 * we generate may not be correct.
260 if (hw->bus.type == ixgbe_bus_type_internal)
263 /* determine whether to use the parent device */
264 if (ixgbe_pcie_from_parent(&adapter->hw))
265 pdev = adapter->pdev->bus->parent->self;
267 pdev = adapter->pdev;
269 if (pcie_get_minimum_link(pdev, &speed, &width) ||
270 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
271 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
276 case PCIE_SPEED_2_5GT:
277 /* 8b/10b encoding reduces max throughput by 20% */
280 case PCIE_SPEED_5_0GT:
281 /* 8b/10b encoding reduces max throughput by 20% */
284 case PCIE_SPEED_8_0GT:
285 /* 128b/130b encoding reduces throughput by less than 2% */
289 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
293 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
295 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
296 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
297 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
298 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
301 (speed == PCIE_SPEED_2_5GT ? "20%" :
302 speed == PCIE_SPEED_5_0GT ? "20%" :
303 speed == PCIE_SPEED_8_0GT ? "<2%" :
306 if (max_gts < expected_gts) {
307 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
308 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
310 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
314 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
316 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
317 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
318 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
319 schedule_work(&adapter->service_task);
322 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
324 struct ixgbe_adapter *adapter = hw->back;
329 e_dev_err("Adapter removed\n");
330 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
331 ixgbe_service_event_schedule(adapter);
334 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
338 /* The following check not only optimizes a bit by not
339 * performing a read on the status register when the
340 * register just read was a status register read that
341 * returned IXGBE_FAILED_READ_REG. It also blocks any
342 * potential recursion.
344 if (reg == IXGBE_STATUS) {
345 ixgbe_remove_adapter(hw);
348 value = ixgbe_read_reg(hw, IXGBE_STATUS);
349 if (value == IXGBE_FAILED_READ_REG)
350 ixgbe_remove_adapter(hw);
354 * ixgbe_read_reg - Read from device register
355 * @hw: hw specific details
356 * @reg: offset of register to read
358 * Returns : value read or IXGBE_FAILED_READ_REG if removed
360 * This function is used to read device registers. It checks for device
361 * removal by confirming any read that returns all ones by checking the
362 * status register value for all ones. This function avoids reading from
363 * the hardware if a removal was previously detected in which case it
364 * returns IXGBE_FAILED_READ_REG (all ones).
366 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
368 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
371 if (ixgbe_removed(reg_addr))
372 return IXGBE_FAILED_READ_REG;
373 value = readl(reg_addr + reg);
374 if (unlikely(value == IXGBE_FAILED_READ_REG))
375 ixgbe_check_remove(hw, reg);
379 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
383 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
384 if (value == IXGBE_FAILED_READ_CFG_WORD) {
385 ixgbe_remove_adapter(hw);
391 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
393 struct ixgbe_adapter *adapter = hw->back;
396 if (ixgbe_removed(hw->hw_addr))
397 return IXGBE_FAILED_READ_CFG_WORD;
398 pci_read_config_word(adapter->pdev, reg, &value);
399 if (value == IXGBE_FAILED_READ_CFG_WORD &&
400 ixgbe_check_cfg_remove(hw, adapter->pdev))
401 return IXGBE_FAILED_READ_CFG_WORD;
405 #ifdef CONFIG_PCI_IOV
406 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
408 struct ixgbe_adapter *adapter = hw->back;
411 if (ixgbe_removed(hw->hw_addr))
412 return IXGBE_FAILED_READ_CFG_DWORD;
413 pci_read_config_dword(adapter->pdev, reg, &value);
414 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
415 ixgbe_check_cfg_remove(hw, adapter->pdev))
416 return IXGBE_FAILED_READ_CFG_DWORD;
419 #endif /* CONFIG_PCI_IOV */
421 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
423 struct ixgbe_adapter *adapter = hw->back;
425 if (ixgbe_removed(hw->hw_addr))
427 pci_write_config_word(adapter->pdev, reg, value);
430 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
432 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
434 /* flush memory to make sure state is correct before next watchdog */
435 smp_mb__before_atomic();
436 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
439 struct ixgbe_reg_info {
444 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
446 /* General Registers */
447 {IXGBE_CTRL, "CTRL"},
448 {IXGBE_STATUS, "STATUS"},
449 {IXGBE_CTRL_EXT, "CTRL_EXT"},
451 /* Interrupt Registers */
452 {IXGBE_EICR, "EICR"},
455 {IXGBE_SRRCTL(0), "SRRCTL"},
456 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
457 {IXGBE_RDLEN(0), "RDLEN"},
458 {IXGBE_RDH(0), "RDH"},
459 {IXGBE_RDT(0), "RDT"},
460 {IXGBE_RXDCTL(0), "RXDCTL"},
461 {IXGBE_RDBAL(0), "RDBAL"},
462 {IXGBE_RDBAH(0), "RDBAH"},
465 {IXGBE_TDBAL(0), "TDBAL"},
466 {IXGBE_TDBAH(0), "TDBAH"},
467 {IXGBE_TDLEN(0), "TDLEN"},
468 {IXGBE_TDH(0), "TDH"},
469 {IXGBE_TDT(0), "TDT"},
470 {IXGBE_TXDCTL(0), "TXDCTL"},
472 /* List Terminator */
478 * ixgbe_regdump - register printout routine
480 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
486 switch (reginfo->ofs) {
487 case IXGBE_SRRCTL(0):
488 for (i = 0; i < 64; i++)
489 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
491 case IXGBE_DCA_RXCTRL(0):
492 for (i = 0; i < 64; i++)
493 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
496 for (i = 0; i < 64; i++)
497 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
500 for (i = 0; i < 64; i++)
501 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
504 for (i = 0; i < 64; i++)
505 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
507 case IXGBE_RXDCTL(0):
508 for (i = 0; i < 64; i++)
509 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
512 for (i = 0; i < 64; i++)
513 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
516 for (i = 0; i < 64; i++)
517 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
520 for (i = 0; i < 64; i++)
521 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
524 for (i = 0; i < 64; i++)
525 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
528 for (i = 0; i < 64; i++)
529 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
532 for (i = 0; i < 64; i++)
533 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
536 for (i = 0; i < 64; i++)
537 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
539 case IXGBE_TXDCTL(0):
540 for (i = 0; i < 64; i++)
541 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
544 pr_info("%-15s %08x\n", reginfo->name,
545 IXGBE_READ_REG(hw, reginfo->ofs));
549 for (i = 0; i < 8; i++) {
550 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
551 pr_err("%-15s", rname);
552 for (j = 0; j < 8; j++)
553 pr_cont(" %08x", regs[i*8+j]);
560 * ixgbe_dump - Print registers, tx-rings and rx-rings
562 static void ixgbe_dump(struct ixgbe_adapter *adapter)
564 struct net_device *netdev = adapter->netdev;
565 struct ixgbe_hw *hw = &adapter->hw;
566 struct ixgbe_reg_info *reginfo;
568 struct ixgbe_ring *tx_ring;
569 struct ixgbe_tx_buffer *tx_buffer;
570 union ixgbe_adv_tx_desc *tx_desc;
571 struct my_u0 { u64 a; u64 b; } *u0;
572 struct ixgbe_ring *rx_ring;
573 union ixgbe_adv_rx_desc *rx_desc;
574 struct ixgbe_rx_buffer *rx_buffer_info;
578 if (!netif_msg_hw(adapter))
581 /* Print netdevice Info */
583 dev_info(&adapter->pdev->dev, "Net device Info\n");
584 pr_info("Device Name state "
585 "trans_start last_rx\n");
586 pr_info("%-15s %016lX %016lX %016lX\n",
593 /* Print Registers */
594 dev_info(&adapter->pdev->dev, "Register Dump\n");
595 pr_info(" Register Name Value\n");
596 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
597 reginfo->name; reginfo++) {
598 ixgbe_regdump(hw, reginfo);
601 /* Print TX Ring Summary */
602 if (!netdev || !netif_running(netdev))
605 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
606 pr_info(" %s %s %s %s\n",
607 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
608 "leng", "ntw", "timestamp");
609 for (n = 0; n < adapter->num_tx_queues; n++) {
610 tx_ring = adapter->tx_ring[n];
611 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
612 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
613 n, tx_ring->next_to_use, tx_ring->next_to_clean,
614 (u64)dma_unmap_addr(tx_buffer, dma),
615 dma_unmap_len(tx_buffer, len),
616 tx_buffer->next_to_watch,
617 (u64)tx_buffer->time_stamp);
621 if (!netif_msg_tx_done(adapter))
622 goto rx_ring_summary;
624 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
626 /* Transmit Descriptor Formats
628 * 82598 Advanced Transmit Descriptor
629 * +--------------------------------------------------------------+
630 * 0 | Buffer Address [63:0] |
631 * +--------------------------------------------------------------+
632 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
633 * +--------------------------------------------------------------+
634 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
636 * 82598 Advanced Transmit Descriptor (Write-Back Format)
637 * +--------------------------------------------------------------+
639 * +--------------------------------------------------------------+
640 * 8 | RSV | STA | NXTSEQ |
641 * +--------------------------------------------------------------+
644 * 82599+ Advanced Transmit Descriptor
645 * +--------------------------------------------------------------+
646 * 0 | Buffer Address [63:0] |
647 * +--------------------------------------------------------------+
648 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
649 * +--------------------------------------------------------------+
650 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
652 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
653 * +--------------------------------------------------------------+
655 * +--------------------------------------------------------------+
656 * 8 | RSV | STA | RSV |
657 * +--------------------------------------------------------------+
661 for (n = 0; n < adapter->num_tx_queues; n++) {
662 tx_ring = adapter->tx_ring[n];
663 pr_info("------------------------------------\n");
664 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
665 pr_info("------------------------------------\n");
666 pr_info("%s%s %s %s %s %s\n",
667 "T [desc] [address 63:0 ] ",
668 "[PlPOIdStDDt Ln] [bi->dma ] ",
669 "leng", "ntw", "timestamp", "bi->skb");
671 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
672 tx_desc = IXGBE_TX_DESC(tx_ring, i);
673 tx_buffer = &tx_ring->tx_buffer_info[i];
674 u0 = (struct my_u0 *)tx_desc;
675 if (dma_unmap_len(tx_buffer, len) > 0) {
676 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
680 (u64)dma_unmap_addr(tx_buffer, dma),
681 dma_unmap_len(tx_buffer, len),
682 tx_buffer->next_to_watch,
683 (u64)tx_buffer->time_stamp,
685 if (i == tx_ring->next_to_use &&
686 i == tx_ring->next_to_clean)
688 else if (i == tx_ring->next_to_use)
690 else if (i == tx_ring->next_to_clean)
695 if (netif_msg_pktdata(adapter) &&
697 print_hex_dump(KERN_INFO, "",
698 DUMP_PREFIX_ADDRESS, 16, 1,
699 tx_buffer->skb->data,
700 dma_unmap_len(tx_buffer, len),
706 /* Print RX Rings Summary */
708 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
709 pr_info("Queue [NTU] [NTC]\n");
710 for (n = 0; n < adapter->num_rx_queues; n++) {
711 rx_ring = adapter->rx_ring[n];
712 pr_info("%5d %5X %5X\n",
713 n, rx_ring->next_to_use, rx_ring->next_to_clean);
717 if (!netif_msg_rx_status(adapter))
720 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
722 /* Receive Descriptor Formats
724 * 82598 Advanced Receive Descriptor (Read) Format
726 * +-----------------------------------------------------+
727 * 0 | Packet Buffer Address [63:1] |A0/NSE|
728 * +----------------------------------------------+------+
729 * 8 | Header Buffer Address [63:1] | DD |
730 * +-----------------------------------------------------+
733 * 82598 Advanced Receive Descriptor (Write-Back) Format
735 * 63 48 47 32 31 30 21 20 16 15 4 3 0
736 * +------------------------------------------------------+
737 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
738 * | Packet | IP | | | | Type | Type |
739 * | Checksum | Ident | | | | | |
740 * +------------------------------------------------------+
741 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
742 * +------------------------------------------------------+
743 * 63 48 47 32 31 20 19 0
745 * 82599+ Advanced Receive Descriptor (Read) Format
747 * +-----------------------------------------------------+
748 * 0 | Packet Buffer Address [63:1] |A0/NSE|
749 * +----------------------------------------------+------+
750 * 8 | Header Buffer Address [63:1] | DD |
751 * +-----------------------------------------------------+
754 * 82599+ Advanced Receive Descriptor (Write-Back) Format
756 * 63 48 47 32 31 30 21 20 17 16 4 3 0
757 * +------------------------------------------------------+
758 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
759 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
760 * |/ Flow Dir Flt ID | | | | | |
761 * +------------------------------------------------------+
762 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
763 * +------------------------------------------------------+
764 * 63 48 47 32 31 20 19 0
767 for (n = 0; n < adapter->num_rx_queues; n++) {
768 rx_ring = adapter->rx_ring[n];
769 pr_info("------------------------------------\n");
770 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
771 pr_info("------------------------------------\n");
773 "R [desc] [ PktBuf A0] ",
774 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
775 "<-- Adv Rx Read format\n");
777 "RWB[desc] [PcsmIpSHl PtRs] ",
778 "[vl er S cks ln] ---------------- [bi->skb ] ",
779 "<-- Adv Rx Write-Back format\n");
781 for (i = 0; i < rx_ring->count; i++) {
782 rx_buffer_info = &rx_ring->rx_buffer_info[i];
783 rx_desc = IXGBE_RX_DESC(rx_ring, i);
784 u0 = (struct my_u0 *)rx_desc;
785 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
786 if (staterr & IXGBE_RXD_STAT_DD) {
787 /* Descriptor Done */
788 pr_info("RWB[0x%03X] %016llX "
789 "%016llX ---------------- %p", i,
792 rx_buffer_info->skb);
794 pr_info("R [0x%03X] %016llX "
795 "%016llX %016llX %p", i,
798 (u64)rx_buffer_info->dma,
799 rx_buffer_info->skb);
801 if (netif_msg_pktdata(adapter) &&
802 rx_buffer_info->dma) {
803 print_hex_dump(KERN_INFO, "",
804 DUMP_PREFIX_ADDRESS, 16, 1,
805 page_address(rx_buffer_info->page) +
806 rx_buffer_info->page_offset,
807 ixgbe_rx_bufsz(rx_ring), true);
811 if (i == rx_ring->next_to_use)
813 else if (i == rx_ring->next_to_clean)
822 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
826 /* Let firmware take over control of h/w */
827 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
828 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
829 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
832 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
836 /* Let firmware know the driver has taken over */
837 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
838 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
839 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
843 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
844 * @adapter: pointer to adapter struct
845 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
846 * @queue: queue to map the corresponding interrupt to
847 * @msix_vector: the vector to map to the corresponding queue
850 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
851 u8 queue, u8 msix_vector)
854 struct ixgbe_hw *hw = &adapter->hw;
855 switch (hw->mac.type) {
856 case ixgbe_mac_82598EB:
857 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
860 index = (((direction * 64) + queue) >> 2) & 0x1F;
861 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
862 ivar &= ~(0xFF << (8 * (queue & 0x3)));
863 ivar |= (msix_vector << (8 * (queue & 0x3)));
864 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
866 case ixgbe_mac_82599EB:
869 case ixgbe_mac_X550EM_x:
870 if (direction == -1) {
872 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
873 index = ((queue & 1) * 8);
874 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
875 ivar &= ~(0xFF << index);
876 ivar |= (msix_vector << index);
877 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
880 /* tx or rx causes */
881 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
882 index = ((16 * (queue & 1)) + (8 * direction));
883 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
884 ivar &= ~(0xFF << index);
885 ivar |= (msix_vector << index);
886 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
894 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
899 switch (adapter->hw.mac.type) {
900 case ixgbe_mac_82598EB:
901 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
902 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
904 case ixgbe_mac_82599EB:
907 case ixgbe_mac_X550EM_x:
908 mask = (qmask & 0xFFFFFFFF);
909 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
910 mask = (qmask >> 32);
911 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
918 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
919 struct ixgbe_tx_buffer *tx_buffer)
921 if (tx_buffer->skb) {
922 dev_kfree_skb_any(tx_buffer->skb);
923 if (dma_unmap_len(tx_buffer, len))
924 dma_unmap_single(ring->dev,
925 dma_unmap_addr(tx_buffer, dma),
926 dma_unmap_len(tx_buffer, len),
928 } else if (dma_unmap_len(tx_buffer, len)) {
929 dma_unmap_page(ring->dev,
930 dma_unmap_addr(tx_buffer, dma),
931 dma_unmap_len(tx_buffer, len),
934 tx_buffer->next_to_watch = NULL;
935 tx_buffer->skb = NULL;
936 dma_unmap_len_set(tx_buffer, len, 0);
937 /* tx_buffer must be completely set up in the transmit path */
940 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
942 struct ixgbe_hw *hw = &adapter->hw;
943 struct ixgbe_hw_stats *hwstats = &adapter->stats;
947 if ((hw->fc.current_mode != ixgbe_fc_full) &&
948 (hw->fc.current_mode != ixgbe_fc_rx_pause))
951 switch (hw->mac.type) {
952 case ixgbe_mac_82598EB:
953 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
956 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
958 hwstats->lxoffrxc += data;
960 /* refill credits (no tx hang) if we received xoff */
964 for (i = 0; i < adapter->num_tx_queues; i++)
965 clear_bit(__IXGBE_HANG_CHECK_ARMED,
966 &adapter->tx_ring[i]->state);
969 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
971 struct ixgbe_hw *hw = &adapter->hw;
972 struct ixgbe_hw_stats *hwstats = &adapter->stats;
976 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
978 if (adapter->ixgbe_ieee_pfc)
979 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
981 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
982 ixgbe_update_xoff_rx_lfc(adapter);
986 /* update stats for each tc, only valid with PFC enabled */
987 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
990 switch (hw->mac.type) {
991 case ixgbe_mac_82598EB:
992 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
995 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
997 hwstats->pxoffrxc[i] += pxoffrxc;
998 /* Get the TC for given UP */
999 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1000 xoff[tc] += pxoffrxc;
1003 /* disarm tx queues that have received xoff frames */
1004 for (i = 0; i < adapter->num_tx_queues; i++) {
1005 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1007 tc = tx_ring->dcb_tc;
1009 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1013 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1015 return ring->stats.packets;
1018 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1020 struct ixgbe_adapter *adapter;
1021 struct ixgbe_hw *hw;
1024 if (ring->l2_accel_priv)
1025 adapter = ring->l2_accel_priv->real_adapter;
1027 adapter = netdev_priv(ring->netdev);
1030 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1031 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1034 return (head < tail) ?
1035 tail - head : (tail + ring->count - head);
1040 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1042 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1043 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1044 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1046 clear_check_for_tx_hang(tx_ring);
1049 * Check for a hung queue, but be thorough. This verifies
1050 * that a transmit has been completed since the previous
1051 * check AND there is at least one packet pending. The
1052 * ARMED bit is set to indicate a potential hang. The
1053 * bit is cleared if a pause frame is received to remove
1054 * false hang detection due to PFC or 802.3x frames. By
1055 * requiring this to fail twice we avoid races with
1056 * pfc clearing the ARMED bit and conditions where we
1057 * run the check_tx_hang logic with a transmit completion
1058 * pending but without time to complete it yet.
1060 if (tx_done_old == tx_done && tx_pending)
1061 /* make sure it is true for two checks in a row */
1062 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1064 /* update completed stats and continue */
1065 tx_ring->tx_stats.tx_done_old = tx_done;
1066 /* reset the countdown */
1067 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1073 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1074 * @adapter: driver private struct
1076 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1079 /* Do the reset outside of interrupt context */
1080 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1081 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1082 e_warn(drv, "initiating reset due to tx timeout\n");
1083 ixgbe_service_event_schedule(adapter);
1088 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1089 * @q_vector: structure containing interrupt and ring information
1090 * @tx_ring: tx ring to clean
1092 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1093 struct ixgbe_ring *tx_ring)
1095 struct ixgbe_adapter *adapter = q_vector->adapter;
1096 struct ixgbe_tx_buffer *tx_buffer;
1097 union ixgbe_adv_tx_desc *tx_desc;
1098 unsigned int total_bytes = 0, total_packets = 0;
1099 unsigned int budget = q_vector->tx.work_limit;
1100 unsigned int i = tx_ring->next_to_clean;
1102 if (test_bit(__IXGBE_DOWN, &adapter->state))
1105 tx_buffer = &tx_ring->tx_buffer_info[i];
1106 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1107 i -= tx_ring->count;
1110 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1112 /* if next_to_watch is not set then there is no work pending */
1116 /* prevent any other reads prior to eop_desc */
1119 /* if DD is not set pending work has not been completed */
1120 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1123 /* clear next_to_watch to prevent false hangs */
1124 tx_buffer->next_to_watch = NULL;
1126 /* update the statistics for this packet */
1127 total_bytes += tx_buffer->bytecount;
1128 total_packets += tx_buffer->gso_segs;
1131 dev_consume_skb_any(tx_buffer->skb);
1133 /* unmap skb header data */
1134 dma_unmap_single(tx_ring->dev,
1135 dma_unmap_addr(tx_buffer, dma),
1136 dma_unmap_len(tx_buffer, len),
1139 /* clear tx_buffer data */
1140 tx_buffer->skb = NULL;
1141 dma_unmap_len_set(tx_buffer, len, 0);
1143 /* unmap remaining buffers */
1144 while (tx_desc != eop_desc) {
1149 i -= tx_ring->count;
1150 tx_buffer = tx_ring->tx_buffer_info;
1151 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1154 /* unmap any remaining paged data */
1155 if (dma_unmap_len(tx_buffer, len)) {
1156 dma_unmap_page(tx_ring->dev,
1157 dma_unmap_addr(tx_buffer, dma),
1158 dma_unmap_len(tx_buffer, len),
1160 dma_unmap_len_set(tx_buffer, len, 0);
1164 /* move us one more past the eop_desc for start of next pkt */
1169 i -= tx_ring->count;
1170 tx_buffer = tx_ring->tx_buffer_info;
1171 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1174 /* issue prefetch for next Tx descriptor */
1177 /* update budget accounting */
1179 } while (likely(budget));
1181 i += tx_ring->count;
1182 tx_ring->next_to_clean = i;
1183 u64_stats_update_begin(&tx_ring->syncp);
1184 tx_ring->stats.bytes += total_bytes;
1185 tx_ring->stats.packets += total_packets;
1186 u64_stats_update_end(&tx_ring->syncp);
1187 q_vector->tx.total_bytes += total_bytes;
1188 q_vector->tx.total_packets += total_packets;
1190 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1191 /* schedule immediate reset if we believe we hung */
1192 struct ixgbe_hw *hw = &adapter->hw;
1193 e_err(drv, "Detected Tx Unit Hang\n"
1195 " TDH, TDT <%x>, <%x>\n"
1196 " next_to_use <%x>\n"
1197 " next_to_clean <%x>\n"
1198 "tx_buffer_info[next_to_clean]\n"
1199 " time_stamp <%lx>\n"
1201 tx_ring->queue_index,
1202 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1203 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1204 tx_ring->next_to_use, i,
1205 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1207 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1210 "tx hang %d detected on queue %d, resetting adapter\n",
1211 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1213 /* schedule immediate reset if we believe we hung */
1214 ixgbe_tx_timeout_reset(adapter);
1216 /* the adapter is about to reset, no point in enabling stuff */
1220 netdev_tx_completed_queue(txring_txq(tx_ring),
1221 total_packets, total_bytes);
1223 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1224 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1225 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1226 /* Make sure that anybody stopping the queue after this
1227 * sees the new next_to_clean.
1230 if (__netif_subqueue_stopped(tx_ring->netdev,
1231 tx_ring->queue_index)
1232 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1233 netif_wake_subqueue(tx_ring->netdev,
1234 tx_ring->queue_index);
1235 ++tx_ring->tx_stats.restart_queue;
1242 #ifdef CONFIG_IXGBE_DCA
1243 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1244 struct ixgbe_ring *tx_ring,
1247 struct ixgbe_hw *hw = &adapter->hw;
1251 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1252 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1254 switch (hw->mac.type) {
1255 case ixgbe_mac_82598EB:
1256 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1258 case ixgbe_mac_82599EB:
1259 case ixgbe_mac_X540:
1260 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1261 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1264 /* for unknown hardware do not write register */
1269 * We can enable relaxed ordering for reads, but not writes when
1270 * DCA is enabled. This is due to a known issue in some chipsets
1271 * which will cause the DCA tag to be cleared.
1273 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1274 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1275 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1277 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1280 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1281 struct ixgbe_ring *rx_ring,
1284 struct ixgbe_hw *hw = &adapter->hw;
1286 u8 reg_idx = rx_ring->reg_idx;
1288 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1289 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1291 switch (hw->mac.type) {
1292 case ixgbe_mac_82599EB:
1293 case ixgbe_mac_X540:
1294 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1301 * We can enable relaxed ordering for reads, but not writes when
1302 * DCA is enabled. This is due to a known issue in some chipsets
1303 * which will cause the DCA tag to be cleared.
1305 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1306 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1307 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1309 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1312 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1314 struct ixgbe_adapter *adapter = q_vector->adapter;
1315 struct ixgbe_ring *ring;
1316 int cpu = get_cpu();
1318 if (q_vector->cpu == cpu)
1321 ixgbe_for_each_ring(ring, q_vector->tx)
1322 ixgbe_update_tx_dca(adapter, ring, cpu);
1324 ixgbe_for_each_ring(ring, q_vector->rx)
1325 ixgbe_update_rx_dca(adapter, ring, cpu);
1327 q_vector->cpu = cpu;
1332 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1336 /* always use CB2 mode, difference is masked in the CB driver */
1337 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1338 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1339 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1341 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1342 IXGBE_DCA_CTRL_DCA_DISABLE);
1344 for (i = 0; i < adapter->num_q_vectors; i++) {
1345 adapter->q_vector[i]->cpu = -1;
1346 ixgbe_update_dca(adapter->q_vector[i]);
1350 static int __ixgbe_notify_dca(struct device *dev, void *data)
1352 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1353 unsigned long event = *(unsigned long *)data;
1355 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1359 case DCA_PROVIDER_ADD:
1360 /* if we're already enabled, don't do it again */
1361 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1363 if (dca_add_requester(dev) == 0) {
1364 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1365 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1366 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1369 /* Fall Through since DCA is disabled. */
1370 case DCA_PROVIDER_REMOVE:
1371 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1372 dca_remove_requester(dev);
1373 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1374 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1375 IXGBE_DCA_CTRL_DCA_DISABLE);
1383 #endif /* CONFIG_IXGBE_DCA */
1385 #define IXGBE_RSS_L4_TYPES_MASK \
1386 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1387 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1388 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1389 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1391 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1392 union ixgbe_adv_rx_desc *rx_desc,
1393 struct sk_buff *skb)
1397 if (!(ring->netdev->features & NETIF_F_RXHASH))
1400 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1401 IXGBE_RXDADV_RSSTYPE_MASK;
1406 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1407 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1408 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1413 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1414 * @ring: structure containing ring specific data
1415 * @rx_desc: advanced rx descriptor
1417 * Returns : true if it is FCoE pkt
1419 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1420 union ixgbe_adv_rx_desc *rx_desc)
1422 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1424 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1425 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1426 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1427 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1430 #endif /* IXGBE_FCOE */
1432 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1433 * @ring: structure containing ring specific data
1434 * @rx_desc: current Rx descriptor being processed
1435 * @skb: skb currently being received and modified
1437 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1438 union ixgbe_adv_rx_desc *rx_desc,
1439 struct sk_buff *skb)
1441 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1442 __le16 hdr_info = rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
1443 bool encap_pkt = false;
1445 skb_checksum_none_assert(skb);
1447 /* Rx csum disabled */
1448 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1451 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) &&
1452 (hdr_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL >> 16))) {
1454 skb->encapsulation = 1;
1457 /* if IP and error */
1458 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1459 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1460 ring->rx_stats.csum_err++;
1464 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1467 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1469 * 82599 errata, UDP frames with a 0 checksum can be marked as
1472 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1473 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1476 ring->rx_stats.csum_err++;
1480 /* It must be a TCP or UDP packet with a valid checksum */
1481 skb->ip_summed = CHECKSUM_UNNECESSARY;
1483 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1486 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1487 ring->rx_stats.csum_err++;
1490 /* If we checked the outer header let the stack know */
1491 skb->csum_level = 1;
1495 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1496 struct ixgbe_rx_buffer *bi)
1498 struct page *page = bi->page;
1501 /* since we are recycling buffers we should seldom need to alloc */
1505 /* alloc new page for storage */
1506 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1507 if (unlikely(!page)) {
1508 rx_ring->rx_stats.alloc_rx_page_failed++;
1512 /* map page for use */
1513 dma = dma_map_page(rx_ring->dev, page, 0,
1514 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1517 * if mapping failed free memory back to system since
1518 * there isn't much point in holding memory we can't use
1520 if (dma_mapping_error(rx_ring->dev, dma)) {
1521 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1523 rx_ring->rx_stats.alloc_rx_page_failed++;
1529 bi->page_offset = 0;
1535 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1536 * @rx_ring: ring to place buffers on
1537 * @cleaned_count: number of buffers to replace
1539 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1541 union ixgbe_adv_rx_desc *rx_desc;
1542 struct ixgbe_rx_buffer *bi;
1543 u16 i = rx_ring->next_to_use;
1549 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1550 bi = &rx_ring->rx_buffer_info[i];
1551 i -= rx_ring->count;
1554 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1558 * Refresh the desc even if buffer_addrs didn't change
1559 * because each write-back erases this info.
1561 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1567 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1568 bi = rx_ring->rx_buffer_info;
1569 i -= rx_ring->count;
1572 /* clear the status bits for the next_to_use descriptor */
1573 rx_desc->wb.upper.status_error = 0;
1576 } while (cleaned_count);
1578 i += rx_ring->count;
1580 if (rx_ring->next_to_use != i) {
1581 rx_ring->next_to_use = i;
1583 /* update next to alloc since we have filled the ring */
1584 rx_ring->next_to_alloc = i;
1586 /* Force memory writes to complete before letting h/w
1587 * know there are new descriptors to fetch. (Only
1588 * applicable for weak-ordered memory model archs,
1592 writel(i, rx_ring->tail);
1596 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1597 struct sk_buff *skb)
1599 u16 hdr_len = skb_headlen(skb);
1601 /* set gso_size to avoid messing up TCP MSS */
1602 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1603 IXGBE_CB(skb)->append_cnt);
1604 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1607 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1608 struct sk_buff *skb)
1610 /* if append_cnt is 0 then frame is not RSC */
1611 if (!IXGBE_CB(skb)->append_cnt)
1614 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1615 rx_ring->rx_stats.rsc_flush++;
1617 ixgbe_set_rsc_gso_size(rx_ring, skb);
1619 /* gso_size is computed using append_cnt so always clear it last */
1620 IXGBE_CB(skb)->append_cnt = 0;
1624 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1625 * @rx_ring: rx descriptor ring packet is being transacted on
1626 * @rx_desc: pointer to the EOP Rx descriptor
1627 * @skb: pointer to current skb being populated
1629 * This function checks the ring, descriptor, and packet information in
1630 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1631 * other fields within the skb.
1633 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1634 union ixgbe_adv_rx_desc *rx_desc,
1635 struct sk_buff *skb)
1637 struct net_device *dev = rx_ring->netdev;
1639 ixgbe_update_rsc_stats(rx_ring, skb);
1641 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1643 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1645 if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1646 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1648 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1649 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1650 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1651 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1654 skb_record_rx_queue(skb, rx_ring->queue_index);
1656 skb->protocol = eth_type_trans(skb, dev);
1659 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1660 struct sk_buff *skb)
1662 if (ixgbe_qv_busy_polling(q_vector))
1663 netif_receive_skb(skb);
1665 napi_gro_receive(&q_vector->napi, skb);
1669 * ixgbe_is_non_eop - process handling of non-EOP buffers
1670 * @rx_ring: Rx ring being processed
1671 * @rx_desc: Rx descriptor for current buffer
1672 * @skb: Current socket buffer containing buffer in progress
1674 * This function updates next to clean. If the buffer is an EOP buffer
1675 * this function exits returning false, otherwise it will place the
1676 * sk_buff in the next buffer to be chained and return true indicating
1677 * that this is in fact a non-EOP buffer.
1679 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1680 union ixgbe_adv_rx_desc *rx_desc,
1681 struct sk_buff *skb)
1683 u32 ntc = rx_ring->next_to_clean + 1;
1685 /* fetch, update, and store next to clean */
1686 ntc = (ntc < rx_ring->count) ? ntc : 0;
1687 rx_ring->next_to_clean = ntc;
1689 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1691 /* update RSC append count if present */
1692 if (ring_is_rsc_enabled(rx_ring)) {
1693 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1694 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1696 if (unlikely(rsc_enabled)) {
1697 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1699 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1700 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1702 /* update ntc based on RSC value */
1703 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1704 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1705 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1709 /* if we are the last buffer then there is nothing else to do */
1710 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1713 /* place skb in next buffer to be received */
1714 rx_ring->rx_buffer_info[ntc].skb = skb;
1715 rx_ring->rx_stats.non_eop_descs++;
1721 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1722 * @rx_ring: rx descriptor ring packet is being transacted on
1723 * @skb: pointer to current skb being adjusted
1725 * This function is an ixgbe specific version of __pskb_pull_tail. The
1726 * main difference between this version and the original function is that
1727 * this function can make several assumptions about the state of things
1728 * that allow for significant optimizations versus the standard function.
1729 * As a result we can do things like drop a frag and maintain an accurate
1730 * truesize for the skb.
1732 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1733 struct sk_buff *skb)
1735 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1737 unsigned int pull_len;
1740 * it is valid to use page_address instead of kmap since we are
1741 * working with pages allocated out of the lomem pool per
1742 * alloc_page(GFP_ATOMIC)
1744 va = skb_frag_address(frag);
1747 * we need the header to contain the greater of either ETH_HLEN or
1748 * 60 bytes if the skb->len is less than 60 for skb_pad.
1750 pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1752 /* align pull length to size of long to optimize memcpy performance */
1753 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1755 /* update all of the pointers */
1756 skb_frag_size_sub(frag, pull_len);
1757 frag->page_offset += pull_len;
1758 skb->data_len -= pull_len;
1759 skb->tail += pull_len;
1763 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1764 * @rx_ring: rx descriptor ring packet is being transacted on
1765 * @skb: pointer to current skb being updated
1767 * This function provides a basic DMA sync up for the first fragment of an
1768 * skb. The reason for doing this is that the first fragment cannot be
1769 * unmapped until we have reached the end of packet descriptor for a buffer
1772 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1773 struct sk_buff *skb)
1775 /* if the page was released unmap it, else just sync our portion */
1776 if (unlikely(IXGBE_CB(skb)->page_released)) {
1777 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1778 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1779 IXGBE_CB(skb)->page_released = false;
1781 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1783 dma_sync_single_range_for_cpu(rx_ring->dev,
1786 ixgbe_rx_bufsz(rx_ring),
1789 IXGBE_CB(skb)->dma = 0;
1793 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1794 * @rx_ring: rx descriptor ring packet is being transacted on
1795 * @rx_desc: pointer to the EOP Rx descriptor
1796 * @skb: pointer to current skb being fixed
1798 * Check for corrupted packet headers caused by senders on the local L2
1799 * embedded NIC switch not setting up their Tx Descriptors right. These
1800 * should be very rare.
1802 * Also address the case where we are pulling data in on pages only
1803 * and as such no data is present in the skb header.
1805 * In addition if skb is not at least 60 bytes we need to pad it so that
1806 * it is large enough to qualify as a valid Ethernet frame.
1808 * Returns true if an error was encountered and skb was freed.
1810 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1811 union ixgbe_adv_rx_desc *rx_desc,
1812 struct sk_buff *skb)
1814 struct net_device *netdev = rx_ring->netdev;
1816 /* verify that the packet does not have any known errors */
1817 if (unlikely(ixgbe_test_staterr(rx_desc,
1818 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1819 !(netdev->features & NETIF_F_RXALL))) {
1820 dev_kfree_skb_any(skb);
1824 /* place header in linear portion of buffer */
1825 if (skb_is_nonlinear(skb))
1826 ixgbe_pull_tail(rx_ring, skb);
1829 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1830 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1834 /* if eth_skb_pad returns an error the skb was freed */
1835 if (eth_skb_pad(skb))
1842 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1843 * @rx_ring: rx descriptor ring to store buffers on
1844 * @old_buff: donor buffer to have page reused
1846 * Synchronizes page for reuse by the adapter
1848 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1849 struct ixgbe_rx_buffer *old_buff)
1851 struct ixgbe_rx_buffer *new_buff;
1852 u16 nta = rx_ring->next_to_alloc;
1854 new_buff = &rx_ring->rx_buffer_info[nta];
1856 /* update, and store next to alloc */
1858 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1860 /* transfer page from old buffer to new buffer */
1861 *new_buff = *old_buff;
1863 /* sync the buffer for use by the device */
1864 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1865 new_buff->page_offset,
1866 ixgbe_rx_bufsz(rx_ring),
1870 static inline bool ixgbe_page_is_reserved(struct page *page)
1872 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1876 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1877 * @rx_ring: rx descriptor ring to transact packets on
1878 * @rx_buffer: buffer containing page to add
1879 * @rx_desc: descriptor containing length of buffer written by hardware
1880 * @skb: sk_buff to place the data into
1882 * This function will add the data contained in rx_buffer->page to the skb.
1883 * This is done either through a direct copy if the data in the buffer is
1884 * less than the skb header size, otherwise it will just attach the page as
1885 * a frag to the skb.
1887 * The function will then update the page offset if necessary and return
1888 * true if the buffer can be reused by the adapter.
1890 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1891 struct ixgbe_rx_buffer *rx_buffer,
1892 union ixgbe_adv_rx_desc *rx_desc,
1893 struct sk_buff *skb)
1895 struct page *page = rx_buffer->page;
1896 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1897 #if (PAGE_SIZE < 8192)
1898 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1900 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1901 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1902 ixgbe_rx_bufsz(rx_ring);
1905 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1906 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1908 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1910 /* page is not reserved, we can reuse buffer as-is */
1911 if (likely(!ixgbe_page_is_reserved(page)))
1914 /* this page cannot be reused so discard it */
1915 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1919 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1920 rx_buffer->page_offset, size, truesize);
1922 /* avoid re-using remote pages */
1923 if (unlikely(ixgbe_page_is_reserved(page)))
1926 #if (PAGE_SIZE < 8192)
1927 /* if we are only owner of page we can reuse it */
1928 if (unlikely(page_count(page) != 1))
1931 /* flip page offset to other buffer */
1932 rx_buffer->page_offset ^= truesize;
1934 /* move offset up to the next cache line */
1935 rx_buffer->page_offset += truesize;
1937 if (rx_buffer->page_offset > last_offset)
1941 /* Even if we own the page, we are not allowed to use atomic_set()
1942 * This would break get_page_unless_zero() users.
1944 atomic_inc(&page->_count);
1949 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1950 union ixgbe_adv_rx_desc *rx_desc)
1952 struct ixgbe_rx_buffer *rx_buffer;
1953 struct sk_buff *skb;
1956 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1957 page = rx_buffer->page;
1960 skb = rx_buffer->skb;
1963 void *page_addr = page_address(page) +
1964 rx_buffer->page_offset;
1966 /* prefetch first cache line of first page */
1967 prefetch(page_addr);
1968 #if L1_CACHE_BYTES < 128
1969 prefetch(page_addr + L1_CACHE_BYTES);
1972 /* allocate a skb to store the frags */
1973 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
1975 if (unlikely(!skb)) {
1976 rx_ring->rx_stats.alloc_rx_buff_failed++;
1981 * we will be copying header into skb->data in
1982 * pskb_may_pull so it is in our interest to prefetch
1983 * it now to avoid a possible cache miss
1985 prefetchw(skb->data);
1988 * Delay unmapping of the first packet. It carries the
1989 * header information, HW may still access the header
1990 * after the writeback. Only unmap it when EOP is
1993 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1996 IXGBE_CB(skb)->dma = rx_buffer->dma;
1998 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1999 ixgbe_dma_sync_frag(rx_ring, skb);
2002 /* we are reusing so sync this buffer for CPU use */
2003 dma_sync_single_range_for_cpu(rx_ring->dev,
2005 rx_buffer->page_offset,
2006 ixgbe_rx_bufsz(rx_ring),
2009 rx_buffer->skb = NULL;
2012 /* pull page into skb */
2013 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2014 /* hand second half of page back to the ring */
2015 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2016 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2017 /* the page has been released from the ring */
2018 IXGBE_CB(skb)->page_released = true;
2020 /* we are not reusing the buffer so unmap it */
2021 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2022 ixgbe_rx_pg_size(rx_ring),
2026 /* clear contents of buffer_info */
2027 rx_buffer->page = NULL;
2033 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2034 * @q_vector: structure containing interrupt and ring information
2035 * @rx_ring: rx descriptor ring to transact packets on
2036 * @budget: Total limit on number of packets to process
2038 * This function provides a "bounce buffer" approach to Rx interrupt
2039 * processing. The advantage to this is that on systems that have
2040 * expensive overhead for IOMMU access this provides a means of avoiding
2041 * it by maintaining the mapping of the page to the syste.
2043 * Returns amount of work completed
2045 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2046 struct ixgbe_ring *rx_ring,
2049 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2051 struct ixgbe_adapter *adapter = q_vector->adapter;
2053 unsigned int mss = 0;
2054 #endif /* IXGBE_FCOE */
2055 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2057 while (likely(total_rx_packets < budget)) {
2058 union ixgbe_adv_rx_desc *rx_desc;
2059 struct sk_buff *skb;
2061 /* return some buffers to hardware, one at a time is too slow */
2062 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2063 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2067 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2069 if (!rx_desc->wb.upper.status_error)
2072 /* This memory barrier is needed to keep us from reading
2073 * any other fields out of the rx_desc until we know the
2074 * descriptor has been written back
2078 /* retrieve a buffer from the ring */
2079 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2081 /* exit if we failed to retrieve a buffer */
2087 /* place incomplete frames back on ring for completion */
2088 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2091 /* verify the packet layout is correct */
2092 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2095 /* probably a little skewed due to removing CRC */
2096 total_rx_bytes += skb->len;
2098 /* populate checksum, timestamp, VLAN, and protocol */
2099 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2102 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2103 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2104 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2105 /* include DDPed FCoE data */
2106 if (ddp_bytes > 0) {
2108 mss = rx_ring->netdev->mtu -
2109 sizeof(struct fcoe_hdr) -
2110 sizeof(struct fc_frame_header) -
2111 sizeof(struct fcoe_crc_eof);
2115 total_rx_bytes += ddp_bytes;
2116 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2120 dev_kfree_skb_any(skb);
2125 #endif /* IXGBE_FCOE */
2126 skb_mark_napi_id(skb, &q_vector->napi);
2127 ixgbe_rx_skb(q_vector, skb);
2129 /* update budget accounting */
2133 u64_stats_update_begin(&rx_ring->syncp);
2134 rx_ring->stats.packets += total_rx_packets;
2135 rx_ring->stats.bytes += total_rx_bytes;
2136 u64_stats_update_end(&rx_ring->syncp);
2137 q_vector->rx.total_packets += total_rx_packets;
2138 q_vector->rx.total_bytes += total_rx_bytes;
2140 return total_rx_packets;
2143 #ifdef CONFIG_NET_RX_BUSY_POLL
2144 /* must be called with local_bh_disable()d */
2145 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2147 struct ixgbe_q_vector *q_vector =
2148 container_of(napi, struct ixgbe_q_vector, napi);
2149 struct ixgbe_adapter *adapter = q_vector->adapter;
2150 struct ixgbe_ring *ring;
2153 if (test_bit(__IXGBE_DOWN, &adapter->state))
2154 return LL_FLUSH_FAILED;
2156 if (!ixgbe_qv_lock_poll(q_vector))
2157 return LL_FLUSH_BUSY;
2159 ixgbe_for_each_ring(ring, q_vector->rx) {
2160 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2161 #ifdef BP_EXTENDED_STATS
2163 ring->stats.cleaned += found;
2165 ring->stats.misses++;
2171 ixgbe_qv_unlock_poll(q_vector);
2175 #endif /* CONFIG_NET_RX_BUSY_POLL */
2178 * ixgbe_configure_msix - Configure MSI-X hardware
2179 * @adapter: board private structure
2181 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2184 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2186 struct ixgbe_q_vector *q_vector;
2190 /* Populate MSIX to EITR Select */
2191 if (adapter->num_vfs > 32) {
2192 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2193 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2197 * Populate the IVAR table and set the ITR values to the
2198 * corresponding register.
2200 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2201 struct ixgbe_ring *ring;
2202 q_vector = adapter->q_vector[v_idx];
2204 ixgbe_for_each_ring(ring, q_vector->rx)
2205 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2207 ixgbe_for_each_ring(ring, q_vector->tx)
2208 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2210 ixgbe_write_eitr(q_vector);
2213 switch (adapter->hw.mac.type) {
2214 case ixgbe_mac_82598EB:
2215 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2218 case ixgbe_mac_82599EB:
2219 case ixgbe_mac_X540:
2220 case ixgbe_mac_X550:
2221 case ixgbe_mac_X550EM_x:
2222 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2227 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2229 /* set up to autoclear timer, and the vectors */
2230 mask = IXGBE_EIMS_ENABLE_MASK;
2231 mask &= ~(IXGBE_EIMS_OTHER |
2232 IXGBE_EIMS_MAILBOX |
2235 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2238 enum latency_range {
2242 latency_invalid = 255
2246 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2247 * @q_vector: structure containing interrupt and ring information
2248 * @ring_container: structure containing ring performance data
2250 * Stores a new ITR value based on packets and byte
2251 * counts during the last interrupt. The advantage of per interrupt
2252 * computation is faster updates and more accurate ITR for the current
2253 * traffic pattern. Constants in this function were computed
2254 * based on theoretical maximum wire speed and thresholds were set based
2255 * on testing data as well as attempting to minimize response time
2256 * while increasing bulk throughput.
2257 * this functionality is controlled by the InterruptThrottleRate module
2258 * parameter (see ixgbe_param.c)
2260 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2261 struct ixgbe_ring_container *ring_container)
2263 int bytes = ring_container->total_bytes;
2264 int packets = ring_container->total_packets;
2267 u8 itr_setting = ring_container->itr;
2272 /* simple throttlerate management
2273 * 0-10MB/s lowest (100000 ints/s)
2274 * 10-20MB/s low (20000 ints/s)
2275 * 20-1249MB/s bulk (12000 ints/s)
2277 /* what was last interrupt timeslice? */
2278 timepassed_us = q_vector->itr >> 2;
2279 if (timepassed_us == 0)
2282 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2284 switch (itr_setting) {
2285 case lowest_latency:
2286 if (bytes_perint > 10)
2287 itr_setting = low_latency;
2290 if (bytes_perint > 20)
2291 itr_setting = bulk_latency;
2292 else if (bytes_perint <= 10)
2293 itr_setting = lowest_latency;
2296 if (bytes_perint <= 20)
2297 itr_setting = low_latency;
2301 /* clear work counters since we have the values we need */
2302 ring_container->total_bytes = 0;
2303 ring_container->total_packets = 0;
2305 /* write updated itr to ring container */
2306 ring_container->itr = itr_setting;
2310 * ixgbe_write_eitr - write EITR register in hardware specific way
2311 * @q_vector: structure containing interrupt and ring information
2313 * This function is made to be called by ethtool and by the driver
2314 * when it needs to update EITR registers at runtime. Hardware
2315 * specific quirks/differences are taken care of here.
2317 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2319 struct ixgbe_adapter *adapter = q_vector->adapter;
2320 struct ixgbe_hw *hw = &adapter->hw;
2321 int v_idx = q_vector->v_idx;
2322 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2324 switch (adapter->hw.mac.type) {
2325 case ixgbe_mac_82598EB:
2326 /* must write high and low 16 bits to reset counter */
2327 itr_reg |= (itr_reg << 16);
2329 case ixgbe_mac_82599EB:
2330 case ixgbe_mac_X540:
2331 case ixgbe_mac_X550:
2332 case ixgbe_mac_X550EM_x:
2334 * set the WDIS bit to not clear the timer bits and cause an
2335 * immediate assertion of the interrupt
2337 itr_reg |= IXGBE_EITR_CNT_WDIS;
2342 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2345 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2347 u32 new_itr = q_vector->itr;
2350 ixgbe_update_itr(q_vector, &q_vector->tx);
2351 ixgbe_update_itr(q_vector, &q_vector->rx);
2353 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2355 switch (current_itr) {
2356 /* counts and packets in update_itr are dependent on these numbers */
2357 case lowest_latency:
2358 new_itr = IXGBE_100K_ITR;
2361 new_itr = IXGBE_20K_ITR;
2364 new_itr = IXGBE_12K_ITR;
2370 if (new_itr != q_vector->itr) {
2371 /* do an exponential smoothing */
2372 new_itr = (10 * new_itr * q_vector->itr) /
2373 ((9 * new_itr) + q_vector->itr);
2375 /* save the algorithm value here */
2376 q_vector->itr = new_itr;
2378 ixgbe_write_eitr(q_vector);
2383 * ixgbe_check_overtemp_subtask - check for over temperature
2384 * @adapter: pointer to adapter
2386 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2388 struct ixgbe_hw *hw = &adapter->hw;
2389 u32 eicr = adapter->interrupt_event;
2391 if (test_bit(__IXGBE_DOWN, &adapter->state))
2394 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2395 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2398 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2400 switch (hw->device_id) {
2401 case IXGBE_DEV_ID_82599_T3_LOM:
2403 * Since the warning interrupt is for both ports
2404 * we don't have to check if:
2405 * - This interrupt wasn't for our port.
2406 * - We may have missed the interrupt so always have to
2407 * check if we got a LSC
2409 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2410 !(eicr & IXGBE_EICR_LSC))
2413 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2415 bool link_up = false;
2417 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2423 /* Check if this is not due to overtemp */
2424 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2429 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2431 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2435 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2437 adapter->interrupt_event = 0;
2440 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2442 struct ixgbe_hw *hw = &adapter->hw;
2444 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2445 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2446 e_crit(probe, "Fan has stopped, replace the adapter\n");
2447 /* write to clear the interrupt */
2448 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2452 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2454 struct ixgbe_hw *hw = &adapter->hw;
2456 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2459 switch (adapter->hw.mac.type) {
2460 case ixgbe_mac_82599EB:
2462 * Need to check link state so complete overtemp check
2465 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2466 (eicr & IXGBE_EICR_LSC)) &&
2467 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2468 adapter->interrupt_event = eicr;
2469 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2470 ixgbe_service_event_schedule(adapter);
2474 case ixgbe_mac_X540:
2475 if (!(eicr & IXGBE_EICR_TS))
2482 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2485 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2487 switch (hw->mac.type) {
2488 case ixgbe_mac_82598EB:
2489 if (hw->phy.type == ixgbe_phy_nl)
2492 case ixgbe_mac_82599EB:
2493 case ixgbe_mac_X550EM_x:
2494 switch (hw->mac.ops.get_media_type(hw)) {
2495 case ixgbe_media_type_fiber:
2496 case ixgbe_media_type_fiber_qsfp:
2506 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2508 struct ixgbe_hw *hw = &adapter->hw;
2509 u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2511 if (!ixgbe_is_sfp(hw))
2514 /* Later MAC's use different SDP */
2515 if (hw->mac.type >= ixgbe_mac_X540)
2516 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2518 if (eicr & eicr_mask) {
2519 /* Clear the interrupt */
2520 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2521 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2522 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2523 adapter->sfp_poll_time = 0;
2524 ixgbe_service_event_schedule(adapter);
2528 if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2529 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2530 /* Clear the interrupt */
2531 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2532 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2533 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2534 ixgbe_service_event_schedule(adapter);
2539 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2541 struct ixgbe_hw *hw = &adapter->hw;
2544 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2545 adapter->link_check_timeout = jiffies;
2546 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2547 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2548 IXGBE_WRITE_FLUSH(hw);
2549 ixgbe_service_event_schedule(adapter);
2553 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2557 struct ixgbe_hw *hw = &adapter->hw;
2559 switch (hw->mac.type) {
2560 case ixgbe_mac_82598EB:
2561 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2562 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2564 case ixgbe_mac_82599EB:
2565 case ixgbe_mac_X540:
2566 case ixgbe_mac_X550:
2567 case ixgbe_mac_X550EM_x:
2568 mask = (qmask & 0xFFFFFFFF);
2570 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2571 mask = (qmask >> 32);
2573 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2578 /* skip the flush */
2581 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2585 struct ixgbe_hw *hw = &adapter->hw;
2587 switch (hw->mac.type) {
2588 case ixgbe_mac_82598EB:
2589 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2590 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2592 case ixgbe_mac_82599EB:
2593 case ixgbe_mac_X540:
2594 case ixgbe_mac_X550:
2595 case ixgbe_mac_X550EM_x:
2596 mask = (qmask & 0xFFFFFFFF);
2598 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2599 mask = (qmask >> 32);
2601 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2606 /* skip the flush */
2610 * ixgbe_irq_enable - Enable default interrupt generation settings
2611 * @adapter: board private structure
2613 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2616 struct ixgbe_hw *hw = &adapter->hw;
2617 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2619 /* don't reenable LSC while waiting for link */
2620 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2621 mask &= ~IXGBE_EIMS_LSC;
2623 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2624 switch (adapter->hw.mac.type) {
2625 case ixgbe_mac_82599EB:
2626 mask |= IXGBE_EIMS_GPI_SDP0(hw);
2628 case ixgbe_mac_X540:
2629 case ixgbe_mac_X550:
2630 case ixgbe_mac_X550EM_x:
2631 mask |= IXGBE_EIMS_TS;
2636 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2637 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2638 switch (adapter->hw.mac.type) {
2639 case ixgbe_mac_82599EB:
2640 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2641 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2643 case ixgbe_mac_X540:
2644 case ixgbe_mac_X550:
2645 case ixgbe_mac_X550EM_x:
2646 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP)
2647 mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2648 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2649 mask |= IXGBE_EICR_GPI_SDP0_X540;
2650 mask |= IXGBE_EIMS_ECC;
2651 mask |= IXGBE_EIMS_MAILBOX;
2657 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2658 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2659 mask |= IXGBE_EIMS_FLOW_DIR;
2661 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2663 ixgbe_irq_enable_queues(adapter, ~0);
2665 IXGBE_WRITE_FLUSH(&adapter->hw);
2668 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2670 struct ixgbe_adapter *adapter = data;
2671 struct ixgbe_hw *hw = &adapter->hw;
2675 * Workaround for Silicon errata. Use clear-by-write instead
2676 * of clear-by-read. Reading with EICS will return the
2677 * interrupt causes without clearing, which later be done
2678 * with the write to EICR.
2680 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2682 /* The lower 16bits of the EICR register are for the queue interrupts
2683 * which should be masked here in order to not accidentally clear them if
2684 * the bits are high when ixgbe_msix_other is called. There is a race
2685 * condition otherwise which results in possible performance loss
2686 * especially if the ixgbe_msix_other interrupt is triggering
2687 * consistently (as it would when PPS is turned on for the X540 device)
2691 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2693 if (eicr & IXGBE_EICR_LSC)
2694 ixgbe_check_lsc(adapter);
2696 if (eicr & IXGBE_EICR_MAILBOX)
2697 ixgbe_msg_task(adapter);
2699 switch (hw->mac.type) {
2700 case ixgbe_mac_82599EB:
2701 case ixgbe_mac_X540:
2702 case ixgbe_mac_X550:
2703 case ixgbe_mac_X550EM_x:
2704 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2705 (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2706 adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2707 ixgbe_service_event_schedule(adapter);
2708 IXGBE_WRITE_REG(hw, IXGBE_EICR,
2709 IXGBE_EICR_GPI_SDP0_X540);
2711 if (eicr & IXGBE_EICR_ECC) {
2712 e_info(link, "Received ECC Err, initiating reset\n");
2713 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2714 ixgbe_service_event_schedule(adapter);
2715 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2717 /* Handle Flow Director Full threshold interrupt */
2718 if (eicr & IXGBE_EICR_FLOW_DIR) {
2719 int reinit_count = 0;
2721 for (i = 0; i < adapter->num_tx_queues; i++) {
2722 struct ixgbe_ring *ring = adapter->tx_ring[i];
2723 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2728 /* no more flow director interrupts until after init */
2729 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2730 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2731 ixgbe_service_event_schedule(adapter);
2734 ixgbe_check_sfp_event(adapter, eicr);
2735 ixgbe_check_overtemp_event(adapter, eicr);
2741 ixgbe_check_fan_failure(adapter, eicr);
2743 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2744 ixgbe_ptp_check_pps_event(adapter, eicr);
2746 /* re-enable the original interrupt state, no lsc, no queues */
2747 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2748 ixgbe_irq_enable(adapter, false, false);
2753 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2755 struct ixgbe_q_vector *q_vector = data;
2757 /* EIAM disabled interrupts (on this vector) for us */
2759 if (q_vector->rx.ring || q_vector->tx.ring)
2760 napi_schedule(&q_vector->napi);
2766 * ixgbe_poll - NAPI Rx polling callback
2767 * @napi: structure for representing this polling device
2768 * @budget: how many packets driver is allowed to clean
2770 * This function is used for legacy and MSI, NAPI mode
2772 int ixgbe_poll(struct napi_struct *napi, int budget)
2774 struct ixgbe_q_vector *q_vector =
2775 container_of(napi, struct ixgbe_q_vector, napi);
2776 struct ixgbe_adapter *adapter = q_vector->adapter;
2777 struct ixgbe_ring *ring;
2778 int per_ring_budget, work_done = 0;
2779 bool clean_complete = true;
2781 #ifdef CONFIG_IXGBE_DCA
2782 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2783 ixgbe_update_dca(q_vector);
2786 ixgbe_for_each_ring(ring, q_vector->tx)
2787 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2789 /* Exit if we are called by netpoll or busy polling is active */
2790 if ((budget <= 0) || !ixgbe_qv_lock_napi(q_vector))
2793 /* attempt to distribute budget to each queue fairly, but don't allow
2794 * the budget to go below 1 because we'll exit polling */
2795 if (q_vector->rx.count > 1)
2796 per_ring_budget = max(budget/q_vector->rx.count, 1);
2798 per_ring_budget = budget;
2800 ixgbe_for_each_ring(ring, q_vector->rx) {
2801 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
2804 work_done += cleaned;
2805 clean_complete &= (cleaned < per_ring_budget);
2808 ixgbe_qv_unlock_napi(q_vector);
2809 /* If all work not completed, return budget and keep polling */
2810 if (!clean_complete)
2813 /* all work done, exit the polling mode */
2814 napi_complete_done(napi, work_done);
2815 if (adapter->rx_itr_setting & 1)
2816 ixgbe_set_itr(q_vector);
2817 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2818 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2824 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2825 * @adapter: board private structure
2827 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2828 * interrupts from the kernel.
2830 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2832 struct net_device *netdev = adapter->netdev;
2836 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2837 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2838 struct msix_entry *entry = &adapter->msix_entries[vector];
2840 if (q_vector->tx.ring && q_vector->rx.ring) {
2841 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2842 "%s-%s-%d", netdev->name, "TxRx", ri++);
2844 } else if (q_vector->rx.ring) {
2845 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2846 "%s-%s-%d", netdev->name, "rx", ri++);
2847 } else if (q_vector->tx.ring) {
2848 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2849 "%s-%s-%d", netdev->name, "tx", ti++);
2851 /* skip this unused q_vector */
2854 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2855 q_vector->name, q_vector);
2857 e_err(probe, "request_irq failed for MSIX interrupt "
2858 "Error: %d\n", err);
2859 goto free_queue_irqs;
2861 /* If Flow Director is enabled, set interrupt affinity */
2862 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2863 /* assign the mask for this irq */
2864 irq_set_affinity_hint(entry->vector,
2865 &q_vector->affinity_mask);
2869 err = request_irq(adapter->msix_entries[vector].vector,
2870 ixgbe_msix_other, 0, netdev->name, adapter);
2872 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2873 goto free_queue_irqs;
2881 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2883 free_irq(adapter->msix_entries[vector].vector,
2884 adapter->q_vector[vector]);
2886 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2887 pci_disable_msix(adapter->pdev);
2888 kfree(adapter->msix_entries);
2889 adapter->msix_entries = NULL;
2894 * ixgbe_intr - legacy mode Interrupt Handler
2895 * @irq: interrupt number
2896 * @data: pointer to a network interface device structure
2898 static irqreturn_t ixgbe_intr(int irq, void *data)
2900 struct ixgbe_adapter *adapter = data;
2901 struct ixgbe_hw *hw = &adapter->hw;
2902 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2906 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2907 * before the read of EICR.
2909 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2911 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2912 * therefore no explicit interrupt disable is necessary */
2913 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2916 * shared interrupt alert!
2917 * make sure interrupts are enabled because the read will
2918 * have disabled interrupts due to EIAM
2919 * finish the workaround of silicon errata on 82598. Unmask
2920 * the interrupt that we masked before the EICR read.
2922 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2923 ixgbe_irq_enable(adapter, true, true);
2924 return IRQ_NONE; /* Not our interrupt */
2927 if (eicr & IXGBE_EICR_LSC)
2928 ixgbe_check_lsc(adapter);
2930 switch (hw->mac.type) {
2931 case ixgbe_mac_82599EB:
2932 ixgbe_check_sfp_event(adapter, eicr);
2934 case ixgbe_mac_X540:
2935 case ixgbe_mac_X550:
2936 case ixgbe_mac_X550EM_x:
2937 if (eicr & IXGBE_EICR_ECC) {
2938 e_info(link, "Received ECC Err, initiating reset\n");
2939 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2940 ixgbe_service_event_schedule(adapter);
2941 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2943 ixgbe_check_overtemp_event(adapter, eicr);
2949 ixgbe_check_fan_failure(adapter, eicr);
2950 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2951 ixgbe_ptp_check_pps_event(adapter, eicr);
2953 /* would disable interrupts here but EIAM disabled it */
2954 napi_schedule(&q_vector->napi);
2957 * re-enable link(maybe) and non-queue interrupts, no flush.
2958 * ixgbe_poll will re-enable the queue interrupts
2960 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2961 ixgbe_irq_enable(adapter, false, false);
2967 * ixgbe_request_irq - initialize interrupts
2968 * @adapter: board private structure
2970 * Attempts to configure interrupts using the best available
2971 * capabilities of the hardware and kernel.
2973 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2975 struct net_device *netdev = adapter->netdev;
2978 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2979 err = ixgbe_request_msix_irqs(adapter);
2980 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2981 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2982 netdev->name, adapter);
2984 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2985 netdev->name, adapter);
2988 e_err(probe, "request_irq failed, Error %d\n", err);
2993 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2997 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2998 free_irq(adapter->pdev->irq, adapter);
3002 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3003 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3004 struct msix_entry *entry = &adapter->msix_entries[vector];
3006 /* free only the irqs that were actually requested */
3007 if (!q_vector->rx.ring && !q_vector->tx.ring)
3010 /* clear the affinity_mask in the IRQ descriptor */
3011 irq_set_affinity_hint(entry->vector, NULL);
3013 free_irq(entry->vector, q_vector);
3016 free_irq(adapter->msix_entries[vector++].vector, adapter);
3020 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3021 * @adapter: board private structure
3023 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3025 switch (adapter->hw.mac.type) {
3026 case ixgbe_mac_82598EB:
3027 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3029 case ixgbe_mac_82599EB:
3030 case ixgbe_mac_X540:
3031 case ixgbe_mac_X550:
3032 case ixgbe_mac_X550EM_x:
3033 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3034 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3035 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3040 IXGBE_WRITE_FLUSH(&adapter->hw);
3041 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3044 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3045 synchronize_irq(adapter->msix_entries[vector].vector);
3047 synchronize_irq(adapter->msix_entries[vector++].vector);
3049 synchronize_irq(adapter->pdev->irq);
3054 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3057 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3059 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3061 ixgbe_write_eitr(q_vector);
3063 ixgbe_set_ivar(adapter, 0, 0, 0);
3064 ixgbe_set_ivar(adapter, 1, 0, 0);
3066 e_info(hw, "Legacy interrupt IVAR setup done\n");
3070 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3071 * @adapter: board private structure
3072 * @ring: structure containing ring specific data
3074 * Configure the Tx descriptor ring after a reset.
3076 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3077 struct ixgbe_ring *ring)
3079 struct ixgbe_hw *hw = &adapter->hw;
3080 u64 tdba = ring->dma;
3082 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3083 u8 reg_idx = ring->reg_idx;
3085 /* disable queue to avoid issues while updating state */
3086 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3087 IXGBE_WRITE_FLUSH(hw);
3089 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3090 (tdba & DMA_BIT_MASK(32)));
3091 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3092 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3093 ring->count * sizeof(union ixgbe_adv_tx_desc));
3094 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3095 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3096 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3099 * set WTHRESH to encourage burst writeback, it should not be set
3100 * higher than 1 when:
3101 * - ITR is 0 as it could cause false TX hangs
3102 * - ITR is set to > 100k int/sec and BQL is enabled
3104 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3105 * to or less than the number of on chip descriptors, which is
3108 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3109 txdctl |= (1 << 16); /* WTHRESH = 1 */
3111 txdctl |= (8 << 16); /* WTHRESH = 8 */
3114 * Setting PTHRESH to 32 both improves performance
3115 * and avoids a TX hang with DFP enabled
3117 txdctl |= (1 << 8) | /* HTHRESH = 1 */
3118 32; /* PTHRESH = 32 */
3120 /* reinitialize flowdirector state */
3121 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3122 ring->atr_sample_rate = adapter->atr_sample_rate;
3123 ring->atr_count = 0;
3124 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3126 ring->atr_sample_rate = 0;
3129 /* initialize XPS */
3130 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3131 struct ixgbe_q_vector *q_vector = ring->q_vector;
3134 netif_set_xps_queue(ring->netdev,
3135 &q_vector->affinity_mask,
3139 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3142 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3144 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3145 if (hw->mac.type == ixgbe_mac_82598EB &&
3146 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3149 /* poll to verify queue is enabled */
3151 usleep_range(1000, 2000);
3152 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3153 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3155 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3158 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3160 struct ixgbe_hw *hw = &adapter->hw;
3162 u8 tcs = netdev_get_num_tc(adapter->netdev);
3164 if (hw->mac.type == ixgbe_mac_82598EB)
3167 /* disable the arbiter while setting MTQC */
3168 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3169 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3170 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3172 /* set transmit pool layout */
3173 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3174 mtqc = IXGBE_MTQC_VT_ENA;
3176 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3178 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3179 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3180 mtqc |= IXGBE_MTQC_32VF;
3182 mtqc |= IXGBE_MTQC_64VF;
3185 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3187 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3189 mtqc = IXGBE_MTQC_64Q_1PB;
3192 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3194 /* Enable Security TX Buffer IFG for multiple pb */
3196 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3197 sectx |= IXGBE_SECTX_DCB;
3198 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3201 /* re-enable the arbiter */
3202 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3203 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3207 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3208 * @adapter: board private structure
3210 * Configure the Tx unit of the MAC after a reset.
3212 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3214 struct ixgbe_hw *hw = &adapter->hw;
3218 ixgbe_setup_mtqc(adapter);
3220 if (hw->mac.type != ixgbe_mac_82598EB) {
3221 /* DMATXCTL.EN must be before Tx queues are enabled */
3222 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3223 dmatxctl |= IXGBE_DMATXCTL_TE;
3224 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3227 /* Setup the HW Tx Head and Tail descriptor pointers */
3228 for (i = 0; i < adapter->num_tx_queues; i++)
3229 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3232 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3233 struct ixgbe_ring *ring)
3235 struct ixgbe_hw *hw = &adapter->hw;
3236 u8 reg_idx = ring->reg_idx;
3237 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3239 srrctl |= IXGBE_SRRCTL_DROP_EN;
3241 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3244 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3245 struct ixgbe_ring *ring)
3247 struct ixgbe_hw *hw = &adapter->hw;
3248 u8 reg_idx = ring->reg_idx;
3249 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3251 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3253 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3256 #ifdef CONFIG_IXGBE_DCB
3257 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3259 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3263 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3265 if (adapter->ixgbe_ieee_pfc)
3266 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3269 * We should set the drop enable bit if:
3272 * Number of Rx queues > 1 and flow control is disabled
3274 * This allows us to avoid head of line blocking for security
3275 * and performance reasons.
3277 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3278 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3279 for (i = 0; i < adapter->num_rx_queues; i++)
3280 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3282 for (i = 0; i < adapter->num_rx_queues; i++)
3283 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3287 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3289 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3290 struct ixgbe_ring *rx_ring)
3292 struct ixgbe_hw *hw = &adapter->hw;
3294 u8 reg_idx = rx_ring->reg_idx;
3296 if (hw->mac.type == ixgbe_mac_82598EB) {
3297 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3300 * if VMDq is not active we must program one srrctl register
3301 * per RSS queue since we have enabled RDRXCTL.MVMEN
3306 /* configure header buffer length, needed for RSC */
3307 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3309 /* configure the packet buffer length */
3310 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3312 /* configure descriptor type */
3313 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3315 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3319 * Return a number of entries in the RSS indirection table
3321 * @adapter: device handle
3323 * - 82598/82599/X540: 128
3324 * - X550(non-SRIOV mode): 512
3325 * - X550(SRIOV mode): 64
3327 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3329 if (adapter->hw.mac.type < ixgbe_mac_X550)
3331 else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3338 * Write the RETA table to HW
3340 * @adapter: device handle
3342 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3344 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3346 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3347 struct ixgbe_hw *hw = &adapter->hw;
3350 u8 *indir_tbl = adapter->rss_indir_tbl;
3352 /* Fill out the redirection table as follows:
3353 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3355 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3356 * - X550: 8 bit wide entries containing 6 bit RSS index
3358 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3359 indices_multi = 0x11;
3361 indices_multi = 0x1;
3363 /* Write redirection table to HW */
3364 for (i = 0; i < reta_entries; i++) {
3365 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3368 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3370 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3378 * Write the RETA table to HW (for x550 devices in SRIOV mode)
3380 * @adapter: device handle
3382 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3384 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3386 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3387 struct ixgbe_hw *hw = &adapter->hw;
3389 unsigned int pf_pool = adapter->num_vfs;
3391 /* Write redirection table to HW */
3392 for (i = 0; i < reta_entries; i++) {
3393 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3395 IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3402 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3404 struct ixgbe_hw *hw = &adapter->hw;
3406 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3407 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3409 /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3410 * make full use of any rings they may have. We will use the
3411 * PSRTYPE register to control how many rings we use within the PF.
3413 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3416 /* Fill out hash function seeds */
3417 for (i = 0; i < 10; i++)
3418 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3420 /* Fill out redirection table */
3421 memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3423 for (i = 0, j = 0; i < reta_entries; i++, j++) {
3427 adapter->rss_indir_tbl[i] = j;
3430 ixgbe_store_reta(adapter);
3433 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3435 struct ixgbe_hw *hw = &adapter->hw;
3436 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3437 unsigned int pf_pool = adapter->num_vfs;
3440 /* Fill out hash function seeds */
3441 for (i = 0; i < 10; i++)
3442 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3443 adapter->rss_key[i]);
3445 /* Fill out the redirection table */
3446 for (i = 0, j = 0; i < 64; i++, j++) {
3450 adapter->rss_indir_tbl[i] = j;
3453 ixgbe_store_vfreta(adapter);
3456 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3458 struct ixgbe_hw *hw = &adapter->hw;
3459 u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3462 /* Disable indicating checksum in descriptor, enables RSS hash */
3463 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3464 rxcsum |= IXGBE_RXCSUM_PCSD;
3465 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3467 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3468 if (adapter->ring_feature[RING_F_RSS].mask)
3469 mrqc = IXGBE_MRQC_RSSEN;
3471 u8 tcs = netdev_get_num_tc(adapter->netdev);
3473 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3475 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3477 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3478 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3479 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3481 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3484 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3486 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3488 mrqc = IXGBE_MRQC_RSSEN;
3492 /* Perform hash on these packet types */
3493 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3494 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3495 IXGBE_MRQC_RSS_FIELD_IPV6 |
3496 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3498 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3499 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3500 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3501 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3503 netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3504 if ((hw->mac.type >= ixgbe_mac_X550) &&
3505 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3506 unsigned int pf_pool = adapter->num_vfs;
3508 /* Enable VF RSS mode */
3509 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3510 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3512 /* Setup RSS through the VF registers */
3513 ixgbe_setup_vfreta(adapter);
3514 vfmrqc = IXGBE_MRQC_RSSEN;
3515 vfmrqc |= rss_field;
3516 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3518 ixgbe_setup_reta(adapter);
3520 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3525 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3526 * @adapter: address of board private structure
3527 * @index: index of ring to set
3529 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3530 struct ixgbe_ring *ring)
3532 struct ixgbe_hw *hw = &adapter->hw;
3534 u8 reg_idx = ring->reg_idx;
3536 if (!ring_is_rsc_enabled(ring))
3539 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3540 rscctrl |= IXGBE_RSCCTL_RSCEN;
3542 * we must limit the number of descriptors so that the
3543 * total size of max desc * buf_len is not greater
3546 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3547 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3550 #define IXGBE_MAX_RX_DESC_POLL 10
3551 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3552 struct ixgbe_ring *ring)
3554 struct ixgbe_hw *hw = &adapter->hw;
3555 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3557 u8 reg_idx = ring->reg_idx;
3559 if (ixgbe_removed(hw->hw_addr))
3561 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3562 if (hw->mac.type == ixgbe_mac_82598EB &&
3563 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3567 usleep_range(1000, 2000);
3568 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3569 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3572 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3573 "the polling period\n", reg_idx);
3577 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3578 struct ixgbe_ring *ring)
3580 struct ixgbe_hw *hw = &adapter->hw;
3581 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3583 u8 reg_idx = ring->reg_idx;
3585 if (ixgbe_removed(hw->hw_addr))
3587 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3588 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3590 /* write value back with RXDCTL.ENABLE bit cleared */
3591 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3593 if (hw->mac.type == ixgbe_mac_82598EB &&
3594 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3597 /* the hardware may take up to 100us to really disable the rx queue */
3600 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3601 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3604 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3605 "the polling period\n", reg_idx);
3609 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3610 struct ixgbe_ring *ring)
3612 struct ixgbe_hw *hw = &adapter->hw;
3613 u64 rdba = ring->dma;
3615 u8 reg_idx = ring->reg_idx;
3617 /* disable queue to avoid issues while updating state */
3618 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3619 ixgbe_disable_rx_queue(adapter, ring);
3621 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3622 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3623 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3624 ring->count * sizeof(union ixgbe_adv_rx_desc));
3625 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3626 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3627 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3629 ixgbe_configure_srrctl(adapter, ring);
3630 ixgbe_configure_rscctl(adapter, ring);
3632 if (hw->mac.type == ixgbe_mac_82598EB) {
3634 * enable cache line friendly hardware writes:
3635 * PTHRESH=32 descriptors (half the internal cache),
3636 * this also removes ugly rx_no_buffer_count increment
3637 * HTHRESH=4 descriptors (to minimize latency on fetch)
3638 * WTHRESH=8 burst writeback up to two cache lines
3640 rxdctl &= ~0x3FFFFF;
3644 /* enable receive descriptor ring */
3645 rxdctl |= IXGBE_RXDCTL_ENABLE;
3646 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3648 ixgbe_rx_desc_queue_enable(adapter, ring);
3649 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3652 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3654 struct ixgbe_hw *hw = &adapter->hw;
3655 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3658 /* PSRTYPE must be initialized in non 82598 adapters */
3659 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3660 IXGBE_PSRTYPE_UDPHDR |
3661 IXGBE_PSRTYPE_IPV4HDR |
3662 IXGBE_PSRTYPE_L2HDR |
3663 IXGBE_PSRTYPE_IPV6HDR;
3665 if (hw->mac.type == ixgbe_mac_82598EB)
3673 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3674 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3677 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3679 struct ixgbe_hw *hw = &adapter->hw;
3680 u32 reg_offset, vf_shift;
3681 u32 gcr_ext, vmdctl;
3684 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3687 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3688 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3689 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3690 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3691 vmdctl |= IXGBE_VT_CTL_REPLEN;
3692 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3694 vf_shift = VMDQ_P(0) % 32;
3695 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3697 /* Enable only the PF's pool for Tx/Rx */
3698 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3699 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3700 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3701 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3702 if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3703 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3705 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3706 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3709 * Set up VF register offsets for selected VT Mode,
3710 * i.e. 32 or 64 VFs for SR-IOV
3712 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3713 case IXGBE_82599_VMDQ_8Q_MASK:
3714 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3716 case IXGBE_82599_VMDQ_4Q_MASK:
3717 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3720 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3724 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3727 /* Enable MAC Anti-Spoofing */
3728 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3731 /* Ensure LLDP and FC is set for Ethertype Antispoofing if we will be
3732 * calling set_ethertype_anti_spoofing for each VF in loop below
3734 if (hw->mac.ops.set_ethertype_anti_spoofing) {
3735 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_LLDP),
3736 (IXGBE_ETQF_FILTER_EN |
3737 IXGBE_ETQF_TX_ANTISPOOF |
3740 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FC),
3741 (IXGBE_ETQF_FILTER_EN |
3742 IXGBE_ETQF_TX_ANTISPOOF |
3746 /* For VFs that have spoof checking turned off */
3747 for (i = 0; i < adapter->num_vfs; i++) {
3748 if (!adapter->vfinfo[i].spoofchk_enabled)
3749 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3751 /* enable ethertype anti spoofing if hw supports it */
3752 if (hw->mac.ops.set_ethertype_anti_spoofing)
3753 hw->mac.ops.set_ethertype_anti_spoofing(hw, true, i);
3755 /* Enable/Disable RSS query feature */
3756 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3757 adapter->vfinfo[i].rss_query_enabled);
3761 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3763 struct ixgbe_hw *hw = &adapter->hw;
3764 struct net_device *netdev = adapter->netdev;
3765 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3766 struct ixgbe_ring *rx_ring;
3771 /* adjust max frame to be able to do baby jumbo for FCoE */
3772 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3773 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3774 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3776 #endif /* IXGBE_FCOE */
3778 /* adjust max frame to be at least the size of a standard frame */
3779 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3780 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3782 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3783 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3784 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3785 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3787 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3790 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3791 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3792 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3793 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3796 * Setup the HW Rx Head and Tail Descriptor Pointers and
3797 * the Base and Length of the Rx Descriptor Ring
3799 for (i = 0; i < adapter->num_rx_queues; i++) {
3800 rx_ring = adapter->rx_ring[i];
3801 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3802 set_ring_rsc_enabled(rx_ring);
3804 clear_ring_rsc_enabled(rx_ring);
3808 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3810 struct ixgbe_hw *hw = &adapter->hw;
3811 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3813 switch (hw->mac.type) {
3814 case ixgbe_mac_82598EB:
3816 * For VMDq support of different descriptor types or
3817 * buffer sizes through the use of multiple SRRCTL
3818 * registers, RDRXCTL.MVMEN must be set to 1
3820 * also, the manual doesn't mention it clearly but DCA hints
3821 * will only use queue 0's tags unless this bit is set. Side
3822 * effects of setting this bit are only that SRRCTL must be
3823 * fully programmed [0..15]
3825 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3827 case ixgbe_mac_X550:
3828 case ixgbe_mac_X550EM_x:
3829 if (adapter->num_vfs)
3830 rdrxctl |= IXGBE_RDRXCTL_PSP;
3831 /* fall through for older HW */
3832 case ixgbe_mac_82599EB:
3833 case ixgbe_mac_X540:
3834 /* Disable RSC for ACK packets */
3835 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3836 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3837 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3838 /* hardware requires some bits to be set by default */
3839 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3840 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3843 /* We should do nothing since we don't know this hardware */
3847 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3851 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3852 * @adapter: board private structure
3854 * Configure the Rx unit of the MAC after a reset.
3856 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3858 struct ixgbe_hw *hw = &adapter->hw;
3862 /* disable receives while setting up the descriptors */
3863 hw->mac.ops.disable_rx(hw);
3865 ixgbe_setup_psrtype(adapter);
3866 ixgbe_setup_rdrxctl(adapter);
3869 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3870 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3871 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3872 rfctl |= IXGBE_RFCTL_RSC_DIS;
3873 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3875 /* Program registers for the distribution of queues */
3876 ixgbe_setup_mrqc(adapter);
3878 /* set_rx_buffer_len must be called before ring initialization */
3879 ixgbe_set_rx_buffer_len(adapter);
3882 * Setup the HW Rx Head and Tail Descriptor Pointers and
3883 * the Base and Length of the Rx Descriptor Ring
3885 for (i = 0; i < adapter->num_rx_queues; i++)
3886 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3888 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3889 /* disable drop enable for 82598 parts */
3890 if (hw->mac.type == ixgbe_mac_82598EB)
3891 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3893 /* enable all receives */
3894 rxctrl |= IXGBE_RXCTRL_RXEN;
3895 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3898 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3899 __be16 proto, u16 vid)
3901 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3902 struct ixgbe_hw *hw = &adapter->hw;
3904 /* add VID to filter table */
3905 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3906 set_bit(vid, adapter->active_vlans);
3911 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3912 __be16 proto, u16 vid)
3914 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3915 struct ixgbe_hw *hw = &adapter->hw;
3917 /* remove VID from filter table */
3918 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3919 clear_bit(vid, adapter->active_vlans);
3925 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3926 * @adapter: driver data
3928 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3930 struct ixgbe_hw *hw = &adapter->hw;
3934 switch (hw->mac.type) {
3935 case ixgbe_mac_82598EB:
3936 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3937 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3938 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3940 case ixgbe_mac_82599EB:
3941 case ixgbe_mac_X540:
3942 case ixgbe_mac_X550:
3943 case ixgbe_mac_X550EM_x:
3944 for (i = 0; i < adapter->num_rx_queues; i++) {
3945 struct ixgbe_ring *ring = adapter->rx_ring[i];
3947 if (ring->l2_accel_priv)
3950 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3951 vlnctrl &= ~IXGBE_RXDCTL_VME;
3952 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3961 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3962 * @adapter: driver data
3964 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3966 struct ixgbe_hw *hw = &adapter->hw;
3970 switch (hw->mac.type) {
3971 case ixgbe_mac_82598EB:
3972 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3973 vlnctrl |= IXGBE_VLNCTRL_VME;
3974 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3976 case ixgbe_mac_82599EB:
3977 case ixgbe_mac_X540:
3978 case ixgbe_mac_X550:
3979 case ixgbe_mac_X550EM_x:
3980 for (i = 0; i < adapter->num_rx_queues; i++) {
3981 struct ixgbe_ring *ring = adapter->rx_ring[i];
3983 if (ring->l2_accel_priv)
3986 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3987 vlnctrl |= IXGBE_RXDCTL_VME;
3988 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3996 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4000 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4002 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4003 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4007 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4008 * @netdev: network interface device structure
4010 * Writes multicast address list to the MTA hash table.
4011 * Returns: -ENOMEM on failure
4012 * 0 on no addresses written
4013 * X on writing X addresses to MTA
4015 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4017 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4018 struct ixgbe_hw *hw = &adapter->hw;
4020 if (!netif_running(netdev))
4023 if (hw->mac.ops.update_mc_addr_list)
4024 hw->mac.ops.update_mc_addr_list(hw, netdev);
4028 #ifdef CONFIG_PCI_IOV
4029 ixgbe_restore_vf_multicasts(adapter);
4032 return netdev_mc_count(netdev);
4035 #ifdef CONFIG_PCI_IOV
4036 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4038 struct ixgbe_hw *hw = &adapter->hw;
4040 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4041 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4042 hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
4043 adapter->mac_table[i].queue,
4046 hw->mac.ops.clear_rar(hw, i);
4048 adapter->mac_table[i].state &= ~(IXGBE_MAC_STATE_MODIFIED);
4053 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4055 struct ixgbe_hw *hw = &adapter->hw;
4057 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4058 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
4059 if (adapter->mac_table[i].state &
4060 IXGBE_MAC_STATE_IN_USE)
4061 hw->mac.ops.set_rar(hw, i,
4062 adapter->mac_table[i].addr,
4063 adapter->mac_table[i].queue,
4066 hw->mac.ops.clear_rar(hw, i);
4068 adapter->mac_table[i].state &=
4069 ~(IXGBE_MAC_STATE_MODIFIED);
4074 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4077 struct ixgbe_hw *hw = &adapter->hw;
4079 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4080 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4081 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4082 eth_zero_addr(adapter->mac_table[i].addr);
4083 adapter->mac_table[i].queue = 0;
4085 ixgbe_sync_mac_table(adapter);
4088 static int ixgbe_available_rars(struct ixgbe_adapter *adapter)
4090 struct ixgbe_hw *hw = &adapter->hw;
4093 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4094 if (adapter->mac_table[i].state == 0)
4100 /* this function destroys the first RAR entry */
4101 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter,
4104 struct ixgbe_hw *hw = &adapter->hw;
4106 memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
4107 adapter->mac_table[0].queue = VMDQ_P(0);
4108 adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
4109 IXGBE_MAC_STATE_IN_USE);
4110 hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
4111 adapter->mac_table[0].queue,
4115 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4117 struct ixgbe_hw *hw = &adapter->hw;
4120 if (is_zero_ether_addr(addr))
4123 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4124 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4126 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
4127 IXGBE_MAC_STATE_IN_USE);
4128 ether_addr_copy(adapter->mac_table[i].addr, addr);
4129 adapter->mac_table[i].queue = queue;
4130 ixgbe_sync_mac_table(adapter);
4136 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4138 /* search table for addr, if found, set to 0 and sync */
4140 struct ixgbe_hw *hw = &adapter->hw;
4142 if (is_zero_ether_addr(addr))
4145 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4146 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
4147 adapter->mac_table[i].queue == queue) {
4148 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4149 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4150 eth_zero_addr(adapter->mac_table[i].addr);
4151 adapter->mac_table[i].queue = 0;
4152 ixgbe_sync_mac_table(adapter);
4159 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4160 * @netdev: network interface device structure
4162 * Writes unicast address list to the RAR table.
4163 * Returns: -ENOMEM on failure/insufficient address space
4164 * 0 on no addresses written
4165 * X on writing X addresses to the RAR table
4167 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4169 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4172 /* return ENOMEM indicating insufficient memory for addresses */
4173 if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
4176 if (!netdev_uc_empty(netdev)) {
4177 struct netdev_hw_addr *ha;
4178 netdev_for_each_uc_addr(ha, netdev) {
4179 ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4180 ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4188 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4189 * @netdev: network interface device structure
4191 * The set_rx_method entry point is called whenever the unicast/multicast
4192 * address list or the network interface flags are updated. This routine is
4193 * responsible for configuring the hardware for proper unicast, multicast and
4196 void ixgbe_set_rx_mode(struct net_device *netdev)
4198 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4199 struct ixgbe_hw *hw = &adapter->hw;
4200 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4204 /* Check for Promiscuous and All Multicast modes */
4205 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4206 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4208 /* set all bits that we expect to always be set */
4209 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4210 fctrl |= IXGBE_FCTRL_BAM;
4211 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4212 fctrl |= IXGBE_FCTRL_PMCF;
4214 /* clear the bits we are changing the status of */
4215 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4216 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4217 if (netdev->flags & IFF_PROMISC) {
4218 hw->addr_ctrl.user_set_promisc = true;
4219 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4220 vmolr |= IXGBE_VMOLR_MPE;
4221 /* Only disable hardware filter vlans in promiscuous mode
4222 * if SR-IOV and VMDQ are disabled - otherwise ensure
4223 * that hardware VLAN filters remain enabled.
4225 if (adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
4226 IXGBE_FLAG_SRIOV_ENABLED))
4227 vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4229 if (netdev->flags & IFF_ALLMULTI) {
4230 fctrl |= IXGBE_FCTRL_MPE;
4231 vmolr |= IXGBE_VMOLR_MPE;
4233 vlnctrl |= IXGBE_VLNCTRL_VFE;
4234 hw->addr_ctrl.user_set_promisc = false;
4238 * Write addresses to available RAR registers, if there is not
4239 * sufficient space to store all the addresses then enable
4240 * unicast promiscuous mode
4242 count = ixgbe_write_uc_addr_list(netdev, VMDQ_P(0));
4244 fctrl |= IXGBE_FCTRL_UPE;
4245 vmolr |= IXGBE_VMOLR_ROPE;
4248 /* Write addresses to the MTA, if the attempt fails
4249 * then we should just turn on promiscuous mode so
4250 * that we can at least receive multicast traffic
4252 count = ixgbe_write_mc_addr_list(netdev);
4254 fctrl |= IXGBE_FCTRL_MPE;
4255 vmolr |= IXGBE_VMOLR_MPE;
4257 vmolr |= IXGBE_VMOLR_ROMPE;
4260 if (hw->mac.type != ixgbe_mac_82598EB) {
4261 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4262 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4264 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4267 /* This is useful for sniffing bad packets. */
4268 if (adapter->netdev->features & NETIF_F_RXALL) {
4269 /* UPE and MPE will be handled by normal PROMISC logic
4270 * in e1000e_set_rx_mode */
4271 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4272 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4273 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4275 fctrl &= ~(IXGBE_FCTRL_DPF);
4276 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4279 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4280 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4282 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4283 ixgbe_vlan_strip_enable(adapter);
4285 ixgbe_vlan_strip_disable(adapter);
4288 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4292 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4293 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4294 napi_enable(&adapter->q_vector[q_idx]->napi);
4298 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4302 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4303 napi_disable(&adapter->q_vector[q_idx]->napi);
4304 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4305 pr_info("QV %d locked\n", q_idx);
4306 usleep_range(1000, 20000);
4311 static void ixgbe_clear_vxlan_port(struct ixgbe_adapter *adapter)
4313 switch (adapter->hw.mac.type) {
4314 case ixgbe_mac_X550:
4315 case ixgbe_mac_X550EM_x:
4316 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VXLANCTRL, 0);
4317 #ifdef CONFIG_IXGBE_VXLAN
4318 adapter->vxlan_port = 0;
4326 #ifdef CONFIG_IXGBE_DCB
4328 * ixgbe_configure_dcb - Configure DCB hardware
4329 * @adapter: ixgbe adapter struct
4331 * This is called by the driver on open to configure the DCB hardware.
4332 * This is also called by the gennetlink interface when reconfiguring
4335 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4337 struct ixgbe_hw *hw = &adapter->hw;
4338 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4340 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4341 if (hw->mac.type == ixgbe_mac_82598EB)
4342 netif_set_gso_max_size(adapter->netdev, 65536);
4346 if (hw->mac.type == ixgbe_mac_82598EB)
4347 netif_set_gso_max_size(adapter->netdev, 32768);
4350 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4351 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4354 /* reconfigure the hardware */
4355 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4356 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4358 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4360 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4361 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4362 ixgbe_dcb_hw_ets(&adapter->hw,
4363 adapter->ixgbe_ieee_ets,
4365 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4366 adapter->ixgbe_ieee_pfc->pfc_en,
4367 adapter->ixgbe_ieee_ets->prio_tc);
4370 /* Enable RSS Hash per TC */
4371 if (hw->mac.type != ixgbe_mac_82598EB) {
4373 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4380 /* write msb to all 8 TCs in one write */
4381 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4386 /* Additional bittime to account for IXGBE framing */
4387 #define IXGBE_ETH_FRAMING 20
4390 * ixgbe_hpbthresh - calculate high water mark for flow control
4392 * @adapter: board private structure to calculate for
4393 * @pb: packet buffer to calculate
4395 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4397 struct ixgbe_hw *hw = &adapter->hw;
4398 struct net_device *dev = adapter->netdev;
4399 int link, tc, kb, marker;
4402 /* Calculate max LAN frame size */
4403 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4406 /* FCoE traffic class uses FCOE jumbo frames */
4407 if ((dev->features & NETIF_F_FCOE_MTU) &&
4408 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4409 (pb == ixgbe_fcoe_get_tc(adapter)))
4410 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4413 /* Calculate delay value for device */
4414 switch (hw->mac.type) {
4415 case ixgbe_mac_X540:
4416 case ixgbe_mac_X550:
4417 case ixgbe_mac_X550EM_x:
4418 dv_id = IXGBE_DV_X540(link, tc);
4421 dv_id = IXGBE_DV(link, tc);
4425 /* Loopback switch introduces additional latency */
4426 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4427 dv_id += IXGBE_B2BT(tc);
4429 /* Delay value is calculated in bit times convert to KB */
4430 kb = IXGBE_BT2KB(dv_id);
4431 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4433 marker = rx_pba - kb;
4435 /* It is possible that the packet buffer is not large enough
4436 * to provide required headroom. In this case throw an error
4437 * to user and a do the best we can.
4440 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4441 "headroom to support flow control."
4442 "Decrease MTU or number of traffic classes\n", pb);
4450 * ixgbe_lpbthresh - calculate low water mark for for flow control
4452 * @adapter: board private structure to calculate for
4453 * @pb: packet buffer to calculate
4455 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4457 struct ixgbe_hw *hw = &adapter->hw;
4458 struct net_device *dev = adapter->netdev;
4462 /* Calculate max LAN frame size */
4463 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4466 /* FCoE traffic class uses FCOE jumbo frames */
4467 if ((dev->features & NETIF_F_FCOE_MTU) &&
4468 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4469 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4470 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4473 /* Calculate delay value for device */
4474 switch (hw->mac.type) {
4475 case ixgbe_mac_X540:
4476 case ixgbe_mac_X550:
4477 case ixgbe_mac_X550EM_x:
4478 dv_id = IXGBE_LOW_DV_X540(tc);
4481 dv_id = IXGBE_LOW_DV(tc);
4485 /* Delay value is calculated in bit times convert to KB */
4486 return IXGBE_BT2KB(dv_id);
4490 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4492 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4494 struct ixgbe_hw *hw = &adapter->hw;
4495 int num_tc = netdev_get_num_tc(adapter->netdev);
4501 for (i = 0; i < num_tc; i++) {
4502 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4503 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4505 /* Low water marks must not be larger than high water marks */
4506 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4507 hw->fc.low_water[i] = 0;
4510 for (; i < MAX_TRAFFIC_CLASS; i++)
4511 hw->fc.high_water[i] = 0;
4514 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4516 struct ixgbe_hw *hw = &adapter->hw;
4518 u8 tc = netdev_get_num_tc(adapter->netdev);
4520 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4521 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4522 hdrm = 32 << adapter->fdir_pballoc;
4526 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4527 ixgbe_pbthresh_setup(adapter);
4530 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4532 struct ixgbe_hw *hw = &adapter->hw;
4533 struct hlist_node *node2;
4534 struct ixgbe_fdir_filter *filter;
4537 spin_lock(&adapter->fdir_perfect_lock);
4539 if (!hlist_empty(&adapter->fdir_filter_list))
4540 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4542 hlist_for_each_entry_safe(filter, node2,
4543 &adapter->fdir_filter_list, fdir_node) {
4544 if (filter->action == IXGBE_FDIR_DROP_QUEUE) {
4545 queue = IXGBE_FDIR_DROP_QUEUE;
4547 u32 ring = ethtool_get_flow_spec_ring(filter->action);
4548 u8 vf = ethtool_get_flow_spec_ring_vf(filter->action);
4550 if (!vf && (ring >= adapter->num_rx_queues)) {
4551 e_err(drv, "FDIR restore failed without VF, ring: %u\n",
4555 ((vf > adapter->num_vfs) ||
4556 ring >= adapter->num_rx_queues_per_pool)) {
4557 e_err(drv, "FDIR restore failed with VF, vf: %hhu, ring: %u\n",
4562 /* Map the ring onto the absolute queue index */
4564 queue = adapter->rx_ring[ring]->reg_idx;
4567 adapter->num_rx_queues_per_pool) + ring;
4570 ixgbe_fdir_write_perfect_filter_82599(hw,
4571 &filter->filter, filter->sw_idx, queue);
4574 spin_unlock(&adapter->fdir_perfect_lock);
4577 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4578 struct ixgbe_adapter *adapter)
4580 struct ixgbe_hw *hw = &adapter->hw;
4583 /* No unicast promiscuous support for VMDQ devices. */
4584 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4585 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4587 /* clear the affected bit */
4588 vmolr &= ~IXGBE_VMOLR_MPE;
4590 if (dev->flags & IFF_ALLMULTI) {
4591 vmolr |= IXGBE_VMOLR_MPE;
4593 vmolr |= IXGBE_VMOLR_ROMPE;
4594 hw->mac.ops.update_mc_addr_list(hw, dev);
4596 ixgbe_write_uc_addr_list(adapter->netdev, pool);
4597 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4600 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4602 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4603 int rss_i = adapter->num_rx_queues_per_pool;
4604 struct ixgbe_hw *hw = &adapter->hw;
4605 u16 pool = vadapter->pool;
4606 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4607 IXGBE_PSRTYPE_UDPHDR |
4608 IXGBE_PSRTYPE_IPV4HDR |
4609 IXGBE_PSRTYPE_L2HDR |
4610 IXGBE_PSRTYPE_IPV6HDR;
4612 if (hw->mac.type == ixgbe_mac_82598EB)
4620 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4624 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4625 * @rx_ring: ring to free buffers from
4627 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4629 struct device *dev = rx_ring->dev;
4633 /* ring already cleared, nothing to do */
4634 if (!rx_ring->rx_buffer_info)
4637 /* Free all the Rx ring sk_buffs */
4638 for (i = 0; i < rx_ring->count; i++) {
4639 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4641 if (rx_buffer->skb) {
4642 struct sk_buff *skb = rx_buffer->skb;
4643 if (IXGBE_CB(skb)->page_released)
4646 ixgbe_rx_bufsz(rx_ring),
4649 rx_buffer->skb = NULL;
4652 if (!rx_buffer->page)
4655 dma_unmap_page(dev, rx_buffer->dma,
4656 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4657 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4659 rx_buffer->page = NULL;
4662 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4663 memset(rx_ring->rx_buffer_info, 0, size);
4665 /* Zero out the descriptor ring */
4666 memset(rx_ring->desc, 0, rx_ring->size);
4668 rx_ring->next_to_alloc = 0;
4669 rx_ring->next_to_clean = 0;
4670 rx_ring->next_to_use = 0;
4673 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4674 struct ixgbe_ring *rx_ring)
4676 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4677 int index = rx_ring->queue_index + vadapter->rx_base_queue;
4679 /* shutdown specific queue receive and wait for dma to settle */
4680 ixgbe_disable_rx_queue(adapter, rx_ring);
4681 usleep_range(10000, 20000);
4682 ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4683 ixgbe_clean_rx_ring(rx_ring);
4684 rx_ring->l2_accel_priv = NULL;
4687 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4688 struct ixgbe_fwd_adapter *accel)
4690 struct ixgbe_adapter *adapter = accel->real_adapter;
4691 unsigned int rxbase = accel->rx_base_queue;
4692 unsigned int txbase = accel->tx_base_queue;
4695 netif_tx_stop_all_queues(vdev);
4697 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4698 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4699 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4702 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4703 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4704 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4711 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4712 struct ixgbe_fwd_adapter *accel)
4714 struct ixgbe_adapter *adapter = accel->real_adapter;
4715 unsigned int rxbase, txbase, queues;
4716 int i, baseq, err = 0;
4718 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4721 baseq = accel->pool * adapter->num_rx_queues_per_pool;
4722 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4723 accel->pool, adapter->num_rx_pools,
4724 baseq, baseq + adapter->num_rx_queues_per_pool,
4725 adapter->fwd_bitmask);
4727 accel->netdev = vdev;
4728 accel->rx_base_queue = rxbase = baseq;
4729 accel->tx_base_queue = txbase = baseq;
4731 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4732 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4734 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4735 adapter->rx_ring[rxbase + i]->netdev = vdev;
4736 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4737 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4740 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4741 adapter->tx_ring[txbase + i]->netdev = vdev;
4742 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4745 queues = min_t(unsigned int,
4746 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4747 err = netif_set_real_num_tx_queues(vdev, queues);
4751 err = netif_set_real_num_rx_queues(vdev, queues);
4755 if (is_valid_ether_addr(vdev->dev_addr))
4756 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4758 ixgbe_fwd_psrtype(accel);
4759 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4762 ixgbe_fwd_ring_down(vdev, accel);
4766 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4768 struct net_device *upper;
4769 struct list_head *iter;
4772 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4773 if (netif_is_macvlan(upper)) {
4774 struct macvlan_dev *dfwd = netdev_priv(upper);
4775 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4777 if (dfwd->fwd_priv) {
4778 err = ixgbe_fwd_ring_up(upper, vadapter);
4786 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4788 struct ixgbe_hw *hw = &adapter->hw;
4790 ixgbe_configure_pb(adapter);
4791 #ifdef CONFIG_IXGBE_DCB
4792 ixgbe_configure_dcb(adapter);
4795 * We must restore virtualization before VLANs or else
4796 * the VLVF registers will not be populated
4798 ixgbe_configure_virtualization(adapter);
4800 ixgbe_set_rx_mode(adapter->netdev);
4801 ixgbe_restore_vlan(adapter);
4803 switch (hw->mac.type) {
4804 case ixgbe_mac_82599EB:
4805 case ixgbe_mac_X540:
4806 hw->mac.ops.disable_rx_buff(hw);
4812 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4813 ixgbe_init_fdir_signature_82599(&adapter->hw,
4814 adapter->fdir_pballoc);
4815 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4816 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4817 adapter->fdir_pballoc);
4818 ixgbe_fdir_filter_restore(adapter);
4821 switch (hw->mac.type) {
4822 case ixgbe_mac_82599EB:
4823 case ixgbe_mac_X540:
4824 hw->mac.ops.enable_rx_buff(hw);
4830 #ifdef CONFIG_IXGBE_DCA
4832 if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
4833 ixgbe_setup_dca(adapter);
4834 #endif /* CONFIG_IXGBE_DCA */
4837 /* configure FCoE L2 filters, redirection table, and Rx control */
4838 ixgbe_configure_fcoe(adapter);
4840 #endif /* IXGBE_FCOE */
4841 ixgbe_configure_tx(adapter);
4842 ixgbe_configure_rx(adapter);
4843 ixgbe_configure_dfwd(adapter);
4847 * ixgbe_sfp_link_config - set up SFP+ link
4848 * @adapter: pointer to private adapter struct
4850 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4853 * We are assuming the worst case scenario here, and that
4854 * is that an SFP was inserted/removed after the reset
4855 * but before SFP detection was enabled. As such the best
4856 * solution is to just start searching as soon as we start
4858 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4859 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4861 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4862 adapter->sfp_poll_time = 0;
4866 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4867 * @hw: pointer to private hardware struct
4869 * Returns 0 on success, negative on failure
4871 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4874 bool autoneg, link_up = false;
4875 int ret = IXGBE_ERR_LINK_SETUP;
4877 if (hw->mac.ops.check_link)
4878 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4883 speed = hw->phy.autoneg_advertised;
4884 if ((!speed) && (hw->mac.ops.get_link_capabilities))
4885 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4890 if (hw->mac.ops.setup_link)
4891 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4896 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4898 struct ixgbe_hw *hw = &adapter->hw;
4901 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4902 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4904 gpie |= IXGBE_GPIE_EIAME;
4906 * use EIAM to auto-mask when MSI-X interrupt is asserted
4907 * this saves a register write for every interrupt
4909 switch (hw->mac.type) {
4910 case ixgbe_mac_82598EB:
4911 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4913 case ixgbe_mac_82599EB:
4914 case ixgbe_mac_X540:
4915 case ixgbe_mac_X550:
4916 case ixgbe_mac_X550EM_x:
4918 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4919 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4923 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4924 * specifically only auto mask tx and rx interrupts */
4925 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4928 /* XXX: to interrupt immediately for EICS writes, enable this */
4929 /* gpie |= IXGBE_GPIE_EIMEN; */
4931 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4932 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4934 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4935 case IXGBE_82599_VMDQ_8Q_MASK:
4936 gpie |= IXGBE_GPIE_VTMODE_16;
4938 case IXGBE_82599_VMDQ_4Q_MASK:
4939 gpie |= IXGBE_GPIE_VTMODE_32;
4942 gpie |= IXGBE_GPIE_VTMODE_64;
4947 /* Enable Thermal over heat sensor interrupt */
4948 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4949 switch (adapter->hw.mac.type) {
4950 case ixgbe_mac_82599EB:
4951 gpie |= IXGBE_SDP0_GPIEN_8259X;
4958 /* Enable fan failure interrupt */
4959 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4960 gpie |= IXGBE_SDP1_GPIEN(hw);
4962 switch (hw->mac.type) {
4963 case ixgbe_mac_82599EB:
4964 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
4966 case ixgbe_mac_X550EM_x:
4967 gpie |= IXGBE_SDP0_GPIEN_X540;
4973 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4976 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4978 struct ixgbe_hw *hw = &adapter->hw;
4982 ixgbe_get_hw_control(adapter);
4983 ixgbe_setup_gpie(adapter);
4985 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4986 ixgbe_configure_msix(adapter);
4988 ixgbe_configure_msi_and_legacy(adapter);
4990 /* enable the optics for 82599 SFP+ fiber */
4991 if (hw->mac.ops.enable_tx_laser)
4992 hw->mac.ops.enable_tx_laser(hw);
4994 if (hw->phy.ops.set_phy_power)
4995 hw->phy.ops.set_phy_power(hw, true);
4997 smp_mb__before_atomic();
4998 clear_bit(__IXGBE_DOWN, &adapter->state);
4999 ixgbe_napi_enable_all(adapter);
5001 if (ixgbe_is_sfp(hw)) {
5002 ixgbe_sfp_link_config(adapter);
5004 err = ixgbe_non_sfp_link_config(hw);
5006 e_err(probe, "link_config FAILED %d\n", err);
5009 /* clear any pending interrupts, may auto mask */
5010 IXGBE_READ_REG(hw, IXGBE_EICR);
5011 ixgbe_irq_enable(adapter, true, true);
5014 * If this adapter has a fan, check to see if we had a failure
5015 * before we enabled the interrupt.
5017 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5018 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5019 if (esdp & IXGBE_ESDP_SDP1)
5020 e_crit(drv, "Fan has stopped, replace the adapter\n");
5023 /* bring the link up in the watchdog, this could race with our first
5024 * link up interrupt but shouldn't be a problem */
5025 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5026 adapter->link_check_timeout = jiffies;
5027 mod_timer(&adapter->service_timer, jiffies);
5029 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5030 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5031 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5032 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5035 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5037 WARN_ON(in_interrupt());
5038 /* put off any impending NetWatchDogTimeout */
5039 adapter->netdev->trans_start = jiffies;
5041 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5042 usleep_range(1000, 2000);
5043 ixgbe_down(adapter);
5045 * If SR-IOV enabled then wait a bit before bringing the adapter
5046 * back up to give the VFs time to respond to the reset. The
5047 * two second wait is based upon the watchdog timer cycle in
5050 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5053 clear_bit(__IXGBE_RESETTING, &adapter->state);
5056 void ixgbe_up(struct ixgbe_adapter *adapter)
5058 /* hardware has been reset, we need to reload some things */
5059 ixgbe_configure(adapter);
5061 ixgbe_up_complete(adapter);
5064 void ixgbe_reset(struct ixgbe_adapter *adapter)
5066 struct ixgbe_hw *hw = &adapter->hw;
5067 struct net_device *netdev = adapter->netdev;
5069 u8 old_addr[ETH_ALEN];
5071 if (ixgbe_removed(hw->hw_addr))
5073 /* lock SFP init bit to prevent race conditions with the watchdog */
5074 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5075 usleep_range(1000, 2000);
5077 /* clear all SFP and link config related flags while holding SFP_INIT */
5078 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5079 IXGBE_FLAG2_SFP_NEEDS_RESET);
5080 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5082 err = hw->mac.ops.init_hw(hw);
5085 case IXGBE_ERR_SFP_NOT_PRESENT:
5086 case IXGBE_ERR_SFP_NOT_SUPPORTED:
5088 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5089 e_dev_err("master disable timed out\n");
5091 case IXGBE_ERR_EEPROM_VERSION:
5092 /* We are running on a pre-production device, log a warning */
5093 e_dev_warn("This device is a pre-production adapter/LOM. "
5094 "Please be aware there may be issues associated with "
5095 "your hardware. If you are experiencing problems "
5096 "please contact your Intel or hardware "
5097 "representative who provided you with this "
5101 e_dev_err("Hardware Error: %d\n", err);
5104 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5105 /* do not flush user set addresses */
5106 memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len);
5107 ixgbe_flush_sw_mac_table(adapter);
5108 ixgbe_mac_set_default_filter(adapter, old_addr);
5110 /* update SAN MAC vmdq pool selection */
5111 if (hw->mac.san_mac_rar_index)
5112 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5114 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5115 ixgbe_ptp_reset(adapter);
5117 if (hw->phy.ops.set_phy_power) {
5118 if (!netif_running(adapter->netdev) && !adapter->wol)
5119 hw->phy.ops.set_phy_power(hw, false);
5121 hw->phy.ops.set_phy_power(hw, true);
5126 * ixgbe_clean_tx_ring - Free Tx Buffers
5127 * @tx_ring: ring to be cleaned
5129 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5131 struct ixgbe_tx_buffer *tx_buffer_info;
5135 /* ring already cleared, nothing to do */
5136 if (!tx_ring->tx_buffer_info)
5139 /* Free all the Tx ring sk_buffs */
5140 for (i = 0; i < tx_ring->count; i++) {
5141 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5142 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5145 netdev_tx_reset_queue(txring_txq(tx_ring));
5147 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5148 memset(tx_ring->tx_buffer_info, 0, size);
5150 /* Zero out the descriptor ring */
5151 memset(tx_ring->desc, 0, tx_ring->size);
5153 tx_ring->next_to_use = 0;
5154 tx_ring->next_to_clean = 0;
5158 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5159 * @adapter: board private structure
5161 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5165 for (i = 0; i < adapter->num_rx_queues; i++)
5166 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5170 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5171 * @adapter: board private structure
5173 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5177 for (i = 0; i < adapter->num_tx_queues; i++)
5178 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5181 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5183 struct hlist_node *node2;
5184 struct ixgbe_fdir_filter *filter;
5186 spin_lock(&adapter->fdir_perfect_lock);
5188 hlist_for_each_entry_safe(filter, node2,
5189 &adapter->fdir_filter_list, fdir_node) {
5190 hlist_del(&filter->fdir_node);
5193 adapter->fdir_filter_count = 0;
5195 spin_unlock(&adapter->fdir_perfect_lock);
5198 void ixgbe_down(struct ixgbe_adapter *adapter)
5200 struct net_device *netdev = adapter->netdev;
5201 struct ixgbe_hw *hw = &adapter->hw;
5202 struct net_device *upper;
5203 struct list_head *iter;
5206 /* signal that we are down to the interrupt handler */
5207 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5208 return; /* do nothing if already down */
5210 /* disable receives */
5211 hw->mac.ops.disable_rx(hw);
5213 /* disable all enabled rx queues */
5214 for (i = 0; i < adapter->num_rx_queues; i++)
5215 /* this call also flushes the previous write */
5216 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5218 usleep_range(10000, 20000);
5220 netif_tx_stop_all_queues(netdev);
5222 /* call carrier off first to avoid false dev_watchdog timeouts */
5223 netif_carrier_off(netdev);
5224 netif_tx_disable(netdev);
5226 /* disable any upper devices */
5227 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5228 if (netif_is_macvlan(upper)) {
5229 struct macvlan_dev *vlan = netdev_priv(upper);
5231 if (vlan->fwd_priv) {
5232 netif_tx_stop_all_queues(upper);
5233 netif_carrier_off(upper);
5234 netif_tx_disable(upper);
5239 ixgbe_irq_disable(adapter);
5241 ixgbe_napi_disable_all(adapter);
5243 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5244 IXGBE_FLAG2_RESET_REQUESTED);
5245 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5247 del_timer_sync(&adapter->service_timer);
5249 if (adapter->num_vfs) {
5250 /* Clear EITR Select mapping */
5251 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5253 /* Mark all the VFs as inactive */
5254 for (i = 0 ; i < adapter->num_vfs; i++)
5255 adapter->vfinfo[i].clear_to_send = false;
5257 /* ping all the active vfs to let them know we are going down */
5258 ixgbe_ping_all_vfs(adapter);
5260 /* Disable all VFTE/VFRE TX/RX */
5261 ixgbe_disable_tx_rx(adapter);
5264 /* disable transmits in the hardware now that interrupts are off */
5265 for (i = 0; i < adapter->num_tx_queues; i++) {
5266 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5267 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5270 /* Disable the Tx DMA engine on 82599 and later MAC */
5271 switch (hw->mac.type) {
5272 case ixgbe_mac_82599EB:
5273 case ixgbe_mac_X540:
5274 case ixgbe_mac_X550:
5275 case ixgbe_mac_X550EM_x:
5276 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5277 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5278 ~IXGBE_DMATXCTL_TE));
5284 if (!pci_channel_offline(adapter->pdev))
5285 ixgbe_reset(adapter);
5287 /* power down the optics for 82599 SFP+ fiber */
5288 if (hw->mac.ops.disable_tx_laser)
5289 hw->mac.ops.disable_tx_laser(hw);
5291 ixgbe_clean_all_tx_rings(adapter);
5292 ixgbe_clean_all_rx_rings(adapter);
5296 * ixgbe_tx_timeout - Respond to a Tx Hang
5297 * @netdev: network interface device structure
5299 static void ixgbe_tx_timeout(struct net_device *netdev)
5301 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5303 /* Do the reset outside of interrupt context */
5304 ixgbe_tx_timeout_reset(adapter);
5308 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5309 * @adapter: board private structure to initialize
5311 * ixgbe_sw_init initializes the Adapter private data structure.
5312 * Fields are initialized based on PCI device information and
5313 * OS network device settings (MTU size).
5315 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5317 struct ixgbe_hw *hw = &adapter->hw;
5318 struct pci_dev *pdev = adapter->pdev;
5319 unsigned int rss, fdir;
5321 #ifdef CONFIG_IXGBE_DCB
5323 struct tc_configuration *tc;
5326 /* PCI config space info */
5328 hw->vendor_id = pdev->vendor;
5329 hw->device_id = pdev->device;
5330 hw->revision_id = pdev->revision;
5331 hw->subsystem_vendor_id = pdev->subsystem_vendor;
5332 hw->subsystem_device_id = pdev->subsystem_device;
5334 /* Set common capability flags and settings */
5335 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5336 adapter->ring_feature[RING_F_RSS].limit = rss;
5337 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5338 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5339 adapter->atr_sample_rate = 20;
5340 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5341 adapter->ring_feature[RING_F_FDIR].limit = fdir;
5342 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5343 #ifdef CONFIG_IXGBE_DCA
5344 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5347 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5348 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5349 #ifdef CONFIG_IXGBE_DCB
5350 /* Default traffic class to use for FCoE */
5351 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5352 #endif /* CONFIG_IXGBE_DCB */
5353 #endif /* IXGBE_FCOE */
5355 adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5356 hw->mac.num_rar_entries,
5359 /* Set MAC specific capability flags and exceptions */
5360 switch (hw->mac.type) {
5361 case ixgbe_mac_82598EB:
5362 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5364 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5365 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5367 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5368 adapter->ring_feature[RING_F_FDIR].limit = 0;
5369 adapter->atr_sample_rate = 0;
5370 adapter->fdir_pballoc = 0;
5372 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5373 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5374 #ifdef CONFIG_IXGBE_DCB
5375 adapter->fcoe.up = 0;
5376 #endif /* IXGBE_DCB */
5377 #endif /* IXGBE_FCOE */
5379 case ixgbe_mac_82599EB:
5380 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5381 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5383 case ixgbe_mac_X540:
5384 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5385 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5386 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5388 case ixgbe_mac_X550EM_x:
5389 case ixgbe_mac_X550:
5390 #ifdef CONFIG_IXGBE_DCA
5391 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5393 #ifdef CONFIG_IXGBE_VXLAN
5394 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5402 /* FCoE support exists, always init the FCoE lock */
5403 spin_lock_init(&adapter->fcoe.lock);
5406 /* n-tuple support exists, always init our spinlock */
5407 spin_lock_init(&adapter->fdir_perfect_lock);
5409 #ifdef CONFIG_IXGBE_DCB
5410 switch (hw->mac.type) {
5411 case ixgbe_mac_X540:
5412 case ixgbe_mac_X550:
5413 case ixgbe_mac_X550EM_x:
5414 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5415 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5418 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5419 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5423 /* Configure DCB traffic classes */
5424 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5425 tc = &adapter->dcb_cfg.tc_config[j];
5426 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5427 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5428 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5429 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5430 tc->dcb_pfc = pfc_disabled;
5433 /* Initialize default user to priority mapping, UPx->TC0 */
5434 tc = &adapter->dcb_cfg.tc_config[0];
5435 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5436 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5438 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5439 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5440 adapter->dcb_cfg.pfc_mode_enable = false;
5441 adapter->dcb_set_bitmap = 0x00;
5442 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5443 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5444 sizeof(adapter->temp_dcb_cfg));
5448 /* default flow control settings */
5449 hw->fc.requested_mode = ixgbe_fc_full;
5450 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
5451 ixgbe_pbthresh_setup(adapter);
5452 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5453 hw->fc.send_xon = true;
5454 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5456 #ifdef CONFIG_PCI_IOV
5458 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5460 /* assign number of SR-IOV VFs */
5461 if (hw->mac.type != ixgbe_mac_82598EB) {
5462 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5463 adapter->num_vfs = 0;
5464 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5466 adapter->num_vfs = max_vfs;
5469 #endif /* CONFIG_PCI_IOV */
5471 /* enable itr by default in dynamic mode */
5472 adapter->rx_itr_setting = 1;
5473 adapter->tx_itr_setting = 1;
5475 /* set default ring sizes */
5476 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5477 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5479 /* set default work limits */
5480 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5482 /* initialize eeprom parameters */
5483 if (ixgbe_init_eeprom_params_generic(hw)) {
5484 e_dev_err("EEPROM initialization failed\n");
5488 /* PF holds first pool slot */
5489 set_bit(0, &adapter->fwd_bitmask);
5490 set_bit(__IXGBE_DOWN, &adapter->state);
5496 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5497 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5499 * Return 0 on success, negative on failure
5501 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5503 struct device *dev = tx_ring->dev;
5504 int orig_node = dev_to_node(dev);
5508 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5510 if (tx_ring->q_vector)
5511 ring_node = tx_ring->q_vector->numa_node;
5513 tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5514 if (!tx_ring->tx_buffer_info)
5515 tx_ring->tx_buffer_info = vzalloc(size);
5516 if (!tx_ring->tx_buffer_info)
5519 u64_stats_init(&tx_ring->syncp);
5521 /* round up to nearest 4K */
5522 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5523 tx_ring->size = ALIGN(tx_ring->size, 4096);
5525 set_dev_node(dev, ring_node);
5526 tx_ring->desc = dma_alloc_coherent(dev,
5530 set_dev_node(dev, orig_node);
5532 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5533 &tx_ring->dma, GFP_KERNEL);
5537 tx_ring->next_to_use = 0;
5538 tx_ring->next_to_clean = 0;
5542 vfree(tx_ring->tx_buffer_info);
5543 tx_ring->tx_buffer_info = NULL;
5544 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5549 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5550 * @adapter: board private structure
5552 * If this function returns with an error, then it's possible one or
5553 * more of the rings is populated (while the rest are not). It is the
5554 * callers duty to clean those orphaned rings.
5556 * Return 0 on success, negative on failure
5558 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5562 for (i = 0; i < adapter->num_tx_queues; i++) {
5563 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5567 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5573 /* rewind the index freeing the rings as we go */
5575 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5580 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5581 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5583 * Returns 0 on success, negative on failure
5585 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5587 struct device *dev = rx_ring->dev;
5588 int orig_node = dev_to_node(dev);
5592 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5594 if (rx_ring->q_vector)
5595 ring_node = rx_ring->q_vector->numa_node;
5597 rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5598 if (!rx_ring->rx_buffer_info)
5599 rx_ring->rx_buffer_info = vzalloc(size);
5600 if (!rx_ring->rx_buffer_info)
5603 u64_stats_init(&rx_ring->syncp);
5605 /* Round up to nearest 4K */
5606 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5607 rx_ring->size = ALIGN(rx_ring->size, 4096);
5609 set_dev_node(dev, ring_node);
5610 rx_ring->desc = dma_alloc_coherent(dev,
5614 set_dev_node(dev, orig_node);
5616 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5617 &rx_ring->dma, GFP_KERNEL);
5621 rx_ring->next_to_clean = 0;
5622 rx_ring->next_to_use = 0;
5626 vfree(rx_ring->rx_buffer_info);
5627 rx_ring->rx_buffer_info = NULL;
5628 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5633 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5634 * @adapter: board private structure
5636 * If this function returns with an error, then it's possible one or
5637 * more of the rings is populated (while the rest are not). It is the
5638 * callers duty to clean those orphaned rings.
5640 * Return 0 on success, negative on failure
5642 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5646 for (i = 0; i < adapter->num_rx_queues; i++) {
5647 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5651 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5656 err = ixgbe_setup_fcoe_ddp_resources(adapter);
5661 /* rewind the index freeing the rings as we go */
5663 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5668 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5669 * @tx_ring: Tx descriptor ring for a specific queue
5671 * Free all transmit software resources
5673 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5675 ixgbe_clean_tx_ring(tx_ring);
5677 vfree(tx_ring->tx_buffer_info);
5678 tx_ring->tx_buffer_info = NULL;
5680 /* if not set, then don't free */
5684 dma_free_coherent(tx_ring->dev, tx_ring->size,
5685 tx_ring->desc, tx_ring->dma);
5687 tx_ring->desc = NULL;
5691 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5692 * @adapter: board private structure
5694 * Free all transmit software resources
5696 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5700 for (i = 0; i < adapter->num_tx_queues; i++)
5701 if (adapter->tx_ring[i]->desc)
5702 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5706 * ixgbe_free_rx_resources - Free Rx Resources
5707 * @rx_ring: ring to clean the resources from
5709 * Free all receive software resources
5711 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5713 ixgbe_clean_rx_ring(rx_ring);
5715 vfree(rx_ring->rx_buffer_info);
5716 rx_ring->rx_buffer_info = NULL;
5718 /* if not set, then don't free */
5722 dma_free_coherent(rx_ring->dev, rx_ring->size,
5723 rx_ring->desc, rx_ring->dma);
5725 rx_ring->desc = NULL;
5729 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5730 * @adapter: board private structure
5732 * Free all receive software resources
5734 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5739 ixgbe_free_fcoe_ddp_resources(adapter);
5742 for (i = 0; i < adapter->num_rx_queues; i++)
5743 if (adapter->rx_ring[i]->desc)
5744 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5748 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5749 * @netdev: network interface device structure
5750 * @new_mtu: new value for maximum frame size
5752 * Returns 0 on success, negative on failure
5754 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5756 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5757 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5759 /* MTU < 68 is an error and causes problems on some kernels */
5760 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5764 * For 82599EB we cannot allow legacy VFs to enable their receive
5765 * paths when MTU greater than 1500 is configured. So display a
5766 * warning that legacy VFs will be disabled.
5768 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5769 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5770 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5771 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5773 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5775 /* must set new MTU before calling down or up */
5776 netdev->mtu = new_mtu;
5778 if (netif_running(netdev))
5779 ixgbe_reinit_locked(adapter);
5785 * ixgbe_open - Called when a network interface is made active
5786 * @netdev: network interface device structure
5788 * Returns 0 on success, negative value on failure
5790 * The open entry point is called when a network interface is made
5791 * active by the system (IFF_UP). At this point all resources needed
5792 * for transmit and receive operations are allocated, the interrupt
5793 * handler is registered with the OS, the watchdog timer is started,
5794 * and the stack is notified that the interface is ready.
5796 static int ixgbe_open(struct net_device *netdev)
5798 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5799 struct ixgbe_hw *hw = &adapter->hw;
5802 /* disallow open during test */
5803 if (test_bit(__IXGBE_TESTING, &adapter->state))
5806 netif_carrier_off(netdev);
5808 /* allocate transmit descriptors */
5809 err = ixgbe_setup_all_tx_resources(adapter);
5813 /* allocate receive descriptors */
5814 err = ixgbe_setup_all_rx_resources(adapter);
5818 ixgbe_configure(adapter);
5820 err = ixgbe_request_irq(adapter);
5824 /* Notify the stack of the actual queue counts. */
5825 if (adapter->num_rx_pools > 1)
5826 queues = adapter->num_rx_queues_per_pool;
5828 queues = adapter->num_tx_queues;
5830 err = netif_set_real_num_tx_queues(netdev, queues);
5832 goto err_set_queues;
5834 if (adapter->num_rx_pools > 1 &&
5835 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5836 queues = IXGBE_MAX_L2A_QUEUES;
5838 queues = adapter->num_rx_queues;
5839 err = netif_set_real_num_rx_queues(netdev, queues);
5841 goto err_set_queues;
5843 ixgbe_ptp_init(adapter);
5845 ixgbe_up_complete(adapter);
5847 ixgbe_clear_vxlan_port(adapter);
5848 #ifdef CONFIG_IXGBE_VXLAN
5849 vxlan_get_rx_port(netdev);
5855 ixgbe_free_irq(adapter);
5857 ixgbe_free_all_rx_resources(adapter);
5858 if (hw->phy.ops.set_phy_power && !adapter->wol)
5859 hw->phy.ops.set_phy_power(&adapter->hw, false);
5861 ixgbe_free_all_tx_resources(adapter);
5863 ixgbe_reset(adapter);
5868 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
5870 ixgbe_ptp_suspend(adapter);
5872 if (adapter->hw.phy.ops.enter_lplu) {
5873 adapter->hw.phy.reset_disable = true;
5874 ixgbe_down(adapter);
5875 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
5876 adapter->hw.phy.reset_disable = false;
5878 ixgbe_down(adapter);
5881 ixgbe_free_irq(adapter);
5883 ixgbe_free_all_tx_resources(adapter);
5884 ixgbe_free_all_rx_resources(adapter);
5888 * ixgbe_close - Disables a network interface
5889 * @netdev: network interface device structure
5891 * Returns 0, this is not allowed to fail
5893 * The close entry point is called when an interface is de-activated
5894 * by the OS. The hardware is still under the drivers control, but
5895 * needs to be disabled. A global MAC reset is issued to stop the
5896 * hardware, and all transmit and receive resources are freed.
5898 static int ixgbe_close(struct net_device *netdev)
5900 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5902 ixgbe_ptp_stop(adapter);
5904 if (netif_device_present(netdev))
5905 ixgbe_close_suspend(adapter);
5907 ixgbe_fdir_filter_exit(adapter);
5909 ixgbe_release_hw_control(adapter);
5915 static int ixgbe_resume(struct pci_dev *pdev)
5917 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5918 struct net_device *netdev = adapter->netdev;
5921 adapter->hw.hw_addr = adapter->io_addr;
5922 pci_set_power_state(pdev, PCI_D0);
5923 pci_restore_state(pdev);
5925 * pci_restore_state clears dev->state_saved so call
5926 * pci_save_state to restore it.
5928 pci_save_state(pdev);
5930 err = pci_enable_device_mem(pdev);
5932 e_dev_err("Cannot enable PCI device from suspend\n");
5935 smp_mb__before_atomic();
5936 clear_bit(__IXGBE_DISABLED, &adapter->state);
5937 pci_set_master(pdev);
5939 pci_wake_from_d3(pdev, false);
5941 ixgbe_reset(adapter);
5943 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5946 err = ixgbe_init_interrupt_scheme(adapter);
5947 if (!err && netif_running(netdev))
5948 err = ixgbe_open(netdev);
5952 netif_device_attach(netdev);
5957 #endif /* CONFIG_PM */
5959 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5961 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5962 struct net_device *netdev = adapter->netdev;
5963 struct ixgbe_hw *hw = &adapter->hw;
5965 u32 wufc = adapter->wol;
5971 netif_device_detach(netdev);
5973 if (netif_running(netdev))
5974 ixgbe_close_suspend(adapter);
5976 ixgbe_clear_interrupt_scheme(adapter);
5980 retval = pci_save_state(pdev);
5985 if (hw->mac.ops.stop_link_on_d3)
5986 hw->mac.ops.stop_link_on_d3(hw);
5989 ixgbe_set_rx_mode(netdev);
5991 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5992 if (hw->mac.ops.enable_tx_laser)
5993 hw->mac.ops.enable_tx_laser(hw);
5995 /* turn on all-multi mode if wake on multicast is enabled */
5996 if (wufc & IXGBE_WUFC_MC) {
5997 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5998 fctrl |= IXGBE_FCTRL_MPE;
5999 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6002 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6003 ctrl |= IXGBE_CTRL_GIO_DIS;
6004 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6006 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6008 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6009 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6012 switch (hw->mac.type) {
6013 case ixgbe_mac_82598EB:
6014 pci_wake_from_d3(pdev, false);
6016 case ixgbe_mac_82599EB:
6017 case ixgbe_mac_X540:
6018 case ixgbe_mac_X550:
6019 case ixgbe_mac_X550EM_x:
6020 pci_wake_from_d3(pdev, !!wufc);
6026 *enable_wake = !!wufc;
6027 if (hw->phy.ops.set_phy_power && !*enable_wake)
6028 hw->phy.ops.set_phy_power(hw, false);
6030 ixgbe_release_hw_control(adapter);
6032 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6033 pci_disable_device(pdev);
6039 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6044 retval = __ixgbe_shutdown(pdev, &wake);
6049 pci_prepare_to_sleep(pdev);
6051 pci_wake_from_d3(pdev, false);
6052 pci_set_power_state(pdev, PCI_D3hot);
6057 #endif /* CONFIG_PM */
6059 static void ixgbe_shutdown(struct pci_dev *pdev)
6063 __ixgbe_shutdown(pdev, &wake);
6065 if (system_state == SYSTEM_POWER_OFF) {
6066 pci_wake_from_d3(pdev, wake);
6067 pci_set_power_state(pdev, PCI_D3hot);
6072 * ixgbe_update_stats - Update the board statistics counters.
6073 * @adapter: board private structure
6075 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6077 struct net_device *netdev = adapter->netdev;
6078 struct ixgbe_hw *hw = &adapter->hw;
6079 struct ixgbe_hw_stats *hwstats = &adapter->stats;
6081 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6082 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6083 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6084 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6086 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6087 test_bit(__IXGBE_RESETTING, &adapter->state))
6090 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6093 for (i = 0; i < adapter->num_rx_queues; i++) {
6094 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6095 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6097 adapter->rsc_total_count = rsc_count;
6098 adapter->rsc_total_flush = rsc_flush;
6101 for (i = 0; i < adapter->num_rx_queues; i++) {
6102 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6103 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6104 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6105 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6106 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6107 bytes += rx_ring->stats.bytes;
6108 packets += rx_ring->stats.packets;
6110 adapter->non_eop_descs = non_eop_descs;
6111 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6112 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6113 adapter->hw_csum_rx_error = hw_csum_rx_error;
6114 netdev->stats.rx_bytes = bytes;
6115 netdev->stats.rx_packets = packets;
6119 /* gather some stats to the adapter struct that are per queue */
6120 for (i = 0; i < adapter->num_tx_queues; i++) {
6121 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6122 restart_queue += tx_ring->tx_stats.restart_queue;
6123 tx_busy += tx_ring->tx_stats.tx_busy;
6124 bytes += tx_ring->stats.bytes;
6125 packets += tx_ring->stats.packets;
6127 adapter->restart_queue = restart_queue;
6128 adapter->tx_busy = tx_busy;
6129 netdev->stats.tx_bytes = bytes;
6130 netdev->stats.tx_packets = packets;
6132 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6134 /* 8 register reads */
6135 for (i = 0; i < 8; i++) {
6136 /* for packet buffers not used, the register should read 0 */
6137 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6139 hwstats->mpc[i] += mpc;
6140 total_mpc += hwstats->mpc[i];
6141 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6142 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6143 switch (hw->mac.type) {
6144 case ixgbe_mac_82598EB:
6145 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6146 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6147 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6148 hwstats->pxonrxc[i] +=
6149 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6151 case ixgbe_mac_82599EB:
6152 case ixgbe_mac_X540:
6153 case ixgbe_mac_X550:
6154 case ixgbe_mac_X550EM_x:
6155 hwstats->pxonrxc[i] +=
6156 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6163 /*16 register reads */
6164 for (i = 0; i < 16; i++) {
6165 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6166 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6167 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6168 (hw->mac.type == ixgbe_mac_X540) ||
6169 (hw->mac.type == ixgbe_mac_X550) ||
6170 (hw->mac.type == ixgbe_mac_X550EM_x)) {
6171 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6172 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6173 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6174 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6178 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6179 /* work around hardware counting issue */
6180 hwstats->gprc -= missed_rx;
6182 ixgbe_update_xoff_received(adapter);
6184 /* 82598 hardware only has a 32 bit counter in the high register */
6185 switch (hw->mac.type) {
6186 case ixgbe_mac_82598EB:
6187 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6188 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6189 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6190 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6192 case ixgbe_mac_X540:
6193 case ixgbe_mac_X550:
6194 case ixgbe_mac_X550EM_x:
6195 /* OS2BMC stats are X540 and later */
6196 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6197 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6198 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6199 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6200 case ixgbe_mac_82599EB:
6201 for (i = 0; i < 16; i++)
6202 adapter->hw_rx_no_dma_resources +=
6203 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6204 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6205 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6206 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6207 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6208 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6209 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6210 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6211 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6212 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6214 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6215 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6216 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6217 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6218 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6219 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6220 /* Add up per cpu counters for total ddp aloc fail */
6221 if (adapter->fcoe.ddp_pool) {
6222 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6223 struct ixgbe_fcoe_ddp_pool *ddp_pool;
6225 u64 noddp = 0, noddp_ext_buff = 0;
6226 for_each_possible_cpu(cpu) {
6227 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6228 noddp += ddp_pool->noddp;
6229 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6231 hwstats->fcoe_noddp = noddp;
6232 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6234 #endif /* IXGBE_FCOE */
6239 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6240 hwstats->bprc += bprc;
6241 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6242 if (hw->mac.type == ixgbe_mac_82598EB)
6243 hwstats->mprc -= bprc;
6244 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6245 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6246 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6247 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6248 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6249 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6250 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6251 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6252 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6253 hwstats->lxontxc += lxon;
6254 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6255 hwstats->lxofftxc += lxoff;
6256 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6257 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6259 * 82598 errata - tx of flow control packets is included in tx counters
6261 xon_off_tot = lxon + lxoff;
6262 hwstats->gptc -= xon_off_tot;
6263 hwstats->mptc -= xon_off_tot;
6264 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6265 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6266 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6267 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6268 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6269 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6270 hwstats->ptc64 -= xon_off_tot;
6271 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6272 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6273 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6274 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6275 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6276 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6278 /* Fill out the OS statistics structure */
6279 netdev->stats.multicast = hwstats->mprc;
6282 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6283 netdev->stats.rx_dropped = 0;
6284 netdev->stats.rx_length_errors = hwstats->rlec;
6285 netdev->stats.rx_crc_errors = hwstats->crcerrs;
6286 netdev->stats.rx_missed_errors = total_mpc;
6290 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6291 * @adapter: pointer to the device adapter structure
6293 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6295 struct ixgbe_hw *hw = &adapter->hw;
6298 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6301 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6303 /* if interface is down do nothing */
6304 if (test_bit(__IXGBE_DOWN, &adapter->state))
6307 /* do nothing if we are not using signature filters */
6308 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6311 adapter->fdir_overflow++;
6313 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6314 for (i = 0; i < adapter->num_tx_queues; i++)
6315 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6316 &(adapter->tx_ring[i]->state));
6317 /* re-enable flow director interrupts */
6318 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6320 e_err(probe, "failed to finish FDIR re-initialization, "
6321 "ignored adding FDIR ATR filters\n");
6326 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6327 * @adapter: pointer to the device adapter structure
6329 * This function serves two purposes. First it strobes the interrupt lines
6330 * in order to make certain interrupts are occurring. Secondly it sets the
6331 * bits needed to check for TX hangs. As a result we should immediately
6332 * determine if a hang has occurred.
6334 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6336 struct ixgbe_hw *hw = &adapter->hw;
6340 /* If we're down, removing or resetting, just bail */
6341 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6342 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6343 test_bit(__IXGBE_RESETTING, &adapter->state))
6346 /* Force detection of hung controller */
6347 if (netif_carrier_ok(adapter->netdev)) {
6348 for (i = 0; i < adapter->num_tx_queues; i++)
6349 set_check_for_tx_hang(adapter->tx_ring[i]);
6352 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6354 * for legacy and MSI interrupts don't set any bits
6355 * that are enabled for EIAM, because this operation
6356 * would set *both* EIMS and EICS for any bit in EIAM
6358 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6359 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6361 /* get one bit for every active tx/rx interrupt vector */
6362 for (i = 0; i < adapter->num_q_vectors; i++) {
6363 struct ixgbe_q_vector *qv = adapter->q_vector[i];
6364 if (qv->rx.ring || qv->tx.ring)
6365 eics |= ((u64)1 << i);
6369 /* Cause software interrupt to ensure rings are cleaned */
6370 ixgbe_irq_rearm_queues(adapter, eics);
6374 * ixgbe_watchdog_update_link - update the link status
6375 * @adapter: pointer to the device adapter structure
6376 * @link_speed: pointer to a u32 to store the link_speed
6378 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6380 struct ixgbe_hw *hw = &adapter->hw;
6381 u32 link_speed = adapter->link_speed;
6382 bool link_up = adapter->link_up;
6383 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6385 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6388 if (hw->mac.ops.check_link) {
6389 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6391 /* always assume link is up, if no check link function */
6392 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6396 if (adapter->ixgbe_ieee_pfc)
6397 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6399 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6400 hw->mac.ops.fc_enable(hw);
6401 ixgbe_set_rx_drop_en(adapter);
6405 time_after(jiffies, (adapter->link_check_timeout +
6406 IXGBE_TRY_LINK_TIMEOUT))) {
6407 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6408 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6409 IXGBE_WRITE_FLUSH(hw);
6412 adapter->link_up = link_up;
6413 adapter->link_speed = link_speed;
6416 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6418 #ifdef CONFIG_IXGBE_DCB
6419 struct net_device *netdev = adapter->netdev;
6420 struct dcb_app app = {
6421 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6426 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6427 up = dcb_ieee_getapp_mask(netdev, &app);
6429 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6434 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6435 * print link up message
6436 * @adapter: pointer to the device adapter structure
6438 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6440 struct net_device *netdev = adapter->netdev;
6441 struct ixgbe_hw *hw = &adapter->hw;
6442 struct net_device *upper;
6443 struct list_head *iter;
6444 u32 link_speed = adapter->link_speed;
6445 const char *speed_str;
6446 bool flow_rx, flow_tx;
6448 /* only continue if link was previously down */
6449 if (netif_carrier_ok(netdev))
6452 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6454 switch (hw->mac.type) {
6455 case ixgbe_mac_82598EB: {
6456 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6457 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6458 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6459 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6462 case ixgbe_mac_X540:
6463 case ixgbe_mac_X550:
6464 case ixgbe_mac_X550EM_x:
6465 case ixgbe_mac_82599EB: {
6466 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6467 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6468 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6469 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6478 adapter->last_rx_ptp_check = jiffies;
6480 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6481 ixgbe_ptp_start_cyclecounter(adapter);
6483 switch (link_speed) {
6484 case IXGBE_LINK_SPEED_10GB_FULL:
6485 speed_str = "10 Gbps";
6487 case IXGBE_LINK_SPEED_2_5GB_FULL:
6488 speed_str = "2.5 Gbps";
6490 case IXGBE_LINK_SPEED_1GB_FULL:
6491 speed_str = "1 Gbps";
6493 case IXGBE_LINK_SPEED_100_FULL:
6494 speed_str = "100 Mbps";
6497 speed_str = "unknown speed";
6500 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6501 ((flow_rx && flow_tx) ? "RX/TX" :
6503 (flow_tx ? "TX" : "None"))));
6505 netif_carrier_on(netdev);
6506 ixgbe_check_vf_rate_limit(adapter);
6508 /* enable transmits */
6509 netif_tx_wake_all_queues(adapter->netdev);
6511 /* enable any upper devices */
6513 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6514 if (netif_is_macvlan(upper)) {
6515 struct macvlan_dev *vlan = netdev_priv(upper);
6518 netif_tx_wake_all_queues(upper);
6523 /* update the default user priority for VFs */
6524 ixgbe_update_default_up(adapter);
6526 /* ping all the active vfs to let them know link has changed */
6527 ixgbe_ping_all_vfs(adapter);
6531 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6532 * print link down message
6533 * @adapter: pointer to the adapter structure
6535 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6537 struct net_device *netdev = adapter->netdev;
6538 struct ixgbe_hw *hw = &adapter->hw;
6540 adapter->link_up = false;
6541 adapter->link_speed = 0;
6543 /* only continue if link was up previously */
6544 if (!netif_carrier_ok(netdev))
6547 /* poll for SFP+ cable when link is down */
6548 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6549 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6551 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6552 ixgbe_ptp_start_cyclecounter(adapter);
6554 e_info(drv, "NIC Link is Down\n");
6555 netif_carrier_off(netdev);
6557 /* ping all the active vfs to let them know link has changed */
6558 ixgbe_ping_all_vfs(adapter);
6561 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6565 for (i = 0; i < adapter->num_tx_queues; i++) {
6566 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6568 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6575 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6577 struct ixgbe_hw *hw = &adapter->hw;
6578 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6579 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6583 if (!adapter->num_vfs)
6586 /* resetting the PF is only needed for MAC before X550 */
6587 if (hw->mac.type >= ixgbe_mac_X550)
6590 for (i = 0; i < adapter->num_vfs; i++) {
6591 for (j = 0; j < q_per_pool; j++) {
6594 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6595 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6606 * ixgbe_watchdog_flush_tx - flush queues on link down
6607 * @adapter: pointer to the device adapter structure
6609 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6611 if (!netif_carrier_ok(adapter->netdev)) {
6612 if (ixgbe_ring_tx_pending(adapter) ||
6613 ixgbe_vf_tx_pending(adapter)) {
6614 /* We've lost link, so the controller stops DMA,
6615 * but we've got queued Tx work that's never going
6616 * to get done, so reset controller to flush Tx.
6617 * (Do the reset outside of interrupt context).
6619 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6620 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6625 #ifdef CONFIG_PCI_IOV
6626 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6627 struct pci_dev *vfdev)
6629 if (!pci_wait_for_pending_transaction(vfdev))
6630 e_dev_warn("Issuing VFLR with pending transactions\n");
6632 e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6633 pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6638 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6640 struct ixgbe_hw *hw = &adapter->hw;
6641 struct pci_dev *pdev = adapter->pdev;
6642 struct pci_dev *vfdev;
6645 unsigned short vf_id;
6647 if (!(netif_carrier_ok(adapter->netdev)))
6650 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6651 if (gpc) /* If incrementing then no need for the check below */
6653 /* Check to see if a bad DMA write target from an errant or
6654 * malicious VF has caused a PCIe error. If so then we can
6655 * issue a VFLR to the offending VF(s) and then resume without
6656 * requesting a full slot reset.
6662 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
6666 /* get the device ID for the VF */
6667 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_id);
6669 /* check status reg for all VFs owned by this PF */
6670 vfdev = pci_get_device(pdev->vendor, vf_id, NULL);
6672 if (vfdev->is_virtfn && (vfdev->physfn == pdev)) {
6675 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6676 if (status_reg & PCI_STATUS_REC_MASTER_ABORT)
6678 ixgbe_issue_vf_flr(adapter, vfdev);
6681 vfdev = pci_get_device(pdev->vendor, vf_id, vfdev);
6685 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6689 /* Do not perform spoof check for 82598 or if not in IOV mode */
6690 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6691 adapter->num_vfs == 0)
6694 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6697 * ssvpc register is cleared on read, if zero then no
6698 * spoofed packets in the last interval.
6703 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6706 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
6711 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
6714 #endif /* CONFIG_PCI_IOV */
6718 * ixgbe_watchdog_subtask - check and bring link up
6719 * @adapter: pointer to the device adapter structure
6721 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6723 /* if interface is down, removing or resetting, do nothing */
6724 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6725 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6726 test_bit(__IXGBE_RESETTING, &adapter->state))
6729 ixgbe_watchdog_update_link(adapter);
6731 if (adapter->link_up)
6732 ixgbe_watchdog_link_is_up(adapter);
6734 ixgbe_watchdog_link_is_down(adapter);
6736 ixgbe_check_for_bad_vf(adapter);
6737 ixgbe_spoof_check(adapter);
6738 ixgbe_update_stats(adapter);
6740 ixgbe_watchdog_flush_tx(adapter);
6744 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6745 * @adapter: the ixgbe adapter structure
6747 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6749 struct ixgbe_hw *hw = &adapter->hw;
6752 /* not searching for SFP so there is nothing to do here */
6753 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6754 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6757 if (adapter->sfp_poll_time &&
6758 time_after(adapter->sfp_poll_time, jiffies))
6759 return; /* If not yet time to poll for SFP */
6761 /* someone else is in init, wait until next service event */
6762 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6765 adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
6767 err = hw->phy.ops.identify_sfp(hw);
6768 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6771 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6772 /* If no cable is present, then we need to reset
6773 * the next time we find a good cable. */
6774 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6781 /* exit if reset not needed */
6782 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6785 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6788 * A module may be identified correctly, but the EEPROM may not have
6789 * support for that module. setup_sfp() will fail in that case, so
6790 * we should not allow that module to load.
6792 if (hw->mac.type == ixgbe_mac_82598EB)
6793 err = hw->phy.ops.reset(hw);
6795 err = hw->mac.ops.setup_sfp(hw);
6797 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6800 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6801 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6804 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6806 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6807 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6808 e_dev_err("failed to initialize because an unsupported "
6809 "SFP+ module type was detected.\n");
6810 e_dev_err("Reload the driver after installing a "
6811 "supported module.\n");
6812 unregister_netdev(adapter->netdev);
6817 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6818 * @adapter: the ixgbe adapter structure
6820 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6822 struct ixgbe_hw *hw = &adapter->hw;
6824 bool autoneg = false;
6826 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6829 /* someone else is in init, wait until next service event */
6830 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6833 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6835 speed = hw->phy.autoneg_advertised;
6836 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6837 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6839 /* setup the highest link when no autoneg */
6841 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6842 speed = IXGBE_LINK_SPEED_10GB_FULL;
6846 if (hw->mac.ops.setup_link)
6847 hw->mac.ops.setup_link(hw, speed, true);
6849 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6850 adapter->link_check_timeout = jiffies;
6851 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6855 * ixgbe_service_timer - Timer Call-back
6856 * @data: pointer to adapter cast into an unsigned long
6858 static void ixgbe_service_timer(unsigned long data)
6860 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6861 unsigned long next_event_offset;
6863 /* poll faster when waiting for link */
6864 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6865 next_event_offset = HZ / 10;
6867 next_event_offset = HZ * 2;
6869 /* Reset the timer */
6870 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6872 ixgbe_service_event_schedule(adapter);
6875 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
6877 struct ixgbe_hw *hw = &adapter->hw;
6880 if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
6883 adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
6885 if (!hw->phy.ops.handle_lasi)
6888 status = hw->phy.ops.handle_lasi(&adapter->hw);
6889 if (status != IXGBE_ERR_OVERTEMP)
6892 e_crit(drv, "%s\n", ixgbe_overheat_msg);
6895 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6897 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6900 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6902 /* If we're already down, removing or resetting, just bail */
6903 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6904 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6905 test_bit(__IXGBE_RESETTING, &adapter->state))
6908 ixgbe_dump(adapter);
6909 netdev_err(adapter->netdev, "Reset adapter\n");
6910 adapter->tx_timeout_count++;
6913 ixgbe_reinit_locked(adapter);
6918 * ixgbe_service_task - manages and runs subtasks
6919 * @work: pointer to work_struct containing our data
6921 static void ixgbe_service_task(struct work_struct *work)
6923 struct ixgbe_adapter *adapter = container_of(work,
6924 struct ixgbe_adapter,
6926 if (ixgbe_removed(adapter->hw.hw_addr)) {
6927 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6929 ixgbe_down(adapter);
6932 ixgbe_service_event_complete(adapter);
6935 #ifdef CONFIG_IXGBE_VXLAN
6936 if (adapter->flags2 & IXGBE_FLAG2_VXLAN_REREG_NEEDED) {
6937 adapter->flags2 &= ~IXGBE_FLAG2_VXLAN_REREG_NEEDED;
6938 vxlan_get_rx_port(adapter->netdev);
6940 #endif /* CONFIG_IXGBE_VXLAN */
6941 ixgbe_reset_subtask(adapter);
6942 ixgbe_phy_interrupt_subtask(adapter);
6943 ixgbe_sfp_detection_subtask(adapter);
6944 ixgbe_sfp_link_config_subtask(adapter);
6945 ixgbe_check_overtemp_subtask(adapter);
6946 ixgbe_watchdog_subtask(adapter);
6947 ixgbe_fdir_reinit_subtask(adapter);
6948 ixgbe_check_hang_subtask(adapter);
6950 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6951 ixgbe_ptp_overflow_check(adapter);
6952 ixgbe_ptp_rx_hang(adapter);
6955 ixgbe_service_event_complete(adapter);
6958 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6959 struct ixgbe_tx_buffer *first,
6962 struct sk_buff *skb = first->skb;
6963 u32 vlan_macip_lens, type_tucmd;
6964 u32 mss_l4len_idx, l4len;
6967 if (skb->ip_summed != CHECKSUM_PARTIAL)
6970 if (!skb_is_gso(skb))
6973 err = skb_cow_head(skb, 0);
6977 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6978 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6980 if (first->protocol == htons(ETH_P_IP)) {
6981 struct iphdr *iph = ip_hdr(skb);
6984 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6988 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6989 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6990 IXGBE_TX_FLAGS_CSUM |
6991 IXGBE_TX_FLAGS_IPV4;
6992 } else if (skb_is_gso_v6(skb)) {
6993 ipv6_hdr(skb)->payload_len = 0;
6994 tcp_hdr(skb)->check =
6995 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6996 &ipv6_hdr(skb)->daddr,
6998 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6999 IXGBE_TX_FLAGS_CSUM;
7002 /* compute header lengths */
7003 l4len = tcp_hdrlen(skb);
7004 *hdr_len = skb_transport_offset(skb) + l4len;
7006 /* update gso size and bytecount with header size */
7007 first->gso_segs = skb_shinfo(skb)->gso_segs;
7008 first->bytecount += (first->gso_segs - 1) * *hdr_len;
7010 /* mss_l4len_id: use 0 as index for TSO */
7011 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
7012 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7014 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7015 vlan_macip_lens = skb_network_header_len(skb);
7016 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7017 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7019 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7025 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7026 struct ixgbe_tx_buffer *first)
7028 struct sk_buff *skb = first->skb;
7029 u32 vlan_macip_lens = 0;
7030 u32 mss_l4len_idx = 0;
7033 if (skb->ip_summed != CHECKSUM_PARTIAL) {
7034 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
7035 !(first->tx_flags & IXGBE_TX_FLAGS_CC))
7037 vlan_macip_lens = skb_network_offset(skb) <<
7038 IXGBE_ADVTXD_MACLEN_SHIFT;
7043 struct ipv6hdr *ipv6;
7047 struct tcphdr *tcphdr;
7051 if (skb->encapsulation) {
7052 network_hdr.raw = skb_inner_network_header(skb);
7053 transport_hdr.raw = skb_inner_transport_header(skb);
7054 vlan_macip_lens = skb_inner_network_offset(skb) <<
7055 IXGBE_ADVTXD_MACLEN_SHIFT;
7057 network_hdr.raw = skb_network_header(skb);
7058 transport_hdr.raw = skb_transport_header(skb);
7059 vlan_macip_lens = skb_network_offset(skb) <<
7060 IXGBE_ADVTXD_MACLEN_SHIFT;
7063 /* use first 4 bits to determine IP version */
7064 switch (network_hdr.ipv4->version) {
7066 vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7067 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7068 l4_hdr = network_hdr.ipv4->protocol;
7071 vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7072 l4_hdr = network_hdr.ipv6->nexthdr;
7075 if (unlikely(net_ratelimit())) {
7076 dev_warn(tx_ring->dev,
7077 "partial checksum but version=%d\n",
7078 network_hdr.ipv4->version);
7084 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
7085 mss_l4len_idx = (transport_hdr.tcphdr->doff * 4) <<
7086 IXGBE_ADVTXD_L4LEN_SHIFT;
7089 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7090 mss_l4len_idx = sizeof(struct sctphdr) <<
7091 IXGBE_ADVTXD_L4LEN_SHIFT;
7094 mss_l4len_idx = sizeof(struct udphdr) <<
7095 IXGBE_ADVTXD_L4LEN_SHIFT;
7098 if (unlikely(net_ratelimit())) {
7099 dev_warn(tx_ring->dev,
7100 "partial checksum but l4 proto=%x!\n",
7106 /* update TX checksum flag */
7107 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7110 /* vlan_macip_lens: MACLEN, VLAN tag */
7111 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7113 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
7114 type_tucmd, mss_l4len_idx);
7117 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7118 ((_flag <= _result) ? \
7119 ((u32)(_input & _flag) * (_result / _flag)) : \
7120 ((u32)(_input & _flag) / (_flag / _result)))
7122 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7124 /* set type for advanced descriptor with frame checksum insertion */
7125 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7126 IXGBE_ADVTXD_DCMD_DEXT |
7127 IXGBE_ADVTXD_DCMD_IFCS;
7129 /* set HW vlan bit if vlan is present */
7130 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7131 IXGBE_ADVTXD_DCMD_VLE);
7133 /* set segmentation enable bits for TSO/FSO */
7134 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7135 IXGBE_ADVTXD_DCMD_TSE);
7137 /* set timestamp bit if present */
7138 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7139 IXGBE_ADVTXD_MAC_TSTAMP);
7141 /* insert frame checksum */
7142 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7147 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7148 u32 tx_flags, unsigned int paylen)
7150 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7152 /* enable L4 checksum for TSO and TX checksum offload */
7153 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7154 IXGBE_TX_FLAGS_CSUM,
7155 IXGBE_ADVTXD_POPTS_TXSM);
7157 /* enble IPv4 checksum for TSO */
7158 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7159 IXGBE_TX_FLAGS_IPV4,
7160 IXGBE_ADVTXD_POPTS_IXSM);
7163 * Check Context must be set if Tx switch is enabled, which it
7164 * always is for case where virtual functions are running
7166 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7170 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7173 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7175 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7177 /* Herbert's original patch had:
7178 * smp_mb__after_netif_stop_queue();
7179 * but since that doesn't exist yet, just open code it.
7183 /* We need to check again in a case another CPU has just
7184 * made room available.
7186 if (likely(ixgbe_desc_unused(tx_ring) < size))
7189 /* A reprieve! - use start_queue because it doesn't call schedule */
7190 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7191 ++tx_ring->tx_stats.restart_queue;
7195 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7197 if (likely(ixgbe_desc_unused(tx_ring) >= size))
7200 return __ixgbe_maybe_stop_tx(tx_ring, size);
7203 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7206 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7207 struct ixgbe_tx_buffer *first,
7210 struct sk_buff *skb = first->skb;
7211 struct ixgbe_tx_buffer *tx_buffer;
7212 union ixgbe_adv_tx_desc *tx_desc;
7213 struct skb_frag_struct *frag;
7215 unsigned int data_len, size;
7216 u32 tx_flags = first->tx_flags;
7217 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7218 u16 i = tx_ring->next_to_use;
7220 tx_desc = IXGBE_TX_DESC(tx_ring, i);
7222 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7224 size = skb_headlen(skb);
7225 data_len = skb->data_len;
7228 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7229 if (data_len < sizeof(struct fcoe_crc_eof)) {
7230 size -= sizeof(struct fcoe_crc_eof) - data_len;
7233 data_len -= sizeof(struct fcoe_crc_eof);
7238 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7242 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7243 if (dma_mapping_error(tx_ring->dev, dma))
7246 /* record length, and DMA address */
7247 dma_unmap_len_set(tx_buffer, len, size);
7248 dma_unmap_addr_set(tx_buffer, dma, dma);
7250 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7252 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7253 tx_desc->read.cmd_type_len =
7254 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7258 if (i == tx_ring->count) {
7259 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7262 tx_desc->read.olinfo_status = 0;
7264 dma += IXGBE_MAX_DATA_PER_TXD;
7265 size -= IXGBE_MAX_DATA_PER_TXD;
7267 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7270 if (likely(!data_len))
7273 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7277 if (i == tx_ring->count) {
7278 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7281 tx_desc->read.olinfo_status = 0;
7284 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7286 size = skb_frag_size(frag);
7290 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7293 tx_buffer = &tx_ring->tx_buffer_info[i];
7296 /* write last descriptor with RS and EOP bits */
7297 cmd_type |= size | IXGBE_TXD_CMD;
7298 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7300 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7302 /* set the timestamp */
7303 first->time_stamp = jiffies;
7306 * Force memory writes to complete before letting h/w know there
7307 * are new descriptors to fetch. (Only applicable for weak-ordered
7308 * memory model archs, such as IA-64).
7310 * We also need this memory barrier to make certain all of the
7311 * status bits have been updated before next_to_watch is written.
7315 /* set next_to_watch value indicating a packet is present */
7316 first->next_to_watch = tx_desc;
7319 if (i == tx_ring->count)
7322 tx_ring->next_to_use = i;
7324 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7326 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7327 writel(i, tx_ring->tail);
7329 /* we need this if more than one processor can write to our tail
7330 * at a time, it synchronizes IO on IA64/Altix systems
7337 dev_err(tx_ring->dev, "TX DMA map failed\n");
7339 /* clear dma mappings for failed tx_buffer_info map */
7341 tx_buffer = &tx_ring->tx_buffer_info[i];
7342 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7343 if (tx_buffer == first)
7350 tx_ring->next_to_use = i;
7353 static void ixgbe_atr(struct ixgbe_ring *ring,
7354 struct ixgbe_tx_buffer *first)
7356 struct ixgbe_q_vector *q_vector = ring->q_vector;
7357 union ixgbe_atr_hash_dword input = { .dword = 0 };
7358 union ixgbe_atr_hash_dword common = { .dword = 0 };
7360 unsigned char *network;
7362 struct ipv6hdr *ipv6;
7365 struct sk_buff *skb;
7366 #ifdef CONFIG_IXGBE_VXLAN
7368 #endif /* CONFIG_IXGBE_VXLAN */
7371 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7375 /* do nothing if sampling is disabled */
7376 if (!ring->atr_sample_rate)
7381 /* snag network header to get L4 type and address */
7383 hdr.network = skb_network_header(skb);
7384 if (skb->encapsulation) {
7385 #ifdef CONFIG_IXGBE_VXLAN
7386 struct ixgbe_adapter *adapter = q_vector->adapter;
7388 if (!adapter->vxlan_port)
7390 if (first->protocol != htons(ETH_P_IP) ||
7391 hdr.ipv4->version != IPVERSION ||
7392 hdr.ipv4->protocol != IPPROTO_UDP) {
7395 if (ntohs(udp_hdr(skb)->dest) != adapter->vxlan_port)
7398 hdr.network = skb_inner_network_header(skb);
7399 th = inner_tcp_hdr(skb);
7402 #endif /* CONFIG_IXGBE_VXLAN */
7404 /* Currently only IPv4/IPv6 with TCP is supported */
7405 if ((first->protocol != htons(ETH_P_IPV6) ||
7406 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
7407 (first->protocol != htons(ETH_P_IP) ||
7408 hdr.ipv4->protocol != IPPROTO_TCP))
7413 /* skip this packet since it is invalid or the socket is closing */
7417 /* sample on all syn packets or once every atr sample count */
7418 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7421 /* reset sample count */
7422 ring->atr_count = 0;
7424 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7427 * src and dst are inverted, think how the receiver sees them
7429 * The input is broken into two sections, a non-compressed section
7430 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7431 * is XORed together and stored in the compressed dword.
7433 input.formatted.vlan_id = vlan_id;
7436 * since src port and flex bytes occupy the same word XOR them together
7437 * and write the value to source port portion of compressed dword
7439 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7440 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7442 common.port.src ^= th->dest ^ first->protocol;
7443 common.port.dst ^= th->source;
7445 if (first->protocol == htons(ETH_P_IP)) {
7446 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7447 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7449 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7450 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7451 hdr.ipv6->saddr.s6_addr32[1] ^
7452 hdr.ipv6->saddr.s6_addr32[2] ^
7453 hdr.ipv6->saddr.s6_addr32[3] ^
7454 hdr.ipv6->daddr.s6_addr32[0] ^
7455 hdr.ipv6->daddr.s6_addr32[1] ^
7456 hdr.ipv6->daddr.s6_addr32[2] ^
7457 hdr.ipv6->daddr.s6_addr32[3];
7460 #ifdef CONFIG_IXGBE_VXLAN
7462 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7463 #endif /* CONFIG_IXGBE_VXLAN */
7465 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7466 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7467 input, common, ring->queue_index);
7470 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7471 void *accel_priv, select_queue_fallback_t fallback)
7473 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7475 struct ixgbe_adapter *adapter;
7476 struct ixgbe_ring_feature *f;
7481 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7486 * only execute the code below if protocol is FCoE
7487 * or FIP and we have FCoE enabled on the adapter
7489 switch (vlan_get_protocol(skb)) {
7490 case htons(ETH_P_FCOE):
7491 case htons(ETH_P_FIP):
7492 adapter = netdev_priv(dev);
7494 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7497 return fallback(dev, skb);
7500 f = &adapter->ring_feature[RING_F_FCOE];
7502 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7505 while (txq >= f->indices)
7508 return txq + f->offset;
7510 return fallback(dev, skb);
7514 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7515 struct ixgbe_adapter *adapter,
7516 struct ixgbe_ring *tx_ring)
7518 struct ixgbe_tx_buffer *first;
7522 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7523 __be16 protocol = skb->protocol;
7527 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7528 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7529 * + 2 desc gap to keep tail from touching head,
7530 * + 1 desc for context descriptor,
7531 * otherwise try next time
7533 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7534 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7536 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7537 tx_ring->tx_stats.tx_busy++;
7538 return NETDEV_TX_BUSY;
7541 /* record the location of the first descriptor for this packet */
7542 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7544 first->bytecount = skb->len;
7545 first->gso_segs = 1;
7547 /* if we have a HW VLAN tag being added default to the HW one */
7548 if (skb_vlan_tag_present(skb)) {
7549 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7550 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7551 /* else if it is a SW VLAN check the next protocol and store the tag */
7552 } else if (protocol == htons(ETH_P_8021Q)) {
7553 struct vlan_hdr *vhdr, _vhdr;
7554 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7558 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7559 IXGBE_TX_FLAGS_VLAN_SHIFT;
7560 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7562 protocol = vlan_get_protocol(skb);
7564 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7565 adapter->ptp_clock &&
7566 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7568 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7569 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7571 /* schedule check for Tx timestamp */
7572 adapter->ptp_tx_skb = skb_get(skb);
7573 adapter->ptp_tx_start = jiffies;
7574 schedule_work(&adapter->ptp_tx_work);
7577 skb_tx_timestamp(skb);
7579 #ifdef CONFIG_PCI_IOV
7581 * Use the l2switch_enable flag - would be false if the DMA
7582 * Tx switch had been disabled.
7584 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7585 tx_flags |= IXGBE_TX_FLAGS_CC;
7588 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7589 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7590 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7591 (skb->priority != TC_PRIO_CONTROL))) {
7592 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7593 tx_flags |= (skb->priority & 0x7) <<
7594 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7595 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7596 struct vlan_ethhdr *vhdr;
7598 if (skb_cow_head(skb, 0))
7600 vhdr = (struct vlan_ethhdr *)skb->data;
7601 vhdr->h_vlan_TCI = htons(tx_flags >>
7602 IXGBE_TX_FLAGS_VLAN_SHIFT);
7604 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7608 /* record initial flags and protocol */
7609 first->tx_flags = tx_flags;
7610 first->protocol = protocol;
7613 /* setup tx offload for FCoE */
7614 if ((protocol == htons(ETH_P_FCOE)) &&
7615 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7616 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7623 #endif /* IXGBE_FCOE */
7624 tso = ixgbe_tso(tx_ring, first, &hdr_len);
7628 ixgbe_tx_csum(tx_ring, first);
7630 /* add the ATR filter if ATR is on */
7631 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7632 ixgbe_atr(tx_ring, first);
7636 #endif /* IXGBE_FCOE */
7637 ixgbe_tx_map(tx_ring, first, hdr_len);
7639 return NETDEV_TX_OK;
7642 dev_kfree_skb_any(first->skb);
7645 return NETDEV_TX_OK;
7648 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7649 struct net_device *netdev,
7650 struct ixgbe_ring *ring)
7652 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7653 struct ixgbe_ring *tx_ring;
7656 * The minimum packet size for olinfo paylen is 17 so pad the skb
7657 * in order to meet this minimum size requirement.
7659 if (skb_put_padto(skb, 17))
7660 return NETDEV_TX_OK;
7662 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7664 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7667 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7668 struct net_device *netdev)
7670 return __ixgbe_xmit_frame(skb, netdev, NULL);
7674 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7675 * @netdev: network interface device structure
7676 * @p: pointer to an address structure
7678 * Returns 0 on success, negative on failure
7680 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7682 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7683 struct ixgbe_hw *hw = &adapter->hw;
7684 struct sockaddr *addr = p;
7687 if (!is_valid_ether_addr(addr->sa_data))
7688 return -EADDRNOTAVAIL;
7690 ixgbe_del_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7691 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7692 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7694 ret = ixgbe_add_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7695 return ret > 0 ? 0 : ret;
7699 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7701 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7702 struct ixgbe_hw *hw = &adapter->hw;
7706 if (prtad != hw->phy.mdio.prtad)
7708 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7714 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7715 u16 addr, u16 value)
7717 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7718 struct ixgbe_hw *hw = &adapter->hw;
7720 if (prtad != hw->phy.mdio.prtad)
7722 return hw->phy.ops.write_reg(hw, addr, devad, value);
7725 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7727 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7731 return ixgbe_ptp_set_ts_config(adapter, req);
7733 return ixgbe_ptp_get_ts_config(adapter, req);
7735 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7740 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7742 * @netdev: network interface device structure
7744 * Returns non-zero on failure
7746 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7749 struct ixgbe_adapter *adapter = netdev_priv(dev);
7750 struct ixgbe_hw *hw = &adapter->hw;
7752 if (is_valid_ether_addr(hw->mac.san_addr)) {
7754 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7757 /* update SAN MAC vmdq pool selection */
7758 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7764 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7766 * @netdev: network interface device structure
7768 * Returns non-zero on failure
7770 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7773 struct ixgbe_adapter *adapter = netdev_priv(dev);
7774 struct ixgbe_mac_info *mac = &adapter->hw.mac;
7776 if (is_valid_ether_addr(mac->san_addr)) {
7778 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7784 #ifdef CONFIG_NET_POLL_CONTROLLER
7786 * Polling 'interrupt' - used by things like netconsole to send skbs
7787 * without having to re-enable interrupts. It's not called while
7788 * the interrupt routine is executing.
7790 static void ixgbe_netpoll(struct net_device *netdev)
7792 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7795 /* if interface is down do nothing */
7796 if (test_bit(__IXGBE_DOWN, &adapter->state))
7799 /* loop through and schedule all active queues */
7800 for (i = 0; i < adapter->num_q_vectors; i++)
7801 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7805 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7806 struct rtnl_link_stats64 *stats)
7808 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7812 for (i = 0; i < adapter->num_rx_queues; i++) {
7813 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7819 start = u64_stats_fetch_begin_irq(&ring->syncp);
7820 packets = ring->stats.packets;
7821 bytes = ring->stats.bytes;
7822 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7823 stats->rx_packets += packets;
7824 stats->rx_bytes += bytes;
7828 for (i = 0; i < adapter->num_tx_queues; i++) {
7829 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7835 start = u64_stats_fetch_begin_irq(&ring->syncp);
7836 packets = ring->stats.packets;
7837 bytes = ring->stats.bytes;
7838 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7839 stats->tx_packets += packets;
7840 stats->tx_bytes += bytes;
7844 /* following stats updated by ixgbe_watchdog_task() */
7845 stats->multicast = netdev->stats.multicast;
7846 stats->rx_errors = netdev->stats.rx_errors;
7847 stats->rx_length_errors = netdev->stats.rx_length_errors;
7848 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
7849 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7853 #ifdef CONFIG_IXGBE_DCB
7855 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7856 * @adapter: pointer to ixgbe_adapter
7857 * @tc: number of traffic classes currently enabled
7859 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7860 * 802.1Q priority maps to a packet buffer that exists.
7862 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7864 struct ixgbe_hw *hw = &adapter->hw;
7868 /* 82598 have a static priority to TC mapping that can not
7869 * be changed so no validation is needed.
7871 if (hw->mac.type == ixgbe_mac_82598EB)
7874 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7877 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7878 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7880 /* If up2tc is out of bounds default to zero */
7882 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7886 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7892 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7893 * @adapter: Pointer to adapter struct
7895 * Populate the netdev user priority to tc map
7897 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7899 struct net_device *dev = adapter->netdev;
7900 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7901 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7904 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7907 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7908 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7910 tc = ets->prio_tc[prio];
7912 netdev_set_prio_tc_map(dev, prio, tc);
7916 #endif /* CONFIG_IXGBE_DCB */
7918 * ixgbe_setup_tc - configure net_device for multiple traffic classes
7920 * @netdev: net device to configure
7921 * @tc: number of traffic classes to enable
7923 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7925 struct ixgbe_adapter *adapter = netdev_priv(dev);
7926 struct ixgbe_hw *hw = &adapter->hw;
7929 /* Hardware supports up to 8 traffic classes */
7930 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
7933 if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
7936 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7937 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7940 /* Hardware has to reinitialize queues and interrupts to
7941 * match packet buffer alignment. Unfortunately, the
7942 * hardware is not flexible enough to do this dynamically.
7944 if (netif_running(dev))
7947 ixgbe_reset(adapter);
7949 ixgbe_clear_interrupt_scheme(adapter);
7951 #ifdef CONFIG_IXGBE_DCB
7953 netdev_set_num_tc(dev, tc);
7954 ixgbe_set_prio_tc_map(adapter);
7956 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7958 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7959 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7960 adapter->hw.fc.requested_mode = ixgbe_fc_none;
7963 netdev_reset_tc(dev);
7965 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7966 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7968 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7970 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7971 adapter->dcb_cfg.pfc_mode_enable = false;
7974 ixgbe_validate_rtr(adapter, tc);
7976 #endif /* CONFIG_IXGBE_DCB */
7977 ixgbe_init_interrupt_scheme(adapter);
7979 if (netif_running(dev))
7980 return ixgbe_open(dev);
7985 #ifdef CONFIG_PCI_IOV
7986 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7988 struct net_device *netdev = adapter->netdev;
7991 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7996 void ixgbe_do_reset(struct net_device *netdev)
7998 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8000 if (netif_running(netdev))
8001 ixgbe_reinit_locked(adapter);
8003 ixgbe_reset(adapter);
8006 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
8007 netdev_features_t features)
8009 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8011 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8012 if (!(features & NETIF_F_RXCSUM))
8013 features &= ~NETIF_F_LRO;
8015 /* Turn off LRO if not RSC capable */
8016 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
8017 features &= ~NETIF_F_LRO;
8022 static int ixgbe_set_features(struct net_device *netdev,
8023 netdev_features_t features)
8025 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8026 netdev_features_t changed = netdev->features ^ features;
8027 bool need_reset = false;
8029 /* Make sure RSC matches LRO, reset if change */
8030 if (!(features & NETIF_F_LRO)) {
8031 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8033 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8034 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8035 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8036 if (adapter->rx_itr_setting == 1 ||
8037 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8038 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8040 } else if ((changed ^ features) & NETIF_F_LRO) {
8041 e_info(probe, "rx-usecs set too low, "
8047 * Check if Flow Director n-tuple support was enabled or disabled. If
8048 * the state changed, we need to reset.
8050 switch (features & NETIF_F_NTUPLE) {
8051 case NETIF_F_NTUPLE:
8052 /* turn off ATR, enable perfect filters and reset */
8053 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8056 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8057 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8060 /* turn off perfect filters, enable ATR and reset */
8061 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8064 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8066 /* We cannot enable ATR if SR-IOV is enabled */
8067 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8070 /* We cannot enable ATR if we have 2 or more traffic classes */
8071 if (netdev_get_num_tc(netdev) > 1)
8074 /* We cannot enable ATR if RSS is disabled */
8075 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
8078 /* A sample rate of 0 indicates ATR disabled */
8079 if (!adapter->atr_sample_rate)
8082 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8086 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8087 ixgbe_vlan_strip_enable(adapter);
8089 ixgbe_vlan_strip_disable(adapter);
8091 if (changed & NETIF_F_RXALL)
8094 netdev->features = features;
8096 #ifdef CONFIG_IXGBE_VXLAN
8097 if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8098 if (features & NETIF_F_RXCSUM)
8099 adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8101 ixgbe_clear_vxlan_port(adapter);
8103 #endif /* CONFIG_IXGBE_VXLAN */
8106 ixgbe_do_reset(netdev);
8111 #ifdef CONFIG_IXGBE_VXLAN
8113 * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
8114 * @dev: The port's netdev
8115 * @sa_family: Socket Family that VXLAN is notifiying us about
8116 * @port: New UDP port number that VXLAN started listening to
8118 static void ixgbe_add_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8121 struct ixgbe_adapter *adapter = netdev_priv(dev);
8122 struct ixgbe_hw *hw = &adapter->hw;
8123 u16 new_port = ntohs(port);
8125 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8128 if (sa_family == AF_INET6)
8131 if (adapter->vxlan_port == new_port)
8134 if (adapter->vxlan_port) {
8136 "Hit Max num of VXLAN ports, not adding port %d\n",
8141 adapter->vxlan_port = new_port;
8142 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, new_port);
8146 * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
8147 * @dev: The port's netdev
8148 * @sa_family: Socket Family that VXLAN is notifying us about
8149 * @port: UDP port number that VXLAN stopped listening to
8151 static void ixgbe_del_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8154 struct ixgbe_adapter *adapter = netdev_priv(dev);
8155 u16 new_port = ntohs(port);
8157 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8160 if (sa_family == AF_INET6)
8163 if (adapter->vxlan_port != new_port) {
8164 netdev_info(dev, "Port %d was not found, not deleting\n",
8169 ixgbe_clear_vxlan_port(adapter);
8170 adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8172 #endif /* CONFIG_IXGBE_VXLAN */
8174 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8175 struct net_device *dev,
8176 const unsigned char *addr, u16 vid,
8179 /* guarantee we can provide a unique filter for the unicast address */
8180 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
8181 if (IXGBE_MAX_PF_MACVLANS <= netdev_uc_count(dev))
8185 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
8189 * ixgbe_configure_bridge_mode - set various bridge modes
8190 * @adapter - the private structure
8191 * @mode - requested bridge mode
8193 * Configure some settings require for various bridge modes.
8195 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
8198 struct ixgbe_hw *hw = &adapter->hw;
8199 unsigned int p, num_pools;
8203 case BRIDGE_MODE_VEPA:
8204 /* disable Tx loopback, rely on switch hairpin mode */
8205 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
8207 /* must enable Rx switching replication to allow multicast
8208 * packet reception on all VFs, and to enable source address
8211 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8212 vmdctl |= IXGBE_VT_CTL_REPLEN;
8213 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8215 /* enable Rx source address pruning. Note, this requires
8216 * replication to be enabled or else it does nothing.
8218 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8219 for (p = 0; p < num_pools; p++) {
8220 if (hw->mac.ops.set_source_address_pruning)
8221 hw->mac.ops.set_source_address_pruning(hw,
8226 case BRIDGE_MODE_VEB:
8227 /* enable Tx loopback for internal VF/PF communication */
8228 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
8229 IXGBE_PFDTXGSWC_VT_LBEN);
8231 /* disable Rx switching replication unless we have SR-IOV
8234 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8235 if (!adapter->num_vfs)
8236 vmdctl &= ~IXGBE_VT_CTL_REPLEN;
8237 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8239 /* disable Rx source address pruning, since we don't expect to
8240 * be receiving external loopback of our transmitted frames.
8242 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8243 for (p = 0; p < num_pools; p++) {
8244 if (hw->mac.ops.set_source_address_pruning)
8245 hw->mac.ops.set_source_address_pruning(hw,
8254 adapter->bridge_mode = mode;
8256 e_info(drv, "enabling bridge mode: %s\n",
8257 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
8262 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
8263 struct nlmsghdr *nlh, u16 flags)
8265 struct ixgbe_adapter *adapter = netdev_priv(dev);
8266 struct nlattr *attr, *br_spec;
8269 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8272 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8276 nla_for_each_nested(attr, br_spec, rem) {
8280 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8283 if (nla_len(attr) < sizeof(mode))
8286 mode = nla_get_u16(attr);
8287 status = ixgbe_configure_bridge_mode(adapter, mode);
8297 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8298 struct net_device *dev,
8299 u32 filter_mask, int nlflags)
8301 struct ixgbe_adapter *adapter = netdev_priv(dev);
8303 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8306 return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
8307 adapter->bridge_mode, 0, 0, nlflags,
8311 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
8313 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
8314 struct ixgbe_adapter *adapter = netdev_priv(pdev);
8315 int used_pools = adapter->num_vfs + adapter->num_rx_pools;
8319 /* Hardware has a limited number of available pools. Each VF, and the
8320 * PF require a pool. Check to ensure we don't attempt to use more
8321 * then the available number of pools.
8323 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
8324 return ERR_PTR(-EINVAL);
8327 if (vdev->num_rx_queues != vdev->num_tx_queues) {
8328 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
8330 return ERR_PTR(-EINVAL);
8333 /* Check for hardware restriction on number of rx/tx queues */
8334 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
8335 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
8337 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
8339 return ERR_PTR(-EINVAL);
8342 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8343 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
8344 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
8345 return ERR_PTR(-EBUSY);
8347 fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
8349 return ERR_PTR(-ENOMEM);
8351 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
8352 adapter->num_rx_pools++;
8353 set_bit(pool, &adapter->fwd_bitmask);
8354 limit = find_last_bit(&adapter->fwd_bitmask, 32);
8356 /* Enable VMDq flag so device will be set in VM mode */
8357 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
8358 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8359 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
8361 /* Force reinit of ring allocation with VMDQ enabled */
8362 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8365 fwd_adapter->pool = pool;
8366 fwd_adapter->real_adapter = adapter;
8367 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
8370 netif_tx_start_all_queues(vdev);
8373 /* unwind counter and free adapter struct */
8375 "%s: dfwd hardware acceleration failed\n", vdev->name);
8376 clear_bit(pool, &adapter->fwd_bitmask);
8377 adapter->num_rx_pools--;
8379 return ERR_PTR(err);
8382 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
8384 struct ixgbe_fwd_adapter *fwd_adapter = priv;
8385 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
8388 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
8389 adapter->num_rx_pools--;
8391 limit = find_last_bit(&adapter->fwd_bitmask, 32);
8392 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8393 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
8394 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8395 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
8396 fwd_adapter->pool, adapter->num_rx_pools,
8397 fwd_adapter->rx_base_queue,
8398 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
8399 adapter->fwd_bitmask);
8403 #define IXGBE_MAX_TUNNEL_HDR_LEN 80
8404 static netdev_features_t
8405 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
8406 netdev_features_t features)
8408 if (!skb->encapsulation)
8411 if (unlikely(skb_inner_mac_header(skb) - skb_transport_header(skb) >
8412 IXGBE_MAX_TUNNEL_HDR_LEN))
8413 return features & ~NETIF_F_ALL_CSUM;
8418 static const struct net_device_ops ixgbe_netdev_ops = {
8419 .ndo_open = ixgbe_open,
8420 .ndo_stop = ixgbe_close,
8421 .ndo_start_xmit = ixgbe_xmit_frame,
8422 .ndo_select_queue = ixgbe_select_queue,
8423 .ndo_set_rx_mode = ixgbe_set_rx_mode,
8424 .ndo_validate_addr = eth_validate_addr,
8425 .ndo_set_mac_address = ixgbe_set_mac,
8426 .ndo_change_mtu = ixgbe_change_mtu,
8427 .ndo_tx_timeout = ixgbe_tx_timeout,
8428 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
8429 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
8430 .ndo_do_ioctl = ixgbe_ioctl,
8431 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
8432 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
8433 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
8434 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
8435 .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
8436 .ndo_set_vf_trust = ixgbe_ndo_set_vf_trust,
8437 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
8438 .ndo_get_stats64 = ixgbe_get_stats64,
8439 #ifdef CONFIG_IXGBE_DCB
8440 .ndo_setup_tc = ixgbe_setup_tc,
8442 #ifdef CONFIG_NET_POLL_CONTROLLER
8443 .ndo_poll_controller = ixgbe_netpoll,
8445 #ifdef CONFIG_NET_RX_BUSY_POLL
8446 .ndo_busy_poll = ixgbe_low_latency_recv,
8449 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
8450 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
8451 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
8452 .ndo_fcoe_enable = ixgbe_fcoe_enable,
8453 .ndo_fcoe_disable = ixgbe_fcoe_disable,
8454 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
8455 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
8456 #endif /* IXGBE_FCOE */
8457 .ndo_set_features = ixgbe_set_features,
8458 .ndo_fix_features = ixgbe_fix_features,
8459 .ndo_fdb_add = ixgbe_ndo_fdb_add,
8460 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
8461 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
8462 .ndo_dfwd_add_station = ixgbe_fwd_add,
8463 .ndo_dfwd_del_station = ixgbe_fwd_del,
8464 #ifdef CONFIG_IXGBE_VXLAN
8465 .ndo_add_vxlan_port = ixgbe_add_vxlan_port,
8466 .ndo_del_vxlan_port = ixgbe_del_vxlan_port,
8467 #endif /* CONFIG_IXGBE_VXLAN */
8468 .ndo_features_check = ixgbe_features_check,
8472 * ixgbe_enumerate_functions - Get the number of ports this device has
8473 * @adapter: adapter structure
8475 * This function enumerates the phsyical functions co-located on a single slot,
8476 * in order to determine how many ports a device has. This is most useful in
8477 * determining the required GT/s of PCIe bandwidth necessary for optimal
8480 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
8482 struct pci_dev *entry, *pdev = adapter->pdev;
8485 /* Some cards can not use the generic count PCIe functions method,
8486 * because they are behind a parent switch, so we hardcode these with
8487 * the correct number of functions.
8489 if (ixgbe_pcie_from_parent(&adapter->hw))
8492 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
8493 /* don't count virtual functions */
8494 if (entry->is_virtfn)
8497 /* When the devices on the bus don't all match our device ID,
8498 * we can't reliably determine the correct number of
8499 * functions. This can occur if a function has been direct
8500 * attached to a virtual machine using VT-d, for example. In
8501 * this case, simply return -1 to indicate this.
8503 if ((entry->vendor != pdev->vendor) ||
8504 (entry->device != pdev->device))
8514 * ixgbe_wol_supported - Check whether device supports WoL
8515 * @hw: hw specific details
8516 * @device_id: the device ID
8517 * @subdev_id: the subsystem device ID
8519 * This function is used by probe and ethtool to determine
8520 * which devices have WoL support
8523 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
8526 struct ixgbe_hw *hw = &adapter->hw;
8527 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
8528 int is_wol_supported = 0;
8530 switch (device_id) {
8531 case IXGBE_DEV_ID_82599_SFP:
8532 /* Only these subdevices could supports WOL */
8533 switch (subdevice_id) {
8534 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
8535 case IXGBE_SUBDEV_ID_82599_560FLR:
8536 /* only support first port */
8537 if (hw->bus.func != 0)
8539 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
8540 case IXGBE_SUBDEV_ID_82599_SFP:
8541 case IXGBE_SUBDEV_ID_82599_RNDC:
8542 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
8543 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
8544 is_wol_supported = 1;
8548 case IXGBE_DEV_ID_82599EN_SFP:
8549 /* Only this subdevice supports WOL */
8550 switch (subdevice_id) {
8551 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8552 is_wol_supported = 1;
8556 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8557 /* All except this subdevice support WOL */
8558 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8559 is_wol_supported = 1;
8561 case IXGBE_DEV_ID_82599_KX4:
8562 is_wol_supported = 1;
8564 case IXGBE_DEV_ID_X540T:
8565 case IXGBE_DEV_ID_X540T1:
8566 case IXGBE_DEV_ID_X550T:
8567 case IXGBE_DEV_ID_X550EM_X_KX4:
8568 case IXGBE_DEV_ID_X550EM_X_KR:
8569 case IXGBE_DEV_ID_X550EM_X_10G_T:
8570 /* check eeprom to see if enabled wol */
8571 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8572 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8573 (hw->bus.func == 0))) {
8574 is_wol_supported = 1;
8579 return is_wol_supported;
8583 * ixgbe_get_platform_mac_addr - Look up MAC address in Open Firmware / IDPROM
8584 * @adapter: Pointer to adapter struct
8586 static void ixgbe_get_platform_mac_addr(struct ixgbe_adapter *adapter)
8589 struct device_node *dp = pci_device_to_OF_node(adapter->pdev);
8590 struct ixgbe_hw *hw = &adapter->hw;
8591 const unsigned char *addr;
8593 addr = of_get_mac_address(dp);
8595 ether_addr_copy(hw->mac.perm_addr, addr);
8598 #endif /* CONFIG_OF */
8601 ether_addr_copy(hw->mac.perm_addr, idprom->id_ethaddr);
8602 #endif /* CONFIG_SPARC */
8606 * ixgbe_probe - Device Initialization Routine
8607 * @pdev: PCI device information struct
8608 * @ent: entry in ixgbe_pci_tbl
8610 * Returns 0 on success, negative on failure
8612 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8613 * The OS initialization, configuring of the adapter private structure,
8614 * and a hardware reset occur.
8616 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8618 struct net_device *netdev;
8619 struct ixgbe_adapter *adapter = NULL;
8620 struct ixgbe_hw *hw;
8621 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8622 int i, err, pci_using_dac, expected_gts;
8623 unsigned int indices = MAX_TX_QUEUES;
8624 u8 part_str[IXGBE_PBANUM_LENGTH];
8625 bool disable_dev = false;
8631 /* Catch broken hardware that put the wrong VF device ID in
8632 * the PCIe SR-IOV capability.
8634 if (pdev->is_virtfn) {
8635 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8636 pci_name(pdev), pdev->vendor, pdev->device);
8640 err = pci_enable_device_mem(pdev);
8644 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8647 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8650 "No usable DMA configuration, aborting\n");
8656 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8657 IORESOURCE_MEM), ixgbe_driver_name);
8660 "pci_request_selected_regions failed 0x%x\n", err);
8664 pci_enable_pcie_error_reporting(pdev);
8666 pci_set_master(pdev);
8667 pci_save_state(pdev);
8669 if (ii->mac == ixgbe_mac_82598EB) {
8670 #ifdef CONFIG_IXGBE_DCB
8671 /* 8 TC w/ 4 queues per TC */
8672 indices = 4 * MAX_TRAFFIC_CLASS;
8674 indices = IXGBE_MAX_RSS_INDICES;
8678 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8681 goto err_alloc_etherdev;
8684 SET_NETDEV_DEV(netdev, &pdev->dev);
8686 adapter = netdev_priv(netdev);
8688 adapter->netdev = netdev;
8689 adapter->pdev = pdev;
8692 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8694 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8695 pci_resource_len(pdev, 0));
8696 adapter->io_addr = hw->hw_addr;
8702 netdev->netdev_ops = &ixgbe_netdev_ops;
8703 ixgbe_set_ethtool_ops(netdev);
8704 netdev->watchdog_timeo = 5 * HZ;
8705 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
8708 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8709 hw->mac.type = ii->mac;
8710 hw->mvals = ii->mvals;
8713 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8714 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
8715 if (ixgbe_removed(hw->hw_addr)) {
8719 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8720 if (!(eec & (1 << 8)))
8721 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8724 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8725 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8726 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8727 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8728 hw->phy.mdio.mmds = 0;
8729 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8730 hw->phy.mdio.dev = netdev;
8731 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8732 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8734 ii->get_invariants(hw);
8736 /* setup the private structure */
8737 err = ixgbe_sw_init(adapter);
8741 /* Make it possible the adapter to be woken up via WOL */
8742 switch (adapter->hw.mac.type) {
8743 case ixgbe_mac_82599EB:
8744 case ixgbe_mac_X540:
8745 case ixgbe_mac_X550:
8746 case ixgbe_mac_X550EM_x:
8747 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8754 * If there is a fan on this device and it has failed log the
8757 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8758 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8759 if (esdp & IXGBE_ESDP_SDP1)
8760 e_crit(probe, "Fan has stopped, replace the adapter\n");
8763 if (allow_unsupported_sfp)
8764 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8766 /* reset_hw fills in the perm_addr as well */
8767 hw->phy.reset_if_overtemp = true;
8768 err = hw->mac.ops.reset_hw(hw);
8769 hw->phy.reset_if_overtemp = false;
8770 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
8772 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8773 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8774 e_dev_err("Reload the driver after installing a supported module.\n");
8777 e_dev_err("HW Init failed: %d\n", err);
8781 #ifdef CONFIG_PCI_IOV
8782 /* SR-IOV not supported on the 82598 */
8783 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8786 ixgbe_init_mbx_params_pf(hw);
8787 memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8788 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8789 ixgbe_enable_sriov(adapter);
8793 netdev->features = NETIF_F_SG |
8796 NETIF_F_HW_VLAN_CTAG_TX |
8797 NETIF_F_HW_VLAN_CTAG_RX |
8803 netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8805 switch (adapter->hw.mac.type) {
8806 case ixgbe_mac_82599EB:
8807 case ixgbe_mac_X540:
8808 case ixgbe_mac_X550:
8809 case ixgbe_mac_X550EM_x:
8810 netdev->features |= NETIF_F_SCTP_CSUM;
8811 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8818 netdev->hw_features |= NETIF_F_RXALL;
8819 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
8821 netdev->vlan_features |= NETIF_F_TSO;
8822 netdev->vlan_features |= NETIF_F_TSO6;
8823 netdev->vlan_features |= NETIF_F_IP_CSUM;
8824 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8825 netdev->vlan_features |= NETIF_F_SG;
8827 netdev->hw_enc_features |= NETIF_F_SG | NETIF_F_IP_CSUM |
8830 netdev->priv_flags |= IFF_UNICAST_FLT;
8831 netdev->priv_flags |= IFF_SUPP_NOFCS;
8833 #ifdef CONFIG_IXGBE_VXLAN
8834 switch (adapter->hw.mac.type) {
8835 case ixgbe_mac_X550:
8836 case ixgbe_mac_X550EM_x:
8837 netdev->hw_enc_features |= NETIF_F_RXCSUM |
8844 #endif /* CONFIG_IXGBE_VXLAN */
8846 #ifdef CONFIG_IXGBE_DCB
8847 netdev->dcbnl_ops = &dcbnl_ops;
8851 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8852 unsigned int fcoe_l;
8854 if (hw->mac.ops.get_device_caps) {
8855 hw->mac.ops.get_device_caps(hw, &device_caps);
8856 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8857 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8861 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8862 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8864 netdev->features |= NETIF_F_FSO |
8867 netdev->vlan_features |= NETIF_F_FSO |
8871 #endif /* IXGBE_FCOE */
8872 if (pci_using_dac) {
8873 netdev->features |= NETIF_F_HIGHDMA;
8874 netdev->vlan_features |= NETIF_F_HIGHDMA;
8877 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8878 netdev->hw_features |= NETIF_F_LRO;
8879 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8880 netdev->features |= NETIF_F_LRO;
8882 /* make sure the EEPROM is good */
8883 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8884 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8889 ixgbe_get_platform_mac_addr(adapter);
8891 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8893 if (!is_valid_ether_addr(netdev->dev_addr)) {
8894 e_dev_err("invalid MAC address\n");
8899 ixgbe_mac_set_default_filter(adapter, hw->mac.perm_addr);
8901 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8902 (unsigned long) adapter);
8904 if (ixgbe_removed(hw->hw_addr)) {
8908 INIT_WORK(&adapter->service_task, ixgbe_service_task);
8909 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8910 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8912 err = ixgbe_init_interrupt_scheme(adapter);
8916 /* WOL not supported for all devices */
8918 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8919 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8920 pdev->subsystem_device);
8921 if (hw->wol_enabled)
8922 adapter->wol = IXGBE_WUFC_MAG;
8924 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8926 /* save off EEPROM version number */
8927 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8928 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8930 /* pick up the PCI bus settings for reporting later */
8931 if (ixgbe_pcie_from_parent(hw))
8932 ixgbe_get_parent_bus_info(adapter);
8934 hw->mac.ops.get_bus_info(hw);
8936 /* calculate the expected PCIe bandwidth required for optimal
8937 * performance. Note that some older parts will never have enough
8938 * bandwidth due to being older generation PCIe parts. We clamp these
8939 * parts to ensure no warning is displayed if it can't be fixed.
8941 switch (hw->mac.type) {
8942 case ixgbe_mac_82598EB:
8943 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8946 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8950 /* don't check link if we failed to enumerate functions */
8951 if (expected_gts > 0)
8952 ixgbe_check_minimum_link(adapter, expected_gts);
8954 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
8956 strlcpy(part_str, "Unknown", sizeof(part_str));
8957 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8958 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8959 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8962 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8963 hw->mac.type, hw->phy.type, part_str);
8965 e_dev_info("%pM\n", netdev->dev_addr);
8967 /* reset the hardware with the new settings */
8968 err = hw->mac.ops.start_hw(hw);
8969 if (err == IXGBE_ERR_EEPROM_VERSION) {
8970 /* We are running on a pre-production device, log a warning */
8971 e_dev_warn("This device is a pre-production adapter/LOM. "
8972 "Please be aware there may be issues associated "
8973 "with your hardware. If you are experiencing "
8974 "problems please contact your Intel or hardware "
8975 "representative who provided you with this "
8978 strcpy(netdev->name, "eth%d");
8979 err = register_netdev(netdev);
8983 pci_set_drvdata(pdev, adapter);
8985 /* power down the optics for 82599 SFP+ fiber */
8986 if (hw->mac.ops.disable_tx_laser)
8987 hw->mac.ops.disable_tx_laser(hw);
8989 /* carrier off reporting is important to ethtool even BEFORE open */
8990 netif_carrier_off(netdev);
8992 #ifdef CONFIG_IXGBE_DCA
8993 if (dca_add_requester(&pdev->dev) == 0) {
8994 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8995 ixgbe_setup_dca(adapter);
8998 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8999 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
9000 for (i = 0; i < adapter->num_vfs; i++)
9001 ixgbe_vf_configuration(pdev, (i | 0x10000000));
9004 /* firmware requires driver version to be 0xFFFFFFFF
9005 * since os does not support feature
9007 if (hw->mac.ops.set_fw_drv_ver)
9008 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
9011 /* add san mac addr to netdev */
9012 ixgbe_add_sanmac_netdev(netdev);
9014 e_dev_info("%s\n", ixgbe_default_device_descr);
9016 #ifdef CONFIG_IXGBE_HWMON
9017 if (ixgbe_sysfs_init(adapter))
9018 e_err(probe, "failed to allocate sysfs resources\n");
9019 #endif /* CONFIG_IXGBE_HWMON */
9021 ixgbe_dbg_adapter_init(adapter);
9023 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9024 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
9025 hw->mac.ops.setup_link(hw,
9026 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
9032 ixgbe_release_hw_control(adapter);
9033 ixgbe_clear_interrupt_scheme(adapter);
9035 ixgbe_disable_sriov(adapter);
9036 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
9037 iounmap(adapter->io_addr);
9038 kfree(adapter->mac_table);
9040 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9041 free_netdev(netdev);
9043 pci_release_selected_regions(pdev,
9044 pci_select_bars(pdev, IORESOURCE_MEM));
9047 if (!adapter || disable_dev)
9048 pci_disable_device(pdev);
9053 * ixgbe_remove - Device Removal Routine
9054 * @pdev: PCI device information struct
9056 * ixgbe_remove is called by the PCI subsystem to alert the driver
9057 * that it should release a PCI device. The could be caused by a
9058 * Hot-Plug event, or because the driver is going to be removed from
9061 static void ixgbe_remove(struct pci_dev *pdev)
9063 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9064 struct net_device *netdev;
9067 /* if !adapter then we already cleaned up in probe */
9071 netdev = adapter->netdev;
9072 ixgbe_dbg_adapter_exit(adapter);
9074 set_bit(__IXGBE_REMOVING, &adapter->state);
9075 cancel_work_sync(&adapter->service_task);
9078 #ifdef CONFIG_IXGBE_DCA
9079 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9080 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9081 dca_remove_requester(&pdev->dev);
9082 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
9083 IXGBE_DCA_CTRL_DCA_DISABLE);
9087 #ifdef CONFIG_IXGBE_HWMON
9088 ixgbe_sysfs_exit(adapter);
9089 #endif /* CONFIG_IXGBE_HWMON */
9091 /* remove the added san mac */
9092 ixgbe_del_sanmac_netdev(netdev);
9094 #ifdef CONFIG_PCI_IOV
9095 ixgbe_disable_sriov(adapter);
9097 if (netdev->reg_state == NETREG_REGISTERED)
9098 unregister_netdev(netdev);
9100 ixgbe_clear_interrupt_scheme(adapter);
9102 ixgbe_release_hw_control(adapter);
9105 kfree(adapter->ixgbe_ieee_pfc);
9106 kfree(adapter->ixgbe_ieee_ets);
9109 iounmap(adapter->io_addr);
9110 pci_release_selected_regions(pdev, pci_select_bars(pdev,
9113 e_dev_info("complete\n");
9115 kfree(adapter->mac_table);
9116 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9117 free_netdev(netdev);
9119 pci_disable_pcie_error_reporting(pdev);
9122 pci_disable_device(pdev);
9126 * ixgbe_io_error_detected - called when PCI error is detected
9127 * @pdev: Pointer to PCI device
9128 * @state: The current pci connection state
9130 * This function is called after a PCI bus error affecting
9131 * this device has been detected.
9133 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
9134 pci_channel_state_t state)
9136 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9137 struct net_device *netdev = adapter->netdev;
9139 #ifdef CONFIG_PCI_IOV
9140 struct ixgbe_hw *hw = &adapter->hw;
9141 struct pci_dev *bdev, *vfdev;
9142 u32 dw0, dw1, dw2, dw3;
9144 u16 req_id, pf_func;
9146 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
9147 adapter->num_vfs == 0)
9148 goto skip_bad_vf_detection;
9150 bdev = pdev->bus->self;
9151 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9152 bdev = bdev->bus->self;
9155 goto skip_bad_vf_detection;
9157 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9159 goto skip_bad_vf_detection;
9161 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
9162 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
9163 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
9164 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
9165 if (ixgbe_removed(hw->hw_addr))
9166 goto skip_bad_vf_detection;
9169 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9170 if (!(req_id & 0x0080))
9171 goto skip_bad_vf_detection;
9173 pf_func = req_id & 0x01;
9174 if ((pf_func & 1) == (pdev->devfn & 1)) {
9175 unsigned int device_id;
9177 vf = (req_id & 0x7F) >> 1;
9178 e_dev_err("VF %d has caused a PCIe error\n", vf);
9179 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9180 "%8.8x\tdw3: %8.8x\n",
9181 dw0, dw1, dw2, dw3);
9182 switch (adapter->hw.mac.type) {
9183 case ixgbe_mac_82599EB:
9184 device_id = IXGBE_82599_VF_DEVICE_ID;
9186 case ixgbe_mac_X540:
9187 device_id = IXGBE_X540_VF_DEVICE_ID;
9189 case ixgbe_mac_X550:
9190 device_id = IXGBE_DEV_ID_X550_VF;
9192 case ixgbe_mac_X550EM_x:
9193 device_id = IXGBE_DEV_ID_X550EM_X_VF;
9200 /* Find the pci device of the offending VF */
9201 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
9203 if (vfdev->devfn == (req_id & 0xFF))
9205 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9209 * There's a slim chance the VF could have been hot plugged,
9210 * so if it is no longer present we don't need to issue the
9211 * VFLR. Just clean up the AER in that case.
9214 ixgbe_issue_vf_flr(adapter, vfdev);
9215 /* Free device reference count */
9219 pci_cleanup_aer_uncorrect_error_status(pdev);
9223 * Even though the error may have occurred on the other port
9224 * we still need to increment the vf error reference count for
9225 * both ports because the I/O resume function will be called
9228 adapter->vferr_refcount++;
9230 return PCI_ERS_RESULT_RECOVERED;
9232 skip_bad_vf_detection:
9233 #endif /* CONFIG_PCI_IOV */
9234 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
9235 return PCI_ERS_RESULT_DISCONNECT;
9238 netif_device_detach(netdev);
9240 if (state == pci_channel_io_perm_failure) {
9242 return PCI_ERS_RESULT_DISCONNECT;
9245 if (netif_running(netdev))
9246 ixgbe_close_suspend(adapter);
9248 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
9249 pci_disable_device(pdev);
9252 /* Request a slot reset. */
9253 return PCI_ERS_RESULT_NEED_RESET;
9257 * ixgbe_io_slot_reset - called after the pci bus has been reset.
9258 * @pdev: Pointer to PCI device
9260 * Restart the card from scratch, as if from a cold-boot.
9262 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
9264 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9265 pci_ers_result_t result;
9268 if (pci_enable_device_mem(pdev)) {
9269 e_err(probe, "Cannot re-enable PCI device after reset.\n");
9270 result = PCI_ERS_RESULT_DISCONNECT;
9272 smp_mb__before_atomic();
9273 clear_bit(__IXGBE_DISABLED, &adapter->state);
9274 adapter->hw.hw_addr = adapter->io_addr;
9275 pci_set_master(pdev);
9276 pci_restore_state(pdev);
9277 pci_save_state(pdev);
9279 pci_wake_from_d3(pdev, false);
9281 ixgbe_reset(adapter);
9282 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9283 result = PCI_ERS_RESULT_RECOVERED;
9286 err = pci_cleanup_aer_uncorrect_error_status(pdev);
9288 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9289 "failed 0x%0x\n", err);
9290 /* non-fatal, continue */
9297 * ixgbe_io_resume - called when traffic can start flowing again.
9298 * @pdev: Pointer to PCI device
9300 * This callback is called when the error recovery driver tells us that
9301 * its OK to resume normal operation.
9303 static void ixgbe_io_resume(struct pci_dev *pdev)
9305 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9306 struct net_device *netdev = adapter->netdev;
9308 #ifdef CONFIG_PCI_IOV
9309 if (adapter->vferr_refcount) {
9310 e_info(drv, "Resuming after VF err\n");
9311 adapter->vferr_refcount--;
9317 if (netif_running(netdev))
9320 netif_device_attach(netdev);
9324 static const struct pci_error_handlers ixgbe_err_handler = {
9325 .error_detected = ixgbe_io_error_detected,
9326 .slot_reset = ixgbe_io_slot_reset,
9327 .resume = ixgbe_io_resume,
9330 static struct pci_driver ixgbe_driver = {
9331 .name = ixgbe_driver_name,
9332 .id_table = ixgbe_pci_tbl,
9333 .probe = ixgbe_probe,
9334 .remove = ixgbe_remove,
9336 .suspend = ixgbe_suspend,
9337 .resume = ixgbe_resume,
9339 .shutdown = ixgbe_shutdown,
9340 .sriov_configure = ixgbe_pci_sriov_configure,
9341 .err_handler = &ixgbe_err_handler
9345 * ixgbe_init_module - Driver Registration Routine
9347 * ixgbe_init_module is the first routine called when the driver is
9348 * loaded. All it does is register with the PCI subsystem.
9350 static int __init ixgbe_init_module(void)
9353 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
9354 pr_info("%s\n", ixgbe_copyright);
9358 ret = pci_register_driver(&ixgbe_driver);
9364 #ifdef CONFIG_IXGBE_DCA
9365 dca_register_notify(&dca_notifier);
9371 module_init(ixgbe_init_module);
9374 * ixgbe_exit_module - Driver Exit Cleanup Routine
9376 * ixgbe_exit_module is called just before the driver is removed
9379 static void __exit ixgbe_exit_module(void)
9381 #ifdef CONFIG_IXGBE_DCA
9382 dca_unregister_notify(&dca_notifier);
9384 pci_unregister_driver(&ixgbe_driver);
9389 #ifdef CONFIG_IXGBE_DCA
9390 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
9395 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
9396 __ixgbe_notify_dca);
9398 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
9401 #endif /* CONFIG_IXGBE_DCA */
9403 module_exit(ixgbe_exit_module);