drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <scsi/fc/fc_fcoe.h>
  53 #include <net/udp_tunnel.h>
  54 #include <net/pkt_cls.h>
  55 #include <net/tc_act/tc_gact.h>
  56 #include <net/tc_act/tc_mirred.h>
  57
  58 #include "ixgbe.h"
  59 #include "ixgbe_common.h"
  60 #include "ixgbe_dcb_82599.h"
  61 #include "ixgbe_sriov.h"
  62 #include "ixgbe_model.h"
  63
  64 char ixgbe_driver_name[] = "ixgbe";
  65 static const char ixgbe_driver_string[] =
  66                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  67 #ifdef IXGBE_FCOE
  68 char ixgbe_default_device_descr[] =
  69                               "Intel(R) 10 Gigabit Network Connection";
  70 #else
  71 static char ixgbe_default_device_descr[] =
  72                               "Intel(R) 10 Gigabit Network Connection";
  73 #endif
  74 #define DRV_VERSION "4.4.0-k"
  75 const char ixgbe_driver_version[] = DRV_VERSION;
  76 static const char ixgbe_copyright[] =
  77                                 "Copyright (c) 1999-2016 Intel Corporation.";
  78
  79 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  80
  81 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  82         [board_82598]           = &ixgbe_82598_info,
  83         [board_82599]           = &ixgbe_82599_info,
  84         [board_X540]            = &ixgbe_X540_info,
  85         [board_X550]            = &ixgbe_X550_info,
  86         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  87         [board_x550em_a]        = &ixgbe_x550em_a_info,
  88 };
  89
  90 /* ixgbe_pci_tbl - PCI Device ID Table
  91  *
  92  * Wildcard entries (PCI_ANY_ID) should come last
  93  * Last entry must be all 0s
  94  *
  95  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  96  *   Class, Class Mask, private data (not used) }
  97  */
  98 static const struct pci_device_id ixgbe_pci_tbl[] = {
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 141         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 142         /* required last entry */
 143         {0, }
 144 };
 145 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 146
 147 #ifdef CONFIG_IXGBE_DCA
 148 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 149                             void *p);
 150 static struct notifier_block dca_notifier = {
 151         .notifier_call = ixgbe_notify_dca,
 152         .next          = NULL,
 153         .priority      = 0
 154 };
 155 #endif
 156
 157 #ifdef CONFIG_PCI_IOV
 158 static unsigned int max_vfs;
 159 module_param(max_vfs, uint, 0);
 160 MODULE_PARM_DESC(max_vfs,
 161                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 162 #endif /* CONFIG_PCI_IOV */
 163
 164 static unsigned int allow_unsupported_sfp;
 165 module_param(allow_unsupported_sfp, uint, 0);
 166 MODULE_PARM_DESC(allow_unsupported_sfp,
 167                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 168
 169 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 170 static int debug = -1;
 171 module_param(debug, int, 0);
 172 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 173
 174 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 175 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 176 MODULE_LICENSE("GPL");
 177 MODULE_VERSION(DRV_VERSION);
 178
 179 static struct workqueue_struct *ixgbe_wq;
 180
 181 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 182
 183 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 184                                           u32 reg, u16 *value)
 185 {
 186         struct pci_dev *parent_dev;
 187         struct pci_bus *parent_bus;
 188
 189         parent_bus = adapter->pdev->bus->parent;
 190         if (!parent_bus)
 191                 return -1;
 192
 193         parent_dev = parent_bus->self;
 194         if (!parent_dev)
 195                 return -1;
 196
 197         if (!pci_is_pcie(parent_dev))
 198                 return -1;
 199
 200         pcie_capability_read_word(parent_dev, reg, value);
 201         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 202             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 203                 return -1;
 204         return 0;
 205 }
 206
 207 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 208 {
 209         struct ixgbe_hw *hw = &adapter->hw;
 210         u16 link_status = 0;
 211         int err;
 212
 213         hw->bus.type = ixgbe_bus_type_pci_express;
 214
 215         /* Get the negotiated link width and speed from PCI config space of the
 216          * parent, as this device is behind a switch
 217          */
 218         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 219
 220         /* assume caller will handle error case */
 221         if (err)
 222                 return err;
 223
 224         hw->bus.width = ixgbe_convert_bus_width(link_status);
 225         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 226
 227         return 0;
 228 }
 229
 230 /**
 231  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 232  * @hw: hw specific details
 233  *
 234  * This function is used by probe to determine whether a device's PCI-Express
 235  * bandwidth details should be gathered from the parent bus instead of from the
 236  * device. Used to ensure that various locations all have the correct device ID
 237  * checks.
 238  */
 239 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 240 {
 241         switch (hw->device_id) {
 242         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 243         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 244                 return true;
 245         default:
 246                 return false;
 247         }
 248 }
 249
 250 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 251                                      int expected_gts)
 252 {
 253         struct ixgbe_hw *hw = &adapter->hw;
 254         int max_gts = 0;
 255         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 256         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 257         struct pci_dev *pdev;
 258
 259         /* Some devices are not connected over PCIe and thus do not negotiate
 260          * speed. These devices do not have valid bus info, and thus any report
 261          * we generate may not be correct.
 262          */
 263         if (hw->bus.type == ixgbe_bus_type_internal)
 264                 return;
 265
 266         /* determine whether to use the parent device */
 267         if (ixgbe_pcie_from_parent(&adapter->hw))
 268                 pdev = adapter->pdev->bus->parent->self;
 269         else
 270                 pdev = adapter->pdev;
 271
 272         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 273             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 274                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 275                 return;
 276         }
 277
 278         switch (speed) {
 279         case PCIE_SPEED_2_5GT:
 280                 /* 8b/10b encoding reduces max throughput by 20% */
 281                 max_gts = 2 * width;
 282                 break;
 283         case PCIE_SPEED_5_0GT:
 284                 /* 8b/10b encoding reduces max throughput by 20% */
 285                 max_gts = 4 * width;
 286                 break;
 287         case PCIE_SPEED_8_0GT:
 288                 /* 128b/130b encoding reduces throughput by less than 2% */
 289                 max_gts = 8 * width;
 290                 break;
 291         default:
 292                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 293                 return;
 294         }
 295
 296         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 297                    max_gts);
 298         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 299                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 300                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 301                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 302                     "Unknown"),
 303                    width,
 304                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 305                     speed == PCIE_SPEED_5_0GT ? "20%" :
 306                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 307                     "Unknown"));
 308
 309         if (max_gts < expected_gts) {
 310                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 311                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 312                         expected_gts);
 313                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 314         }
 315 }
 316
 317 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 318 {
 319         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 320             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 321             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 322                 queue_work(ixgbe_wq, &adapter->service_task);
 323 }
 324
 325 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 326 {
 327         struct ixgbe_adapter *adapter = hw->back;
 328
 329         if (!hw->hw_addr)
 330                 return;
 331         hw->hw_addr = NULL;
 332         e_dev_err("Adapter removed\n");
 333         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 334                 ixgbe_service_event_schedule(adapter);
 335 }
 336
 337 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 338 {
 339         u32 value;
 340
 341         /* The following check not only optimizes a bit by not
 342          * performing a read on the status register when the
 343          * register just read was a status register read that
 344          * returned IXGBE_FAILED_READ_REG. It also blocks any
 345          * potential recursion.
 346          */
 347         if (reg == IXGBE_STATUS) {
 348                 ixgbe_remove_adapter(hw);
 349                 return;
 350         }
 351         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 352         if (value == IXGBE_FAILED_READ_REG)
 353                 ixgbe_remove_adapter(hw);
 354 }
 355
 356 /**
 357  * ixgbe_read_reg - Read from device register
 358  * @hw: hw specific details
 359  * @reg: offset of register to read
 360  *
 361  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 362  *
 363  * This function is used to read device registers. It checks for device
 364  * removal by confirming any read that returns all ones by checking the
 365  * status register value for all ones. This function avoids reading from
 366  * the hardware if a removal was previously detected in which case it
 367  * returns IXGBE_FAILED_READ_REG (all ones).
 368  */
 369 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 370 {
 371         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 372         u32 value;
 373
 374         if (ixgbe_removed(reg_addr))
 375                 return IXGBE_FAILED_READ_REG;
 376         if (unlikely(hw->phy.nw_mng_if_sel &
 377                      IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M)) {
 378                 struct ixgbe_adapter *adapter;
 379                 int i;
 380
 381                 for (i = 0; i < 200; ++i) {
 382                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 383                         if (likely(!value))
 384                                 goto writes_completed;
 385                         if (value == IXGBE_FAILED_READ_REG) {
 386                                 ixgbe_remove_adapter(hw);
 387                                 return IXGBE_FAILED_READ_REG;
 388                         }
 389                         udelay(5);
 390                 }
 391
 392                 adapter = hw->back;
 393                 e_warn(hw, "register writes incomplete %08x\n", value);
 394         }
 395
 396 writes_completed:
 397         value = readl(reg_addr + reg);
 398         if (unlikely(value == IXGBE_FAILED_READ_REG))
 399                 ixgbe_check_remove(hw, reg);
 400         return value;
 401 }
 402
 403 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 404 {
 405         u16 value;
 406
 407         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 408         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 409                 ixgbe_remove_adapter(hw);
 410                 return true;
 411         }
 412         return false;
 413 }
 414
 415 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 416 {
 417         struct ixgbe_adapter *adapter = hw->back;
 418         u16 value;
 419
 420         if (ixgbe_removed(hw->hw_addr))
 421                 return IXGBE_FAILED_READ_CFG_WORD;
 422         pci_read_config_word(adapter->pdev, reg, &value);
 423         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 424             ixgbe_check_cfg_remove(hw, adapter->pdev))
 425                 return IXGBE_FAILED_READ_CFG_WORD;
 426         return value;
 427 }
 428
 429 #ifdef CONFIG_PCI_IOV
 430 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 431 {
 432         struct ixgbe_adapter *adapter = hw->back;
 433         u32 value;
 434
 435         if (ixgbe_removed(hw->hw_addr))
 436                 return IXGBE_FAILED_READ_CFG_DWORD;
 437         pci_read_config_dword(adapter->pdev, reg, &value);
 438         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 439             ixgbe_check_cfg_remove(hw, adapter->pdev))
 440                 return IXGBE_FAILED_READ_CFG_DWORD;
 441         return value;
 442 }
 443 #endif /* CONFIG_PCI_IOV */
 444
 445 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 446 {
 447         struct ixgbe_adapter *adapter = hw->back;
 448
 449         if (ixgbe_removed(hw->hw_addr))
 450                 return;
 451         pci_write_config_word(adapter->pdev, reg, value);
 452 }
 453
 454 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 455 {
 456         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 457
 458         /* flush memory to make sure state is correct before next watchdog */
 459         smp_mb__before_atomic();
 460         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 461 }
 462
 463 struct ixgbe_reg_info {
 464         u32 ofs;
 465         char *name;
 466 };
 467
 468 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 469
 470         /* General Registers */
 471         {IXGBE_CTRL, "CTRL"},
 472         {IXGBE_STATUS, "STATUS"},
 473         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 474
 475         /* Interrupt Registers */
 476         {IXGBE_EICR, "EICR"},
 477
 478         /* RX Registers */
 479         {IXGBE_SRRCTL(0), "SRRCTL"},
 480         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 481         {IXGBE_RDLEN(0), "RDLEN"},
 482         {IXGBE_RDH(0), "RDH"},
 483         {IXGBE_RDT(0), "RDT"},
 484         {IXGBE_RXDCTL(0), "RXDCTL"},
 485         {IXGBE_RDBAL(0), "RDBAL"},
 486         {IXGBE_RDBAH(0), "RDBAH"},
 487
 488         /* TX Registers */
 489         {IXGBE_TDBAL(0), "TDBAL"},
 490         {IXGBE_TDBAH(0), "TDBAH"},
 491         {IXGBE_TDLEN(0), "TDLEN"},
 492         {IXGBE_TDH(0), "TDH"},
 493         {IXGBE_TDT(0), "TDT"},
 494         {IXGBE_TXDCTL(0), "TXDCTL"},
 495
 496         /* List Terminator */
 497         { .name = NULL }
 498 };
 499
 500
 501 /*
 502  * ixgbe_regdump - register printout routine
 503  */
 504 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 505 {
 506         int i = 0, j = 0;
 507         char rname[16];
 508         u32 regs[64];
 509
 510         switch (reginfo->ofs) {
 511         case IXGBE_SRRCTL(0):
 512                 for (i = 0; i < 64; i++)
 513                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 514                 break;
 515         case IXGBE_DCA_RXCTRL(0):
 516                 for (i = 0; i < 64; i++)
 517                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 518                 break;
 519         case IXGBE_RDLEN(0):
 520                 for (i = 0; i < 64; i++)
 521                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 522                 break;
 523         case IXGBE_RDH(0):
 524                 for (i = 0; i < 64; i++)
 525                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 526                 break;
 527         case IXGBE_RDT(0):
 528                 for (i = 0; i < 64; i++)
 529                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 530                 break;
 531         case IXGBE_RXDCTL(0):
 532                 for (i = 0; i < 64; i++)
 533                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 534                 break;
 535         case IXGBE_RDBAL(0):
 536                 for (i = 0; i < 64; i++)
 537                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 538                 break;
 539         case IXGBE_RDBAH(0):
 540                 for (i = 0; i < 64; i++)
 541                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 542                 break;
 543         case IXGBE_TDBAL(0):
 544                 for (i = 0; i < 64; i++)
 545                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 546                 break;
 547         case IXGBE_TDBAH(0):
 548                 for (i = 0; i < 64; i++)
 549                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 550                 break;
 551         case IXGBE_TDLEN(0):
 552                 for (i = 0; i < 64; i++)
 553                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 554                 break;
 555         case IXGBE_TDH(0):
 556                 for (i = 0; i < 64; i++)
 557                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 558                 break;
 559         case IXGBE_TDT(0):
 560                 for (i = 0; i < 64; i++)
 561                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 562                 break;
 563         case IXGBE_TXDCTL(0):
 564                 for (i = 0; i < 64; i++)
 565                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 566                 break;
 567         default:
 568                 pr_info("%-15s %08x\n", reginfo->name,
 569                         IXGBE_READ_REG(hw, reginfo->ofs));
 570                 return;
 571         }
 572
 573         for (i = 0; i < 8; i++) {
 574                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
 575                 pr_err("%-15s", rname);
 576                 for (j = 0; j < 8; j++)
 577                         pr_cont(" %08x", regs[i*8+j]);
 578                 pr_cont("\n");
 579         }
 580
 581 }
 582
 583 /*
 584  * ixgbe_dump - Print registers, tx-rings and rx-rings
 585  */
 586 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 587 {
 588         struct net_device *netdev = adapter->netdev;
 589         struct ixgbe_hw *hw = &adapter->hw;
 590         struct ixgbe_reg_info *reginfo;
 591         int n = 0;
 592         struct ixgbe_ring *tx_ring;
 593         struct ixgbe_tx_buffer *tx_buffer;
 594         union ixgbe_adv_tx_desc *tx_desc;
 595         struct my_u0 { u64 a; u64 b; } *u0;
 596         struct ixgbe_ring *rx_ring;
 597         union ixgbe_adv_rx_desc *rx_desc;
 598         struct ixgbe_rx_buffer *rx_buffer_info;
 599         u32 staterr;
 600         int i = 0;
 601
 602         if (!netif_msg_hw(adapter))
 603                 return;
 604
 605         /* Print netdevice Info */
 606         if (netdev) {
 607                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 608                 pr_info("Device Name     state            "
 609                         "trans_start      last_rx\n");
 610                 pr_info("%-15s %016lX %016lX %016lX\n",
 611                         netdev->name,
 612                         netdev->state,
 613                         dev_trans_start(netdev),
 614                         netdev->last_rx);
 615         }
 616
 617         /* Print Registers */
 618         dev_info(&adapter->pdev->dev, "Register Dump\n");
 619         pr_info(" Register Name   Value\n");
 620         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 621              reginfo->name; reginfo++) {
 622                 ixgbe_regdump(hw, reginfo);
 623         }
 624
 625         /* Print TX Ring Summary */
 626         if (!netdev || !netif_running(netdev))
 627                 return;
 628
 629         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 630         pr_info(" %s     %s              %s        %s\n",
 631                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 632                 "leng", "ntw", "timestamp");
 633         for (n = 0; n < adapter->num_tx_queues; n++) {
 634                 tx_ring = adapter->tx_ring[n];
 635                 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 636                 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 637                            n, tx_ring->next_to_use, tx_ring->next_to_clean,
 638                            (u64)dma_unmap_addr(tx_buffer, dma),
 639                            dma_unmap_len(tx_buffer, len),
 640                            tx_buffer->next_to_watch,
 641                            (u64)tx_buffer->time_stamp);
 642         }
 643
 644         /* Print TX Rings */
 645         if (!netif_msg_tx_done(adapter))
 646                 goto rx_ring_summary;
 647
 648         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 649
 650         /* Transmit Descriptor Formats
 651          *
 652          * 82598 Advanced Transmit Descriptor
 653          *   +--------------------------------------------------------------+
 654          * 0 |         Buffer Address [63:0]                                |
 655          *   +--------------------------------------------------------------+
 656          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 657          *   +--------------------------------------------------------------+
 658          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 659          *
 660          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 661          *   +--------------------------------------------------------------+
 662          * 0 |                          RSV [63:0]                          |
 663          *   +--------------------------------------------------------------+
 664          * 8 |            RSV           |  STA  |          NXTSEQ           |
 665          *   +--------------------------------------------------------------+
 666          *   63                       36 35   32 31                         0
 667          *
 668          * 82599+ Advanced Transmit Descriptor
 669          *   +--------------------------------------------------------------+
 670          * 0 |         Buffer Address [63:0]                                |
 671          *   +--------------------------------------------------------------+
 672          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 673          *   +--------------------------------------------------------------+
 674          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 675          *
 676          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 677          *   +--------------------------------------------------------------+
 678          * 0 |                          RSV [63:0]                          |
 679          *   +--------------------------------------------------------------+
 680          * 8 |            RSV           |  STA  |           RSV             |
 681          *   +--------------------------------------------------------------+
 682          *   63                       36 35   32 31                         0
 683          */
 684
 685         for (n = 0; n < adapter->num_tx_queues; n++) {
 686                 tx_ring = adapter->tx_ring[n];
 687                 pr_info("------------------------------------\n");
 688                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 689                 pr_info("------------------------------------\n");
 690                 pr_info("%s%s    %s              %s        %s          %s\n",
 691                         "T [desc]     [address 63:0  ] ",
 692                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 693                         "leng", "ntw", "timestamp", "bi->skb");
 694
 695                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 696                         tx_desc = IXGBE_TX_DESC(tx_ring, i);
 697                         tx_buffer = &tx_ring->tx_buffer_info[i];
 698                         u0 = (struct my_u0 *)tx_desc;
 699                         if (dma_unmap_len(tx_buffer, len) > 0) {
 700                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p",
 701                                         i,
 702                                         le64_to_cpu(u0->a),
 703                                         le64_to_cpu(u0->b),
 704                                         (u64)dma_unmap_addr(tx_buffer, dma),
 705                                         dma_unmap_len(tx_buffer, len),
 706                                         tx_buffer->next_to_watch,
 707                                         (u64)tx_buffer->time_stamp,
 708                                         tx_buffer->skb);
 709                                 if (i == tx_ring->next_to_use &&
 710                                         i == tx_ring->next_to_clean)
 711                                         pr_cont(" NTC/U\n");
 712                                 else if (i == tx_ring->next_to_use)
 713                                         pr_cont(" NTU\n");
 714                                 else if (i == tx_ring->next_to_clean)
 715                                         pr_cont(" NTC\n");
 716                                 else
 717                                         pr_cont("\n");
 718
 719                                 if (netif_msg_pktdata(adapter) &&
 720                                     tx_buffer->skb)
 721                                         print_hex_dump(KERN_INFO, "",
 722                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 723                                                 tx_buffer->skb->data,
 724                                                 dma_unmap_len(tx_buffer, len),
 725                                                 true);
 726                         }
 727                 }
 728         }
 729
 730         /* Print RX Rings Summary */
 731 rx_ring_summary:
 732         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 733         pr_info("Queue [NTU] [NTC]\n");
 734         for (n = 0; n < adapter->num_rx_queues; n++) {
 735                 rx_ring = adapter->rx_ring[n];
 736                 pr_info("%5d %5X %5X\n",
 737                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 738         }
 739
 740         /* Print RX Rings */
 741         if (!netif_msg_rx_status(adapter))
 742                 return;
 743
 744         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 745
 746         /* Receive Descriptor Formats
 747          *
 748          * 82598 Advanced Receive Descriptor (Read) Format
 749          *    63                                           1        0
 750          *    +-----------------------------------------------------+
 751          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 752          *    +----------------------------------------------+------+
 753          *  8 |       Header Buffer Address [63:1]           |  DD  |
 754          *    +-----------------------------------------------------+
 755          *
 756          *
 757          * 82598 Advanced Receive Descriptor (Write-Back) Format
 758          *
 759          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 760          *   +------------------------------------------------------+
 761          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 762          *   | Packet   | IP     |   |          |     | Type | Type |
 763          *   | Checksum | Ident  |   |          |     |      |      |
 764          *   +------------------------------------------------------+
 765          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 766          *   +------------------------------------------------------+
 767          *   63       48 47    32 31            20 19               0
 768          *
 769          * 82599+ Advanced Receive Descriptor (Read) Format
 770          *    63                                           1        0
 771          *    +-----------------------------------------------------+
 772          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 773          *    +----------------------------------------------+------+
 774          *  8 |       Header Buffer Address [63:1]           |  DD  |
 775          *    +-----------------------------------------------------+
 776          *
 777          *
 778          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 779          *
 780          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 781          *   +------------------------------------------------------+
 782          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 783          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 784          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 785          *   +------------------------------------------------------+
 786          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 787          *   +------------------------------------------------------+
 788          *   63       48 47    32 31          20 19                 0
 789          */
 790
 791         for (n = 0; n < adapter->num_rx_queues; n++) {
 792                 rx_ring = adapter->rx_ring[n];
 793                 pr_info("------------------------------------\n");
 794                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 795                 pr_info("------------------------------------\n");
 796                 pr_info("%s%s%s",
 797                         "R  [desc]      [ PktBuf     A0] ",
 798                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 799                         "<-- Adv Rx Read format\n");
 800                 pr_info("%s%s%s",
 801                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 802                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 803                         "<-- Adv Rx Write-Back format\n");
 804
 805                 for (i = 0; i < rx_ring->count; i++) {
 806                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 807                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 808                         u0 = (struct my_u0 *)rx_desc;
 809                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 810                         if (staterr & IXGBE_RXD_STAT_DD) {
 811                                 /* Descriptor Done */
 812                                 pr_info("RWB[0x%03X]     %016llX "
 813                                         "%016llX ---------------- %p", i,
 814                                         le64_to_cpu(u0->a),
 815                                         le64_to_cpu(u0->b),
 816                                         rx_buffer_info->skb);
 817                         } else {
 818                                 pr_info("R  [0x%03X]     %016llX "
 819                                         "%016llX %016llX %p", i,
 820                                         le64_to_cpu(u0->a),
 821                                         le64_to_cpu(u0->b),
 822                                         (u64)rx_buffer_info->dma,
 823                                         rx_buffer_info->skb);
 824
 825                                 if (netif_msg_pktdata(adapter) &&
 826                                     rx_buffer_info->dma) {
 827                                         print_hex_dump(KERN_INFO, "",
 828                                            DUMP_PREFIX_ADDRESS, 16, 1,
 829                                            page_address(rx_buffer_info->page) +
 830                                                     rx_buffer_info->page_offset,
 831                                            ixgbe_rx_bufsz(rx_ring), true);
 832                                 }
 833                         }
 834
 835                         if (i == rx_ring->next_to_use)
 836                                 pr_cont(" NTU\n");
 837                         else if (i == rx_ring->next_to_clean)
 838                                 pr_cont(" NTC\n");
 839                         else
 840                                 pr_cont("\n");
 841
 842                 }
 843         }
 844 }
 845
 846 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 847 {
 848         u32 ctrl_ext;
 849
 850         /* Let firmware take over control of h/w */
 851         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 852         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 853                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 854 }
 855
 856 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 857 {
 858         u32 ctrl_ext;
 859
 860         /* Let firmware know the driver has taken over */
 861         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 862         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 863                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 864 }
 865
 866 /**
 867  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 868  * @adapter: pointer to adapter struct
 869  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 870  * @queue: queue to map the corresponding interrupt to
 871  * @msix_vector: the vector to map to the corresponding queue
 872  *
 873  */
 874 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 875                            u8 queue, u8 msix_vector)
 876 {
 877         u32 ivar, index;
 878         struct ixgbe_hw *hw = &adapter->hw;
 879         switch (hw->mac.type) {
 880         case ixgbe_mac_82598EB:
 881                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 882                 if (direction == -1)
 883                         direction = 0;
 884                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 885                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 886                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 887                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 888                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 889                 break;
 890         case ixgbe_mac_82599EB:
 891         case ixgbe_mac_X540:
 892         case ixgbe_mac_X550:
 893         case ixgbe_mac_X550EM_x:
 894         case ixgbe_mac_x550em_a:
 895                 if (direction == -1) {
 896                         /* other causes */
 897                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 898                         index = ((queue & 1) * 8);
 899                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 900                         ivar &= ~(0xFF << index);
 901                         ivar |= (msix_vector << index);
 902                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 903                         break;
 904                 } else {
 905                         /* tx or rx causes */
 906                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 907                         index = ((16 * (queue & 1)) + (8 * direction));
 908                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 909                         ivar &= ~(0xFF << index);
 910                         ivar |= (msix_vector << index);
 911                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 912                         break;
 913                 }
 914         default:
 915                 break;
 916         }
 917 }
 918
 919 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 920                                           u64 qmask)
 921 {
 922         u32 mask;
 923
 924         switch (adapter->hw.mac.type) {
 925         case ixgbe_mac_82598EB:
 926                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 927                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 928                 break;
 929         case ixgbe_mac_82599EB:
 930         case ixgbe_mac_X540:
 931         case ixgbe_mac_X550:
 932         case ixgbe_mac_X550EM_x:
 933         case ixgbe_mac_x550em_a:
 934                 mask = (qmask & 0xFFFFFFFF);
 935                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 936                 mask = (qmask >> 32);
 937                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 938                 break;
 939         default:
 940                 break;
 941         }
 942 }
 943
 944 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
 945                                       struct ixgbe_tx_buffer *tx_buffer)
 946 {
 947         if (tx_buffer->skb) {
 948                 dev_kfree_skb_any(tx_buffer->skb);
 949                 if (dma_unmap_len(tx_buffer, len))
 950                         dma_unmap_single(ring->dev,
 951                                          dma_unmap_addr(tx_buffer, dma),
 952                                          dma_unmap_len(tx_buffer, len),
 953                                          DMA_TO_DEVICE);
 954         } else if (dma_unmap_len(tx_buffer, len)) {
 955                 dma_unmap_page(ring->dev,
 956                                dma_unmap_addr(tx_buffer, dma),
 957                                dma_unmap_len(tx_buffer, len),
 958                                DMA_TO_DEVICE);
 959         }
 960         tx_buffer->next_to_watch = NULL;
 961         tx_buffer->skb = NULL;
 962         dma_unmap_len_set(tx_buffer, len, 0);
 963         /* tx_buffer must be completely set up in the transmit path */
 964 }
 965
 966 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 967 {
 968         struct ixgbe_hw *hw = &adapter->hw;
 969         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 970         int i;
 971         u32 data;
 972
 973         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 974             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 975                 return;
 976
 977         switch (hw->mac.type) {
 978         case ixgbe_mac_82598EB:
 979                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 980                 break;
 981         default:
 982                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 983         }
 984         hwstats->lxoffrxc += data;
 985
 986         /* refill credits (no tx hang) if we received xoff */
 987         if (!data)
 988                 return;
 989
 990         for (i = 0; i < adapter->num_tx_queues; i++)
 991                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 992                           &adapter->tx_ring[i]->state);
 993 }
 994
 995 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 996 {
 997         struct ixgbe_hw *hw = &adapter->hw;
 998         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 999         u32 xoff[8] = {0};
1000         u8 tc;
1001         int i;
1002         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1003
1004         if (adapter->ixgbe_ieee_pfc)
1005                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1006
1007         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1008                 ixgbe_update_xoff_rx_lfc(adapter);
1009                 return;
1010         }
1011
1012         /* update stats for each tc, only valid with PFC enabled */
1013         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1014                 u32 pxoffrxc;
1015
1016                 switch (hw->mac.type) {
1017                 case ixgbe_mac_82598EB:
1018                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1019                         break;
1020                 default:
1021                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1022                 }
1023                 hwstats->pxoffrxc[i] += pxoffrxc;
1024                 /* Get the TC for given UP */
1025                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1026                 xoff[tc] += pxoffrxc;
1027         }
1028
1029         /* disarm tx queues that have received xoff frames */
1030         for (i = 0; i < adapter->num_tx_queues; i++) {
1031                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1032
1033                 tc = tx_ring->dcb_tc;
1034                 if (xoff[tc])
1035                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1036         }
1037 }
1038
1039 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1040 {
1041         return ring->stats.packets;
1042 }
1043
1044 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1045 {
1046         struct ixgbe_adapter *adapter;
1047         struct ixgbe_hw *hw;
1048         u32 head, tail;
1049
1050         if (ring->l2_accel_priv)
1051                 adapter = ring->l2_accel_priv->real_adapter;
1052         else
1053                 adapter = netdev_priv(ring->netdev);
1054
1055         hw = &adapter->hw;
1056         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1057         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1058
1059         if (head != tail)
1060                 return (head < tail) ?
1061                         tail - head : (tail + ring->count - head);
1062
1063         return 0;
1064 }
1065
1066 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1067 {
1068         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1069         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1070         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1071
1072         clear_check_for_tx_hang(tx_ring);
1073
1074         /*
1075          * Check for a hung queue, but be thorough. This verifies
1076          * that a transmit has been completed since the previous
1077          * check AND there is at least one packet pending. The
1078          * ARMED bit is set to indicate a potential hang. The
1079          * bit is cleared if a pause frame is received to remove
1080          * false hang detection due to PFC or 802.3x frames. By
1081          * requiring this to fail twice we avoid races with
1082          * pfc clearing the ARMED bit and conditions where we
1083          * run the check_tx_hang logic with a transmit completion
1084          * pending but without time to complete it yet.
1085          */
1086         if (tx_done_old == tx_done && tx_pending)
1087                 /* make sure it is true for two checks in a row */
1088                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1089                                         &tx_ring->state);
1090         /* update completed stats and continue */
1091         tx_ring->tx_stats.tx_done_old = tx_done;
1092         /* reset the countdown */
1093         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1094
1095         return false;
1096 }
1097
1098 /**
1099  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1100  * @adapter: driver private struct
1101  **/
1102 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1103 {
1104
1105         /* Do the reset outside of interrupt context */
1106         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1107                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1108                 e_warn(drv, "initiating reset due to tx timeout\n");
1109                 ixgbe_service_event_schedule(adapter);
1110         }
1111 }
1112
1113 /**
1114  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1115  **/
1116 static int ixgbe_tx_maxrate(struct net_device *netdev,
1117                             int queue_index, u32 maxrate)
1118 {
1119         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1120         struct ixgbe_hw *hw = &adapter->hw;
1121         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1122
1123         if (!maxrate)
1124                 return 0;
1125
1126         /* Calculate the rate factor values to set */
1127         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1128         bcnrc_val /= maxrate;
1129
1130         /* clear everything but the rate factor */
1131         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1132         IXGBE_RTTBCNRC_RF_DEC_MASK;
1133
1134         /* enable the rate scheduler */
1135         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1136
1137         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1138         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1139
1140         return 0;
1141 }
1142
1143 /**
1144  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1145  * @q_vector: structure containing interrupt and ring information
1146  * @tx_ring: tx ring to clean
1147  * @napi_budget: Used to determine if we are in netpoll
1148  **/
1149 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1150                                struct ixgbe_ring *tx_ring, int napi_budget)
1151 {
1152         struct ixgbe_adapter *adapter = q_vector->adapter;
1153         struct ixgbe_tx_buffer *tx_buffer;
1154         union ixgbe_adv_tx_desc *tx_desc;
1155         unsigned int total_bytes = 0, total_packets = 0;
1156         unsigned int budget = q_vector->tx.work_limit;
1157         unsigned int i = tx_ring->next_to_clean;
1158
1159         if (test_bit(__IXGBE_DOWN, &adapter->state))
1160                 return true;
1161
1162         tx_buffer = &tx_ring->tx_buffer_info[i];
1163         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1164         i -= tx_ring->count;
1165
1166         do {
1167                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1168
1169                 /* if next_to_watch is not set then there is no work pending */
1170                 if (!eop_desc)
1171                         break;
1172
1173                 /* prevent any other reads prior to eop_desc */
1174                 smp_rmb();
1175
1176                 /* if DD is not set pending work has not been completed */
1177                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1178                         break;
1179
1180                 /* clear next_to_watch to prevent false hangs */
1181                 tx_buffer->next_to_watch = NULL;
1182
1183                 /* update the statistics for this packet */
1184                 total_bytes += tx_buffer->bytecount;
1185                 total_packets += tx_buffer->gso_segs;
1186
1187                 /* free the skb */
1188                 napi_consume_skb(tx_buffer->skb, napi_budget);
1189
1190                 /* unmap skb header data */
1191                 dma_unmap_single(tx_ring->dev,
1192                                  dma_unmap_addr(tx_buffer, dma),
1193                                  dma_unmap_len(tx_buffer, len),
1194                                  DMA_TO_DEVICE);
1195
1196                 /* clear tx_buffer data */
1197                 tx_buffer->skb = NULL;
1198                 dma_unmap_len_set(tx_buffer, len, 0);
1199
1200                 /* unmap remaining buffers */
1201                 while (tx_desc != eop_desc) {
1202                         tx_buffer++;
1203                         tx_desc++;
1204                         i++;
1205                         if (unlikely(!i)) {
1206                                 i -= tx_ring->count;
1207                                 tx_buffer = tx_ring->tx_buffer_info;
1208                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1209                         }
1210
1211                         /* unmap any remaining paged data */
1212                         if (dma_unmap_len(tx_buffer, len)) {
1213                                 dma_unmap_page(tx_ring->dev,
1214                                                dma_unmap_addr(tx_buffer, dma),
1215                                                dma_unmap_len(tx_buffer, len),
1216                                                DMA_TO_DEVICE);
1217                                 dma_unmap_len_set(tx_buffer, len, 0);
1218                         }
1219                 }
1220
1221                 /* move us one more past the eop_desc for start of next pkt */
1222                 tx_buffer++;
1223                 tx_desc++;
1224                 i++;
1225                 if (unlikely(!i)) {
1226                         i -= tx_ring->count;
1227                         tx_buffer = tx_ring->tx_buffer_info;
1228                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1229                 }
1230
1231                 /* issue prefetch for next Tx descriptor */
1232                 prefetch(tx_desc);
1233
1234                 /* update budget accounting */
1235                 budget--;
1236         } while (likely(budget));
1237
1238         i += tx_ring->count;
1239         tx_ring->next_to_clean = i;
1240         u64_stats_update_begin(&tx_ring->syncp);
1241         tx_ring->stats.bytes += total_bytes;
1242         tx_ring->stats.packets += total_packets;
1243         u64_stats_update_end(&tx_ring->syncp);
1244         q_vector->tx.total_bytes += total_bytes;
1245         q_vector->tx.total_packets += total_packets;
1246
1247         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1248                 /* schedule immediate reset if we believe we hung */
1249                 struct ixgbe_hw *hw = &adapter->hw;
1250                 e_err(drv, "Detected Tx Unit Hang\n"
1251                         "  Tx Queue             <%d>\n"
1252                         "  TDH, TDT             <%x>, <%x>\n"
1253                         "  next_to_use          <%x>\n"
1254                         "  next_to_clean        <%x>\n"
1255                         "tx_buffer_info[next_to_clean]\n"
1256                         "  time_stamp           <%lx>\n"
1257                         "  jiffies              <%lx>\n",
1258                         tx_ring->queue_index,
1259                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1260                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1261                         tx_ring->next_to_use, i,
1262                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1263
1264                 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1265
1266                 e_info(probe,
1267                        "tx hang %d detected on queue %d, resetting adapter\n",
1268                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1269
1270                 /* schedule immediate reset if we believe we hung */
1271                 ixgbe_tx_timeout_reset(adapter);
1272
1273                 /* the adapter is about to reset, no point in enabling stuff */
1274                 return true;
1275         }
1276
1277         netdev_tx_completed_queue(txring_txq(tx_ring),
1278                                   total_packets, total_bytes);
1279
1280 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1281         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1282                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1283                 /* Make sure that anybody stopping the queue after this
1284                  * sees the new next_to_clean.
1285                  */
1286                 smp_mb();
1287                 if (__netif_subqueue_stopped(tx_ring->netdev,
1288                                              tx_ring->queue_index)
1289                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1290                         netif_wake_subqueue(tx_ring->netdev,
1291                                             tx_ring->queue_index);
1292                         ++tx_ring->tx_stats.restart_queue;
1293                 }
1294         }
1295
1296         return !!budget;
1297 }
1298
1299 #ifdef CONFIG_IXGBE_DCA
1300 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1301                                 struct ixgbe_ring *tx_ring,
1302                                 int cpu)
1303 {
1304         struct ixgbe_hw *hw = &adapter->hw;
1305         u32 txctrl = 0;
1306         u16 reg_offset;
1307
1308         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1309                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1310
1311         switch (hw->mac.type) {
1312         case ixgbe_mac_82598EB:
1313                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1314                 break;
1315         case ixgbe_mac_82599EB:
1316         case ixgbe_mac_X540:
1317                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1318                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1319                 break;
1320         default:
1321                 /* for unknown hardware do not write register */
1322                 return;
1323         }
1324
1325         /*
1326          * We can enable relaxed ordering for reads, but not writes when
1327          * DCA is enabled.  This is due to a known issue in some chipsets
1328          * which will cause the DCA tag to be cleared.
1329          */
1330         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1331                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1332                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1333
1334         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1335 }
1336
1337 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1338                                 struct ixgbe_ring *rx_ring,
1339                                 int cpu)
1340 {
1341         struct ixgbe_hw *hw = &adapter->hw;
1342         u32 rxctrl = 0;
1343         u8 reg_idx = rx_ring->reg_idx;
1344
1345         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1346                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1347
1348         switch (hw->mac.type) {
1349         case ixgbe_mac_82599EB:
1350         case ixgbe_mac_X540:
1351                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1352                 break;
1353         default:
1354                 break;
1355         }
1356
1357         /*
1358          * We can enable relaxed ordering for reads, but not writes when
1359          * DCA is enabled.  This is due to a known issue in some chipsets
1360          * which will cause the DCA tag to be cleared.
1361          */
1362         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1363                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1364                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1365
1366         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1367 }
1368
1369 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1370 {
1371         struct ixgbe_adapter *adapter = q_vector->adapter;
1372         struct ixgbe_ring *ring;
1373         int cpu = get_cpu();
1374
1375         if (q_vector->cpu == cpu)
1376                 goto out_no_update;
1377
1378         ixgbe_for_each_ring(ring, q_vector->tx)
1379                 ixgbe_update_tx_dca(adapter, ring, cpu);
1380
1381         ixgbe_for_each_ring(ring, q_vector->rx)
1382                 ixgbe_update_rx_dca(adapter, ring, cpu);
1383
1384         q_vector->cpu = cpu;
1385 out_no_update:
1386         put_cpu();
1387 }
1388
1389 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1390 {
1391         int i;
1392
1393         /* always use CB2 mode, difference is masked in the CB driver */
1394         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1395                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1396                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1397         else
1398                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1399                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1400
1401         for (i = 0; i < adapter->num_q_vectors; i++) {
1402                 adapter->q_vector[i]->cpu = -1;
1403                 ixgbe_update_dca(adapter->q_vector[i]);
1404         }
1405 }
1406
1407 static int __ixgbe_notify_dca(struct device *dev, void *data)
1408 {
1409         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1410         unsigned long event = *(unsigned long *)data;
1411
1412         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1413                 return 0;
1414
1415         switch (event) {
1416         case DCA_PROVIDER_ADD:
1417                 /* if we're already enabled, don't do it again */
1418                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1419                         break;
1420                 if (dca_add_requester(dev) == 0) {
1421                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1422                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1423                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1424                         break;
1425                 }
1426                 /* Fall Through since DCA is disabled. */
1427         case DCA_PROVIDER_REMOVE:
1428                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1429                         dca_remove_requester(dev);
1430                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1431                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1432                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1433                 }
1434                 break;
1435         }
1436
1437         return 0;
1438 }
1439
1440 #endif /* CONFIG_IXGBE_DCA */
1441
1442 #define IXGBE_RSS_L4_TYPES_MASK \
1443         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1444          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1445          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1446          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1447
1448 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1449                                  union ixgbe_adv_rx_desc *rx_desc,
1450                                  struct sk_buff *skb)
1451 {
1452         u16 rss_type;
1453
1454         if (!(ring->netdev->features & NETIF_F_RXHASH))
1455                 return;
1456
1457         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1458                    IXGBE_RXDADV_RSSTYPE_MASK;
1459
1460         if (!rss_type)
1461                 return;
1462
1463         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1464                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1465                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1466 }
1467
1468 #ifdef IXGBE_FCOE
1469 /**
1470  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1471  * @ring: structure containing ring specific data
1472  * @rx_desc: advanced rx descriptor
1473  *
1474  * Returns : true if it is FCoE pkt
1475  */
1476 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1477                                     union ixgbe_adv_rx_desc *rx_desc)
1478 {
1479         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1480
1481         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1482                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1483                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1484                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1485 }
1486
1487 #endif /* IXGBE_FCOE */
1488 /**
1489  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1490  * @ring: structure containing ring specific data
1491  * @rx_desc: current Rx descriptor being processed
1492  * @skb: skb currently being received and modified
1493  **/
1494 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1495                                      union ixgbe_adv_rx_desc *rx_desc,
1496                                      struct sk_buff *skb)
1497 {
1498         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1499         bool encap_pkt = false;
1500
1501         skb_checksum_none_assert(skb);
1502
1503         /* Rx csum disabled */
1504         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1505                 return;
1506
1507         /* check for VXLAN and Geneve packets */
1508         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1509                 encap_pkt = true;
1510                 skb->encapsulation = 1;
1511         }
1512
1513         /* if IP and error */
1514         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1515             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1516                 ring->rx_stats.csum_err++;
1517                 return;
1518         }
1519
1520         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1521                 return;
1522
1523         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1524                 /*
1525                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1526                  * checksum errors.
1527                  */
1528                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1529                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1530                         return;
1531
1532                 ring->rx_stats.csum_err++;
1533                 return;
1534         }
1535
1536         /* It must be a TCP or UDP packet with a valid checksum */
1537         skb->ip_summed = CHECKSUM_UNNECESSARY;
1538         if (encap_pkt) {
1539                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1540                         return;
1541
1542                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1543                         skb->ip_summed = CHECKSUM_NONE;
1544                         return;
1545                 }
1546                 /* If we checked the outer header let the stack know */
1547                 skb->csum_level = 1;
1548         }
1549 }
1550
1551 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1552                                     struct ixgbe_rx_buffer *bi)
1553 {
1554         struct page *page = bi->page;
1555         dma_addr_t dma;
1556
1557         /* since we are recycling buffers we should seldom need to alloc */
1558         if (likely(page))
1559                 return true;
1560
1561         /* alloc new page for storage */
1562         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1563         if (unlikely(!page)) {
1564                 rx_ring->rx_stats.alloc_rx_page_failed++;
1565                 return false;
1566         }
1567
1568         /* map page for use */
1569         dma = dma_map_page(rx_ring->dev, page, 0,
1570                            ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1571
1572         /*
1573          * if mapping failed free memory back to system since
1574          * there isn't much point in holding memory we can't use
1575          */
1576         if (dma_mapping_error(rx_ring->dev, dma)) {
1577                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1578
1579                 rx_ring->rx_stats.alloc_rx_page_failed++;
1580                 return false;
1581         }
1582
1583         bi->dma = dma;
1584         bi->page = page;
1585         bi->page_offset = 0;
1586
1587         return true;
1588 }
1589
1590 /**
1591  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1592  * @rx_ring: ring to place buffers on
1593  * @cleaned_count: number of buffers to replace
1594  **/
1595 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1596 {
1597         union ixgbe_adv_rx_desc *rx_desc;
1598         struct ixgbe_rx_buffer *bi;
1599         u16 i = rx_ring->next_to_use;
1600
1601         /* nothing to do */
1602         if (!cleaned_count)
1603                 return;
1604
1605         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1606         bi = &rx_ring->rx_buffer_info[i];
1607         i -= rx_ring->count;
1608
1609         do {
1610                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1611                         break;
1612
1613                 /*
1614                  * Refresh the desc even if buffer_addrs didn't change
1615                  * because each write-back erases this info.
1616                  */
1617                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1618
1619                 rx_desc++;
1620                 bi++;
1621                 i++;
1622                 if (unlikely(!i)) {
1623                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1624                         bi = rx_ring->rx_buffer_info;
1625                         i -= rx_ring->count;
1626                 }
1627
1628                 /* clear the status bits for the next_to_use descriptor */
1629                 rx_desc->wb.upper.status_error = 0;
1630
1631                 cleaned_count--;
1632         } while (cleaned_count);
1633
1634         i += rx_ring->count;
1635
1636         if (rx_ring->next_to_use != i) {
1637                 rx_ring->next_to_use = i;
1638
1639                 /* update next to alloc since we have filled the ring */
1640                 rx_ring->next_to_alloc = i;
1641
1642                 /* Force memory writes to complete before letting h/w
1643                  * know there are new descriptors to fetch.  (Only
1644                  * applicable for weak-ordered memory model archs,
1645                  * such as IA-64).
1646                  */
1647                 wmb();
1648                 writel(i, rx_ring->tail);
1649         }
1650 }
1651
1652 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1653                                    struct sk_buff *skb)
1654 {
1655         u16 hdr_len = skb_headlen(skb);
1656
1657         /* set gso_size to avoid messing up TCP MSS */
1658         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1659                                                  IXGBE_CB(skb)->append_cnt);
1660         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1661 }
1662
1663 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1664                                    struct sk_buff *skb)
1665 {
1666         /* if append_cnt is 0 then frame is not RSC */
1667         if (!IXGBE_CB(skb)->append_cnt)
1668                 return;
1669
1670         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1671         rx_ring->rx_stats.rsc_flush++;
1672
1673         ixgbe_set_rsc_gso_size(rx_ring, skb);
1674
1675         /* gso_size is computed using append_cnt so always clear it last */
1676         IXGBE_CB(skb)->append_cnt = 0;
1677 }
1678
1679 /**
1680  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1681  * @rx_ring: rx descriptor ring packet is being transacted on
1682  * @rx_desc: pointer to the EOP Rx descriptor
1683  * @skb: pointer to current skb being populated
1684  *
1685  * This function checks the ring, descriptor, and packet information in
1686  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1687  * other fields within the skb.
1688  **/
1689 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1690                                      union ixgbe_adv_rx_desc *rx_desc,
1691                                      struct sk_buff *skb)
1692 {
1693         struct net_device *dev = rx_ring->netdev;
1694         u32 flags = rx_ring->q_vector->adapter->flags;
1695
1696         ixgbe_update_rsc_stats(rx_ring, skb);
1697
1698         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1699
1700         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1701
1702         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1703                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1704
1705         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1706             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1707                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1708                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1709         }
1710
1711         skb_record_rx_queue(skb, rx_ring->queue_index);
1712
1713         skb->protocol = eth_type_trans(skb, dev);
1714 }
1715
1716 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1717                          struct sk_buff *skb)
1718 {
1719         skb_mark_napi_id(skb, &q_vector->napi);
1720         if (ixgbe_qv_busy_polling(q_vector))
1721                 netif_receive_skb(skb);
1722         else
1723                 napi_gro_receive(&q_vector->napi, skb);
1724 }
1725
1726 /**
1727  * ixgbe_is_non_eop - process handling of non-EOP buffers
1728  * @rx_ring: Rx ring being processed
1729  * @rx_desc: Rx descriptor for current buffer
1730  * @skb: Current socket buffer containing buffer in progress
1731  *
1732  * This function updates next to clean.  If the buffer is an EOP buffer
1733  * this function exits returning false, otherwise it will place the
1734  * sk_buff in the next buffer to be chained and return true indicating
1735  * that this is in fact a non-EOP buffer.
1736  **/
1737 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1738                              union ixgbe_adv_rx_desc *rx_desc,
1739                              struct sk_buff *skb)
1740 {
1741         u32 ntc = rx_ring->next_to_clean + 1;
1742
1743         /* fetch, update, and store next to clean */
1744         ntc = (ntc < rx_ring->count) ? ntc : 0;
1745         rx_ring->next_to_clean = ntc;
1746
1747         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1748
1749         /* update RSC append count if present */
1750         if (ring_is_rsc_enabled(rx_ring)) {
1751                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1752                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1753
1754                 if (unlikely(rsc_enabled)) {
1755                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1756
1757                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1758                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1759
1760                         /* update ntc based on RSC value */
1761                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1762                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1763                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1764                 }
1765         }
1766
1767         /* if we are the last buffer then there is nothing else to do */
1768         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1769                 return false;
1770
1771         /* place skb in next buffer to be received */
1772         rx_ring->rx_buffer_info[ntc].skb = skb;
1773         rx_ring->rx_stats.non_eop_descs++;
1774
1775         return true;
1776 }
1777
1778 /**
1779  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1780  * @rx_ring: rx descriptor ring packet is being transacted on
1781  * @skb: pointer to current skb being adjusted
1782  *
1783  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1784  * main difference between this version and the original function is that
1785  * this function can make several assumptions about the state of things
1786  * that allow for significant optimizations versus the standard function.
1787  * As a result we can do things like drop a frag and maintain an accurate
1788  * truesize for the skb.
1789  */
1790 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1791                             struct sk_buff *skb)
1792 {
1793         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1794         unsigned char *va;
1795         unsigned int pull_len;
1796
1797         /*
1798          * it is valid to use page_address instead of kmap since we are
1799          * working with pages allocated out of the lomem pool per
1800          * alloc_page(GFP_ATOMIC)
1801          */
1802         va = skb_frag_address(frag);
1803
1804         /*
1805          * we need the header to contain the greater of either ETH_HLEN or
1806          * 60 bytes if the skb->len is less than 60 for skb_pad.
1807          */
1808         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1809
1810         /* align pull length to size of long to optimize memcpy performance */
1811         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1812
1813         /* update all of the pointers */
1814         skb_frag_size_sub(frag, pull_len);
1815         frag->page_offset += pull_len;
1816         skb->data_len -= pull_len;
1817         skb->tail += pull_len;
1818 }
1819
1820 /**
1821  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1822  * @rx_ring: rx descriptor ring packet is being transacted on
1823  * @skb: pointer to current skb being updated
1824  *
1825  * This function provides a basic DMA sync up for the first fragment of an
1826  * skb.  The reason for doing this is that the first fragment cannot be
1827  * unmapped until we have reached the end of packet descriptor for a buffer
1828  * chain.
1829  */
1830 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1831                                 struct sk_buff *skb)
1832 {
1833         /* if the page was released unmap it, else just sync our portion */
1834         if (unlikely(IXGBE_CB(skb)->page_released)) {
1835                 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1836                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1837                 IXGBE_CB(skb)->page_released = false;
1838         } else {
1839                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1840
1841                 dma_sync_single_range_for_cpu(rx_ring->dev,
1842                                               IXGBE_CB(skb)->dma,
1843                                               frag->page_offset,
1844                                               ixgbe_rx_bufsz(rx_ring),
1845                                               DMA_FROM_DEVICE);
1846         }
1847         IXGBE_CB(skb)->dma = 0;
1848 }
1849
1850 /**
1851  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1852  * @rx_ring: rx descriptor ring packet is being transacted on
1853  * @rx_desc: pointer to the EOP Rx descriptor
1854  * @skb: pointer to current skb being fixed
1855  *
1856  * Check for corrupted packet headers caused by senders on the local L2
1857  * embedded NIC switch not setting up their Tx Descriptors right.  These
1858  * should be very rare.
1859  *
1860  * Also address the case where we are pulling data in on pages only
1861  * and as such no data is present in the skb header.
1862  *
1863  * In addition if skb is not at least 60 bytes we need to pad it so that
1864  * it is large enough to qualify as a valid Ethernet frame.
1865  *
1866  * Returns true if an error was encountered and skb was freed.
1867  **/
1868 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1869                                   union ixgbe_adv_rx_desc *rx_desc,
1870                                   struct sk_buff *skb)
1871 {
1872         struct net_device *netdev = rx_ring->netdev;
1873
1874         /* verify that the packet does not have any known errors */
1875         if (unlikely(ixgbe_test_staterr(rx_desc,
1876                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1877             !(netdev->features & NETIF_F_RXALL))) {
1878                 dev_kfree_skb_any(skb);
1879                 return true;
1880         }
1881
1882         /* place header in linear portion of buffer */
1883         if (skb_is_nonlinear(skb))
1884                 ixgbe_pull_tail(rx_ring, skb);
1885
1886 #ifdef IXGBE_FCOE
1887         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1888         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1889                 return false;
1890
1891 #endif
1892         /* if eth_skb_pad returns an error the skb was freed */
1893         if (eth_skb_pad(skb))
1894                 return true;
1895
1896         return false;
1897 }
1898
1899 /**
1900  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1901  * @rx_ring: rx descriptor ring to store buffers on
1902  * @old_buff: donor buffer to have page reused
1903  *
1904  * Synchronizes page for reuse by the adapter
1905  **/
1906 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1907                                 struct ixgbe_rx_buffer *old_buff)
1908 {
1909         struct ixgbe_rx_buffer *new_buff;
1910         u16 nta = rx_ring->next_to_alloc;
1911
1912         new_buff = &rx_ring->rx_buffer_info[nta];
1913
1914         /* update, and store next to alloc */
1915         nta++;
1916         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1917
1918         /* transfer page from old buffer to new buffer */
1919         *new_buff = *old_buff;
1920
1921         /* sync the buffer for use by the device */
1922         dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1923                                          new_buff->page_offset,
1924                                          ixgbe_rx_bufsz(rx_ring),
1925                                          DMA_FROM_DEVICE);
1926 }
1927
1928 static inline bool ixgbe_page_is_reserved(struct page *page)
1929 {
1930         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1931 }
1932
1933 /**
1934  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1935  * @rx_ring: rx descriptor ring to transact packets on
1936  * @rx_buffer: buffer containing page to add
1937  * @rx_desc: descriptor containing length of buffer written by hardware
1938  * @skb: sk_buff to place the data into
1939  *
1940  * This function will add the data contained in rx_buffer->page to the skb.
1941  * This is done either through a direct copy if the data in the buffer is
1942  * less than the skb header size, otherwise it will just attach the page as
1943  * a frag to the skb.
1944  *
1945  * The function will then update the page offset if necessary and return
1946  * true if the buffer can be reused by the adapter.
1947  **/
1948 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1949                               struct ixgbe_rx_buffer *rx_buffer,
1950                               union ixgbe_adv_rx_desc *rx_desc,
1951                               struct sk_buff *skb)
1952 {
1953         struct page *page = rx_buffer->page;
1954         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1955 #if (PAGE_SIZE < 8192)
1956         unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1957 #else
1958         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1959         unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1960                                    ixgbe_rx_bufsz(rx_ring);
1961 #endif
1962
1963         if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1964                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1965
1966                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1967
1968                 /* page is not reserved, we can reuse buffer as-is */
1969                 if (likely(!ixgbe_page_is_reserved(page)))
1970                         return true;
1971
1972                 /* this page cannot be reused so discard it */
1973                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1974                 return false;
1975         }
1976
1977         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1978                         rx_buffer->page_offset, size, truesize);
1979
1980         /* avoid re-using remote pages */
1981         if (unlikely(ixgbe_page_is_reserved(page)))
1982                 return false;
1983
1984 #if (PAGE_SIZE < 8192)
1985         /* if we are only owner of page we can reuse it */
1986         if (unlikely(page_count(page) != 1))
1987                 return false;
1988
1989         /* flip page offset to other buffer */
1990         rx_buffer->page_offset ^= truesize;
1991 #else
1992         /* move offset up to the next cache line */
1993         rx_buffer->page_offset += truesize;
1994
1995         if (rx_buffer->page_offset > last_offset)
1996                 return false;
1997 #endif
1998
1999         /* Even if we own the page, we are not allowed to use atomic_set()
2000          * This would break get_page_unless_zero() users.
2001          */
2002         page_ref_inc(page);
2003
2004         return true;
2005 }
2006
2007 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
2008                                              union ixgbe_adv_rx_desc *rx_desc)
2009 {
2010         struct ixgbe_rx_buffer *rx_buffer;
2011         struct sk_buff *skb;
2012         struct page *page;
2013
2014         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2015         page = rx_buffer->page;
2016         prefetchw(page);
2017
2018         skb = rx_buffer->skb;
2019
2020         if (likely(!skb)) {
2021                 void *page_addr = page_address(page) +
2022                                   rx_buffer->page_offset;
2023
2024                 /* prefetch first cache line of first page */
2025                 prefetch(page_addr);
2026 #if L1_CACHE_BYTES < 128
2027                 prefetch(page_addr + L1_CACHE_BYTES);
2028 #endif
2029
2030                 /* allocate a skb to store the frags */
2031                 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
2032                                      IXGBE_RX_HDR_SIZE);
2033                 if (unlikely(!skb)) {
2034                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2035                         return NULL;
2036                 }
2037
2038                 /*
2039                  * we will be copying header into skb->data in
2040                  * pskb_may_pull so it is in our interest to prefetch
2041                  * it now to avoid a possible cache miss
2042                  */
2043                 prefetchw(skb->data);
2044
2045                 /*
2046                  * Delay unmapping of the first packet. It carries the
2047                  * header information, HW may still access the header
2048                  * after the writeback.  Only unmap it when EOP is
2049                  * reached
2050                  */
2051                 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
2052                         goto dma_sync;
2053
2054                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2055         } else {
2056                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2057                         ixgbe_dma_sync_frag(rx_ring, skb);
2058
2059 dma_sync:
2060                 /* we are reusing so sync this buffer for CPU use */
2061                 dma_sync_single_range_for_cpu(rx_ring->dev,
2062                                               rx_buffer->dma,
2063                                               rx_buffer->page_offset,
2064                                               ixgbe_rx_bufsz(rx_ring),
2065                                               DMA_FROM_DEVICE);
2066
2067                 rx_buffer->skb = NULL;
2068         }
2069
2070         /* pull page into skb */
2071         if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2072                 /* hand second half of page back to the ring */
2073                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2074         } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2075                 /* the page has been released from the ring */
2076                 IXGBE_CB(skb)->page_released = true;
2077         } else {
2078                 /* we are not reusing the buffer so unmap it */
2079                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2080                                ixgbe_rx_pg_size(rx_ring),
2081                                DMA_FROM_DEVICE);
2082         }
2083
2084         /* clear contents of buffer_info */
2085         rx_buffer->page = NULL;
2086
2087         return skb;
2088 }
2089
2090 /**
2091  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2092  * @q_vector: structure containing interrupt and ring information
2093  * @rx_ring: rx descriptor ring to transact packets on
2094  * @budget: Total limit on number of packets to process
2095  *
2096  * This function provides a "bounce buffer" approach to Rx interrupt
2097  * processing.  The advantage to this is that on systems that have
2098  * expensive overhead for IOMMU access this provides a means of avoiding
2099  * it by maintaining the mapping of the page to the syste.
2100  *
2101  * Returns amount of work completed
2102  **/
2103 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2104                                struct ixgbe_ring *rx_ring,
2105                                const int budget)
2106 {
2107         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2108 #ifdef IXGBE_FCOE
2109         struct ixgbe_adapter *adapter = q_vector->adapter;
2110         int ddp_bytes;
2111         unsigned int mss = 0;
2112 #endif /* IXGBE_FCOE */
2113         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2114
2115         while (likely(total_rx_packets < budget)) {
2116                 union ixgbe_adv_rx_desc *rx_desc;
2117                 struct sk_buff *skb;
2118
2119                 /* return some buffers to hardware, one at a time is too slow */
2120                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2121                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2122                         cleaned_count = 0;
2123                 }
2124
2125                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2126
2127                 if (!rx_desc->wb.upper.status_error)
2128                         break;
2129
2130                 /* This memory barrier is needed to keep us from reading
2131                  * any other fields out of the rx_desc until we know the
2132                  * descriptor has been written back
2133                  */
2134                 dma_rmb();
2135
2136                 /* retrieve a buffer from the ring */
2137                 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2138
2139                 /* exit if we failed to retrieve a buffer */
2140                 if (!skb)
2141                         break;
2142
2143                 cleaned_count++;
2144
2145                 /* place incomplete frames back on ring for completion */
2146                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2147                         continue;
2148
2149                 /* verify the packet layout is correct */
2150                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2151                         continue;
2152
2153                 /* probably a little skewed due to removing CRC */
2154                 total_rx_bytes += skb->len;
2155
2156                 /* populate checksum, timestamp, VLAN, and protocol */
2157                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2158
2159 #ifdef IXGBE_FCOE
2160                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2161                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2162                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2163                         /* include DDPed FCoE data */
2164                         if (ddp_bytes > 0) {
2165                                 if (!mss) {
2166                                         mss = rx_ring->netdev->mtu -
2167                                                 sizeof(struct fcoe_hdr) -
2168                                                 sizeof(struct fc_frame_header) -
2169                                                 sizeof(struct fcoe_crc_eof);
2170                                         if (mss > 512)
2171                                                 mss &= ~511;
2172                                 }
2173                                 total_rx_bytes += ddp_bytes;
2174                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2175                                                                  mss);
2176                         }
2177                         if (!ddp_bytes) {
2178                                 dev_kfree_skb_any(skb);
2179                                 continue;
2180                         }
2181                 }
2182
2183 #endif /* IXGBE_FCOE */
2184                 ixgbe_rx_skb(q_vector, skb);
2185
2186                 /* update budget accounting */
2187                 total_rx_packets++;
2188         }
2189
2190         u64_stats_update_begin(&rx_ring->syncp);
2191         rx_ring->stats.packets += total_rx_packets;
2192         rx_ring->stats.bytes += total_rx_bytes;
2193         u64_stats_update_end(&rx_ring->syncp);
2194         q_vector->rx.total_packets += total_rx_packets;
2195         q_vector->rx.total_bytes += total_rx_bytes;
2196
2197         return total_rx_packets;
2198 }
2199
2200 #ifdef CONFIG_NET_RX_BUSY_POLL
2201 /* must be called with local_bh_disable()d */
2202 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2203 {
2204         struct ixgbe_q_vector *q_vector =
2205                         container_of(napi, struct ixgbe_q_vector, napi);
2206         struct ixgbe_adapter *adapter = q_vector->adapter;
2207         struct ixgbe_ring  *ring;
2208         int found = 0;
2209
2210         if (test_bit(__IXGBE_DOWN, &adapter->state))
2211                 return LL_FLUSH_FAILED;
2212
2213         if (!ixgbe_qv_lock_poll(q_vector))
2214                 return LL_FLUSH_BUSY;
2215
2216         ixgbe_for_each_ring(ring, q_vector->rx) {
2217                 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2218 #ifdef BP_EXTENDED_STATS
2219                 if (found)
2220                         ring->stats.cleaned += found;
2221                 else
2222                         ring->stats.misses++;
2223 #endif
2224                 if (found)
2225                         break;
2226         }
2227
2228         ixgbe_qv_unlock_poll(q_vector);
2229
2230         return found;
2231 }
2232 #endif  /* CONFIG_NET_RX_BUSY_POLL */
2233
2234 /**
2235  * ixgbe_configure_msix - Configure MSI-X hardware
2236  * @adapter: board private structure
2237  *
2238  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2239  * interrupts.
2240  **/
2241 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2242 {
2243         struct ixgbe_q_vector *q_vector;
2244         int v_idx;
2245         u32 mask;
2246
2247         /* Populate MSIX to EITR Select */
2248         if (adapter->num_vfs > 32) {
2249                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2250                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2251         }
2252
2253         /*
2254          * Populate the IVAR table and set the ITR values to the
2255          * corresponding register.
2256          */
2257         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2258                 struct ixgbe_ring *ring;
2259                 q_vector = adapter->q_vector[v_idx];
2260
2261                 ixgbe_for_each_ring(ring, q_vector->rx)
2262                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2263
2264                 ixgbe_for_each_ring(ring, q_vector->tx)
2265                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2266
2267                 ixgbe_write_eitr(q_vector);
2268         }
2269
2270         switch (adapter->hw.mac.type) {
2271         case ixgbe_mac_82598EB:
2272                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2273                                v_idx);
2274                 break;
2275         case ixgbe_mac_82599EB:
2276         case ixgbe_mac_X540:
2277         case ixgbe_mac_X550:
2278         case ixgbe_mac_X550EM_x:
2279         case ixgbe_mac_x550em_a:
2280                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2281                 break;
2282         default:
2283                 break;
2284         }
2285         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2286
2287         /* set up to autoclear timer, and the vectors */
2288         mask = IXGBE_EIMS_ENABLE_MASK;
2289         mask &= ~(IXGBE_EIMS_OTHER |
2290                   IXGBE_EIMS_MAILBOX |
2291                   IXGBE_EIMS_LSC);
2292
2293         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2294 }
2295
2296 enum latency_range {
2297         lowest_latency = 0,
2298         low_latency = 1,
2299         bulk_latency = 2,
2300         latency_invalid = 255
2301 };
2302
2303 /**
2304  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2305  * @q_vector: structure containing interrupt and ring information
2306  * @ring_container: structure containing ring performance data
2307  *
2308  *      Stores a new ITR value based on packets and byte
2309  *      counts during the last interrupt.  The advantage of per interrupt
2310  *      computation is faster updates and more accurate ITR for the current
2311  *      traffic pattern.  Constants in this function were computed
2312  *      based on theoretical maximum wire speed and thresholds were set based
2313  *      on testing data as well as attempting to minimize response time
2314  *      while increasing bulk throughput.
2315  *      this functionality is controlled by the InterruptThrottleRate module
2316  *      parameter (see ixgbe_param.c)
2317  **/
2318 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2319                              struct ixgbe_ring_container *ring_container)
2320 {
2321         int bytes = ring_container->total_bytes;
2322         int packets = ring_container->total_packets;
2323         u32 timepassed_us;
2324         u64 bytes_perint;
2325         u8 itr_setting = ring_container->itr;
2326
2327         if (packets == 0)
2328                 return;
2329
2330         /* simple throttlerate management
2331          *   0-10MB/s   lowest (100000 ints/s)
2332          *  10-20MB/s   low    (20000 ints/s)
2333          *  20-1249MB/s bulk   (12000 ints/s)
2334          */
2335         /* what was last interrupt timeslice? */
2336         timepassed_us = q_vector->itr >> 2;
2337         if (timepassed_us == 0)
2338                 return;
2339
2340         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2341
2342         switch (itr_setting) {
2343         case lowest_latency:
2344                 if (bytes_perint > 10)
2345                         itr_setting = low_latency;
2346                 break;
2347         case low_latency:
2348                 if (bytes_perint > 20)
2349                         itr_setting = bulk_latency;
2350                 else if (bytes_perint <= 10)
2351                         itr_setting = lowest_latency;
2352                 break;
2353         case bulk_latency:
2354                 if (bytes_perint <= 20)
2355                         itr_setting = low_latency;
2356                 break;
2357         }
2358
2359         /* clear work counters since we have the values we need */
2360         ring_container->total_bytes = 0;
2361         ring_container->total_packets = 0;
2362
2363         /* write updated itr to ring container */
2364         ring_container->itr = itr_setting;
2365 }
2366
2367 /**
2368  * ixgbe_write_eitr - write EITR register in hardware specific way
2369  * @q_vector: structure containing interrupt and ring information
2370  *
2371  * This function is made to be called by ethtool and by the driver
2372  * when it needs to update EITR registers at runtime.  Hardware
2373  * specific quirks/differences are taken care of here.
2374  */
2375 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2376 {
2377         struct ixgbe_adapter *adapter = q_vector->adapter;
2378         struct ixgbe_hw *hw = &adapter->hw;
2379         int v_idx = q_vector->v_idx;
2380         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2381
2382         switch (adapter->hw.mac.type) {
2383         case ixgbe_mac_82598EB:
2384                 /* must write high and low 16 bits to reset counter */
2385                 itr_reg |= (itr_reg << 16);
2386                 break;
2387         case ixgbe_mac_82599EB:
2388         case ixgbe_mac_X540:
2389         case ixgbe_mac_X550:
2390         case ixgbe_mac_X550EM_x:
2391         case ixgbe_mac_x550em_a:
2392                 /*
2393                  * set the WDIS bit to not clear the timer bits and cause an
2394                  * immediate assertion of the interrupt
2395                  */
2396                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2397                 break;
2398         default:
2399                 break;
2400         }
2401         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2402 }
2403
2404 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2405 {
2406         u32 new_itr = q_vector->itr;
2407         u8 current_itr;
2408
2409         ixgbe_update_itr(q_vector, &q_vector->tx);
2410         ixgbe_update_itr(q_vector, &q_vector->rx);
2411
2412         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2413
2414         switch (current_itr) {
2415         /* counts and packets in update_itr are dependent on these numbers */
2416         case lowest_latency:
2417                 new_itr = IXGBE_100K_ITR;
2418                 break;
2419         case low_latency:
2420                 new_itr = IXGBE_20K_ITR;
2421                 break;
2422         case bulk_latency:
2423                 new_itr = IXGBE_12K_ITR;
2424                 break;
2425         default:
2426                 break;
2427         }
2428
2429         if (new_itr != q_vector->itr) {
2430                 /* do an exponential smoothing */
2431                 new_itr = (10 * new_itr * q_vector->itr) /
2432                           ((9 * new_itr) + q_vector->itr);
2433
2434                 /* save the algorithm value here */
2435                 q_vector->itr = new_itr;
2436
2437                 ixgbe_write_eitr(q_vector);
2438         }
2439 }
2440
2441 /**
2442  * ixgbe_check_overtemp_subtask - check for over temperature
2443  * @adapter: pointer to adapter
2444  **/
2445 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2446 {
2447         struct ixgbe_hw *hw = &adapter->hw;
2448         u32 eicr = adapter->interrupt_event;
2449
2450         if (test_bit(__IXGBE_DOWN, &adapter->state))
2451                 return;
2452
2453         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2454             !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2455                 return;
2456
2457         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2458
2459         switch (hw->device_id) {
2460         case IXGBE_DEV_ID_82599_T3_LOM:
2461                 /*
2462                  * Since the warning interrupt is for both ports
2463                  * we don't have to check if:
2464                  *  - This interrupt wasn't for our port.
2465                  *  - We may have missed the interrupt so always have to
2466                  *    check if we  got a LSC
2467                  */
2468                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2469                     !(eicr & IXGBE_EICR_LSC))
2470                         return;
2471
2472                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2473                         u32 speed;
2474                         bool link_up = false;
2475
2476                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2477
2478                         if (link_up)
2479                                 return;
2480                 }
2481
2482                 /* Check if this is not due to overtemp */
2483                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2484                         return;
2485
2486                 break;
2487         default:
2488                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2489                         return;
2490                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2491                         return;
2492                 break;
2493         }
2494         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2495
2496         adapter->interrupt_event = 0;
2497 }
2498
2499 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2500 {
2501         struct ixgbe_hw *hw = &adapter->hw;
2502
2503         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2504             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2505                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2506                 /* write to clear the interrupt */
2507                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2508         }
2509 }
2510
2511 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2512 {
2513         struct ixgbe_hw *hw = &adapter->hw;
2514
2515         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2516                 return;
2517
2518         switch (adapter->hw.mac.type) {
2519         case ixgbe_mac_82599EB:
2520                 /*
2521                  * Need to check link state so complete overtemp check
2522                  * on service task
2523                  */
2524                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2525                      (eicr & IXGBE_EICR_LSC)) &&
2526                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2527                         adapter->interrupt_event = eicr;
2528                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2529                         ixgbe_service_event_schedule(adapter);
2530                         return;
2531                 }
2532                 return;
2533         case ixgbe_mac_X540:
2534                 if (!(eicr & IXGBE_EICR_TS))
2535                         return;
2536                 break;
2537         default:
2538                 return;
2539         }
2540
2541         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2542 }
2543
2544 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2545 {
2546         switch (hw->mac.type) {
2547         case ixgbe_mac_82598EB:
2548                 if (hw->phy.type == ixgbe_phy_nl)
2549                         return true;
2550                 return false;
2551         case ixgbe_mac_82599EB:
2552         case ixgbe_mac_X550EM_x:
2553         case ixgbe_mac_x550em_a:
2554                 switch (hw->mac.ops.get_media_type(hw)) {
2555                 case ixgbe_media_type_fiber:
2556                 case ixgbe_media_type_fiber_qsfp:
2557                         return true;
2558                 default:
2559                         return false;
2560                 }
2561         default:
2562                 return false;
2563         }
2564 }
2565
2566 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2567 {
2568         struct ixgbe_hw *hw = &adapter->hw;
2569         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2570
2571         if (!ixgbe_is_sfp(hw))
2572                 return;
2573
2574         /* Later MAC's use different SDP */
2575         if (hw->mac.type >= ixgbe_mac_X540)
2576                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2577
2578         if (eicr & eicr_mask) {
2579                 /* Clear the interrupt */
2580                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2581                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2582                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2583                         adapter->sfp_poll_time = 0;
2584                         ixgbe_service_event_schedule(adapter);
2585                 }
2586         }
2587
2588         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2589             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2590                 /* Clear the interrupt */
2591                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2592                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2593                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2594                         ixgbe_service_event_schedule(adapter);
2595                 }
2596         }
2597 }
2598
2599 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2600 {
2601         struct ixgbe_hw *hw = &adapter->hw;
2602
2603         adapter->lsc_int++;
2604         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2605         adapter->link_check_timeout = jiffies;
2606         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2607                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2608                 IXGBE_WRITE_FLUSH(hw);
2609                 ixgbe_service_event_schedule(adapter);
2610         }
2611 }
2612
2613 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2614                                            u64 qmask)
2615 {
2616         u32 mask;
2617         struct ixgbe_hw *hw = &adapter->hw;
2618
2619         switch (hw->mac.type) {
2620         case ixgbe_mac_82598EB:
2621                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2622                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2623                 break;
2624         case ixgbe_mac_82599EB:
2625         case ixgbe_mac_X540:
2626         case ixgbe_mac_X550:
2627         case ixgbe_mac_X550EM_x:
2628         case ixgbe_mac_x550em_a:
2629                 mask = (qmask & 0xFFFFFFFF);
2630                 if (mask)
2631                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2632                 mask = (qmask >> 32);
2633                 if (mask)
2634                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2635                 break;
2636         default:
2637                 break;
2638         }
2639         /* skip the flush */
2640 }
2641
2642 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2643                                             u64 qmask)
2644 {
2645         u32 mask;
2646         struct ixgbe_hw *hw = &adapter->hw;
2647
2648         switch (hw->mac.type) {
2649         case ixgbe_mac_82598EB:
2650                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2651                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2652                 break;
2653         case ixgbe_mac_82599EB:
2654         case ixgbe_mac_X540:
2655         case ixgbe_mac_X550:
2656         case ixgbe_mac_X550EM_x:
2657         case ixgbe_mac_x550em_a:
2658                 mask = (qmask & 0xFFFFFFFF);
2659                 if (mask)
2660                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2661                 mask = (qmask >> 32);
2662                 if (mask)
2663                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2664                 break;
2665         default:
2666                 break;
2667         }
2668         /* skip the flush */
2669 }
2670
2671 /**
2672  * ixgbe_irq_enable - Enable default interrupt generation settings
2673  * @adapter: board private structure
2674  **/
2675 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2676                                     bool flush)
2677 {
2678         struct ixgbe_hw *hw = &adapter->hw;
2679         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2680
2681         /* don't reenable LSC while waiting for link */
2682         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2683                 mask &= ~IXGBE_EIMS_LSC;
2684
2685         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2686                 switch (adapter->hw.mac.type) {
2687                 case ixgbe_mac_82599EB:
2688                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2689                         break;
2690                 case ixgbe_mac_X540:
2691                 case ixgbe_mac_X550:
2692                 case ixgbe_mac_X550EM_x:
2693                 case ixgbe_mac_x550em_a:
2694                         mask |= IXGBE_EIMS_TS;
2695                         break;
2696                 default:
2697                         break;
2698                 }
2699         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2700                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2701         switch (adapter->hw.mac.type) {
2702         case ixgbe_mac_82599EB:
2703                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2704                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2705                 /* fall through */
2706         case ixgbe_mac_X540:
2707         case ixgbe_mac_X550:
2708         case ixgbe_mac_X550EM_x:
2709         case ixgbe_mac_x550em_a:
2710                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
2711                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
2712                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
2713                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2714                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2715                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2716                 mask |= IXGBE_EIMS_ECC;
2717                 mask |= IXGBE_EIMS_MAILBOX;
2718                 break;
2719         default:
2720                 break;
2721         }
2722
2723         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2724             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2725                 mask |= IXGBE_EIMS_FLOW_DIR;
2726
2727         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2728         if (queues)
2729                 ixgbe_irq_enable_queues(adapter, ~0);
2730         if (flush)
2731                 IXGBE_WRITE_FLUSH(&adapter->hw);
2732 }
2733
2734 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2735 {
2736         struct ixgbe_adapter *adapter = data;
2737         struct ixgbe_hw *hw = &adapter->hw;
2738         u32 eicr;
2739
2740         /*
2741          * Workaround for Silicon errata.  Use clear-by-write instead
2742          * of clear-by-read.  Reading with EICS will return the
2743          * interrupt causes without clearing, which later be done
2744          * with the write to EICR.
2745          */
2746         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2747
2748         /* The lower 16bits of the EICR register are for the queue interrupts
2749          * which should be masked here in order to not accidentally clear them if
2750          * the bits are high when ixgbe_msix_other is called. There is a race
2751          * condition otherwise which results in possible performance loss
2752          * especially if the ixgbe_msix_other interrupt is triggering
2753          * consistently (as it would when PPS is turned on for the X540 device)
2754          */
2755         eicr &= 0xFFFF0000;
2756
2757         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2758
2759         if (eicr & IXGBE_EICR_LSC)
2760                 ixgbe_check_lsc(adapter);
2761
2762         if (eicr & IXGBE_EICR_MAILBOX)
2763                 ixgbe_msg_task(adapter);
2764
2765         switch (hw->mac.type) {
2766         case ixgbe_mac_82599EB:
2767         case ixgbe_mac_X540:
2768         case ixgbe_mac_X550:
2769         case ixgbe_mac_X550EM_x:
2770         case ixgbe_mac_x550em_a:
2771                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2772                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2773                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2774                         ixgbe_service_event_schedule(adapter);
2775                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
2776                                         IXGBE_EICR_GPI_SDP0_X540);
2777                 }
2778                 if (eicr & IXGBE_EICR_ECC) {
2779                         e_info(link, "Received ECC Err, initiating reset\n");
2780                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
2781                         ixgbe_service_event_schedule(adapter);
2782                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2783                 }
2784                 /* Handle Flow Director Full threshold interrupt */
2785                 if (eicr & IXGBE_EICR_FLOW_DIR) {
2786                         int reinit_count = 0;
2787                         int i;
2788                         for (i = 0; i < adapter->num_tx_queues; i++) {
2789                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
2790                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2791                                                        &ring->state))
2792                                         reinit_count++;
2793                         }
2794                         if (reinit_count) {
2795                                 /* no more flow director interrupts until after init */
2796                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2797                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2798                                 ixgbe_service_event_schedule(adapter);
2799                         }
2800                 }
2801                 ixgbe_check_sfp_event(adapter, eicr);
2802                 ixgbe_check_overtemp_event(adapter, eicr);
2803                 break;
2804         default:
2805                 break;
2806         }
2807
2808         ixgbe_check_fan_failure(adapter, eicr);
2809
2810         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2811                 ixgbe_ptp_check_pps_event(adapter);
2812
2813         /* re-enable the original interrupt state, no lsc, no queues */
2814         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2815                 ixgbe_irq_enable(adapter, false, false);
2816
2817         return IRQ_HANDLED;
2818 }
2819
2820 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2821 {
2822         struct ixgbe_q_vector *q_vector = data;
2823
2824         /* EIAM disabled interrupts (on this vector) for us */
2825
2826         if (q_vector->rx.ring || q_vector->tx.ring)
2827                 napi_schedule_irqoff(&q_vector->napi);
2828
2829         return IRQ_HANDLED;
2830 }
2831
2832 /**
2833  * ixgbe_poll - NAPI Rx polling callback
2834  * @napi: structure for representing this polling device
2835  * @budget: how many packets driver is allowed to clean
2836  *
2837  * This function is used for legacy and MSI, NAPI mode
2838  **/
2839 int ixgbe_poll(struct napi_struct *napi, int budget)
2840 {
2841         struct ixgbe_q_vector *q_vector =
2842                                 container_of(napi, struct ixgbe_q_vector, napi);
2843         struct ixgbe_adapter *adapter = q_vector->adapter;
2844         struct ixgbe_ring *ring;
2845         int per_ring_budget, work_done = 0;
2846         bool clean_complete = true;
2847
2848 #ifdef CONFIG_IXGBE_DCA
2849         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2850                 ixgbe_update_dca(q_vector);
2851 #endif
2852
2853         ixgbe_for_each_ring(ring, q_vector->tx) {
2854                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
2855                         clean_complete = false;
2856         }
2857
2858         /* Exit if we are called by netpoll or busy polling is active */
2859         if ((budget <= 0) || !ixgbe_qv_lock_napi(q_vector))
2860                 return budget;
2861
2862         /* attempt to distribute budget to each queue fairly, but don't allow
2863          * the budget to go below 1 because we'll exit polling */
2864         if (q_vector->rx.count > 1)
2865                 per_ring_budget = max(budget/q_vector->rx.count, 1);
2866         else
2867                 per_ring_budget = budget;
2868
2869         ixgbe_for_each_ring(ring, q_vector->rx) {
2870                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
2871                                                  per_ring_budget);
2872
2873                 work_done += cleaned;
2874                 if (cleaned >= per_ring_budget)
2875                         clean_complete = false;
2876         }
2877
2878         ixgbe_qv_unlock_napi(q_vector);
2879         /* If all work not completed, return budget and keep polling */
2880         if (!clean_complete)
2881                 return budget;
2882
2883         /* all work done, exit the polling mode */
2884         napi_complete_done(napi, work_done);
2885         if (adapter->rx_itr_setting & 1)
2886                 ixgbe_set_itr(q_vector);
2887         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2888                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
2889
2890         return min(work_done, budget - 1);
2891 }
2892
2893 /**
2894  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2895  * @adapter: board private structure
2896  *
2897  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2898  * interrupts from the kernel.
2899  **/
2900 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2901 {
2902         struct net_device *netdev = adapter->netdev;
2903         int vector, err;
2904         int ri = 0, ti = 0;
2905
2906         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2907                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2908                 struct msix_entry *entry = &adapter->msix_entries[vector];
2909
2910                 if (q_vector->tx.ring && q_vector->rx.ring) {
2911                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2912                                  "%s-%s-%d", netdev->name, "TxRx", ri++);
2913                         ti++;
2914                 } else if (q_vector->rx.ring) {
2915                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2916                                  "%s-%s-%d", netdev->name, "rx", ri++);
2917                 } else if (q_vector->tx.ring) {
2918                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2919                                  "%s-%s-%d", netdev->name, "tx", ti++);
2920                 } else {
2921                         /* skip this unused q_vector */
2922                         continue;
2923                 }
2924                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2925                                   q_vector->name, q_vector);
2926                 if (err) {
2927                         e_err(probe, "request_irq failed for MSIX interrupt "
2928                               "Error: %d\n", err);
2929                         goto free_queue_irqs;
2930                 }
2931                 /* If Flow Director is enabled, set interrupt affinity */
2932                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2933                         /* assign the mask for this irq */
2934                         irq_set_affinity_hint(entry->vector,
2935                                               &q_vector->affinity_mask);
2936                 }
2937         }
2938
2939         err = request_irq(adapter->msix_entries[vector].vector,
2940                           ixgbe_msix_other, 0, netdev->name, adapter);
2941         if (err) {
2942                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2943                 goto free_queue_irqs;
2944         }
2945
2946         return 0;
2947
2948 free_queue_irqs:
2949         while (vector) {
2950                 vector--;
2951                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2952                                       NULL);
2953                 free_irq(adapter->msix_entries[vector].vector,
2954                          adapter->q_vector[vector]);
2955         }
2956         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2957         pci_disable_msix(adapter->pdev);
2958         kfree(adapter->msix_entries);
2959         adapter->msix_entries = NULL;
2960         return err;
2961 }
2962
2963 /**
2964  * ixgbe_intr - legacy mode Interrupt Handler
2965  * @irq: interrupt number
2966  * @data: pointer to a network interface device structure
2967  **/
2968 static irqreturn_t ixgbe_intr(int irq, void *data)
2969 {
2970         struct ixgbe_adapter *adapter = data;
2971         struct ixgbe_hw *hw = &adapter->hw;
2972         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2973         u32 eicr;
2974
2975         /*
2976          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
2977          * before the read of EICR.
2978          */
2979         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2980
2981         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2982          * therefore no explicit interrupt disable is necessary */
2983         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2984         if (!eicr) {
2985                 /*
2986                  * shared interrupt alert!
2987                  * make sure interrupts are enabled because the read will
2988                  * have disabled interrupts due to EIAM
2989                  * finish the workaround of silicon errata on 82598.  Unmask
2990                  * the interrupt that we masked before the EICR read.
2991                  */
2992                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2993                         ixgbe_irq_enable(adapter, true, true);
2994                 return IRQ_NONE;        /* Not our interrupt */
2995         }
2996
2997         if (eicr & IXGBE_EICR_LSC)
2998                 ixgbe_check_lsc(adapter);
2999
3000         switch (hw->mac.type) {
3001         case ixgbe_mac_82599EB:
3002                 ixgbe_check_sfp_event(adapter, eicr);
3003                 /* Fall through */
3004         case ixgbe_mac_X540:
3005         case ixgbe_mac_X550:
3006         case ixgbe_mac_X550EM_x:
3007         case ixgbe_mac_x550em_a:
3008                 if (eicr & IXGBE_EICR_ECC) {
3009                         e_info(link, "Received ECC Err, initiating reset\n");
3010                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3011                         ixgbe_service_event_schedule(adapter);
3012                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3013                 }
3014                 ixgbe_check_overtemp_event(adapter, eicr);
3015                 break;
3016         default:
3017                 break;
3018         }
3019
3020         ixgbe_check_fan_failure(adapter, eicr);
3021         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3022                 ixgbe_ptp_check_pps_event(adapter);
3023
3024         /* would disable interrupts here but EIAM disabled it */
3025         napi_schedule_irqoff(&q_vector->napi);
3026
3027         /*
3028          * re-enable link(maybe) and non-queue interrupts, no flush.
3029          * ixgbe_poll will re-enable the queue interrupts
3030          */
3031         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3032                 ixgbe_irq_enable(adapter, false, false);
3033
3034         return IRQ_HANDLED;
3035 }
3036
3037 /**
3038  * ixgbe_request_irq - initialize interrupts
3039  * @adapter: board private structure
3040  *
3041  * Attempts to configure interrupts using the best available
3042  * capabilities of the hardware and kernel.
3043  **/
3044 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3045 {
3046         struct net_device *netdev = adapter->netdev;
3047         int err;
3048
3049         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3050                 err = ixgbe_request_msix_irqs(adapter);
3051         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3052                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3053                                   netdev->name, adapter);
3054         else
3055                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3056                                   netdev->name, adapter);
3057
3058         if (err)
3059                 e_err(probe, "request_irq failed, Error %d\n", err);
3060
3061         return err;
3062 }
3063
3064 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3065 {
3066         int vector;
3067
3068         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3069                 free_irq(adapter->pdev->irq, adapter);
3070                 return;
3071         }
3072
3073         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3074                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3075                 struct msix_entry *entry = &adapter->msix_entries[vector];
3076
3077                 /* free only the irqs that were actually requested */
3078                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3079                         continue;
3080
3081                 /* clear the affinity_mask in the IRQ descriptor */
3082                 irq_set_affinity_hint(entry->vector, NULL);
3083
3084                 free_irq(entry->vector, q_vector);
3085         }
3086
3087         free_irq(adapter->msix_entries[vector].vector, adapter);
3088 }
3089
3090 /**
3091  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3092  * @adapter: board private structure
3093  **/
3094 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3095 {
3096         switch (adapter->hw.mac.type) {
3097         case ixgbe_mac_82598EB:
3098                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3099                 break;
3100         case ixgbe_mac_82599EB:
3101         case ixgbe_mac_X540:
3102         case ixgbe_mac_X550:
3103         case ixgbe_mac_X550EM_x:
3104         case ixgbe_mac_x550em_a:
3105                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3106                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3107                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3108                 break;
3109         default:
3110                 break;
3111         }
3112         IXGBE_WRITE_FLUSH(&adapter->hw);
3113         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3114                 int vector;
3115
3116                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3117                         synchronize_irq(adapter->msix_entries[vector].vector);
3118
3119                 synchronize_irq(adapter->msix_entries[vector++].vector);
3120         } else {
3121                 synchronize_irq(adapter->pdev->irq);
3122         }
3123 }
3124
3125 /**
3126  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3127  *
3128  **/
3129 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3130 {
3131         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3132
3133         ixgbe_write_eitr(q_vector);
3134
3135         ixgbe_set_ivar(adapter, 0, 0, 0);
3136         ixgbe_set_ivar(adapter, 1, 0, 0);
3137
3138         e_info(hw, "Legacy interrupt IVAR setup done\n");
3139 }
3140
3141 /**
3142  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3143  * @adapter: board private structure
3144  * @ring: structure containing ring specific data
3145  *
3146  * Configure the Tx descriptor ring after a reset.
3147  **/
3148 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3149                              struct ixgbe_ring *ring)
3150 {
3151         struct ixgbe_hw *hw = &adapter->hw;
3152         u64 tdba = ring->dma;
3153         int wait_loop = 10;
3154         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3155         u8 reg_idx = ring->reg_idx;
3156
3157         /* disable queue to avoid issues while updating state */
3158         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3159         IXGBE_WRITE_FLUSH(hw);
3160
3161         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3162                         (tdba & DMA_BIT_MASK(32)));
3163         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3164         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3165                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3166         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3167         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3168         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3169
3170         /*
3171          * set WTHRESH to encourage burst writeback, it should not be set
3172          * higher than 1 when:
3173          * - ITR is 0 as it could cause false TX hangs
3174          * - ITR is set to > 100k int/sec and BQL is enabled
3175          *
3176          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3177          * to or less than the number of on chip descriptors, which is
3178          * currently 40.
3179          */
3180         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3181                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3182         else
3183                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3184
3185         /*
3186          * Setting PTHRESH to 32 both improves performance
3187          * and avoids a TX hang with DFP enabled
3188          */
3189         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3190                    32;          /* PTHRESH = 32 */
3191
3192         /* reinitialize flowdirector state */
3193         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3194                 ring->atr_sample_rate = adapter->atr_sample_rate;
3195                 ring->atr_count = 0;
3196                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3197         } else {
3198                 ring->atr_sample_rate = 0;
3199         }
3200
3201         /* initialize XPS */
3202         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3203                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3204
3205                 if (q_vector)
3206                         netif_set_xps_queue(ring->netdev,
3207                                             &q_vector->affinity_mask,
3208                                             ring->queue_index);
3209         }
3210
3211         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3212
3213         /* enable queue */
3214         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3215
3216         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3217         if (hw->mac.type == ixgbe_mac_82598EB &&
3218             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3219                 return;
3220
3221         /* poll to verify queue is enabled */
3222         do {
3223                 usleep_range(1000, 2000);
3224                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3225         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3226         if (!wait_loop)
3227                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3228 }
3229
3230 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3231 {
3232         struct ixgbe_hw *hw = &adapter->hw;
3233         u32 rttdcs, mtqc;
3234         u8 tcs = netdev_get_num_tc(adapter->netdev);
3235
3236         if (hw->mac.type == ixgbe_mac_82598EB)
3237                 return;
3238
3239         /* disable the arbiter while setting MTQC */
3240         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3241         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3242         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3243
3244         /* set transmit pool layout */
3245         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3246                 mtqc = IXGBE_MTQC_VT_ENA;
3247                 if (tcs > 4)
3248                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3249                 else if (tcs > 1)
3250                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3251                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3252                          IXGBE_82599_VMDQ_4Q_MASK)
3253                         mtqc |= IXGBE_MTQC_32VF;
3254                 else
3255                         mtqc |= IXGBE_MTQC_64VF;
3256         } else {
3257                 if (tcs > 4)
3258                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3259                 else if (tcs > 1)
3260                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3261                 else
3262                         mtqc = IXGBE_MTQC_64Q_1PB;
3263         }
3264
3265         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3266
3267         /* Enable Security TX Buffer IFG for multiple pb */
3268         if (tcs) {
3269                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3270                 sectx |= IXGBE_SECTX_DCB;
3271                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3272         }
3273
3274         /* re-enable the arbiter */
3275         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3276         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3277 }
3278
3279 /**
3280  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3281  * @adapter: board private structure
3282  *
3283  * Configure the Tx unit of the MAC after a reset.
3284  **/
3285 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3286 {
3287         struct ixgbe_hw *hw = &adapter->hw;
3288         u32 dmatxctl;
3289         u32 i;
3290
3291         ixgbe_setup_mtqc(adapter);
3292
3293         if (hw->mac.type != ixgbe_mac_82598EB) {
3294                 /* DMATXCTL.EN must be before Tx queues are enabled */
3295                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3296                 dmatxctl |= IXGBE_DMATXCTL_TE;
3297                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3298         }
3299
3300         /* Setup the HW Tx Head and Tail descriptor pointers */
3301         for (i = 0; i < adapter->num_tx_queues; i++)
3302                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3303 }
3304
3305 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3306                                  struct ixgbe_ring *ring)
3307 {
3308         struct ixgbe_hw *hw = &adapter->hw;
3309         u8 reg_idx = ring->reg_idx;
3310         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3311
3312         srrctl |= IXGBE_SRRCTL_DROP_EN;
3313
3314         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3315 }
3316
3317 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3318                                   struct ixgbe_ring *ring)
3319 {
3320         struct ixgbe_hw *hw = &adapter->hw;
3321         u8 reg_idx = ring->reg_idx;
3322         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3323
3324         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3325
3326         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3327 }
3328
3329 #ifdef CONFIG_IXGBE_DCB
3330 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3331 #else
3332 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3333 #endif
3334 {
3335         int i;
3336         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3337
3338         if (adapter->ixgbe_ieee_pfc)
3339                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3340
3341         /*
3342          * We should set the drop enable bit if:
3343          *  SR-IOV is enabled
3344          *   or
3345          *  Number of Rx queues > 1 and flow control is disabled
3346          *
3347          *  This allows us to avoid head of line blocking for security
3348          *  and performance reasons.
3349          */
3350         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3351             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3352                 for (i = 0; i < adapter->num_rx_queues; i++)
3353                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3354         } else {
3355                 for (i = 0; i < adapter->num_rx_queues; i++)
3356                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3357         }
3358 }
3359
3360 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3361
3362 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3363                                    struct ixgbe_ring *rx_ring)
3364 {
3365         struct ixgbe_hw *hw = &adapter->hw;
3366         u32 srrctl;
3367         u8 reg_idx = rx_ring->reg_idx;
3368
3369         if (hw->mac.type == ixgbe_mac_82598EB) {
3370                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3371
3372                 /*
3373                  * if VMDq is not active we must program one srrctl register
3374                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3375                  */
3376                 reg_idx &= mask;
3377         }
3378
3379         /* configure header buffer length, needed for RSC */
3380         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3381
3382         /* configure the packet buffer length */
3383         srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3384
3385         /* configure descriptor type */
3386         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3387
3388         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3389 }
3390
3391 /**
3392  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3393  * @adapter: device handle
3394  *
3395  *  - 82598/82599/X540:     128
3396  *  - X550(non-SRIOV mode): 512
3397  *  - X550(SRIOV mode):     64
3398  */
3399 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3400 {
3401         if (adapter->hw.mac.type < ixgbe_mac_X550)
3402                 return 128;
3403         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3404                 return 64;
3405         else
3406                 return 512;
3407 }
3408
3409 /**
3410  * ixgbe_store_reta - Write the RETA table to HW
3411  * @adapter: device handle
3412  *
3413  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3414  */
3415 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3416 {
3417         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3418         struct ixgbe_hw *hw = &adapter->hw;
3419         u32 reta = 0;
3420         u32 indices_multi;
3421         u8 *indir_tbl = adapter->rss_indir_tbl;
3422
3423         /* Fill out the redirection table as follows:
3424          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3425          *    indices.
3426          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3427          *  - X550:       8 bit wide entries containing 6 bit RSS index
3428          */
3429         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3430                 indices_multi = 0x11;
3431         else
3432                 indices_multi = 0x1;
3433
3434         /* Write redirection table to HW */
3435         for (i = 0; i < reta_entries; i++) {
3436                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3437                 if ((i & 3) == 3) {
3438                         if (i < 128)
3439                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3440                         else
3441                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3442                                                 reta);
3443                         reta = 0;
3444                 }
3445         }
3446 }
3447
3448 /**
3449  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3450  * @adapter: device handle
3451  *
3452  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3453  */
3454 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3455 {
3456         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3457         struct ixgbe_hw *hw = &adapter->hw;
3458         u32 vfreta = 0;
3459         unsigned int pf_pool = adapter->num_vfs;
3460
3461         /* Write redirection table to HW */
3462         for (i = 0; i < reta_entries; i++) {
3463                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3464                 if ((i & 3) == 3) {
3465                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3466                                         vfreta);
3467                         vfreta = 0;
3468                 }
3469         }
3470 }
3471
3472 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3473 {
3474         struct ixgbe_hw *hw = &adapter->hw;
3475         u32 i, j;
3476         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3477         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3478
3479         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3480          * make full use of any rings they may have.  We will use the
3481          * PSRTYPE register to control how many rings we use within the PF.
3482          */
3483         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3484                 rss_i = 4;
3485
3486         /* Fill out hash function seeds */
3487         for (i = 0; i < 10; i++)
3488                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3489
3490         /* Fill out redirection table */
3491         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3492
3493         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3494                 if (j == rss_i)
3495                         j = 0;
3496
3497                 adapter->rss_indir_tbl[i] = j;
3498         }
3499
3500         ixgbe_store_reta(adapter);
3501 }
3502
3503 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3504 {
3505         struct ixgbe_hw *hw = &adapter->hw;
3506         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3507         unsigned int pf_pool = adapter->num_vfs;
3508         int i, j;
3509
3510         /* Fill out hash function seeds */
3511         for (i = 0; i < 10; i++)
3512                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3513                                 adapter->rss_key[i]);
3514
3515         /* Fill out the redirection table */
3516         for (i = 0, j = 0; i < 64; i++, j++) {
3517                 if (j == rss_i)
3518                         j = 0;
3519
3520                 adapter->rss_indir_tbl[i] = j;
3521         }
3522
3523         ixgbe_store_vfreta(adapter);
3524 }
3525
3526 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3527 {
3528         struct ixgbe_hw *hw = &adapter->hw;
3529         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3530         u32 rxcsum;
3531
3532         /* Disable indicating checksum in descriptor, enables RSS hash */
3533         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3534         rxcsum |= IXGBE_RXCSUM_PCSD;
3535         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3536
3537         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3538                 if (adapter->ring_feature[RING_F_RSS].mask)
3539                         mrqc = IXGBE_MRQC_RSSEN;
3540         } else {
3541                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3542
3543                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3544                         if (tcs > 4)
3545                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3546                         else if (tcs > 1)
3547                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3548                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3549                                  IXGBE_82599_VMDQ_4Q_MASK)
3550                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3551                         else
3552                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3553                 } else {
3554                         if (tcs > 4)
3555                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3556                         else if (tcs > 1)
3557                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3558                         else
3559                                 mrqc = IXGBE_MRQC_RSSEN;
3560                 }
3561         }
3562
3563         /* Perform hash on these packet types */
3564         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3565                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3566                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3567                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3568
3569         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3570                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3571         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3572                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3573
3574         netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3575         if ((hw->mac.type >= ixgbe_mac_X550) &&
3576             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3577                 unsigned int pf_pool = adapter->num_vfs;
3578
3579                 /* Enable VF RSS mode */
3580                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3581                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3582
3583                 /* Setup RSS through the VF registers */
3584                 ixgbe_setup_vfreta(adapter);
3585                 vfmrqc = IXGBE_MRQC_RSSEN;
3586                 vfmrqc |= rss_field;
3587                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3588         } else {
3589                 ixgbe_setup_reta(adapter);
3590                 mrqc |= rss_field;
3591                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3592         }
3593 }
3594
3595 /**
3596  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3597  * @adapter:    address of board private structure
3598  * @index:      index of ring to set
3599  **/
3600 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3601                                    struct ixgbe_ring *ring)
3602 {
3603         struct ixgbe_hw *hw = &adapter->hw;
3604         u32 rscctrl;
3605         u8 reg_idx = ring->reg_idx;
3606
3607         if (!ring_is_rsc_enabled(ring))
3608                 return;
3609
3610         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3611         rscctrl |= IXGBE_RSCCTL_RSCEN;
3612         /*
3613          * we must limit the number of descriptors so that the
3614          * total size of max desc * buf_len is not greater
3615          * than 65536
3616          */
3617         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3618         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3619 }
3620
3621 #define IXGBE_MAX_RX_DESC_POLL 10
3622 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3623                                        struct ixgbe_ring *ring)
3624 {
3625         struct ixgbe_hw *hw = &adapter->hw;
3626         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3627         u32 rxdctl;
3628         u8 reg_idx = ring->reg_idx;
3629
3630         if (ixgbe_removed(hw->hw_addr))
3631                 return;
3632         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3633         if (hw->mac.type == ixgbe_mac_82598EB &&
3634             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3635                 return;
3636
3637         do {
3638                 usleep_range(1000, 2000);
3639                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3640         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3641
3642         if (!wait_loop) {
3643                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3644                       "the polling period\n", reg_idx);
3645         }
3646 }
3647
3648 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3649                             struct ixgbe_ring *ring)
3650 {
3651         struct ixgbe_hw *hw = &adapter->hw;
3652         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3653         u32 rxdctl;
3654         u8 reg_idx = ring->reg_idx;
3655
3656         if (ixgbe_removed(hw->hw_addr))
3657                 return;
3658         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3659         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3660
3661         /* write value back with RXDCTL.ENABLE bit cleared */
3662         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3663
3664         if (hw->mac.type == ixgbe_mac_82598EB &&
3665             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3666                 return;
3667
3668         /* the hardware may take up to 100us to really disable the rx queue */
3669         do {
3670                 udelay(10);
3671                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3672         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3673
3674         if (!wait_loop) {
3675                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3676                       "the polling period\n", reg_idx);
3677         }
3678 }
3679
3680 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3681                              struct ixgbe_ring *ring)
3682 {
3683         struct ixgbe_hw *hw = &adapter->hw;
3684         u64 rdba = ring->dma;
3685         u32 rxdctl;
3686         u8 reg_idx = ring->reg_idx;
3687
3688         /* disable queue to avoid issues while updating state */
3689         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3690         ixgbe_disable_rx_queue(adapter, ring);
3691
3692         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3693         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3694         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3695                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3696         /* Force flushing of IXGBE_RDLEN to prevent MDD */
3697         IXGBE_WRITE_FLUSH(hw);
3698
3699         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3700         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3701         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3702
3703         ixgbe_configure_srrctl(adapter, ring);
3704         ixgbe_configure_rscctl(adapter, ring);
3705
3706         if (hw->mac.type == ixgbe_mac_82598EB) {
3707                 /*
3708                  * enable cache line friendly hardware writes:
3709                  * PTHRESH=32 descriptors (half the internal cache),
3710                  * this also removes ugly rx_no_buffer_count increment
3711                  * HTHRESH=4 descriptors (to minimize latency on fetch)
3712                  * WTHRESH=8 burst writeback up to two cache lines
3713                  */
3714                 rxdctl &= ~0x3FFFFF;
3715                 rxdctl |=  0x080420;
3716         }
3717
3718         /* enable receive descriptor ring */
3719         rxdctl |= IXGBE_RXDCTL_ENABLE;
3720         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3721
3722         ixgbe_rx_desc_queue_enable(adapter, ring);
3723         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3724 }
3725
3726 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3727 {
3728         struct ixgbe_hw *hw = &adapter->hw;
3729         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3730         u16 pool;
3731
3732         /* PSRTYPE must be initialized in non 82598 adapters */
3733         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3734                       IXGBE_PSRTYPE_UDPHDR |
3735                       IXGBE_PSRTYPE_IPV4HDR |
3736                       IXGBE_PSRTYPE_L2HDR |
3737                       IXGBE_PSRTYPE_IPV6HDR;
3738
3739         if (hw->mac.type == ixgbe_mac_82598EB)
3740                 return;
3741
3742         if (rss_i > 3)
3743                 psrtype |= 2u << 29;
3744         else if (rss_i > 1)
3745                 psrtype |= 1u << 29;
3746
3747         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3748                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3749 }
3750
3751 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3752 {
3753         struct ixgbe_hw *hw = &adapter->hw;
3754         u32 reg_offset, vf_shift;
3755         u32 gcr_ext, vmdctl;
3756         int i;
3757
3758         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3759                 return;
3760
3761         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3762         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3763         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3764         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3765         vmdctl |= IXGBE_VT_CTL_REPLEN;
3766         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3767
3768         vf_shift = VMDQ_P(0) % 32;
3769         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3770
3771         /* Enable only the PF's pool for Tx/Rx */
3772         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
3773         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3774         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
3775         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3776         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3777                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3778
3779         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3780         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3781
3782         /* clear VLAN promisc flag so VFTA will be updated if necessary */
3783         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
3784
3785         /*
3786          * Set up VF register offsets for selected VT Mode,
3787          * i.e. 32 or 64 VFs for SR-IOV
3788          */
3789         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3790         case IXGBE_82599_VMDQ_8Q_MASK:
3791                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3792                 break;
3793         case IXGBE_82599_VMDQ_4Q_MASK:
3794                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3795                 break;
3796         default:
3797                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3798                 break;
3799         }
3800
3801         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3802
3803         for (i = 0; i < adapter->num_vfs; i++) {
3804                 /* configure spoof checking */
3805                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
3806                                           adapter->vfinfo[i].spoofchk_enabled);
3807
3808                 /* Enable/Disable RSS query feature  */
3809                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3810                                           adapter->vfinfo[i].rss_query_enabled);
3811         }
3812 }
3813
3814 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3815 {
3816         struct ixgbe_hw *hw = &adapter->hw;
3817         struct net_device *netdev = adapter->netdev;
3818         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3819         struct ixgbe_ring *rx_ring;
3820         int i;
3821         u32 mhadd, hlreg0;
3822
3823 #ifdef IXGBE_FCOE
3824         /* adjust max frame to be able to do baby jumbo for FCoE */
3825         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3826             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3827                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3828
3829 #endif /* IXGBE_FCOE */
3830
3831         /* adjust max frame to be at least the size of a standard frame */
3832         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3833                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3834
3835         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3836         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3837                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3838                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3839
3840                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3841         }
3842
3843         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3844         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3845         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3846         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3847
3848         /*
3849          * Setup the HW Rx Head and Tail Descriptor Pointers and
3850          * the Base and Length of the Rx Descriptor Ring
3851          */
3852         for (i = 0; i < adapter->num_rx_queues; i++) {
3853                 rx_ring = adapter->rx_ring[i];
3854                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3855                         set_ring_rsc_enabled(rx_ring);
3856                 else
3857                         clear_ring_rsc_enabled(rx_ring);
3858         }
3859 }
3860
3861 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3862 {
3863         struct ixgbe_hw *hw = &adapter->hw;
3864         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3865
3866         switch (hw->mac.type) {
3867         case ixgbe_mac_82598EB:
3868                 /*
3869                  * For VMDq support of different descriptor types or
3870                  * buffer sizes through the use of multiple SRRCTL
3871                  * registers, RDRXCTL.MVMEN must be set to 1
3872                  *
3873                  * also, the manual doesn't mention it clearly but DCA hints
3874                  * will only use queue 0's tags unless this bit is set.  Side
3875                  * effects of setting this bit are only that SRRCTL must be
3876                  * fully programmed [0..15]
3877                  */
3878                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3879                 break;
3880         case ixgbe_mac_X550:
3881         case ixgbe_mac_X550EM_x:
3882         case ixgbe_mac_x550em_a:
3883                 if (adapter->num_vfs)
3884                         rdrxctl |= IXGBE_RDRXCTL_PSP;
3885                 /* fall through for older HW */
3886         case ixgbe_mac_82599EB:
3887         case ixgbe_mac_X540:
3888                 /* Disable RSC for ACK packets */
3889                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3890                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3891                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3892                 /* hardware requires some bits to be set by default */
3893                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3894                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3895                 break;
3896         default:
3897                 /* We should do nothing since we don't know this hardware */
3898                 return;
3899         }
3900
3901         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3902 }
3903
3904 /**
3905  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3906  * @adapter: board private structure
3907  *
3908  * Configure the Rx unit of the MAC after a reset.
3909  **/
3910 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3911 {
3912         struct ixgbe_hw *hw = &adapter->hw;
3913         int i;
3914         u32 rxctrl, rfctl;
3915
3916         /* disable receives while setting up the descriptors */
3917         hw->mac.ops.disable_rx(hw);
3918
3919         ixgbe_setup_psrtype(adapter);
3920         ixgbe_setup_rdrxctl(adapter);
3921
3922         /* RSC Setup */
3923         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3924         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3925         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3926                 rfctl |= IXGBE_RFCTL_RSC_DIS;
3927
3928         /* disable NFS filtering */
3929         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
3930         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3931
3932         /* Program registers for the distribution of queues */
3933         ixgbe_setup_mrqc(adapter);
3934
3935         /* set_rx_buffer_len must be called before ring initialization */
3936         ixgbe_set_rx_buffer_len(adapter);
3937
3938         /*
3939          * Setup the HW Rx Head and Tail Descriptor Pointers and
3940          * the Base and Length of the Rx Descriptor Ring
3941          */
3942         for (i = 0; i < adapter->num_rx_queues; i++)
3943                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3944
3945         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3946         /* disable drop enable for 82598 parts */
3947         if (hw->mac.type == ixgbe_mac_82598EB)
3948                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3949
3950         /* enable all receives */
3951         rxctrl |= IXGBE_RXCTRL_RXEN;
3952         hw->mac.ops.enable_rx_dma(hw, rxctrl);
3953 }
3954
3955 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3956                                  __be16 proto, u16 vid)
3957 {
3958         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3959         struct ixgbe_hw *hw = &adapter->hw;
3960
3961         /* add VID to filter table */
3962         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
3963                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
3964
3965         set_bit(vid, adapter->active_vlans);
3966
3967         return 0;
3968 }
3969
3970 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
3971 {
3972         u32 vlvf;
3973         int idx;
3974
3975         /* short cut the special case */
3976         if (vlan == 0)
3977                 return 0;
3978
3979         /* Search for the vlan id in the VLVF entries */
3980         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
3981                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
3982                 if ((vlvf & VLAN_VID_MASK) == vlan)
3983                         break;
3984         }
3985
3986         return idx;
3987 }
3988
3989 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
3990 {
3991         struct ixgbe_hw *hw = &adapter->hw;
3992         u32 bits, word;
3993         int idx;
3994
3995         idx = ixgbe_find_vlvf_entry(hw, vid);
3996         if (!idx)
3997                 return;
3998
3999         /* See if any other pools are set for this VLAN filter
4000          * entry other than the PF.
4001          */
4002         word = idx * 2 + (VMDQ_P(0) / 32);
4003         bits = ~BIT(VMDQ_P(0) % 32);
4004         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4005
4006         /* Disable the filter so this falls into the default pool. */
4007         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4008                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4009                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4010                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4011         }
4012 }
4013
4014 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4015                                   __be16 proto, u16 vid)
4016 {
4017         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4018         struct ixgbe_hw *hw = &adapter->hw;
4019
4020         /* remove VID from filter table */
4021         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4022                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4023
4024         clear_bit(vid, adapter->active_vlans);
4025
4026         return 0;
4027 }
4028
4029 /**
4030  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4031  * @adapter: driver data
4032  */
4033 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4034 {
4035         struct ixgbe_hw *hw = &adapter->hw;
4036         u32 vlnctrl;
4037         int i, j;
4038
4039         switch (hw->mac.type) {
4040         case ixgbe_mac_82598EB:
4041                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4042                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4043                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4044                 break;
4045         case ixgbe_mac_82599EB:
4046         case ixgbe_mac_X540:
4047         case ixgbe_mac_X550:
4048         case ixgbe_mac_X550EM_x:
4049         case ixgbe_mac_x550em_a:
4050                 for (i = 0; i < adapter->num_rx_queues; i++) {
4051                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4052
4053                         if (ring->l2_accel_priv)
4054                                 continue;
4055                         j = ring->reg_idx;
4056                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4057                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4058                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4059                 }
4060                 break;
4061         default:
4062                 break;
4063         }
4064 }
4065
4066 /**
4067  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4068  * @adapter: driver data
4069  */
4070 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4071 {
4072         struct ixgbe_hw *hw = &adapter->hw;
4073         u32 vlnctrl;
4074         int i, j;
4075
4076         switch (hw->mac.type) {
4077         case ixgbe_mac_82598EB:
4078                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4079                 vlnctrl |= IXGBE_VLNCTRL_VME;
4080                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4081                 break;
4082         case ixgbe_mac_82599EB:
4083         case ixgbe_mac_X540:
4084         case ixgbe_mac_X550:
4085         case ixgbe_mac_X550EM_x:
4086         case ixgbe_mac_x550em_a:
4087                 for (i = 0; i < adapter->num_rx_queues; i++) {
4088                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4089
4090                         if (ring->l2_accel_priv)
4091                                 continue;
4092                         j = ring->reg_idx;
4093                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4094                         vlnctrl |= IXGBE_RXDCTL_VME;
4095                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4096                 }
4097                 break;
4098         default:
4099                 break;
4100         }
4101 }
4102
4103 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4104 {
4105         struct ixgbe_hw *hw = &adapter->hw;
4106         u32 vlnctrl, i;
4107
4108         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4109
4110         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4111         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4112                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4113                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4114         } else {
4115                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4116                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4117                 return;
4118         }
4119
4120         /* Nothing to do for 82598 */
4121         if (hw->mac.type == ixgbe_mac_82598EB)
4122                 return;
4123
4124         /* We are already in VLAN promisc, nothing to do */
4125         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4126                 return;
4127
4128         /* Set flag so we don't redo unnecessary work */
4129         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4130
4131         /* Add PF to all active pools */
4132         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4133                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4134                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4135
4136                 vlvfb |= BIT(VMDQ_P(0) % 32);
4137                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4138         }
4139
4140         /* Set all bits in the VLAN filter table array */
4141         for (i = hw->mac.vft_size; i--;)
4142                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4143 }
4144
4145 #define VFTA_BLOCK_SIZE 8
4146 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4147 {
4148         struct ixgbe_hw *hw = &adapter->hw;
4149         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4150         u32 vid_start = vfta_offset * 32;
4151         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4152         u32 i, vid, word, bits;
4153
4154         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4155                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4156
4157                 /* pull VLAN ID from VLVF */
4158                 vid = vlvf & VLAN_VID_MASK;
4159
4160                 /* only concern outselves with a certain range */
4161                 if (vid < vid_start || vid >= vid_end)
4162                         continue;
4163
4164                 if (vlvf) {
4165                         /* record VLAN ID in VFTA */
4166                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4167
4168                         /* if PF is part of this then continue */
4169                         if (test_bit(vid, adapter->active_vlans))
4170                                 continue;
4171                 }
4172
4173                 /* remove PF from the pool */
4174                 word = i * 2 + VMDQ_P(0) / 32;
4175                 bits = ~BIT(VMDQ_P(0) % 32);
4176                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4177                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4178         }
4179
4180         /* extract values from active_vlans and write back to VFTA */
4181         for (i = VFTA_BLOCK_SIZE; i--;) {
4182                 vid = (vfta_offset + i) * 32;
4183                 word = vid / BITS_PER_LONG;
4184                 bits = vid % BITS_PER_LONG;
4185
4186                 vfta[i] |= adapter->active_vlans[word] >> bits;
4187
4188                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4189         }
4190 }
4191
4192 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4193 {
4194         struct ixgbe_hw *hw = &adapter->hw;
4195         u32 vlnctrl, i;
4196
4197         /* Set VLAN filtering to enabled */
4198         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4199         vlnctrl |= IXGBE_VLNCTRL_VFE;
4200         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4201
4202         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4203             hw->mac.type == ixgbe_mac_82598EB)
4204                 return;
4205
4206         /* We are not in VLAN promisc, nothing to do */
4207         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4208                 return;
4209
4210         /* Set flag so we don't redo unnecessary work */
4211         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4212
4213         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4214                 ixgbe_scrub_vfta(adapter, i);
4215 }
4216
4217 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4218 {
4219         u16 vid = 1;
4220
4221         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4222
4223         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4224                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4225 }
4226
4227 /**
4228  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4229  * @netdev: network interface device structure
4230  *
4231  * Writes multicast address list to the MTA hash table.
4232  * Returns: -ENOMEM on failure
4233  *                0 on no addresses written
4234  *                X on writing X addresses to MTA
4235  **/
4236 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4237 {
4238         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4239         struct ixgbe_hw *hw = &adapter->hw;
4240
4241         if (!netif_running(netdev))
4242                 return 0;
4243
4244         if (hw->mac.ops.update_mc_addr_list)
4245                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4246         else
4247                 return -ENOMEM;
4248
4249 #ifdef CONFIG_PCI_IOV
4250         ixgbe_restore_vf_multicasts(adapter);
4251 #endif
4252
4253         return netdev_mc_count(netdev);
4254 }
4255
4256 #ifdef CONFIG_PCI_IOV
4257 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4258 {
4259         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4260         struct ixgbe_hw *hw = &adapter->hw;
4261         int i;
4262
4263         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4264                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4265
4266                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4267                         hw->mac.ops.set_rar(hw, i,
4268                                             mac_table->addr,
4269                                             mac_table->pool,
4270                                             IXGBE_RAH_AV);
4271                 else
4272                         hw->mac.ops.clear_rar(hw, i);
4273         }
4274 }
4275
4276 #endif
4277 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4278 {
4279         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4280         struct ixgbe_hw *hw = &adapter->hw;
4281         int i;
4282
4283         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4284                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4285                         continue;
4286
4287                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4288
4289                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4290                         hw->mac.ops.set_rar(hw, i,
4291                                             mac_table->addr,
4292                                             mac_table->pool,
4293                                             IXGBE_RAH_AV);
4294                 else
4295                         hw->mac.ops.clear_rar(hw, i);
4296         }
4297 }
4298
4299 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4300 {
4301         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4302         struct ixgbe_hw *hw = &adapter->hw;
4303         int i;
4304
4305         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4306                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4307                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4308         }
4309
4310         ixgbe_sync_mac_table(adapter);
4311 }
4312
4313 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4314 {
4315         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4316         struct ixgbe_hw *hw = &adapter->hw;
4317         int i, count = 0;
4318
4319         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4320                 /* do not count default RAR as available */
4321                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4322                         continue;
4323
4324                 /* only count unused and addresses that belong to us */
4325                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4326                         if (mac_table->pool != pool)
4327                                 continue;
4328                 }
4329
4330                 count++;
4331         }
4332
4333         return count;
4334 }
4335
4336 /* this function destroys the first RAR entry */
4337 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4338 {
4339         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4340         struct ixgbe_hw *hw = &adapter->hw;
4341
4342         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4343         mac_table->pool = VMDQ_P(0);
4344
4345         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4346
4347         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4348                             IXGBE_RAH_AV);
4349 }
4350
4351 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4352                          const u8 *addr, u16 pool)
4353 {
4354         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4355         struct ixgbe_hw *hw = &adapter->hw;
4356         int i;
4357
4358         if (is_zero_ether_addr(addr))
4359                 return -EINVAL;
4360
4361         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4362                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4363                         continue;
4364
4365                 ether_addr_copy(mac_table->addr, addr);
4366                 mac_table->pool = pool;
4367
4368                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4369                                     IXGBE_MAC_STATE_IN_USE;
4370
4371                 ixgbe_sync_mac_table(adapter);
4372
4373                 return i;
4374         }
4375
4376         return -ENOMEM;
4377 }
4378
4379 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4380                          const u8 *addr, u16 pool)
4381 {
4382         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4383         struct ixgbe_hw *hw = &adapter->hw;
4384         int i;
4385
4386         if (is_zero_ether_addr(addr))
4387                 return -EINVAL;
4388
4389         /* search table for addr, if found clear IN_USE flag and sync */
4390         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4391                 /* we can only delete an entry if it is in use */
4392                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4393                         continue;
4394                 /* we only care about entries that belong to the given pool */
4395                 if (mac_table->pool != pool)
4396                         continue;
4397                 /* we only care about a specific MAC address */
4398                 if (!ether_addr_equal(addr, mac_table->addr))
4399                         continue;
4400
4401                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4402                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4403
4404                 ixgbe_sync_mac_table(adapter);
4405
4406                 return 0;
4407         }
4408
4409         return -ENOMEM;
4410 }
4411 /**
4412  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4413  * @netdev: network interface device structure
4414  *
4415  * Writes unicast address list to the RAR table.
4416  * Returns: -ENOMEM on failure/insufficient address space
4417  *                0 on no addresses written
4418  *                X on writing X addresses to the RAR table
4419  **/
4420 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4421 {
4422         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4423         int count = 0;
4424
4425         /* return ENOMEM indicating insufficient memory for addresses */
4426         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4427                 return -ENOMEM;
4428
4429         if (!netdev_uc_empty(netdev)) {
4430                 struct netdev_hw_addr *ha;
4431                 netdev_for_each_uc_addr(ha, netdev) {
4432                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4433                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4434                         count++;
4435                 }
4436         }
4437         return count;
4438 }
4439
4440 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4441 {
4442         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4443         int ret;
4444
4445         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4446
4447         return min_t(int, ret, 0);
4448 }
4449
4450 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4451 {
4452         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4453
4454         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4455
4456         return 0;
4457 }
4458
4459 /**
4460  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4461  * @netdev: network interface device structure
4462  *
4463  * The set_rx_method entry point is called whenever the unicast/multicast
4464  * address list or the network interface flags are updated.  This routine is
4465  * responsible for configuring the hardware for proper unicast, multicast and
4466  * promiscuous mode.
4467  **/
4468 void ixgbe_set_rx_mode(struct net_device *netdev)
4469 {
4470         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4471         struct ixgbe_hw *hw = &adapter->hw;
4472         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4473         netdev_features_t features = netdev->features;
4474         int count;
4475
4476         /* Check for Promiscuous and All Multicast modes */
4477         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4478
4479         /* set all bits that we expect to always be set */
4480         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4481         fctrl |= IXGBE_FCTRL_BAM;
4482         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4483         fctrl |= IXGBE_FCTRL_PMCF;
4484
4485         /* clear the bits we are changing the status of */
4486         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4487         if (netdev->flags & IFF_PROMISC) {
4488                 hw->addr_ctrl.user_set_promisc = true;
4489                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4490                 vmolr |= IXGBE_VMOLR_MPE;
4491                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4492         } else {
4493                 if (netdev->flags & IFF_ALLMULTI) {
4494                         fctrl |= IXGBE_FCTRL_MPE;
4495                         vmolr |= IXGBE_VMOLR_MPE;
4496                 }
4497                 hw->addr_ctrl.user_set_promisc = false;
4498         }
4499
4500         /*
4501          * Write addresses to available RAR registers, if there is not
4502          * sufficient space to store all the addresses then enable
4503          * unicast promiscuous mode
4504          */
4505         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4506                 fctrl |= IXGBE_FCTRL_UPE;
4507                 vmolr |= IXGBE_VMOLR_ROPE;
4508         }
4509
4510         /* Write addresses to the MTA, if the attempt fails
4511          * then we should just turn on promiscuous mode so
4512          * that we can at least receive multicast traffic
4513          */
4514         count = ixgbe_write_mc_addr_list(netdev);
4515         if (count < 0) {
4516                 fctrl |= IXGBE_FCTRL_MPE;
4517                 vmolr |= IXGBE_VMOLR_MPE;
4518         } else if (count) {
4519                 vmolr |= IXGBE_VMOLR_ROMPE;
4520         }
4521
4522         if (hw->mac.type != ixgbe_mac_82598EB) {
4523                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4524                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4525                            IXGBE_VMOLR_ROPE);
4526                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4527         }
4528
4529         /* This is useful for sniffing bad packets. */
4530         if (features & NETIF_F_RXALL) {
4531                 /* UPE and MPE will be handled by normal PROMISC logic
4532                  * in e1000e_set_rx_mode */
4533                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4534                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4535                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4536
4537                 fctrl &= ~(IXGBE_FCTRL_DPF);
4538                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4539         }
4540
4541         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4542
4543         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4544                 ixgbe_vlan_strip_enable(adapter);
4545         else
4546                 ixgbe_vlan_strip_disable(adapter);
4547
4548         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4549                 ixgbe_vlan_promisc_disable(adapter);
4550         else
4551                 ixgbe_vlan_promisc_enable(adapter);
4552 }
4553
4554 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4555 {
4556         int q_idx;
4557
4558         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4559                 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4560                 napi_enable(&adapter->q_vector[q_idx]->napi);
4561         }
4562 }
4563
4564 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4565 {
4566         int q_idx;
4567
4568         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4569                 napi_disable(&adapter->q_vector[q_idx]->napi);
4570                 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4571                         pr_info("QV %d locked\n", q_idx);
4572                         usleep_range(1000, 20000);
4573                 }
4574         }
4575 }
4576
4577 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4578 {
4579         struct ixgbe_hw *hw = &adapter->hw;
4580         u32 vxlanctrl;
4581
4582         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4583                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4584                 return;
4585
4586         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) && ~mask;
4587         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4588
4589         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4590                 adapter->vxlan_port = 0;
4591
4592         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4593                 adapter->geneve_port = 0;
4594 }
4595
4596 #ifdef CONFIG_IXGBE_DCB
4597 /**
4598  * ixgbe_configure_dcb - Configure DCB hardware
4599  * @adapter: ixgbe adapter struct
4600  *
4601  * This is called by the driver on open to configure the DCB hardware.
4602  * This is also called by the gennetlink interface when reconfiguring
4603  * the DCB state.
4604  */
4605 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4606 {
4607         struct ixgbe_hw *hw = &adapter->hw;
4608         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4609
4610         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4611                 if (hw->mac.type == ixgbe_mac_82598EB)
4612                         netif_set_gso_max_size(adapter->netdev, 65536);
4613                 return;
4614         }
4615
4616         if (hw->mac.type == ixgbe_mac_82598EB)
4617                 netif_set_gso_max_size(adapter->netdev, 32768);
4618
4619 #ifdef IXGBE_FCOE
4620         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4621                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4622 #endif
4623
4624         /* reconfigure the hardware */
4625         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4626                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4627                                                 DCB_TX_CONFIG);
4628                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4629                                                 DCB_RX_CONFIG);
4630                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4631         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4632                 ixgbe_dcb_hw_ets(&adapter->hw,
4633                                  adapter->ixgbe_ieee_ets,
4634                                  max_frame);
4635                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4636                                         adapter->ixgbe_ieee_pfc->pfc_en,
4637                                         adapter->ixgbe_ieee_ets->prio_tc);
4638         }
4639
4640         /* Enable RSS Hash per TC */
4641         if (hw->mac.type != ixgbe_mac_82598EB) {
4642                 u32 msb = 0;
4643                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4644
4645                 while (rss_i) {
4646                         msb++;
4647                         rss_i >>= 1;
4648                 }
4649
4650                 /* write msb to all 8 TCs in one write */
4651                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4652         }
4653 }
4654 #endif
4655
4656 /* Additional bittime to account for IXGBE framing */
4657 #define IXGBE_ETH_FRAMING 20
4658
4659 /**
4660  * ixgbe_hpbthresh - calculate high water mark for flow control
4661  *
4662  * @adapter: board private structure to calculate for
4663  * @pb: packet buffer to calculate
4664  */
4665 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4666 {
4667         struct ixgbe_hw *hw = &adapter->hw;
4668         struct net_device *dev = adapter->netdev;
4669         int link, tc, kb, marker;
4670         u32 dv_id, rx_pba;
4671
4672         /* Calculate max LAN frame size */
4673         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4674
4675 #ifdef IXGBE_FCOE
4676         /* FCoE traffic class uses FCOE jumbo frames */
4677         if ((dev->features & NETIF_F_FCOE_MTU) &&
4678             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4679             (pb == ixgbe_fcoe_get_tc(adapter)))
4680                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4681 #endif
4682
4683         /* Calculate delay value for device */
4684         switch (hw->mac.type) {
4685         case ixgbe_mac_X540:
4686         case ixgbe_mac_X550:
4687         case ixgbe_mac_X550EM_x:
4688         case ixgbe_mac_x550em_a:
4689                 dv_id = IXGBE_DV_X540(link, tc);
4690                 break;
4691         default:
4692                 dv_id = IXGBE_DV(link, tc);
4693                 break;
4694         }
4695
4696         /* Loopback switch introduces additional latency */
4697         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4698                 dv_id += IXGBE_B2BT(tc);
4699
4700         /* Delay value is calculated in bit times convert to KB */
4701         kb = IXGBE_BT2KB(dv_id);
4702         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4703
4704         marker = rx_pba - kb;
4705
4706         /* It is possible that the packet buffer is not large enough
4707          * to provide required headroom. In this case throw an error
4708          * to user and a do the best we can.
4709          */
4710         if (marker < 0) {
4711                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4712                             "headroom to support flow control."
4713                             "Decrease MTU or number of traffic classes\n", pb);
4714                 marker = tc + 1;
4715         }
4716
4717         return marker;
4718 }
4719
4720 /**
4721  * ixgbe_lpbthresh - calculate low water mark for for flow control
4722  *
4723  * @adapter: board private structure to calculate for
4724  * @pb: packet buffer to calculate
4725  */
4726 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4727 {
4728         struct ixgbe_hw *hw = &adapter->hw;
4729         struct net_device *dev = adapter->netdev;
4730         int tc;
4731         u32 dv_id;
4732
4733         /* Calculate max LAN frame size */
4734         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4735
4736 #ifdef IXGBE_FCOE
4737         /* FCoE traffic class uses FCOE jumbo frames */
4738         if ((dev->features & NETIF_F_FCOE_MTU) &&
4739             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4740             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4741                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4742 #endif
4743
4744         /* Calculate delay value for device */
4745         switch (hw->mac.type) {
4746         case ixgbe_mac_X540:
4747         case ixgbe_mac_X550:
4748         case ixgbe_mac_X550EM_x:
4749         case ixgbe_mac_x550em_a:
4750                 dv_id = IXGBE_LOW_DV_X540(tc);
4751                 break;
4752         default:
4753                 dv_id = IXGBE_LOW_DV(tc);
4754                 break;
4755         }
4756
4757         /* Delay value is calculated in bit times convert to KB */
4758         return IXGBE_BT2KB(dv_id);
4759 }
4760
4761 /*
4762  * ixgbe_pbthresh_setup - calculate and setup high low water marks
4763  */
4764 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4765 {
4766         struct ixgbe_hw *hw = &adapter->hw;
4767         int num_tc = netdev_get_num_tc(adapter->netdev);
4768         int i;
4769
4770         if (!num_tc)
4771                 num_tc = 1;
4772
4773         for (i = 0; i < num_tc; i++) {
4774                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4775                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4776
4777                 /* Low water marks must not be larger than high water marks */
4778                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4779                         hw->fc.low_water[i] = 0;
4780         }
4781
4782         for (; i < MAX_TRAFFIC_CLASS; i++)
4783                 hw->fc.high_water[i] = 0;
4784 }
4785
4786 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4787 {
4788         struct ixgbe_hw *hw = &adapter->hw;
4789         int hdrm;
4790         u8 tc = netdev_get_num_tc(adapter->netdev);
4791
4792         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4793             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4794                 hdrm = 32 << adapter->fdir_pballoc;
4795         else
4796                 hdrm = 0;
4797
4798         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4799         ixgbe_pbthresh_setup(adapter);
4800 }
4801
4802 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4803 {
4804         struct ixgbe_hw *hw = &adapter->hw;
4805         struct hlist_node *node2;
4806         struct ixgbe_fdir_filter *filter;
4807         u8 queue;
4808
4809         spin_lock(&adapter->fdir_perfect_lock);
4810
4811         if (!hlist_empty(&adapter->fdir_filter_list))
4812                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4813
4814         hlist_for_each_entry_safe(filter, node2,
4815                                   &adapter->fdir_filter_list, fdir_node) {
4816                 if (filter->action == IXGBE_FDIR_DROP_QUEUE) {
4817                         queue = IXGBE_FDIR_DROP_QUEUE;
4818                 } else {
4819                         u32 ring = ethtool_get_flow_spec_ring(filter->action);
4820                         u8 vf = ethtool_get_flow_spec_ring_vf(filter->action);
4821
4822                         if (!vf && (ring >= adapter->num_rx_queues)) {
4823                                 e_err(drv, "FDIR restore failed without VF, ring: %u\n",
4824                                       ring);
4825                                 continue;
4826                         } else if (vf &&
4827                                    ((vf > adapter->num_vfs) ||
4828                                      ring >= adapter->num_rx_queues_per_pool)) {
4829                                 e_err(drv, "FDIR restore failed with VF, vf: %hhu, ring: %u\n",
4830                                       vf, ring);
4831                                 continue;
4832                         }
4833
4834                         /* Map the ring onto the absolute queue index */
4835                         if (!vf)
4836                                 queue = adapter->rx_ring[ring]->reg_idx;
4837                         else
4838                                 queue = ((vf - 1) *
4839                                         adapter->num_rx_queues_per_pool) + ring;
4840                 }
4841
4842                 ixgbe_fdir_write_perfect_filter_82599(hw,
4843                                 &filter->filter, filter->sw_idx, queue);
4844         }
4845
4846         spin_unlock(&adapter->fdir_perfect_lock);
4847 }
4848
4849 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4850                                       struct ixgbe_adapter *adapter)
4851 {
4852         struct ixgbe_hw *hw = &adapter->hw;
4853         u32 vmolr;
4854
4855         /* No unicast promiscuous support for VMDQ devices. */
4856         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4857         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4858
4859         /* clear the affected bit */
4860         vmolr &= ~IXGBE_VMOLR_MPE;
4861
4862         if (dev->flags & IFF_ALLMULTI) {
4863                 vmolr |= IXGBE_VMOLR_MPE;
4864         } else {
4865                 vmolr |= IXGBE_VMOLR_ROMPE;
4866                 hw->mac.ops.update_mc_addr_list(hw, dev);
4867         }
4868         ixgbe_write_uc_addr_list(adapter->netdev, pool);
4869         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4870 }
4871
4872 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4873 {
4874         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4875         int rss_i = adapter->num_rx_queues_per_pool;
4876         struct ixgbe_hw *hw = &adapter->hw;
4877         u16 pool = vadapter->pool;
4878         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4879                       IXGBE_PSRTYPE_UDPHDR |
4880                       IXGBE_PSRTYPE_IPV4HDR |
4881                       IXGBE_PSRTYPE_L2HDR |
4882                       IXGBE_PSRTYPE_IPV6HDR;
4883
4884         if (hw->mac.type == ixgbe_mac_82598EB)
4885                 return;
4886
4887         if (rss_i > 3)
4888                 psrtype |= 2u << 29;
4889         else if (rss_i > 1)
4890                 psrtype |= 1u << 29;
4891
4892         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4893 }
4894
4895 /**
4896  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4897  * @rx_ring: ring to free buffers from
4898  **/
4899 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4900 {
4901         struct device *dev = rx_ring->dev;
4902         unsigned long size;
4903         u16 i;
4904
4905         /* ring already cleared, nothing to do */
4906         if (!rx_ring->rx_buffer_info)
4907                 return;
4908
4909         /* Free all the Rx ring sk_buffs */
4910         for (i = 0; i < rx_ring->count; i++) {
4911                 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4912
4913                 if (rx_buffer->skb) {
4914                         struct sk_buff *skb = rx_buffer->skb;
4915                         if (IXGBE_CB(skb)->page_released)
4916                                 dma_unmap_page(dev,
4917                                                IXGBE_CB(skb)->dma,
4918                                                ixgbe_rx_bufsz(rx_ring),
4919                                                DMA_FROM_DEVICE);
4920                         dev_kfree_skb(skb);
4921                         rx_buffer->skb = NULL;
4922                 }
4923
4924                 if (!rx_buffer->page)
4925                         continue;
4926
4927                 dma_unmap_page(dev, rx_buffer->dma,
4928                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4929                 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4930
4931                 rx_buffer->page = NULL;
4932         }
4933
4934         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4935         memset(rx_ring->rx_buffer_info, 0, size);
4936
4937         /* Zero out the descriptor ring */
4938         memset(rx_ring->desc, 0, rx_ring->size);
4939
4940         rx_ring->next_to_alloc = 0;
4941         rx_ring->next_to_clean = 0;
4942         rx_ring->next_to_use = 0;
4943 }
4944
4945 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4946                                    struct ixgbe_ring *rx_ring)
4947 {
4948         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4949         int index = rx_ring->queue_index + vadapter->rx_base_queue;
4950
4951         /* shutdown specific queue receive and wait for dma to settle */
4952         ixgbe_disable_rx_queue(adapter, rx_ring);
4953         usleep_range(10000, 20000);
4954         ixgbe_irq_disable_queues(adapter, BIT_ULL(index));
4955         ixgbe_clean_rx_ring(rx_ring);
4956         rx_ring->l2_accel_priv = NULL;
4957 }
4958
4959 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4960                                struct ixgbe_fwd_adapter *accel)
4961 {
4962         struct ixgbe_adapter *adapter = accel->real_adapter;
4963         unsigned int rxbase = accel->rx_base_queue;
4964         unsigned int txbase = accel->tx_base_queue;
4965         int i;
4966
4967         netif_tx_stop_all_queues(vdev);
4968
4969         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4970                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4971                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4972         }
4973
4974         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4975                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4976                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4977         }
4978
4979
4980         return 0;
4981 }
4982
4983 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4984                              struct ixgbe_fwd_adapter *accel)
4985 {
4986         struct ixgbe_adapter *adapter = accel->real_adapter;
4987         unsigned int rxbase, txbase, queues;
4988         int i, baseq, err = 0;
4989
4990         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4991                 return 0;
4992
4993         baseq = accel->pool * adapter->num_rx_queues_per_pool;
4994         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4995                    accel->pool, adapter->num_rx_pools,
4996                    baseq, baseq + adapter->num_rx_queues_per_pool,
4997                    adapter->fwd_bitmask);
4998
4999         accel->netdev = vdev;
5000         accel->rx_base_queue = rxbase = baseq;
5001         accel->tx_base_queue = txbase = baseq;
5002
5003         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5004                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
5005
5006         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5007                 adapter->rx_ring[rxbase + i]->netdev = vdev;
5008                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
5009                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
5010         }
5011
5012         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
5013                 adapter->tx_ring[txbase + i]->netdev = vdev;
5014                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
5015         }
5016
5017         queues = min_t(unsigned int,
5018                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
5019         err = netif_set_real_num_tx_queues(vdev, queues);
5020         if (err)
5021                 goto fwd_queue_err;
5022
5023         err = netif_set_real_num_rx_queues(vdev, queues);
5024         if (err)
5025                 goto fwd_queue_err;
5026
5027         if (is_valid_ether_addr(vdev->dev_addr))
5028                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
5029
5030         ixgbe_fwd_psrtype(accel);
5031         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5032         return err;
5033 fwd_queue_err:
5034         ixgbe_fwd_ring_down(vdev, accel);
5035         return err;
5036 }
5037
5038 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5039 {
5040         struct net_device *upper;
5041         struct list_head *iter;
5042         int err;
5043
5044         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5045                 if (netif_is_macvlan(upper)) {
5046                         struct macvlan_dev *dfwd = netdev_priv(upper);
5047                         struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5048
5049                         if (dfwd->fwd_priv) {
5050                                 err = ixgbe_fwd_ring_up(upper, vadapter);
5051                                 if (err)
5052                                         continue;
5053                         }
5054                 }
5055         }
5056 }
5057
5058 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5059 {
5060         struct ixgbe_hw *hw = &adapter->hw;
5061
5062         ixgbe_configure_pb(adapter);
5063 #ifdef CONFIG_IXGBE_DCB
5064         ixgbe_configure_dcb(adapter);
5065 #endif
5066         /*
5067          * We must restore virtualization before VLANs or else
5068          * the VLVF registers will not be populated
5069          */
5070         ixgbe_configure_virtualization(adapter);
5071
5072         ixgbe_set_rx_mode(adapter->netdev);
5073         ixgbe_restore_vlan(adapter);
5074
5075         switch (hw->mac.type) {
5076         case ixgbe_mac_82599EB:
5077         case ixgbe_mac_X540:
5078                 hw->mac.ops.disable_rx_buff(hw);
5079                 break;
5080         default:
5081                 break;
5082         }
5083
5084         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5085                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5086                                                 adapter->fdir_pballoc);
5087         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5088                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5089                                               adapter->fdir_pballoc);
5090                 ixgbe_fdir_filter_restore(adapter);
5091         }
5092
5093         switch (hw->mac.type) {
5094         case ixgbe_mac_82599EB:
5095         case ixgbe_mac_X540:
5096                 hw->mac.ops.enable_rx_buff(hw);
5097                 break;
5098         default:
5099                 break;
5100         }
5101
5102 #ifdef CONFIG_IXGBE_DCA
5103         /* configure DCA */
5104         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5105                 ixgbe_setup_dca(adapter);
5106 #endif /* CONFIG_IXGBE_DCA */
5107
5108 #ifdef IXGBE_FCOE
5109         /* configure FCoE L2 filters, redirection table, and Rx control */
5110         ixgbe_configure_fcoe(adapter);
5111
5112 #endif /* IXGBE_FCOE */
5113         ixgbe_configure_tx(adapter);
5114         ixgbe_configure_rx(adapter);
5115         ixgbe_configure_dfwd(adapter);
5116 }
5117
5118 /**
5119  * ixgbe_sfp_link_config - set up SFP+ link
5120  * @adapter: pointer to private adapter struct
5121  **/
5122 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5123 {
5124         /*
5125          * We are assuming the worst case scenario here, and that
5126          * is that an SFP was inserted/removed after the reset
5127          * but before SFP detection was enabled.  As such the best
5128          * solution is to just start searching as soon as we start
5129          */
5130         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5131                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5132
5133         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5134         adapter->sfp_poll_time = 0;
5135 }
5136
5137 /**
5138  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5139  * @hw: pointer to private hardware struct
5140  *
5141  * Returns 0 on success, negative on failure
5142  **/
5143 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5144 {
5145         u32 speed;
5146         bool autoneg, link_up = false;
5147         int ret = IXGBE_ERR_LINK_SETUP;
5148
5149         if (hw->mac.ops.check_link)
5150                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5151
5152         if (ret)
5153                 return ret;
5154
5155         speed = hw->phy.autoneg_advertised;
5156         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5157                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5158                                                         &autoneg);
5159         if (ret)
5160                 return ret;
5161
5162         if (hw->mac.ops.setup_link)
5163                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5164
5165         return ret;
5166 }
5167
5168 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5169 {
5170         struct ixgbe_hw *hw = &adapter->hw;
5171         u32 gpie = 0;
5172
5173         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5174                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5175                        IXGBE_GPIE_OCD;
5176                 gpie |= IXGBE_GPIE_EIAME;
5177                 /*
5178                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5179                  * this saves a register write for every interrupt
5180                  */
5181                 switch (hw->mac.type) {
5182                 case ixgbe_mac_82598EB:
5183                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5184                         break;
5185                 case ixgbe_mac_82599EB:
5186                 case ixgbe_mac_X540:
5187                 case ixgbe_mac_X550:
5188                 case ixgbe_mac_X550EM_x:
5189                 case ixgbe_mac_x550em_a:
5190                 default:
5191                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5192                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5193                         break;
5194                 }
5195         } else {
5196                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5197                  * specifically only auto mask tx and rx interrupts */
5198                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5199         }
5200
5201         /* XXX: to interrupt immediately for EICS writes, enable this */
5202         /* gpie |= IXGBE_GPIE_EIMEN; */
5203
5204         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5205                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5206
5207                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5208                 case IXGBE_82599_VMDQ_8Q_MASK:
5209                         gpie |= IXGBE_GPIE_VTMODE_16;
5210                         break;
5211                 case IXGBE_82599_VMDQ_4Q_MASK:
5212                         gpie |= IXGBE_GPIE_VTMODE_32;
5213                         break;
5214                 default:
5215                         gpie |= IXGBE_GPIE_VTMODE_64;
5216                         break;
5217                 }
5218         }
5219
5220         /* Enable Thermal over heat sensor interrupt */
5221         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5222                 switch (adapter->hw.mac.type) {
5223                 case ixgbe_mac_82599EB:
5224                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5225                         break;
5226                 default:
5227                         break;
5228                 }
5229         }
5230
5231         /* Enable fan failure interrupt */
5232         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5233                 gpie |= IXGBE_SDP1_GPIEN(hw);
5234
5235         switch (hw->mac.type) {
5236         case ixgbe_mac_82599EB:
5237                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5238                 break;
5239         case ixgbe_mac_X550EM_x:
5240         case ixgbe_mac_x550em_a:
5241                 gpie |= IXGBE_SDP0_GPIEN_X540;
5242                 break;
5243         default:
5244                 break;
5245         }
5246
5247         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5248 }
5249
5250 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5251 {
5252         struct ixgbe_hw *hw = &adapter->hw;
5253         int err;
5254         u32 ctrl_ext;
5255
5256         ixgbe_get_hw_control(adapter);
5257         ixgbe_setup_gpie(adapter);
5258
5259         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5260                 ixgbe_configure_msix(adapter);
5261         else
5262                 ixgbe_configure_msi_and_legacy(adapter);
5263
5264         /* enable the optics for 82599 SFP+ fiber */
5265         if (hw->mac.ops.enable_tx_laser)
5266                 hw->mac.ops.enable_tx_laser(hw);
5267
5268         if (hw->phy.ops.set_phy_power)
5269                 hw->phy.ops.set_phy_power(hw, true);
5270
5271         smp_mb__before_atomic();
5272         clear_bit(__IXGBE_DOWN, &adapter->state);
5273         ixgbe_napi_enable_all(adapter);
5274
5275         if (ixgbe_is_sfp(hw)) {
5276                 ixgbe_sfp_link_config(adapter);
5277         } else {
5278                 err = ixgbe_non_sfp_link_config(hw);
5279                 if (err)
5280                         e_err(probe, "link_config FAILED %d\n", err);
5281         }
5282
5283         /* clear any pending interrupts, may auto mask */
5284         IXGBE_READ_REG(hw, IXGBE_EICR);
5285         ixgbe_irq_enable(adapter, true, true);
5286
5287         /*
5288          * If this adapter has a fan, check to see if we had a failure
5289          * before we enabled the interrupt.
5290          */
5291         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5292                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5293                 if (esdp & IXGBE_ESDP_SDP1)
5294                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5295         }
5296
5297         /* bring the link up in the watchdog, this could race with our first
5298          * link up interrupt but shouldn't be a problem */
5299         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5300         adapter->link_check_timeout = jiffies;
5301         mod_timer(&adapter->service_timer, jiffies);
5302
5303         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5304         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5305         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5306         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5307 }
5308
5309 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5310 {
5311         WARN_ON(in_interrupt());
5312         /* put off any impending NetWatchDogTimeout */
5313         netif_trans_update(adapter->netdev);
5314
5315         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5316                 usleep_range(1000, 2000);
5317         ixgbe_down(adapter);
5318         /*
5319          * If SR-IOV enabled then wait a bit before bringing the adapter
5320          * back up to give the VFs time to respond to the reset.  The
5321          * two second wait is based upon the watchdog timer cycle in
5322          * the VF driver.
5323          */
5324         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5325                 msleep(2000);
5326         ixgbe_up(adapter);
5327         clear_bit(__IXGBE_RESETTING, &adapter->state);
5328 }
5329
5330 void ixgbe_up(struct ixgbe_adapter *adapter)
5331 {
5332         /* hardware has been reset, we need to reload some things */
5333         ixgbe_configure(adapter);
5334
5335         ixgbe_up_complete(adapter);
5336 }
5337
5338 void ixgbe_reset(struct ixgbe_adapter *adapter)
5339 {
5340         struct ixgbe_hw *hw = &adapter->hw;
5341         struct net_device *netdev = adapter->netdev;
5342         int err;
5343
5344         if (ixgbe_removed(hw->hw_addr))
5345                 return;
5346         /* lock SFP init bit to prevent race conditions with the watchdog */
5347         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5348                 usleep_range(1000, 2000);
5349
5350         /* clear all SFP and link config related flags while holding SFP_INIT */
5351         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5352                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5353         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5354
5355         err = hw->mac.ops.init_hw(hw);
5356         switch (err) {
5357         case 0:
5358         case IXGBE_ERR_SFP_NOT_PRESENT:
5359         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5360                 break;
5361         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5362                 e_dev_err("master disable timed out\n");
5363                 break;
5364         case IXGBE_ERR_EEPROM_VERSION:
5365                 /* We are running on a pre-production device, log a warning */
5366                 e_dev_warn("This device is a pre-production adapter/LOM. "
5367                            "Please be aware there may be issues associated with "
5368                            "your hardware.  If you are experiencing problems "
5369                            "please contact your Intel or hardware "
5370                            "representative who provided you with this "
5371                            "hardware.\n");
5372                 break;
5373         default:
5374                 e_dev_err("Hardware Error: %d\n", err);
5375         }
5376
5377         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5378
5379         /* flush entries out of MAC table */
5380         ixgbe_flush_sw_mac_table(adapter);
5381         __dev_uc_unsync(netdev, NULL);
5382
5383         /* do not flush user set addresses */
5384         ixgbe_mac_set_default_filter(adapter);
5385
5386         /* update SAN MAC vmdq pool selection */
5387         if (hw->mac.san_mac_rar_index)
5388                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5389
5390         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5391                 ixgbe_ptp_reset(adapter);
5392
5393         if (hw->phy.ops.set_phy_power) {
5394                 if (!netif_running(adapter->netdev) && !adapter->wol)
5395                         hw->phy.ops.set_phy_power(hw, false);
5396                 else
5397                         hw->phy.ops.set_phy_power(hw, true);
5398         }
5399 }
5400
5401 /**
5402  * ixgbe_clean_tx_ring - Free Tx Buffers
5403  * @tx_ring: ring to be cleaned
5404  **/
5405 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5406 {
5407         struct ixgbe_tx_buffer *tx_buffer_info;
5408         unsigned long size;
5409         u16 i;
5410
5411         /* ring already cleared, nothing to do */
5412         if (!tx_ring->tx_buffer_info)
5413                 return;
5414
5415         /* Free all the Tx ring sk_buffs */
5416         for (i = 0; i < tx_ring->count; i++) {
5417                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5418                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5419         }
5420
5421         netdev_tx_reset_queue(txring_txq(tx_ring));
5422
5423         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5424         memset(tx_ring->tx_buffer_info, 0, size);
5425
5426         /* Zero out the descriptor ring */
5427         memset(tx_ring->desc, 0, tx_ring->size);
5428
5429         tx_ring->next_to_use = 0;
5430         tx_ring->next_to_clean = 0;
5431 }
5432
5433 /**
5434  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5435  * @adapter: board private structure
5436  **/
5437 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5438 {
5439         int i;
5440
5441         for (i = 0; i < adapter->num_rx_queues; i++)
5442                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5443 }
5444
5445 /**
5446  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5447  * @adapter: board private structure
5448  **/
5449 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5450 {
5451         int i;
5452
5453         for (i = 0; i < adapter->num_tx_queues; i++)
5454                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5455 }
5456
5457 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5458 {
5459         struct hlist_node *node2;
5460         struct ixgbe_fdir_filter *filter;
5461
5462         spin_lock(&adapter->fdir_perfect_lock);
5463
5464         hlist_for_each_entry_safe(filter, node2,
5465                                   &adapter->fdir_filter_list, fdir_node) {
5466                 hlist_del(&filter->fdir_node);
5467                 kfree(filter);
5468         }
5469         adapter->fdir_filter_count = 0;
5470
5471         spin_unlock(&adapter->fdir_perfect_lock);
5472 }
5473
5474 void ixgbe_down(struct ixgbe_adapter *adapter)
5475 {
5476         struct net_device *netdev = adapter->netdev;
5477         struct ixgbe_hw *hw = &adapter->hw;
5478         struct net_device *upper;
5479         struct list_head *iter;
5480         int i;
5481
5482         /* signal that we are down to the interrupt handler */
5483         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5484                 return; /* do nothing if already down */
5485
5486         /* disable receives */
5487         hw->mac.ops.disable_rx(hw);
5488
5489         /* disable all enabled rx queues */
5490         for (i = 0; i < adapter->num_rx_queues; i++)
5491                 /* this call also flushes the previous write */
5492                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5493
5494         usleep_range(10000, 20000);
5495
5496         netif_tx_stop_all_queues(netdev);
5497
5498         /* call carrier off first to avoid false dev_watchdog timeouts */
5499         netif_carrier_off(netdev);
5500         netif_tx_disable(netdev);
5501
5502         /* disable any upper devices */
5503         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5504                 if (netif_is_macvlan(upper)) {
5505                         struct macvlan_dev *vlan = netdev_priv(upper);
5506
5507                         if (vlan->fwd_priv) {
5508                                 netif_tx_stop_all_queues(upper);
5509                                 netif_carrier_off(upper);
5510                                 netif_tx_disable(upper);
5511                         }
5512                 }
5513         }
5514
5515         ixgbe_irq_disable(adapter);
5516
5517         ixgbe_napi_disable_all(adapter);
5518
5519         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5520         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5521         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5522
5523         del_timer_sync(&adapter->service_timer);
5524
5525         if (adapter->num_vfs) {
5526                 /* Clear EITR Select mapping */
5527                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5528
5529                 /* Mark all the VFs as inactive */
5530                 for (i = 0 ; i < adapter->num_vfs; i++)
5531                         adapter->vfinfo[i].clear_to_send = false;
5532
5533                 /* ping all the active vfs to let them know we are going down */
5534                 ixgbe_ping_all_vfs(adapter);
5535
5536                 /* Disable all VFTE/VFRE TX/RX */
5537                 ixgbe_disable_tx_rx(adapter);
5538         }
5539
5540         /* disable transmits in the hardware now that interrupts are off */
5541         for (i = 0; i < adapter->num_tx_queues; i++) {
5542                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5543                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5544         }
5545
5546         /* Disable the Tx DMA engine on 82599 and later MAC */
5547         switch (hw->mac.type) {
5548         case ixgbe_mac_82599EB:
5549         case ixgbe_mac_X540:
5550         case ixgbe_mac_X550:
5551         case ixgbe_mac_X550EM_x:
5552         case ixgbe_mac_x550em_a:
5553                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5554                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5555                                  ~IXGBE_DMATXCTL_TE));
5556                 break;
5557         default:
5558                 break;
5559         }
5560
5561         if (!pci_channel_offline(adapter->pdev))
5562                 ixgbe_reset(adapter);
5563
5564         /* power down the optics for 82599 SFP+ fiber */
5565         if (hw->mac.ops.disable_tx_laser)
5566                 hw->mac.ops.disable_tx_laser(hw);
5567
5568         ixgbe_clean_all_tx_rings(adapter);
5569         ixgbe_clean_all_rx_rings(adapter);
5570 }
5571
5572 /**
5573  * ixgbe_tx_timeout - Respond to a Tx Hang
5574  * @netdev: network interface device structure
5575  **/
5576 static void ixgbe_tx_timeout(struct net_device *netdev)
5577 {
5578         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5579
5580         /* Do the reset outside of interrupt context */
5581         ixgbe_tx_timeout_reset(adapter);
5582 }
5583
5584 #ifdef CONFIG_IXGBE_DCB
5585 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
5586 {
5587         struct ixgbe_hw *hw = &adapter->hw;
5588         struct tc_configuration *tc;
5589         int j;
5590
5591         switch (hw->mac.type) {
5592         case ixgbe_mac_82598EB:
5593         case ixgbe_mac_82599EB:
5594                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5595                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5596                 break;
5597         case ixgbe_mac_X540:
5598         case ixgbe_mac_X550:
5599                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5600                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5601                 break;
5602         case ixgbe_mac_X550EM_x:
5603         case ixgbe_mac_x550em_a:
5604         default:
5605                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
5606                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
5607                 break;
5608         }
5609
5610         /* Configure DCB traffic classes */
5611         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5612                 tc = &adapter->dcb_cfg.tc_config[j];
5613                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5614                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5615                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5616                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5617                 tc->dcb_pfc = pfc_disabled;
5618         }
5619
5620         /* Initialize default user to priority mapping, UPx->TC0 */
5621         tc = &adapter->dcb_cfg.tc_config[0];
5622         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5623         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5624
5625         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5626         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5627         adapter->dcb_cfg.pfc_mode_enable = false;
5628         adapter->dcb_set_bitmap = 0x00;
5629         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
5630                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5631         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5632                sizeof(adapter->temp_dcb_cfg));
5633 }
5634 #endif
5635
5636 /**
5637  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5638  * @adapter: board private structure to initialize
5639  *
5640  * ixgbe_sw_init initializes the Adapter private data structure.
5641  * Fields are initialized based on PCI device information and
5642  * OS network device settings (MTU size).
5643  **/
5644 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5645 {
5646         struct ixgbe_hw *hw = &adapter->hw;
5647         struct pci_dev *pdev = adapter->pdev;
5648         unsigned int rss, fdir;
5649         u32 fwsm;
5650         int i;
5651
5652         /* PCI config space info */
5653
5654         hw->vendor_id = pdev->vendor;
5655         hw->device_id = pdev->device;
5656         hw->revision_id = pdev->revision;
5657         hw->subsystem_vendor_id = pdev->subsystem_vendor;
5658         hw->subsystem_device_id = pdev->subsystem_device;
5659
5660         /* Set common capability flags and settings */
5661         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5662         adapter->ring_feature[RING_F_RSS].limit = rss;
5663         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5664         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5665         adapter->atr_sample_rate = 20;
5666         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5667         adapter->ring_feature[RING_F_FDIR].limit = fdir;
5668         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5669 #ifdef CONFIG_IXGBE_DCA
5670         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5671 #endif
5672 #ifdef CONFIG_IXGBE_DCB
5673         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
5674         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
5675 #endif
5676 #ifdef IXGBE_FCOE
5677         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5678         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5679 #ifdef CONFIG_IXGBE_DCB
5680         /* Default traffic class to use for FCoE */
5681         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5682 #endif /* CONFIG_IXGBE_DCB */
5683 #endif /* IXGBE_FCOE */
5684
5685         /* initialize static ixgbe jump table entries */
5686         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
5687                                           GFP_KERNEL);
5688         if (!adapter->jump_tables[0])
5689                 return -ENOMEM;
5690         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
5691
5692         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
5693                 adapter->jump_tables[i] = NULL;
5694
5695         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5696                                      hw->mac.num_rar_entries,
5697                                      GFP_ATOMIC);
5698         if (!adapter->mac_table)
5699                 return -ENOMEM;
5700
5701         /* Set MAC specific capability flags and exceptions */
5702         switch (hw->mac.type) {
5703         case ixgbe_mac_82598EB:
5704                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5705
5706                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5707                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5708
5709                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5710                 adapter->ring_feature[RING_F_FDIR].limit = 0;
5711                 adapter->atr_sample_rate = 0;
5712                 adapter->fdir_pballoc = 0;
5713 #ifdef IXGBE_FCOE
5714                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5715                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5716 #ifdef CONFIG_IXGBE_DCB
5717                 adapter->fcoe.up = 0;
5718 #endif /* IXGBE_DCB */
5719 #endif /* IXGBE_FCOE */
5720                 break;
5721         case ixgbe_mac_82599EB:
5722                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5723                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5724                 break;
5725         case ixgbe_mac_X540:
5726                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5727                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5728                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5729                 break;
5730         case ixgbe_mac_x550em_a:
5731                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
5732         /* fall through */
5733         case ixgbe_mac_X550EM_x:
5734 #ifdef CONFIG_IXGBE_DCB
5735                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
5736 #endif
5737 #ifdef IXGBE_FCOE
5738                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5739 #ifdef CONFIG_IXGBE_DCB
5740                 adapter->fcoe.up = 0;
5741 #endif /* IXGBE_DCB */
5742 #endif /* IXGBE_FCOE */
5743         /* Fall Through */
5744         case ixgbe_mac_X550:
5745 #ifdef CONFIG_IXGBE_DCA
5746                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5747 #endif
5748                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5749                 break;
5750         default:
5751                 break;
5752         }
5753
5754 #ifdef IXGBE_FCOE
5755         /* FCoE support exists, always init the FCoE lock */
5756         spin_lock_init(&adapter->fcoe.lock);
5757
5758 #endif
5759         /* n-tuple support exists, always init our spinlock */
5760         spin_lock_init(&adapter->fdir_perfect_lock);
5761
5762 #ifdef CONFIG_IXGBE_DCB
5763         ixgbe_init_dcb(adapter);
5764 #endif
5765
5766         /* default flow control settings */
5767         hw->fc.requested_mode = ixgbe_fc_full;
5768         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
5769         ixgbe_pbthresh_setup(adapter);
5770         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5771         hw->fc.send_xon = true;
5772         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5773
5774 #ifdef CONFIG_PCI_IOV
5775         if (max_vfs > 0)
5776                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5777
5778         /* assign number of SR-IOV VFs */
5779         if (hw->mac.type != ixgbe_mac_82598EB) {
5780                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5781                         adapter->num_vfs = 0;
5782                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5783                 } else {
5784                         adapter->num_vfs = max_vfs;
5785                 }
5786         }
5787 #endif /* CONFIG_PCI_IOV */
5788
5789         /* enable itr by default in dynamic mode */
5790         adapter->rx_itr_setting = 1;
5791         adapter->tx_itr_setting = 1;
5792
5793         /* set default ring sizes */
5794         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5795         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5796
5797         /* set default work limits */
5798         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5799
5800         /* initialize eeprom parameters */
5801         if (ixgbe_init_eeprom_params_generic(hw)) {
5802                 e_dev_err("EEPROM initialization failed\n");
5803                 return -EIO;
5804         }
5805
5806         /* PF holds first pool slot */
5807         set_bit(0, &adapter->fwd_bitmask);
5808         set_bit(__IXGBE_DOWN, &adapter->state);
5809
5810         return 0;
5811 }
5812
5813 /**
5814  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5815  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
5816  *
5817  * Return 0 on success, negative on failure
5818  **/
5819 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5820 {
5821         struct device *dev = tx_ring->dev;
5822         int orig_node = dev_to_node(dev);
5823         int ring_node = -1;
5824         int size;
5825
5826         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5827
5828         if (tx_ring->q_vector)
5829                 ring_node = tx_ring->q_vector->numa_node;
5830
5831         tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5832         if (!tx_ring->tx_buffer_info)
5833                 tx_ring->tx_buffer_info = vzalloc(size);
5834         if (!tx_ring->tx_buffer_info)
5835                 goto err;
5836
5837         u64_stats_init(&tx_ring->syncp);
5838
5839         /* round up to nearest 4K */
5840         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5841         tx_ring->size = ALIGN(tx_ring->size, 4096);
5842
5843         set_dev_node(dev, ring_node);
5844         tx_ring->desc = dma_alloc_coherent(dev,
5845                                            tx_ring->size,
5846                                            &tx_ring->dma,
5847                                            GFP_KERNEL);
5848         set_dev_node(dev, orig_node);
5849         if (!tx_ring->desc)
5850                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5851                                                    &tx_ring->dma, GFP_KERNEL);
5852         if (!tx_ring->desc)
5853                 goto err;
5854
5855         tx_ring->next_to_use = 0;
5856         tx_ring->next_to_clean = 0;
5857         return 0;
5858
5859 err:
5860         vfree(tx_ring->tx_buffer_info);
5861         tx_ring->tx_buffer_info = NULL;
5862         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5863         return -ENOMEM;
5864 }
5865
5866 /**
5867  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5868  * @adapter: board private structure
5869  *
5870  * If this function returns with an error, then it's possible one or
5871  * more of the rings is populated (while the rest are not).  It is the
5872  * callers duty to clean those orphaned rings.
5873  *
5874  * Return 0 on success, negative on failure
5875  **/
5876 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5877 {
5878         int i, err = 0;
5879
5880         for (i = 0; i < adapter->num_tx_queues; i++) {
5881                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5882                 if (!err)
5883                         continue;
5884
5885                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5886                 goto err_setup_tx;
5887         }
5888
5889         return 0;
5890 err_setup_tx:
5891         /* rewind the index freeing the rings as we go */
5892         while (i--)
5893                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5894         return err;
5895 }
5896
5897 /**
5898  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5899  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
5900  *
5901  * Returns 0 on success, negative on failure
5902  **/
5903 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5904 {
5905         struct device *dev = rx_ring->dev;
5906         int orig_node = dev_to_node(dev);
5907         int ring_node = -1;
5908         int size;
5909
5910         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5911
5912         if (rx_ring->q_vector)
5913                 ring_node = rx_ring->q_vector->numa_node;
5914
5915         rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5916         if (!rx_ring->rx_buffer_info)
5917                 rx_ring->rx_buffer_info = vzalloc(size);
5918         if (!rx_ring->rx_buffer_info)
5919                 goto err;
5920
5921         u64_stats_init(&rx_ring->syncp);
5922
5923         /* Round up to nearest 4K */
5924         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5925         rx_ring->size = ALIGN(rx_ring->size, 4096);
5926
5927         set_dev_node(dev, ring_node);
5928         rx_ring->desc = dma_alloc_coherent(dev,
5929                                            rx_ring->size,
5930                                            &rx_ring->dma,
5931                                            GFP_KERNEL);
5932         set_dev_node(dev, orig_node);
5933         if (!rx_ring->desc)
5934                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5935                                                    &rx_ring->dma, GFP_KERNEL);
5936         if (!rx_ring->desc)
5937                 goto err;
5938
5939         rx_ring->next_to_clean = 0;
5940         rx_ring->next_to_use = 0;
5941
5942         return 0;
5943 err:
5944         vfree(rx_ring->rx_buffer_info);
5945         rx_ring->rx_buffer_info = NULL;
5946         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5947         return -ENOMEM;
5948 }
5949
5950 /**
5951  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5952  * @adapter: board private structure
5953  *
5954  * If this function returns with an error, then it's possible one or
5955  * more of the rings is populated (while the rest are not).  It is the
5956  * callers duty to clean those orphaned rings.
5957  *
5958  * Return 0 on success, negative on failure
5959  **/
5960 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5961 {
5962         int i, err = 0;
5963
5964         for (i = 0; i < adapter->num_rx_queues; i++) {
5965                 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5966                 if (!err)
5967                         continue;
5968
5969                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5970                 goto err_setup_rx;
5971         }
5972
5973 #ifdef IXGBE_FCOE
5974         err = ixgbe_setup_fcoe_ddp_resources(adapter);
5975         if (!err)
5976 #endif
5977                 return 0;
5978 err_setup_rx:
5979         /* rewind the index freeing the rings as we go */
5980         while (i--)
5981                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5982         return err;
5983 }
5984
5985 /**
5986  * ixgbe_free_tx_resources - Free Tx Resources per Queue
5987  * @tx_ring: Tx descriptor ring for a specific queue
5988  *
5989  * Free all transmit software resources
5990  **/
5991 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5992 {
5993         ixgbe_clean_tx_ring(tx_ring);
5994
5995         vfree(tx_ring->tx_buffer_info);
5996         tx_ring->tx_buffer_info = NULL;
5997
5998         /* if not set, then don't free */
5999         if (!tx_ring->desc)
6000                 return;
6001
6002         dma_free_coherent(tx_ring->dev, tx_ring->size,
6003                           tx_ring->desc, tx_ring->dma);
6004
6005         tx_ring->desc = NULL;
6006 }
6007
6008 /**
6009  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6010  * @adapter: board private structure
6011  *
6012  * Free all transmit software resources
6013  **/
6014 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6015 {
6016         int i;
6017
6018         for (i = 0; i < adapter->num_tx_queues; i++)
6019                 if (adapter->tx_ring[i]->desc)
6020                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6021 }
6022
6023 /**
6024  * ixgbe_free_rx_resources - Free Rx Resources
6025  * @rx_ring: ring to clean the resources from
6026  *
6027  * Free all receive software resources
6028  **/
6029 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6030 {
6031         ixgbe_clean_rx_ring(rx_ring);
6032
6033         vfree(rx_ring->rx_buffer_info);
6034         rx_ring->rx_buffer_info = NULL;
6035
6036         /* if not set, then don't free */
6037         if (!rx_ring->desc)
6038                 return;
6039
6040         dma_free_coherent(rx_ring->dev, rx_ring->size,
6041                           rx_ring->desc, rx_ring->dma);
6042
6043         rx_ring->desc = NULL;
6044 }
6045
6046 /**
6047  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6048  * @adapter: board private structure
6049  *
6050  * Free all receive software resources
6051  **/
6052 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6053 {
6054         int i;
6055
6056 #ifdef IXGBE_FCOE
6057         ixgbe_free_fcoe_ddp_resources(adapter);
6058
6059 #endif
6060         for (i = 0; i < adapter->num_rx_queues; i++)
6061                 if (adapter->rx_ring[i]->desc)
6062                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6063 }
6064
6065 /**
6066  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6067  * @netdev: network interface device structure
6068  * @new_mtu: new value for maximum frame size
6069  *
6070  * Returns 0 on success, negative on failure
6071  **/
6072 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6073 {
6074         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6075         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
6076
6077         /* MTU < 68 is an error and causes problems on some kernels */
6078         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
6079                 return -EINVAL;
6080
6081         /*
6082          * For 82599EB we cannot allow legacy VFs to enable their receive
6083          * paths when MTU greater than 1500 is configured.  So display a
6084          * warning that legacy VFs will be disabled.
6085          */
6086         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6087             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6088             (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
6089                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6090
6091         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6092
6093         /* must set new MTU before calling down or up */
6094         netdev->mtu = new_mtu;
6095
6096         if (netif_running(netdev))
6097                 ixgbe_reinit_locked(adapter);
6098
6099         return 0;
6100 }
6101
6102 /**
6103  * ixgbe_open - Called when a network interface is made active
6104  * @netdev: network interface device structure
6105  *
6106  * Returns 0 on success, negative value on failure
6107  *
6108  * The open entry point is called when a network interface is made
6109  * active by the system (IFF_UP).  At this point all resources needed
6110  * for transmit and receive operations are allocated, the interrupt
6111  * handler is registered with the OS, the watchdog timer is started,
6112  * and the stack is notified that the interface is ready.
6113  **/
6114 int ixgbe_open(struct net_device *netdev)
6115 {
6116         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6117         struct ixgbe_hw *hw = &adapter->hw;
6118         int err, queues;
6119
6120         /* disallow open during test */
6121         if (test_bit(__IXGBE_TESTING, &adapter->state))
6122                 return -EBUSY;
6123
6124         netif_carrier_off(netdev);
6125
6126         /* allocate transmit descriptors */
6127         err = ixgbe_setup_all_tx_resources(adapter);
6128         if (err)
6129                 goto err_setup_tx;
6130
6131         /* allocate receive descriptors */
6132         err = ixgbe_setup_all_rx_resources(adapter);
6133         if (err)
6134                 goto err_setup_rx;
6135
6136         ixgbe_configure(adapter);
6137
6138         err = ixgbe_request_irq(adapter);
6139         if (err)
6140                 goto err_req_irq;
6141
6142         /* Notify the stack of the actual queue counts. */
6143         if (adapter->num_rx_pools > 1)
6144                 queues = adapter->num_rx_queues_per_pool;
6145         else
6146                 queues = adapter->num_tx_queues;
6147
6148         err = netif_set_real_num_tx_queues(netdev, queues);
6149         if (err)
6150                 goto err_set_queues;
6151
6152         if (adapter->num_rx_pools > 1 &&
6153             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
6154                 queues = IXGBE_MAX_L2A_QUEUES;
6155         else
6156                 queues = adapter->num_rx_queues;
6157         err = netif_set_real_num_rx_queues(netdev, queues);
6158         if (err)
6159                 goto err_set_queues;
6160
6161         ixgbe_ptp_init(adapter);
6162
6163         ixgbe_up_complete(adapter);
6164
6165         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6166         udp_tunnel_get_rx_info(netdev);
6167
6168         return 0;
6169
6170 err_set_queues:
6171         ixgbe_free_irq(adapter);
6172 err_req_irq:
6173         ixgbe_free_all_rx_resources(adapter);
6174         if (hw->phy.ops.set_phy_power && !adapter->wol)
6175                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6176 err_setup_rx:
6177         ixgbe_free_all_tx_resources(adapter);
6178 err_setup_tx:
6179         ixgbe_reset(adapter);
6180
6181         return err;
6182 }
6183
6184 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6185 {
6186         ixgbe_ptp_suspend(adapter);
6187
6188         if (adapter->hw.phy.ops.enter_lplu) {
6189                 adapter->hw.phy.reset_disable = true;
6190                 ixgbe_down(adapter);
6191                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6192                 adapter->hw.phy.reset_disable = false;
6193         } else {
6194                 ixgbe_down(adapter);
6195         }
6196
6197         ixgbe_free_irq(adapter);
6198
6199         ixgbe_free_all_tx_resources(adapter);
6200         ixgbe_free_all_rx_resources(adapter);
6201 }
6202
6203 /**
6204  * ixgbe_close - Disables a network interface
6205  * @netdev: network interface device structure
6206  *
6207  * Returns 0, this is not allowed to fail
6208  *
6209  * The close entry point is called when an interface is de-activated
6210  * by the OS.  The hardware is still under the drivers control, but
6211  * needs to be disabled.  A global MAC reset is issued to stop the
6212  * hardware, and all transmit and receive resources are freed.
6213  **/
6214 int ixgbe_close(struct net_device *netdev)
6215 {
6216         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6217
6218         ixgbe_ptp_stop(adapter);
6219
6220         if (netif_device_present(netdev))
6221                 ixgbe_close_suspend(adapter);
6222
6223         ixgbe_fdir_filter_exit(adapter);
6224
6225         ixgbe_release_hw_control(adapter);
6226
6227         return 0;
6228 }
6229
6230 #ifdef CONFIG_PM
6231 static int ixgbe_resume(struct pci_dev *pdev)
6232 {
6233         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6234         struct net_device *netdev = adapter->netdev;
6235         u32 err;
6236
6237         adapter->hw.hw_addr = adapter->io_addr;
6238         pci_set_power_state(pdev, PCI_D0);
6239         pci_restore_state(pdev);
6240         /*
6241          * pci_restore_state clears dev->state_saved so call
6242          * pci_save_state to restore it.
6243          */
6244         pci_save_state(pdev);
6245
6246         err = pci_enable_device_mem(pdev);
6247         if (err) {
6248                 e_dev_err("Cannot enable PCI device from suspend\n");
6249                 return err;
6250         }
6251         smp_mb__before_atomic();
6252         clear_bit(__IXGBE_DISABLED, &adapter->state);
6253         pci_set_master(pdev);
6254
6255         pci_wake_from_d3(pdev, false);
6256
6257         ixgbe_reset(adapter);
6258
6259         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6260
6261         rtnl_lock();
6262         err = ixgbe_init_interrupt_scheme(adapter);
6263         if (!err && netif_running(netdev))
6264                 err = ixgbe_open(netdev);
6265
6266
6267         if (!err)
6268                 netif_device_attach(netdev);
6269         rtnl_unlock();
6270
6271         return err;
6272 }
6273 #endif /* CONFIG_PM */
6274
6275 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6276 {
6277         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6278         struct net_device *netdev = adapter->netdev;
6279         struct ixgbe_hw *hw = &adapter->hw;
6280         u32 ctrl, fctrl;
6281         u32 wufc = adapter->wol;
6282 #ifdef CONFIG_PM
6283         int retval = 0;
6284 #endif
6285
6286         rtnl_lock();
6287         netif_device_detach(netdev);
6288
6289         if (netif_running(netdev))
6290                 ixgbe_close_suspend(adapter);
6291
6292         ixgbe_clear_interrupt_scheme(adapter);
6293         rtnl_unlock();
6294
6295 #ifdef CONFIG_PM
6296         retval = pci_save_state(pdev);
6297         if (retval)
6298                 return retval;
6299
6300 #endif
6301         if (hw->mac.ops.stop_link_on_d3)
6302                 hw->mac.ops.stop_link_on_d3(hw);
6303
6304         if (wufc) {
6305                 ixgbe_set_rx_mode(netdev);
6306
6307                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6308                 if (hw->mac.ops.enable_tx_laser)
6309                         hw->mac.ops.enable_tx_laser(hw);
6310
6311                 /* turn on all-multi mode if wake on multicast is enabled */
6312                 if (wufc & IXGBE_WUFC_MC) {
6313                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6314                         fctrl |= IXGBE_FCTRL_MPE;
6315                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6316                 }
6317
6318                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6319                 ctrl |= IXGBE_CTRL_GIO_DIS;
6320                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6321
6322                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6323         } else {
6324                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6325                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6326         }
6327
6328         switch (hw->mac.type) {
6329         case ixgbe_mac_82598EB:
6330                 pci_wake_from_d3(pdev, false);
6331                 break;
6332         case ixgbe_mac_82599EB:
6333         case ixgbe_mac_X540:
6334         case ixgbe_mac_X550:
6335         case ixgbe_mac_X550EM_x:
6336         case ixgbe_mac_x550em_a:
6337                 pci_wake_from_d3(pdev, !!wufc);
6338                 break;
6339         default:
6340                 break;
6341         }
6342
6343         *enable_wake = !!wufc;
6344         if (hw->phy.ops.set_phy_power && !*enable_wake)
6345                 hw->phy.ops.set_phy_power(hw, false);
6346
6347         ixgbe_release_hw_control(adapter);
6348
6349         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6350                 pci_disable_device(pdev);
6351
6352         return 0;
6353 }
6354
6355 #ifdef CONFIG_PM
6356 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6357 {
6358         int retval;
6359         bool wake;
6360
6361         retval = __ixgbe_shutdown(pdev, &wake);
6362         if (retval)
6363                 return retval;
6364
6365         if (wake) {
6366                 pci_prepare_to_sleep(pdev);
6367         } else {
6368                 pci_wake_from_d3(pdev, false);
6369                 pci_set_power_state(pdev, PCI_D3hot);
6370         }
6371
6372         return 0;
6373 }
6374 #endif /* CONFIG_PM */
6375
6376 static void ixgbe_shutdown(struct pci_dev *pdev)
6377 {
6378         bool wake;
6379
6380         __ixgbe_shutdown(pdev, &wake);
6381
6382         if (system_state == SYSTEM_POWER_OFF) {
6383                 pci_wake_from_d3(pdev, wake);
6384                 pci_set_power_state(pdev, PCI_D3hot);
6385         }
6386 }
6387
6388 /**
6389  * ixgbe_update_stats - Update the board statistics counters.
6390  * @adapter: board private structure
6391  **/
6392 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6393 {
6394         struct net_device *netdev = adapter->netdev;
6395         struct ixgbe_hw *hw = &adapter->hw;
6396         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6397         u64 total_mpc = 0;
6398         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6399         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6400         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6401         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6402
6403         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6404             test_bit(__IXGBE_RESETTING, &adapter->state))
6405                 return;
6406
6407         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6408                 u64 rsc_count = 0;
6409                 u64 rsc_flush = 0;
6410                 for (i = 0; i < adapter->num_rx_queues; i++) {
6411                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6412                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6413                 }
6414                 adapter->rsc_total_count = rsc_count;
6415                 adapter->rsc_total_flush = rsc_flush;
6416         }
6417
6418         for (i = 0; i < adapter->num_rx_queues; i++) {
6419                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6420                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6421                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6422                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6423                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6424                 bytes += rx_ring->stats.bytes;
6425                 packets += rx_ring->stats.packets;
6426         }
6427         adapter->non_eop_descs = non_eop_descs;
6428         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6429         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6430         adapter->hw_csum_rx_error = hw_csum_rx_error;
6431         netdev->stats.rx_bytes = bytes;
6432         netdev->stats.rx_packets = packets;
6433
6434         bytes = 0;
6435         packets = 0;
6436         /* gather some stats to the adapter struct that are per queue */
6437         for (i = 0; i < adapter->num_tx_queues; i++) {
6438                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6439                 restart_queue += tx_ring->tx_stats.restart_queue;
6440                 tx_busy += tx_ring->tx_stats.tx_busy;
6441                 bytes += tx_ring->stats.bytes;
6442                 packets += tx_ring->stats.packets;
6443         }
6444         adapter->restart_queue = restart_queue;
6445         adapter->tx_busy = tx_busy;
6446         netdev->stats.tx_bytes = bytes;
6447         netdev->stats.tx_packets = packets;
6448
6449         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6450
6451         /* 8 register reads */
6452         for (i = 0; i < 8; i++) {
6453                 /* for packet buffers not used, the register should read 0 */
6454                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6455                 missed_rx += mpc;
6456                 hwstats->mpc[i] += mpc;
6457                 total_mpc += hwstats->mpc[i];
6458                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6459                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6460                 switch (hw->mac.type) {
6461                 case ixgbe_mac_82598EB:
6462                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6463                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6464                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6465                         hwstats->pxonrxc[i] +=
6466                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6467                         break;
6468                 case ixgbe_mac_82599EB:
6469                 case ixgbe_mac_X540:
6470                 case ixgbe_mac_X550:
6471                 case ixgbe_mac_X550EM_x:
6472                 case ixgbe_mac_x550em_a:
6473                         hwstats->pxonrxc[i] +=
6474                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6475                         break;
6476                 default:
6477                         break;
6478                 }
6479         }
6480
6481         /*16 register reads */
6482         for (i = 0; i < 16; i++) {
6483                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6484                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6485                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6486                     (hw->mac.type == ixgbe_mac_X540) ||
6487                     (hw->mac.type == ixgbe_mac_X550) ||
6488                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
6489                     (hw->mac.type == ixgbe_mac_x550em_a)) {
6490                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6491                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6492                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6493                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6494                 }
6495         }
6496
6497         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6498         /* work around hardware counting issue */
6499         hwstats->gprc -= missed_rx;
6500
6501         ixgbe_update_xoff_received(adapter);
6502
6503         /* 82598 hardware only has a 32 bit counter in the high register */
6504         switch (hw->mac.type) {
6505         case ixgbe_mac_82598EB:
6506                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6507                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6508                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6509                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6510                 break;
6511         case ixgbe_mac_X540:
6512         case ixgbe_mac_X550:
6513         case ixgbe_mac_X550EM_x:
6514         case ixgbe_mac_x550em_a:
6515                 /* OS2BMC stats are X540 and later */
6516                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6517                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6518                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6519                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6520         case ixgbe_mac_82599EB:
6521                 for (i = 0; i < 16; i++)
6522                         adapter->hw_rx_no_dma_resources +=
6523                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6524                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6525                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6526                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6527                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6528                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6529                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6530                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6531                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6532                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6533 #ifdef IXGBE_FCOE
6534                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6535                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6536                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6537                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6538                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6539                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6540                 /* Add up per cpu counters for total ddp aloc fail */
6541                 if (adapter->fcoe.ddp_pool) {
6542                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6543                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6544                         unsigned int cpu;
6545                         u64 noddp = 0, noddp_ext_buff = 0;
6546                         for_each_possible_cpu(cpu) {
6547                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6548                                 noddp += ddp_pool->noddp;
6549                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6550                         }
6551                         hwstats->fcoe_noddp = noddp;
6552                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6553                 }
6554 #endif /* IXGBE_FCOE */
6555                 break;
6556         default:
6557                 break;
6558         }
6559         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6560         hwstats->bprc += bprc;
6561         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6562         if (hw->mac.type == ixgbe_mac_82598EB)
6563                 hwstats->mprc -= bprc;
6564         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6565         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6566         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6567         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6568         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6569         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6570         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6571         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6572         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6573         hwstats->lxontxc += lxon;
6574         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6575         hwstats->lxofftxc += lxoff;
6576         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6577         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6578         /*
6579          * 82598 errata - tx of flow control packets is included in tx counters
6580          */
6581         xon_off_tot = lxon + lxoff;
6582         hwstats->gptc -= xon_off_tot;
6583         hwstats->mptc -= xon_off_tot;
6584         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6585         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6586         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6587         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6588         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6589         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6590         hwstats->ptc64 -= xon_off_tot;
6591         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6592         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6593         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6594         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6595         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6596         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6597
6598         /* Fill out the OS statistics structure */
6599         netdev->stats.multicast = hwstats->mprc;
6600
6601         /* Rx Errors */
6602         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6603         netdev->stats.rx_dropped = 0;
6604         netdev->stats.rx_length_errors = hwstats->rlec;
6605         netdev->stats.rx_crc_errors = hwstats->crcerrs;
6606         netdev->stats.rx_missed_errors = total_mpc;
6607 }
6608
6609 /**
6610  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6611  * @adapter: pointer to the device adapter structure
6612  **/
6613 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6614 {
6615         struct ixgbe_hw *hw = &adapter->hw;
6616         int i;
6617
6618         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6619                 return;
6620
6621         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6622
6623         /* if interface is down do nothing */
6624         if (test_bit(__IXGBE_DOWN, &adapter->state))
6625                 return;
6626
6627         /* do nothing if we are not using signature filters */
6628         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6629                 return;
6630
6631         adapter->fdir_overflow++;
6632
6633         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6634                 for (i = 0; i < adapter->num_tx_queues; i++)
6635                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6636                                 &(adapter->tx_ring[i]->state));
6637                 /* re-enable flow director interrupts */
6638                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6639         } else {
6640                 e_err(probe, "failed to finish FDIR re-initialization, "
6641                       "ignored adding FDIR ATR filters\n");
6642         }
6643 }
6644
6645 /**
6646  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6647  * @adapter: pointer to the device adapter structure
6648  *
6649  * This function serves two purposes.  First it strobes the interrupt lines
6650  * in order to make certain interrupts are occurring.  Secondly it sets the
6651  * bits needed to check for TX hangs.  As a result we should immediately
6652  * determine if a hang has occurred.
6653  */
6654 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6655 {
6656         struct ixgbe_hw *hw = &adapter->hw;
6657         u64 eics = 0;
6658         int i;
6659
6660         /* If we're down, removing or resetting, just bail */
6661         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6662             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6663             test_bit(__IXGBE_RESETTING, &adapter->state))
6664                 return;
6665
6666         /* Force detection of hung controller */
6667         if (netif_carrier_ok(adapter->netdev)) {
6668                 for (i = 0; i < adapter->num_tx_queues; i++)
6669                         set_check_for_tx_hang(adapter->tx_ring[i]);
6670         }
6671
6672         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6673                 /*
6674                  * for legacy and MSI interrupts don't set any bits
6675                  * that are enabled for EIAM, because this operation
6676                  * would set *both* EIMS and EICS for any bit in EIAM
6677                  */
6678                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6679                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6680         } else {
6681                 /* get one bit for every active tx/rx interrupt vector */
6682                 for (i = 0; i < adapter->num_q_vectors; i++) {
6683                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
6684                         if (qv->rx.ring || qv->tx.ring)
6685                                 eics |= BIT_ULL(i);
6686                 }
6687         }
6688
6689         /* Cause software interrupt to ensure rings are cleaned */
6690         ixgbe_irq_rearm_queues(adapter, eics);
6691 }
6692
6693 /**
6694  * ixgbe_watchdog_update_link - update the link status
6695  * @adapter: pointer to the device adapter structure
6696  * @link_speed: pointer to a u32 to store the link_speed
6697  **/
6698 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6699 {
6700         struct ixgbe_hw *hw = &adapter->hw;
6701         u32 link_speed = adapter->link_speed;
6702         bool link_up = adapter->link_up;
6703         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6704
6705         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6706                 return;
6707
6708         if (hw->mac.ops.check_link) {
6709                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6710         } else {
6711                 /* always assume link is up, if no check link function */
6712                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6713                 link_up = true;
6714         }
6715
6716         if (adapter->ixgbe_ieee_pfc)
6717                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6718
6719         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6720                 hw->mac.ops.fc_enable(hw);
6721                 ixgbe_set_rx_drop_en(adapter);
6722         }
6723
6724         if (link_up ||
6725             time_after(jiffies, (adapter->link_check_timeout +
6726                                  IXGBE_TRY_LINK_TIMEOUT))) {
6727                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6728                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6729                 IXGBE_WRITE_FLUSH(hw);
6730         }
6731
6732         adapter->link_up = link_up;
6733         adapter->link_speed = link_speed;
6734 }
6735
6736 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6737 {
6738 #ifdef CONFIG_IXGBE_DCB
6739         struct net_device *netdev = adapter->netdev;
6740         struct dcb_app app = {
6741                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6742                               .protocol = 0,
6743                              };
6744         u8 up = 0;
6745
6746         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6747                 up = dcb_ieee_getapp_mask(netdev, &app);
6748
6749         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6750 #endif
6751 }
6752
6753 /**
6754  * ixgbe_watchdog_link_is_up - update netif_carrier status and
6755  *                             print link up message
6756  * @adapter: pointer to the device adapter structure
6757  **/
6758 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6759 {
6760         struct net_device *netdev = adapter->netdev;
6761         struct ixgbe_hw *hw = &adapter->hw;
6762         struct net_device *upper;
6763         struct list_head *iter;
6764         u32 link_speed = adapter->link_speed;
6765         const char *speed_str;
6766         bool flow_rx, flow_tx;
6767
6768         /* only continue if link was previously down */
6769         if (netif_carrier_ok(netdev))
6770                 return;
6771
6772         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6773
6774         switch (hw->mac.type) {
6775         case ixgbe_mac_82598EB: {
6776                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6777                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6778                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6779                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6780         }
6781                 break;
6782         case ixgbe_mac_X540:
6783         case ixgbe_mac_X550:
6784         case ixgbe_mac_X550EM_x:
6785         case ixgbe_mac_x550em_a:
6786         case ixgbe_mac_82599EB: {
6787                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6788                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6789                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6790                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6791         }
6792                 break;
6793         default:
6794                 flow_tx = false;
6795                 flow_rx = false;
6796                 break;
6797         }
6798
6799         adapter->last_rx_ptp_check = jiffies;
6800
6801         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6802                 ixgbe_ptp_start_cyclecounter(adapter);
6803
6804         switch (link_speed) {
6805         case IXGBE_LINK_SPEED_10GB_FULL:
6806                 speed_str = "10 Gbps";
6807                 break;
6808         case IXGBE_LINK_SPEED_2_5GB_FULL:
6809                 speed_str = "2.5 Gbps";
6810                 break;
6811         case IXGBE_LINK_SPEED_1GB_FULL:
6812                 speed_str = "1 Gbps";
6813                 break;
6814         case IXGBE_LINK_SPEED_100_FULL:
6815                 speed_str = "100 Mbps";
6816                 break;
6817         default:
6818                 speed_str = "unknown speed";
6819                 break;
6820         }
6821         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6822                ((flow_rx && flow_tx) ? "RX/TX" :
6823                (flow_rx ? "RX" :
6824                (flow_tx ? "TX" : "None"))));
6825
6826         netif_carrier_on(netdev);
6827         ixgbe_check_vf_rate_limit(adapter);
6828
6829         /* enable transmits */
6830         netif_tx_wake_all_queues(adapter->netdev);
6831
6832         /* enable any upper devices */
6833         rtnl_lock();
6834         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6835                 if (netif_is_macvlan(upper)) {
6836                         struct macvlan_dev *vlan = netdev_priv(upper);
6837
6838                         if (vlan->fwd_priv)
6839                                 netif_tx_wake_all_queues(upper);
6840                 }
6841         }
6842         rtnl_unlock();
6843
6844         /* update the default user priority for VFs */
6845         ixgbe_update_default_up(adapter);
6846
6847         /* ping all the active vfs to let them know link has changed */
6848         ixgbe_ping_all_vfs(adapter);
6849 }
6850
6851 /**
6852  * ixgbe_watchdog_link_is_down - update netif_carrier status and
6853  *                               print link down message
6854  * @adapter: pointer to the adapter structure
6855  **/
6856 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6857 {
6858         struct net_device *netdev = adapter->netdev;
6859         struct ixgbe_hw *hw = &adapter->hw;
6860
6861         adapter->link_up = false;
6862         adapter->link_speed = 0;
6863
6864         /* only continue if link was up previously */
6865         if (!netif_carrier_ok(netdev))
6866                 return;
6867
6868         /* poll for SFP+ cable when link is down */
6869         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6870                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6871
6872         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6873                 ixgbe_ptp_start_cyclecounter(adapter);
6874
6875         e_info(drv, "NIC Link is Down\n");
6876         netif_carrier_off(netdev);
6877
6878         /* ping all the active vfs to let them know link has changed */
6879         ixgbe_ping_all_vfs(adapter);
6880 }
6881
6882 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6883 {
6884         int i;
6885
6886         for (i = 0; i < adapter->num_tx_queues; i++) {
6887                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6888
6889                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6890                         return true;
6891         }
6892
6893         return false;
6894 }
6895
6896 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6897 {
6898         struct ixgbe_hw *hw = &adapter->hw;
6899         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6900         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6901
6902         int i, j;
6903
6904         if (!adapter->num_vfs)
6905                 return false;
6906
6907         /* resetting the PF is only needed for MAC before X550 */
6908         if (hw->mac.type >= ixgbe_mac_X550)
6909                 return false;
6910
6911         for (i = 0; i < adapter->num_vfs; i++) {
6912                 for (j = 0; j < q_per_pool; j++) {
6913                         u32 h, t;
6914
6915                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6916                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6917
6918                         if (h != t)
6919                                 return true;
6920                 }
6921         }
6922
6923         return false;
6924 }
6925
6926 /**
6927  * ixgbe_watchdog_flush_tx - flush queues on link down
6928  * @adapter: pointer to the device adapter structure
6929  **/
6930 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6931 {
6932         if (!netif_carrier_ok(adapter->netdev)) {
6933                 if (ixgbe_ring_tx_pending(adapter) ||
6934                     ixgbe_vf_tx_pending(adapter)) {
6935                         /* We've lost link, so the controller stops DMA,
6936                          * but we've got queued Tx work that's never going
6937                          * to get done, so reset controller to flush Tx.
6938                          * (Do the reset outside of interrupt context).
6939                          */
6940                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6941                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6942                 }
6943         }
6944 }
6945
6946 #ifdef CONFIG_PCI_IOV
6947 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6948                                       struct pci_dev *vfdev)
6949 {
6950         if (!pci_wait_for_pending_transaction(vfdev))
6951                 e_dev_warn("Issuing VFLR with pending transactions\n");
6952
6953         e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6954         pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6955
6956         msleep(100);
6957 }
6958
6959 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6960 {
6961         struct ixgbe_hw *hw = &adapter->hw;
6962         struct pci_dev *pdev = adapter->pdev;
6963         unsigned int vf;
6964         u32 gpc;
6965
6966         if (!(netif_carrier_ok(adapter->netdev)))
6967                 return;
6968
6969         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6970         if (gpc) /* If incrementing then no need for the check below */
6971                 return;
6972         /* Check to see if a bad DMA write target from an errant or
6973          * malicious VF has caused a PCIe error.  If so then we can
6974          * issue a VFLR to the offending VF(s) and then resume without
6975          * requesting a full slot reset.
6976          */
6977
6978         if (!pdev)
6979                 return;
6980
6981         /* check status reg for all VFs owned by this PF */
6982         for (vf = 0; vf < adapter->num_vfs; ++vf) {
6983                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
6984                 u16 status_reg;
6985
6986                 if (!vfdev)
6987                         continue;
6988                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6989                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
6990                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
6991                         ixgbe_issue_vf_flr(adapter, vfdev);
6992         }
6993 }
6994
6995 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6996 {
6997         u32 ssvpc;
6998
6999         /* Do not perform spoof check for 82598 or if not in IOV mode */
7000         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7001             adapter->num_vfs == 0)
7002                 return;
7003
7004         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7005
7006         /*
7007          * ssvpc register is cleared on read, if zero then no
7008          * spoofed packets in the last interval.
7009          */
7010         if (!ssvpc)
7011                 return;
7012
7013         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7014 }
7015 #else
7016 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7017 {
7018 }
7019
7020 static void
7021 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7022 {
7023 }
7024 #endif /* CONFIG_PCI_IOV */
7025
7026
7027 /**
7028  * ixgbe_watchdog_subtask - check and bring link up
7029  * @adapter: pointer to the device adapter structure
7030  **/
7031 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7032 {
7033         /* if interface is down, removing or resetting, do nothing */
7034         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7035             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7036             test_bit(__IXGBE_RESETTING, &adapter->state))
7037                 return;
7038
7039         ixgbe_watchdog_update_link(adapter);
7040
7041         if (adapter->link_up)
7042                 ixgbe_watchdog_link_is_up(adapter);
7043         else
7044                 ixgbe_watchdog_link_is_down(adapter);
7045
7046         ixgbe_check_for_bad_vf(adapter);
7047         ixgbe_spoof_check(adapter);
7048         ixgbe_update_stats(adapter);
7049
7050         ixgbe_watchdog_flush_tx(adapter);
7051 }
7052
7053 /**
7054  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7055  * @adapter: the ixgbe adapter structure
7056  **/
7057 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7058 {
7059         struct ixgbe_hw *hw = &adapter->hw;
7060         s32 err;
7061
7062         /* not searching for SFP so there is nothing to do here */
7063         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7064             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7065                 return;
7066
7067         if (adapter->sfp_poll_time &&
7068             time_after(adapter->sfp_poll_time, jiffies))
7069                 return; /* If not yet time to poll for SFP */
7070
7071         /* someone else is in init, wait until next service event */
7072         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7073                 return;
7074
7075         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7076
7077         err = hw->phy.ops.identify_sfp(hw);
7078         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7079                 goto sfp_out;
7080
7081         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7082                 /* If no cable is present, then we need to reset
7083                  * the next time we find a good cable. */
7084                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7085         }
7086
7087         /* exit on error */
7088         if (err)
7089                 goto sfp_out;
7090
7091         /* exit if reset not needed */
7092         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7093                 goto sfp_out;
7094
7095         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7096
7097         /*
7098          * A module may be identified correctly, but the EEPROM may not have
7099          * support for that module.  setup_sfp() will fail in that case, so
7100          * we should not allow that module to load.
7101          */
7102         if (hw->mac.type == ixgbe_mac_82598EB)
7103                 err = hw->phy.ops.reset(hw);
7104         else
7105                 err = hw->mac.ops.setup_sfp(hw);
7106
7107         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7108                 goto sfp_out;
7109
7110         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7111         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7112
7113 sfp_out:
7114         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7115
7116         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7117             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7118                 e_dev_err("failed to initialize because an unsupported "
7119                           "SFP+ module type was detected.\n");
7120                 e_dev_err("Reload the driver after installing a "
7121                           "supported module.\n");
7122                 unregister_netdev(adapter->netdev);
7123         }
7124 }
7125
7126 /**
7127  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7128  * @adapter: the ixgbe adapter structure
7129  **/
7130 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7131 {
7132         struct ixgbe_hw *hw = &adapter->hw;
7133         u32 speed;
7134         bool autoneg = false;
7135
7136         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7137                 return;
7138
7139         /* someone else is in init, wait until next service event */
7140         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7141                 return;
7142
7143         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7144
7145         speed = hw->phy.autoneg_advertised;
7146         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
7147                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
7148
7149                 /* setup the highest link when no autoneg */
7150                 if (!autoneg) {
7151                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
7152                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7153                 }
7154         }
7155
7156         if (hw->mac.ops.setup_link)
7157                 hw->mac.ops.setup_link(hw, speed, true);
7158
7159         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7160         adapter->link_check_timeout = jiffies;
7161         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7162 }
7163
7164 /**
7165  * ixgbe_service_timer - Timer Call-back
7166  * @data: pointer to adapter cast into an unsigned long
7167  **/
7168 static void ixgbe_service_timer(unsigned long data)
7169 {
7170         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
7171         unsigned long next_event_offset;
7172
7173         /* poll faster when waiting for link */
7174         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7175                 next_event_offset = HZ / 10;
7176         else
7177                 next_event_offset = HZ * 2;
7178
7179         /* Reset the timer */
7180         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7181
7182         ixgbe_service_event_schedule(adapter);
7183 }
7184
7185 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7186 {
7187         struct ixgbe_hw *hw = &adapter->hw;
7188         u32 status;
7189
7190         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7191                 return;
7192
7193         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7194
7195         if (!hw->phy.ops.handle_lasi)
7196                 return;
7197
7198         status = hw->phy.ops.handle_lasi(&adapter->hw);
7199         if (status != IXGBE_ERR_OVERTEMP)
7200                 return;
7201
7202         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7203 }
7204
7205 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7206 {
7207         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7208                 return;
7209
7210         /* If we're already down, removing or resetting, just bail */
7211         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7212             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7213             test_bit(__IXGBE_RESETTING, &adapter->state))
7214                 return;
7215
7216         ixgbe_dump(adapter);
7217         netdev_err(adapter->netdev, "Reset adapter\n");
7218         adapter->tx_timeout_count++;
7219
7220         rtnl_lock();
7221         ixgbe_reinit_locked(adapter);
7222         rtnl_unlock();
7223 }
7224
7225 /**
7226  * ixgbe_service_task - manages and runs subtasks
7227  * @work: pointer to work_struct containing our data
7228  **/
7229 static void ixgbe_service_task(struct work_struct *work)
7230 {
7231         struct ixgbe_adapter *adapter = container_of(work,
7232                                                      struct ixgbe_adapter,
7233                                                      service_task);
7234         if (ixgbe_removed(adapter->hw.hw_addr)) {
7235                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7236                         rtnl_lock();
7237                         ixgbe_down(adapter);
7238                         rtnl_unlock();
7239                 }
7240                 ixgbe_service_event_complete(adapter);
7241                 return;
7242         }
7243         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7244                 rtnl_lock();
7245                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7246                 udp_tunnel_get_rx_info(adapter->netdev);
7247                 rtnl_unlock();
7248         }
7249         ixgbe_reset_subtask(adapter);
7250         ixgbe_phy_interrupt_subtask(adapter);
7251         ixgbe_sfp_detection_subtask(adapter);
7252         ixgbe_sfp_link_config_subtask(adapter);
7253         ixgbe_check_overtemp_subtask(adapter);
7254         ixgbe_watchdog_subtask(adapter);
7255         ixgbe_fdir_reinit_subtask(adapter);
7256         ixgbe_check_hang_subtask(adapter);
7257
7258         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7259                 ixgbe_ptp_overflow_check(adapter);
7260                 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7261                         ixgbe_ptp_rx_hang(adapter);
7262                 ixgbe_ptp_tx_hang(adapter);
7263         }
7264
7265         ixgbe_service_event_complete(adapter);
7266 }
7267
7268 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7269                      struct ixgbe_tx_buffer *first,
7270                      u8 *hdr_len)
7271 {
7272         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7273         struct sk_buff *skb = first->skb;
7274         union {
7275                 struct iphdr *v4;
7276                 struct ipv6hdr *v6;
7277                 unsigned char *hdr;
7278         } ip;
7279         union {
7280                 struct tcphdr *tcp;
7281                 unsigned char *hdr;
7282         } l4;
7283         u32 paylen, l4_offset;
7284         int err;
7285
7286         if (skb->ip_summed != CHECKSUM_PARTIAL)
7287                 return 0;
7288
7289         if (!skb_is_gso(skb))
7290                 return 0;
7291
7292         err = skb_cow_head(skb, 0);
7293         if (err < 0)
7294                 return err;
7295
7296         ip.hdr = skb_network_header(skb);
7297         l4.hdr = skb_checksum_start(skb);
7298
7299         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7300         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7301
7302         /* initialize outer IP header fields */
7303         if (ip.v4->version == 4) {
7304                 unsigned char *csum_start = skb_checksum_start(skb);
7305                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7306
7307                 /* IP header will have to cancel out any data that
7308                  * is not a part of the outer IP header
7309                  */
7310                 ip.v4->check = csum_fold(csum_partial(trans_start,
7311                                                       csum_start - trans_start,
7312                                                       0));
7313                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7314
7315                 ip.v4->tot_len = 0;
7316                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7317                                    IXGBE_TX_FLAGS_CSUM |
7318                                    IXGBE_TX_FLAGS_IPV4;
7319         } else {
7320                 ip.v6->payload_len = 0;
7321                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7322                                    IXGBE_TX_FLAGS_CSUM;
7323         }
7324
7325         /* determine offset of inner transport header */
7326         l4_offset = l4.hdr - skb->data;
7327
7328         /* compute length of segmentation header */
7329         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7330
7331         /* remove payload length from inner checksum */
7332         paylen = skb->len - l4_offset;
7333         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7334
7335         /* update gso size and bytecount with header size */
7336         first->gso_segs = skb_shinfo(skb)->gso_segs;
7337         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7338
7339         /* mss_l4len_id: use 0 as index for TSO */
7340         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7341         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7342
7343         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7344         vlan_macip_lens = l4.hdr - ip.hdr;
7345         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7346         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7347
7348         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7349                           mss_l4len_idx);
7350
7351         return 1;
7352 }
7353
7354 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7355 {
7356         unsigned int offset = 0;
7357
7358         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7359
7360         return offset == skb_checksum_start_offset(skb);
7361 }
7362
7363 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7364                           struct ixgbe_tx_buffer *first)
7365 {
7366         struct sk_buff *skb = first->skb;
7367         u32 vlan_macip_lens = 0;
7368         u32 type_tucmd = 0;
7369
7370         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7371 csum_failed:
7372                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7373                                          IXGBE_TX_FLAGS_CC)))
7374                         return;
7375                 goto no_csum;
7376         }
7377
7378         switch (skb->csum_offset) {
7379         case offsetof(struct tcphdr, check):
7380                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7381                 /* fall through */
7382         case offsetof(struct udphdr, check):
7383                 break;
7384         case offsetof(struct sctphdr, checksum):
7385                 /* validate that this is actually an SCTP request */
7386                 if (((first->protocol == htons(ETH_P_IP)) &&
7387                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7388                     ((first->protocol == htons(ETH_P_IPV6)) &&
7389                      ixgbe_ipv6_csum_is_sctp(skb))) {
7390                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7391                         break;
7392                 }
7393                 /* fall through */
7394         default:
7395                 skb_checksum_help(skb);
7396                 goto csum_failed;
7397         }
7398
7399         /* update TX checksum flag */
7400         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7401         vlan_macip_lens = skb_checksum_start_offset(skb) -
7402                           skb_network_offset(skb);
7403 no_csum:
7404         /* vlan_macip_lens: MACLEN, VLAN tag */
7405         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7406         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7407
7408         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7409 }
7410
7411 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7412         ((_flag <= _result) ? \
7413          ((u32)(_input & _flag) * (_result / _flag)) : \
7414          ((u32)(_input & _flag) / (_flag / _result)))
7415
7416 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7417 {
7418         /* set type for advanced descriptor with frame checksum insertion */
7419         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7420                        IXGBE_ADVTXD_DCMD_DEXT |
7421                        IXGBE_ADVTXD_DCMD_IFCS;
7422
7423         /* set HW vlan bit if vlan is present */
7424         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7425                                    IXGBE_ADVTXD_DCMD_VLE);
7426
7427         /* set segmentation enable bits for TSO/FSO */
7428         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7429                                    IXGBE_ADVTXD_DCMD_TSE);
7430
7431         /* set timestamp bit if present */
7432         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7433                                    IXGBE_ADVTXD_MAC_TSTAMP);
7434
7435         /* insert frame checksum */
7436         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7437
7438         return cmd_type;
7439 }
7440
7441 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7442                                    u32 tx_flags, unsigned int paylen)
7443 {
7444         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7445
7446         /* enable L4 checksum for TSO and TX checksum offload */
7447         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7448                                         IXGBE_TX_FLAGS_CSUM,
7449                                         IXGBE_ADVTXD_POPTS_TXSM);
7450
7451         /* enble IPv4 checksum for TSO */
7452         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7453                                         IXGBE_TX_FLAGS_IPV4,
7454                                         IXGBE_ADVTXD_POPTS_IXSM);
7455
7456         /*
7457          * Check Context must be set if Tx switch is enabled, which it
7458          * always is for case where virtual functions are running
7459          */
7460         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7461                                         IXGBE_TX_FLAGS_CC,
7462                                         IXGBE_ADVTXD_CC);
7463
7464         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7465 }
7466
7467 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7468 {
7469         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7470
7471         /* Herbert's original patch had:
7472          *  smp_mb__after_netif_stop_queue();
7473          * but since that doesn't exist yet, just open code it.
7474          */
7475         smp_mb();
7476
7477         /* We need to check again in a case another CPU has just
7478          * made room available.
7479          */
7480         if (likely(ixgbe_desc_unused(tx_ring) < size))
7481                 return -EBUSY;
7482
7483         /* A reprieve! - use start_queue because it doesn't call schedule */
7484         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7485         ++tx_ring->tx_stats.restart_queue;
7486         return 0;
7487 }
7488
7489 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7490 {
7491         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7492                 return 0;
7493
7494         return __ixgbe_maybe_stop_tx(tx_ring, size);
7495 }
7496
7497 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7498                        IXGBE_TXD_CMD_RS)
7499
7500 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7501                          struct ixgbe_tx_buffer *first,
7502                          const u8 hdr_len)
7503 {
7504         struct sk_buff *skb = first->skb;
7505         struct ixgbe_tx_buffer *tx_buffer;
7506         union ixgbe_adv_tx_desc *tx_desc;
7507         struct skb_frag_struct *frag;
7508         dma_addr_t dma;
7509         unsigned int data_len, size;
7510         u32 tx_flags = first->tx_flags;
7511         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7512         u16 i = tx_ring->next_to_use;
7513
7514         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7515
7516         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7517
7518         size = skb_headlen(skb);
7519         data_len = skb->data_len;
7520
7521 #ifdef IXGBE_FCOE
7522         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7523                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7524                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7525                         data_len = 0;
7526                 } else {
7527                         data_len -= sizeof(struct fcoe_crc_eof);
7528                 }
7529         }
7530
7531 #endif
7532         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7533
7534         tx_buffer = first;
7535
7536         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7537                 if (dma_mapping_error(tx_ring->dev, dma))
7538                         goto dma_error;
7539
7540                 /* record length, and DMA address */
7541                 dma_unmap_len_set(tx_buffer, len, size);
7542                 dma_unmap_addr_set(tx_buffer, dma, dma);
7543
7544                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7545
7546                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7547                         tx_desc->read.cmd_type_len =
7548                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7549
7550                         i++;
7551                         tx_desc++;
7552                         if (i == tx_ring->count) {
7553                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7554                                 i = 0;
7555                         }
7556                         tx_desc->read.olinfo_status = 0;
7557
7558                         dma += IXGBE_MAX_DATA_PER_TXD;
7559                         size -= IXGBE_MAX_DATA_PER_TXD;
7560
7561                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7562                 }
7563
7564                 if (likely(!data_len))
7565                         break;
7566
7567                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7568
7569                 i++;
7570                 tx_desc++;
7571                 if (i == tx_ring->count) {
7572                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7573                         i = 0;
7574                 }
7575                 tx_desc->read.olinfo_status = 0;
7576
7577 #ifdef IXGBE_FCOE
7578                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7579 #else
7580                 size = skb_frag_size(frag);
7581 #endif
7582                 data_len -= size;
7583
7584                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7585                                        DMA_TO_DEVICE);
7586
7587                 tx_buffer = &tx_ring->tx_buffer_info[i];
7588         }
7589
7590         /* write last descriptor with RS and EOP bits */
7591         cmd_type |= size | IXGBE_TXD_CMD;
7592         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7593
7594         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7595
7596         /* set the timestamp */
7597         first->time_stamp = jiffies;
7598
7599         /*
7600          * Force memory writes to complete before letting h/w know there
7601          * are new descriptors to fetch.  (Only applicable for weak-ordered
7602          * memory model archs, such as IA-64).
7603          *
7604          * We also need this memory barrier to make certain all of the
7605          * status bits have been updated before next_to_watch is written.
7606          */
7607         wmb();
7608
7609         /* set next_to_watch value indicating a packet is present */
7610         first->next_to_watch = tx_desc;
7611
7612         i++;
7613         if (i == tx_ring->count)
7614                 i = 0;
7615
7616         tx_ring->next_to_use = i;
7617
7618         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7619
7620         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7621                 writel(i, tx_ring->tail);
7622
7623                 /* we need this if more than one processor can write to our tail
7624                  * at a time, it synchronizes IO on IA64/Altix systems
7625                  */
7626                 mmiowb();
7627         }
7628
7629         return;
7630 dma_error:
7631         dev_err(tx_ring->dev, "TX DMA map failed\n");
7632
7633         /* clear dma mappings for failed tx_buffer_info map */
7634         for (;;) {
7635                 tx_buffer = &tx_ring->tx_buffer_info[i];
7636                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7637                 if (tx_buffer == first)
7638                         break;
7639                 if (i == 0)
7640                         i = tx_ring->count;
7641                 i--;
7642         }
7643
7644         tx_ring->next_to_use = i;
7645 }
7646
7647 static void ixgbe_atr(struct ixgbe_ring *ring,
7648                       struct ixgbe_tx_buffer *first)
7649 {
7650         struct ixgbe_q_vector *q_vector = ring->q_vector;
7651         union ixgbe_atr_hash_dword input = { .dword = 0 };
7652         union ixgbe_atr_hash_dword common = { .dword = 0 };
7653         union {
7654                 unsigned char *network;
7655                 struct iphdr *ipv4;
7656                 struct ipv6hdr *ipv6;
7657         } hdr;
7658         struct tcphdr *th;
7659         unsigned int hlen;
7660         struct sk_buff *skb;
7661         __be16 vlan_id;
7662         int l4_proto;
7663
7664         /* if ring doesn't have a interrupt vector, cannot perform ATR */
7665         if (!q_vector)
7666                 return;
7667
7668         /* do nothing if sampling is disabled */
7669         if (!ring->atr_sample_rate)
7670                 return;
7671
7672         ring->atr_count++;
7673
7674         /* currently only IPv4/IPv6 with TCP is supported */
7675         if ((first->protocol != htons(ETH_P_IP)) &&
7676             (first->protocol != htons(ETH_P_IPV6)))
7677                 return;
7678
7679         /* snag network header to get L4 type and address */
7680         skb = first->skb;
7681         hdr.network = skb_network_header(skb);
7682         if (skb->encapsulation &&
7683             first->protocol == htons(ETH_P_IP) &&
7684             hdr.ipv4->protocol != IPPROTO_UDP) {
7685                 struct ixgbe_adapter *adapter = q_vector->adapter;
7686
7687                 /* verify the port is recognized as VXLAN */
7688                 if (adapter->vxlan_port &&
7689                     udp_hdr(skb)->dest == adapter->vxlan_port)
7690                         hdr.network = skb_inner_network_header(skb);
7691
7692                 if (adapter->geneve_port &&
7693                     udp_hdr(skb)->dest == adapter->geneve_port)
7694                         hdr.network = skb_inner_network_header(skb);
7695         }
7696
7697         /* Currently only IPv4/IPv6 with TCP is supported */
7698         switch (hdr.ipv4->version) {
7699         case IPVERSION:
7700                 /* access ihl as u8 to avoid unaligned access on ia64 */
7701                 hlen = (hdr.network[0] & 0x0F) << 2;
7702                 l4_proto = hdr.ipv4->protocol;
7703                 break;
7704         case 6:
7705                 hlen = hdr.network - skb->data;
7706                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
7707                 hlen -= hdr.network - skb->data;
7708                 break;
7709         default:
7710                 return;
7711         }
7712
7713         if (l4_proto != IPPROTO_TCP)
7714                 return;
7715
7716         th = (struct tcphdr *)(hdr.network + hlen);
7717
7718         /* skip this packet since the socket is closing */
7719         if (th->fin)
7720                 return;
7721
7722         /* sample on all syn packets or once every atr sample count */
7723         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7724                 return;
7725
7726         /* reset sample count */
7727         ring->atr_count = 0;
7728
7729         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7730
7731         /*
7732          * src and dst are inverted, think how the receiver sees them
7733          *
7734          * The input is broken into two sections, a non-compressed section
7735          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
7736          * is XORed together and stored in the compressed dword.
7737          */
7738         input.formatted.vlan_id = vlan_id;
7739
7740         /*
7741          * since src port and flex bytes occupy the same word XOR them together
7742          * and write the value to source port portion of compressed dword
7743          */
7744         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7745                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7746         else
7747                 common.port.src ^= th->dest ^ first->protocol;
7748         common.port.dst ^= th->source;
7749
7750         switch (hdr.ipv4->version) {
7751         case IPVERSION:
7752                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7753                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7754                 break;
7755         case 6:
7756                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7757                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7758                              hdr.ipv6->saddr.s6_addr32[1] ^
7759                              hdr.ipv6->saddr.s6_addr32[2] ^
7760                              hdr.ipv6->saddr.s6_addr32[3] ^
7761                              hdr.ipv6->daddr.s6_addr32[0] ^
7762                              hdr.ipv6->daddr.s6_addr32[1] ^
7763                              hdr.ipv6->daddr.s6_addr32[2] ^
7764                              hdr.ipv6->daddr.s6_addr32[3];
7765                 break;
7766         default:
7767                 break;
7768         }
7769
7770         if (hdr.network != skb_network_header(skb))
7771                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7772
7773         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7774         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7775                                               input, common, ring->queue_index);
7776 }
7777
7778 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7779                               void *accel_priv, select_queue_fallback_t fallback)
7780 {
7781         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7782 #ifdef IXGBE_FCOE
7783         struct ixgbe_adapter *adapter;
7784         struct ixgbe_ring_feature *f;
7785         int txq;
7786 #endif
7787
7788         if (fwd_adapter)
7789                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7790
7791 #ifdef IXGBE_FCOE
7792
7793         /*
7794          * only execute the code below if protocol is FCoE
7795          * or FIP and we have FCoE enabled on the adapter
7796          */
7797         switch (vlan_get_protocol(skb)) {
7798         case htons(ETH_P_FCOE):
7799         case htons(ETH_P_FIP):
7800                 adapter = netdev_priv(dev);
7801
7802                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7803                         break;
7804         default:
7805                 return fallback(dev, skb);
7806         }
7807
7808         f = &adapter->ring_feature[RING_F_FCOE];
7809
7810         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7811                                            smp_processor_id();
7812
7813         while (txq >= f->indices)
7814                 txq -= f->indices;
7815
7816         return txq + f->offset;
7817 #else
7818         return fallback(dev, skb);
7819 #endif
7820 }
7821
7822 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7823                           struct ixgbe_adapter *adapter,
7824                           struct ixgbe_ring *tx_ring)
7825 {
7826         struct ixgbe_tx_buffer *first;
7827         int tso;
7828         u32 tx_flags = 0;
7829         unsigned short f;
7830         u16 count = TXD_USE_COUNT(skb_headlen(skb));
7831         __be16 protocol = skb->protocol;
7832         u8 hdr_len = 0;
7833
7834         /*
7835          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7836          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7837          *       + 2 desc gap to keep tail from touching head,
7838          *       + 1 desc for context descriptor,
7839          * otherwise try next time
7840          */
7841         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7842                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7843
7844         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7845                 tx_ring->tx_stats.tx_busy++;
7846                 return NETDEV_TX_BUSY;
7847         }
7848
7849         /* record the location of the first descriptor for this packet */
7850         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7851         first->skb = skb;
7852         first->bytecount = skb->len;
7853         first->gso_segs = 1;
7854
7855         /* if we have a HW VLAN tag being added default to the HW one */
7856         if (skb_vlan_tag_present(skb)) {
7857                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7858                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7859         /* else if it is a SW VLAN check the next protocol and store the tag */
7860         } else if (protocol == htons(ETH_P_8021Q)) {
7861                 struct vlan_hdr *vhdr, _vhdr;
7862                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7863                 if (!vhdr)
7864                         goto out_drop;
7865
7866                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7867                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
7868                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7869         }
7870         protocol = vlan_get_protocol(skb);
7871
7872         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7873             adapter->ptp_clock &&
7874             !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7875                                    &adapter->state)) {
7876                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7877                 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7878
7879                 /* schedule check for Tx timestamp */
7880                 adapter->ptp_tx_skb = skb_get(skb);
7881                 adapter->ptp_tx_start = jiffies;
7882                 schedule_work(&adapter->ptp_tx_work);
7883         }
7884
7885         skb_tx_timestamp(skb);
7886
7887 #ifdef CONFIG_PCI_IOV
7888         /*
7889          * Use the l2switch_enable flag - would be false if the DMA
7890          * Tx switch had been disabled.
7891          */
7892         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7893                 tx_flags |= IXGBE_TX_FLAGS_CC;
7894
7895 #endif
7896         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7897         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7898             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7899              (skb->priority != TC_PRIO_CONTROL))) {
7900                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7901                 tx_flags |= (skb->priority & 0x7) <<
7902                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7903                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7904                         struct vlan_ethhdr *vhdr;
7905
7906                         if (skb_cow_head(skb, 0))
7907                                 goto out_drop;
7908                         vhdr = (struct vlan_ethhdr *)skb->data;
7909                         vhdr->h_vlan_TCI = htons(tx_flags >>
7910                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
7911                 } else {
7912                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7913                 }
7914         }
7915
7916         /* record initial flags and protocol */
7917         first->tx_flags = tx_flags;
7918         first->protocol = protocol;
7919
7920 #ifdef IXGBE_FCOE
7921         /* setup tx offload for FCoE */
7922         if ((protocol == htons(ETH_P_FCOE)) &&
7923             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7924                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7925                 if (tso < 0)
7926                         goto out_drop;
7927
7928                 goto xmit_fcoe;
7929         }
7930
7931 #endif /* IXGBE_FCOE */
7932         tso = ixgbe_tso(tx_ring, first, &hdr_len);
7933         if (tso < 0)
7934                 goto out_drop;
7935         else if (!tso)
7936                 ixgbe_tx_csum(tx_ring, first);
7937
7938         /* add the ATR filter if ATR is on */
7939         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7940                 ixgbe_atr(tx_ring, first);
7941
7942 #ifdef IXGBE_FCOE
7943 xmit_fcoe:
7944 #endif /* IXGBE_FCOE */
7945         ixgbe_tx_map(tx_ring, first, hdr_len);
7946
7947         return NETDEV_TX_OK;
7948
7949 out_drop:
7950         dev_kfree_skb_any(first->skb);
7951         first->skb = NULL;
7952
7953         return NETDEV_TX_OK;
7954 }
7955
7956 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7957                                       struct net_device *netdev,
7958                                       struct ixgbe_ring *ring)
7959 {
7960         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7961         struct ixgbe_ring *tx_ring;
7962
7963         /*
7964          * The minimum packet size for olinfo paylen is 17 so pad the skb
7965          * in order to meet this minimum size requirement.
7966          */
7967         if (skb_put_padto(skb, 17))
7968                 return NETDEV_TX_OK;
7969
7970         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7971
7972         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7973 }
7974
7975 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7976                                     struct net_device *netdev)
7977 {
7978         return __ixgbe_xmit_frame(skb, netdev, NULL);
7979 }
7980
7981 /**
7982  * ixgbe_set_mac - Change the Ethernet Address of the NIC
7983  * @netdev: network interface device structure
7984  * @p: pointer to an address structure
7985  *
7986  * Returns 0 on success, negative on failure
7987  **/
7988 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7989 {
7990         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7991         struct ixgbe_hw *hw = &adapter->hw;
7992         struct sockaddr *addr = p;
7993
7994         if (!is_valid_ether_addr(addr->sa_data))
7995                 return -EADDRNOTAVAIL;
7996
7997         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7998         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7999
8000         ixgbe_mac_set_default_filter(adapter);
8001
8002         return 0;
8003 }
8004
8005 static int
8006 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8007 {
8008         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8009         struct ixgbe_hw *hw = &adapter->hw;
8010         u16 value;
8011         int rc;
8012
8013         if (prtad != hw->phy.mdio.prtad)
8014                 return -EINVAL;
8015         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8016         if (!rc)
8017                 rc = value;
8018         return rc;
8019 }
8020
8021 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8022                             u16 addr, u16 value)
8023 {
8024         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8025         struct ixgbe_hw *hw = &adapter->hw;
8026
8027         if (prtad != hw->phy.mdio.prtad)
8028                 return -EINVAL;
8029         return hw->phy.ops.write_reg(hw, addr, devad, value);
8030 }
8031
8032 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8033 {
8034         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8035
8036         switch (cmd) {
8037         case SIOCSHWTSTAMP:
8038                 return ixgbe_ptp_set_ts_config(adapter, req);
8039         case SIOCGHWTSTAMP:
8040                 return ixgbe_ptp_get_ts_config(adapter, req);
8041         default:
8042                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8043         }
8044 }
8045
8046 /**
8047  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8048  * netdev->dev_addrs
8049  * @netdev: network interface device structure
8050  *
8051  * Returns non-zero on failure
8052  **/
8053 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8054 {
8055         int err = 0;
8056         struct ixgbe_adapter *adapter = netdev_priv(dev);
8057         struct ixgbe_hw *hw = &adapter->hw;
8058
8059         if (is_valid_ether_addr(hw->mac.san_addr)) {
8060                 rtnl_lock();
8061                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8062                 rtnl_unlock();
8063
8064                 /* update SAN MAC vmdq pool selection */
8065                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8066         }
8067         return err;
8068 }
8069
8070 /**
8071  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8072  * netdev->dev_addrs
8073  * @netdev: network interface device structure
8074  *
8075  * Returns non-zero on failure
8076  **/
8077 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8078 {
8079         int err = 0;
8080         struct ixgbe_adapter *adapter = netdev_priv(dev);
8081         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8082
8083         if (is_valid_ether_addr(mac->san_addr)) {
8084                 rtnl_lock();
8085                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8086                 rtnl_unlock();
8087         }
8088         return err;
8089 }
8090
8091 #ifdef CONFIG_NET_POLL_CONTROLLER
8092 /*
8093  * Polling 'interrupt' - used by things like netconsole to send skbs
8094  * without having to re-enable interrupts. It's not called while
8095  * the interrupt routine is executing.
8096  */
8097 static void ixgbe_netpoll(struct net_device *netdev)
8098 {
8099         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8100         int i;
8101
8102         /* if interface is down do nothing */
8103         if (test_bit(__IXGBE_DOWN, &adapter->state))
8104                 return;
8105
8106         /* loop through and schedule all active queues */
8107         for (i = 0; i < adapter->num_q_vectors; i++)
8108                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8109 }
8110
8111 #endif
8112 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
8113                                                    struct rtnl_link_stats64 *stats)
8114 {
8115         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8116         int i;
8117
8118         rcu_read_lock();
8119         for (i = 0; i < adapter->num_rx_queues; i++) {
8120                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
8121                 u64 bytes, packets;
8122                 unsigned int start;
8123
8124                 if (ring) {
8125                         do {
8126                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8127                                 packets = ring->stats.packets;
8128                                 bytes   = ring->stats.bytes;
8129                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8130                         stats->rx_packets += packets;
8131                         stats->rx_bytes   += bytes;
8132                 }
8133         }
8134
8135         for (i = 0; i < adapter->num_tx_queues; i++) {
8136                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
8137                 u64 bytes, packets;
8138                 unsigned int start;
8139
8140                 if (ring) {
8141                         do {
8142                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8143                                 packets = ring->stats.packets;
8144                                 bytes   = ring->stats.bytes;
8145                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8146                         stats->tx_packets += packets;
8147                         stats->tx_bytes   += bytes;
8148                 }
8149         }
8150         rcu_read_unlock();
8151         /* following stats updated by ixgbe_watchdog_task() */
8152         stats->multicast        = netdev->stats.multicast;
8153         stats->rx_errors        = netdev->stats.rx_errors;
8154         stats->rx_length_errors = netdev->stats.rx_length_errors;
8155         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8156         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8157         return stats;
8158 }
8159
8160 #ifdef CONFIG_IXGBE_DCB
8161 /**
8162  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8163  * @adapter: pointer to ixgbe_adapter
8164  * @tc: number of traffic classes currently enabled
8165  *
8166  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8167  * 802.1Q priority maps to a packet buffer that exists.
8168  */
8169 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8170 {
8171         struct ixgbe_hw *hw = &adapter->hw;
8172         u32 reg, rsave;
8173         int i;
8174
8175         /* 82598 have a static priority to TC mapping that can not
8176          * be changed so no validation is needed.
8177          */
8178         if (hw->mac.type == ixgbe_mac_82598EB)
8179                 return;
8180
8181         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8182         rsave = reg;
8183
8184         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8185                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8186
8187                 /* If up2tc is out of bounds default to zero */
8188                 if (up2tc > tc)
8189                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8190         }
8191
8192         if (reg != rsave)
8193                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8194
8195         return;
8196 }
8197
8198 /**
8199  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8200  * @adapter: Pointer to adapter struct
8201  *
8202  * Populate the netdev user priority to tc map
8203  */
8204 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8205 {
8206         struct net_device *dev = adapter->netdev;
8207         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8208         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8209         u8 prio;
8210
8211         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8212                 u8 tc = 0;
8213
8214                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8215                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8216                 else if (ets)
8217                         tc = ets->prio_tc[prio];
8218
8219                 netdev_set_prio_tc_map(dev, prio, tc);
8220         }
8221 }
8222
8223 #endif /* CONFIG_IXGBE_DCB */
8224 /**
8225  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8226  *
8227  * @netdev: net device to configure
8228  * @tc: number of traffic classes to enable
8229  */
8230 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8231 {
8232         struct ixgbe_adapter *adapter = netdev_priv(dev);
8233         struct ixgbe_hw *hw = &adapter->hw;
8234         bool pools;
8235
8236         /* Hardware supports up to 8 traffic classes */
8237         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8238                 return -EINVAL;
8239
8240         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8241                 return -EINVAL;
8242
8243         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
8244         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
8245                 return -EBUSY;
8246
8247         /* Hardware has to reinitialize queues and interrupts to
8248          * match packet buffer alignment. Unfortunately, the
8249          * hardware is not flexible enough to do this dynamically.
8250          */
8251         if (netif_running(dev))
8252                 ixgbe_close(dev);
8253         else
8254                 ixgbe_reset(adapter);
8255
8256         ixgbe_clear_interrupt_scheme(adapter);
8257
8258 #ifdef CONFIG_IXGBE_DCB
8259         if (tc) {
8260                 netdev_set_num_tc(dev, tc);
8261                 ixgbe_set_prio_tc_map(adapter);
8262
8263                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8264
8265                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8266                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8267                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8268                 }
8269         } else {
8270                 netdev_reset_tc(dev);
8271
8272                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8273                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8274
8275                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8276
8277                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8278                 adapter->dcb_cfg.pfc_mode_enable = false;
8279         }
8280
8281         ixgbe_validate_rtr(adapter, tc);
8282
8283 #endif /* CONFIG_IXGBE_DCB */
8284         ixgbe_init_interrupt_scheme(adapter);
8285
8286         if (netif_running(dev))
8287                 return ixgbe_open(dev);
8288
8289         return 0;
8290 }
8291
8292 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8293                                struct tc_cls_u32_offload *cls)
8294 {
8295         u32 hdl = cls->knode.handle;
8296         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8297         u32 loc = cls->knode.handle & 0xfffff;
8298         int err = 0, i, j;
8299         struct ixgbe_jump_table *jump = NULL;
8300
8301         if (loc > IXGBE_MAX_HW_ENTRIES)
8302                 return -EINVAL;
8303
8304         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8305                 return -EINVAL;
8306
8307         /* Clear this filter in the link data it is associated with */
8308         if (uhtid != 0x800) {
8309                 jump = adapter->jump_tables[uhtid];
8310                 if (!jump)
8311                         return -EINVAL;
8312                 if (!test_bit(loc - 1, jump->child_loc_map))
8313                         return -EINVAL;
8314                 clear_bit(loc - 1, jump->child_loc_map);
8315         }
8316
8317         /* Check if the filter being deleted is a link */
8318         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8319                 jump = adapter->jump_tables[i];
8320                 if (jump && jump->link_hdl == hdl) {
8321                         /* Delete filters in the hardware in the child hash
8322                          * table associated with this link
8323                          */
8324                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8325                                 if (!test_bit(j, jump->child_loc_map))
8326                                         continue;
8327                                 spin_lock(&adapter->fdir_perfect_lock);
8328                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
8329                                                                       NULL,
8330                                                                       j + 1);
8331                                 spin_unlock(&adapter->fdir_perfect_lock);
8332                                 clear_bit(j, jump->child_loc_map);
8333                         }
8334                         /* Remove resources for this link */
8335                         kfree(jump->input);
8336                         kfree(jump->mask);
8337                         kfree(jump);
8338                         adapter->jump_tables[i] = NULL;
8339                         return err;
8340                 }
8341         }
8342
8343         spin_lock(&adapter->fdir_perfect_lock);
8344         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8345         spin_unlock(&adapter->fdir_perfect_lock);
8346         return err;
8347 }
8348
8349 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8350                                             __be16 protocol,
8351                                             struct tc_cls_u32_offload *cls)
8352 {
8353         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8354
8355         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8356                 return -EINVAL;
8357
8358         /* This ixgbe devices do not support hash tables at the moment
8359          * so abort when given hash tables.
8360          */
8361         if (cls->hnode.divisor > 0)
8362                 return -EINVAL;
8363
8364         set_bit(uhtid - 1, &adapter->tables);
8365         return 0;
8366 }
8367
8368 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8369                                             struct tc_cls_u32_offload *cls)
8370 {
8371         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8372
8373         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8374                 return -EINVAL;
8375
8376         clear_bit(uhtid - 1, &adapter->tables);
8377         return 0;
8378 }
8379
8380 #ifdef CONFIG_NET_CLS_ACT
8381 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8382                                   u8 *queue, u64 *action)
8383 {
8384         unsigned int num_vfs = adapter->num_vfs, vf;
8385         struct net_device *upper;
8386         struct list_head *iter;
8387
8388         /* redirect to a SRIOV VF */
8389         for (vf = 0; vf < num_vfs; ++vf) {
8390                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8391                 if (upper->ifindex == ifindex) {
8392                         if (adapter->num_rx_pools > 1)
8393                                 *queue = vf * 2;
8394                         else
8395                                 *queue = vf * adapter->num_rx_queues_per_pool;
8396
8397                         *action = vf + 1;
8398                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
8399                         return 0;
8400                 }
8401         }
8402
8403         /* redirect to a offloaded macvlan netdev */
8404         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
8405                 if (netif_is_macvlan(upper)) {
8406                         struct macvlan_dev *dfwd = netdev_priv(upper);
8407                         struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8408
8409                         if (vadapter && vadapter->netdev->ifindex == ifindex) {
8410                                 *queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8411                                 *action = *queue;
8412                                 return 0;
8413                         }
8414                 }
8415         }
8416
8417         return -EINVAL;
8418 }
8419
8420 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8421                             struct tcf_exts *exts, u64 *action, u8 *queue)
8422 {
8423         const struct tc_action *a;
8424         LIST_HEAD(actions);
8425         int err;
8426
8427         if (tc_no_actions(exts))
8428                 return -EINVAL;
8429
8430         tcf_exts_to_list(exts, &actions);
8431         list_for_each_entry(a, &actions, list) {
8432
8433                 /* Drop action */
8434                 if (is_tcf_gact_shot(a)) {
8435                         *action = IXGBE_FDIR_DROP_QUEUE;
8436                         *queue = IXGBE_FDIR_DROP_QUEUE;
8437                         return 0;
8438                 }
8439
8440                 /* Redirect to a VF or a offloaded macvlan */
8441                 if (is_tcf_mirred_redirect(a)) {
8442                         int ifindex = tcf_mirred_ifindex(a);
8443
8444                         err = handle_redirect_action(adapter, ifindex, queue,
8445                                                      action);
8446                         if (err == 0)
8447                                 return err;
8448                 }
8449         }
8450
8451         return -EINVAL;
8452 }
8453 #else
8454 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8455                             struct tcf_exts *exts, u64 *action, u8 *queue)
8456 {
8457         return -EINVAL;
8458 }
8459 #endif /* CONFIG_NET_CLS_ACT */
8460
8461 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
8462                                     union ixgbe_atr_input *mask,
8463                                     struct tc_cls_u32_offload *cls,
8464                                     struct ixgbe_mat_field *field_ptr,
8465                                     struct ixgbe_nexthdr *nexthdr)
8466 {
8467         int i, j, off;
8468         __be32 val, m;
8469         bool found_entry = false, found_jump_field = false;
8470
8471         for (i = 0; i < cls->knode.sel->nkeys; i++) {
8472                 off = cls->knode.sel->keys[i].off;
8473                 val = cls->knode.sel->keys[i].val;
8474                 m = cls->knode.sel->keys[i].mask;
8475
8476                 for (j = 0; field_ptr[j].val; j++) {
8477                         if (field_ptr[j].off == off) {
8478                                 field_ptr[j].val(input, mask, val, m);
8479                                 input->filter.formatted.flow_type |=
8480                                         field_ptr[j].type;
8481                                 found_entry = true;
8482                                 break;
8483                         }
8484                 }
8485                 if (nexthdr) {
8486                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
8487                             nexthdr->val == cls->knode.sel->keys[i].val &&
8488                             nexthdr->mask == cls->knode.sel->keys[i].mask)
8489                                 found_jump_field = true;
8490                         else
8491                                 continue;
8492                 }
8493         }
8494
8495         if (nexthdr && !found_jump_field)
8496                 return -EINVAL;
8497
8498         if (!found_entry)
8499                 return 0;
8500
8501         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
8502                                     IXGBE_ATR_L4TYPE_MASK;
8503
8504         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
8505                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
8506
8507         return 0;
8508 }
8509
8510 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
8511                                   __be16 protocol,
8512                                   struct tc_cls_u32_offload *cls)
8513 {
8514         u32 loc = cls->knode.handle & 0xfffff;
8515         struct ixgbe_hw *hw = &adapter->hw;
8516         struct ixgbe_mat_field *field_ptr;
8517         struct ixgbe_fdir_filter *input = NULL;
8518         union ixgbe_atr_input *mask = NULL;
8519         struct ixgbe_jump_table *jump = NULL;
8520         int i, err = -EINVAL;
8521         u8 queue;
8522         u32 uhtid, link_uhtid;
8523
8524         uhtid = TC_U32_USERHTID(cls->knode.handle);
8525         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
8526
8527         /* At the moment cls_u32 jumps to network layer and skips past
8528          * L2 headers. The canonical method to match L2 frames is to use
8529          * negative values. However this is error prone at best but really
8530          * just broken because there is no way to "know" what sort of hdr
8531          * is in front of the network layer. Fix cls_u32 to support L2
8532          * headers when needed.
8533          */
8534         if (protocol != htons(ETH_P_IP))
8535                 return err;
8536
8537         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
8538                 e_err(drv, "Location out of range\n");
8539                 return err;
8540         }
8541
8542         /* cls u32 is a graph starting at root node 0x800. The driver tracks
8543          * links and also the fields used to advance the parser across each
8544          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
8545          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
8546          * To add support for new nodes update ixgbe_model.h parse structures
8547          * this function _should_ be generic try not to hardcode values here.
8548          */
8549         if (uhtid == 0x800) {
8550                 field_ptr = (adapter->jump_tables[0])->mat;
8551         } else {
8552                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8553                         return err;
8554                 if (!adapter->jump_tables[uhtid])
8555                         return err;
8556                 field_ptr = (adapter->jump_tables[uhtid])->mat;
8557         }
8558
8559         if (!field_ptr)
8560                 return err;
8561
8562         /* At this point we know the field_ptr is valid and need to either
8563          * build cls_u32 link or attach filter. Because adding a link to
8564          * a handle that does not exist is invalid and the same for adding
8565          * rules to handles that don't exist.
8566          */
8567
8568         if (link_uhtid) {
8569                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
8570
8571                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
8572                         return err;
8573
8574                 if (!test_bit(link_uhtid - 1, &adapter->tables))
8575                         return err;
8576
8577                 /* Multiple filters as links to the same hash table are not
8578                  * supported. To add a new filter with the same next header
8579                  * but different match/jump conditions, create a new hash table
8580                  * and link to it.
8581                  */
8582                 if (adapter->jump_tables[link_uhtid] &&
8583                     (adapter->jump_tables[link_uhtid])->link_hdl) {
8584                         e_err(drv, "Link filter exists for link: %x\n",
8585                               link_uhtid);
8586                         return err;
8587                 }
8588
8589                 for (i = 0; nexthdr[i].jump; i++) {
8590                         if (nexthdr[i].o != cls->knode.sel->offoff ||
8591                             nexthdr[i].s != cls->knode.sel->offshift ||
8592                             nexthdr[i].m != cls->knode.sel->offmask)
8593                                 return err;
8594
8595                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
8596                         if (!jump)
8597                                 return -ENOMEM;
8598                         input = kzalloc(sizeof(*input), GFP_KERNEL);
8599                         if (!input) {
8600                                 err = -ENOMEM;
8601                                 goto free_jump;
8602                         }
8603                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8604                         if (!mask) {
8605                                 err = -ENOMEM;
8606                                 goto free_input;
8607                         }
8608                         jump->input = input;
8609                         jump->mask = mask;
8610                         jump->link_hdl = cls->knode.handle;
8611
8612                         err = ixgbe_clsu32_build_input(input, mask, cls,
8613                                                        field_ptr, &nexthdr[i]);
8614                         if (!err) {
8615                                 jump->mat = nexthdr[i].jump;
8616                                 adapter->jump_tables[link_uhtid] = jump;
8617                                 break;
8618                         }
8619                 }
8620                 return 0;
8621         }
8622
8623         input = kzalloc(sizeof(*input), GFP_KERNEL);
8624         if (!input)
8625                 return -ENOMEM;
8626         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
8627         if (!mask) {
8628                 err = -ENOMEM;
8629                 goto free_input;
8630         }
8631
8632         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
8633                 if ((adapter->jump_tables[uhtid])->input)
8634                         memcpy(input, (adapter->jump_tables[uhtid])->input,
8635                                sizeof(*input));
8636                 if ((adapter->jump_tables[uhtid])->mask)
8637                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
8638                                sizeof(*mask));
8639
8640                 /* Lookup in all child hash tables if this location is already
8641                  * filled with a filter
8642                  */
8643                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8644                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
8645
8646                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
8647                                 e_err(drv, "Filter exists in location: %x\n",
8648                                       loc);
8649                                 err = -EINVAL;
8650                                 goto err_out;
8651                         }
8652                 }
8653         }
8654         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
8655         if (err)
8656                 goto err_out;
8657
8658         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
8659                                &queue);
8660         if (err < 0)
8661                 goto err_out;
8662
8663         input->sw_idx = loc;
8664
8665         spin_lock(&adapter->fdir_perfect_lock);
8666
8667         if (hlist_empty(&adapter->fdir_filter_list)) {
8668                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
8669                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
8670                 if (err)
8671                         goto err_out_w_lock;
8672         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
8673                 err = -EINVAL;
8674                 goto err_out_w_lock;
8675         }
8676
8677         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
8678         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
8679                                                     input->sw_idx, queue);
8680         if (err)
8681                 goto err_out_w_lock;
8682
8683         ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
8684         spin_unlock(&adapter->fdir_perfect_lock);
8685
8686         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
8687                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
8688
8689         kfree(mask);
8690         return err;
8691 err_out_w_lock:
8692         spin_unlock(&adapter->fdir_perfect_lock);
8693 err_out:
8694         kfree(mask);
8695 free_input:
8696         kfree(input);
8697 free_jump:
8698         kfree(jump);
8699         return err;
8700 }
8701
8702 static int __ixgbe_setup_tc(struct net_device *dev, u32 handle, __be16 proto,
8703                             struct tc_to_netdev *tc)
8704 {
8705         struct ixgbe_adapter *adapter = netdev_priv(dev);
8706
8707         if (TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS) &&
8708             tc->type == TC_SETUP_CLSU32) {
8709                 switch (tc->cls_u32->command) {
8710                 case TC_CLSU32_NEW_KNODE:
8711                 case TC_CLSU32_REPLACE_KNODE:
8712                         return ixgbe_configure_clsu32(adapter,
8713                                                       proto, tc->cls_u32);
8714                 case TC_CLSU32_DELETE_KNODE:
8715                         return ixgbe_delete_clsu32(adapter, tc->cls_u32);
8716                 case TC_CLSU32_NEW_HNODE:
8717                 case TC_CLSU32_REPLACE_HNODE:
8718                         return ixgbe_configure_clsu32_add_hnode(adapter, proto,
8719                                                                 tc->cls_u32);
8720                 case TC_CLSU32_DELETE_HNODE:
8721                         return ixgbe_configure_clsu32_del_hnode(adapter,
8722                                                                 tc->cls_u32);
8723                 default:
8724                         return -EINVAL;
8725                 }
8726         }
8727
8728         if (tc->type != TC_SETUP_MQPRIO)
8729                 return -EINVAL;
8730
8731         return ixgbe_setup_tc(dev, tc->tc);
8732 }
8733
8734 #ifdef CONFIG_PCI_IOV
8735 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
8736 {
8737         struct net_device *netdev = adapter->netdev;
8738
8739         rtnl_lock();
8740         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
8741         rtnl_unlock();
8742 }
8743
8744 #endif
8745 void ixgbe_do_reset(struct net_device *netdev)
8746 {
8747         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8748
8749         if (netif_running(netdev))
8750                 ixgbe_reinit_locked(adapter);
8751         else
8752                 ixgbe_reset(adapter);
8753 }
8754
8755 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
8756                                             netdev_features_t features)
8757 {
8758         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8759
8760         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8761         if (!(features & NETIF_F_RXCSUM))
8762                 features &= ~NETIF_F_LRO;
8763
8764         /* Turn off LRO if not RSC capable */
8765         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
8766                 features &= ~NETIF_F_LRO;
8767
8768         return features;
8769 }
8770
8771 static int ixgbe_set_features(struct net_device *netdev,
8772                               netdev_features_t features)
8773 {
8774         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8775         netdev_features_t changed = netdev->features ^ features;
8776         bool need_reset = false;
8777
8778         /* Make sure RSC matches LRO, reset if change */
8779         if (!(features & NETIF_F_LRO)) {
8780                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8781                         need_reset = true;
8782                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8783         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8784                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8785                 if (adapter->rx_itr_setting == 1 ||
8786                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8787                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8788                         need_reset = true;
8789                 } else if ((changed ^ features) & NETIF_F_LRO) {
8790                         e_info(probe, "rx-usecs set too low, "
8791                                "disabling RSC\n");
8792                 }
8793         }
8794
8795         /*
8796          * Check if Flow Director n-tuple support or hw_tc support was
8797          * enabled or disabled.  If the state changed, we need to reset.
8798          */
8799         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
8800                 /* turn off ATR, enable perfect filters and reset */
8801                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8802                         need_reset = true;
8803
8804                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8805                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8806         } else {
8807                 /* turn off perfect filters, enable ATR and reset */
8808                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8809                         need_reset = true;
8810
8811                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8812
8813                 /* We cannot enable ATR if SR-IOV is enabled */
8814                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
8815                     /* We cannot enable ATR if we have 2 or more tcs */
8816                     (netdev_get_num_tc(netdev) > 1) ||
8817                     /* We cannot enable ATR if RSS is disabled */
8818                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
8819                     /* A sample rate of 0 indicates ATR disabled */
8820                     (!adapter->atr_sample_rate))
8821                         ; /* do nothing not supported */
8822                 else /* otherwise supported and set the flag */
8823                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8824         }
8825
8826         if (changed & NETIF_F_RXALL)
8827                 need_reset = true;
8828
8829         netdev->features = features;
8830
8831         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8832                 if (features & NETIF_F_RXCSUM) {
8833                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8834                 } else {
8835                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
8836
8837                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8838                 }
8839         }
8840
8841         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
8842                 if (features & NETIF_F_RXCSUM) {
8843                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8844                 } else {
8845                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
8846
8847                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8848                 }
8849         }
8850
8851         if (need_reset)
8852                 ixgbe_do_reset(netdev);
8853         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
8854                             NETIF_F_HW_VLAN_CTAG_FILTER))
8855                 ixgbe_set_rx_mode(netdev);
8856
8857         return 0;
8858 }
8859
8860 /**
8861  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
8862  * @dev: The port's netdev
8863  * @ti: Tunnel endpoint information
8864  **/
8865 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
8866                                       struct udp_tunnel_info *ti)
8867 {
8868         struct ixgbe_adapter *adapter = netdev_priv(dev);
8869         struct ixgbe_hw *hw = &adapter->hw;
8870         __be16 port = ti->port;
8871         u32 port_shift = 0;
8872         u32 reg;
8873
8874         if (ti->sa_family != AF_INET)
8875                 return;
8876
8877         switch (ti->type) {
8878         case UDP_TUNNEL_TYPE_VXLAN:
8879                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8880                         return;
8881
8882                 if (adapter->vxlan_port == port)
8883                         return;
8884
8885                 if (adapter->vxlan_port) {
8886                         netdev_info(dev,
8887                                     "VXLAN port %d set, not adding port %d\n",
8888                                     ntohs(adapter->vxlan_port),
8889                                     ntohs(port));
8890                         return;
8891                 }
8892
8893                 adapter->vxlan_port = port;
8894                 break;
8895         case UDP_TUNNEL_TYPE_GENEVE:
8896                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
8897                         return;
8898
8899                 if (adapter->geneve_port == port)
8900                         return;
8901
8902                 if (adapter->geneve_port) {
8903                         netdev_info(dev,
8904                                     "GENEVE port %d set, not adding port %d\n",
8905                                     ntohs(adapter->geneve_port),
8906                                     ntohs(port));
8907                         return;
8908                 }
8909
8910                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
8911                 adapter->geneve_port = port;
8912                 break;
8913         default:
8914                 return;
8915         }
8916
8917         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
8918         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
8919 }
8920
8921 /**
8922  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
8923  * @dev: The port's netdev
8924  * @ti: Tunnel endpoint information
8925  **/
8926 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
8927                                       struct udp_tunnel_info *ti)
8928 {
8929         struct ixgbe_adapter *adapter = netdev_priv(dev);
8930         u32 port_mask;
8931
8932         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
8933             ti->type != UDP_TUNNEL_TYPE_GENEVE)
8934                 return;
8935
8936         if (ti->sa_family != AF_INET)
8937                 return;
8938
8939         switch (ti->type) {
8940         case UDP_TUNNEL_TYPE_VXLAN:
8941                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8942                         return;
8943
8944                 if (adapter->vxlan_port != ti->port) {
8945                         netdev_info(dev, "VXLAN port %d not found\n",
8946                                     ntohs(ti->port));
8947                         return;
8948                 }
8949
8950                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
8951                 break;
8952         case UDP_TUNNEL_TYPE_GENEVE:
8953                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
8954                         return;
8955
8956                 if (adapter->geneve_port != ti->port) {
8957                         netdev_info(dev, "GENEVE port %d not found\n",
8958                                     ntohs(ti->port));
8959                         return;
8960                 }
8961
8962                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
8963                 break;
8964         default:
8965                 return;
8966         }
8967
8968         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
8969         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
8970 }
8971
8972 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8973                              struct net_device *dev,
8974                              const unsigned char *addr, u16 vid,
8975                              u16 flags)
8976 {
8977         /* guarantee we can provide a unique filter for the unicast address */
8978         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
8979                 struct ixgbe_adapter *adapter = netdev_priv(dev);
8980                 u16 pool = VMDQ_P(0);
8981
8982                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
8983                         return -ENOMEM;
8984         }
8985
8986         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
8987 }
8988
8989 /**
8990  * ixgbe_configure_bridge_mode - set various bridge modes
8991  * @adapter - the private structure
8992  * @mode - requested bridge mode
8993  *
8994  * Configure some settings require for various bridge modes.
8995  **/
8996 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
8997                                        __u16 mode)
8998 {
8999         struct ixgbe_hw *hw = &adapter->hw;
9000         unsigned int p, num_pools;
9001         u32 vmdctl;
9002
9003         switch (mode) {
9004         case BRIDGE_MODE_VEPA:
9005                 /* disable Tx loopback, rely on switch hairpin mode */
9006                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9007
9008                 /* must enable Rx switching replication to allow multicast
9009                  * packet reception on all VFs, and to enable source address
9010                  * pruning.
9011                  */
9012                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9013                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9014                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9015
9016                 /* enable Rx source address pruning. Note, this requires
9017                  * replication to be enabled or else it does nothing.
9018                  */
9019                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9020                 for (p = 0; p < num_pools; p++) {
9021                         if (hw->mac.ops.set_source_address_pruning)
9022                                 hw->mac.ops.set_source_address_pruning(hw,
9023                                                                        true,
9024                                                                        p);
9025                 }
9026                 break;
9027         case BRIDGE_MODE_VEB:
9028                 /* enable Tx loopback for internal VF/PF communication */
9029                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9030                                 IXGBE_PFDTXGSWC_VT_LBEN);
9031
9032                 /* disable Rx switching replication unless we have SR-IOV
9033                  * virtual functions
9034                  */
9035                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9036                 if (!adapter->num_vfs)
9037                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9038                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9039
9040                 /* disable Rx source address pruning, since we don't expect to
9041                  * be receiving external loopback of our transmitted frames.
9042                  */
9043                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9044                 for (p = 0; p < num_pools; p++) {
9045                         if (hw->mac.ops.set_source_address_pruning)
9046                                 hw->mac.ops.set_source_address_pruning(hw,
9047                                                                        false,
9048                                                                        p);
9049                 }
9050                 break;
9051         default:
9052                 return -EINVAL;
9053         }
9054
9055         adapter->bridge_mode = mode;
9056
9057         e_info(drv, "enabling bridge mode: %s\n",
9058                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9059
9060         return 0;
9061 }
9062
9063 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9064                                     struct nlmsghdr *nlh, u16 flags)
9065 {
9066         struct ixgbe_adapter *adapter = netdev_priv(dev);
9067         struct nlattr *attr, *br_spec;
9068         int rem;
9069
9070         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9071                 return -EOPNOTSUPP;
9072
9073         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9074         if (!br_spec)
9075                 return -EINVAL;
9076
9077         nla_for_each_nested(attr, br_spec, rem) {
9078                 int status;
9079                 __u16 mode;
9080
9081                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9082                         continue;
9083
9084                 if (nla_len(attr) < sizeof(mode))
9085                         return -EINVAL;
9086
9087                 mode = nla_get_u16(attr);
9088                 status = ixgbe_configure_bridge_mode(adapter, mode);
9089                 if (status)
9090                         return status;
9091
9092                 break;
9093         }
9094
9095         return 0;
9096 }
9097
9098 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9099                                     struct net_device *dev,
9100                                     u32 filter_mask, int nlflags)
9101 {
9102         struct ixgbe_adapter *adapter = netdev_priv(dev);
9103
9104         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9105                 return 0;
9106
9107         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9108                                        adapter->bridge_mode, 0, 0, nlflags,
9109                                        filter_mask, NULL);
9110 }
9111
9112 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9113 {
9114         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9115         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9116         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9117         unsigned int limit;
9118         int pool, err;
9119
9120         /* Hardware has a limited number of available pools. Each VF, and the
9121          * PF require a pool. Check to ensure we don't attempt to use more
9122          * then the available number of pools.
9123          */
9124         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9125                 return ERR_PTR(-EINVAL);
9126
9127 #ifdef CONFIG_RPS
9128         if (vdev->num_rx_queues != vdev->num_tx_queues) {
9129                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
9130                             vdev->name);
9131                 return ERR_PTR(-EINVAL);
9132         }
9133 #endif
9134         /* Check for hardware restriction on number of rx/tx queues */
9135         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
9136             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
9137                 netdev_info(pdev,
9138                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9139                             pdev->name);
9140                 return ERR_PTR(-EINVAL);
9141         }
9142
9143         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9144               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
9145             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9146                 return ERR_PTR(-EBUSY);
9147
9148         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9149         if (!fwd_adapter)
9150                 return ERR_PTR(-ENOMEM);
9151
9152         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
9153         adapter->num_rx_pools++;
9154         set_bit(pool, &adapter->fwd_bitmask);
9155         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9156
9157         /* Enable VMDq flag so device will be set in VM mode */
9158         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9159         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9160         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
9161
9162         /* Force reinit of ring allocation with VMDQ enabled */
9163         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9164         if (err)
9165                 goto fwd_add_err;
9166         fwd_adapter->pool = pool;
9167         fwd_adapter->real_adapter = adapter;
9168
9169         if (netif_running(pdev)) {
9170                 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9171                 if (err)
9172                         goto fwd_add_err;
9173                 netif_tx_start_all_queues(vdev);
9174         }
9175
9176         return fwd_adapter;
9177 fwd_add_err:
9178         /* unwind counter and free adapter struct */
9179         netdev_info(pdev,
9180                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9181         clear_bit(pool, &adapter->fwd_bitmask);
9182         adapter->num_rx_pools--;
9183         kfree(fwd_adapter);
9184         return ERR_PTR(err);
9185 }
9186
9187 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9188 {
9189         struct ixgbe_fwd_adapter *fwd_adapter = priv;
9190         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
9191         unsigned int limit;
9192
9193         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
9194         adapter->num_rx_pools--;
9195
9196         limit = find_last_bit(&adapter->fwd_bitmask, 32);
9197         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9198         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
9199         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
9200         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9201                    fwd_adapter->pool, adapter->num_rx_pools,
9202                    fwd_adapter->rx_base_queue,
9203                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
9204                    adapter->fwd_bitmask);
9205         kfree(fwd_adapter);
9206 }
9207
9208 #define IXGBE_MAX_MAC_HDR_LEN           127
9209 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9210
9211 static netdev_features_t
9212 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9213                      netdev_features_t features)
9214 {
9215         unsigned int network_hdr_len, mac_hdr_len;
9216
9217         /* Make certain the headers can be described by a context descriptor */
9218         mac_hdr_len = skb_network_header(skb) - skb->data;
9219         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9220                 return features & ~(NETIF_F_HW_CSUM |
9221                                     NETIF_F_SCTP_CRC |
9222                                     NETIF_F_HW_VLAN_CTAG_TX |
9223                                     NETIF_F_TSO |
9224                                     NETIF_F_TSO6);
9225
9226         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9227         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9228                 return features & ~(NETIF_F_HW_CSUM |
9229                                     NETIF_F_SCTP_CRC |
9230                                     NETIF_F_TSO |
9231                                     NETIF_F_TSO6);
9232
9233         /* We can only support IPV4 TSO in tunnels if we can mangle the
9234          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9235          */
9236         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9237                 features &= ~NETIF_F_TSO;
9238
9239         return features;
9240 }
9241
9242 static const struct net_device_ops ixgbe_netdev_ops = {
9243         .ndo_open               = ixgbe_open,
9244         .ndo_stop               = ixgbe_close,
9245         .ndo_start_xmit         = ixgbe_xmit_frame,
9246         .ndo_select_queue       = ixgbe_select_queue,
9247         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
9248         .ndo_validate_addr      = eth_validate_addr,
9249         .ndo_set_mac_address    = ixgbe_set_mac,
9250         .ndo_change_mtu         = ixgbe_change_mtu,
9251         .ndo_tx_timeout         = ixgbe_tx_timeout,
9252         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
9253         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
9254         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
9255         .ndo_do_ioctl           = ixgbe_ioctl,
9256         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
9257         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
9258         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
9259         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
9260         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
9261         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
9262         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
9263         .ndo_get_stats64        = ixgbe_get_stats64,
9264         .ndo_setup_tc           = __ixgbe_setup_tc,
9265 #ifdef CONFIG_NET_POLL_CONTROLLER
9266         .ndo_poll_controller    = ixgbe_netpoll,
9267 #endif
9268 #ifdef CONFIG_NET_RX_BUSY_POLL
9269         .ndo_busy_poll          = ixgbe_low_latency_recv,
9270 #endif
9271 #ifdef IXGBE_FCOE
9272         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
9273         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
9274         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
9275         .ndo_fcoe_enable = ixgbe_fcoe_enable,
9276         .ndo_fcoe_disable = ixgbe_fcoe_disable,
9277         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
9278         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
9279 #endif /* IXGBE_FCOE */
9280         .ndo_set_features = ixgbe_set_features,
9281         .ndo_fix_features = ixgbe_fix_features,
9282         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
9283         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
9284         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
9285         .ndo_dfwd_add_station   = ixgbe_fwd_add,
9286         .ndo_dfwd_del_station   = ixgbe_fwd_del,
9287         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
9288         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
9289         .ndo_features_check     = ixgbe_features_check,
9290 };
9291
9292 /**
9293  * ixgbe_enumerate_functions - Get the number of ports this device has
9294  * @adapter: adapter structure
9295  *
9296  * This function enumerates the phsyical functions co-located on a single slot,
9297  * in order to determine how many ports a device has. This is most useful in
9298  * determining the required GT/s of PCIe bandwidth necessary for optimal
9299  * performance.
9300  **/
9301 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
9302 {
9303         struct pci_dev *entry, *pdev = adapter->pdev;
9304         int physfns = 0;
9305
9306         /* Some cards can not use the generic count PCIe functions method,
9307          * because they are behind a parent switch, so we hardcode these with
9308          * the correct number of functions.
9309          */
9310         if (ixgbe_pcie_from_parent(&adapter->hw))
9311                 physfns = 4;
9312
9313         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
9314                 /* don't count virtual functions */
9315                 if (entry->is_virtfn)
9316                         continue;
9317
9318                 /* When the devices on the bus don't all match our device ID,
9319                  * we can't reliably determine the correct number of
9320                  * functions. This can occur if a function has been direct
9321                  * attached to a virtual machine using VT-d, for example. In
9322                  * this case, simply return -1 to indicate this.
9323                  */
9324                 if ((entry->vendor != pdev->vendor) ||
9325                     (entry->device != pdev->device))
9326                         return -1;
9327
9328                 physfns++;
9329         }
9330
9331         return physfns;
9332 }
9333
9334 /**
9335  * ixgbe_wol_supported - Check whether device supports WoL
9336  * @adapter: the adapter private structure
9337  * @device_id: the device ID
9338  * @subdev_id: the subsystem device ID
9339  *
9340  * This function is used by probe and ethtool to determine
9341  * which devices have WoL support
9342  *
9343  **/
9344 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
9345                          u16 subdevice_id)
9346 {
9347         struct ixgbe_hw *hw = &adapter->hw;
9348         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
9349
9350         /* WOL not supported on 82598 */
9351         if (hw->mac.type == ixgbe_mac_82598EB)
9352                 return false;
9353
9354         /* check eeprom to see if WOL is enabled for X540 and newer */
9355         if (hw->mac.type >= ixgbe_mac_X540) {
9356                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
9357                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
9358                      (hw->bus.func == 0)))
9359                         return true;
9360         }
9361
9362         /* WOL is determined based on device IDs for 82599 MACs */
9363         switch (device_id) {
9364         case IXGBE_DEV_ID_82599_SFP:
9365                 /* Only these subdevices could supports WOL */
9366                 switch (subdevice_id) {
9367                 case IXGBE_SUBDEV_ID_82599_560FLR:
9368                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
9369                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
9370                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
9371                         /* only support first port */
9372                         if (hw->bus.func != 0)
9373                                 break;
9374                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
9375                 case IXGBE_SUBDEV_ID_82599_SFP:
9376                 case IXGBE_SUBDEV_ID_82599_RNDC:
9377                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
9378                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
9379                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
9380                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
9381                         return true;
9382                 }
9383                 break;
9384         case IXGBE_DEV_ID_82599EN_SFP:
9385                 /* Only these subdevices support WOL */
9386                 switch (subdevice_id) {
9387                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
9388                         return true;
9389                 }
9390                 break;
9391         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
9392                 /* All except this subdevice support WOL */
9393                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
9394                         return true;
9395                 break;
9396         case IXGBE_DEV_ID_82599_KX4:
9397                 return  true;
9398         default:
9399                 break;
9400         }
9401
9402         return false;
9403 }
9404
9405 /**
9406  * ixgbe_probe - Device Initialization Routine
9407  * @pdev: PCI device information struct
9408  * @ent: entry in ixgbe_pci_tbl
9409  *
9410  * Returns 0 on success, negative on failure
9411  *
9412  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
9413  * The OS initialization, configuring of the adapter private structure,
9414  * and a hardware reset occur.
9415  **/
9416 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9417 {
9418         struct net_device *netdev;
9419         struct ixgbe_adapter *adapter = NULL;
9420         struct ixgbe_hw *hw;
9421         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
9422         int i, err, pci_using_dac, expected_gts;
9423         unsigned int indices = MAX_TX_QUEUES;
9424         u8 part_str[IXGBE_PBANUM_LENGTH];
9425         bool disable_dev = false;
9426 #ifdef IXGBE_FCOE
9427         u16 device_caps;
9428 #endif
9429         u32 eec;
9430
9431         /* Catch broken hardware that put the wrong VF device ID in
9432          * the PCIe SR-IOV capability.
9433          */
9434         if (pdev->is_virtfn) {
9435                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
9436                      pci_name(pdev), pdev->vendor, pdev->device);
9437                 return -EINVAL;
9438         }
9439
9440         err = pci_enable_device_mem(pdev);
9441         if (err)
9442                 return err;
9443
9444         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
9445                 pci_using_dac = 1;
9446         } else {
9447                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9448                 if (err) {
9449                         dev_err(&pdev->dev,
9450                                 "No usable DMA configuration, aborting\n");
9451                         goto err_dma;
9452                 }
9453                 pci_using_dac = 0;
9454         }
9455
9456         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
9457         if (err) {
9458                 dev_err(&pdev->dev,
9459                         "pci_request_selected_regions failed 0x%x\n", err);
9460                 goto err_pci_reg;
9461         }
9462
9463         pci_enable_pcie_error_reporting(pdev);
9464
9465         pci_set_master(pdev);
9466         pci_save_state(pdev);
9467
9468         if (ii->mac == ixgbe_mac_82598EB) {
9469 #ifdef CONFIG_IXGBE_DCB
9470                 /* 8 TC w/ 4 queues per TC */
9471                 indices = 4 * MAX_TRAFFIC_CLASS;
9472 #else
9473                 indices = IXGBE_MAX_RSS_INDICES;
9474 #endif
9475         }
9476
9477         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
9478         if (!netdev) {
9479                 err = -ENOMEM;
9480                 goto err_alloc_etherdev;
9481         }
9482
9483         SET_NETDEV_DEV(netdev, &pdev->dev);
9484
9485         adapter = netdev_priv(netdev);
9486
9487         adapter->netdev = netdev;
9488         adapter->pdev = pdev;
9489         hw = &adapter->hw;
9490         hw->back = adapter;
9491         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
9492
9493         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9494                               pci_resource_len(pdev, 0));
9495         adapter->io_addr = hw->hw_addr;
9496         if (!hw->hw_addr) {
9497                 err = -EIO;
9498                 goto err_ioremap;
9499         }
9500
9501         netdev->netdev_ops = &ixgbe_netdev_ops;
9502         ixgbe_set_ethtool_ops(netdev);
9503         netdev->watchdog_timeo = 5 * HZ;
9504         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
9505
9506         /* Setup hw api */
9507         hw->mac.ops   = *ii->mac_ops;
9508         hw->mac.type  = ii->mac;
9509         hw->mvals     = ii->mvals;
9510
9511         /* EEPROM */
9512         hw->eeprom.ops = *ii->eeprom_ops;
9513         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
9514         if (ixgbe_removed(hw->hw_addr)) {
9515                 err = -EIO;
9516                 goto err_ioremap;
9517         }
9518         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
9519         if (!(eec & BIT(8)))
9520                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
9521
9522         /* PHY */
9523         hw->phy.ops = *ii->phy_ops;
9524         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
9525         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
9526         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
9527         hw->phy.mdio.mmds = 0;
9528         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
9529         hw->phy.mdio.dev = netdev;
9530         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
9531         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
9532
9533         ii->get_invariants(hw);
9534
9535         /* setup the private structure */
9536         err = ixgbe_sw_init(adapter);
9537         if (err)
9538                 goto err_sw_init;
9539
9540         /* Make sure the SWFW semaphore is in a valid state */
9541         if (hw->mac.ops.init_swfw_sync)
9542                 hw->mac.ops.init_swfw_sync(hw);
9543
9544         /* Make it possible the adapter to be woken up via WOL */
9545         switch (adapter->hw.mac.type) {
9546         case ixgbe_mac_82599EB:
9547         case ixgbe_mac_X540:
9548         case ixgbe_mac_X550:
9549         case ixgbe_mac_X550EM_x:
9550         case ixgbe_mac_x550em_a:
9551                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9552                 break;
9553         default:
9554                 break;
9555         }
9556
9557         /*
9558          * If there is a fan on this device and it has failed log the
9559          * failure.
9560          */
9561         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
9562                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
9563                 if (esdp & IXGBE_ESDP_SDP1)
9564                         e_crit(probe, "Fan has stopped, replace the adapter\n");
9565         }
9566
9567         if (allow_unsupported_sfp)
9568                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
9569
9570         /* reset_hw fills in the perm_addr as well */
9571         hw->phy.reset_if_overtemp = true;
9572         err = hw->mac.ops.reset_hw(hw);
9573         hw->phy.reset_if_overtemp = false;
9574         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
9575                 err = 0;
9576         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
9577                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
9578                 e_dev_err("Reload the driver after installing a supported module.\n");
9579                 goto err_sw_init;
9580         } else if (err) {
9581                 e_dev_err("HW Init failed: %d\n", err);
9582                 goto err_sw_init;
9583         }
9584
9585 #ifdef CONFIG_PCI_IOV
9586         /* SR-IOV not supported on the 82598 */
9587         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9588                 goto skip_sriov;
9589         /* Mailbox */
9590         ixgbe_init_mbx_params_pf(hw);
9591         hw->mbx.ops = ii->mbx_ops;
9592         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
9593         ixgbe_enable_sriov(adapter);
9594 skip_sriov:
9595
9596 #endif
9597         netdev->features = NETIF_F_SG |
9598                            NETIF_F_TSO |
9599                            NETIF_F_TSO6 |
9600                            NETIF_F_RXHASH |
9601                            NETIF_F_RXCSUM |
9602                            NETIF_F_HW_CSUM;
9603
9604 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
9605                                     NETIF_F_GSO_GRE_CSUM | \
9606                                     NETIF_F_GSO_IPXIP4 | \
9607                                     NETIF_F_GSO_IPXIP6 | \
9608                                     NETIF_F_GSO_UDP_TUNNEL | \
9609                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
9610
9611         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
9612         netdev->features |= NETIF_F_GSO_PARTIAL |
9613                             IXGBE_GSO_PARTIAL_FEATURES;
9614
9615         if (hw->mac.type >= ixgbe_mac_82599EB)
9616                 netdev->features |= NETIF_F_SCTP_CRC;
9617
9618         /* copy netdev features into list of user selectable features */
9619         netdev->hw_features |= netdev->features |
9620                                NETIF_F_HW_VLAN_CTAG_FILTER |
9621                                NETIF_F_HW_VLAN_CTAG_RX |
9622                                NETIF_F_HW_VLAN_CTAG_TX |
9623                                NETIF_F_RXALL |
9624                                NETIF_F_HW_L2FW_DOFFLOAD;
9625
9626         if (hw->mac.type >= ixgbe_mac_82599EB)
9627                 netdev->hw_features |= NETIF_F_NTUPLE |
9628                                        NETIF_F_HW_TC;
9629
9630         if (pci_using_dac)
9631                 netdev->features |= NETIF_F_HIGHDMA;
9632
9633         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
9634         netdev->hw_enc_features |= netdev->vlan_features;
9635         netdev->mpls_features |= NETIF_F_HW_CSUM;
9636
9637         /* set this bit last since it cannot be part of vlan_features */
9638         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
9639                             NETIF_F_HW_VLAN_CTAG_RX |
9640                             NETIF_F_HW_VLAN_CTAG_TX;
9641
9642         netdev->priv_flags |= IFF_UNICAST_FLT;
9643         netdev->priv_flags |= IFF_SUPP_NOFCS;
9644
9645 #ifdef CONFIG_IXGBE_DCB
9646         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
9647                 netdev->dcbnl_ops = &dcbnl_ops;
9648 #endif
9649
9650 #ifdef IXGBE_FCOE
9651         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
9652                 unsigned int fcoe_l;
9653
9654                 if (hw->mac.ops.get_device_caps) {
9655                         hw->mac.ops.get_device_caps(hw, &device_caps);
9656                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
9657                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
9658                 }
9659
9660
9661                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
9662                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
9663
9664                 netdev->features |= NETIF_F_FSO |
9665                                     NETIF_F_FCOE_CRC;
9666
9667                 netdev->vlan_features |= NETIF_F_FSO |
9668                                          NETIF_F_FCOE_CRC |
9669                                          NETIF_F_FCOE_MTU;
9670         }
9671 #endif /* IXGBE_FCOE */
9672
9673         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
9674                 netdev->hw_features |= NETIF_F_LRO;
9675         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9676                 netdev->features |= NETIF_F_LRO;
9677
9678         /* make sure the EEPROM is good */
9679         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
9680                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
9681                 err = -EIO;
9682                 goto err_sw_init;
9683         }
9684
9685         eth_platform_get_mac_address(&adapter->pdev->dev,
9686                                      adapter->hw.mac.perm_addr);
9687
9688         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
9689
9690         if (!is_valid_ether_addr(netdev->dev_addr)) {
9691                 e_dev_err("invalid MAC address\n");
9692                 err = -EIO;
9693                 goto err_sw_init;
9694         }
9695
9696         /* Set hw->mac.addr to permanent MAC address */
9697         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
9698         ixgbe_mac_set_default_filter(adapter);
9699
9700         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
9701                     (unsigned long) adapter);
9702
9703         if (ixgbe_removed(hw->hw_addr)) {
9704                 err = -EIO;
9705                 goto err_sw_init;
9706         }
9707         INIT_WORK(&adapter->service_task, ixgbe_service_task);
9708         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
9709         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
9710
9711         err = ixgbe_init_interrupt_scheme(adapter);
9712         if (err)
9713                 goto err_sw_init;
9714
9715         /* WOL not supported for all devices */
9716         adapter->wol = 0;
9717         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
9718         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
9719                                                 pdev->subsystem_device);
9720         if (hw->wol_enabled)
9721                 adapter->wol = IXGBE_WUFC_MAG;
9722
9723         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
9724
9725         /* save off EEPROM version number */
9726         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
9727         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
9728
9729         /* pick up the PCI bus settings for reporting later */
9730         if (ixgbe_pcie_from_parent(hw))
9731                 ixgbe_get_parent_bus_info(adapter);
9732         else
9733                  hw->mac.ops.get_bus_info(hw);
9734
9735         /* calculate the expected PCIe bandwidth required for optimal
9736          * performance. Note that some older parts will never have enough
9737          * bandwidth due to being older generation PCIe parts. We clamp these
9738          * parts to ensure no warning is displayed if it can't be fixed.
9739          */
9740         switch (hw->mac.type) {
9741         case ixgbe_mac_82598EB:
9742                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
9743                 break;
9744         default:
9745                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
9746                 break;
9747         }
9748
9749         /* don't check link if we failed to enumerate functions */
9750         if (expected_gts > 0)
9751                 ixgbe_check_minimum_link(adapter, expected_gts);
9752
9753         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
9754         if (err)
9755                 strlcpy(part_str, "Unknown", sizeof(part_str));
9756         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
9757                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
9758                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
9759                            part_str);
9760         else
9761                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
9762                            hw->mac.type, hw->phy.type, part_str);
9763
9764         e_dev_info("%pM\n", netdev->dev_addr);
9765
9766         /* reset the hardware with the new settings */
9767         err = hw->mac.ops.start_hw(hw);
9768         if (err == IXGBE_ERR_EEPROM_VERSION) {
9769                 /* We are running on a pre-production device, log a warning */
9770                 e_dev_warn("This device is a pre-production adapter/LOM. "
9771                            "Please be aware there may be issues associated "
9772                            "with your hardware.  If you are experiencing "
9773                            "problems please contact your Intel or hardware "
9774                            "representative who provided you with this "
9775                            "hardware.\n");
9776         }
9777         strcpy(netdev->name, "eth%d");
9778         err = register_netdev(netdev);
9779         if (err)
9780                 goto err_register;
9781
9782         pci_set_drvdata(pdev, adapter);
9783
9784         /* power down the optics for 82599 SFP+ fiber */
9785         if (hw->mac.ops.disable_tx_laser)
9786                 hw->mac.ops.disable_tx_laser(hw);
9787
9788         /* carrier off reporting is important to ethtool even BEFORE open */
9789         netif_carrier_off(netdev);
9790
9791 #ifdef CONFIG_IXGBE_DCA
9792         if (dca_add_requester(&pdev->dev) == 0) {
9793                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
9794                 ixgbe_setup_dca(adapter);
9795         }
9796 #endif
9797         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
9798                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
9799                 for (i = 0; i < adapter->num_vfs; i++)
9800                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
9801         }
9802
9803         /* firmware requires driver version to be 0xFFFFFFFF
9804          * since os does not support feature
9805          */
9806         if (hw->mac.ops.set_fw_drv_ver)
9807                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
9808                                            0xFF);
9809
9810         /* add san mac addr to netdev */
9811         ixgbe_add_sanmac_netdev(netdev);
9812
9813         e_dev_info("%s\n", ixgbe_default_device_descr);
9814
9815 #ifdef CONFIG_IXGBE_HWMON
9816         if (ixgbe_sysfs_init(adapter))
9817                 e_err(probe, "failed to allocate sysfs resources\n");
9818 #endif /* CONFIG_IXGBE_HWMON */
9819
9820         ixgbe_dbg_adapter_init(adapter);
9821
9822         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9823         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
9824                 hw->mac.ops.setup_link(hw,
9825                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
9826                         true);
9827
9828         return 0;
9829
9830 err_register:
9831         ixgbe_release_hw_control(adapter);
9832         ixgbe_clear_interrupt_scheme(adapter);
9833 err_sw_init:
9834         ixgbe_disable_sriov(adapter);
9835         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
9836         iounmap(adapter->io_addr);
9837         kfree(adapter->jump_tables[0]);
9838         kfree(adapter->mac_table);
9839 err_ioremap:
9840         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9841         free_netdev(netdev);
9842 err_alloc_etherdev:
9843         pci_disable_pcie_error_reporting(pdev);
9844         pci_release_mem_regions(pdev);
9845 err_pci_reg:
9846 err_dma:
9847         if (!adapter || disable_dev)
9848                 pci_disable_device(pdev);
9849         return err;
9850 }
9851
9852 /**
9853  * ixgbe_remove - Device Removal Routine
9854  * @pdev: PCI device information struct
9855  *
9856  * ixgbe_remove is called by the PCI subsystem to alert the driver
9857  * that it should release a PCI device.  The could be caused by a
9858  * Hot-Plug event, or because the driver is going to be removed from
9859  * memory.
9860  **/
9861 static void ixgbe_remove(struct pci_dev *pdev)
9862 {
9863         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9864         struct net_device *netdev;
9865         bool disable_dev;
9866         int i;
9867
9868         /* if !adapter then we already cleaned up in probe */
9869         if (!adapter)
9870                 return;
9871
9872         netdev  = adapter->netdev;
9873         ixgbe_dbg_adapter_exit(adapter);
9874
9875         set_bit(__IXGBE_REMOVING, &adapter->state);
9876         cancel_work_sync(&adapter->service_task);
9877
9878
9879 #ifdef CONFIG_IXGBE_DCA
9880         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9881                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9882                 dca_remove_requester(&pdev->dev);
9883                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
9884                                 IXGBE_DCA_CTRL_DCA_DISABLE);
9885         }
9886
9887 #endif
9888 #ifdef CONFIG_IXGBE_HWMON
9889         ixgbe_sysfs_exit(adapter);
9890 #endif /* CONFIG_IXGBE_HWMON */
9891
9892         /* remove the added san mac */
9893         ixgbe_del_sanmac_netdev(netdev);
9894
9895 #ifdef CONFIG_PCI_IOV
9896         ixgbe_disable_sriov(adapter);
9897 #endif
9898         if (netdev->reg_state == NETREG_REGISTERED)
9899                 unregister_netdev(netdev);
9900
9901         ixgbe_clear_interrupt_scheme(adapter);
9902
9903         ixgbe_release_hw_control(adapter);
9904
9905 #ifdef CONFIG_DCB
9906         kfree(adapter->ixgbe_ieee_pfc);
9907         kfree(adapter->ixgbe_ieee_ets);
9908
9909 #endif
9910         iounmap(adapter->io_addr);
9911         pci_release_mem_regions(pdev);
9912
9913         e_dev_info("complete\n");
9914
9915         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
9916                 if (adapter->jump_tables[i]) {
9917                         kfree(adapter->jump_tables[i]->input);
9918                         kfree(adapter->jump_tables[i]->mask);
9919                 }
9920                 kfree(adapter->jump_tables[i]);
9921         }
9922
9923         kfree(adapter->mac_table);
9924         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9925         free_netdev(netdev);
9926
9927         pci_disable_pcie_error_reporting(pdev);
9928
9929         if (disable_dev)
9930                 pci_disable_device(pdev);
9931 }
9932
9933 /**
9934  * ixgbe_io_error_detected - called when PCI error is detected
9935  * @pdev: Pointer to PCI device
9936  * @state: The current pci connection state
9937  *
9938  * This function is called after a PCI bus error affecting
9939  * this device has been detected.
9940  */
9941 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
9942                                                 pci_channel_state_t state)
9943 {
9944         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9945         struct net_device *netdev = adapter->netdev;
9946
9947 #ifdef CONFIG_PCI_IOV
9948         struct ixgbe_hw *hw = &adapter->hw;
9949         struct pci_dev *bdev, *vfdev;
9950         u32 dw0, dw1, dw2, dw3;
9951         int vf, pos;
9952         u16 req_id, pf_func;
9953
9954         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
9955             adapter->num_vfs == 0)
9956                 goto skip_bad_vf_detection;
9957
9958         bdev = pdev->bus->self;
9959         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9960                 bdev = bdev->bus->self;
9961
9962         if (!bdev)
9963                 goto skip_bad_vf_detection;
9964
9965         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9966         if (!pos)
9967                 goto skip_bad_vf_detection;
9968
9969         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
9970         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
9971         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
9972         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
9973         if (ixgbe_removed(hw->hw_addr))
9974                 goto skip_bad_vf_detection;
9975
9976         req_id = dw1 >> 16;
9977         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9978         if (!(req_id & 0x0080))
9979                 goto skip_bad_vf_detection;
9980
9981         pf_func = req_id & 0x01;
9982         if ((pf_func & 1) == (pdev->devfn & 1)) {
9983                 unsigned int device_id;
9984
9985                 vf = (req_id & 0x7F) >> 1;
9986                 e_dev_err("VF %d has caused a PCIe error\n", vf);
9987                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9988                                 "%8.8x\tdw3: %8.8x\n",
9989                 dw0, dw1, dw2, dw3);
9990                 switch (adapter->hw.mac.type) {
9991                 case ixgbe_mac_82599EB:
9992                         device_id = IXGBE_82599_VF_DEVICE_ID;
9993                         break;
9994                 case ixgbe_mac_X540:
9995                         device_id = IXGBE_X540_VF_DEVICE_ID;
9996                         break;
9997                 case ixgbe_mac_X550:
9998                         device_id = IXGBE_DEV_ID_X550_VF;
9999                         break;
10000                 case ixgbe_mac_X550EM_x:
10001                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
10002                         break;
10003                 case ixgbe_mac_x550em_a:
10004                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
10005                         break;
10006                 default:
10007                         device_id = 0;
10008                         break;
10009                 }
10010
10011                 /* Find the pci device of the offending VF */
10012                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10013                 while (vfdev) {
10014                         if (vfdev->devfn == (req_id & 0xFF))
10015                                 break;
10016                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10017                                                device_id, vfdev);
10018                 }
10019                 /*
10020                  * There's a slim chance the VF could have been hot plugged,
10021                  * so if it is no longer present we don't need to issue the
10022                  * VFLR.  Just clean up the AER in that case.
10023                  */
10024                 if (vfdev) {
10025                         ixgbe_issue_vf_flr(adapter, vfdev);
10026                         /* Free device reference count */
10027                         pci_dev_put(vfdev);
10028                 }
10029
10030                 pci_cleanup_aer_uncorrect_error_status(pdev);
10031         }
10032
10033         /*
10034          * Even though the error may have occurred on the other port
10035          * we still need to increment the vf error reference count for
10036          * both ports because the I/O resume function will be called
10037          * for both of them.
10038          */
10039         adapter->vferr_refcount++;
10040
10041         return PCI_ERS_RESULT_RECOVERED;
10042
10043 skip_bad_vf_detection:
10044 #endif /* CONFIG_PCI_IOV */
10045         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10046                 return PCI_ERS_RESULT_DISCONNECT;
10047
10048         rtnl_lock();
10049         netif_device_detach(netdev);
10050
10051         if (state == pci_channel_io_perm_failure) {
10052                 rtnl_unlock();
10053                 return PCI_ERS_RESULT_DISCONNECT;
10054         }
10055
10056         if (netif_running(netdev))
10057                 ixgbe_close_suspend(adapter);
10058
10059         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10060                 pci_disable_device(pdev);
10061         rtnl_unlock();
10062
10063         /* Request a slot reset. */
10064         return PCI_ERS_RESULT_NEED_RESET;
10065 }
10066
10067 /**
10068  * ixgbe_io_slot_reset - called after the pci bus has been reset.
10069  * @pdev: Pointer to PCI device
10070  *
10071  * Restart the card from scratch, as if from a cold-boot.
10072  */
10073 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10074 {
10075         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10076         pci_ers_result_t result;
10077         int err;
10078
10079         if (pci_enable_device_mem(pdev)) {
10080                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10081                 result = PCI_ERS_RESULT_DISCONNECT;
10082         } else {
10083                 smp_mb__before_atomic();
10084                 clear_bit(__IXGBE_DISABLED, &adapter->state);
10085                 adapter->hw.hw_addr = adapter->io_addr;
10086                 pci_set_master(pdev);
10087                 pci_restore_state(pdev);
10088                 pci_save_state(pdev);
10089
10090                 pci_wake_from_d3(pdev, false);
10091
10092                 ixgbe_reset(adapter);
10093                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10094                 result = PCI_ERS_RESULT_RECOVERED;
10095         }
10096
10097         err = pci_cleanup_aer_uncorrect_error_status(pdev);
10098         if (err) {
10099                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10100                           "failed 0x%0x\n", err);
10101                 /* non-fatal, continue */
10102         }
10103
10104         return result;
10105 }
10106
10107 /**
10108  * ixgbe_io_resume - called when traffic can start flowing again.
10109  * @pdev: Pointer to PCI device
10110  *
10111  * This callback is called when the error recovery driver tells us that
10112  * its OK to resume normal operation.
10113  */
10114 static void ixgbe_io_resume(struct pci_dev *pdev)
10115 {
10116         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10117         struct net_device *netdev = adapter->netdev;
10118
10119 #ifdef CONFIG_PCI_IOV
10120         if (adapter->vferr_refcount) {
10121                 e_info(drv, "Resuming after VF err\n");
10122                 adapter->vferr_refcount--;
10123                 return;
10124         }
10125
10126 #endif
10127         rtnl_lock();
10128         if (netif_running(netdev))
10129                 ixgbe_open(netdev);
10130
10131         netif_device_attach(netdev);
10132         rtnl_unlock();
10133 }
10134
10135 static const struct pci_error_handlers ixgbe_err_handler = {
10136         .error_detected = ixgbe_io_error_detected,
10137         .slot_reset = ixgbe_io_slot_reset,
10138         .resume = ixgbe_io_resume,
10139 };
10140
10141 static struct pci_driver ixgbe_driver = {
10142         .name     = ixgbe_driver_name,
10143         .id_table = ixgbe_pci_tbl,
10144         .probe    = ixgbe_probe,
10145         .remove   = ixgbe_remove,
10146 #ifdef CONFIG_PM
10147         .suspend  = ixgbe_suspend,
10148         .resume   = ixgbe_resume,
10149 #endif
10150         .shutdown = ixgbe_shutdown,
10151         .sriov_configure = ixgbe_pci_sriov_configure,
10152         .err_handler = &ixgbe_err_handler
10153 };
10154
10155 /**
10156  * ixgbe_init_module - Driver Registration Routine
10157  *
10158  * ixgbe_init_module is the first routine called when the driver is
10159  * loaded. All it does is register with the PCI subsystem.
10160  **/
10161 static int __init ixgbe_init_module(void)
10162 {
10163         int ret;
10164         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10165         pr_info("%s\n", ixgbe_copyright);
10166
10167         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10168         if (!ixgbe_wq) {
10169                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
10170                 return -ENOMEM;
10171         }
10172
10173         ixgbe_dbg_init();
10174
10175         ret = pci_register_driver(&ixgbe_driver);
10176         if (ret) {
10177                 destroy_workqueue(ixgbe_wq);
10178                 ixgbe_dbg_exit();
10179                 return ret;
10180         }
10181
10182 #ifdef CONFIG_IXGBE_DCA
10183         dca_register_notify(&dca_notifier);
10184 #endif
10185
10186         return 0;
10187 }
10188
10189 module_init(ixgbe_init_module);
10190
10191 /**
10192  * ixgbe_exit_module - Driver Exit Cleanup Routine
10193  *
10194  * ixgbe_exit_module is called just before the driver is removed
10195  * from memory.
10196  **/
10197 static void __exit ixgbe_exit_module(void)
10198 {
10199 #ifdef CONFIG_IXGBE_DCA
10200         dca_unregister_notify(&dca_notifier);
10201 #endif
10202         pci_unregister_driver(&ixgbe_driver);
10203
10204         ixgbe_dbg_exit();
10205         if (ixgbe_wq) {
10206                 destroy_workqueue(ixgbe_wq);
10207                 ixgbe_wq = NULL;
10208         }
10209 }
10210
10211 #ifdef CONFIG_IXGBE_DCA
10212 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
10213                             void *p)
10214 {
10215         int ret_val;
10216
10217         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
10218                                          __ixgbe_notify_dca);
10219
10220         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
10221 }
10222
10223 #endif /* CONFIG_IXGBE_DCA */
10224
10225 module_exit(ixgbe_exit_module);
10226
10227 /* ixgbe_main.c */