1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2016 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 /* ethtool support for ixgbe */
31 #include <linux/interrupt.h>
32 #include <linux/types.h>
33 #include <linux/module.h>
34 #include <linux/slab.h>
35 #include <linux/pci.h>
36 #include <linux/netdevice.h>
37 #include <linux/ethtool.h>
38 #include <linux/vmalloc.h>
39 #include <linux/highmem.h>
40 #include <linux/uaccess.h>
43 #include "ixgbe_phy.h"
46 #define IXGBE_ALL_RAR_ENTRIES 16
48 enum {NETDEV_STATS, IXGBE_STATS};
51 char stat_string[ETH_GSTRING_LEN];
57 #define IXGBE_STAT(m) IXGBE_STATS, \
58 sizeof(((struct ixgbe_adapter *)0)->m), \
59 offsetof(struct ixgbe_adapter, m)
60 #define IXGBE_NETDEV_STAT(m) NETDEV_STATS, \
61 sizeof(((struct rtnl_link_stats64 *)0)->m), \
62 offsetof(struct rtnl_link_stats64, m)
64 static const struct ixgbe_stats ixgbe_gstrings_stats[] = {
65 {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
66 {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
67 {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
68 {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
69 {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
70 {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
71 {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
72 {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
73 {"lsc_int", IXGBE_STAT(lsc_int)},
74 {"tx_busy", IXGBE_STAT(tx_busy)},
75 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
76 {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
77 {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
78 {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
79 {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
80 {"multicast", IXGBE_NETDEV_STAT(multicast)},
81 {"broadcast", IXGBE_STAT(stats.bprc)},
82 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
83 {"collisions", IXGBE_NETDEV_STAT(collisions)},
84 {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
85 {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
86 {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
87 {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
88 {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
89 {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
90 {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
91 {"fdir_overflow", IXGBE_STAT(fdir_overflow)},
92 {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
93 {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
94 {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
95 {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
96 {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
97 {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
98 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
99 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
100 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
101 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
102 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
103 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
104 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
105 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
106 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
107 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
108 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
109 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
110 {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
111 {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
112 {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
113 {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
114 {"tx_hwtstamp_timeouts", IXGBE_STAT(tx_hwtstamp_timeouts)},
115 {"tx_hwtstamp_skipped", IXGBE_STAT(tx_hwtstamp_skipped)},
116 {"rx_hwtstamp_cleared", IXGBE_STAT(rx_hwtstamp_cleared)},
118 {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
119 {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
120 {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
121 {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
122 {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)},
123 {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)},
124 {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
125 {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
126 #endif /* IXGBE_FCOE */
129 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so
130 * we set the num_rx_queues to evaluate to num_tx_queues. This is
131 * used because we do not have a good way to get the max number of
132 * rx queues with CONFIG_RPS disabled.
134 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues
136 #define IXGBE_QUEUE_STATS_LEN ( \
137 (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \
138 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
139 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
140 #define IXGBE_PB_STATS_LEN ( \
141 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
142 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
143 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
144 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
146 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
147 IXGBE_PB_STATS_LEN + \
148 IXGBE_QUEUE_STATS_LEN)
150 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
151 "Register test (offline)", "Eeprom test (offline)",
152 "Interrupt test (offline)", "Loopback test (offline)",
153 "Link test (on/offline)"
155 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
157 static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = {
158 #define IXGBE_PRIV_FLAGS_LEGACY_RX BIT(0)
162 #define IXGBE_PRIV_FLAGS_STR_LEN ARRAY_SIZE(ixgbe_priv_flags_strings)
164 /* currently supported speeds for 10G */
165 #define ADVRTSD_MSK_10G (SUPPORTED_10000baseT_Full | \
166 SUPPORTED_10000baseKX4_Full | \
167 SUPPORTED_10000baseKR_Full)
169 #define ixgbe_isbackplane(type) ((type) == ixgbe_media_type_backplane)
171 static u32 ixgbe_get_supported_10gtypes(struct ixgbe_hw *hw)
173 if (!ixgbe_isbackplane(hw->phy.media_type))
174 return SUPPORTED_10000baseT_Full;
176 switch (hw->device_id) {
177 case IXGBE_DEV_ID_82598:
178 case IXGBE_DEV_ID_82599_KX4:
179 case IXGBE_DEV_ID_82599_KX4_MEZZ:
180 case IXGBE_DEV_ID_X550EM_X_KX4:
181 return SUPPORTED_10000baseKX4_Full;
182 case IXGBE_DEV_ID_82598_BX:
183 case IXGBE_DEV_ID_82599_KR:
184 case IXGBE_DEV_ID_X550EM_X_KR:
185 case IXGBE_DEV_ID_X550EM_X_XFI:
186 return SUPPORTED_10000baseKR_Full;
188 return SUPPORTED_10000baseKX4_Full |
189 SUPPORTED_10000baseKR_Full;
193 static int ixgbe_get_link_ksettings(struct net_device *netdev,
194 struct ethtool_link_ksettings *cmd)
196 struct ixgbe_adapter *adapter = netdev_priv(netdev);
197 struct ixgbe_hw *hw = &adapter->hw;
198 ixgbe_link_speed supported_link;
199 bool autoneg = false;
200 u32 supported, advertising;
202 ethtool_convert_link_mode_to_legacy_u32(&supported,
203 cmd->link_modes.supported);
205 hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg);
207 /* set the supported link speeds */
208 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
209 supported |= ixgbe_get_supported_10gtypes(hw);
210 if (supported_link & IXGBE_LINK_SPEED_1GB_FULL)
211 supported |= (ixgbe_isbackplane(hw->phy.media_type)) ?
212 SUPPORTED_1000baseKX_Full :
213 SUPPORTED_1000baseT_Full;
214 if (supported_link & IXGBE_LINK_SPEED_100_FULL)
215 supported |= SUPPORTED_100baseT_Full;
216 if (supported_link & IXGBE_LINK_SPEED_10_FULL)
217 supported |= SUPPORTED_10baseT_Full;
219 /* default advertised speed if phy.autoneg_advertised isn't set */
220 advertising = supported;
221 /* set the advertised speeds */
222 if (hw->phy.autoneg_advertised) {
224 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL)
225 advertising |= ADVERTISED_10baseT_Full;
226 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL)
227 advertising |= ADVERTISED_100baseT_Full;
228 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
229 advertising |= supported & ADVRTSD_MSK_10G;
230 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) {
231 if (supported & SUPPORTED_1000baseKX_Full)
232 advertising |= ADVERTISED_1000baseKX_Full;
234 advertising |= ADVERTISED_1000baseT_Full;
237 if (hw->phy.multispeed_fiber && !autoneg) {
238 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
239 advertising = ADVERTISED_10000baseT_Full;
244 supported |= SUPPORTED_Autoneg;
245 advertising |= ADVERTISED_Autoneg;
246 cmd->base.autoneg = AUTONEG_ENABLE;
248 cmd->base.autoneg = AUTONEG_DISABLE;
250 /* Determine the remaining settings based on the PHY type. */
251 switch (adapter->hw.phy.type) {
254 case ixgbe_phy_x550em_ext_t:
256 case ixgbe_phy_cu_unknown:
257 supported |= SUPPORTED_TP;
258 advertising |= ADVERTISED_TP;
259 cmd->base.port = PORT_TP;
262 supported |= SUPPORTED_FIBRE;
263 advertising |= ADVERTISED_FIBRE;
264 cmd->base.port = PORT_FIBRE;
267 case ixgbe_phy_sfp_passive_tyco:
268 case ixgbe_phy_sfp_passive_unknown:
269 case ixgbe_phy_sfp_ftl:
270 case ixgbe_phy_sfp_avago:
271 case ixgbe_phy_sfp_intel:
272 case ixgbe_phy_sfp_unknown:
273 case ixgbe_phy_qsfp_passive_unknown:
274 case ixgbe_phy_qsfp_active_unknown:
275 case ixgbe_phy_qsfp_intel:
276 case ixgbe_phy_qsfp_unknown:
277 /* SFP+ devices, further checking needed */
278 switch (adapter->hw.phy.sfp_type) {
279 case ixgbe_sfp_type_da_cu:
280 case ixgbe_sfp_type_da_cu_core0:
281 case ixgbe_sfp_type_da_cu_core1:
282 supported |= SUPPORTED_FIBRE;
283 advertising |= ADVERTISED_FIBRE;
284 cmd->base.port = PORT_DA;
286 case ixgbe_sfp_type_sr:
287 case ixgbe_sfp_type_lr:
288 case ixgbe_sfp_type_srlr_core0:
289 case ixgbe_sfp_type_srlr_core1:
290 case ixgbe_sfp_type_1g_sx_core0:
291 case ixgbe_sfp_type_1g_sx_core1:
292 case ixgbe_sfp_type_1g_lx_core0:
293 case ixgbe_sfp_type_1g_lx_core1:
294 supported |= SUPPORTED_FIBRE;
295 advertising |= ADVERTISED_FIBRE;
296 cmd->base.port = PORT_FIBRE;
298 case ixgbe_sfp_type_not_present:
299 supported |= SUPPORTED_FIBRE;
300 advertising |= ADVERTISED_FIBRE;
301 cmd->base.port = PORT_NONE;
303 case ixgbe_sfp_type_1g_cu_core0:
304 case ixgbe_sfp_type_1g_cu_core1:
305 supported |= SUPPORTED_TP;
306 advertising |= ADVERTISED_TP;
307 cmd->base.port = PORT_TP;
309 case ixgbe_sfp_type_unknown:
311 supported |= SUPPORTED_FIBRE;
312 advertising |= ADVERTISED_FIBRE;
313 cmd->base.port = PORT_OTHER;
318 supported |= SUPPORTED_FIBRE;
319 advertising |= ADVERTISED_FIBRE;
320 cmd->base.port = PORT_NONE;
322 case ixgbe_phy_unknown:
323 case ixgbe_phy_generic:
324 case ixgbe_phy_sfp_unsupported:
326 supported |= SUPPORTED_FIBRE;
327 advertising |= ADVERTISED_FIBRE;
328 cmd->base.port = PORT_OTHER;
332 /* Indicate pause support */
333 supported |= SUPPORTED_Pause;
335 switch (hw->fc.requested_mode) {
337 advertising |= ADVERTISED_Pause;
339 case ixgbe_fc_rx_pause:
340 advertising |= ADVERTISED_Pause |
341 ADVERTISED_Asym_Pause;
343 case ixgbe_fc_tx_pause:
344 advertising |= ADVERTISED_Asym_Pause;
347 advertising &= ~(ADVERTISED_Pause |
348 ADVERTISED_Asym_Pause);
351 if (netif_carrier_ok(netdev)) {
352 switch (adapter->link_speed) {
353 case IXGBE_LINK_SPEED_10GB_FULL:
354 cmd->base.speed = SPEED_10000;
356 case IXGBE_LINK_SPEED_5GB_FULL:
357 cmd->base.speed = SPEED_5000;
359 case IXGBE_LINK_SPEED_2_5GB_FULL:
360 cmd->base.speed = SPEED_2500;
362 case IXGBE_LINK_SPEED_1GB_FULL:
363 cmd->base.speed = SPEED_1000;
365 case IXGBE_LINK_SPEED_100_FULL:
366 cmd->base.speed = SPEED_100;
368 case IXGBE_LINK_SPEED_10_FULL:
369 cmd->base.speed = SPEED_10;
374 cmd->base.duplex = DUPLEX_FULL;
376 cmd->base.speed = SPEED_UNKNOWN;
377 cmd->base.duplex = DUPLEX_UNKNOWN;
380 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
382 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
388 static int ixgbe_set_link_ksettings(struct net_device *netdev,
389 const struct ethtool_link_ksettings *cmd)
391 struct ixgbe_adapter *adapter = netdev_priv(netdev);
392 struct ixgbe_hw *hw = &adapter->hw;
395 u32 supported, advertising;
397 ethtool_convert_link_mode_to_legacy_u32(&supported,
398 cmd->link_modes.supported);
399 ethtool_convert_link_mode_to_legacy_u32(&advertising,
400 cmd->link_modes.advertising);
402 if ((hw->phy.media_type == ixgbe_media_type_copper) ||
403 (hw->phy.multispeed_fiber)) {
405 * this function does not support duplex forcing, but can
406 * limit the advertising of the adapter to the specified speed
408 if (advertising & ~supported)
411 /* only allow one speed at a time if no autoneg */
412 if (!cmd->base.autoneg && hw->phy.multispeed_fiber) {
414 (ADVERTISED_10000baseT_Full |
415 ADVERTISED_1000baseT_Full))
419 old = hw->phy.autoneg_advertised;
421 if (advertising & ADVERTISED_10000baseT_Full)
422 advertised |= IXGBE_LINK_SPEED_10GB_FULL;
424 if (advertising & ADVERTISED_1000baseT_Full)
425 advertised |= IXGBE_LINK_SPEED_1GB_FULL;
427 if (advertising & ADVERTISED_100baseT_Full)
428 advertised |= IXGBE_LINK_SPEED_100_FULL;
430 if (advertising & ADVERTISED_10baseT_Full)
431 advertised |= IXGBE_LINK_SPEED_10_FULL;
433 if (old == advertised)
435 /* this sets the link speed and restarts auto-neg */
436 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
437 usleep_range(1000, 2000);
439 hw->mac.autotry_restart = true;
440 err = hw->mac.ops.setup_link(hw, advertised, true);
442 e_info(probe, "setup link failed with code %d\n", err);
443 hw->mac.ops.setup_link(hw, old, true);
445 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
447 /* in this case we currently only support 10Gb/FULL */
448 u32 speed = cmd->base.speed;
450 if ((cmd->base.autoneg == AUTONEG_ENABLE) ||
451 (advertising != ADVERTISED_10000baseT_Full) ||
452 (speed + cmd->base.duplex != SPEED_10000 + DUPLEX_FULL))
459 static void ixgbe_get_pauseparam(struct net_device *netdev,
460 struct ethtool_pauseparam *pause)
462 struct ixgbe_adapter *adapter = netdev_priv(netdev);
463 struct ixgbe_hw *hw = &adapter->hw;
465 if (ixgbe_device_supports_autoneg_fc(hw) &&
466 !hw->fc.disable_fc_autoneg)
471 if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
473 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
475 } else if (hw->fc.current_mode == ixgbe_fc_full) {
481 static int ixgbe_set_pauseparam(struct net_device *netdev,
482 struct ethtool_pauseparam *pause)
484 struct ixgbe_adapter *adapter = netdev_priv(netdev);
485 struct ixgbe_hw *hw = &adapter->hw;
486 struct ixgbe_fc_info fc = hw->fc;
488 /* 82598 does no support link flow control with DCB enabled */
489 if ((hw->mac.type == ixgbe_mac_82598EB) &&
490 (adapter->flags & IXGBE_FLAG_DCB_ENABLED))
493 /* some devices do not support autoneg of link flow control */
494 if ((pause->autoneg == AUTONEG_ENABLE) &&
495 !ixgbe_device_supports_autoneg_fc(hw))
498 fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE);
500 if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
501 fc.requested_mode = ixgbe_fc_full;
502 else if (pause->rx_pause && !pause->tx_pause)
503 fc.requested_mode = ixgbe_fc_rx_pause;
504 else if (!pause->rx_pause && pause->tx_pause)
505 fc.requested_mode = ixgbe_fc_tx_pause;
507 fc.requested_mode = ixgbe_fc_none;
509 /* if the thing changed then we'll update and use new autoneg */
510 if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
512 if (netif_running(netdev))
513 ixgbe_reinit_locked(adapter);
515 ixgbe_reset(adapter);
521 static u32 ixgbe_get_msglevel(struct net_device *netdev)
523 struct ixgbe_adapter *adapter = netdev_priv(netdev);
524 return adapter->msg_enable;
527 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
529 struct ixgbe_adapter *adapter = netdev_priv(netdev);
530 adapter->msg_enable = data;
533 static int ixgbe_get_regs_len(struct net_device *netdev)
535 #define IXGBE_REGS_LEN 1139
536 return IXGBE_REGS_LEN * sizeof(u32);
539 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
541 static void ixgbe_get_regs(struct net_device *netdev,
542 struct ethtool_regs *regs, void *p)
544 struct ixgbe_adapter *adapter = netdev_priv(netdev);
545 struct ixgbe_hw *hw = &adapter->hw;
549 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
551 regs->version = hw->mac.type << 24 | hw->revision_id << 16 |
554 /* General Registers */
555 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
556 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
557 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
558 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
559 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
560 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
561 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
562 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
565 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
566 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
567 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA(hw));
568 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
569 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
570 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
571 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
572 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
573 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
574 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC(hw));
577 /* don't read EICR because it can clear interrupt causes, instead
578 * read EICS which is a shadow but doesn't clear EICR */
579 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
580 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
581 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
582 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
583 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
584 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
585 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
586 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
587 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
588 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
589 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
590 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
593 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
594 for (i = 0; i < 4; i++)
595 regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_FCTTV(i));
596 for (i = 0; i < 8; i++) {
597 switch (hw->mac.type) {
598 case ixgbe_mac_82598EB:
599 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
600 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
602 case ixgbe_mac_82599EB:
605 case ixgbe_mac_X550EM_x:
606 case ixgbe_mac_x550em_a:
607 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
608 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
614 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
615 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
618 for (i = 0; i < 64; i++)
619 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
620 for (i = 0; i < 64; i++)
621 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
622 for (i = 0; i < 64; i++)
623 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
624 for (i = 0; i < 64; i++)
625 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
626 for (i = 0; i < 64; i++)
627 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
628 for (i = 0; i < 64; i++)
629 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
630 for (i = 0; i < 16; i++)
631 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
632 for (i = 0; i < 16; i++)
633 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
634 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
635 for (i = 0; i < 8; i++)
636 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
637 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
638 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
641 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
642 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
643 for (i = 0; i < 16; i++)
644 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
645 for (i = 0; i < 16; i++)
646 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
647 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
648 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
649 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
650 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
651 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
652 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
653 for (i = 0; i < 8; i++)
654 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
655 for (i = 0; i < 8; i++)
656 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
657 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
660 for (i = 0; i < 32; i++)
661 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
662 for (i = 0; i < 32; i++)
663 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
664 for (i = 0; i < 32; i++)
665 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
666 for (i = 0; i < 32; i++)
667 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
668 for (i = 0; i < 32; i++)
669 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
670 for (i = 0; i < 32; i++)
671 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
672 for (i = 0; i < 32; i++)
673 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
674 for (i = 0; i < 32; i++)
675 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
676 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
677 for (i = 0; i < 16; i++)
678 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
679 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
680 for (i = 0; i < 8; i++)
681 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
682 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
685 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
686 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
687 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
688 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
689 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
690 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
691 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
692 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
693 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
696 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS); /* same as FCCFG */
697 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); /* same as RTTPCS */
699 switch (hw->mac.type) {
700 case ixgbe_mac_82598EB:
701 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
702 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
703 for (i = 0; i < 8; i++)
705 IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
706 for (i = 0; i < 8; i++)
708 IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
709 for (i = 0; i < 8; i++)
711 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
712 for (i = 0; i < 8; i++)
714 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
716 case ixgbe_mac_82599EB:
719 case ixgbe_mac_X550EM_x:
720 case ixgbe_mac_x550em_a:
721 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
722 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS);
723 for (i = 0; i < 8; i++)
725 IXGBE_READ_REG(hw, IXGBE_RTRPT4C(i));
726 for (i = 0; i < 8; i++)
728 IXGBE_READ_REG(hw, IXGBE_RTRPT4S(i));
729 for (i = 0; i < 8; i++)
731 IXGBE_READ_REG(hw, IXGBE_RTTDT2C(i));
732 for (i = 0; i < 8; i++)
734 IXGBE_READ_REG(hw, IXGBE_RTTDT2S(i));
740 for (i = 0; i < 8; i++)
742 IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */
743 for (i = 0; i < 8; i++)
745 IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */
748 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
749 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
750 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
751 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
752 for (i = 0; i < 8; i++)
753 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
754 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
755 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
756 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
757 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
758 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
759 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
760 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
761 for (i = 0; i < 8; i++)
762 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
763 for (i = 0; i < 8; i++)
764 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
765 for (i = 0; i < 8; i++)
766 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
767 for (i = 0; i < 8; i++)
768 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
769 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
770 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
771 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
772 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
773 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
774 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
775 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
776 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
777 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
778 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
779 regs_buff[942] = (u32)IXGBE_GET_STAT(adapter, gorc);
780 regs_buff[943] = (u32)(IXGBE_GET_STAT(adapter, gorc) >> 32);
781 regs_buff[944] = (u32)IXGBE_GET_STAT(adapter, gotc);
782 regs_buff[945] = (u32)(IXGBE_GET_STAT(adapter, gotc) >> 32);
783 for (i = 0; i < 8; i++)
784 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
785 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
786 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
787 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
788 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
789 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
790 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
791 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
792 regs_buff[961] = (u32)IXGBE_GET_STAT(adapter, tor);
793 regs_buff[962] = (u32)(IXGBE_GET_STAT(adapter, tor) >> 32);
794 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
795 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
796 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
797 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
798 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
799 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
800 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
801 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
802 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
803 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
804 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
805 for (i = 0; i < 16; i++)
806 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
807 for (i = 0; i < 16; i++)
808 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
809 for (i = 0; i < 16; i++)
810 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
811 for (i = 0; i < 16; i++)
812 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
815 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
816 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
817 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
818 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
819 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
820 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
821 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
822 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
823 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
824 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
825 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
826 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
827 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
828 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
829 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
830 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
831 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
832 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
833 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
834 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
835 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
836 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
837 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
838 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
839 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
840 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
841 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
842 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
843 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
844 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
845 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
846 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
847 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
850 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
851 for (i = 0; i < 8; i++)
852 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
853 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
854 for (i = 0; i < 4; i++)
855 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
856 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
857 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
858 for (i = 0; i < 8; i++)
859 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
860 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
861 for (i = 0; i < 4; i++)
862 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
863 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
864 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
865 for (i = 0; i < 4; i++)
866 regs_buff[1102 + i] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA(i));
867 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
868 for (i = 0; i < 4; i++)
869 regs_buff[1107 + i] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA(i));
870 for (i = 0; i < 8; i++)
871 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
872 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
873 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
874 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
875 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
876 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
877 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
878 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
879 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
880 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
882 /* 82599 X540 specific registers */
883 regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN);
885 /* 82599 X540 specific DCB registers */
886 regs_buff[1129] = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
887 regs_buff[1130] = IXGBE_READ_REG(hw, IXGBE_RTTUP2TC);
888 for (i = 0; i < 4; i++)
889 regs_buff[1131 + i] = IXGBE_READ_REG(hw, IXGBE_TXLLQ(i));
890 regs_buff[1135] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRM);
891 /* same as RTTQCNRM */
892 regs_buff[1136] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRD);
893 /* same as RTTQCNRR */
895 /* X540 specific DCB registers */
896 regs_buff[1137] = IXGBE_READ_REG(hw, IXGBE_RTTQCNCR);
897 regs_buff[1138] = IXGBE_READ_REG(hw, IXGBE_RTTQCNTG);
900 static int ixgbe_get_eeprom_len(struct net_device *netdev)
902 struct ixgbe_adapter *adapter = netdev_priv(netdev);
903 return adapter->hw.eeprom.word_size * 2;
906 static int ixgbe_get_eeprom(struct net_device *netdev,
907 struct ethtool_eeprom *eeprom, u8 *bytes)
909 struct ixgbe_adapter *adapter = netdev_priv(netdev);
910 struct ixgbe_hw *hw = &adapter->hw;
912 int first_word, last_word, eeprom_len;
916 if (eeprom->len == 0)
919 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
921 first_word = eeprom->offset >> 1;
922 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
923 eeprom_len = last_word - first_word + 1;
925 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
929 ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
932 /* Device's eeprom is always little-endian, word addressable */
933 for (i = 0; i < eeprom_len; i++)
934 le16_to_cpus(&eeprom_buff[i]);
936 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
942 static int ixgbe_set_eeprom(struct net_device *netdev,
943 struct ethtool_eeprom *eeprom, u8 *bytes)
945 struct ixgbe_adapter *adapter = netdev_priv(netdev);
946 struct ixgbe_hw *hw = &adapter->hw;
949 int max_len, first_word, last_word, ret_val = 0;
952 if (eeprom->len == 0)
955 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
958 max_len = hw->eeprom.word_size * 2;
960 first_word = eeprom->offset >> 1;
961 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
962 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
968 if (eeprom->offset & 1) {
970 * need read/modify/write of first changed EEPROM word
971 * only the second byte of the word is being modified
973 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]);
979 if ((eeprom->offset + eeprom->len) & 1) {
981 * need read/modify/write of last changed EEPROM word
982 * only the first byte of the word is being modified
984 ret_val = hw->eeprom.ops.read(hw, last_word,
985 &eeprom_buff[last_word - first_word]);
990 /* Device's eeprom is always little-endian, word addressable */
991 for (i = 0; i < last_word - first_word + 1; i++)
992 le16_to_cpus(&eeprom_buff[i]);
994 memcpy(ptr, bytes, eeprom->len);
996 for (i = 0; i < last_word - first_word + 1; i++)
997 cpu_to_le16s(&eeprom_buff[i]);
999 ret_val = hw->eeprom.ops.write_buffer(hw, first_word,
1000 last_word - first_word + 1,
1003 /* Update the checksum */
1005 hw->eeprom.ops.update_checksum(hw);
1012 static void ixgbe_get_drvinfo(struct net_device *netdev,
1013 struct ethtool_drvinfo *drvinfo)
1015 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1018 strlcpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
1019 strlcpy(drvinfo->version, ixgbe_driver_version,
1020 sizeof(drvinfo->version));
1022 nvm_track_id = (adapter->eeprom_verh << 16) |
1023 adapter->eeprom_verl;
1024 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "0x%08x",
1027 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
1028 sizeof(drvinfo->bus_info));
1030 drvinfo->n_priv_flags = IXGBE_PRIV_FLAGS_STR_LEN;
1033 static void ixgbe_get_ringparam(struct net_device *netdev,
1034 struct ethtool_ringparam *ring)
1036 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1037 struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
1038 struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
1040 ring->rx_max_pending = IXGBE_MAX_RXD;
1041 ring->tx_max_pending = IXGBE_MAX_TXD;
1042 ring->rx_pending = rx_ring->count;
1043 ring->tx_pending = tx_ring->count;
1046 static int ixgbe_set_ringparam(struct net_device *netdev,
1047 struct ethtool_ringparam *ring)
1049 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1050 struct ixgbe_ring *temp_ring;
1052 u32 new_rx_count, new_tx_count;
1054 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1057 new_tx_count = clamp_t(u32, ring->tx_pending,
1058 IXGBE_MIN_TXD, IXGBE_MAX_TXD);
1059 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
1061 new_rx_count = clamp_t(u32, ring->rx_pending,
1062 IXGBE_MIN_RXD, IXGBE_MAX_RXD);
1063 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
1065 if ((new_tx_count == adapter->tx_ring_count) &&
1066 (new_rx_count == adapter->rx_ring_count)) {
1071 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1072 usleep_range(1000, 2000);
1074 if (!netif_running(adapter->netdev)) {
1075 for (i = 0; i < adapter->num_tx_queues; i++)
1076 adapter->tx_ring[i]->count = new_tx_count;
1077 for (i = 0; i < adapter->num_xdp_queues; i++)
1078 adapter->xdp_ring[i]->count = new_tx_count;
1079 for (i = 0; i < adapter->num_rx_queues; i++)
1080 adapter->rx_ring[i]->count = new_rx_count;
1081 adapter->tx_ring_count = new_tx_count;
1082 adapter->xdp_ring_count = new_tx_count;
1083 adapter->rx_ring_count = new_rx_count;
1087 /* allocate temporary buffer to store rings in */
1088 i = max_t(int, adapter->num_tx_queues + adapter->num_xdp_queues,
1089 adapter->num_rx_queues);
1090 temp_ring = vmalloc(i * sizeof(struct ixgbe_ring));
1097 ixgbe_down(adapter);
1100 * Setup new Tx resources and free the old Tx resources in that order.
1101 * We can then assign the new resources to the rings via a memcpy.
1102 * The advantage to this approach is that we are guaranteed to still
1103 * have resources even in the case of an allocation failure.
1105 if (new_tx_count != adapter->tx_ring_count) {
1106 for (i = 0; i < adapter->num_tx_queues; i++) {
1107 memcpy(&temp_ring[i], adapter->tx_ring[i],
1108 sizeof(struct ixgbe_ring));
1110 temp_ring[i].count = new_tx_count;
1111 err = ixgbe_setup_tx_resources(&temp_ring[i]);
1115 ixgbe_free_tx_resources(&temp_ring[i]);
1121 for (j = 0; j < adapter->num_xdp_queues; j++, i++) {
1122 memcpy(&temp_ring[i], adapter->xdp_ring[j],
1123 sizeof(struct ixgbe_ring));
1125 temp_ring[i].count = new_tx_count;
1126 err = ixgbe_setup_tx_resources(&temp_ring[i]);
1130 ixgbe_free_tx_resources(&temp_ring[i]);
1136 for (i = 0; i < adapter->num_tx_queues; i++) {
1137 ixgbe_free_tx_resources(adapter->tx_ring[i]);
1139 memcpy(adapter->tx_ring[i], &temp_ring[i],
1140 sizeof(struct ixgbe_ring));
1142 for (j = 0; j < adapter->num_xdp_queues; j++, i++) {
1143 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
1145 memcpy(adapter->xdp_ring[j], &temp_ring[i],
1146 sizeof(struct ixgbe_ring));
1149 adapter->tx_ring_count = new_tx_count;
1152 /* Repeat the process for the Rx rings if needed */
1153 if (new_rx_count != adapter->rx_ring_count) {
1154 for (i = 0; i < adapter->num_rx_queues; i++) {
1155 memcpy(&temp_ring[i], adapter->rx_ring[i],
1156 sizeof(struct ixgbe_ring));
1158 temp_ring[i].count = new_rx_count;
1159 err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]);
1163 ixgbe_free_rx_resources(&temp_ring[i]);
1170 for (i = 0; i < adapter->num_rx_queues; i++) {
1171 ixgbe_free_rx_resources(adapter->rx_ring[i]);
1173 memcpy(adapter->rx_ring[i], &temp_ring[i],
1174 sizeof(struct ixgbe_ring));
1177 adapter->rx_ring_count = new_rx_count;
1184 clear_bit(__IXGBE_RESETTING, &adapter->state);
1188 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1192 return IXGBE_TEST_LEN;
1194 return IXGBE_STATS_LEN;
1195 case ETH_SS_PRIV_FLAGS:
1196 return IXGBE_PRIV_FLAGS_STR_LEN;
1202 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1203 struct ethtool_stats *stats, u64 *data)
1205 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1206 struct rtnl_link_stats64 temp;
1207 const struct rtnl_link_stats64 *net_stats;
1209 struct ixgbe_ring *ring;
1213 ixgbe_update_stats(adapter);
1214 net_stats = dev_get_stats(netdev, &temp);
1215 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1216 switch (ixgbe_gstrings_stats[i].type) {
1218 p = (char *) net_stats +
1219 ixgbe_gstrings_stats[i].stat_offset;
1222 p = (char *) adapter +
1223 ixgbe_gstrings_stats[i].stat_offset;
1230 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1231 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1233 for (j = 0; j < netdev->num_tx_queues; j++) {
1234 ring = adapter->tx_ring[j];
1243 start = u64_stats_fetch_begin_irq(&ring->syncp);
1244 data[i] = ring->stats.packets;
1245 data[i+1] = ring->stats.bytes;
1246 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1249 for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) {
1250 ring = adapter->rx_ring[j];
1259 start = u64_stats_fetch_begin_irq(&ring->syncp);
1260 data[i] = ring->stats.packets;
1261 data[i+1] = ring->stats.bytes;
1262 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1266 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1267 data[i++] = adapter->stats.pxontxc[j];
1268 data[i++] = adapter->stats.pxofftxc[j];
1270 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1271 data[i++] = adapter->stats.pxonrxc[j];
1272 data[i++] = adapter->stats.pxoffrxc[j];
1276 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1279 char *p = (char *)data;
1282 switch (stringset) {
1284 for (i = 0; i < IXGBE_TEST_LEN; i++) {
1285 memcpy(data, ixgbe_gstrings_test[i], ETH_GSTRING_LEN);
1286 data += ETH_GSTRING_LEN;
1290 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1291 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1293 p += ETH_GSTRING_LEN;
1295 for (i = 0; i < netdev->num_tx_queues; i++) {
1296 sprintf(p, "tx_queue_%u_packets", i);
1297 p += ETH_GSTRING_LEN;
1298 sprintf(p, "tx_queue_%u_bytes", i);
1299 p += ETH_GSTRING_LEN;
1301 for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) {
1302 sprintf(p, "rx_queue_%u_packets", i);
1303 p += ETH_GSTRING_LEN;
1304 sprintf(p, "rx_queue_%u_bytes", i);
1305 p += ETH_GSTRING_LEN;
1307 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1308 sprintf(p, "tx_pb_%u_pxon", i);
1309 p += ETH_GSTRING_LEN;
1310 sprintf(p, "tx_pb_%u_pxoff", i);
1311 p += ETH_GSTRING_LEN;
1313 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1314 sprintf(p, "rx_pb_%u_pxon", i);
1315 p += ETH_GSTRING_LEN;
1316 sprintf(p, "rx_pb_%u_pxoff", i);
1317 p += ETH_GSTRING_LEN;
1319 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1321 case ETH_SS_PRIV_FLAGS:
1322 memcpy(data, ixgbe_priv_flags_strings,
1323 IXGBE_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
1327 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1329 struct ixgbe_hw *hw = &adapter->hw;
1333 if (ixgbe_removed(hw->hw_addr)) {
1339 hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1347 /* ethtool register test data */
1348 struct ixgbe_reg_test {
1356 /* In the hardware, registers are laid out either singly, in arrays
1357 * spaced 0x40 bytes apart, or in contiguous tables. We assume
1358 * most tests take place on arrays or single registers (handled
1359 * as a single-element array) and special-case the tables.
1360 * Table tests are always pattern tests.
1362 * We also make provision for some required setup steps by specifying
1363 * registers to be written without any read-back testing.
1366 #define PATTERN_TEST 1
1367 #define SET_READ_TEST 2
1368 #define WRITE_NO_TEST 3
1369 #define TABLE32_TEST 4
1370 #define TABLE64_TEST_LO 5
1371 #define TABLE64_TEST_HI 6
1373 /* default 82599 register test */
1374 static const struct ixgbe_reg_test reg_test_82599[] = {
1375 { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1376 { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1377 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1378 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1379 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1380 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1381 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1382 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1383 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1384 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1385 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1386 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1387 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1388 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1389 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1390 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1391 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1392 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1393 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1397 /* default 82598 register test */
1398 static const struct ixgbe_reg_test reg_test_82598[] = {
1399 { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1400 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1401 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1402 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1403 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1404 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1405 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1406 /* Enable all four RX queues before testing. */
1407 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1408 /* RDH is read-only for 82598, only test RDT. */
1409 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1410 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1411 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1412 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1413 { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1414 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1415 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1416 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1417 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1418 { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1419 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1420 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1421 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1425 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1426 u32 mask, u32 write)
1428 u32 pat, val, before;
1429 static const u32 test_pattern[] = {
1430 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1432 if (ixgbe_removed(adapter->hw.hw_addr)) {
1436 for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1437 before = ixgbe_read_reg(&adapter->hw, reg);
1438 ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write);
1439 val = ixgbe_read_reg(&adapter->hw, reg);
1440 if (val != (test_pattern[pat] & write & mask)) {
1441 e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1442 reg, val, (test_pattern[pat] & write & mask));
1444 ixgbe_write_reg(&adapter->hw, reg, before);
1447 ixgbe_write_reg(&adapter->hw, reg, before);
1452 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1453 u32 mask, u32 write)
1457 if (ixgbe_removed(adapter->hw.hw_addr)) {
1461 before = ixgbe_read_reg(&adapter->hw, reg);
1462 ixgbe_write_reg(&adapter->hw, reg, write & mask);
1463 val = ixgbe_read_reg(&adapter->hw, reg);
1464 if ((write & mask) != (val & mask)) {
1465 e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1466 reg, (val & mask), (write & mask));
1468 ixgbe_write_reg(&adapter->hw, reg, before);
1471 ixgbe_write_reg(&adapter->hw, reg, before);
1475 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1477 const struct ixgbe_reg_test *test;
1478 u32 value, before, after;
1481 if (ixgbe_removed(adapter->hw.hw_addr)) {
1482 e_err(drv, "Adapter removed - register test blocked\n");
1486 switch (adapter->hw.mac.type) {
1487 case ixgbe_mac_82598EB:
1488 toggle = 0x7FFFF3FF;
1489 test = reg_test_82598;
1491 case ixgbe_mac_82599EB:
1492 case ixgbe_mac_X540:
1493 case ixgbe_mac_X550:
1494 case ixgbe_mac_X550EM_x:
1495 case ixgbe_mac_x550em_a:
1496 toggle = 0x7FFFF30F;
1497 test = reg_test_82599;
1505 * Because the status register is such a special case,
1506 * we handle it separately from the rest of the register
1507 * tests. Some bits are read-only, some toggle, and some
1508 * are writeable on newer MACs.
1510 before = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS);
1511 value = (ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle);
1512 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle);
1513 after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle;
1514 if (value != after) {
1515 e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1520 /* restore previous status */
1521 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, before);
1524 * Perform the remainder of the register test, looping through
1525 * the test table until we either fail or reach the null entry.
1528 for (i = 0; i < test->array_len; i++) {
1531 switch (test->test_type) {
1533 b = reg_pattern_test(adapter, data,
1534 test->reg + (i * 0x40),
1539 b = reg_set_and_check(adapter, data,
1540 test->reg + (i * 0x40),
1545 ixgbe_write_reg(&adapter->hw,
1546 test->reg + (i * 0x40),
1550 b = reg_pattern_test(adapter, data,
1551 test->reg + (i * 4),
1555 case TABLE64_TEST_LO:
1556 b = reg_pattern_test(adapter, data,
1557 test->reg + (i * 8),
1561 case TABLE64_TEST_HI:
1562 b = reg_pattern_test(adapter, data,
1563 (test->reg + 4) + (i * 8),
1578 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1580 struct ixgbe_hw *hw = &adapter->hw;
1581 if (hw->eeprom.ops.validate_checksum(hw, NULL))
1588 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1590 struct net_device *netdev = (struct net_device *) data;
1591 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1593 adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1598 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1600 struct net_device *netdev = adapter->netdev;
1601 u32 mask, i = 0, shared_int = true;
1602 u32 irq = adapter->pdev->irq;
1606 /* Hook up test interrupt handler just for this test */
1607 if (adapter->msix_entries) {
1608 /* NOTE: we don't test MSI-X interrupts here, yet */
1610 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1612 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1617 } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1618 netdev->name, netdev)) {
1620 } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1621 netdev->name, netdev)) {
1625 e_info(hw, "testing %s interrupt\n", shared_int ?
1626 "shared" : "unshared");
1628 /* Disable all the interrupts */
1629 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1630 IXGBE_WRITE_FLUSH(&adapter->hw);
1631 usleep_range(10000, 20000);
1633 /* Test each interrupt */
1634 for (; i < 10; i++) {
1635 /* Interrupt to test */
1640 * Disable the interrupts to be reported in
1641 * the cause register and then force the same
1642 * interrupt and see if one gets posted. If
1643 * an interrupt was posted to the bus, the
1646 adapter->test_icr = 0;
1647 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1648 ~mask & 0x00007FFF);
1649 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1650 ~mask & 0x00007FFF);
1651 IXGBE_WRITE_FLUSH(&adapter->hw);
1652 usleep_range(10000, 20000);
1654 if (adapter->test_icr & mask) {
1661 * Enable the interrupt to be reported in the cause
1662 * register and then force the same interrupt and see
1663 * if one gets posted. If an interrupt was not posted
1664 * to the bus, the test failed.
1666 adapter->test_icr = 0;
1667 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1668 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1669 IXGBE_WRITE_FLUSH(&adapter->hw);
1670 usleep_range(10000, 20000);
1672 if (!(adapter->test_icr & mask)) {
1679 * Disable the other interrupts to be reported in
1680 * the cause register and then force the other
1681 * interrupts and see if any get posted. If
1682 * an interrupt was posted to the bus, the
1685 adapter->test_icr = 0;
1686 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1687 ~mask & 0x00007FFF);
1688 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1689 ~mask & 0x00007FFF);
1690 IXGBE_WRITE_FLUSH(&adapter->hw);
1691 usleep_range(10000, 20000);
1693 if (adapter->test_icr) {
1700 /* Disable all the interrupts */
1701 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1702 IXGBE_WRITE_FLUSH(&adapter->hw);
1703 usleep_range(10000, 20000);
1705 /* Unhook test interrupt handler */
1706 free_irq(irq, netdev);
1711 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1713 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1714 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1715 struct ixgbe_hw *hw = &adapter->hw;
1718 /* shut down the DMA engines now so they can be reinitialized later */
1721 hw->mac.ops.disable_rx(hw);
1722 ixgbe_disable_rx_queue(adapter, rx_ring);
1725 reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1726 reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1727 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1729 switch (hw->mac.type) {
1730 case ixgbe_mac_82599EB:
1731 case ixgbe_mac_X540:
1732 case ixgbe_mac_X550:
1733 case ixgbe_mac_X550EM_x:
1734 case ixgbe_mac_x550em_a:
1735 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1736 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1737 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1743 ixgbe_reset(adapter);
1745 ixgbe_free_tx_resources(&adapter->test_tx_ring);
1746 ixgbe_free_rx_resources(&adapter->test_rx_ring);
1749 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1751 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1752 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1753 struct ixgbe_hw *hw = &adapter->hw;
1758 /* Setup Tx descriptor ring and Tx buffers */
1759 tx_ring->count = IXGBE_DEFAULT_TXD;
1760 tx_ring->queue_index = 0;
1761 tx_ring->dev = &adapter->pdev->dev;
1762 tx_ring->netdev = adapter->netdev;
1763 tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1765 err = ixgbe_setup_tx_resources(tx_ring);
1769 switch (adapter->hw.mac.type) {
1770 case ixgbe_mac_82599EB:
1771 case ixgbe_mac_X540:
1772 case ixgbe_mac_X550:
1773 case ixgbe_mac_X550EM_x:
1774 case ixgbe_mac_x550em_a:
1775 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1776 reg_data |= IXGBE_DMATXCTL_TE;
1777 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1783 ixgbe_configure_tx_ring(adapter, tx_ring);
1785 /* Setup Rx Descriptor ring and Rx buffers */
1786 rx_ring->count = IXGBE_DEFAULT_RXD;
1787 rx_ring->queue_index = 0;
1788 rx_ring->dev = &adapter->pdev->dev;
1789 rx_ring->netdev = adapter->netdev;
1790 rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1792 err = ixgbe_setup_rx_resources(adapter, rx_ring);
1798 hw->mac.ops.disable_rx(hw);
1800 ixgbe_configure_rx_ring(adapter, rx_ring);
1802 rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1803 rctl |= IXGBE_RXCTRL_DMBYPS;
1804 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1806 hw->mac.ops.enable_rx(hw);
1811 ixgbe_free_desc_rings(adapter);
1815 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1817 struct ixgbe_hw *hw = &adapter->hw;
1821 /* Setup MAC loopback */
1822 reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1823 reg_data |= IXGBE_HLREG0_LPBK;
1824 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1826 reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1827 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1828 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1830 /* X540 and X550 needs to set the MACC.FLU bit to force link up */
1831 switch (adapter->hw.mac.type) {
1832 case ixgbe_mac_X540:
1833 case ixgbe_mac_X550:
1834 case ixgbe_mac_X550EM_x:
1835 case ixgbe_mac_x550em_a:
1836 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
1837 reg_data |= IXGBE_MACC_FLU;
1838 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
1841 if (hw->mac.orig_autoc) {
1842 reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU;
1843 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
1848 IXGBE_WRITE_FLUSH(hw);
1849 usleep_range(10000, 20000);
1851 /* Disable Atlas Tx lanes; re-enabled in reset path */
1852 if (hw->mac.type == ixgbe_mac_82598EB) {
1855 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1856 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1857 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1859 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1860 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1861 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1863 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1864 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1865 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1867 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1868 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1869 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1875 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1879 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1880 reg_data &= ~IXGBE_HLREG0_LPBK;
1881 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1884 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1885 unsigned int frame_size)
1887 memset(skb->data, 0xFF, frame_size);
1889 memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1);
1890 memset(&skb->data[frame_size + 10], 0xBE, 1);
1891 memset(&skb->data[frame_size + 12], 0xAF, 1);
1894 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer,
1895 unsigned int frame_size)
1897 unsigned char *data;
1902 data = kmap(rx_buffer->page) + rx_buffer->page_offset;
1904 if (data[3] != 0xFF ||
1905 data[frame_size + 10] != 0xBE ||
1906 data[frame_size + 12] != 0xAF)
1909 kunmap(rx_buffer->page);
1914 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1915 struct ixgbe_ring *tx_ring,
1918 union ixgbe_adv_rx_desc *rx_desc;
1919 struct ixgbe_rx_buffer *rx_buffer;
1920 struct ixgbe_tx_buffer *tx_buffer;
1921 u16 rx_ntc, tx_ntc, count = 0;
1923 /* initialize next to clean and descriptor values */
1924 rx_ntc = rx_ring->next_to_clean;
1925 tx_ntc = tx_ring->next_to_clean;
1926 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1928 while (rx_desc->wb.upper.length) {
1929 /* check Rx buffer */
1930 rx_buffer = &rx_ring->rx_buffer_info[rx_ntc];
1932 /* sync Rx buffer for CPU read */
1933 dma_sync_single_for_cpu(rx_ring->dev,
1935 ixgbe_rx_bufsz(rx_ring),
1938 /* verify contents of skb */
1939 if (ixgbe_check_lbtest_frame(rx_buffer, size))
1942 /* sync Rx buffer for device write */
1943 dma_sync_single_for_device(rx_ring->dev,
1945 ixgbe_rx_bufsz(rx_ring),
1948 /* unmap buffer on Tx side */
1949 tx_buffer = &tx_ring->tx_buffer_info[tx_ntc];
1951 /* Free all the Tx ring sk_buffs */
1952 dev_kfree_skb_any(tx_buffer->skb);
1954 /* unmap skb header data */
1955 dma_unmap_single(tx_ring->dev,
1956 dma_unmap_addr(tx_buffer, dma),
1957 dma_unmap_len(tx_buffer, len),
1959 dma_unmap_len_set(tx_buffer, len, 0);
1961 /* increment Rx/Tx next to clean counters */
1963 if (rx_ntc == rx_ring->count)
1966 if (tx_ntc == tx_ring->count)
1969 /* fetch next descriptor */
1970 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1973 netdev_tx_reset_queue(txring_txq(tx_ring));
1975 /* re-map buffers to ring, store next to clean values */
1976 ixgbe_alloc_rx_buffers(rx_ring, count);
1977 rx_ring->next_to_clean = rx_ntc;
1978 tx_ring->next_to_clean = tx_ntc;
1983 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1985 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1986 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1987 int i, j, lc, good_cnt, ret_val = 0;
1988 unsigned int size = 1024;
1989 netdev_tx_t tx_ret_val;
1990 struct sk_buff *skb;
1991 u32 flags_orig = adapter->flags;
1993 /* DCB can modify the frames on Tx */
1994 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
1996 /* allocate test skb */
1997 skb = alloc_skb(size, GFP_KERNEL);
2001 /* place data into test skb */
2002 ixgbe_create_lbtest_frame(skb, size);
2006 * Calculate the loop count based on the largest descriptor ring
2007 * The idea is to wrap the largest ring a number of times using 64
2008 * send/receive pairs during each loop
2011 if (rx_ring->count <= tx_ring->count)
2012 lc = ((tx_ring->count / 64) * 2) + 1;
2014 lc = ((rx_ring->count / 64) * 2) + 1;
2016 for (j = 0; j <= lc; j++) {
2017 /* reset count of good packets */
2020 /* place 64 packets on the transmit queue*/
2021 for (i = 0; i < 64; i++) {
2023 tx_ret_val = ixgbe_xmit_frame_ring(skb,
2026 if (tx_ret_val == NETDEV_TX_OK)
2030 if (good_cnt != 64) {
2035 /* allow 200 milliseconds for packets to go from Tx to Rx */
2038 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
2039 if (good_cnt != 64) {
2045 /* free the original skb */
2047 adapter->flags = flags_orig;
2052 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
2054 *data = ixgbe_setup_desc_rings(adapter);
2057 *data = ixgbe_setup_loopback_test(adapter);
2060 *data = ixgbe_run_loopback_test(adapter);
2061 ixgbe_loopback_cleanup(adapter);
2064 ixgbe_free_desc_rings(adapter);
2069 static void ixgbe_diag_test(struct net_device *netdev,
2070 struct ethtool_test *eth_test, u64 *data)
2072 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2073 bool if_running = netif_running(netdev);
2075 if (ixgbe_removed(adapter->hw.hw_addr)) {
2076 e_err(hw, "Adapter removed - test blocked\n");
2082 eth_test->flags |= ETH_TEST_FL_FAILED;
2085 set_bit(__IXGBE_TESTING, &adapter->state);
2086 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2087 struct ixgbe_hw *hw = &adapter->hw;
2089 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2091 for (i = 0; i < adapter->num_vfs; i++) {
2092 if (adapter->vfinfo[i].clear_to_send) {
2093 netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n");
2099 eth_test->flags |= ETH_TEST_FL_FAILED;
2100 clear_bit(__IXGBE_TESTING,
2108 e_info(hw, "offline testing starting\n");
2110 /* Link test performed before hardware reset so autoneg doesn't
2111 * interfere with test result
2113 if (ixgbe_link_test(adapter, &data[4]))
2114 eth_test->flags |= ETH_TEST_FL_FAILED;
2117 /* indicate we're in test mode */
2118 ixgbe_close(netdev);
2120 ixgbe_reset(adapter);
2122 e_info(hw, "register testing starting\n");
2123 if (ixgbe_reg_test(adapter, &data[0]))
2124 eth_test->flags |= ETH_TEST_FL_FAILED;
2126 ixgbe_reset(adapter);
2127 e_info(hw, "eeprom testing starting\n");
2128 if (ixgbe_eeprom_test(adapter, &data[1]))
2129 eth_test->flags |= ETH_TEST_FL_FAILED;
2131 ixgbe_reset(adapter);
2132 e_info(hw, "interrupt testing starting\n");
2133 if (ixgbe_intr_test(adapter, &data[2]))
2134 eth_test->flags |= ETH_TEST_FL_FAILED;
2136 /* If SRIOV or VMDq is enabled then skip MAC
2137 * loopback diagnostic. */
2138 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
2139 IXGBE_FLAG_VMDQ_ENABLED)) {
2140 e_info(hw, "Skip MAC loopback diagnostic in VT mode\n");
2145 ixgbe_reset(adapter);
2146 e_info(hw, "loopback testing starting\n");
2147 if (ixgbe_loopback_test(adapter, &data[3]))
2148 eth_test->flags |= ETH_TEST_FL_FAILED;
2151 ixgbe_reset(adapter);
2153 /* clear testing bit and return adapter to previous state */
2154 clear_bit(__IXGBE_TESTING, &adapter->state);
2157 else if (hw->mac.ops.disable_tx_laser)
2158 hw->mac.ops.disable_tx_laser(hw);
2160 e_info(hw, "online testing starting\n");
2163 if (ixgbe_link_test(adapter, &data[4]))
2164 eth_test->flags |= ETH_TEST_FL_FAILED;
2166 /* Offline tests aren't run; pass by default */
2172 clear_bit(__IXGBE_TESTING, &adapter->state);
2176 msleep_interruptible(4 * 1000);
2179 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
2180 struct ethtool_wolinfo *wol)
2182 struct ixgbe_hw *hw = &adapter->hw;
2185 /* WOL not supported for all devices */
2186 if (!ixgbe_wol_supported(adapter, hw->device_id,
2187 hw->subsystem_device_id)) {
2195 static void ixgbe_get_wol(struct net_device *netdev,
2196 struct ethtool_wolinfo *wol)
2198 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2200 wol->supported = WAKE_UCAST | WAKE_MCAST |
2201 WAKE_BCAST | WAKE_MAGIC;
2204 if (ixgbe_wol_exclusion(adapter, wol) ||
2205 !device_can_wakeup(&adapter->pdev->dev))
2208 if (adapter->wol & IXGBE_WUFC_EX)
2209 wol->wolopts |= WAKE_UCAST;
2210 if (adapter->wol & IXGBE_WUFC_MC)
2211 wol->wolopts |= WAKE_MCAST;
2212 if (adapter->wol & IXGBE_WUFC_BC)
2213 wol->wolopts |= WAKE_BCAST;
2214 if (adapter->wol & IXGBE_WUFC_MAG)
2215 wol->wolopts |= WAKE_MAGIC;
2218 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2220 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2222 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
2225 if (ixgbe_wol_exclusion(adapter, wol))
2226 return wol->wolopts ? -EOPNOTSUPP : 0;
2230 if (wol->wolopts & WAKE_UCAST)
2231 adapter->wol |= IXGBE_WUFC_EX;
2232 if (wol->wolopts & WAKE_MCAST)
2233 adapter->wol |= IXGBE_WUFC_MC;
2234 if (wol->wolopts & WAKE_BCAST)
2235 adapter->wol |= IXGBE_WUFC_BC;
2236 if (wol->wolopts & WAKE_MAGIC)
2237 adapter->wol |= IXGBE_WUFC_MAG;
2239 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2244 static int ixgbe_nway_reset(struct net_device *netdev)
2246 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2248 if (netif_running(netdev))
2249 ixgbe_reinit_locked(adapter);
2254 static int ixgbe_set_phys_id(struct net_device *netdev,
2255 enum ethtool_phys_id_state state)
2257 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2258 struct ixgbe_hw *hw = &adapter->hw;
2260 if (!hw->mac.ops.led_on || !hw->mac.ops.led_off)
2264 case ETHTOOL_ID_ACTIVE:
2265 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2269 hw->mac.ops.led_on(hw, hw->mac.led_link_act);
2272 case ETHTOOL_ID_OFF:
2273 hw->mac.ops.led_off(hw, hw->mac.led_link_act);
2276 case ETHTOOL_ID_INACTIVE:
2277 /* Restore LED settings */
2278 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2285 static int ixgbe_get_coalesce(struct net_device *netdev,
2286 struct ethtool_coalesce *ec)
2288 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2290 /* only valid if in constant ITR mode */
2291 if (adapter->rx_itr_setting <= 1)
2292 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2294 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2296 /* if in mixed tx/rx queues per vector mode, report only rx settings */
2297 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2300 /* only valid if in constant ITR mode */
2301 if (adapter->tx_itr_setting <= 1)
2302 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2304 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2310 * this function must be called before setting the new value of
2313 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
2315 struct net_device *netdev = adapter->netdev;
2317 /* nothing to do if LRO or RSC are not enabled */
2318 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) ||
2319 !(netdev->features & NETIF_F_LRO))
2322 /* check the feature flag value and enable RSC if necessary */
2323 if (adapter->rx_itr_setting == 1 ||
2324 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
2325 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2326 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2327 e_info(probe, "rx-usecs value high enough to re-enable RSC\n");
2330 /* if interrupt rate is too high then disable RSC */
2331 } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2332 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2333 e_info(probe, "rx-usecs set too low, disabling RSC\n");
2339 static int ixgbe_set_coalesce(struct net_device *netdev,
2340 struct ethtool_coalesce *ec)
2342 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2343 struct ixgbe_q_vector *q_vector;
2345 u16 tx_itr_param, rx_itr_param, tx_itr_prev;
2346 bool need_reset = false;
2348 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) {
2349 /* reject Tx specific changes in case of mixed RxTx vectors */
2350 if (ec->tx_coalesce_usecs)
2352 tx_itr_prev = adapter->rx_itr_setting;
2354 tx_itr_prev = adapter->tx_itr_setting;
2357 if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2358 (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2361 if (ec->rx_coalesce_usecs > 1)
2362 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2364 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2366 if (adapter->rx_itr_setting == 1)
2367 rx_itr_param = IXGBE_20K_ITR;
2369 rx_itr_param = adapter->rx_itr_setting;
2371 if (ec->tx_coalesce_usecs > 1)
2372 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2374 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2376 if (adapter->tx_itr_setting == 1)
2377 tx_itr_param = IXGBE_12K_ITR;
2379 tx_itr_param = adapter->tx_itr_setting;
2382 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2383 adapter->tx_itr_setting = adapter->rx_itr_setting;
2385 /* detect ITR changes that require update of TXDCTL.WTHRESH */
2386 if ((adapter->tx_itr_setting != 1) &&
2387 (adapter->tx_itr_setting < IXGBE_100K_ITR)) {
2388 if ((tx_itr_prev == 1) ||
2389 (tx_itr_prev >= IXGBE_100K_ITR))
2392 if ((tx_itr_prev != 1) &&
2393 (tx_itr_prev < IXGBE_100K_ITR))
2397 /* check the old value and enable RSC if necessary */
2398 need_reset |= ixgbe_update_rsc(adapter);
2400 for (i = 0; i < adapter->num_q_vectors; i++) {
2401 q_vector = adapter->q_vector[i];
2402 if (q_vector->tx.count && !q_vector->rx.count)
2404 q_vector->itr = tx_itr_param;
2406 /* rx only or mixed */
2407 q_vector->itr = rx_itr_param;
2408 ixgbe_write_eitr(q_vector);
2412 * do reset here at the end to make sure EITR==0 case is handled
2413 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2414 * also locks in RSC enable/disable which requires reset
2417 ixgbe_do_reset(netdev);
2422 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2423 struct ethtool_rxnfc *cmd)
2425 union ixgbe_atr_input *mask = &adapter->fdir_mask;
2426 struct ethtool_rx_flow_spec *fsp =
2427 (struct ethtool_rx_flow_spec *)&cmd->fs;
2428 struct hlist_node *node2;
2429 struct ixgbe_fdir_filter *rule = NULL;
2431 /* report total rule count */
2432 cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2434 hlist_for_each_entry_safe(rule, node2,
2435 &adapter->fdir_filter_list, fdir_node) {
2436 if (fsp->location <= rule->sw_idx)
2440 if (!rule || fsp->location != rule->sw_idx)
2443 /* fill out the flow spec entry */
2445 /* set flow type field */
2446 switch (rule->filter.formatted.flow_type) {
2447 case IXGBE_ATR_FLOW_TYPE_TCPV4:
2448 fsp->flow_type = TCP_V4_FLOW;
2450 case IXGBE_ATR_FLOW_TYPE_UDPV4:
2451 fsp->flow_type = UDP_V4_FLOW;
2453 case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2454 fsp->flow_type = SCTP_V4_FLOW;
2456 case IXGBE_ATR_FLOW_TYPE_IPV4:
2457 fsp->flow_type = IP_USER_FLOW;
2458 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2459 fsp->h_u.usr_ip4_spec.proto = 0;
2460 fsp->m_u.usr_ip4_spec.proto = 0;
2466 fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2467 fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2468 fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2469 fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2470 fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2471 fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2472 fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2473 fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2474 fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2475 fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2476 fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2477 fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2478 fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2479 fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2480 fsp->flow_type |= FLOW_EXT;
2483 if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2484 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2486 fsp->ring_cookie = rule->action;
2491 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2492 struct ethtool_rxnfc *cmd,
2495 struct hlist_node *node2;
2496 struct ixgbe_fdir_filter *rule;
2499 /* report total rule count */
2500 cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2502 hlist_for_each_entry_safe(rule, node2,
2503 &adapter->fdir_filter_list, fdir_node) {
2504 if (cnt == cmd->rule_cnt)
2506 rule_locs[cnt] = rule->sw_idx;
2510 cmd->rule_cnt = cnt;
2515 static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter,
2516 struct ethtool_rxnfc *cmd)
2520 /* Report default options for RSS on ixgbe */
2521 switch (cmd->flow_type) {
2523 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2526 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2527 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2530 case AH_ESP_V4_FLOW:
2534 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2537 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2540 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2541 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2544 case AH_ESP_V6_FLOW:
2548 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2557 static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter)
2559 if (adapter->hw.mac.type < ixgbe_mac_X550)
2565 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2568 struct ixgbe_adapter *adapter = netdev_priv(dev);
2569 int ret = -EOPNOTSUPP;
2572 case ETHTOOL_GRXRINGS:
2573 cmd->data = min_t(int, adapter->num_rx_queues,
2574 ixgbe_rss_indir_tbl_max(adapter));
2577 case ETHTOOL_GRXCLSRLCNT:
2578 cmd->rule_cnt = adapter->fdir_filter_count;
2581 case ETHTOOL_GRXCLSRULE:
2582 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2584 case ETHTOOL_GRXCLSRLALL:
2585 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs);
2588 ret = ixgbe_get_rss_hash_opts(adapter, cmd);
2597 int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2598 struct ixgbe_fdir_filter *input,
2601 struct ixgbe_hw *hw = &adapter->hw;
2602 struct hlist_node *node2;
2603 struct ixgbe_fdir_filter *rule, *parent;
2609 hlist_for_each_entry_safe(rule, node2,
2610 &adapter->fdir_filter_list, fdir_node) {
2611 /* hash found, or no matching entry */
2612 if (rule->sw_idx >= sw_idx)
2617 /* if there is an old rule occupying our place remove it */
2618 if (rule && (rule->sw_idx == sw_idx)) {
2619 if (!input || (rule->filter.formatted.bkt_hash !=
2620 input->filter.formatted.bkt_hash)) {
2621 err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2626 hlist_del(&rule->fdir_node);
2628 adapter->fdir_filter_count--;
2632 * If no input this was a delete, err should be 0 if a rule was
2633 * successfully found and removed from the list else -EINVAL
2638 /* initialize node and set software index */
2639 INIT_HLIST_NODE(&input->fdir_node);
2641 /* add filter to the list */
2643 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
2645 hlist_add_head(&input->fdir_node,
2646 &adapter->fdir_filter_list);
2649 adapter->fdir_filter_count++;
2654 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2657 switch (fsp->flow_type & ~FLOW_EXT) {
2659 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2662 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2665 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2668 switch (fsp->h_u.usr_ip4_spec.proto) {
2670 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2673 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2676 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2679 if (!fsp->m_u.usr_ip4_spec.proto) {
2680 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2695 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2696 struct ethtool_rxnfc *cmd)
2698 struct ethtool_rx_flow_spec *fsp =
2699 (struct ethtool_rx_flow_spec *)&cmd->fs;
2700 struct ixgbe_hw *hw = &adapter->hw;
2701 struct ixgbe_fdir_filter *input;
2702 union ixgbe_atr_input mask;
2706 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2709 /* ring_cookie is a masked into a set of queues and ixgbe pools or
2710 * we use the drop index.
2712 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
2713 queue = IXGBE_FDIR_DROP_QUEUE;
2715 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
2716 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
2718 if (!vf && (ring >= adapter->num_rx_queues))
2721 ((vf > adapter->num_vfs) ||
2722 ring >= adapter->num_rx_queues_per_pool))
2725 /* Map the ring onto the absolute queue index */
2727 queue = adapter->rx_ring[ring]->reg_idx;
2730 adapter->num_rx_queues_per_pool) + ring;
2733 /* Don't allow indexes to exist outside of available space */
2734 if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2735 e_err(drv, "Location out of range\n");
2739 input = kzalloc(sizeof(*input), GFP_ATOMIC);
2743 memset(&mask, 0, sizeof(union ixgbe_atr_input));
2746 input->sw_idx = fsp->location;
2748 /* record flow type */
2749 if (!ixgbe_flowspec_to_flow_type(fsp,
2750 &input->filter.formatted.flow_type)) {
2751 e_err(drv, "Unrecognized flow type\n");
2755 mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2756 IXGBE_ATR_L4TYPE_MASK;
2758 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2759 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2761 /* Copy input into formatted structures */
2762 input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2763 mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2764 input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2765 mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2766 input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2767 mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2768 input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2769 mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2771 if (fsp->flow_type & FLOW_EXT) {
2772 input->filter.formatted.vm_pool =
2773 (unsigned char)ntohl(fsp->h_ext.data[1]);
2774 mask.formatted.vm_pool =
2775 (unsigned char)ntohl(fsp->m_ext.data[1]);
2776 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2777 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2778 input->filter.formatted.flex_bytes =
2779 fsp->h_ext.vlan_etype;
2780 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2783 /* determine if we need to drop or route the packet */
2784 if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2785 input->action = IXGBE_FDIR_DROP_QUEUE;
2787 input->action = fsp->ring_cookie;
2789 spin_lock(&adapter->fdir_perfect_lock);
2791 if (hlist_empty(&adapter->fdir_filter_list)) {
2792 /* save mask and program input mask into HW */
2793 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2794 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2796 e_err(drv, "Error writing mask\n");
2797 goto err_out_w_lock;
2799 } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2800 e_err(drv, "Only one mask supported per port\n");
2801 goto err_out_w_lock;
2804 /* apply mask and compute/store hash */
2805 ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2807 /* program filters to filter memory */
2808 err = ixgbe_fdir_write_perfect_filter_82599(hw,
2809 &input->filter, input->sw_idx, queue);
2811 goto err_out_w_lock;
2813 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2815 spin_unlock(&adapter->fdir_perfect_lock);
2819 spin_unlock(&adapter->fdir_perfect_lock);
2825 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2826 struct ethtool_rxnfc *cmd)
2828 struct ethtool_rx_flow_spec *fsp =
2829 (struct ethtool_rx_flow_spec *)&cmd->fs;
2832 spin_lock(&adapter->fdir_perfect_lock);
2833 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
2834 spin_unlock(&adapter->fdir_perfect_lock);
2839 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \
2840 IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2841 static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,
2842 struct ethtool_rxnfc *nfc)
2844 u32 flags2 = adapter->flags2;
2847 * RSS does not support anything other than hashing
2848 * to queues on src and dst IPs and ports
2850 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2851 RXH_L4_B_0_1 | RXH_L4_B_2_3))
2854 switch (nfc->flow_type) {
2857 if (!(nfc->data & RXH_IP_SRC) ||
2858 !(nfc->data & RXH_IP_DST) ||
2859 !(nfc->data & RXH_L4_B_0_1) ||
2860 !(nfc->data & RXH_L4_B_2_3))
2864 if (!(nfc->data & RXH_IP_SRC) ||
2865 !(nfc->data & RXH_IP_DST))
2867 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2869 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2871 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2872 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2879 if (!(nfc->data & RXH_IP_SRC) ||
2880 !(nfc->data & RXH_IP_DST))
2882 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2884 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2886 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2887 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2893 case AH_ESP_V4_FLOW:
2897 case AH_ESP_V6_FLOW:
2901 if (!(nfc->data & RXH_IP_SRC) ||
2902 !(nfc->data & RXH_IP_DST) ||
2903 (nfc->data & RXH_L4_B_0_1) ||
2904 (nfc->data & RXH_L4_B_2_3))
2911 /* if we changed something we need to update flags */
2912 if (flags2 != adapter->flags2) {
2913 struct ixgbe_hw *hw = &adapter->hw;
2915 unsigned int pf_pool = adapter->num_vfs;
2917 if ((hw->mac.type >= ixgbe_mac_X550) &&
2918 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
2919 mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool));
2921 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
2923 if ((flags2 & UDP_RSS_FLAGS) &&
2924 !(adapter->flags2 & UDP_RSS_FLAGS))
2925 e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2927 adapter->flags2 = flags2;
2929 /* Perform hash on these packet types */
2930 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2931 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2932 | IXGBE_MRQC_RSS_FIELD_IPV6
2933 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2935 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP |
2936 IXGBE_MRQC_RSS_FIELD_IPV6_UDP);
2938 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2939 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
2941 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2942 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2944 if ((hw->mac.type >= ixgbe_mac_X550) &&
2945 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
2946 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc);
2948 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2954 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2956 struct ixgbe_adapter *adapter = netdev_priv(dev);
2957 int ret = -EOPNOTSUPP;
2960 case ETHTOOL_SRXCLSRLINS:
2961 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
2963 case ETHTOOL_SRXCLSRLDEL:
2964 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
2967 ret = ixgbe_set_rss_hash_opt(adapter, cmd);
2976 static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev)
2978 return IXGBE_RSS_KEY_SIZE;
2981 static u32 ixgbe_rss_indir_size(struct net_device *netdev)
2983 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2985 return ixgbe_rss_indir_tbl_entries(adapter);
2988 static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir)
2990 int i, reta_size = ixgbe_rss_indir_tbl_entries(adapter);
2991 u16 rss_m = adapter->ring_feature[RING_F_RSS].mask;
2993 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
2994 rss_m = adapter->ring_feature[RING_F_RSS].indices - 1;
2996 for (i = 0; i < reta_size; i++)
2997 indir[i] = adapter->rss_indir_tbl[i] & rss_m;
3000 static int ixgbe_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
3003 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3006 *hfunc = ETH_RSS_HASH_TOP;
3009 ixgbe_get_reta(adapter, indir);
3012 memcpy(key, adapter->rss_key, ixgbe_get_rxfh_key_size(netdev));
3017 static int ixgbe_set_rxfh(struct net_device *netdev, const u32 *indir,
3018 const u8 *key, const u8 hfunc)
3020 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3022 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3024 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
3027 /* Fill out the redirection table */
3029 int max_queues = min_t(int, adapter->num_rx_queues,
3030 ixgbe_rss_indir_tbl_max(adapter));
3032 /*Allow at least 2 queues w/ SR-IOV.*/
3033 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
3037 /* Verify user input. */
3038 for (i = 0; i < reta_entries; i++)
3039 if (indir[i] >= max_queues)
3042 for (i = 0; i < reta_entries; i++)
3043 adapter->rss_indir_tbl[i] = indir[i];
3046 /* Fill out the rss hash key */
3048 memcpy(adapter->rss_key, key, ixgbe_get_rxfh_key_size(netdev));
3049 ixgbe_store_key(adapter);
3052 ixgbe_store_reta(adapter);
3057 static int ixgbe_get_ts_info(struct net_device *dev,
3058 struct ethtool_ts_info *info)
3060 struct ixgbe_adapter *adapter = netdev_priv(dev);
3062 /* we always support timestamping disabled */
3063 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
3065 switch (adapter->hw.mac.type) {
3066 case ixgbe_mac_X550:
3067 case ixgbe_mac_X550EM_x:
3068 case ixgbe_mac_x550em_a:
3069 info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL);
3071 case ixgbe_mac_X540:
3072 case ixgbe_mac_82599EB:
3073 info->so_timestamping =
3074 SOF_TIMESTAMPING_TX_SOFTWARE |
3075 SOF_TIMESTAMPING_RX_SOFTWARE |
3076 SOF_TIMESTAMPING_SOFTWARE |
3077 SOF_TIMESTAMPING_TX_HARDWARE |
3078 SOF_TIMESTAMPING_RX_HARDWARE |
3079 SOF_TIMESTAMPING_RAW_HARDWARE;
3081 if (adapter->ptp_clock)
3082 info->phc_index = ptp_clock_index(adapter->ptp_clock);
3084 info->phc_index = -1;
3087 BIT(HWTSTAMP_TX_OFF) |
3088 BIT(HWTSTAMP_TX_ON);
3091 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
3092 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
3093 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
3096 return ethtool_op_get_ts_info(dev, info);
3101 static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter)
3103 unsigned int max_combined;
3104 u8 tcs = netdev_get_num_tc(adapter->netdev);
3106 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3107 /* We only support one q_vector without MSI-X */
3109 } else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3110 /* Limit value based on the queue mask */
3111 max_combined = adapter->ring_feature[RING_F_RSS].mask + 1;
3112 } else if (tcs > 1) {
3113 /* For DCB report channels per traffic class */
3114 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3115 /* 8 TC w/ 4 queues per TC */
3117 } else if (tcs > 4) {
3118 /* 8 TC w/ 8 queues per TC */
3121 /* 4 TC w/ 16 queues per TC */
3124 } else if (adapter->atr_sample_rate) {
3125 /* support up to 64 queues with ATR */
3126 max_combined = IXGBE_MAX_FDIR_INDICES;
3128 /* support up to 16 queues with RSS */
3129 max_combined = ixgbe_max_rss_indices(adapter);
3132 return max_combined;
3135 static void ixgbe_get_channels(struct net_device *dev,
3136 struct ethtool_channels *ch)
3138 struct ixgbe_adapter *adapter = netdev_priv(dev);
3140 /* report maximum channels */
3141 ch->max_combined = ixgbe_max_channels(adapter);
3143 /* report info for other vector */
3144 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3145 ch->max_other = NON_Q_VECTORS;
3146 ch->other_count = NON_Q_VECTORS;
3149 /* record RSS queues */
3150 ch->combined_count = adapter->ring_feature[RING_F_RSS].indices;
3152 /* nothing else to report if RSS is disabled */
3153 if (ch->combined_count == 1)
3156 /* we do not support ATR queueing if SR-IOV is enabled */
3157 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3160 /* same thing goes for being DCB enabled */
3161 if (netdev_get_num_tc(dev) > 1)
3164 /* if ATR is disabled we can exit */
3165 if (!adapter->atr_sample_rate)
3168 /* report flow director queues as maximum channels */
3169 ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices;
3172 static int ixgbe_set_channels(struct net_device *dev,
3173 struct ethtool_channels *ch)
3175 struct ixgbe_adapter *adapter = netdev_priv(dev);
3176 unsigned int count = ch->combined_count;
3177 u8 max_rss_indices = ixgbe_max_rss_indices(adapter);
3179 /* verify they are not requesting separate vectors */
3180 if (!count || ch->rx_count || ch->tx_count)
3183 /* verify other_count has not changed */
3184 if (ch->other_count != NON_Q_VECTORS)
3187 /* verify the number of channels does not exceed hardware limits */
3188 if (count > ixgbe_max_channels(adapter))
3191 /* update feature limits from largest to smallest supported values */
3192 adapter->ring_feature[RING_F_FDIR].limit = count;
3195 if (count > max_rss_indices)
3196 count = max_rss_indices;
3197 adapter->ring_feature[RING_F_RSS].limit = count;
3200 /* cap FCoE limit at 8 */
3201 if (count > IXGBE_FCRETA_SIZE)
3202 count = IXGBE_FCRETA_SIZE;
3203 adapter->ring_feature[RING_F_FCOE].limit = count;
3206 /* use setup TC to update any traffic class queue mapping */
3207 return ixgbe_setup_tc(dev, netdev_get_num_tc(dev));
3210 static int ixgbe_get_module_info(struct net_device *dev,
3211 struct ethtool_modinfo *modinfo)
3213 struct ixgbe_adapter *adapter = netdev_priv(dev);
3214 struct ixgbe_hw *hw = &adapter->hw;
3216 u8 sff8472_rev, addr_mode;
3217 bool page_swap = false;
3219 if (hw->phy.type == ixgbe_phy_fw)
3222 /* Check whether we support SFF-8472 or not */
3223 status = hw->phy.ops.read_i2c_eeprom(hw,
3224 IXGBE_SFF_SFF_8472_COMP,
3229 /* addressing mode is not supported */
3230 status = hw->phy.ops.read_i2c_eeprom(hw,
3231 IXGBE_SFF_SFF_8472_SWAP,
3236 if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) {
3237 e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3241 if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap ||
3242 !(addr_mode & IXGBE_SFF_DDM_IMPLEMENTED)) {
3243 /* We have a SFP, but it does not support SFF-8472 */
3244 modinfo->type = ETH_MODULE_SFF_8079;
3245 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3247 /* We have a SFP which supports a revision of SFF-8472. */
3248 modinfo->type = ETH_MODULE_SFF_8472;
3249 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3255 static int ixgbe_get_module_eeprom(struct net_device *dev,
3256 struct ethtool_eeprom *ee,
3259 struct ixgbe_adapter *adapter = netdev_priv(dev);
3260 struct ixgbe_hw *hw = &adapter->hw;
3261 s32 status = IXGBE_ERR_PHY_ADDR_INVALID;
3268 if (hw->phy.type == ixgbe_phy_fw)
3271 for (i = ee->offset; i < ee->offset + ee->len; i++) {
3272 /* I2C reads can take long time */
3273 if (test_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
3276 if (i < ETH_MODULE_SFF_8079_LEN)
3277 status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte);
3279 status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte);
3284 data[i - ee->offset] = databyte;
3290 static const struct {
3291 ixgbe_link_speed mac_speed;
3293 } ixgbe_ls_map[] = {
3294 { IXGBE_LINK_SPEED_10_FULL, SUPPORTED_10baseT_Full },
3295 { IXGBE_LINK_SPEED_100_FULL, SUPPORTED_100baseT_Full },
3296 { IXGBE_LINK_SPEED_1GB_FULL, SUPPORTED_1000baseT_Full },
3297 { IXGBE_LINK_SPEED_2_5GB_FULL, SUPPORTED_2500baseX_Full },
3298 { IXGBE_LINK_SPEED_10GB_FULL, SUPPORTED_10000baseT_Full },
3301 static const struct {
3304 } ixgbe_lp_map[] = {
3305 { FW_PHY_ACT_UD_2_100M_TX_EEE, SUPPORTED_100baseT_Full },
3306 { FW_PHY_ACT_UD_2_1G_T_EEE, SUPPORTED_1000baseT_Full },
3307 { FW_PHY_ACT_UD_2_10G_T_EEE, SUPPORTED_10000baseT_Full },
3308 { FW_PHY_ACT_UD_2_1G_KX_EEE, SUPPORTED_1000baseKX_Full },
3309 { FW_PHY_ACT_UD_2_10G_KX4_EEE, SUPPORTED_10000baseKX4_Full },
3310 { FW_PHY_ACT_UD_2_10G_KR_EEE, SUPPORTED_10000baseKR_Full},
3314 ixgbe_get_eee_fw(struct ixgbe_adapter *adapter, struct ethtool_eee *edata)
3316 u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 };
3317 struct ixgbe_hw *hw = &adapter->hw;
3321 rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_UD_2, &info);
3325 edata->lp_advertised = 0;
3326 for (i = 0; i < ARRAY_SIZE(ixgbe_lp_map); ++i) {
3327 if (info[0] & ixgbe_lp_map[i].lp_advertised)
3328 edata->lp_advertised |= ixgbe_lp_map[i].mac_speed;
3331 edata->supported = 0;
3332 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) {
3333 if (hw->phy.eee_speeds_supported & ixgbe_ls_map[i].mac_speed)
3334 edata->supported |= ixgbe_ls_map[i].supported;
3337 edata->advertised = 0;
3338 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) {
3339 if (hw->phy.eee_speeds_advertised & ixgbe_ls_map[i].mac_speed)
3340 edata->advertised |= ixgbe_ls_map[i].supported;
3343 edata->eee_enabled = !!edata->advertised;
3344 edata->tx_lpi_enabled = edata->eee_enabled;
3345 if (edata->advertised & edata->lp_advertised)
3346 edata->eee_active = true;
3351 static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
3353 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3354 struct ixgbe_hw *hw = &adapter->hw;
3356 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE))
3359 if (hw->phy.eee_speeds_supported && hw->phy.type == ixgbe_phy_fw)
3360 return ixgbe_get_eee_fw(adapter, edata);
3365 static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
3367 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3368 struct ixgbe_hw *hw = &adapter->hw;
3369 struct ethtool_eee eee_data;
3372 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE))
3375 memset(&eee_data, 0, sizeof(struct ethtool_eee));
3377 ret_val = ixgbe_get_eee(netdev, &eee_data);
3381 if (eee_data.eee_enabled && !edata->eee_enabled) {
3382 if (eee_data.tx_lpi_enabled != edata->tx_lpi_enabled) {
3383 e_err(drv, "Setting EEE tx-lpi is not supported\n");
3387 if (eee_data.tx_lpi_timer != edata->tx_lpi_timer) {
3389 "Setting EEE Tx LPI timer is not supported\n");
3393 if (eee_data.advertised != edata->advertised) {
3395 "Setting EEE advertised speeds is not supported\n");
3400 if (eee_data.eee_enabled != edata->eee_enabled) {
3401 if (edata->eee_enabled) {
3402 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
3403 hw->phy.eee_speeds_advertised =
3404 hw->phy.eee_speeds_supported;
3406 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
3407 hw->phy.eee_speeds_advertised = 0;
3411 if (netif_running(netdev))
3412 ixgbe_reinit_locked(adapter);
3414 ixgbe_reset(adapter);
3420 static u32 ixgbe_get_priv_flags(struct net_device *netdev)
3422 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3425 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
3426 priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX;
3431 static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags)
3433 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3434 unsigned int flags2 = adapter->flags2;
3436 flags2 &= ~IXGBE_FLAG2_RX_LEGACY;
3437 if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX)
3438 flags2 |= IXGBE_FLAG2_RX_LEGACY;
3440 if (flags2 != adapter->flags2) {
3441 adapter->flags2 = flags2;
3443 /* reset interface to repopulate queues */
3444 if (netif_running(netdev))
3445 ixgbe_reinit_locked(adapter);
3451 static const struct ethtool_ops ixgbe_ethtool_ops = {
3452 .get_drvinfo = ixgbe_get_drvinfo,
3453 .get_regs_len = ixgbe_get_regs_len,
3454 .get_regs = ixgbe_get_regs,
3455 .get_wol = ixgbe_get_wol,
3456 .set_wol = ixgbe_set_wol,
3457 .nway_reset = ixgbe_nway_reset,
3458 .get_link = ethtool_op_get_link,
3459 .get_eeprom_len = ixgbe_get_eeprom_len,
3460 .get_eeprom = ixgbe_get_eeprom,
3461 .set_eeprom = ixgbe_set_eeprom,
3462 .get_ringparam = ixgbe_get_ringparam,
3463 .set_ringparam = ixgbe_set_ringparam,
3464 .get_pauseparam = ixgbe_get_pauseparam,
3465 .set_pauseparam = ixgbe_set_pauseparam,
3466 .get_msglevel = ixgbe_get_msglevel,
3467 .set_msglevel = ixgbe_set_msglevel,
3468 .self_test = ixgbe_diag_test,
3469 .get_strings = ixgbe_get_strings,
3470 .set_phys_id = ixgbe_set_phys_id,
3471 .get_sset_count = ixgbe_get_sset_count,
3472 .get_ethtool_stats = ixgbe_get_ethtool_stats,
3473 .get_coalesce = ixgbe_get_coalesce,
3474 .set_coalesce = ixgbe_set_coalesce,
3475 .get_rxnfc = ixgbe_get_rxnfc,
3476 .set_rxnfc = ixgbe_set_rxnfc,
3477 .get_rxfh_indir_size = ixgbe_rss_indir_size,
3478 .get_rxfh_key_size = ixgbe_get_rxfh_key_size,
3479 .get_rxfh = ixgbe_get_rxfh,
3480 .set_rxfh = ixgbe_set_rxfh,
3481 .get_eee = ixgbe_get_eee,
3482 .set_eee = ixgbe_set_eee,
3483 .get_channels = ixgbe_get_channels,
3484 .set_channels = ixgbe_set_channels,
3485 .get_priv_flags = ixgbe_get_priv_flags,
3486 .set_priv_flags = ixgbe_set_priv_flags,
3487 .get_ts_info = ixgbe_get_ts_info,
3488 .get_module_info = ixgbe_get_module_info,
3489 .get_module_eeprom = ixgbe_get_module_eeprom,
3490 .get_link_ksettings = ixgbe_get_link_ksettings,
3491 .set_link_ksettings = ixgbe_set_link_ksettings,
3494 void ixgbe_set_ethtool_ops(struct net_device *netdev)
3496 netdev->ethtool_ops = &ixgbe_ethtool_ops;