1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2008 Intel Corporation. */
4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9 static u16 ixgb_shift_in_bits(struct ixgb_hw *hw);
11 static void ixgb_shift_out_bits(struct ixgb_hw *hw,
14 static void ixgb_standby_eeprom(struct ixgb_hw *hw);
16 static bool ixgb_wait_eeprom_command(struct ixgb_hw *hw);
18 static void ixgb_cleanup_eeprom(struct ixgb_hw *hw);
20 /******************************************************************************
21 * Raises the EEPROM's clock input.
23 * hw - Struct containing variables accessed by shared code
24 * eecd_reg - EECD's current value
25 *****************************************************************************/
27 ixgb_raise_clock(struct ixgb_hw *hw,
30 /* Raise the clock input to the EEPROM (by setting the SK bit), and then
31 * wait 50 microseconds.
33 *eecd_reg = *eecd_reg | IXGB_EECD_SK;
34 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
39 /******************************************************************************
40 * Lowers the EEPROM's clock input.
42 * hw - Struct containing variables accessed by shared code
43 * eecd_reg - EECD's current value
44 *****************************************************************************/
46 ixgb_lower_clock(struct ixgb_hw *hw,
49 /* Lower the clock input to the EEPROM (by clearing the SK bit), and then
50 * wait 50 microseconds.
52 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK;
53 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
58 /******************************************************************************
59 * Shift data bits out to the EEPROM.
61 * hw - Struct containing variables accessed by shared code
62 * data - data to send to the EEPROM
63 * count - number of bits to shift out
64 *****************************************************************************/
66 ixgb_shift_out_bits(struct ixgb_hw *hw,
73 /* We need to shift "count" bits out to the EEPROM. So, value in the
74 * "data" parameter will be shifted out to the EEPROM one bit at a time.
75 * In order to do this, "data" must be broken down into bits.
77 mask = 0x01 << (count - 1);
78 eecd_reg = IXGB_READ_REG(hw, EECD);
79 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
81 /* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1",
82 * and then raising and then lowering the clock (the SK bit controls
83 * the clock input to the EEPROM). A "0" is shifted out to the EEPROM
84 * by setting "DI" to "0" and then raising and then lowering the clock.
86 eecd_reg &= ~IXGB_EECD_DI;
89 eecd_reg |= IXGB_EECD_DI;
91 IXGB_WRITE_REG(hw, EECD, eecd_reg);
96 ixgb_raise_clock(hw, &eecd_reg);
97 ixgb_lower_clock(hw, &eecd_reg);
103 /* We leave the "DI" bit set to "0" when we leave this routine. */
104 eecd_reg &= ~IXGB_EECD_DI;
105 IXGB_WRITE_REG(hw, EECD, eecd_reg);
108 /******************************************************************************
109 * Shift data bits in from the EEPROM
111 * hw - Struct containing variables accessed by shared code
112 *****************************************************************************/
114 ixgb_shift_in_bits(struct ixgb_hw *hw)
120 /* In order to read a register from the EEPROM, we need to shift 16 bits
121 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
122 * the EEPROM (setting the SK bit), and then reading the value of the "DO"
123 * bit. During this "shifting in" process the "DI" bit should always be
127 eecd_reg = IXGB_READ_REG(hw, EECD);
129 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
132 for (i = 0; i < 16; i++) {
134 ixgb_raise_clock(hw, &eecd_reg);
136 eecd_reg = IXGB_READ_REG(hw, EECD);
138 eecd_reg &= ~(IXGB_EECD_DI);
139 if (eecd_reg & IXGB_EECD_DO)
142 ixgb_lower_clock(hw, &eecd_reg);
148 /******************************************************************************
149 * Prepares EEPROM for access
151 * hw - Struct containing variables accessed by shared code
153 * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This
154 * function should be called before issuing a command to the EEPROM.
155 *****************************************************************************/
157 ixgb_setup_eeprom(struct ixgb_hw *hw)
161 eecd_reg = IXGB_READ_REG(hw, EECD);
163 /* Clear SK and DI */
164 eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI);
165 IXGB_WRITE_REG(hw, EECD, eecd_reg);
168 eecd_reg |= IXGB_EECD_CS;
169 IXGB_WRITE_REG(hw, EECD, eecd_reg);
172 /******************************************************************************
173 * Returns EEPROM to a "standby" state
175 * hw - Struct containing variables accessed by shared code
176 *****************************************************************************/
178 ixgb_standby_eeprom(struct ixgb_hw *hw)
182 eecd_reg = IXGB_READ_REG(hw, EECD);
184 /* Deselect EEPROM */
185 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK);
186 IXGB_WRITE_REG(hw, EECD, eecd_reg);
187 IXGB_WRITE_FLUSH(hw);
191 eecd_reg |= IXGB_EECD_SK;
192 IXGB_WRITE_REG(hw, EECD, eecd_reg);
193 IXGB_WRITE_FLUSH(hw);
197 eecd_reg |= IXGB_EECD_CS;
198 IXGB_WRITE_REG(hw, EECD, eecd_reg);
199 IXGB_WRITE_FLUSH(hw);
203 eecd_reg &= ~IXGB_EECD_SK;
204 IXGB_WRITE_REG(hw, EECD, eecd_reg);
205 IXGB_WRITE_FLUSH(hw);
209 /******************************************************************************
210 * Raises then lowers the EEPROM's clock pin
212 * hw - Struct containing variables accessed by shared code
213 *****************************************************************************/
215 ixgb_clock_eeprom(struct ixgb_hw *hw)
219 eecd_reg = IXGB_READ_REG(hw, EECD);
221 /* Rising edge of clock */
222 eecd_reg |= IXGB_EECD_SK;
223 IXGB_WRITE_REG(hw, EECD, eecd_reg);
224 IXGB_WRITE_FLUSH(hw);
227 /* Falling edge of clock */
228 eecd_reg &= ~IXGB_EECD_SK;
229 IXGB_WRITE_REG(hw, EECD, eecd_reg);
230 IXGB_WRITE_FLUSH(hw);
234 /******************************************************************************
235 * Terminates a command by lowering the EEPROM's chip select pin
237 * hw - Struct containing variables accessed by shared code
238 *****************************************************************************/
240 ixgb_cleanup_eeprom(struct ixgb_hw *hw)
244 eecd_reg = IXGB_READ_REG(hw, EECD);
246 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI);
248 IXGB_WRITE_REG(hw, EECD, eecd_reg);
250 ixgb_clock_eeprom(hw);
253 /******************************************************************************
254 * Waits for the EEPROM to finish the current command.
256 * hw - Struct containing variables accessed by shared code
258 * The command is done when the EEPROM's data out pin goes high.
261 * true: EEPROM data pin is high before timeout.
262 * false: Time expired.
263 *****************************************************************************/
265 ixgb_wait_eeprom_command(struct ixgb_hw *hw)
270 /* Toggle the CS line. This in effect tells to EEPROM to actually execute
271 * the command in question.
273 ixgb_standby_eeprom(hw);
275 /* Now read DO repeatedly until is high (equal to '1'). The EEPROM will
276 * signal that the command has been completed by raising the DO signal.
277 * If DO does not go high in 10 milliseconds, then error out.
279 for (i = 0; i < 200; i++) {
280 eecd_reg = IXGB_READ_REG(hw, EECD);
282 if (eecd_reg & IXGB_EECD_DO)
291 /******************************************************************************
292 * Verifies that the EEPROM has a valid checksum
294 * hw - Struct containing variables accessed by shared code
296 * Reads the first 64 16 bit words of the EEPROM and sums the values read.
297 * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
301 * true: Checksum is valid
302 * false: Checksum is not valid.
303 *****************************************************************************/
305 ixgb_validate_eeprom_checksum(struct ixgb_hw *hw)
310 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++)
311 checksum += ixgb_read_eeprom(hw, i);
313 if (checksum == (u16) EEPROM_SUM)
319 /******************************************************************************
320 * Calculates the EEPROM checksum and writes it to the EEPROM
322 * hw - Struct containing variables accessed by shared code
324 * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA.
325 * Writes the difference to word offset 63 of the EEPROM.
326 *****************************************************************************/
328 ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
333 for (i = 0; i < EEPROM_CHECKSUM_REG; i++)
334 checksum += ixgb_read_eeprom(hw, i);
336 checksum = (u16) EEPROM_SUM - checksum;
338 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum);
341 /******************************************************************************
342 * Writes a 16 bit word to a given offset in the EEPROM.
344 * hw - Struct containing variables accessed by shared code
345 * reg - offset within the EEPROM to be written to
346 * data - 16 bit word to be written to the EEPROM
348 * If ixgb_update_eeprom_checksum is not called after this function, the
349 * EEPROM will most likely contain an invalid checksum.
351 *****************************************************************************/
353 ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data)
355 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
357 /* Prepare the EEPROM for writing */
358 ixgb_setup_eeprom(hw);
360 /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode
361 * plus 4-bit dummy). This puts the EEPROM into write/erase mode.
363 ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5);
364 ixgb_shift_out_bits(hw, 0, 4);
366 /* Prepare the EEPROM */
367 ixgb_standby_eeprom(hw);
369 /* Send the Write command (3-bit opcode + 6-bit addr) */
370 ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3);
371 ixgb_shift_out_bits(hw, offset, 6);
374 ixgb_shift_out_bits(hw, data, 16);
376 ixgb_wait_eeprom_command(hw);
378 /* Recover from write */
379 ixgb_standby_eeprom(hw);
381 /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit
382 * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase
385 ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5);
386 ixgb_shift_out_bits(hw, 0, 4);
388 /* Done with writing */
389 ixgb_cleanup_eeprom(hw);
391 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */
392 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
395 /******************************************************************************
396 * Reads a 16 bit word from the EEPROM.
398 * hw - Struct containing variables accessed by shared code
399 * offset - offset of 16 bit word in the EEPROM to read
402 * The 16-bit value read from the eeprom
403 *****************************************************************************/
405 ixgb_read_eeprom(struct ixgb_hw *hw,
410 /* Prepare the EEPROM for reading */
411 ixgb_setup_eeprom(hw);
413 /* Send the READ command (opcode + addr) */
414 ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3);
416 * We have a 64 word EEPROM, there are 6 address bits
418 ixgb_shift_out_bits(hw, offset, 6);
421 data = ixgb_shift_in_bits(hw);
423 /* End this read operation */
424 ixgb_standby_eeprom(hw);
429 /******************************************************************************
430 * Reads eeprom and stores data in shared structure.
431 * Validates eeprom checksum and eeprom signature.
433 * hw - Struct containing variables accessed by shared code
436 * true: if eeprom read is successful
438 *****************************************************************************/
440 ixgb_get_eeprom_data(struct ixgb_hw *hw)
444 struct ixgb_ee_map_type *ee_map;
448 ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
450 pr_debug("Reading eeprom data\n");
451 for (i = 0; i < IXGB_EEPROM_SIZE ; i++) {
453 ee_data = ixgb_read_eeprom(hw, i);
455 hw->eeprom[i] = cpu_to_le16(ee_data);
458 if (checksum != (u16) EEPROM_SUM) {
459 pr_debug("Checksum invalid\n");
460 /* clear the init_ctrl_reg_1 to signify that the cache is
462 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
466 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
467 != cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
468 pr_debug("Signature invalid\n");
475 /******************************************************************************
476 * Local function to check if the eeprom signature is good
477 * If the eeprom signature is good, calls ixgb)get_eeprom_data.
479 * hw - Struct containing variables accessed by shared code
482 * true: eeprom signature was good and the eeprom read was successful
484 ******************************************************************************/
486 ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw)
488 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
490 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
491 == cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
494 return ixgb_get_eeprom_data(hw);
498 /******************************************************************************
499 * return a word from the eeprom
501 * hw - Struct containing variables accessed by shared code
502 * index - Offset of eeprom word
505 * Word at indexed offset in eeprom, if valid, 0 otherwise.
506 ******************************************************************************/
508 ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index)
511 if (index < IXGB_EEPROM_SIZE && ixgb_check_and_get_eeprom_data(hw))
512 return hw->eeprom[index];
517 /******************************************************************************
518 * return the mac address from EEPROM
520 * hw - Struct containing variables accessed by shared code
521 * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise
524 ******************************************************************************/
526 ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
530 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
534 if (ixgb_check_and_get_eeprom_data(hw)) {
535 for (i = 0; i < ETH_ALEN; i++) {
536 mac_addr[i] = ee_map->mac_addr[i];
538 pr_debug("eeprom mac address = %pM\n", mac_addr);
543 /******************************************************************************
544 * return the Printed Board Assembly number from EEPROM
546 * hw - Struct containing variables accessed by shared code
549 * PBA number if EEPROM contents are valid, 0 otherwise
550 ******************************************************************************/
552 ixgb_get_ee_pba_number(struct ixgb_hw *hw)
554 if (ixgb_check_and_get_eeprom_data(hw))
555 return le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG])
556 | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16);
562 /******************************************************************************
563 * return the Device Id from EEPROM
565 * hw - Struct containing variables accessed by shared code
568 * Device Id if EEPROM contents are valid, 0 otherwise
569 ******************************************************************************/
571 ixgb_get_ee_device_id(struct ixgb_hw *hw)
573 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
575 if (ixgb_check_and_get_eeprom_data(hw))
576 return le16_to_cpu(ee_map->device_id);