1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2020 Intel Corporation */
4 bool igc_reg_test(struct igc_adapter *adapter, u64 *data);
5 bool igc_eeprom_test(struct igc_adapter *adapter, u64 *data);
6 bool igc_link_test(struct igc_adapter *adapter, u64 *data);
16 /* In the hardware, registers are laid out either singly, in arrays
17 * spaced 0x40 bytes apart, or in contiguous tables. We assume
18 * most tests take place on arrays or single registers (handled
19 * as a single-element array) and special-case the tables.
20 * Table tests are always pattern tests.
22 * We also make provision for some required setup steps by specifying
23 * registers to be written without any read-back testing.
26 #define PATTERN_TEST 1
27 #define SET_READ_TEST 2
28 #define TABLE32_TEST 3
29 #define TABLE64_TEST_LO 4
30 #define TABLE64_TEST_HI 5