GNU Linux-libre 4.9.330-gnu1
[releases.git] / drivers / net / ethernet / intel / igb / igb_ptp.c
1 /* PTP Hardware Clock (PHC) driver for the Intel 82576 and 82580
2  *
3  * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along with
16  * this program; if not, see <http://www.gnu.org/licenses/>.
17  */
18 #include <linux/module.h>
19 #include <linux/device.h>
20 #include <linux/pci.h>
21 #include <linux/ptp_classify.h>
22
23 #include "igb.h"
24
25 #define INCVALUE_MASK           0x7fffffff
26 #define ISGN                    0x80000000
27
28 /* The 82580 timesync updates the system timer every 8ns by 8ns,
29  * and this update value cannot be reprogrammed.
30  *
31  * Neither the 82576 nor the 82580 offer registers wide enough to hold
32  * nanoseconds time values for very long. For the 82580, SYSTIM always
33  * counts nanoseconds, but the upper 24 bits are not available. The
34  * frequency is adjusted by changing the 32 bit fractional nanoseconds
35  * register, TIMINCA.
36  *
37  * For the 82576, the SYSTIM register time unit is affect by the
38  * choice of the 24 bit TININCA:IV (incvalue) field. Five bits of this
39  * field are needed to provide the nominal 16 nanosecond period,
40  * leaving 19 bits for fractional nanoseconds.
41  *
42  * We scale the NIC clock cycle by a large factor so that relatively
43  * small clock corrections can be added or subtracted at each clock
44  * tick. The drawbacks of a large factor are a) that the clock
45  * register overflows more quickly (not such a big deal) and b) that
46  * the increment per tick has to fit into 24 bits.  As a result we
47  * need to use a shift of 19 so we can fit a value of 16 into the
48  * TIMINCA register.
49  *
50  *
51  *             SYSTIMH            SYSTIML
52  *        +--------------+   +---+---+------+
53  *  82576 |      32      |   | 8 | 5 |  19  |
54  *        +--------------+   +---+---+------+
55  *         \________ 45 bits _______/  fract
56  *
57  *        +----------+---+   +--------------+
58  *  82580 |    24    | 8 |   |      32      |
59  *        +----------+---+   +--------------+
60  *          reserved  \______ 40 bits _____/
61  *
62  *
63  * The 45 bit 82576 SYSTIM overflows every
64  *   2^45 * 10^-9 / 3600 = 9.77 hours.
65  *
66  * The 40 bit 82580 SYSTIM overflows every
67  *   2^40 * 10^-9 /  60  = 18.3 minutes.
68  *
69  * SYSTIM is converted to real time using a timecounter. As
70  * timecounter_cyc2time() allows old timestamps, the timecounter
71  * needs to be updated at least once per half of the SYSTIM interval.
72  * Scheduling of delayed work is not very accurate, so we aim for 8
73  * minutes to be sure the actual interval is shorter than 9.16 minutes.
74  */
75
76 #define IGB_SYSTIM_OVERFLOW_PERIOD      (HZ * 60 * 8)
77 #define IGB_PTP_TX_TIMEOUT              (HZ * 15)
78 #define INCPERIOD_82576                 BIT(E1000_TIMINCA_16NS_SHIFT)
79 #define INCVALUE_82576_MASK             GENMASK(E1000_TIMINCA_16NS_SHIFT - 1, 0)
80 #define INCVALUE_82576                  (16u << IGB_82576_TSYNC_SHIFT)
81 #define IGB_NBITS_82580                 40
82
83 static void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter);
84
85 /* SYSTIM read access for the 82576 */
86 static cycle_t igb_ptp_read_82576(const struct cyclecounter *cc)
87 {
88         struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
89         struct e1000_hw *hw = &igb->hw;
90         u64 val;
91         u32 lo, hi;
92
93         lo = rd32(E1000_SYSTIML);
94         hi = rd32(E1000_SYSTIMH);
95
96         val = ((u64) hi) << 32;
97         val |= lo;
98
99         return val;
100 }
101
102 /* SYSTIM read access for the 82580 */
103 static cycle_t igb_ptp_read_82580(const struct cyclecounter *cc)
104 {
105         struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
106         struct e1000_hw *hw = &igb->hw;
107         u32 lo, hi;
108         u64 val;
109
110         /* The timestamp latches on lowest register read. For the 82580
111          * the lowest register is SYSTIMR instead of SYSTIML.  However we only
112          * need to provide nanosecond resolution, so we just ignore it.
113          */
114         rd32(E1000_SYSTIMR);
115         lo = rd32(E1000_SYSTIML);
116         hi = rd32(E1000_SYSTIMH);
117
118         val = ((u64) hi) << 32;
119         val |= lo;
120
121         return val;
122 }
123
124 /* SYSTIM read access for I210/I211 */
125 static void igb_ptp_read_i210(struct igb_adapter *adapter,
126                               struct timespec64 *ts)
127 {
128         struct e1000_hw *hw = &adapter->hw;
129         u32 sec, nsec;
130
131         /* The timestamp latches on lowest register read. For I210/I211, the
132          * lowest register is SYSTIMR. Since we only need to provide nanosecond
133          * resolution, we can ignore it.
134          */
135         rd32(E1000_SYSTIMR);
136         nsec = rd32(E1000_SYSTIML);
137         sec = rd32(E1000_SYSTIMH);
138
139         ts->tv_sec = sec;
140         ts->tv_nsec = nsec;
141 }
142
143 static void igb_ptp_write_i210(struct igb_adapter *adapter,
144                                const struct timespec64 *ts)
145 {
146         struct e1000_hw *hw = &adapter->hw;
147
148         /* Writing the SYSTIMR register is not necessary as it only provides
149          * sub-nanosecond resolution.
150          */
151         wr32(E1000_SYSTIML, ts->tv_nsec);
152         wr32(E1000_SYSTIMH, (u32)ts->tv_sec);
153 }
154
155 /**
156  * igb_ptp_systim_to_hwtstamp - convert system time value to hw timestamp
157  * @adapter: board private structure
158  * @hwtstamps: timestamp structure to update
159  * @systim: unsigned 64bit system time value.
160  *
161  * We need to convert the system time value stored in the RX/TXSTMP registers
162  * into a hwtstamp which can be used by the upper level timestamping functions.
163  *
164  * The 'tmreg_lock' spinlock is used to protect the consistency of the
165  * system time value. This is needed because reading the 64 bit time
166  * value involves reading two (or three) 32 bit registers. The first
167  * read latches the value. Ditto for writing.
168  *
169  * In addition, here have extended the system time with an overflow
170  * counter in software.
171  **/
172 static void igb_ptp_systim_to_hwtstamp(struct igb_adapter *adapter,
173                                        struct skb_shared_hwtstamps *hwtstamps,
174                                        u64 systim)
175 {
176         unsigned long flags;
177         u64 ns;
178
179         switch (adapter->hw.mac.type) {
180         case e1000_82576:
181         case e1000_82580:
182         case e1000_i354:
183         case e1000_i350:
184                 spin_lock_irqsave(&adapter->tmreg_lock, flags);
185
186                 ns = timecounter_cyc2time(&adapter->tc, systim);
187
188                 spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
189
190                 memset(hwtstamps, 0, sizeof(*hwtstamps));
191                 hwtstamps->hwtstamp = ns_to_ktime(ns);
192                 break;
193         case e1000_i210:
194         case e1000_i211:
195                 memset(hwtstamps, 0, sizeof(*hwtstamps));
196                 /* Upper 32 bits contain s, lower 32 bits contain ns. */
197                 hwtstamps->hwtstamp = ktime_set(systim >> 32,
198                                                 systim & 0xFFFFFFFF);
199                 break;
200         default:
201                 break;
202         }
203 }
204
205 /* PTP clock operations */
206 static int igb_ptp_adjfreq_82576(struct ptp_clock_info *ptp, s32 ppb)
207 {
208         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
209                                                ptp_caps);
210         struct e1000_hw *hw = &igb->hw;
211         int neg_adj = 0;
212         u64 rate;
213         u32 incvalue;
214
215         if (ppb < 0) {
216                 neg_adj = 1;
217                 ppb = -ppb;
218         }
219         rate = ppb;
220         rate <<= 14;
221         rate = div_u64(rate, 1953125);
222
223         incvalue = 16 << IGB_82576_TSYNC_SHIFT;
224
225         if (neg_adj)
226                 incvalue -= rate;
227         else
228                 incvalue += rate;
229
230         wr32(E1000_TIMINCA, INCPERIOD_82576 | (incvalue & INCVALUE_82576_MASK));
231
232         return 0;
233 }
234
235 static int igb_ptp_adjfreq_82580(struct ptp_clock_info *ptp, s32 ppb)
236 {
237         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
238                                                ptp_caps);
239         struct e1000_hw *hw = &igb->hw;
240         int neg_adj = 0;
241         u64 rate;
242         u32 inca;
243
244         if (ppb < 0) {
245                 neg_adj = 1;
246                 ppb = -ppb;
247         }
248         rate = ppb;
249         rate <<= 26;
250         rate = div_u64(rate, 1953125);
251
252         inca = rate & INCVALUE_MASK;
253         if (neg_adj)
254                 inca |= ISGN;
255
256         wr32(E1000_TIMINCA, inca);
257
258         return 0;
259 }
260
261 static int igb_ptp_adjtime_82576(struct ptp_clock_info *ptp, s64 delta)
262 {
263         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
264                                                ptp_caps);
265         unsigned long flags;
266
267         spin_lock_irqsave(&igb->tmreg_lock, flags);
268         timecounter_adjtime(&igb->tc, delta);
269         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
270
271         return 0;
272 }
273
274 static int igb_ptp_adjtime_i210(struct ptp_clock_info *ptp, s64 delta)
275 {
276         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
277                                                ptp_caps);
278         unsigned long flags;
279         struct timespec64 now, then = ns_to_timespec64(delta);
280
281         spin_lock_irqsave(&igb->tmreg_lock, flags);
282
283         igb_ptp_read_i210(igb, &now);
284         now = timespec64_add(now, then);
285         igb_ptp_write_i210(igb, (const struct timespec64 *)&now);
286
287         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
288
289         return 0;
290 }
291
292 static int igb_ptp_gettime_82576(struct ptp_clock_info *ptp,
293                                  struct timespec64 *ts)
294 {
295         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
296                                                ptp_caps);
297         unsigned long flags;
298         u64 ns;
299
300         spin_lock_irqsave(&igb->tmreg_lock, flags);
301
302         ns = timecounter_read(&igb->tc);
303
304         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
305
306         *ts = ns_to_timespec64(ns);
307
308         return 0;
309 }
310
311 static int igb_ptp_gettime_i210(struct ptp_clock_info *ptp,
312                                 struct timespec64 *ts)
313 {
314         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
315                                                ptp_caps);
316         unsigned long flags;
317
318         spin_lock_irqsave(&igb->tmreg_lock, flags);
319
320         igb_ptp_read_i210(igb, ts);
321
322         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
323
324         return 0;
325 }
326
327 static int igb_ptp_settime_82576(struct ptp_clock_info *ptp,
328                                  const struct timespec64 *ts)
329 {
330         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
331                                                ptp_caps);
332         unsigned long flags;
333         u64 ns;
334
335         ns = timespec64_to_ns(ts);
336
337         spin_lock_irqsave(&igb->tmreg_lock, flags);
338
339         timecounter_init(&igb->tc, &igb->cc, ns);
340
341         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
342
343         return 0;
344 }
345
346 static int igb_ptp_settime_i210(struct ptp_clock_info *ptp,
347                                 const struct timespec64 *ts)
348 {
349         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
350                                                ptp_caps);
351         unsigned long flags;
352
353         spin_lock_irqsave(&igb->tmreg_lock, flags);
354
355         igb_ptp_write_i210(igb, ts);
356
357         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
358
359         return 0;
360 }
361
362 static void igb_pin_direction(int pin, int input, u32 *ctrl, u32 *ctrl_ext)
363 {
364         u32 *ptr = pin < 2 ? ctrl : ctrl_ext;
365         static const u32 mask[IGB_N_SDP] = {
366                 E1000_CTRL_SDP0_DIR,
367                 E1000_CTRL_SDP1_DIR,
368                 E1000_CTRL_EXT_SDP2_DIR,
369                 E1000_CTRL_EXT_SDP3_DIR,
370         };
371
372         if (input)
373                 *ptr &= ~mask[pin];
374         else
375                 *ptr |= mask[pin];
376 }
377
378 static void igb_pin_extts(struct igb_adapter *igb, int chan, int pin)
379 {
380         static const u32 aux0_sel_sdp[IGB_N_SDP] = {
381                 AUX0_SEL_SDP0, AUX0_SEL_SDP1, AUX0_SEL_SDP2, AUX0_SEL_SDP3,
382         };
383         static const u32 aux1_sel_sdp[IGB_N_SDP] = {
384                 AUX1_SEL_SDP0, AUX1_SEL_SDP1, AUX1_SEL_SDP2, AUX1_SEL_SDP3,
385         };
386         static const u32 ts_sdp_en[IGB_N_SDP] = {
387                 TS_SDP0_EN, TS_SDP1_EN, TS_SDP2_EN, TS_SDP3_EN,
388         };
389         struct e1000_hw *hw = &igb->hw;
390         u32 ctrl, ctrl_ext, tssdp = 0;
391
392         ctrl = rd32(E1000_CTRL);
393         ctrl_ext = rd32(E1000_CTRL_EXT);
394         tssdp = rd32(E1000_TSSDP);
395
396         igb_pin_direction(pin, 1, &ctrl, &ctrl_ext);
397
398         /* Make sure this pin is not enabled as an output. */
399         tssdp &= ~ts_sdp_en[pin];
400
401         if (chan == 1) {
402                 tssdp &= ~AUX1_SEL_SDP3;
403                 tssdp |= aux1_sel_sdp[pin] | AUX1_TS_SDP_EN;
404         } else {
405                 tssdp &= ~AUX0_SEL_SDP3;
406                 tssdp |= aux0_sel_sdp[pin] | AUX0_TS_SDP_EN;
407         }
408
409         wr32(E1000_TSSDP, tssdp);
410         wr32(E1000_CTRL, ctrl);
411         wr32(E1000_CTRL_EXT, ctrl_ext);
412 }
413
414 static void igb_pin_perout(struct igb_adapter *igb, int chan, int pin, int freq)
415 {
416         static const u32 aux0_sel_sdp[IGB_N_SDP] = {
417                 AUX0_SEL_SDP0, AUX0_SEL_SDP1, AUX0_SEL_SDP2, AUX0_SEL_SDP3,
418         };
419         static const u32 aux1_sel_sdp[IGB_N_SDP] = {
420                 AUX1_SEL_SDP0, AUX1_SEL_SDP1, AUX1_SEL_SDP2, AUX1_SEL_SDP3,
421         };
422         static const u32 ts_sdp_en[IGB_N_SDP] = {
423                 TS_SDP0_EN, TS_SDP1_EN, TS_SDP2_EN, TS_SDP3_EN,
424         };
425         static const u32 ts_sdp_sel_tt0[IGB_N_SDP] = {
426                 TS_SDP0_SEL_TT0, TS_SDP1_SEL_TT0,
427                 TS_SDP2_SEL_TT0, TS_SDP3_SEL_TT0,
428         };
429         static const u32 ts_sdp_sel_tt1[IGB_N_SDP] = {
430                 TS_SDP0_SEL_TT1, TS_SDP1_SEL_TT1,
431                 TS_SDP2_SEL_TT1, TS_SDP3_SEL_TT1,
432         };
433         static const u32 ts_sdp_sel_fc0[IGB_N_SDP] = {
434                 TS_SDP0_SEL_FC0, TS_SDP1_SEL_FC0,
435                 TS_SDP2_SEL_FC0, TS_SDP3_SEL_FC0,
436         };
437         static const u32 ts_sdp_sel_fc1[IGB_N_SDP] = {
438                 TS_SDP0_SEL_FC1, TS_SDP1_SEL_FC1,
439                 TS_SDP2_SEL_FC1, TS_SDP3_SEL_FC1,
440         };
441         static const u32 ts_sdp_sel_clr[IGB_N_SDP] = {
442                 TS_SDP0_SEL_FC1, TS_SDP1_SEL_FC1,
443                 TS_SDP2_SEL_FC1, TS_SDP3_SEL_FC1,
444         };
445         struct e1000_hw *hw = &igb->hw;
446         u32 ctrl, ctrl_ext, tssdp = 0;
447
448         ctrl = rd32(E1000_CTRL);
449         ctrl_ext = rd32(E1000_CTRL_EXT);
450         tssdp = rd32(E1000_TSSDP);
451
452         igb_pin_direction(pin, 0, &ctrl, &ctrl_ext);
453
454         /* Make sure this pin is not enabled as an input. */
455         if ((tssdp & AUX0_SEL_SDP3) == aux0_sel_sdp[pin])
456                 tssdp &= ~AUX0_TS_SDP_EN;
457
458         if ((tssdp & AUX1_SEL_SDP3) == aux1_sel_sdp[pin])
459                 tssdp &= ~AUX1_TS_SDP_EN;
460
461         tssdp &= ~ts_sdp_sel_clr[pin];
462         if (freq) {
463                 if (chan == 1)
464                         tssdp |= ts_sdp_sel_fc1[pin];
465                 else
466                         tssdp |= ts_sdp_sel_fc0[pin];
467         } else {
468                 if (chan == 1)
469                         tssdp |= ts_sdp_sel_tt1[pin];
470                 else
471                         tssdp |= ts_sdp_sel_tt0[pin];
472         }
473         tssdp |= ts_sdp_en[pin];
474
475         wr32(E1000_TSSDP, tssdp);
476         wr32(E1000_CTRL, ctrl);
477         wr32(E1000_CTRL_EXT, ctrl_ext);
478 }
479
480 static int igb_ptp_feature_enable_i210(struct ptp_clock_info *ptp,
481                                        struct ptp_clock_request *rq, int on)
482 {
483         struct igb_adapter *igb =
484                 container_of(ptp, struct igb_adapter, ptp_caps);
485         struct e1000_hw *hw = &igb->hw;
486         u32 tsauxc, tsim, tsauxc_mask, tsim_mask, trgttiml, trgttimh, freqout;
487         unsigned long flags;
488         struct timespec64 ts;
489         int use_freq = 0, pin = -1;
490         s64 ns;
491
492         switch (rq->type) {
493         case PTP_CLK_REQ_EXTTS:
494                 if (on) {
495                         pin = ptp_find_pin(igb->ptp_clock, PTP_PF_EXTTS,
496                                            rq->extts.index);
497                         if (pin < 0)
498                                 return -EBUSY;
499                 }
500                 if (rq->extts.index == 1) {
501                         tsauxc_mask = TSAUXC_EN_TS1;
502                         tsim_mask = TSINTR_AUTT1;
503                 } else {
504                         tsauxc_mask = TSAUXC_EN_TS0;
505                         tsim_mask = TSINTR_AUTT0;
506                 }
507                 spin_lock_irqsave(&igb->tmreg_lock, flags);
508                 tsauxc = rd32(E1000_TSAUXC);
509                 tsim = rd32(E1000_TSIM);
510                 if (on) {
511                         igb_pin_extts(igb, rq->extts.index, pin);
512                         tsauxc |= tsauxc_mask;
513                         tsim |= tsim_mask;
514                 } else {
515                         tsauxc &= ~tsauxc_mask;
516                         tsim &= ~tsim_mask;
517                 }
518                 wr32(E1000_TSAUXC, tsauxc);
519                 wr32(E1000_TSIM, tsim);
520                 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
521                 return 0;
522
523         case PTP_CLK_REQ_PEROUT:
524                 if (on) {
525                         pin = ptp_find_pin(igb->ptp_clock, PTP_PF_PEROUT,
526                                            rq->perout.index);
527                         if (pin < 0)
528                                 return -EBUSY;
529                 }
530                 ts.tv_sec = rq->perout.period.sec;
531                 ts.tv_nsec = rq->perout.period.nsec;
532                 ns = timespec64_to_ns(&ts);
533                 ns = ns >> 1;
534                 if (on && ((ns <= 70000000LL) || (ns == 125000000LL) ||
535                            (ns == 250000000LL) || (ns == 500000000LL))) {
536                         if (ns < 8LL)
537                                 return -EINVAL;
538                         use_freq = 1;
539                 }
540                 ts = ns_to_timespec64(ns);
541                 if (rq->perout.index == 1) {
542                         if (use_freq) {
543                                 tsauxc_mask = TSAUXC_EN_CLK1 | TSAUXC_ST1;
544                                 tsim_mask = 0;
545                         } else {
546                                 tsauxc_mask = TSAUXC_EN_TT1;
547                                 tsim_mask = TSINTR_TT1;
548                         }
549                         trgttiml = E1000_TRGTTIML1;
550                         trgttimh = E1000_TRGTTIMH1;
551                         freqout = E1000_FREQOUT1;
552                 } else {
553                         if (use_freq) {
554                                 tsauxc_mask = TSAUXC_EN_CLK0 | TSAUXC_ST0;
555                                 tsim_mask = 0;
556                         } else {
557                                 tsauxc_mask = TSAUXC_EN_TT0;
558                                 tsim_mask = TSINTR_TT0;
559                         }
560                         trgttiml = E1000_TRGTTIML0;
561                         trgttimh = E1000_TRGTTIMH0;
562                         freqout = E1000_FREQOUT0;
563                 }
564                 spin_lock_irqsave(&igb->tmreg_lock, flags);
565                 tsauxc = rd32(E1000_TSAUXC);
566                 tsim = rd32(E1000_TSIM);
567                 if (rq->perout.index == 1) {
568                         tsauxc &= ~(TSAUXC_EN_TT1 | TSAUXC_EN_CLK1 | TSAUXC_ST1);
569                         tsim &= ~TSINTR_TT1;
570                 } else {
571                         tsauxc &= ~(TSAUXC_EN_TT0 | TSAUXC_EN_CLK0 | TSAUXC_ST0);
572                         tsim &= ~TSINTR_TT0;
573                 }
574                 if (on) {
575                         int i = rq->perout.index;
576                         igb_pin_perout(igb, i, pin, use_freq);
577                         igb->perout[i].start.tv_sec = rq->perout.start.sec;
578                         igb->perout[i].start.tv_nsec = rq->perout.start.nsec;
579                         igb->perout[i].period.tv_sec = ts.tv_sec;
580                         igb->perout[i].period.tv_nsec = ts.tv_nsec;
581                         wr32(trgttimh, rq->perout.start.sec);
582                         wr32(trgttiml, rq->perout.start.nsec);
583                         if (use_freq)
584                                 wr32(freqout, ns);
585                         tsauxc |= tsauxc_mask;
586                         tsim |= tsim_mask;
587                 }
588                 wr32(E1000_TSAUXC, tsauxc);
589                 wr32(E1000_TSIM, tsim);
590                 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
591                 return 0;
592
593         case PTP_CLK_REQ_PPS:
594                 spin_lock_irqsave(&igb->tmreg_lock, flags);
595                 tsim = rd32(E1000_TSIM);
596                 if (on)
597                         tsim |= TSINTR_SYS_WRAP;
598                 else
599                         tsim &= ~TSINTR_SYS_WRAP;
600                 igb->pps_sys_wrap_on = !!on;
601                 wr32(E1000_TSIM, tsim);
602                 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
603                 return 0;
604         }
605
606         return -EOPNOTSUPP;
607 }
608
609 static int igb_ptp_feature_enable(struct ptp_clock_info *ptp,
610                                   struct ptp_clock_request *rq, int on)
611 {
612         return -EOPNOTSUPP;
613 }
614
615 static int igb_ptp_verify_pin(struct ptp_clock_info *ptp, unsigned int pin,
616                               enum ptp_pin_function func, unsigned int chan)
617 {
618         switch (func) {
619         case PTP_PF_NONE:
620         case PTP_PF_EXTTS:
621         case PTP_PF_PEROUT:
622                 break;
623         case PTP_PF_PHYSYNC:
624                 return -1;
625         }
626         return 0;
627 }
628
629 /**
630  * igb_ptp_tx_work
631  * @work: pointer to work struct
632  *
633  * This work function polls the TSYNCTXCTL valid bit to determine when a
634  * timestamp has been taken for the current stored skb.
635  **/
636 static void igb_ptp_tx_work(struct work_struct *work)
637 {
638         struct igb_adapter *adapter = container_of(work, struct igb_adapter,
639                                                    ptp_tx_work);
640         struct e1000_hw *hw = &adapter->hw;
641         u32 tsynctxctl;
642
643         if (!adapter->ptp_tx_skb)
644                 return;
645
646         if (time_is_before_jiffies(adapter->ptp_tx_start +
647                                    IGB_PTP_TX_TIMEOUT)) {
648                 dev_kfree_skb_any(adapter->ptp_tx_skb);
649                 adapter->ptp_tx_skb = NULL;
650                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
651                 adapter->tx_hwtstamp_timeouts++;
652                 dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang\n");
653                 return;
654         }
655
656         tsynctxctl = rd32(E1000_TSYNCTXCTL);
657         if (tsynctxctl & E1000_TSYNCTXCTL_VALID)
658                 igb_ptp_tx_hwtstamp(adapter);
659         else
660                 /* reschedule to check later */
661                 schedule_work(&adapter->ptp_tx_work);
662 }
663
664 static void igb_ptp_overflow_check(struct work_struct *work)
665 {
666         struct igb_adapter *igb =
667                 container_of(work, struct igb_adapter, ptp_overflow_work.work);
668         struct timespec64 ts;
669
670         igb->ptp_caps.gettime64(&igb->ptp_caps, &ts);
671
672         pr_debug("igb overflow check at %lld.%09lu\n",
673                  (long long) ts.tv_sec, ts.tv_nsec);
674
675         schedule_delayed_work(&igb->ptp_overflow_work,
676                               IGB_SYSTIM_OVERFLOW_PERIOD);
677 }
678
679 /**
680  * igb_ptp_rx_hang - detect error case when Rx timestamp registers latched
681  * @adapter: private network adapter structure
682  *
683  * This watchdog task is scheduled to detect error case where hardware has
684  * dropped an Rx packet that was timestamped when the ring is full. The
685  * particular error is rare but leaves the device in a state unable to timestamp
686  * any future packets.
687  **/
688 void igb_ptp_rx_hang(struct igb_adapter *adapter)
689 {
690         struct e1000_hw *hw = &adapter->hw;
691         u32 tsyncrxctl = rd32(E1000_TSYNCRXCTL);
692         unsigned long rx_event;
693
694         /* Other hardware uses per-packet timestamps */
695         if (hw->mac.type != e1000_82576)
696                 return;
697
698         /* If we don't have a valid timestamp in the registers, just update the
699          * timeout counter and exit
700          */
701         if (!(tsyncrxctl & E1000_TSYNCRXCTL_VALID)) {
702                 adapter->last_rx_ptp_check = jiffies;
703                 return;
704         }
705
706         /* Determine the most recent watchdog or rx_timestamp event */
707         rx_event = adapter->last_rx_ptp_check;
708         if (time_after(adapter->last_rx_timestamp, rx_event))
709                 rx_event = adapter->last_rx_timestamp;
710
711         /* Only need to read the high RXSTMP register to clear the lock */
712         if (time_is_before_jiffies(rx_event + 5 * HZ)) {
713                 rd32(E1000_RXSTMPH);
714                 adapter->last_rx_ptp_check = jiffies;
715                 adapter->rx_hwtstamp_cleared++;
716                 dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang\n");
717         }
718 }
719
720 /**
721  * igb_ptp_tx_hwtstamp - utility function which checks for TX time stamp
722  * @adapter: Board private structure.
723  *
724  * If we were asked to do hardware stamping and such a time stamp is
725  * available, then it must have been for this skb here because we only
726  * allow only one such packet into the queue.
727  **/
728 static void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter)
729 {
730         struct sk_buff *skb = adapter->ptp_tx_skb;
731         struct e1000_hw *hw = &adapter->hw;
732         struct skb_shared_hwtstamps shhwtstamps;
733         u64 regval;
734         int adjust = 0;
735
736         regval = rd32(E1000_TXSTMPL);
737         regval |= (u64)rd32(E1000_TXSTMPH) << 32;
738
739         igb_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
740         /* adjust timestamp for the TX latency based on link speed */
741         if (adapter->hw.mac.type == e1000_i210) {
742                 switch (adapter->link_speed) {
743                 case SPEED_10:
744                         adjust = IGB_I210_TX_LATENCY_10;
745                         break;
746                 case SPEED_100:
747                         adjust = IGB_I210_TX_LATENCY_100;
748                         break;
749                 case SPEED_1000:
750                         adjust = IGB_I210_TX_LATENCY_1000;
751                         break;
752                 }
753         }
754
755         shhwtstamps.hwtstamp =
756                 ktime_add_ns(shhwtstamps.hwtstamp, adjust);
757
758         /* Clear the lock early before calling skb_tstamp_tx so that
759          * applications are not woken up before the lock bit is clear. We use
760          * a copy of the skb pointer to ensure other threads can't change it
761          * while we're notifying the stack.
762          */
763         adapter->ptp_tx_skb = NULL;
764         clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
765
766         /* Notify the stack and free the skb after we've unlocked */
767         skb_tstamp_tx(skb, &shhwtstamps);
768         dev_kfree_skb_any(skb);
769 }
770
771 /**
772  * igb_ptp_rx_pktstamp - retrieve Rx per packet timestamp
773  * @q_vector: Pointer to interrupt specific structure
774  * @va: Pointer to address containing Rx buffer
775  * @skb: Buffer containing timestamp and packet
776  *
777  * This function is meant to retrieve a timestamp from the first buffer of an
778  * incoming frame.  The value is stored in little endian format starting on
779  * byte 8.
780  **/
781 void igb_ptp_rx_pktstamp(struct igb_q_vector *q_vector,
782                          unsigned char *va,
783                          struct sk_buff *skb)
784 {
785         __le64 *regval = (__le64 *)va;
786         struct igb_adapter *adapter = q_vector->adapter;
787         int adjust = 0;
788
789         /* The timestamp is recorded in little endian format.
790          * DWORD: 0        1        2        3
791          * Field: Reserved Reserved SYSTIML  SYSTIMH
792          */
793         igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb),
794                                    le64_to_cpu(regval[1]));
795
796         /* adjust timestamp for the RX latency based on link speed */
797         if (adapter->hw.mac.type == e1000_i210) {
798                 switch (adapter->link_speed) {
799                 case SPEED_10:
800                         adjust = IGB_I210_RX_LATENCY_10;
801                         break;
802                 case SPEED_100:
803                         adjust = IGB_I210_RX_LATENCY_100;
804                         break;
805                 case SPEED_1000:
806                         adjust = IGB_I210_RX_LATENCY_1000;
807                         break;
808                 }
809         }
810         skb_hwtstamps(skb)->hwtstamp =
811                 ktime_sub_ns(skb_hwtstamps(skb)->hwtstamp, adjust);
812 }
813
814 /**
815  * igb_ptp_rx_rgtstamp - retrieve Rx timestamp stored in register
816  * @q_vector: Pointer to interrupt specific structure
817  * @skb: Buffer containing timestamp and packet
818  *
819  * This function is meant to retrieve a timestamp from the internal registers
820  * of the adapter and store it in the skb.
821  **/
822 void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,
823                          struct sk_buff *skb)
824 {
825         struct igb_adapter *adapter = q_vector->adapter;
826         struct e1000_hw *hw = &adapter->hw;
827         u64 regval;
828         int adjust = 0;
829
830         /* If this bit is set, then the RX registers contain the time stamp. No
831          * other packet will be time stamped until we read these registers, so
832          * read the registers to make them available again. Because only one
833          * packet can be time stamped at a time, we know that the register
834          * values must belong to this one here and therefore we don't need to
835          * compare any of the additional attributes stored for it.
836          *
837          * If nothing went wrong, then it should have a shared tx_flags that we
838          * can turn into a skb_shared_hwtstamps.
839          */
840         if (!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
841                 return;
842
843         regval = rd32(E1000_RXSTMPL);
844         regval |= (u64)rd32(E1000_RXSTMPH) << 32;
845
846         igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
847
848         /* adjust timestamp for the RX latency based on link speed */
849         if (adapter->hw.mac.type == e1000_i210) {
850                 switch (adapter->link_speed) {
851                 case SPEED_10:
852                         adjust = IGB_I210_RX_LATENCY_10;
853                         break;
854                 case SPEED_100:
855                         adjust = IGB_I210_RX_LATENCY_100;
856                         break;
857                 case SPEED_1000:
858                         adjust = IGB_I210_RX_LATENCY_1000;
859                         break;
860                 }
861         }
862         skb_hwtstamps(skb)->hwtstamp =
863                 ktime_sub_ns(skb_hwtstamps(skb)->hwtstamp, adjust);
864
865         /* Update the last_rx_timestamp timer in order to enable watchdog check
866          * for error case of latched timestamp on a dropped packet.
867          */
868         adapter->last_rx_timestamp = jiffies;
869 }
870
871 /**
872  * igb_ptp_get_ts_config - get hardware time stamping config
873  * @netdev:
874  * @ifreq:
875  *
876  * Get the hwtstamp_config settings to return to the user. Rather than attempt
877  * to deconstruct the settings from the registers, just return a shadow copy
878  * of the last known settings.
879  **/
880 int igb_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr)
881 {
882         struct igb_adapter *adapter = netdev_priv(netdev);
883         struct hwtstamp_config *config = &adapter->tstamp_config;
884
885         return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
886                 -EFAULT : 0;
887 }
888
889 /**
890  * igb_ptp_set_timestamp_mode - setup hardware for timestamping
891  * @adapter: networking device structure
892  * @config: hwtstamp configuration
893  *
894  * Outgoing time stamping can be enabled and disabled. Play nice and
895  * disable it when requested, although it shouldn't case any overhead
896  * when no packet needs it. At most one packet in the queue may be
897  * marked for time stamping, otherwise it would be impossible to tell
898  * for sure to which packet the hardware time stamp belongs.
899  *
900  * Incoming time stamping has to be configured via the hardware
901  * filters. Not all combinations are supported, in particular event
902  * type has to be specified. Matching the kind of event packet is
903  * not supported, with the exception of "all V2 events regardless of
904  * level 2 or 4".
905  */
906 static int igb_ptp_set_timestamp_mode(struct igb_adapter *adapter,
907                                       struct hwtstamp_config *config)
908 {
909         struct e1000_hw *hw = &adapter->hw;
910         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
911         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
912         u32 tsync_rx_cfg = 0;
913         bool is_l4 = false;
914         bool is_l2 = false;
915         u32 regval;
916
917         /* reserved for future extensions */
918         if (config->flags)
919                 return -EINVAL;
920
921         switch (config->tx_type) {
922         case HWTSTAMP_TX_OFF:
923                 tsync_tx_ctl = 0;
924         case HWTSTAMP_TX_ON:
925                 break;
926         default:
927                 return -ERANGE;
928         }
929
930         switch (config->rx_filter) {
931         case HWTSTAMP_FILTER_NONE:
932                 tsync_rx_ctl = 0;
933                 break;
934         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
935                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
936                 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
937                 is_l4 = true;
938                 break;
939         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
940                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
941                 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
942                 is_l4 = true;
943                 break;
944         case HWTSTAMP_FILTER_PTP_V2_EVENT:
945         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
946         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
947         case HWTSTAMP_FILTER_PTP_V2_SYNC:
948         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
949         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
950         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
951         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
952         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
953                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
954                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
955                 is_l2 = true;
956                 is_l4 = true;
957                 break;
958         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
959         case HWTSTAMP_FILTER_ALL:
960                 /* 82576 cannot timestamp all packets, which it needs to do to
961                  * support both V1 Sync and Delay_Req messages
962                  */
963                 if (hw->mac.type != e1000_82576) {
964                         tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
965                         config->rx_filter = HWTSTAMP_FILTER_ALL;
966                         break;
967                 }
968                 /* fall through */
969         default:
970                 config->rx_filter = HWTSTAMP_FILTER_NONE;
971                 return -ERANGE;
972         }
973
974         if (hw->mac.type == e1000_82575) {
975                 if (tsync_rx_ctl | tsync_tx_ctl)
976                         return -EINVAL;
977                 return 0;
978         }
979
980         /* Per-packet timestamping only works if all packets are
981          * timestamped, so enable timestamping in all packets as
982          * long as one Rx filter was configured.
983          */
984         if ((hw->mac.type >= e1000_82580) && tsync_rx_ctl) {
985                 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
986                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
987                 config->rx_filter = HWTSTAMP_FILTER_ALL;
988                 is_l2 = true;
989                 is_l4 = true;
990
991                 if ((hw->mac.type == e1000_i210) ||
992                     (hw->mac.type == e1000_i211)) {
993                         regval = rd32(E1000_RXPBS);
994                         regval |= E1000_RXPBS_CFG_TS_EN;
995                         wr32(E1000_RXPBS, regval);
996                 }
997         }
998
999         /* enable/disable TX */
1000         regval = rd32(E1000_TSYNCTXCTL);
1001         regval &= ~E1000_TSYNCTXCTL_ENABLED;
1002         regval |= tsync_tx_ctl;
1003         wr32(E1000_TSYNCTXCTL, regval);
1004
1005         /* enable/disable RX */
1006         regval = rd32(E1000_TSYNCRXCTL);
1007         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
1008         regval |= tsync_rx_ctl;
1009         wr32(E1000_TSYNCRXCTL, regval);
1010
1011         /* define which PTP packets are time stamped */
1012         wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
1013
1014         /* define ethertype filter for timestamped packets */
1015         if (is_l2)
1016                 wr32(E1000_ETQF(IGB_ETQF_FILTER_1588),
1017                      (E1000_ETQF_FILTER_ENABLE | /* enable filter */
1018                       E1000_ETQF_1588 | /* enable timestamping */
1019                       ETH_P_1588));     /* 1588 eth protocol type */
1020         else
1021                 wr32(E1000_ETQF(IGB_ETQF_FILTER_1588), 0);
1022
1023         /* L4 Queue Filter[3]: filter by destination port and protocol */
1024         if (is_l4) {
1025                 u32 ftqf = (IPPROTO_UDP /* UDP */
1026                         | E1000_FTQF_VF_BP /* VF not compared */
1027                         | E1000_FTQF_1588_TIME_STAMP /* Enable Timestamping */
1028                         | E1000_FTQF_MASK); /* mask all inputs */
1029                 ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
1030
1031                 wr32(E1000_IMIR(3), htons(PTP_EV_PORT));
1032                 wr32(E1000_IMIREXT(3),
1033                      (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
1034                 if (hw->mac.type == e1000_82576) {
1035                         /* enable source port check */
1036                         wr32(E1000_SPQF(3), htons(PTP_EV_PORT));
1037                         ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
1038                 }
1039                 wr32(E1000_FTQF(3), ftqf);
1040         } else {
1041                 wr32(E1000_FTQF(3), E1000_FTQF_MASK);
1042         }
1043         wrfl();
1044
1045         /* clear TX/RX time stamp registers, just to be sure */
1046         regval = rd32(E1000_TXSTMPL);
1047         regval = rd32(E1000_TXSTMPH);
1048         regval = rd32(E1000_RXSTMPL);
1049         regval = rd32(E1000_RXSTMPH);
1050
1051         return 0;
1052 }
1053
1054 /**
1055  * igb_ptp_set_ts_config - set hardware time stamping config
1056  * @netdev:
1057  * @ifreq:
1058  *
1059  **/
1060 int igb_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr)
1061 {
1062         struct igb_adapter *adapter = netdev_priv(netdev);
1063         struct hwtstamp_config config;
1064         int err;
1065
1066         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
1067                 return -EFAULT;
1068
1069         err = igb_ptp_set_timestamp_mode(adapter, &config);
1070         if (err)
1071                 return err;
1072
1073         /* save these settings for future reference */
1074         memcpy(&adapter->tstamp_config, &config,
1075                sizeof(adapter->tstamp_config));
1076
1077         return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
1078                 -EFAULT : 0;
1079 }
1080
1081 /**
1082  * igb_ptp_init - Initialize PTP functionality
1083  * @adapter: Board private structure
1084  *
1085  * This function is called at device probe to initialize the PTP
1086  * functionality.
1087  */
1088 void igb_ptp_init(struct igb_adapter *adapter)
1089 {
1090         struct e1000_hw *hw = &adapter->hw;
1091         struct net_device *netdev = adapter->netdev;
1092         int i;
1093
1094         switch (hw->mac.type) {
1095         case e1000_82576:
1096                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
1097                 adapter->ptp_caps.owner = THIS_MODULE;
1098                 adapter->ptp_caps.max_adj = 999999881;
1099                 adapter->ptp_caps.n_ext_ts = 0;
1100                 adapter->ptp_caps.pps = 0;
1101                 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82576;
1102                 adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
1103                 adapter->ptp_caps.gettime64 = igb_ptp_gettime_82576;
1104                 adapter->ptp_caps.settime64 = igb_ptp_settime_82576;
1105                 adapter->ptp_caps.enable = igb_ptp_feature_enable;
1106                 adapter->cc.read = igb_ptp_read_82576;
1107                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
1108                 adapter->cc.mult = 1;
1109                 adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
1110                 adapter->ptp_flags |= IGB_PTP_OVERFLOW_CHECK;
1111                 break;
1112         case e1000_82580:
1113         case e1000_i354:
1114         case e1000_i350:
1115                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
1116                 adapter->ptp_caps.owner = THIS_MODULE;
1117                 adapter->ptp_caps.max_adj = 62499999;
1118                 adapter->ptp_caps.n_ext_ts = 0;
1119                 adapter->ptp_caps.pps = 0;
1120                 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
1121                 adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
1122                 adapter->ptp_caps.gettime64 = igb_ptp_gettime_82576;
1123                 adapter->ptp_caps.settime64 = igb_ptp_settime_82576;
1124                 adapter->ptp_caps.enable = igb_ptp_feature_enable;
1125                 adapter->cc.read = igb_ptp_read_82580;
1126                 adapter->cc.mask = CYCLECOUNTER_MASK(IGB_NBITS_82580);
1127                 adapter->cc.mult = 1;
1128                 adapter->cc.shift = 0;
1129                 adapter->ptp_flags |= IGB_PTP_OVERFLOW_CHECK;
1130                 break;
1131         case e1000_i210:
1132         case e1000_i211:
1133                 for (i = 0; i < IGB_N_SDP; i++) {
1134                         struct ptp_pin_desc *ppd = &adapter->sdp_config[i];
1135
1136                         snprintf(ppd->name, sizeof(ppd->name), "SDP%d", i);
1137                         ppd->index = i;
1138                         ppd->func = PTP_PF_NONE;
1139                 }
1140                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
1141                 adapter->ptp_caps.owner = THIS_MODULE;
1142                 adapter->ptp_caps.max_adj = 62499999;
1143                 adapter->ptp_caps.n_ext_ts = IGB_N_EXTTS;
1144                 adapter->ptp_caps.n_per_out = IGB_N_PEROUT;
1145                 adapter->ptp_caps.n_pins = IGB_N_SDP;
1146                 adapter->ptp_caps.pps = 1;
1147                 adapter->ptp_caps.pin_config = adapter->sdp_config;
1148                 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
1149                 adapter->ptp_caps.adjtime = igb_ptp_adjtime_i210;
1150                 adapter->ptp_caps.gettime64 = igb_ptp_gettime_i210;
1151                 adapter->ptp_caps.settime64 = igb_ptp_settime_i210;
1152                 adapter->ptp_caps.enable = igb_ptp_feature_enable_i210;
1153                 adapter->ptp_caps.verify = igb_ptp_verify_pin;
1154                 break;
1155         default:
1156                 adapter->ptp_clock = NULL;
1157                 return;
1158         }
1159
1160         spin_lock_init(&adapter->tmreg_lock);
1161         INIT_WORK(&adapter->ptp_tx_work, igb_ptp_tx_work);
1162
1163         if (adapter->ptp_flags & IGB_PTP_OVERFLOW_CHECK)
1164                 INIT_DELAYED_WORK(&adapter->ptp_overflow_work,
1165                                   igb_ptp_overflow_check);
1166
1167         adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
1168         adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
1169
1170         igb_ptp_reset(adapter);
1171
1172         adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
1173                                                 &adapter->pdev->dev);
1174         if (IS_ERR(adapter->ptp_clock)) {
1175                 adapter->ptp_clock = NULL;
1176                 dev_err(&adapter->pdev->dev, "ptp_clock_register failed\n");
1177         } else if (adapter->ptp_clock) {
1178                 dev_info(&adapter->pdev->dev, "added PHC on %s\n",
1179                          adapter->netdev->name);
1180                 adapter->ptp_flags |= IGB_PTP_ENABLED;
1181         }
1182 }
1183
1184 /**
1185  * igb_ptp_suspend - Disable PTP work items and prepare for suspend
1186  * @adapter: Board private structure
1187  *
1188  * This function stops the overflow check work and PTP Tx timestamp work, and
1189  * will prepare the device for OS suspend.
1190  */
1191 void igb_ptp_suspend(struct igb_adapter *adapter)
1192 {
1193         if (!(adapter->ptp_flags & IGB_PTP_ENABLED))
1194                 return;
1195
1196         if (adapter->ptp_flags & IGB_PTP_OVERFLOW_CHECK)
1197                 cancel_delayed_work_sync(&adapter->ptp_overflow_work);
1198
1199         cancel_work_sync(&adapter->ptp_tx_work);
1200         if (adapter->ptp_tx_skb) {
1201                 dev_kfree_skb_any(adapter->ptp_tx_skb);
1202                 adapter->ptp_tx_skb = NULL;
1203                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
1204         }
1205 }
1206
1207 /**
1208  * igb_ptp_stop - Disable PTP device and stop the overflow check.
1209  * @adapter: Board private structure.
1210  *
1211  * This function stops the PTP support and cancels the delayed work.
1212  **/
1213 void igb_ptp_stop(struct igb_adapter *adapter)
1214 {
1215         igb_ptp_suspend(adapter);
1216
1217         if (adapter->ptp_clock) {
1218                 ptp_clock_unregister(adapter->ptp_clock);
1219                 dev_info(&adapter->pdev->dev, "removed PHC on %s\n",
1220                          adapter->netdev->name);
1221                 adapter->ptp_flags &= ~IGB_PTP_ENABLED;
1222         }
1223 }
1224
1225 /**
1226  * igb_ptp_reset - Re-enable the adapter for PTP following a reset.
1227  * @adapter: Board private structure.
1228  *
1229  * This function handles the reset work required to re-enable the PTP device.
1230  **/
1231 void igb_ptp_reset(struct igb_adapter *adapter)
1232 {
1233         struct e1000_hw *hw = &adapter->hw;
1234         unsigned long flags;
1235
1236         /* reset the tstamp_config */
1237         igb_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config);
1238
1239         spin_lock_irqsave(&adapter->tmreg_lock, flags);
1240
1241         switch (adapter->hw.mac.type) {
1242         case e1000_82576:
1243                 /* Dial the nominal frequency. */
1244                 wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
1245                 break;
1246         case e1000_82580:
1247         case e1000_i354:
1248         case e1000_i350:
1249         case e1000_i210:
1250         case e1000_i211:
1251                 wr32(E1000_TSAUXC, 0x0);
1252                 wr32(E1000_TSSDP, 0x0);
1253                 wr32(E1000_TSIM,
1254                      TSYNC_INTERRUPTS |
1255                      (adapter->pps_sys_wrap_on ? TSINTR_SYS_WRAP : 0));
1256                 wr32(E1000_IMS, E1000_IMS_TS);
1257                 break;
1258         default:
1259                 /* No work to do. */
1260                 goto out;
1261         }
1262
1263         /* Re-initialize the timer. */
1264         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
1265                 struct timespec64 ts = ktime_to_timespec64(ktime_get_real());
1266
1267                 igb_ptp_write_i210(adapter, &ts);
1268         } else {
1269                 timecounter_init(&adapter->tc, &adapter->cc,
1270                                  ktime_to_ns(ktime_get_real()));
1271         }
1272 out:
1273         spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
1274
1275         wrfl();
1276
1277         if (adapter->ptp_flags & IGB_PTP_OVERFLOW_CHECK)
1278                 schedule_delayed_work(&adapter->ptp_overflow_work,
1279                                       IGB_SYSTIM_OVERFLOW_PERIOD);
1280 }