1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
6 #include <linux/module.h>
7 #include <linux/types.h>
8 #include <linux/init.h>
9 #include <linux/bitops.h>
10 #include <linux/vmalloc.h>
11 #include <linux/pagemap.h>
12 #include <linux/netdevice.h>
13 #include <linux/ipv6.h>
14 #include <linux/slab.h>
15 #include <net/checksum.h>
16 #include <net/ip6_checksum.h>
17 #include <net/pkt_sched.h>
18 #include <net/pkt_cls.h>
19 #include <linux/net_tstamp.h>
20 #include <linux/mii.h>
21 #include <linux/ethtool.h>
23 #include <linux/if_vlan.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <linux/interrupt.h>
28 #include <linux/tcp.h>
29 #include <linux/sctp.h>
30 #include <linux/if_ether.h>
31 #include <linux/aer.h>
32 #include <linux/prefetch.h>
33 #include <linux/bpf.h>
34 #include <linux/bpf_trace.h>
35 #include <linux/pm_runtime.h>
36 #include <linux/etherdevice.h>
38 #include <linux/dca.h>
40 #include <linux/i2c.h>
44 QUEUE_MODE_STRICT_PRIORITY,
45 QUEUE_MODE_STREAM_RESERVATION,
53 char igb_driver_name[] = "igb";
54 static const char igb_driver_string[] =
55 "Intel(R) Gigabit Ethernet Network Driver";
56 static const char igb_copyright[] =
57 "Copyright (c) 2007-2014 Intel Corporation.";
59 static const struct e1000_info *igb_info_tbl[] = {
60 [board_82575] = &e1000_82575_info,
63 static const struct pci_device_id igb_pci_tbl[] = {
64 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
65 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
66 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
67 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
68 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
69 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
70 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
71 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
72 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
73 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
74 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
75 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
76 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
77 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
78 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
79 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
80 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
81 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
82 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
83 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
84 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
85 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
86 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
87 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
88 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
89 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
90 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
91 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
92 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
94 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
95 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
96 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
97 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
99 /* required last entry */
103 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
105 static int igb_setup_all_tx_resources(struct igb_adapter *);
106 static int igb_setup_all_rx_resources(struct igb_adapter *);
107 static void igb_free_all_tx_resources(struct igb_adapter *);
108 static void igb_free_all_rx_resources(struct igb_adapter *);
109 static void igb_setup_mrqc(struct igb_adapter *);
110 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
111 static void igb_remove(struct pci_dev *pdev);
112 static int igb_sw_init(struct igb_adapter *);
113 int igb_open(struct net_device *);
114 int igb_close(struct net_device *);
115 static void igb_configure(struct igb_adapter *);
116 static void igb_configure_tx(struct igb_adapter *);
117 static void igb_configure_rx(struct igb_adapter *);
118 static void igb_clean_all_tx_rings(struct igb_adapter *);
119 static void igb_clean_all_rx_rings(struct igb_adapter *);
120 static void igb_clean_tx_ring(struct igb_ring *);
121 static void igb_clean_rx_ring(struct igb_ring *);
122 static void igb_set_rx_mode(struct net_device *);
123 static void igb_update_phy_info(struct timer_list *);
124 static void igb_watchdog(struct timer_list *);
125 static void igb_watchdog_task(struct work_struct *);
126 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
127 static void igb_get_stats64(struct net_device *dev,
128 struct rtnl_link_stats64 *stats);
129 static int igb_change_mtu(struct net_device *, int);
130 static int igb_set_mac(struct net_device *, void *);
131 static void igb_set_uta(struct igb_adapter *adapter, bool set);
132 static irqreturn_t igb_intr(int irq, void *);
133 static irqreturn_t igb_intr_msi(int irq, void *);
134 static irqreturn_t igb_msix_other(int irq, void *);
135 static irqreturn_t igb_msix_ring(int irq, void *);
136 #ifdef CONFIG_IGB_DCA
137 static void igb_update_dca(struct igb_q_vector *);
138 static void igb_setup_dca(struct igb_adapter *);
139 #endif /* CONFIG_IGB_DCA */
140 static int igb_poll(struct napi_struct *, int);
141 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
142 static int igb_clean_rx_irq(struct igb_q_vector *, int);
143 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
144 static void igb_tx_timeout(struct net_device *, unsigned int txqueue);
145 static void igb_reset_task(struct work_struct *);
146 static void igb_vlan_mode(struct net_device *netdev,
147 netdev_features_t features);
148 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
149 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
150 static void igb_restore_vlan(struct igb_adapter *);
151 static void igb_rar_set_index(struct igb_adapter *, u32);
152 static void igb_ping_all_vfs(struct igb_adapter *);
153 static void igb_msg_task(struct igb_adapter *);
154 static void igb_vmm_control(struct igb_adapter *);
155 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
156 static void igb_flush_mac_table(struct igb_adapter *);
157 static int igb_available_rars(struct igb_adapter *, u8);
158 static void igb_set_default_mac_filter(struct igb_adapter *);
159 static int igb_uc_sync(struct net_device *, const unsigned char *);
160 static int igb_uc_unsync(struct net_device *, const unsigned char *);
161 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
162 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
163 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
164 int vf, u16 vlan, u8 qos, __be16 vlan_proto);
165 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
166 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
168 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf,
170 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
171 struct ifla_vf_info *ivi);
172 static void igb_check_vf_rate_limit(struct igb_adapter *);
173 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
174 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
176 #ifdef CONFIG_PCI_IOV
177 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
178 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
179 static int igb_disable_sriov(struct pci_dev *dev);
180 static int igb_pci_disable_sriov(struct pci_dev *dev);
183 static int igb_suspend(struct device *);
184 static int igb_resume(struct device *);
185 static int igb_runtime_suspend(struct device *dev);
186 static int igb_runtime_resume(struct device *dev);
187 static int igb_runtime_idle(struct device *dev);
188 static const struct dev_pm_ops igb_pm_ops = {
189 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
190 SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
193 static void igb_shutdown(struct pci_dev *);
194 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
195 #ifdef CONFIG_IGB_DCA
196 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
197 static struct notifier_block dca_notifier = {
198 .notifier_call = igb_notify_dca,
203 #ifdef CONFIG_PCI_IOV
204 static unsigned int max_vfs;
205 module_param(max_vfs, uint, 0);
206 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
207 #endif /* CONFIG_PCI_IOV */
209 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
210 pci_channel_state_t);
211 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
212 static void igb_io_resume(struct pci_dev *);
214 static const struct pci_error_handlers igb_err_handler = {
215 .error_detected = igb_io_error_detected,
216 .slot_reset = igb_io_slot_reset,
217 .resume = igb_io_resume,
220 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
222 static struct pci_driver igb_driver = {
223 .name = igb_driver_name,
224 .id_table = igb_pci_tbl,
226 .remove = igb_remove,
228 .driver.pm = &igb_pm_ops,
230 .shutdown = igb_shutdown,
231 .sriov_configure = igb_pci_sriov_configure,
232 .err_handler = &igb_err_handler
235 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
236 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
237 MODULE_LICENSE("GPL v2");
239 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
240 static int debug = -1;
241 module_param(debug, int, 0);
242 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
244 struct igb_reg_info {
249 static const struct igb_reg_info igb_reg_info_tbl[] = {
251 /* General Registers */
252 {E1000_CTRL, "CTRL"},
253 {E1000_STATUS, "STATUS"},
254 {E1000_CTRL_EXT, "CTRL_EXT"},
256 /* Interrupt Registers */
260 {E1000_RCTL, "RCTL"},
261 {E1000_RDLEN(0), "RDLEN"},
262 {E1000_RDH(0), "RDH"},
263 {E1000_RDT(0), "RDT"},
264 {E1000_RXDCTL(0), "RXDCTL"},
265 {E1000_RDBAL(0), "RDBAL"},
266 {E1000_RDBAH(0), "RDBAH"},
269 {E1000_TCTL, "TCTL"},
270 {E1000_TDBAL(0), "TDBAL"},
271 {E1000_TDBAH(0), "TDBAH"},
272 {E1000_TDLEN(0), "TDLEN"},
273 {E1000_TDH(0), "TDH"},
274 {E1000_TDT(0), "TDT"},
275 {E1000_TXDCTL(0), "TXDCTL"},
276 {E1000_TDFH, "TDFH"},
277 {E1000_TDFT, "TDFT"},
278 {E1000_TDFHS, "TDFHS"},
279 {E1000_TDFPC, "TDFPC"},
281 /* List Terminator */
285 /* igb_regdump - register printout routine */
286 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
292 switch (reginfo->ofs) {
294 for (n = 0; n < 4; n++)
295 regs[n] = rd32(E1000_RDLEN(n));
298 for (n = 0; n < 4; n++)
299 regs[n] = rd32(E1000_RDH(n));
302 for (n = 0; n < 4; n++)
303 regs[n] = rd32(E1000_RDT(n));
305 case E1000_RXDCTL(0):
306 for (n = 0; n < 4; n++)
307 regs[n] = rd32(E1000_RXDCTL(n));
310 for (n = 0; n < 4; n++)
311 regs[n] = rd32(E1000_RDBAL(n));
314 for (n = 0; n < 4; n++)
315 regs[n] = rd32(E1000_RDBAH(n));
318 for (n = 0; n < 4; n++)
319 regs[n] = rd32(E1000_RDBAL(n));
322 for (n = 0; n < 4; n++)
323 regs[n] = rd32(E1000_TDBAH(n));
326 for (n = 0; n < 4; n++)
327 regs[n] = rd32(E1000_TDLEN(n));
330 for (n = 0; n < 4; n++)
331 regs[n] = rd32(E1000_TDH(n));
334 for (n = 0; n < 4; n++)
335 regs[n] = rd32(E1000_TDT(n));
337 case E1000_TXDCTL(0):
338 for (n = 0; n < 4; n++)
339 regs[n] = rd32(E1000_TXDCTL(n));
342 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
346 snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
347 pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
351 /* igb_dump - Print registers, Tx-rings and Rx-rings */
352 static void igb_dump(struct igb_adapter *adapter)
354 struct net_device *netdev = adapter->netdev;
355 struct e1000_hw *hw = &adapter->hw;
356 struct igb_reg_info *reginfo;
357 struct igb_ring *tx_ring;
358 union e1000_adv_tx_desc *tx_desc;
359 struct my_u0 { u64 a; u64 b; } *u0;
360 struct igb_ring *rx_ring;
361 union e1000_adv_rx_desc *rx_desc;
365 if (!netif_msg_hw(adapter))
368 /* Print netdevice Info */
370 dev_info(&adapter->pdev->dev, "Net device Info\n");
371 pr_info("Device Name state trans_start\n");
372 pr_info("%-15s %016lX %016lX\n", netdev->name,
373 netdev->state, dev_trans_start(netdev));
376 /* Print Registers */
377 dev_info(&adapter->pdev->dev, "Register Dump\n");
378 pr_info(" Register Name Value\n");
379 for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
380 reginfo->name; reginfo++) {
381 igb_regdump(hw, reginfo);
384 /* Print TX Ring Summary */
385 if (!netdev || !netif_running(netdev))
388 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
389 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
390 for (n = 0; n < adapter->num_tx_queues; n++) {
391 struct igb_tx_buffer *buffer_info;
392 tx_ring = adapter->tx_ring[n];
393 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
394 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
395 n, tx_ring->next_to_use, tx_ring->next_to_clean,
396 (u64)dma_unmap_addr(buffer_info, dma),
397 dma_unmap_len(buffer_info, len),
398 buffer_info->next_to_watch,
399 (u64)buffer_info->time_stamp);
403 if (!netif_msg_tx_done(adapter))
404 goto rx_ring_summary;
406 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
408 /* Transmit Descriptor Formats
410 * Advanced Transmit Descriptor
411 * +--------------------------------------------------------------+
412 * 0 | Buffer Address [63:0] |
413 * +--------------------------------------------------------------+
414 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
415 * +--------------------------------------------------------------+
416 * 63 46 45 40 39 38 36 35 32 31 24 15 0
419 for (n = 0; n < adapter->num_tx_queues; n++) {
420 tx_ring = adapter->tx_ring[n];
421 pr_info("------------------------------------\n");
422 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
423 pr_info("------------------------------------\n");
424 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] [bi->dma ] leng ntw timestamp bi->skb\n");
426 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
427 const char *next_desc;
428 struct igb_tx_buffer *buffer_info;
429 tx_desc = IGB_TX_DESC(tx_ring, i);
430 buffer_info = &tx_ring->tx_buffer_info[i];
431 u0 = (struct my_u0 *)tx_desc;
432 if (i == tx_ring->next_to_use &&
433 i == tx_ring->next_to_clean)
434 next_desc = " NTC/U";
435 else if (i == tx_ring->next_to_use)
437 else if (i == tx_ring->next_to_clean)
442 pr_info("T [0x%03X] %016llX %016llX %016llX %04X %p %016llX %p%s\n",
443 i, le64_to_cpu(u0->a),
445 (u64)dma_unmap_addr(buffer_info, dma),
446 dma_unmap_len(buffer_info, len),
447 buffer_info->next_to_watch,
448 (u64)buffer_info->time_stamp,
449 buffer_info->skb, next_desc);
451 if (netif_msg_pktdata(adapter) && buffer_info->skb)
452 print_hex_dump(KERN_INFO, "",
454 16, 1, buffer_info->skb->data,
455 dma_unmap_len(buffer_info, len),
460 /* Print RX Rings Summary */
462 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
463 pr_info("Queue [NTU] [NTC]\n");
464 for (n = 0; n < adapter->num_rx_queues; n++) {
465 rx_ring = adapter->rx_ring[n];
466 pr_info(" %5d %5X %5X\n",
467 n, rx_ring->next_to_use, rx_ring->next_to_clean);
471 if (!netif_msg_rx_status(adapter))
474 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
476 /* Advanced Receive Descriptor (Read) Format
478 * +-----------------------------------------------------+
479 * 0 | Packet Buffer Address [63:1] |A0/NSE|
480 * +----------------------------------------------+------+
481 * 8 | Header Buffer Address [63:1] | DD |
482 * +-----------------------------------------------------+
485 * Advanced Receive Descriptor (Write-Back) Format
487 * 63 48 47 32 31 30 21 20 17 16 4 3 0
488 * +------------------------------------------------------+
489 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
490 * | Checksum Ident | | | | Type | Type |
491 * +------------------------------------------------------+
492 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
493 * +------------------------------------------------------+
494 * 63 48 47 32 31 20 19 0
497 for (n = 0; n < adapter->num_rx_queues; n++) {
498 rx_ring = adapter->rx_ring[n];
499 pr_info("------------------------------------\n");
500 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
501 pr_info("------------------------------------\n");
502 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] [bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
503 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
505 for (i = 0; i < rx_ring->count; i++) {
506 const char *next_desc;
507 struct igb_rx_buffer *buffer_info;
508 buffer_info = &rx_ring->rx_buffer_info[i];
509 rx_desc = IGB_RX_DESC(rx_ring, i);
510 u0 = (struct my_u0 *)rx_desc;
511 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
513 if (i == rx_ring->next_to_use)
515 else if (i == rx_ring->next_to_clean)
520 if (staterr & E1000_RXD_STAT_DD) {
521 /* Descriptor Done */
522 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
528 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
532 (u64)buffer_info->dma,
535 if (netif_msg_pktdata(adapter) &&
536 buffer_info->dma && buffer_info->page) {
537 print_hex_dump(KERN_INFO, "",
540 page_address(buffer_info->page) +
541 buffer_info->page_offset,
542 igb_rx_bufsz(rx_ring), true);
553 * igb_get_i2c_data - Reads the I2C SDA data bit
554 * @data: opaque pointer to adapter struct
556 * Returns the I2C data bit value
558 static int igb_get_i2c_data(void *data)
560 struct igb_adapter *adapter = (struct igb_adapter *)data;
561 struct e1000_hw *hw = &adapter->hw;
562 s32 i2cctl = rd32(E1000_I2CPARAMS);
564 return !!(i2cctl & E1000_I2C_DATA_IN);
568 * igb_set_i2c_data - Sets the I2C data bit
569 * @data: pointer to hardware structure
570 * @state: I2C data value (0 or 1) to set
572 * Sets the I2C data bit
574 static void igb_set_i2c_data(void *data, int state)
576 struct igb_adapter *adapter = (struct igb_adapter *)data;
577 struct e1000_hw *hw = &adapter->hw;
578 s32 i2cctl = rd32(E1000_I2CPARAMS);
581 i2cctl |= E1000_I2C_DATA_OUT;
583 i2cctl &= ~E1000_I2C_DATA_OUT;
585 i2cctl &= ~E1000_I2C_DATA_OE_N;
586 i2cctl |= E1000_I2C_CLK_OE_N;
587 wr32(E1000_I2CPARAMS, i2cctl);
593 * igb_set_i2c_clk - Sets the I2C SCL clock
594 * @data: pointer to hardware structure
595 * @state: state to set clock
597 * Sets the I2C clock line to state
599 static void igb_set_i2c_clk(void *data, int state)
601 struct igb_adapter *adapter = (struct igb_adapter *)data;
602 struct e1000_hw *hw = &adapter->hw;
603 s32 i2cctl = rd32(E1000_I2CPARAMS);
606 i2cctl |= E1000_I2C_CLK_OUT;
607 i2cctl &= ~E1000_I2C_CLK_OE_N;
609 i2cctl &= ~E1000_I2C_CLK_OUT;
610 i2cctl &= ~E1000_I2C_CLK_OE_N;
612 wr32(E1000_I2CPARAMS, i2cctl);
617 * igb_get_i2c_clk - Gets the I2C SCL clock state
618 * @data: pointer to hardware structure
620 * Gets the I2C clock state
622 static int igb_get_i2c_clk(void *data)
624 struct igb_adapter *adapter = (struct igb_adapter *)data;
625 struct e1000_hw *hw = &adapter->hw;
626 s32 i2cctl = rd32(E1000_I2CPARAMS);
628 return !!(i2cctl & E1000_I2C_CLK_IN);
631 static const struct i2c_algo_bit_data igb_i2c_algo = {
632 .setsda = igb_set_i2c_data,
633 .setscl = igb_set_i2c_clk,
634 .getsda = igb_get_i2c_data,
635 .getscl = igb_get_i2c_clk,
641 * igb_get_hw_dev - return device
642 * @hw: pointer to hardware structure
644 * used by hardware layer to print debugging information
646 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
648 struct igb_adapter *adapter = hw->back;
649 return adapter->netdev;
653 * igb_init_module - Driver Registration Routine
655 * igb_init_module is the first routine called when the driver is
656 * loaded. All it does is register with the PCI subsystem.
658 static int __init igb_init_module(void)
662 pr_info("%s\n", igb_driver_string);
663 pr_info("%s\n", igb_copyright);
665 #ifdef CONFIG_IGB_DCA
666 dca_register_notify(&dca_notifier);
668 ret = pci_register_driver(&igb_driver);
672 module_init(igb_init_module);
675 * igb_exit_module - Driver Exit Cleanup Routine
677 * igb_exit_module is called just before the driver is removed
680 static void __exit igb_exit_module(void)
682 #ifdef CONFIG_IGB_DCA
683 dca_unregister_notify(&dca_notifier);
685 pci_unregister_driver(&igb_driver);
688 module_exit(igb_exit_module);
690 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
692 * igb_cache_ring_register - Descriptor ring to register mapping
693 * @adapter: board private structure to initialize
695 * Once we know the feature-set enabled for the device, we'll cache
696 * the register offset the descriptor ring is assigned to.
698 static void igb_cache_ring_register(struct igb_adapter *adapter)
701 u32 rbase_offset = adapter->vfs_allocated_count;
703 switch (adapter->hw.mac.type) {
705 /* The queues are allocated for virtualization such that VF 0
706 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
707 * In order to avoid collision we start at the first free queue
708 * and continue consuming queues in the same sequence
710 if (adapter->vfs_allocated_count) {
711 for (; i < adapter->rss_queues; i++)
712 adapter->rx_ring[i]->reg_idx = rbase_offset +
723 for (; i < adapter->num_rx_queues; i++)
724 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
725 for (; j < adapter->num_tx_queues; j++)
726 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
731 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
733 struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
734 u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
737 if (E1000_REMOVED(hw_addr))
740 value = readl(&hw_addr[reg]);
742 /* reads should not return all F's */
743 if (!(~value) && (!reg || !(~readl(hw_addr)))) {
744 struct net_device *netdev = igb->netdev;
746 netdev_err(netdev, "PCIe link lost\n");
747 WARN(pci_device_is_present(igb->pdev),
748 "igb: Failed to read reg 0x%x!\n", reg);
755 * igb_write_ivar - configure ivar for given MSI-X vector
756 * @hw: pointer to the HW structure
757 * @msix_vector: vector number we are allocating to a given ring
758 * @index: row index of IVAR register to write within IVAR table
759 * @offset: column offset of in IVAR, should be multiple of 8
761 * This function is intended to handle the writing of the IVAR register
762 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
763 * each containing an cause allocation for an Rx and Tx ring, and a
764 * variable number of rows depending on the number of queues supported.
766 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
767 int index, int offset)
769 u32 ivar = array_rd32(E1000_IVAR0, index);
771 /* clear any bits that are currently set */
772 ivar &= ~((u32)0xFF << offset);
774 /* write vector and valid bit */
775 ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
777 array_wr32(E1000_IVAR0, index, ivar);
780 #define IGB_N0_QUEUE -1
781 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
783 struct igb_adapter *adapter = q_vector->adapter;
784 struct e1000_hw *hw = &adapter->hw;
785 int rx_queue = IGB_N0_QUEUE;
786 int tx_queue = IGB_N0_QUEUE;
789 if (q_vector->rx.ring)
790 rx_queue = q_vector->rx.ring->reg_idx;
791 if (q_vector->tx.ring)
792 tx_queue = q_vector->tx.ring->reg_idx;
794 switch (hw->mac.type) {
796 /* The 82575 assigns vectors using a bitmask, which matches the
797 * bitmask for the EICR/EIMS/EIMC registers. To assign one
798 * or more queues to a vector, we write the appropriate bits
799 * into the MSIXBM register for that vector.
801 if (rx_queue > IGB_N0_QUEUE)
802 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
803 if (tx_queue > IGB_N0_QUEUE)
804 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
805 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
806 msixbm |= E1000_EIMS_OTHER;
807 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
808 q_vector->eims_value = msixbm;
811 /* 82576 uses a table that essentially consists of 2 columns
812 * with 8 rows. The ordering is column-major so we use the
813 * lower 3 bits as the row index, and the 4th bit as the
816 if (rx_queue > IGB_N0_QUEUE)
817 igb_write_ivar(hw, msix_vector,
819 (rx_queue & 0x8) << 1);
820 if (tx_queue > IGB_N0_QUEUE)
821 igb_write_ivar(hw, msix_vector,
823 ((tx_queue & 0x8) << 1) + 8);
824 q_vector->eims_value = BIT(msix_vector);
831 /* On 82580 and newer adapters the scheme is similar to 82576
832 * however instead of ordering column-major we have things
833 * ordered row-major. So we traverse the table by using
834 * bit 0 as the column offset, and the remaining bits as the
837 if (rx_queue > IGB_N0_QUEUE)
838 igb_write_ivar(hw, msix_vector,
840 (rx_queue & 0x1) << 4);
841 if (tx_queue > IGB_N0_QUEUE)
842 igb_write_ivar(hw, msix_vector,
844 ((tx_queue & 0x1) << 4) + 8);
845 q_vector->eims_value = BIT(msix_vector);
852 /* add q_vector eims value to global eims_enable_mask */
853 adapter->eims_enable_mask |= q_vector->eims_value;
855 /* configure q_vector to set itr on first interrupt */
856 q_vector->set_itr = 1;
860 * igb_configure_msix - Configure MSI-X hardware
861 * @adapter: board private structure to initialize
863 * igb_configure_msix sets up the hardware to properly
864 * generate MSI-X interrupts.
866 static void igb_configure_msix(struct igb_adapter *adapter)
870 struct e1000_hw *hw = &adapter->hw;
872 adapter->eims_enable_mask = 0;
874 /* set vector for other causes, i.e. link changes */
875 switch (hw->mac.type) {
877 tmp = rd32(E1000_CTRL_EXT);
878 /* enable MSI-X PBA support*/
879 tmp |= E1000_CTRL_EXT_PBA_CLR;
881 /* Auto-Mask interrupts upon ICR read. */
882 tmp |= E1000_CTRL_EXT_EIAME;
883 tmp |= E1000_CTRL_EXT_IRCA;
885 wr32(E1000_CTRL_EXT, tmp);
887 /* enable msix_other interrupt */
888 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
889 adapter->eims_other = E1000_EIMS_OTHER;
899 /* Turn on MSI-X capability first, or our settings
900 * won't stick. And it will take days to debug.
902 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
903 E1000_GPIE_PBA | E1000_GPIE_EIAME |
906 /* enable msix_other interrupt */
907 adapter->eims_other = BIT(vector);
908 tmp = (vector++ | E1000_IVAR_VALID) << 8;
910 wr32(E1000_IVAR_MISC, tmp);
913 /* do nothing, since nothing else supports MSI-X */
915 } /* switch (hw->mac.type) */
917 adapter->eims_enable_mask |= adapter->eims_other;
919 for (i = 0; i < adapter->num_q_vectors; i++)
920 igb_assign_vector(adapter->q_vector[i], vector++);
926 * igb_request_msix - Initialize MSI-X interrupts
927 * @adapter: board private structure to initialize
929 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
932 static int igb_request_msix(struct igb_adapter *adapter)
934 unsigned int num_q_vectors = adapter->num_q_vectors;
935 struct net_device *netdev = adapter->netdev;
936 int i, err = 0, vector = 0, free_vector = 0;
938 err = request_irq(adapter->msix_entries[vector].vector,
939 igb_msix_other, 0, netdev->name, adapter);
943 if (num_q_vectors > MAX_Q_VECTORS) {
944 num_q_vectors = MAX_Q_VECTORS;
945 dev_warn(&adapter->pdev->dev,
946 "The number of queue vectors (%d) is higher than max allowed (%d)\n",
947 adapter->num_q_vectors, MAX_Q_VECTORS);
949 for (i = 0; i < num_q_vectors; i++) {
950 struct igb_q_vector *q_vector = adapter->q_vector[i];
954 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
956 if (q_vector->rx.ring && q_vector->tx.ring)
957 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
958 q_vector->rx.ring->queue_index);
959 else if (q_vector->tx.ring)
960 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
961 q_vector->tx.ring->queue_index);
962 else if (q_vector->rx.ring)
963 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
964 q_vector->rx.ring->queue_index);
966 sprintf(q_vector->name, "%s-unused", netdev->name);
968 err = request_irq(adapter->msix_entries[vector].vector,
969 igb_msix_ring, 0, q_vector->name,
975 igb_configure_msix(adapter);
979 /* free already assigned IRQs */
980 free_irq(adapter->msix_entries[free_vector++].vector, adapter);
983 for (i = 0; i < vector; i++) {
984 free_irq(adapter->msix_entries[free_vector++].vector,
985 adapter->q_vector[i]);
992 * igb_free_q_vector - Free memory allocated for specific interrupt vector
993 * @adapter: board private structure to initialize
994 * @v_idx: Index of vector to be freed
996 * This function frees the memory allocated to the q_vector.
998 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1000 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1002 adapter->q_vector[v_idx] = NULL;
1004 /* igb_get_stats64() might access the rings on this vector,
1005 * we must wait a grace period before freeing it.
1008 kfree_rcu(q_vector, rcu);
1012 * igb_reset_q_vector - Reset config for interrupt vector
1013 * @adapter: board private structure to initialize
1014 * @v_idx: Index of vector to be reset
1016 * If NAPI is enabled it will delete any references to the
1017 * NAPI struct. This is preparation for igb_free_q_vector.
1019 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1021 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1023 /* Coming from igb_set_interrupt_capability, the vectors are not yet
1024 * allocated. So, q_vector is NULL so we should stop here.
1029 if (q_vector->tx.ring)
1030 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1032 if (q_vector->rx.ring)
1033 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1035 netif_napi_del(&q_vector->napi);
1039 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1041 int v_idx = adapter->num_q_vectors;
1043 if (adapter->flags & IGB_FLAG_HAS_MSIX)
1044 pci_disable_msix(adapter->pdev);
1045 else if (adapter->flags & IGB_FLAG_HAS_MSI)
1046 pci_disable_msi(adapter->pdev);
1049 igb_reset_q_vector(adapter, v_idx);
1053 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1054 * @adapter: board private structure to initialize
1056 * This function frees the memory allocated to the q_vectors. In addition if
1057 * NAPI is enabled it will delete any references to the NAPI struct prior
1058 * to freeing the q_vector.
1060 static void igb_free_q_vectors(struct igb_adapter *adapter)
1062 int v_idx = adapter->num_q_vectors;
1064 adapter->num_tx_queues = 0;
1065 adapter->num_rx_queues = 0;
1066 adapter->num_q_vectors = 0;
1069 igb_reset_q_vector(adapter, v_idx);
1070 igb_free_q_vector(adapter, v_idx);
1075 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1076 * @adapter: board private structure to initialize
1078 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1079 * MSI-X interrupts allocated.
1081 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1083 igb_free_q_vectors(adapter);
1084 igb_reset_interrupt_capability(adapter);
1088 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1089 * @adapter: board private structure to initialize
1090 * @msix: boolean value of MSIX capability
1092 * Attempt to configure interrupts using the best available
1093 * capabilities of the hardware and kernel.
1095 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1102 adapter->flags |= IGB_FLAG_HAS_MSIX;
1104 /* Number of supported queues. */
1105 adapter->num_rx_queues = adapter->rss_queues;
1106 if (adapter->vfs_allocated_count)
1107 adapter->num_tx_queues = 1;
1109 adapter->num_tx_queues = adapter->rss_queues;
1111 /* start with one vector for every Rx queue */
1112 numvecs = adapter->num_rx_queues;
1114 /* if Tx handler is separate add 1 for every Tx queue */
1115 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1116 numvecs += adapter->num_tx_queues;
1118 /* store the number of vectors reserved for queues */
1119 adapter->num_q_vectors = numvecs;
1121 /* add 1 vector for link status interrupts */
1123 for (i = 0; i < numvecs; i++)
1124 adapter->msix_entries[i].entry = i;
1126 err = pci_enable_msix_range(adapter->pdev,
1127 adapter->msix_entries,
1133 igb_reset_interrupt_capability(adapter);
1135 /* If we can't do MSI-X, try MSI */
1137 adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1138 #ifdef CONFIG_PCI_IOV
1139 /* disable SR-IOV for non MSI-X configurations */
1140 if (adapter->vf_data) {
1141 struct e1000_hw *hw = &adapter->hw;
1142 /* disable iov and allow time for transactions to clear */
1143 pci_disable_sriov(adapter->pdev);
1146 kfree(adapter->vf_mac_list);
1147 adapter->vf_mac_list = NULL;
1148 kfree(adapter->vf_data);
1149 adapter->vf_data = NULL;
1150 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1153 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1156 adapter->vfs_allocated_count = 0;
1157 adapter->rss_queues = 1;
1158 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1159 adapter->num_rx_queues = 1;
1160 adapter->num_tx_queues = 1;
1161 adapter->num_q_vectors = 1;
1162 if (!pci_enable_msi(adapter->pdev))
1163 adapter->flags |= IGB_FLAG_HAS_MSI;
1166 static void igb_add_ring(struct igb_ring *ring,
1167 struct igb_ring_container *head)
1174 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1175 * @adapter: board private structure to initialize
1176 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1177 * @v_idx: index of vector in adapter struct
1178 * @txr_count: total number of Tx rings to allocate
1179 * @txr_idx: index of first Tx ring to allocate
1180 * @rxr_count: total number of Rx rings to allocate
1181 * @rxr_idx: index of first Rx ring to allocate
1183 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1185 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1186 int v_count, int v_idx,
1187 int txr_count, int txr_idx,
1188 int rxr_count, int rxr_idx)
1190 struct igb_q_vector *q_vector;
1191 struct igb_ring *ring;
1195 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1196 if (txr_count > 1 || rxr_count > 1)
1199 ring_count = txr_count + rxr_count;
1200 size = struct_size(q_vector, ring, ring_count);
1202 /* allocate q_vector and rings */
1203 q_vector = adapter->q_vector[v_idx];
1205 q_vector = kzalloc(size, GFP_KERNEL);
1206 } else if (size > ksize(q_vector)) {
1207 struct igb_q_vector *new_q_vector;
1209 new_q_vector = kzalloc(size, GFP_KERNEL);
1211 kfree_rcu(q_vector, rcu);
1212 q_vector = new_q_vector;
1214 memset(q_vector, 0, size);
1219 /* initialize NAPI */
1220 netif_napi_add(adapter->netdev, &q_vector->napi,
1223 /* tie q_vector and adapter together */
1224 adapter->q_vector[v_idx] = q_vector;
1225 q_vector->adapter = adapter;
1227 /* initialize work limits */
1228 q_vector->tx.work_limit = adapter->tx_work_limit;
1230 /* initialize ITR configuration */
1231 q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1232 q_vector->itr_val = IGB_START_ITR;
1234 /* initialize pointer to rings */
1235 ring = q_vector->ring;
1239 /* rx or rx/tx vector */
1240 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1241 q_vector->itr_val = adapter->rx_itr_setting;
1243 /* tx only vector */
1244 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1245 q_vector->itr_val = adapter->tx_itr_setting;
1249 /* assign generic ring traits */
1250 ring->dev = &adapter->pdev->dev;
1251 ring->netdev = adapter->netdev;
1253 /* configure backlink on ring */
1254 ring->q_vector = q_vector;
1256 /* update q_vector Tx values */
1257 igb_add_ring(ring, &q_vector->tx);
1259 /* For 82575, context index must be unique per ring. */
1260 if (adapter->hw.mac.type == e1000_82575)
1261 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1263 /* apply Tx specific ring traits */
1264 ring->count = adapter->tx_ring_count;
1265 ring->queue_index = txr_idx;
1267 ring->cbs_enable = false;
1268 ring->idleslope = 0;
1269 ring->sendslope = 0;
1273 u64_stats_init(&ring->tx_syncp);
1274 u64_stats_init(&ring->tx_syncp2);
1276 /* assign ring to adapter */
1277 adapter->tx_ring[txr_idx] = ring;
1279 /* push pointer to next ring */
1284 /* assign generic ring traits */
1285 ring->dev = &adapter->pdev->dev;
1286 ring->netdev = adapter->netdev;
1288 /* configure backlink on ring */
1289 ring->q_vector = q_vector;
1291 /* update q_vector Rx values */
1292 igb_add_ring(ring, &q_vector->rx);
1294 /* set flag indicating ring supports SCTP checksum offload */
1295 if (adapter->hw.mac.type >= e1000_82576)
1296 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1298 /* On i350, i354, i210, and i211, loopback VLAN packets
1299 * have the tag byte-swapped.
1301 if (adapter->hw.mac.type >= e1000_i350)
1302 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1304 /* apply Rx specific ring traits */
1305 ring->count = adapter->rx_ring_count;
1306 ring->queue_index = rxr_idx;
1308 u64_stats_init(&ring->rx_syncp);
1310 /* assign ring to adapter */
1311 adapter->rx_ring[rxr_idx] = ring;
1319 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1320 * @adapter: board private structure to initialize
1322 * We allocate one q_vector per queue interrupt. If allocation fails we
1325 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1327 int q_vectors = adapter->num_q_vectors;
1328 int rxr_remaining = adapter->num_rx_queues;
1329 int txr_remaining = adapter->num_tx_queues;
1330 int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1333 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1334 for (; rxr_remaining; v_idx++) {
1335 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1341 /* update counts and index */
1347 for (; v_idx < q_vectors; v_idx++) {
1348 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1349 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1351 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1352 tqpv, txr_idx, rqpv, rxr_idx);
1357 /* update counts and index */
1358 rxr_remaining -= rqpv;
1359 txr_remaining -= tqpv;
1367 adapter->num_tx_queues = 0;
1368 adapter->num_rx_queues = 0;
1369 adapter->num_q_vectors = 0;
1372 igb_free_q_vector(adapter, v_idx);
1378 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1379 * @adapter: board private structure to initialize
1380 * @msix: boolean value of MSIX capability
1382 * This function initializes the interrupts and allocates all of the queues.
1384 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1386 struct pci_dev *pdev = adapter->pdev;
1389 igb_set_interrupt_capability(adapter, msix);
1391 err = igb_alloc_q_vectors(adapter);
1393 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1394 goto err_alloc_q_vectors;
1397 igb_cache_ring_register(adapter);
1401 err_alloc_q_vectors:
1402 igb_reset_interrupt_capability(adapter);
1407 * igb_request_irq - initialize interrupts
1408 * @adapter: board private structure to initialize
1410 * Attempts to configure interrupts using the best available
1411 * capabilities of the hardware and kernel.
1413 static int igb_request_irq(struct igb_adapter *adapter)
1415 struct net_device *netdev = adapter->netdev;
1416 struct pci_dev *pdev = adapter->pdev;
1419 if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1420 err = igb_request_msix(adapter);
1423 /* fall back to MSI */
1424 igb_free_all_tx_resources(adapter);
1425 igb_free_all_rx_resources(adapter);
1427 igb_clear_interrupt_scheme(adapter);
1428 err = igb_init_interrupt_scheme(adapter, false);
1432 igb_setup_all_tx_resources(adapter);
1433 igb_setup_all_rx_resources(adapter);
1434 igb_configure(adapter);
1437 igb_assign_vector(adapter->q_vector[0], 0);
1439 if (adapter->flags & IGB_FLAG_HAS_MSI) {
1440 err = request_irq(pdev->irq, igb_intr_msi, 0,
1441 netdev->name, adapter);
1445 /* fall back to legacy interrupts */
1446 igb_reset_interrupt_capability(adapter);
1447 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1450 err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1451 netdev->name, adapter);
1454 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1461 static void igb_free_irq(struct igb_adapter *adapter)
1463 if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1466 free_irq(adapter->msix_entries[vector++].vector, adapter);
1468 for (i = 0; i < adapter->num_q_vectors; i++)
1469 free_irq(adapter->msix_entries[vector++].vector,
1470 adapter->q_vector[i]);
1472 free_irq(adapter->pdev->irq, adapter);
1477 * igb_irq_disable - Mask off interrupt generation on the NIC
1478 * @adapter: board private structure
1480 static void igb_irq_disable(struct igb_adapter *adapter)
1482 struct e1000_hw *hw = &adapter->hw;
1484 /* we need to be careful when disabling interrupts. The VFs are also
1485 * mapped into these registers and so clearing the bits can cause
1486 * issues on the VF drivers so we only need to clear what we set
1488 if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1489 u32 regval = rd32(E1000_EIAM);
1491 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1492 wr32(E1000_EIMC, adapter->eims_enable_mask);
1493 regval = rd32(E1000_EIAC);
1494 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1498 wr32(E1000_IMC, ~0);
1500 if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1503 for (i = 0; i < adapter->num_q_vectors; i++)
1504 synchronize_irq(adapter->msix_entries[i].vector);
1506 synchronize_irq(adapter->pdev->irq);
1511 * igb_irq_enable - Enable default interrupt generation settings
1512 * @adapter: board private structure
1514 static void igb_irq_enable(struct igb_adapter *adapter)
1516 struct e1000_hw *hw = &adapter->hw;
1518 if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1519 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1520 u32 regval = rd32(E1000_EIAC);
1522 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1523 regval = rd32(E1000_EIAM);
1524 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1525 wr32(E1000_EIMS, adapter->eims_enable_mask);
1526 if (adapter->vfs_allocated_count) {
1527 wr32(E1000_MBVFIMR, 0xFF);
1528 ims |= E1000_IMS_VMMB;
1530 wr32(E1000_IMS, ims);
1532 wr32(E1000_IMS, IMS_ENABLE_MASK |
1534 wr32(E1000_IAM, IMS_ENABLE_MASK |
1539 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1541 struct e1000_hw *hw = &adapter->hw;
1542 u16 pf_id = adapter->vfs_allocated_count;
1543 u16 vid = adapter->hw.mng_cookie.vlan_id;
1544 u16 old_vid = adapter->mng_vlan_id;
1546 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1547 /* add VID to filter table */
1548 igb_vfta_set(hw, vid, pf_id, true, true);
1549 adapter->mng_vlan_id = vid;
1551 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1554 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1556 !test_bit(old_vid, adapter->active_vlans)) {
1557 /* remove VID from filter table */
1558 igb_vfta_set(hw, vid, pf_id, false, true);
1563 * igb_release_hw_control - release control of the h/w to f/w
1564 * @adapter: address of board private structure
1566 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1567 * For ASF and Pass Through versions of f/w this means that the
1568 * driver is no longer loaded.
1570 static void igb_release_hw_control(struct igb_adapter *adapter)
1572 struct e1000_hw *hw = &adapter->hw;
1575 /* Let firmware take over control of h/w */
1576 ctrl_ext = rd32(E1000_CTRL_EXT);
1577 wr32(E1000_CTRL_EXT,
1578 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1582 * igb_get_hw_control - get control of the h/w from f/w
1583 * @adapter: address of board private structure
1585 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1586 * For ASF and Pass Through versions of f/w this means that
1587 * the driver is loaded.
1589 static void igb_get_hw_control(struct igb_adapter *adapter)
1591 struct e1000_hw *hw = &adapter->hw;
1594 /* Let firmware know the driver has taken over */
1595 ctrl_ext = rd32(E1000_CTRL_EXT);
1596 wr32(E1000_CTRL_EXT,
1597 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1600 static void enable_fqtss(struct igb_adapter *adapter, bool enable)
1602 struct net_device *netdev = adapter->netdev;
1603 struct e1000_hw *hw = &adapter->hw;
1605 WARN_ON(hw->mac.type != e1000_i210);
1608 adapter->flags |= IGB_FLAG_FQTSS;
1610 adapter->flags &= ~IGB_FLAG_FQTSS;
1612 if (netif_running(netdev))
1613 schedule_work(&adapter->reset_task);
1616 static bool is_fqtss_enabled(struct igb_adapter *adapter)
1618 return (adapter->flags & IGB_FLAG_FQTSS) ? true : false;
1621 static void set_tx_desc_fetch_prio(struct e1000_hw *hw, int queue,
1622 enum tx_queue_prio prio)
1626 WARN_ON(hw->mac.type != e1000_i210);
1627 WARN_ON(queue < 0 || queue > 4);
1629 val = rd32(E1000_I210_TXDCTL(queue));
1631 if (prio == TX_QUEUE_PRIO_HIGH)
1632 val |= E1000_TXDCTL_PRIORITY;
1634 val &= ~E1000_TXDCTL_PRIORITY;
1636 wr32(E1000_I210_TXDCTL(queue), val);
1639 static void set_queue_mode(struct e1000_hw *hw, int queue, enum queue_mode mode)
1643 WARN_ON(hw->mac.type != e1000_i210);
1644 WARN_ON(queue < 0 || queue > 1);
1646 val = rd32(E1000_I210_TQAVCC(queue));
1648 if (mode == QUEUE_MODE_STREAM_RESERVATION)
1649 val |= E1000_TQAVCC_QUEUEMODE;
1651 val &= ~E1000_TQAVCC_QUEUEMODE;
1653 wr32(E1000_I210_TQAVCC(queue), val);
1656 static bool is_any_cbs_enabled(struct igb_adapter *adapter)
1660 for (i = 0; i < adapter->num_tx_queues; i++) {
1661 if (adapter->tx_ring[i]->cbs_enable)
1668 static bool is_any_txtime_enabled(struct igb_adapter *adapter)
1672 for (i = 0; i < adapter->num_tx_queues; i++) {
1673 if (adapter->tx_ring[i]->launchtime_enable)
1681 * igb_config_tx_modes - Configure "Qav Tx mode" features on igb
1682 * @adapter: pointer to adapter struct
1683 * @queue: queue number
1685 * Configure CBS and Launchtime for a given hardware queue.
1686 * Parameters are retrieved from the correct Tx ring, so
1687 * igb_save_cbs_params() and igb_save_txtime_params() should be used
1688 * for setting those correctly prior to this function being called.
1690 static void igb_config_tx_modes(struct igb_adapter *adapter, int queue)
1692 struct net_device *netdev = adapter->netdev;
1693 struct e1000_hw *hw = &adapter->hw;
1694 struct igb_ring *ring;
1695 u32 tqavcc, tqavctrl;
1698 WARN_ON(hw->mac.type != e1000_i210);
1699 WARN_ON(queue < 0 || queue > 1);
1700 ring = adapter->tx_ring[queue];
1702 /* If any of the Qav features is enabled, configure queues as SR and
1703 * with HIGH PRIO. If none is, then configure them with LOW PRIO and
1706 if (ring->cbs_enable || ring->launchtime_enable) {
1707 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_HIGH);
1708 set_queue_mode(hw, queue, QUEUE_MODE_STREAM_RESERVATION);
1710 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_LOW);
1711 set_queue_mode(hw, queue, QUEUE_MODE_STRICT_PRIORITY);
1714 /* If CBS is enabled, set DataTranARB and config its parameters. */
1715 if (ring->cbs_enable || queue == 0) {
1716 /* i210 does not allow the queue 0 to be in the Strict
1717 * Priority mode while the Qav mode is enabled, so,
1718 * instead of disabling strict priority mode, we give
1719 * queue 0 the maximum of credits possible.
1721 * See section 8.12.19 of the i210 datasheet, "Note:
1722 * Queue0 QueueMode must be set to 1b when
1723 * TransmitMode is set to Qav."
1725 if (queue == 0 && !ring->cbs_enable) {
1726 /* max "linkspeed" idleslope in kbps */
1727 ring->idleslope = 1000000;
1728 ring->hicredit = ETH_FRAME_LEN;
1731 /* Always set data transfer arbitration to credit-based
1732 * shaper algorithm on TQAVCTRL if CBS is enabled for any of
1735 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1736 tqavctrl |= E1000_TQAVCTRL_DATATRANARB;
1737 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1739 /* According to i210 datasheet section 7.2.7.7, we should set
1740 * the 'idleSlope' field from TQAVCC register following the
1743 * For 100 Mbps link speed:
1745 * value = BW * 0x7735 * 0.2 (E1)
1747 * For 1000Mbps link speed:
1749 * value = BW * 0x7735 * 2 (E2)
1751 * E1 and E2 can be merged into one equation as shown below.
1752 * Note that 'link-speed' is in Mbps.
1754 * value = BW * 0x7735 * 2 * link-speed
1755 * -------------- (E3)
1758 * 'BW' is the percentage bandwidth out of full link speed
1759 * which can be found with the following equation. Note that
1760 * idleSlope here is the parameter from this function which
1764 * ----------------- (E4)
1767 * That said, we can come up with a generic equation to
1768 * calculate the value we should set it TQAVCC register by
1769 * replacing 'BW' in E3 by E4. The resulting equation is:
1771 * value = idleSlope * 0x7735 * 2 * link-speed
1772 * ----------------- -------------- (E5)
1773 * link-speed * 1000 1000
1775 * 'link-speed' is present in both sides of the fraction so
1776 * it is canceled out. The final equation is the following:
1778 * value = idleSlope * 61034
1779 * ----------------- (E6)
1782 * NOTE: For i210, given the above, we can see that idleslope
1783 * is represented in 16.38431 kbps units by the value at
1784 * the TQAVCC register (1Gbps / 61034), which reduces
1785 * the granularity for idleslope increments.
1786 * For instance, if you want to configure a 2576kbps
1787 * idleslope, the value to be written on the register
1788 * would have to be 157.23. If rounded down, you end
1789 * up with less bandwidth available than originally
1790 * required (~2572 kbps). If rounded up, you end up
1791 * with a higher bandwidth (~2589 kbps). Below the
1792 * approach we take is to always round up the
1793 * calculated value, so the resulting bandwidth might
1794 * be slightly higher for some configurations.
1796 value = DIV_ROUND_UP_ULL(ring->idleslope * 61034ULL, 1000000);
1798 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1799 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1801 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1803 wr32(E1000_I210_TQAVHC(queue),
1804 0x80000000 + ring->hicredit * 0x7735);
1807 /* Set idleSlope to zero. */
1808 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1809 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1810 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1812 /* Set hiCredit to zero. */
1813 wr32(E1000_I210_TQAVHC(queue), 0);
1815 /* If CBS is not enabled for any queues anymore, then return to
1816 * the default state of Data Transmission Arbitration on
1819 if (!is_any_cbs_enabled(adapter)) {
1820 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1821 tqavctrl &= ~E1000_TQAVCTRL_DATATRANARB;
1822 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1826 /* If LaunchTime is enabled, set DataTranTIM. */
1827 if (ring->launchtime_enable) {
1828 /* Always set DataTranTIM on TQAVCTRL if LaunchTime is enabled
1829 * for any of the SR queues, and configure fetchtime delta.
1831 * - LaunchTime will be enabled for all SR queues.
1832 * - A fixed offset can be added relative to the launch
1833 * time of all packets if configured at reg LAUNCH_OS0.
1834 * We are keeping it as 0 for now (default value).
1836 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1837 tqavctrl |= E1000_TQAVCTRL_DATATRANTIM |
1838 E1000_TQAVCTRL_FETCHTIME_DELTA;
1839 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1841 /* If Launchtime is not enabled for any SR queues anymore,
1842 * then clear DataTranTIM on TQAVCTRL and clear fetchtime delta,
1843 * effectively disabling Launchtime.
1845 if (!is_any_txtime_enabled(adapter)) {
1846 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1847 tqavctrl &= ~E1000_TQAVCTRL_DATATRANTIM;
1848 tqavctrl &= ~E1000_TQAVCTRL_FETCHTIME_DELTA;
1849 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1853 /* XXX: In i210 controller the sendSlope and loCredit parameters from
1854 * CBS are not configurable by software so we don't do any 'controller
1855 * configuration' in respect to these parameters.
1858 netdev_dbg(netdev, "Qav Tx mode: cbs %s, launchtime %s, queue %d idleslope %d sendslope %d hiCredit %d locredit %d\n",
1859 ring->cbs_enable ? "enabled" : "disabled",
1860 ring->launchtime_enable ? "enabled" : "disabled",
1862 ring->idleslope, ring->sendslope,
1863 ring->hicredit, ring->locredit);
1866 static int igb_save_txtime_params(struct igb_adapter *adapter, int queue,
1869 struct igb_ring *ring;
1871 if (queue < 0 || queue > adapter->num_tx_queues)
1874 ring = adapter->tx_ring[queue];
1875 ring->launchtime_enable = enable;
1880 static int igb_save_cbs_params(struct igb_adapter *adapter, int queue,
1881 bool enable, int idleslope, int sendslope,
1882 int hicredit, int locredit)
1884 struct igb_ring *ring;
1886 if (queue < 0 || queue > adapter->num_tx_queues)
1889 ring = adapter->tx_ring[queue];
1891 ring->cbs_enable = enable;
1892 ring->idleslope = idleslope;
1893 ring->sendslope = sendslope;
1894 ring->hicredit = hicredit;
1895 ring->locredit = locredit;
1901 * igb_setup_tx_mode - Switch to/from Qav Tx mode when applicable
1902 * @adapter: pointer to adapter struct
1904 * Configure TQAVCTRL register switching the controller's Tx mode
1905 * if FQTSS mode is enabled or disabled. Additionally, will issue
1906 * a call to igb_config_tx_modes() per queue so any previously saved
1907 * Tx parameters are applied.
1909 static void igb_setup_tx_mode(struct igb_adapter *adapter)
1911 struct net_device *netdev = adapter->netdev;
1912 struct e1000_hw *hw = &adapter->hw;
1915 /* Only i210 controller supports changing the transmission mode. */
1916 if (hw->mac.type != e1000_i210)
1919 if (is_fqtss_enabled(adapter)) {
1922 /* Configure TQAVCTRL register: set transmit mode to 'Qav',
1923 * set data fetch arbitration to 'round robin', set SP_WAIT_SR
1924 * so SP queues wait for SR ones.
1926 val = rd32(E1000_I210_TQAVCTRL);
1927 val |= E1000_TQAVCTRL_XMIT_MODE | E1000_TQAVCTRL_SP_WAIT_SR;
1928 val &= ~E1000_TQAVCTRL_DATAFETCHARB;
1929 wr32(E1000_I210_TQAVCTRL, val);
1931 /* Configure Tx and Rx packet buffers sizes as described in
1932 * i210 datasheet section 7.2.7.7.
1934 val = rd32(E1000_TXPBS);
1935 val &= ~I210_TXPBSIZE_MASK;
1936 val |= I210_TXPBSIZE_PB0_8KB | I210_TXPBSIZE_PB1_8KB |
1937 I210_TXPBSIZE_PB2_4KB | I210_TXPBSIZE_PB3_4KB;
1938 wr32(E1000_TXPBS, val);
1940 val = rd32(E1000_RXPBS);
1941 val &= ~I210_RXPBSIZE_MASK;
1942 val |= I210_RXPBSIZE_PB_30KB;
1943 wr32(E1000_RXPBS, val);
1945 /* Section 8.12.9 states that MAX_TPKT_SIZE from DTXMXPKTSZ
1946 * register should not exceed the buffer size programmed in
1947 * TXPBS. The smallest buffer size programmed in TXPBS is 4kB
1948 * so according to the datasheet we should set MAX_TPKT_SIZE to
1951 * However, when we do so, no frame from queue 2 and 3 are
1952 * transmitted. It seems the MAX_TPKT_SIZE should not be great
1953 * or _equal_ to the buffer size programmed in TXPBS. For this
1954 * reason, we set set MAX_ TPKT_SIZE to (4kB - 1) / 64.
1956 val = (4096 - 1) / 64;
1957 wr32(E1000_I210_DTXMXPKTSZ, val);
1959 /* Since FQTSS mode is enabled, apply any CBS configuration
1960 * previously set. If no previous CBS configuration has been
1961 * done, then the initial configuration is applied, which means
1964 max_queue = (adapter->num_tx_queues < I210_SR_QUEUES_NUM) ?
1965 adapter->num_tx_queues : I210_SR_QUEUES_NUM;
1967 for (i = 0; i < max_queue; i++) {
1968 igb_config_tx_modes(adapter, i);
1971 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
1972 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
1973 wr32(E1000_I210_DTXMXPKTSZ, I210_DTXMXPKTSZ_DEFAULT);
1975 val = rd32(E1000_I210_TQAVCTRL);
1976 /* According to Section 8.12.21, the other flags we've set when
1977 * enabling FQTSS are not relevant when disabling FQTSS so we
1978 * don't set they here.
1980 val &= ~E1000_TQAVCTRL_XMIT_MODE;
1981 wr32(E1000_I210_TQAVCTRL, val);
1984 netdev_dbg(netdev, "FQTSS %s\n", (is_fqtss_enabled(adapter)) ?
1985 "enabled" : "disabled");
1989 * igb_configure - configure the hardware for RX and TX
1990 * @adapter: private board structure
1992 static void igb_configure(struct igb_adapter *adapter)
1994 struct net_device *netdev = adapter->netdev;
1997 igb_get_hw_control(adapter);
1998 igb_set_rx_mode(netdev);
1999 igb_setup_tx_mode(adapter);
2001 igb_restore_vlan(adapter);
2003 igb_setup_tctl(adapter);
2004 igb_setup_mrqc(adapter);
2005 igb_setup_rctl(adapter);
2007 igb_nfc_filter_restore(adapter);
2008 igb_configure_tx(adapter);
2009 igb_configure_rx(adapter);
2011 igb_rx_fifo_flush_82575(&adapter->hw);
2013 /* call igb_desc_unused which always leaves
2014 * at least 1 descriptor unused to make sure
2015 * next_to_use != next_to_clean
2017 for (i = 0; i < adapter->num_rx_queues; i++) {
2018 struct igb_ring *ring = adapter->rx_ring[i];
2019 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
2024 * igb_power_up_link - Power up the phy/serdes link
2025 * @adapter: address of board private structure
2027 void igb_power_up_link(struct igb_adapter *adapter)
2029 igb_reset_phy(&adapter->hw);
2031 if (adapter->hw.phy.media_type == e1000_media_type_copper)
2032 igb_power_up_phy_copper(&adapter->hw);
2034 igb_power_up_serdes_link_82575(&adapter->hw);
2036 igb_setup_link(&adapter->hw);
2040 * igb_power_down_link - Power down the phy/serdes link
2041 * @adapter: address of board private structure
2043 static void igb_power_down_link(struct igb_adapter *adapter)
2045 if (adapter->hw.phy.media_type == e1000_media_type_copper)
2046 igb_power_down_phy_copper_82575(&adapter->hw);
2048 igb_shutdown_serdes_link_82575(&adapter->hw);
2052 * Detect and switch function for Media Auto Sense
2053 * @adapter: address of the board private structure
2055 static void igb_check_swap_media(struct igb_adapter *adapter)
2057 struct e1000_hw *hw = &adapter->hw;
2058 u32 ctrl_ext, connsw;
2059 bool swap_now = false;
2061 ctrl_ext = rd32(E1000_CTRL_EXT);
2062 connsw = rd32(E1000_CONNSW);
2064 /* need to live swap if current media is copper and we have fiber/serdes
2068 if ((hw->phy.media_type == e1000_media_type_copper) &&
2069 (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
2071 } else if ((hw->phy.media_type != e1000_media_type_copper) &&
2072 !(connsw & E1000_CONNSW_SERDESD)) {
2073 /* copper signal takes time to appear */
2074 if (adapter->copper_tries < 4) {
2075 adapter->copper_tries++;
2076 connsw |= E1000_CONNSW_AUTOSENSE_CONF;
2077 wr32(E1000_CONNSW, connsw);
2080 adapter->copper_tries = 0;
2081 if ((connsw & E1000_CONNSW_PHYSD) &&
2082 (!(connsw & E1000_CONNSW_PHY_PDN))) {
2084 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
2085 wr32(E1000_CONNSW, connsw);
2093 switch (hw->phy.media_type) {
2094 case e1000_media_type_copper:
2095 netdev_info(adapter->netdev,
2096 "MAS: changing media to fiber/serdes\n");
2098 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2099 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2100 adapter->copper_tries = 0;
2102 case e1000_media_type_internal_serdes:
2103 case e1000_media_type_fiber:
2104 netdev_info(adapter->netdev,
2105 "MAS: changing media to copper\n");
2107 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2108 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2111 /* shouldn't get here during regular operation */
2112 netdev_err(adapter->netdev,
2113 "AMS: Invalid media type found, returning\n");
2116 wr32(E1000_CTRL_EXT, ctrl_ext);
2120 * igb_up - Open the interface and prepare it to handle traffic
2121 * @adapter: board private structure
2123 int igb_up(struct igb_adapter *adapter)
2125 struct e1000_hw *hw = &adapter->hw;
2128 /* hardware has been reset, we need to reload some things */
2129 igb_configure(adapter);
2131 clear_bit(__IGB_DOWN, &adapter->state);
2133 for (i = 0; i < adapter->num_q_vectors; i++)
2134 napi_enable(&(adapter->q_vector[i]->napi));
2136 if (adapter->flags & IGB_FLAG_HAS_MSIX)
2137 igb_configure_msix(adapter);
2139 igb_assign_vector(adapter->q_vector[0], 0);
2141 /* Clear any pending interrupts. */
2144 igb_irq_enable(adapter);
2146 /* notify VFs that reset has been completed */
2147 if (adapter->vfs_allocated_count) {
2148 u32 reg_data = rd32(E1000_CTRL_EXT);
2150 reg_data |= E1000_CTRL_EXT_PFRSTD;
2151 wr32(E1000_CTRL_EXT, reg_data);
2154 netif_tx_start_all_queues(adapter->netdev);
2156 /* start the watchdog. */
2157 hw->mac.get_link_status = 1;
2158 schedule_work(&adapter->watchdog_task);
2160 if ((adapter->flags & IGB_FLAG_EEE) &&
2161 (!hw->dev_spec._82575.eee_disable))
2162 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
2167 void igb_down(struct igb_adapter *adapter)
2169 struct net_device *netdev = adapter->netdev;
2170 struct e1000_hw *hw = &adapter->hw;
2174 /* signal that we're down so the interrupt handler does not
2175 * reschedule our watchdog timer
2177 set_bit(__IGB_DOWN, &adapter->state);
2179 /* disable receives in the hardware */
2180 rctl = rd32(E1000_RCTL);
2181 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
2182 /* flush and sleep below */
2184 igb_nfc_filter_exit(adapter);
2186 netif_carrier_off(netdev);
2187 netif_tx_stop_all_queues(netdev);
2189 /* disable transmits in the hardware */
2190 tctl = rd32(E1000_TCTL);
2191 tctl &= ~E1000_TCTL_EN;
2192 wr32(E1000_TCTL, tctl);
2193 /* flush both disables and wait for them to finish */
2195 usleep_range(10000, 11000);
2197 igb_irq_disable(adapter);
2199 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
2201 for (i = 0; i < adapter->num_q_vectors; i++) {
2202 if (adapter->q_vector[i]) {
2203 napi_synchronize(&adapter->q_vector[i]->napi);
2204 napi_disable(&adapter->q_vector[i]->napi);
2208 del_timer_sync(&adapter->watchdog_timer);
2209 del_timer_sync(&adapter->phy_info_timer);
2211 /* record the stats before reset*/
2212 spin_lock(&adapter->stats64_lock);
2213 igb_update_stats(adapter);
2214 spin_unlock(&adapter->stats64_lock);
2216 adapter->link_speed = 0;
2217 adapter->link_duplex = 0;
2219 if (!pci_channel_offline(adapter->pdev))
2222 /* clear VLAN promisc flag so VFTA will be updated if necessary */
2223 adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
2225 igb_clean_all_tx_rings(adapter);
2226 igb_clean_all_rx_rings(adapter);
2227 #ifdef CONFIG_IGB_DCA
2229 /* since we reset the hardware DCA settings were cleared */
2230 igb_setup_dca(adapter);
2234 void igb_reinit_locked(struct igb_adapter *adapter)
2236 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2237 usleep_range(1000, 2000);
2240 clear_bit(__IGB_RESETTING, &adapter->state);
2243 /** igb_enable_mas - Media Autosense re-enable after swap
2245 * @adapter: adapter struct
2247 static void igb_enable_mas(struct igb_adapter *adapter)
2249 struct e1000_hw *hw = &adapter->hw;
2250 u32 connsw = rd32(E1000_CONNSW);
2252 /* configure for SerDes media detect */
2253 if ((hw->phy.media_type == e1000_media_type_copper) &&
2254 (!(connsw & E1000_CONNSW_SERDESD))) {
2255 connsw |= E1000_CONNSW_ENRGSRC;
2256 connsw |= E1000_CONNSW_AUTOSENSE_EN;
2257 wr32(E1000_CONNSW, connsw);
2262 void igb_reset(struct igb_adapter *adapter)
2264 struct pci_dev *pdev = adapter->pdev;
2265 struct e1000_hw *hw = &adapter->hw;
2266 struct e1000_mac_info *mac = &hw->mac;
2267 struct e1000_fc_info *fc = &hw->fc;
2270 /* Repartition Pba for greater than 9k mtu
2271 * To take effect CTRL.RST is required.
2273 switch (mac->type) {
2277 pba = rd32(E1000_RXPBS);
2278 pba = igb_rxpbs_adjust_82580(pba);
2281 pba = rd32(E1000_RXPBS);
2282 pba &= E1000_RXPBS_SIZE_MASK_82576;
2288 pba = E1000_PBA_34K;
2292 if (mac->type == e1000_82575) {
2293 u32 min_rx_space, min_tx_space, needed_tx_space;
2295 /* write Rx PBA so that hardware can report correct Tx PBA */
2296 wr32(E1000_PBA, pba);
2298 /* To maintain wire speed transmits, the Tx FIFO should be
2299 * large enough to accommodate two full transmit packets,
2300 * rounded up to the next 1KB and expressed in KB. Likewise,
2301 * the Rx FIFO should be large enough to accommodate at least
2302 * one full receive packet and is similarly rounded up and
2305 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
2307 /* The Tx FIFO also stores 16 bytes of information about the Tx
2308 * but don't include Ethernet FCS because hardware appends it.
2309 * We only need to round down to the nearest 512 byte block
2310 * count since the value we care about is 2 frames, not 1.
2312 min_tx_space = adapter->max_frame_size;
2313 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
2314 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
2316 /* upper 16 bits has Tx packet buffer allocation size in KB */
2317 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
2319 /* If current Tx allocation is less than the min Tx FIFO size,
2320 * and the min Tx FIFO size is less than the current Rx FIFO
2321 * allocation, take space away from current Rx allocation.
2323 if (needed_tx_space < pba) {
2324 pba -= needed_tx_space;
2326 /* if short on Rx space, Rx wins and must trump Tx
2329 if (pba < min_rx_space)
2333 /* adjust PBA for jumbo frames */
2334 wr32(E1000_PBA, pba);
2337 /* flow control settings
2338 * The high water mark must be low enough to fit one full frame
2339 * after transmitting the pause frame. As such we must have enough
2340 * space to allow for us to complete our current transmit and then
2341 * receive the frame that is in progress from the link partner.
2343 * - the full Rx FIFO size minus one full Tx plus one full Rx frame
2345 hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
2347 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */
2348 fc->low_water = fc->high_water - 16;
2349 fc->pause_time = 0xFFFF;
2351 fc->current_mode = fc->requested_mode;
2353 /* disable receive for all VFs and wait one second */
2354 if (adapter->vfs_allocated_count) {
2357 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
2358 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
2360 /* ping all the active vfs to let them know we are going down */
2361 igb_ping_all_vfs(adapter);
2363 /* disable transmits and receives */
2364 wr32(E1000_VFRE, 0);
2365 wr32(E1000_VFTE, 0);
2368 /* Allow time for pending master requests to run */
2369 hw->mac.ops.reset_hw(hw);
2372 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2373 /* need to resetup here after media swap */
2374 adapter->ei.get_invariants(hw);
2375 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2377 if ((mac->type == e1000_82575 || mac->type == e1000_i350) &&
2378 (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
2379 igb_enable_mas(adapter);
2381 if (hw->mac.ops.init_hw(hw))
2382 dev_err(&pdev->dev, "Hardware Error\n");
2384 /* RAR registers were cleared during init_hw, clear mac table */
2385 igb_flush_mac_table(adapter);
2386 __dev_uc_unsync(adapter->netdev, NULL);
2388 /* Recover default RAR entry */
2389 igb_set_default_mac_filter(adapter);
2391 /* Flow control settings reset on hardware reset, so guarantee flow
2392 * control is off when forcing speed.
2394 if (!hw->mac.autoneg)
2395 igb_force_mac_fc(hw);
2397 igb_init_dmac(adapter, pba);
2398 #ifdef CONFIG_IGB_HWMON
2399 /* Re-initialize the thermal sensor on i350 devices. */
2400 if (!test_bit(__IGB_DOWN, &adapter->state)) {
2401 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2402 /* If present, re-initialize the external thermal sensor
2406 mac->ops.init_thermal_sensor_thresh(hw);
2410 /* Re-establish EEE setting */
2411 if (hw->phy.media_type == e1000_media_type_copper) {
2412 switch (mac->type) {
2416 igb_set_eee_i350(hw, true, true);
2419 igb_set_eee_i354(hw, true, true);
2425 if (!netif_running(adapter->netdev))
2426 igb_power_down_link(adapter);
2428 igb_update_mng_vlan(adapter);
2430 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2431 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2433 /* Re-enable PTP, where applicable. */
2434 if (adapter->ptp_flags & IGB_PTP_ENABLED)
2435 igb_ptp_reset(adapter);
2437 igb_get_phy_info(hw);
2440 static netdev_features_t igb_fix_features(struct net_device *netdev,
2441 netdev_features_t features)
2443 /* Since there is no support for separate Rx/Tx vlan accel
2444 * enable/disable make sure Tx flag is always in same state as Rx.
2446 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2447 features |= NETIF_F_HW_VLAN_CTAG_TX;
2449 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2454 static int igb_set_features(struct net_device *netdev,
2455 netdev_features_t features)
2457 netdev_features_t changed = netdev->features ^ features;
2458 struct igb_adapter *adapter = netdev_priv(netdev);
2460 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2461 igb_vlan_mode(netdev, features);
2463 if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2466 if (!(features & NETIF_F_NTUPLE)) {
2467 struct hlist_node *node2;
2468 struct igb_nfc_filter *rule;
2470 spin_lock(&adapter->nfc_lock);
2471 hlist_for_each_entry_safe(rule, node2,
2472 &adapter->nfc_filter_list, nfc_node) {
2473 igb_erase_filter(adapter, rule);
2474 hlist_del(&rule->nfc_node);
2477 spin_unlock(&adapter->nfc_lock);
2478 adapter->nfc_filter_count = 0;
2481 netdev->features = features;
2483 if (netif_running(netdev))
2484 igb_reinit_locked(adapter);
2491 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2492 struct net_device *dev,
2493 const unsigned char *addr, u16 vid,
2495 struct netlink_ext_ack *extack)
2497 /* guarantee we can provide a unique filter for the unicast address */
2498 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2499 struct igb_adapter *adapter = netdev_priv(dev);
2500 int vfn = adapter->vfs_allocated_count;
2502 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2506 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2509 #define IGB_MAX_MAC_HDR_LEN 127
2510 #define IGB_MAX_NETWORK_HDR_LEN 511
2512 static netdev_features_t
2513 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2514 netdev_features_t features)
2516 unsigned int network_hdr_len, mac_hdr_len;
2518 /* Make certain the headers can be described by a context descriptor */
2519 mac_hdr_len = skb_network_header(skb) - skb->data;
2520 if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2521 return features & ~(NETIF_F_HW_CSUM |
2523 NETIF_F_GSO_UDP_L4 |
2524 NETIF_F_HW_VLAN_CTAG_TX |
2528 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2529 if (unlikely(network_hdr_len > IGB_MAX_NETWORK_HDR_LEN))
2530 return features & ~(NETIF_F_HW_CSUM |
2532 NETIF_F_GSO_UDP_L4 |
2536 /* We can only support IPV4 TSO in tunnels if we can mangle the
2537 * inner IP ID field, so strip TSO if MANGLEID is not supported.
2539 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2540 features &= ~NETIF_F_TSO;
2545 static void igb_offload_apply(struct igb_adapter *adapter, s32 queue)
2547 if (!is_fqtss_enabled(adapter)) {
2548 enable_fqtss(adapter, true);
2552 igb_config_tx_modes(adapter, queue);
2554 if (!is_any_cbs_enabled(adapter) && !is_any_txtime_enabled(adapter))
2555 enable_fqtss(adapter, false);
2558 static int igb_offload_cbs(struct igb_adapter *adapter,
2559 struct tc_cbs_qopt_offload *qopt)
2561 struct e1000_hw *hw = &adapter->hw;
2564 /* CBS offloading is only supported by i210 controller. */
2565 if (hw->mac.type != e1000_i210)
2568 /* CBS offloading is only supported by queue 0 and queue 1. */
2569 if (qopt->queue < 0 || qopt->queue > 1)
2572 err = igb_save_cbs_params(adapter, qopt->queue, qopt->enable,
2573 qopt->idleslope, qopt->sendslope,
2574 qopt->hicredit, qopt->locredit);
2578 igb_offload_apply(adapter, qopt->queue);
2583 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2584 #define VLAN_PRIO_FULL_MASK (0x07)
2586 static int igb_parse_cls_flower(struct igb_adapter *adapter,
2587 struct flow_cls_offload *f,
2589 struct igb_nfc_filter *input)
2591 struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2592 struct flow_dissector *dissector = rule->match.dissector;
2593 struct netlink_ext_ack *extack = f->common.extack;
2595 if (dissector->used_keys &
2596 ~(BIT(FLOW_DISSECTOR_KEY_BASIC) |
2597 BIT(FLOW_DISSECTOR_KEY_CONTROL) |
2598 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2599 BIT(FLOW_DISSECTOR_KEY_VLAN))) {
2600 NL_SET_ERR_MSG_MOD(extack,
2601 "Unsupported key used, only BASIC, CONTROL, ETH_ADDRS and VLAN are supported");
2605 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2606 struct flow_match_eth_addrs match;
2608 flow_rule_match_eth_addrs(rule, &match);
2609 if (!is_zero_ether_addr(match.mask->dst)) {
2610 if (!is_broadcast_ether_addr(match.mask->dst)) {
2611 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for destination MAC address");
2615 input->filter.match_flags |=
2616 IGB_FILTER_FLAG_DST_MAC_ADDR;
2617 ether_addr_copy(input->filter.dst_addr, match.key->dst);
2620 if (!is_zero_ether_addr(match.mask->src)) {
2621 if (!is_broadcast_ether_addr(match.mask->src)) {
2622 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for source MAC address");
2626 input->filter.match_flags |=
2627 IGB_FILTER_FLAG_SRC_MAC_ADDR;
2628 ether_addr_copy(input->filter.src_addr, match.key->src);
2632 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
2633 struct flow_match_basic match;
2635 flow_rule_match_basic(rule, &match);
2636 if (match.mask->n_proto) {
2637 if (match.mask->n_proto != ETHER_TYPE_FULL_MASK) {
2638 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for EtherType filter");
2642 input->filter.match_flags |= IGB_FILTER_FLAG_ETHER_TYPE;
2643 input->filter.etype = match.key->n_proto;
2647 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
2648 struct flow_match_vlan match;
2650 flow_rule_match_vlan(rule, &match);
2651 if (match.mask->vlan_priority) {
2652 if (match.mask->vlan_priority != VLAN_PRIO_FULL_MASK) {
2653 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for VLAN priority");
2657 input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2658 input->filter.vlan_tci =
2659 (__force __be16)match.key->vlan_priority;
2663 input->action = traffic_class;
2664 input->cookie = f->cookie;
2669 static int igb_configure_clsflower(struct igb_adapter *adapter,
2670 struct flow_cls_offload *cls_flower)
2672 struct netlink_ext_ack *extack = cls_flower->common.extack;
2673 struct igb_nfc_filter *filter, *f;
2676 tc = tc_classid_to_hwtc(adapter->netdev, cls_flower->classid);
2678 NL_SET_ERR_MSG_MOD(extack, "Invalid traffic class");
2682 filter = kzalloc(sizeof(*filter), GFP_KERNEL);
2686 err = igb_parse_cls_flower(adapter, cls_flower, tc, filter);
2690 spin_lock(&adapter->nfc_lock);
2692 hlist_for_each_entry(f, &adapter->nfc_filter_list, nfc_node) {
2693 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2695 NL_SET_ERR_MSG_MOD(extack,
2696 "This filter is already set in ethtool");
2701 hlist_for_each_entry(f, &adapter->cls_flower_list, nfc_node) {
2702 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2704 NL_SET_ERR_MSG_MOD(extack,
2705 "This filter is already set in cls_flower");
2710 err = igb_add_filter(adapter, filter);
2712 NL_SET_ERR_MSG_MOD(extack, "Could not add filter to the adapter");
2716 hlist_add_head(&filter->nfc_node, &adapter->cls_flower_list);
2718 spin_unlock(&adapter->nfc_lock);
2723 spin_unlock(&adapter->nfc_lock);
2731 static int igb_delete_clsflower(struct igb_adapter *adapter,
2732 struct flow_cls_offload *cls_flower)
2734 struct igb_nfc_filter *filter;
2737 spin_lock(&adapter->nfc_lock);
2739 hlist_for_each_entry(filter, &adapter->cls_flower_list, nfc_node)
2740 if (filter->cookie == cls_flower->cookie)
2748 err = igb_erase_filter(adapter, filter);
2752 hlist_del(&filter->nfc_node);
2756 spin_unlock(&adapter->nfc_lock);
2761 static int igb_setup_tc_cls_flower(struct igb_adapter *adapter,
2762 struct flow_cls_offload *cls_flower)
2764 switch (cls_flower->command) {
2765 case FLOW_CLS_REPLACE:
2766 return igb_configure_clsflower(adapter, cls_flower);
2767 case FLOW_CLS_DESTROY:
2768 return igb_delete_clsflower(adapter, cls_flower);
2769 case FLOW_CLS_STATS:
2776 static int igb_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
2779 struct igb_adapter *adapter = cb_priv;
2781 if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
2785 case TC_SETUP_CLSFLOWER:
2786 return igb_setup_tc_cls_flower(adapter, type_data);
2793 static int igb_offload_txtime(struct igb_adapter *adapter,
2794 struct tc_etf_qopt_offload *qopt)
2796 struct e1000_hw *hw = &adapter->hw;
2799 /* Launchtime offloading is only supported by i210 controller. */
2800 if (hw->mac.type != e1000_i210)
2803 /* Launchtime offloading is only supported by queues 0 and 1. */
2804 if (qopt->queue < 0 || qopt->queue > 1)
2807 err = igb_save_txtime_params(adapter, qopt->queue, qopt->enable);
2811 igb_offload_apply(adapter, qopt->queue);
2816 static LIST_HEAD(igb_block_cb_list);
2818 static int igb_setup_tc(struct net_device *dev, enum tc_setup_type type,
2821 struct igb_adapter *adapter = netdev_priv(dev);
2824 case TC_SETUP_QDISC_CBS:
2825 return igb_offload_cbs(adapter, type_data);
2826 case TC_SETUP_BLOCK:
2827 return flow_block_cb_setup_simple(type_data,
2829 igb_setup_tc_block_cb,
2830 adapter, adapter, true);
2832 case TC_SETUP_QDISC_ETF:
2833 return igb_offload_txtime(adapter, type_data);
2840 static int igb_xdp_setup(struct net_device *dev, struct netdev_bpf *bpf)
2842 int i, frame_size = dev->mtu + IGB_ETH_PKT_HDR_PAD;
2843 struct igb_adapter *adapter = netdev_priv(dev);
2844 struct bpf_prog *prog = bpf->prog, *old_prog;
2845 bool running = netif_running(dev);
2848 /* verify igb ring attributes are sufficient for XDP */
2849 for (i = 0; i < adapter->num_rx_queues; i++) {
2850 struct igb_ring *ring = adapter->rx_ring[i];
2852 if (frame_size > igb_rx_bufsz(ring)) {
2853 NL_SET_ERR_MSG_MOD(bpf->extack,
2854 "The RX buffer size is too small for the frame size");
2855 netdev_warn(dev, "XDP RX buffer size %d is too small for the frame size %d\n",
2856 igb_rx_bufsz(ring), frame_size);
2861 old_prog = xchg(&adapter->xdp_prog, prog);
2862 need_reset = (!!prog != !!old_prog);
2864 /* device is up and bpf is added/removed, must setup the RX queues */
2865 if (need_reset && running) {
2868 for (i = 0; i < adapter->num_rx_queues; i++)
2869 (void)xchg(&adapter->rx_ring[i]->xdp_prog,
2874 bpf_prog_put(old_prog);
2876 /* bpf is just replaced, RXQ and MTU are already setup */
2886 static int igb_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2888 switch (xdp->command) {
2889 case XDP_SETUP_PROG:
2890 return igb_xdp_setup(dev, xdp);
2896 static void igb_xdp_ring_update_tail(struct igb_ring *ring)
2898 /* Force memory writes to complete before letting h/w know there
2899 * are new descriptors to fetch.
2902 writel(ring->next_to_use, ring->tail);
2905 static struct igb_ring *igb_xdp_tx_queue_mapping(struct igb_adapter *adapter)
2907 unsigned int r_idx = smp_processor_id();
2909 if (r_idx >= adapter->num_tx_queues)
2910 r_idx = r_idx % adapter->num_tx_queues;
2912 return adapter->tx_ring[r_idx];
2915 static int igb_xdp_xmit_back(struct igb_adapter *adapter, struct xdp_buff *xdp)
2917 struct xdp_frame *xdpf = xdp_convert_buff_to_frame(xdp);
2918 int cpu = smp_processor_id();
2919 struct igb_ring *tx_ring;
2920 struct netdev_queue *nq;
2923 if (unlikely(!xdpf))
2924 return IGB_XDP_CONSUMED;
2926 /* During program transitions its possible adapter->xdp_prog is assigned
2927 * but ring has not been configured yet. In this case simply abort xmit.
2929 tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
2930 if (unlikely(!tx_ring))
2931 return IGB_XDP_CONSUMED;
2933 nq = txring_txq(tx_ring);
2934 __netif_tx_lock(nq, cpu);
2935 /* Avoid transmit queue timeout since we share it with the slow path */
2936 nq->trans_start = jiffies;
2937 ret = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
2938 __netif_tx_unlock(nq);
2943 static int igb_xdp_xmit(struct net_device *dev, int n,
2944 struct xdp_frame **frames, u32 flags)
2946 struct igb_adapter *adapter = netdev_priv(dev);
2947 int cpu = smp_processor_id();
2948 struct igb_ring *tx_ring;
2949 struct netdev_queue *nq;
2953 if (unlikely(test_bit(__IGB_DOWN, &adapter->state)))
2956 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
2959 /* During program transitions its possible adapter->xdp_prog is assigned
2960 * but ring has not been configured yet. In this case simply abort xmit.
2962 tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
2963 if (unlikely(!tx_ring))
2966 nq = txring_txq(tx_ring);
2967 __netif_tx_lock(nq, cpu);
2969 /* Avoid transmit queue timeout since we share it with the slow path */
2970 nq->trans_start = jiffies;
2972 for (i = 0; i < n; i++) {
2973 struct xdp_frame *xdpf = frames[i];
2976 err = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
2977 if (err != IGB_XDP_TX) {
2978 xdp_return_frame_rx_napi(xdpf);
2983 __netif_tx_unlock(nq);
2985 if (unlikely(flags & XDP_XMIT_FLUSH))
2986 igb_xdp_ring_update_tail(tx_ring);
2991 static const struct net_device_ops igb_netdev_ops = {
2992 .ndo_open = igb_open,
2993 .ndo_stop = igb_close,
2994 .ndo_start_xmit = igb_xmit_frame,
2995 .ndo_get_stats64 = igb_get_stats64,
2996 .ndo_set_rx_mode = igb_set_rx_mode,
2997 .ndo_set_mac_address = igb_set_mac,
2998 .ndo_change_mtu = igb_change_mtu,
2999 .ndo_do_ioctl = igb_ioctl,
3000 .ndo_tx_timeout = igb_tx_timeout,
3001 .ndo_validate_addr = eth_validate_addr,
3002 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
3003 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
3004 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
3005 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
3006 .ndo_set_vf_rate = igb_ndo_set_vf_bw,
3007 .ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
3008 .ndo_set_vf_trust = igb_ndo_set_vf_trust,
3009 .ndo_get_vf_config = igb_ndo_get_vf_config,
3010 .ndo_fix_features = igb_fix_features,
3011 .ndo_set_features = igb_set_features,
3012 .ndo_fdb_add = igb_ndo_fdb_add,
3013 .ndo_features_check = igb_features_check,
3014 .ndo_setup_tc = igb_setup_tc,
3016 .ndo_xdp_xmit = igb_xdp_xmit,
3020 * igb_set_fw_version - Configure version string for ethtool
3021 * @adapter: adapter struct
3023 void igb_set_fw_version(struct igb_adapter *adapter)
3025 struct e1000_hw *hw = &adapter->hw;
3026 struct e1000_fw_version fw;
3028 igb_get_fw_version(hw, &fw);
3030 switch (hw->mac.type) {
3033 if (!(igb_get_flash_presence_i210(hw))) {
3034 snprintf(adapter->fw_version,
3035 sizeof(adapter->fw_version),
3037 fw.invm_major, fw.invm_minor,
3043 /* if option is rom valid, display its version too */
3045 snprintf(adapter->fw_version,
3046 sizeof(adapter->fw_version),
3047 "%d.%d, 0x%08x, %d.%d.%d",
3048 fw.eep_major, fw.eep_minor, fw.etrack_id,
3049 fw.or_major, fw.or_build, fw.or_patch);
3051 } else if (fw.etrack_id != 0X0000) {
3052 snprintf(adapter->fw_version,
3053 sizeof(adapter->fw_version),
3055 fw.eep_major, fw.eep_minor, fw.etrack_id);
3057 snprintf(adapter->fw_version,
3058 sizeof(adapter->fw_version),
3060 fw.eep_major, fw.eep_minor, fw.eep_build);
3067 * igb_init_mas - init Media Autosense feature if enabled in the NVM
3069 * @adapter: adapter struct
3071 static void igb_init_mas(struct igb_adapter *adapter)
3073 struct e1000_hw *hw = &adapter->hw;
3076 hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
3077 switch (hw->bus.func) {
3079 if (eeprom_data & IGB_MAS_ENABLE_0) {
3080 adapter->flags |= IGB_FLAG_MAS_ENABLE;
3081 netdev_info(adapter->netdev,
3082 "MAS: Enabling Media Autosense for port %d\n",
3087 if (eeprom_data & IGB_MAS_ENABLE_1) {
3088 adapter->flags |= IGB_FLAG_MAS_ENABLE;
3089 netdev_info(adapter->netdev,
3090 "MAS: Enabling Media Autosense for port %d\n",
3095 if (eeprom_data & IGB_MAS_ENABLE_2) {
3096 adapter->flags |= IGB_FLAG_MAS_ENABLE;
3097 netdev_info(adapter->netdev,
3098 "MAS: Enabling Media Autosense for port %d\n",
3103 if (eeprom_data & IGB_MAS_ENABLE_3) {
3104 adapter->flags |= IGB_FLAG_MAS_ENABLE;
3105 netdev_info(adapter->netdev,
3106 "MAS: Enabling Media Autosense for port %d\n",
3111 /* Shouldn't get here */
3112 netdev_err(adapter->netdev,
3113 "MAS: Invalid port configuration, returning\n");
3119 * igb_init_i2c - Init I2C interface
3120 * @adapter: pointer to adapter structure
3122 static s32 igb_init_i2c(struct igb_adapter *adapter)
3126 /* I2C interface supported on i350 devices */
3127 if (adapter->hw.mac.type != e1000_i350)
3130 /* Initialize the i2c bus which is controlled by the registers.
3131 * This bus will use the i2c_algo_bit structue that implements
3132 * the protocol through toggling of the 4 bits in the register.
3134 adapter->i2c_adap.owner = THIS_MODULE;
3135 adapter->i2c_algo = igb_i2c_algo;
3136 adapter->i2c_algo.data = adapter;
3137 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
3138 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
3139 strlcpy(adapter->i2c_adap.name, "igb BB",
3140 sizeof(adapter->i2c_adap.name));
3141 status = i2c_bit_add_bus(&adapter->i2c_adap);
3146 * igb_probe - Device Initialization Routine
3147 * @pdev: PCI device information struct
3148 * @ent: entry in igb_pci_tbl
3150 * Returns 0 on success, negative on failure
3152 * igb_probe initializes an adapter identified by a pci_dev structure.
3153 * The OS initialization, configuring of the adapter private structure,
3154 * and a hardware reset occur.
3156 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3158 struct net_device *netdev;
3159 struct igb_adapter *adapter;
3160 struct e1000_hw *hw;
3161 u16 eeprom_data = 0;
3163 static int global_quad_port_a; /* global quad port a indication */
3164 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
3165 int err, pci_using_dac;
3166 u8 part_str[E1000_PBANUM_LENGTH];
3168 /* Catch broken hardware that put the wrong VF device ID in
3169 * the PCIe SR-IOV capability.
3171 if (pdev->is_virtfn) {
3172 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
3173 pci_name(pdev), pdev->vendor, pdev->device);
3177 err = pci_enable_device_mem(pdev);
3182 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3186 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3189 "No usable DMA configuration, aborting\n");
3194 err = pci_request_mem_regions(pdev, igb_driver_name);
3198 pci_enable_pcie_error_reporting(pdev);
3200 pci_set_master(pdev);
3201 pci_save_state(pdev);
3204 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
3207 goto err_alloc_etherdev;
3209 SET_NETDEV_DEV(netdev, &pdev->dev);
3211 pci_set_drvdata(pdev, netdev);
3212 adapter = netdev_priv(netdev);
3213 adapter->netdev = netdev;
3214 adapter->pdev = pdev;
3217 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3220 adapter->io_addr = pci_iomap(pdev, 0, 0);
3221 if (!adapter->io_addr)
3223 /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
3224 hw->hw_addr = adapter->io_addr;
3226 netdev->netdev_ops = &igb_netdev_ops;
3227 igb_set_ethtool_ops(netdev);
3228 netdev->watchdog_timeo = 5 * HZ;
3230 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
3232 netdev->mem_start = pci_resource_start(pdev, 0);
3233 netdev->mem_end = pci_resource_end(pdev, 0);
3235 /* PCI config space info */
3236 hw->vendor_id = pdev->vendor;
3237 hw->device_id = pdev->device;
3238 hw->revision_id = pdev->revision;
3239 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3240 hw->subsystem_device_id = pdev->subsystem_device;
3242 /* Copy the default MAC, PHY and NVM function pointers */
3243 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
3244 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
3245 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
3246 /* Initialize skew-specific constants */
3247 err = ei->get_invariants(hw);
3251 /* setup the private structure */
3252 err = igb_sw_init(adapter);
3256 igb_get_bus_info_pcie(hw);
3258 hw->phy.autoneg_wait_to_complete = false;
3260 /* Copper options */
3261 if (hw->phy.media_type == e1000_media_type_copper) {
3262 hw->phy.mdix = AUTO_ALL_MODES;
3263 hw->phy.disable_polarity_correction = false;
3264 hw->phy.ms_type = e1000_ms_hw_default;
3267 if (igb_check_reset_block(hw))
3268 dev_info(&pdev->dev,
3269 "PHY reset is blocked due to SOL/IDER session.\n");
3271 /* features is initialized to 0 in allocation, it might have bits
3272 * set by igb_sw_init so we should use an or instead of an
3275 netdev->features |= NETIF_F_SG |
3282 if (hw->mac.type >= e1000_82576)
3283 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4;
3285 if (hw->mac.type >= e1000_i350)
3286 netdev->features |= NETIF_F_HW_TC;
3288 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
3289 NETIF_F_GSO_GRE_CSUM | \
3290 NETIF_F_GSO_IPXIP4 | \
3291 NETIF_F_GSO_IPXIP6 | \
3292 NETIF_F_GSO_UDP_TUNNEL | \
3293 NETIF_F_GSO_UDP_TUNNEL_CSUM)
3295 netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
3296 netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
3298 /* copy netdev features into list of user selectable features */
3299 netdev->hw_features |= netdev->features |
3300 NETIF_F_HW_VLAN_CTAG_RX |
3301 NETIF_F_HW_VLAN_CTAG_TX |
3304 if (hw->mac.type >= e1000_i350)
3305 netdev->hw_features |= NETIF_F_NTUPLE;
3308 netdev->features |= NETIF_F_HIGHDMA;
3310 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
3311 netdev->mpls_features |= NETIF_F_HW_CSUM;
3312 netdev->hw_enc_features |= netdev->vlan_features;
3314 /* set this bit last since it cannot be part of vlan_features */
3315 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
3316 NETIF_F_HW_VLAN_CTAG_RX |
3317 NETIF_F_HW_VLAN_CTAG_TX;
3319 netdev->priv_flags |= IFF_SUPP_NOFCS;
3321 netdev->priv_flags |= IFF_UNICAST_FLT;
3323 /* MTU range: 68 - 9216 */
3324 netdev->min_mtu = ETH_MIN_MTU;
3325 netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
3327 adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
3329 /* before reading the NVM, reset the controller to put the device in a
3330 * known good starting state
3332 hw->mac.ops.reset_hw(hw);
3334 /* make sure the NVM is good , i211/i210 parts can have special NVM
3335 * that doesn't contain a checksum
3337 switch (hw->mac.type) {
3340 if (igb_get_flash_presence_i210(hw)) {
3341 if (hw->nvm.ops.validate(hw) < 0) {
3343 "The NVM Checksum Is Not Valid\n");
3350 if (hw->nvm.ops.validate(hw) < 0) {
3351 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
3358 if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
3359 /* copy the MAC address out of the NVM */
3360 if (hw->mac.ops.read_mac_addr(hw))
3361 dev_err(&pdev->dev, "NVM Read Error\n");
3364 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
3366 if (!is_valid_ether_addr(netdev->dev_addr)) {
3367 dev_err(&pdev->dev, "Invalid MAC Address\n");
3372 igb_set_default_mac_filter(adapter);
3374 /* get firmware version for ethtool -i */
3375 igb_set_fw_version(adapter);
3377 /* configure RXPBSIZE and TXPBSIZE */
3378 if (hw->mac.type == e1000_i210) {
3379 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
3380 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
3383 timer_setup(&adapter->watchdog_timer, igb_watchdog, 0);
3384 timer_setup(&adapter->phy_info_timer, igb_update_phy_info, 0);
3386 INIT_WORK(&adapter->reset_task, igb_reset_task);
3387 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
3389 /* Initialize link properties that are user-changeable */
3390 adapter->fc_autoneg = true;
3391 hw->mac.autoneg = true;
3392 hw->phy.autoneg_advertised = 0x2f;
3394 hw->fc.requested_mode = e1000_fc_default;
3395 hw->fc.current_mode = e1000_fc_default;
3397 igb_validate_mdi_setting(hw);
3399 /* By default, support wake on port A */
3400 if (hw->bus.func == 0)
3401 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3403 /* Check the NVM for wake support on non-port A ports */
3404 if (hw->mac.type >= e1000_82580)
3405 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
3406 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
3408 else if (hw->bus.func == 1)
3409 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
3411 if (eeprom_data & IGB_EEPROM_APME)
3412 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3414 /* now that we have the eeprom settings, apply the special cases where
3415 * the eeprom may be wrong or the board simply won't support wake on
3416 * lan on a particular port
3418 switch (pdev->device) {
3419 case E1000_DEV_ID_82575GB_QUAD_COPPER:
3420 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3422 case E1000_DEV_ID_82575EB_FIBER_SERDES:
3423 case E1000_DEV_ID_82576_FIBER:
3424 case E1000_DEV_ID_82576_SERDES:
3425 /* Wake events only supported on port A for dual fiber
3426 * regardless of eeprom setting
3428 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
3429 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3431 case E1000_DEV_ID_82576_QUAD_COPPER:
3432 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
3433 /* if quad port adapter, disable WoL on all but port A */
3434 if (global_quad_port_a != 0)
3435 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3437 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
3438 /* Reset for multiple quad port adapters */
3439 if (++global_quad_port_a == 4)
3440 global_quad_port_a = 0;
3443 /* If the device can't wake, don't set software support */
3444 if (!device_can_wakeup(&adapter->pdev->dev))
3445 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3448 /* initialize the wol settings based on the eeprom settings */
3449 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
3450 adapter->wol |= E1000_WUFC_MAG;
3452 /* Some vendors want WoL disabled by default, but still supported */
3453 if ((hw->mac.type == e1000_i350) &&
3454 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
3455 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3459 /* Some vendors want the ability to Use the EEPROM setting as
3460 * enable/disable only, and not for capability
3462 if (((hw->mac.type == e1000_i350) ||
3463 (hw->mac.type == e1000_i354)) &&
3464 (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
3465 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3468 if (hw->mac.type == e1000_i350) {
3469 if (((pdev->subsystem_device == 0x5001) ||
3470 (pdev->subsystem_device == 0x5002)) &&
3471 (hw->bus.func == 0)) {
3472 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3475 if (pdev->subsystem_device == 0x1F52)
3476 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3479 device_set_wakeup_enable(&adapter->pdev->dev,
3480 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
3482 /* reset the hardware with the new settings */
3485 /* Init the I2C interface */
3486 err = igb_init_i2c(adapter);
3488 dev_err(&pdev->dev, "failed to init i2c interface\n");
3492 /* let the f/w know that the h/w is now under the control of the
3495 igb_get_hw_control(adapter);
3497 strcpy(netdev->name, "eth%d");
3498 err = register_netdev(netdev);
3502 /* carrier off reporting is important to ethtool even BEFORE open */
3503 netif_carrier_off(netdev);
3505 #ifdef CONFIG_IGB_DCA
3506 if (dca_add_requester(&pdev->dev) == 0) {
3507 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3508 dev_info(&pdev->dev, "DCA enabled\n");
3509 igb_setup_dca(adapter);
3513 #ifdef CONFIG_IGB_HWMON
3514 /* Initialize the thermal sensor on i350 devices. */
3515 if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
3518 /* Read the NVM to determine if this i350 device supports an
3519 * external thermal sensor.
3521 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
3522 if (ets_word != 0x0000 && ets_word != 0xFFFF)
3523 adapter->ets = true;
3525 adapter->ets = false;
3526 if (igb_sysfs_init(adapter))
3528 "failed to allocate sysfs resources\n");
3530 adapter->ets = false;
3533 /* Check if Media Autosense is enabled */
3535 if (hw->dev_spec._82575.mas_capable)
3536 igb_init_mas(adapter);
3538 /* do hw tstamp init after resetting */
3539 igb_ptp_init(adapter);
3541 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
3542 /* print bus type/speed/width info, not applicable to i354 */
3543 if (hw->mac.type != e1000_i354) {
3544 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
3546 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
3547 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
3549 ((hw->bus.width == e1000_bus_width_pcie_x4) ?
3551 (hw->bus.width == e1000_bus_width_pcie_x2) ?
3553 (hw->bus.width == e1000_bus_width_pcie_x1) ?
3554 "Width x1" : "unknown"), netdev->dev_addr);
3557 if ((hw->mac.type == e1000_82576 &&
3558 rd32(E1000_EECD) & E1000_EECD_PRES) ||
3559 (hw->mac.type >= e1000_i210 ||
3560 igb_get_flash_presence_i210(hw))) {
3561 ret_val = igb_read_part_string(hw, part_str,
3562 E1000_PBANUM_LENGTH);
3564 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
3568 strcpy(part_str, "Unknown");
3569 dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
3570 dev_info(&pdev->dev,
3571 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3572 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
3573 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3574 adapter->num_rx_queues, adapter->num_tx_queues);
3575 if (hw->phy.media_type == e1000_media_type_copper) {
3576 switch (hw->mac.type) {
3580 /* Enable EEE for internal copper PHY devices */
3581 err = igb_set_eee_i350(hw, true, true);
3583 (!hw->dev_spec._82575.eee_disable)) {
3584 adapter->eee_advert =
3585 MDIO_EEE_100TX | MDIO_EEE_1000T;
3586 adapter->flags |= IGB_FLAG_EEE;
3590 if ((rd32(E1000_CTRL_EXT) &
3591 E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3592 err = igb_set_eee_i354(hw, true, true);
3594 (!hw->dev_spec._82575.eee_disable)) {
3595 adapter->eee_advert =
3596 MDIO_EEE_100TX | MDIO_EEE_1000T;
3597 adapter->flags |= IGB_FLAG_EEE;
3606 dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
3608 pm_runtime_put_noidle(&pdev->dev);
3612 igb_release_hw_control(adapter);
3613 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3615 if (!igb_check_reset_block(hw))
3618 if (hw->flash_address)
3619 iounmap(hw->flash_address);
3621 kfree(adapter->mac_table);
3622 kfree(adapter->shadow_vfta);
3623 igb_clear_interrupt_scheme(adapter);
3624 #ifdef CONFIG_PCI_IOV
3625 igb_disable_sriov(pdev);
3627 pci_iounmap(pdev, adapter->io_addr);
3629 free_netdev(netdev);
3631 pci_disable_pcie_error_reporting(pdev);
3632 pci_release_mem_regions(pdev);
3635 pci_disable_device(pdev);
3639 #ifdef CONFIG_PCI_IOV
3640 static int igb_disable_sriov(struct pci_dev *pdev)
3642 struct net_device *netdev = pci_get_drvdata(pdev);
3643 struct igb_adapter *adapter = netdev_priv(netdev);
3644 struct e1000_hw *hw = &adapter->hw;
3645 unsigned long flags;
3647 /* reclaim resources allocated to VFs */
3648 if (adapter->vf_data) {
3649 /* disable iov and allow time for transactions to clear */
3650 if (pci_vfs_assigned(pdev)) {
3651 dev_warn(&pdev->dev,
3652 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
3655 pci_disable_sriov(pdev);
3658 spin_lock_irqsave(&adapter->vfs_lock, flags);
3659 kfree(adapter->vf_mac_list);
3660 adapter->vf_mac_list = NULL;
3661 kfree(adapter->vf_data);
3662 adapter->vf_data = NULL;
3663 adapter->vfs_allocated_count = 0;
3664 spin_unlock_irqrestore(&adapter->vfs_lock, flags);
3665 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
3668 dev_info(&pdev->dev, "IOV Disabled\n");
3670 /* Re-enable DMA Coalescing flag since IOV is turned off */
3671 adapter->flags |= IGB_FLAG_DMAC;
3677 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
3679 struct net_device *netdev = pci_get_drvdata(pdev);
3680 struct igb_adapter *adapter = netdev_priv(netdev);
3681 int old_vfs = pci_num_vf(pdev);
3682 struct vf_mac_filter *mac_list;
3684 int num_vf_mac_filters, i;
3686 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
3694 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
3696 adapter->vfs_allocated_count = old_vfs;
3698 adapter->vfs_allocated_count = num_vfs;
3700 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
3701 sizeof(struct vf_data_storage), GFP_KERNEL);
3703 /* if allocation failed then we do not support SR-IOV */
3704 if (!adapter->vf_data) {
3705 adapter->vfs_allocated_count = 0;
3710 /* Due to the limited number of RAR entries calculate potential
3711 * number of MAC filters available for the VFs. Reserve entries
3712 * for PF default MAC, PF MAC filters and at least one RAR entry
3713 * for each VF for VF MAC.
3715 num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
3716 (1 + IGB_PF_MAC_FILTERS_RESERVED +
3717 adapter->vfs_allocated_count);
3719 adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
3720 sizeof(struct vf_mac_filter),
3723 mac_list = adapter->vf_mac_list;
3724 INIT_LIST_HEAD(&adapter->vf_macs.l);
3726 if (adapter->vf_mac_list) {
3727 /* Initialize list of VF MAC filters */
3728 for (i = 0; i < num_vf_mac_filters; i++) {
3730 mac_list->free = true;
3731 list_add(&mac_list->l, &adapter->vf_macs.l);
3735 /* If we could not allocate memory for the VF MAC filters
3736 * we can continue without this feature but warn user.
3739 "Unable to allocate memory for VF MAC filter list\n");
3742 /* only call pci_enable_sriov() if no VFs are allocated already */
3744 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
3748 dev_info(&pdev->dev, "%d VFs allocated\n",
3749 adapter->vfs_allocated_count);
3750 for (i = 0; i < adapter->vfs_allocated_count; i++)
3751 igb_vf_configure(adapter, i);
3753 /* DMA Coalescing is not supported in IOV mode. */
3754 adapter->flags &= ~IGB_FLAG_DMAC;
3758 kfree(adapter->vf_mac_list);
3759 adapter->vf_mac_list = NULL;
3760 kfree(adapter->vf_data);
3761 adapter->vf_data = NULL;
3762 adapter->vfs_allocated_count = 0;
3769 * igb_remove_i2c - Cleanup I2C interface
3770 * @adapter: pointer to adapter structure
3772 static void igb_remove_i2c(struct igb_adapter *adapter)
3774 /* free the adapter bus structure */
3775 i2c_del_adapter(&adapter->i2c_adap);
3779 * igb_remove - Device Removal Routine
3780 * @pdev: PCI device information struct
3782 * igb_remove is called by the PCI subsystem to alert the driver
3783 * that it should release a PCI device. The could be caused by a
3784 * Hot-Plug event, or because the driver is going to be removed from
3787 static void igb_remove(struct pci_dev *pdev)
3789 struct net_device *netdev = pci_get_drvdata(pdev);
3790 struct igb_adapter *adapter = netdev_priv(netdev);
3791 struct e1000_hw *hw = &adapter->hw;
3793 pm_runtime_get_noresume(&pdev->dev);
3794 #ifdef CONFIG_IGB_HWMON
3795 igb_sysfs_exit(adapter);
3797 igb_remove_i2c(adapter);
3798 igb_ptp_stop(adapter);
3799 /* The watchdog timer may be rescheduled, so explicitly
3800 * disable watchdog from being rescheduled.
3802 set_bit(__IGB_DOWN, &adapter->state);
3803 del_timer_sync(&adapter->watchdog_timer);
3804 del_timer_sync(&adapter->phy_info_timer);
3806 cancel_work_sync(&adapter->reset_task);
3807 cancel_work_sync(&adapter->watchdog_task);
3809 #ifdef CONFIG_IGB_DCA
3810 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3811 dev_info(&pdev->dev, "DCA disabled\n");
3812 dca_remove_requester(&pdev->dev);
3813 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3814 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
3818 /* Release control of h/w to f/w. If f/w is AMT enabled, this
3819 * would have already happened in close and is redundant.
3821 igb_release_hw_control(adapter);
3823 #ifdef CONFIG_PCI_IOV
3824 igb_disable_sriov(pdev);
3827 unregister_netdev(netdev);
3829 igb_clear_interrupt_scheme(adapter);
3831 pci_iounmap(pdev, adapter->io_addr);
3832 if (hw->flash_address)
3833 iounmap(hw->flash_address);
3834 pci_release_mem_regions(pdev);
3836 kfree(adapter->mac_table);
3837 kfree(adapter->shadow_vfta);
3838 free_netdev(netdev);
3840 pci_disable_pcie_error_reporting(pdev);
3842 pci_disable_device(pdev);
3846 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3847 * @adapter: board private structure to initialize
3849 * This function initializes the vf specific data storage and then attempts to
3850 * allocate the VFs. The reason for ordering it this way is because it is much
3851 * mor expensive time wise to disable SR-IOV than it is to allocate and free
3852 * the memory for the VFs.
3854 static void igb_probe_vfs(struct igb_adapter *adapter)
3856 #ifdef CONFIG_PCI_IOV
3857 struct pci_dev *pdev = adapter->pdev;
3858 struct e1000_hw *hw = &adapter->hw;
3860 /* Virtualization features not supported on i210 and 82580 family. */
3861 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211) ||
3862 (hw->mac.type == e1000_82580))
3865 /* Of the below we really only want the effect of getting
3866 * IGB_FLAG_HAS_MSIX set (if available), without which
3867 * igb_enable_sriov() has no effect.
3869 igb_set_interrupt_capability(adapter, true);
3870 igb_reset_interrupt_capability(adapter);
3872 pci_sriov_set_totalvfs(pdev, 7);
3873 igb_enable_sriov(pdev, max_vfs);
3875 #endif /* CONFIG_PCI_IOV */
3878 unsigned int igb_get_max_rss_queues(struct igb_adapter *adapter)
3880 struct e1000_hw *hw = &adapter->hw;
3881 unsigned int max_rss_queues;
3883 /* Determine the maximum number of RSS queues supported. */
3884 switch (hw->mac.type) {
3886 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3890 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3893 /* I350 cannot do RSS and SR-IOV at the same time */
3894 if (!!adapter->vfs_allocated_count) {
3900 if (!!adapter->vfs_allocated_count) {
3908 max_rss_queues = IGB_MAX_RX_QUEUES;
3912 return max_rss_queues;
3915 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3919 max_rss_queues = igb_get_max_rss_queues(adapter);
3920 adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3922 igb_set_flag_queue_pairs(adapter, max_rss_queues);
3925 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3926 const u32 max_rss_queues)
3928 struct e1000_hw *hw = &adapter->hw;
3930 /* Determine if we need to pair queues. */
3931 switch (hw->mac.type) {
3934 /* Device supports enough interrupts without queue pairing. */
3942 /* If rss_queues > half of max_rss_queues, pair the queues in
3943 * order to conserve interrupts due to limited supply.
3945 if (adapter->rss_queues > (max_rss_queues / 2))
3946 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3948 adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3954 * igb_sw_init - Initialize general software structures (struct igb_adapter)
3955 * @adapter: board private structure to initialize
3957 * igb_sw_init initializes the Adapter private data structure.
3958 * Fields are initialized based on PCI device information and
3959 * OS network device settings (MTU size).
3961 static int igb_sw_init(struct igb_adapter *adapter)
3963 struct e1000_hw *hw = &adapter->hw;
3964 struct net_device *netdev = adapter->netdev;
3965 struct pci_dev *pdev = adapter->pdev;
3967 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3969 /* set default ring sizes */
3970 adapter->tx_ring_count = IGB_DEFAULT_TXD;
3971 adapter->rx_ring_count = IGB_DEFAULT_RXD;
3973 /* set default ITR values */
3974 adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3975 adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3977 /* set default work limits */
3978 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3980 adapter->max_frame_size = netdev->mtu + IGB_ETH_PKT_HDR_PAD;
3981 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3983 spin_lock_init(&adapter->nfc_lock);
3984 spin_lock_init(&adapter->stats64_lock);
3986 /* init spinlock to avoid concurrency of VF resources */
3987 spin_lock_init(&adapter->vfs_lock);
3988 #ifdef CONFIG_PCI_IOV
3989 switch (hw->mac.type) {
3993 dev_warn(&pdev->dev,
3994 "Maximum of 7 VFs per PF, using max\n");
3995 max_vfs = adapter->vfs_allocated_count = 7;
3997 adapter->vfs_allocated_count = max_vfs;
3998 if (adapter->vfs_allocated_count)
3999 dev_warn(&pdev->dev,
4000 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
4005 #endif /* CONFIG_PCI_IOV */
4007 /* Assume MSI-X interrupts, will be checked during IRQ allocation */
4008 adapter->flags |= IGB_FLAG_HAS_MSIX;
4010 adapter->mac_table = kcalloc(hw->mac.rar_entry_count,
4011 sizeof(struct igb_mac_addr),
4013 if (!adapter->mac_table)
4016 igb_probe_vfs(adapter);
4018 igb_init_queue_configuration(adapter);
4020 /* Setup and initialize a copy of the hw vlan table array */
4021 adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
4023 if (!adapter->shadow_vfta)
4026 /* This call may decrease the number of queues */
4027 if (igb_init_interrupt_scheme(adapter, true)) {
4028 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4032 /* Explicitly disable IRQ since the NIC can be in any state. */
4033 igb_irq_disable(adapter);
4035 if (hw->mac.type >= e1000_i350)
4036 adapter->flags &= ~IGB_FLAG_DMAC;
4038 set_bit(__IGB_DOWN, &adapter->state);
4043 * igb_open - Called when a network interface is made active
4044 * @netdev: network interface device structure
4045 * @resuming: indicates whether we are in a resume call
4047 * Returns 0 on success, negative value on failure
4049 * The open entry point is called when a network interface is made
4050 * active by the system (IFF_UP). At this point all resources needed
4051 * for transmit and receive operations are allocated, the interrupt
4052 * handler is registered with the OS, the watchdog timer is started,
4053 * and the stack is notified that the interface is ready.
4055 static int __igb_open(struct net_device *netdev, bool resuming)
4057 struct igb_adapter *adapter = netdev_priv(netdev);
4058 struct e1000_hw *hw = &adapter->hw;
4059 struct pci_dev *pdev = adapter->pdev;
4063 /* disallow open during test */
4064 if (test_bit(__IGB_TESTING, &adapter->state)) {
4070 pm_runtime_get_sync(&pdev->dev);
4072 netif_carrier_off(netdev);
4074 /* allocate transmit descriptors */
4075 err = igb_setup_all_tx_resources(adapter);
4079 /* allocate receive descriptors */
4080 err = igb_setup_all_rx_resources(adapter);
4084 igb_power_up_link(adapter);
4086 /* before we allocate an interrupt, we must be ready to handle it.
4087 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4088 * as soon as we call pci_request_irq, so we have to setup our
4089 * clean_rx handler before we do so.
4091 igb_configure(adapter);
4093 err = igb_request_irq(adapter);
4097 /* Notify the stack of the actual queue counts. */
4098 err = netif_set_real_num_tx_queues(adapter->netdev,
4099 adapter->num_tx_queues);
4101 goto err_set_queues;
4103 err = netif_set_real_num_rx_queues(adapter->netdev,
4104 adapter->num_rx_queues);
4106 goto err_set_queues;
4108 /* From here on the code is the same as igb_up() */
4109 clear_bit(__IGB_DOWN, &adapter->state);
4111 for (i = 0; i < adapter->num_q_vectors; i++)
4112 napi_enable(&(adapter->q_vector[i]->napi));
4114 /* Clear any pending interrupts. */
4118 igb_irq_enable(adapter);
4120 /* notify VFs that reset has been completed */
4121 if (adapter->vfs_allocated_count) {
4122 u32 reg_data = rd32(E1000_CTRL_EXT);
4124 reg_data |= E1000_CTRL_EXT_PFRSTD;
4125 wr32(E1000_CTRL_EXT, reg_data);
4128 netif_tx_start_all_queues(netdev);
4131 pm_runtime_put(&pdev->dev);
4133 /* start the watchdog. */
4134 hw->mac.get_link_status = 1;
4135 schedule_work(&adapter->watchdog_task);
4140 igb_free_irq(adapter);
4142 igb_release_hw_control(adapter);
4143 igb_power_down_link(adapter);
4144 igb_free_all_rx_resources(adapter);
4146 igb_free_all_tx_resources(adapter);
4150 pm_runtime_put(&pdev->dev);
4155 int igb_open(struct net_device *netdev)
4157 return __igb_open(netdev, false);
4161 * igb_close - Disables a network interface
4162 * @netdev: network interface device structure
4163 * @suspending: indicates we are in a suspend call
4165 * Returns 0, this is not allowed to fail
4167 * The close entry point is called when an interface is de-activated
4168 * by the OS. The hardware is still under the driver's control, but
4169 * needs to be disabled. A global MAC reset is issued to stop the
4170 * hardware, and all transmit and receive resources are freed.
4172 static int __igb_close(struct net_device *netdev, bool suspending)
4174 struct igb_adapter *adapter = netdev_priv(netdev);
4175 struct pci_dev *pdev = adapter->pdev;
4177 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4180 pm_runtime_get_sync(&pdev->dev);
4183 igb_free_irq(adapter);
4185 igb_free_all_tx_resources(adapter);
4186 igb_free_all_rx_resources(adapter);
4189 pm_runtime_put_sync(&pdev->dev);
4193 int igb_close(struct net_device *netdev)
4195 if (netif_device_present(netdev) || netdev->dismantle)
4196 return __igb_close(netdev, false);
4201 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
4202 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4204 * Return 0 on success, negative on failure
4206 int igb_setup_tx_resources(struct igb_ring *tx_ring)
4208 struct device *dev = tx_ring->dev;
4211 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4213 tx_ring->tx_buffer_info = vmalloc(size);
4214 if (!tx_ring->tx_buffer_info)
4217 /* round up to nearest 4K */
4218 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
4219 tx_ring->size = ALIGN(tx_ring->size, 4096);
4221 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4222 &tx_ring->dma, GFP_KERNEL);
4226 tx_ring->next_to_use = 0;
4227 tx_ring->next_to_clean = 0;
4232 vfree(tx_ring->tx_buffer_info);
4233 tx_ring->tx_buffer_info = NULL;
4234 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4239 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
4240 * (Descriptors) for all queues
4241 * @adapter: board private structure
4243 * Return 0 on success, negative on failure
4245 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
4247 struct pci_dev *pdev = adapter->pdev;
4250 for (i = 0; i < adapter->num_tx_queues; i++) {
4251 err = igb_setup_tx_resources(adapter->tx_ring[i]);
4254 "Allocation for Tx Queue %u failed\n", i);
4255 for (i--; i >= 0; i--)
4256 igb_free_tx_resources(adapter->tx_ring[i]);
4265 * igb_setup_tctl - configure the transmit control registers
4266 * @adapter: Board private structure
4268 void igb_setup_tctl(struct igb_adapter *adapter)
4270 struct e1000_hw *hw = &adapter->hw;
4273 /* disable queue 0 which is enabled by default on 82575 and 82576 */
4274 wr32(E1000_TXDCTL(0), 0);
4276 /* Program the Transmit Control Register */
4277 tctl = rd32(E1000_TCTL);
4278 tctl &= ~E1000_TCTL_CT;
4279 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
4280 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
4282 igb_config_collision_dist(hw);
4284 /* Enable transmits */
4285 tctl |= E1000_TCTL_EN;
4287 wr32(E1000_TCTL, tctl);
4291 * igb_configure_tx_ring - Configure transmit ring after Reset
4292 * @adapter: board private structure
4293 * @ring: tx ring to configure
4295 * Configure a transmit ring after a reset.
4297 void igb_configure_tx_ring(struct igb_adapter *adapter,
4298 struct igb_ring *ring)
4300 struct e1000_hw *hw = &adapter->hw;
4302 u64 tdba = ring->dma;
4303 int reg_idx = ring->reg_idx;
4305 wr32(E1000_TDLEN(reg_idx),
4306 ring->count * sizeof(union e1000_adv_tx_desc));
4307 wr32(E1000_TDBAL(reg_idx),
4308 tdba & 0x00000000ffffffffULL);
4309 wr32(E1000_TDBAH(reg_idx), tdba >> 32);
4311 ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
4312 wr32(E1000_TDH(reg_idx), 0);
4313 writel(0, ring->tail);
4315 txdctl |= IGB_TX_PTHRESH;
4316 txdctl |= IGB_TX_HTHRESH << 8;
4317 txdctl |= IGB_TX_WTHRESH << 16;
4319 /* reinitialize tx_buffer_info */
4320 memset(ring->tx_buffer_info, 0,
4321 sizeof(struct igb_tx_buffer) * ring->count);
4323 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
4324 wr32(E1000_TXDCTL(reg_idx), txdctl);
4328 * igb_configure_tx - Configure transmit Unit after Reset
4329 * @adapter: board private structure
4331 * Configure the Tx unit of the MAC after a reset.
4333 static void igb_configure_tx(struct igb_adapter *adapter)
4335 struct e1000_hw *hw = &adapter->hw;
4338 /* disable the queues */
4339 for (i = 0; i < adapter->num_tx_queues; i++)
4340 wr32(E1000_TXDCTL(adapter->tx_ring[i]->reg_idx), 0);
4343 usleep_range(10000, 20000);
4345 for (i = 0; i < adapter->num_tx_queues; i++)
4346 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
4350 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
4351 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
4353 * Returns 0 on success, negative on failure
4355 int igb_setup_rx_resources(struct igb_ring *rx_ring)
4357 struct igb_adapter *adapter = netdev_priv(rx_ring->netdev);
4358 struct device *dev = rx_ring->dev;
4361 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4363 rx_ring->rx_buffer_info = vmalloc(size);
4364 if (!rx_ring->rx_buffer_info)
4367 /* Round up to nearest 4K */
4368 rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
4369 rx_ring->size = ALIGN(rx_ring->size, 4096);
4371 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4372 &rx_ring->dma, GFP_KERNEL);
4376 rx_ring->next_to_alloc = 0;
4377 rx_ring->next_to_clean = 0;
4378 rx_ring->next_to_use = 0;
4380 rx_ring->xdp_prog = adapter->xdp_prog;
4382 /* XDP RX-queue info */
4383 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
4384 rx_ring->queue_index) < 0)
4390 vfree(rx_ring->rx_buffer_info);
4391 rx_ring->rx_buffer_info = NULL;
4392 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4397 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
4398 * (Descriptors) for all queues
4399 * @adapter: board private structure
4401 * Return 0 on success, negative on failure
4403 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
4405 struct pci_dev *pdev = adapter->pdev;
4408 for (i = 0; i < adapter->num_rx_queues; i++) {
4409 err = igb_setup_rx_resources(adapter->rx_ring[i]);
4412 "Allocation for Rx Queue %u failed\n", i);
4413 for (i--; i >= 0; i--)
4414 igb_free_rx_resources(adapter->rx_ring[i]);
4423 * igb_setup_mrqc - configure the multiple receive queue control registers
4424 * @adapter: Board private structure
4426 static void igb_setup_mrqc(struct igb_adapter *adapter)
4428 struct e1000_hw *hw = &adapter->hw;
4430 u32 j, num_rx_queues;
4433 netdev_rss_key_fill(rss_key, sizeof(rss_key));
4434 for (j = 0; j < 10; j++)
4435 wr32(E1000_RSSRK(j), rss_key[j]);
4437 num_rx_queues = adapter->rss_queues;
4439 switch (hw->mac.type) {
4441 /* 82576 supports 2 RSS queues for SR-IOV */
4442 if (adapter->vfs_allocated_count)
4449 if (adapter->rss_indir_tbl_init != num_rx_queues) {
4450 for (j = 0; j < IGB_RETA_SIZE; j++)
4451 adapter->rss_indir_tbl[j] =
4452 (j * num_rx_queues) / IGB_RETA_SIZE;
4453 adapter->rss_indir_tbl_init = num_rx_queues;
4455 igb_write_rss_indir_tbl(adapter);
4457 /* Disable raw packet checksumming so that RSS hash is placed in
4458 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
4459 * offloads as they are enabled by default
4461 rxcsum = rd32(E1000_RXCSUM);
4462 rxcsum |= E1000_RXCSUM_PCSD;
4464 if (adapter->hw.mac.type >= e1000_82576)
4465 /* Enable Receive Checksum Offload for SCTP */
4466 rxcsum |= E1000_RXCSUM_CRCOFL;
4468 /* Don't need to set TUOFL or IPOFL, they default to 1 */
4469 wr32(E1000_RXCSUM, rxcsum);
4471 /* Generate RSS hash based on packet types, TCP/UDP
4472 * port numbers and/or IPv4/v6 src and dst addresses
4474 mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
4475 E1000_MRQC_RSS_FIELD_IPV4_TCP |
4476 E1000_MRQC_RSS_FIELD_IPV6 |
4477 E1000_MRQC_RSS_FIELD_IPV6_TCP |
4478 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
4480 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
4481 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
4482 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
4483 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
4485 /* If VMDq is enabled then we set the appropriate mode for that, else
4486 * we default to RSS so that an RSS hash is calculated per packet even
4487 * if we are only using one queue
4489 if (adapter->vfs_allocated_count) {
4490 if (hw->mac.type > e1000_82575) {
4491 /* Set the default pool for the PF's first queue */
4492 u32 vtctl = rd32(E1000_VT_CTL);
4494 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
4495 E1000_VT_CTL_DISABLE_DEF_POOL);
4496 vtctl |= adapter->vfs_allocated_count <<
4497 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
4498 wr32(E1000_VT_CTL, vtctl);
4500 if (adapter->rss_queues > 1)
4501 mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
4503 mrqc |= E1000_MRQC_ENABLE_VMDQ;
4505 mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
4507 igb_vmm_control(adapter);
4509 wr32(E1000_MRQC, mrqc);
4513 * igb_setup_rctl - configure the receive control registers
4514 * @adapter: Board private structure
4516 void igb_setup_rctl(struct igb_adapter *adapter)
4518 struct e1000_hw *hw = &adapter->hw;
4521 rctl = rd32(E1000_RCTL);
4523 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
4524 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
4526 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
4527 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4529 /* enable stripping of CRC. It's unlikely this will break BMC
4530 * redirection as it did with e1000. Newer features require
4531 * that the HW strips the CRC.
4533 rctl |= E1000_RCTL_SECRC;
4535 /* disable store bad packets and clear size bits. */
4536 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
4538 /* enable LPE to allow for reception of jumbo frames */
4539 rctl |= E1000_RCTL_LPE;
4541 /* disable queue 0 to prevent tail write w/o re-config */
4542 wr32(E1000_RXDCTL(0), 0);
4544 /* Attention!!! For SR-IOV PF driver operations you must enable
4545 * queue drop for all VF and PF queues to prevent head of line blocking
4546 * if an un-trusted VF does not provide descriptors to hardware.
4548 if (adapter->vfs_allocated_count) {
4549 /* set all queue drop enable bits */
4550 wr32(E1000_QDE, ALL_QUEUES);
4553 /* This is useful for sniffing bad packets. */
4554 if (adapter->netdev->features & NETIF_F_RXALL) {
4555 /* UPE and MPE will be handled by normal PROMISC logic
4556 * in e1000e_set_rx_mode
4558 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
4559 E1000_RCTL_BAM | /* RX All Bcast Pkts */
4560 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
4562 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
4563 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
4564 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
4565 * and that breaks VLANs.
4569 wr32(E1000_RCTL, rctl);
4572 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
4575 struct e1000_hw *hw = &adapter->hw;
4578 if (size > MAX_JUMBO_FRAME_SIZE)
4579 size = MAX_JUMBO_FRAME_SIZE;
4581 vmolr = rd32(E1000_VMOLR(vfn));
4582 vmolr &= ~E1000_VMOLR_RLPML_MASK;
4583 vmolr |= size | E1000_VMOLR_LPE;
4584 wr32(E1000_VMOLR(vfn), vmolr);
4589 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
4590 int vfn, bool enable)
4592 struct e1000_hw *hw = &adapter->hw;
4595 if (hw->mac.type < e1000_82576)
4598 if (hw->mac.type == e1000_i350)
4599 reg = E1000_DVMOLR(vfn);
4601 reg = E1000_VMOLR(vfn);
4605 val |= E1000_VMOLR_STRVLAN;
4607 val &= ~(E1000_VMOLR_STRVLAN);
4611 static inline void igb_set_vmolr(struct igb_adapter *adapter,
4614 struct e1000_hw *hw = &adapter->hw;
4617 /* This register exists only on 82576 and newer so if we are older then
4618 * we should exit and do nothing
4620 if (hw->mac.type < e1000_82576)
4623 vmolr = rd32(E1000_VMOLR(vfn));
4625 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
4627 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
4629 /* clear all bits that might not be set */
4630 vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
4632 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
4633 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
4634 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
4637 if (vfn <= adapter->vfs_allocated_count)
4638 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
4640 wr32(E1000_VMOLR(vfn), vmolr);
4644 * igb_setup_srrctl - configure the split and replication receive control
4646 * @adapter: Board private structure
4647 * @ring: receive ring to be configured
4649 void igb_setup_srrctl(struct igb_adapter *adapter, struct igb_ring *ring)
4651 struct e1000_hw *hw = &adapter->hw;
4652 int reg_idx = ring->reg_idx;
4655 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
4656 if (ring_uses_large_buffer(ring))
4657 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4659 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4660 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
4661 if (hw->mac.type >= e1000_82580)
4662 srrctl |= E1000_SRRCTL_TIMESTAMP;
4663 /* Only set Drop Enable if VFs allocated, or we are supporting multiple
4664 * queues and rx flow control is disabled
4666 if (adapter->vfs_allocated_count ||
4667 (!(hw->fc.current_mode & e1000_fc_rx_pause) &&
4668 adapter->num_rx_queues > 1))
4669 srrctl |= E1000_SRRCTL_DROP_EN;
4671 wr32(E1000_SRRCTL(reg_idx), srrctl);
4675 * igb_configure_rx_ring - Configure a receive ring after Reset
4676 * @adapter: board private structure
4677 * @ring: receive ring to be configured
4679 * Configure the Rx unit of the MAC after a reset.
4681 void igb_configure_rx_ring(struct igb_adapter *adapter,
4682 struct igb_ring *ring)
4684 struct e1000_hw *hw = &adapter->hw;
4685 union e1000_adv_rx_desc *rx_desc;
4686 u64 rdba = ring->dma;
4687 int reg_idx = ring->reg_idx;
4690 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4691 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4692 MEM_TYPE_PAGE_SHARED, NULL));
4694 /* disable the queue */
4695 wr32(E1000_RXDCTL(reg_idx), 0);
4697 /* Set DMA base address registers */
4698 wr32(E1000_RDBAL(reg_idx),
4699 rdba & 0x00000000ffffffffULL);
4700 wr32(E1000_RDBAH(reg_idx), rdba >> 32);
4701 wr32(E1000_RDLEN(reg_idx),
4702 ring->count * sizeof(union e1000_adv_rx_desc));
4704 /* initialize head and tail */
4705 ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
4706 wr32(E1000_RDH(reg_idx), 0);
4707 writel(0, ring->tail);
4709 /* set descriptor configuration */
4710 igb_setup_srrctl(adapter, ring);
4712 /* set filtering for VMDQ pools */
4713 igb_set_vmolr(adapter, reg_idx & 0x7, true);
4715 rxdctl |= IGB_RX_PTHRESH;
4716 rxdctl |= IGB_RX_HTHRESH << 8;
4717 rxdctl |= IGB_RX_WTHRESH << 16;
4719 /* initialize rx_buffer_info */
4720 memset(ring->rx_buffer_info, 0,
4721 sizeof(struct igb_rx_buffer) * ring->count);
4723 /* initialize Rx descriptor 0 */
4724 rx_desc = IGB_RX_DESC(ring, 0);
4725 rx_desc->wb.upper.length = 0;
4727 /* enable receive descriptor fetching */
4728 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
4729 wr32(E1000_RXDCTL(reg_idx), rxdctl);
4732 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
4733 struct igb_ring *rx_ring)
4735 #if (PAGE_SIZE < 8192)
4736 struct e1000_hw *hw = &adapter->hw;
4739 /* set build_skb and buffer size flags */
4740 clear_ring_build_skb_enabled(rx_ring);
4741 clear_ring_uses_large_buffer(rx_ring);
4743 if (adapter->flags & IGB_FLAG_RX_LEGACY)
4746 set_ring_build_skb_enabled(rx_ring);
4748 #if (PAGE_SIZE < 8192)
4749 if (adapter->max_frame_size > IGB_MAX_FRAME_BUILD_SKB ||
4750 rd32(E1000_RCTL) & E1000_RCTL_SBP)
4751 set_ring_uses_large_buffer(rx_ring);
4756 * igb_configure_rx - Configure receive Unit after Reset
4757 * @adapter: board private structure
4759 * Configure the Rx unit of the MAC after a reset.
4761 static void igb_configure_rx(struct igb_adapter *adapter)
4765 /* set the correct pool for the PF default MAC address in entry 0 */
4766 igb_set_default_mac_filter(adapter);
4768 /* Setup the HW Rx Head and Tail Descriptor Pointers and
4769 * the Base and Length of the Rx Descriptor Ring
4771 for (i = 0; i < adapter->num_rx_queues; i++) {
4772 struct igb_ring *rx_ring = adapter->rx_ring[i];
4774 igb_set_rx_buffer_len(adapter, rx_ring);
4775 igb_configure_rx_ring(adapter, rx_ring);
4780 * igb_free_tx_resources - Free Tx Resources per Queue
4781 * @tx_ring: Tx descriptor ring for a specific queue
4783 * Free all transmit software resources
4785 void igb_free_tx_resources(struct igb_ring *tx_ring)
4787 igb_clean_tx_ring(tx_ring);
4789 vfree(tx_ring->tx_buffer_info);
4790 tx_ring->tx_buffer_info = NULL;
4792 /* if not set, then don't free */
4796 dma_free_coherent(tx_ring->dev, tx_ring->size,
4797 tx_ring->desc, tx_ring->dma);
4799 tx_ring->desc = NULL;
4803 * igb_free_all_tx_resources - Free Tx Resources for All Queues
4804 * @adapter: board private structure
4806 * Free all transmit software resources
4808 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4812 for (i = 0; i < adapter->num_tx_queues; i++)
4813 if (adapter->tx_ring[i])
4814 igb_free_tx_resources(adapter->tx_ring[i]);
4818 * igb_clean_tx_ring - Free Tx Buffers
4819 * @tx_ring: ring to be cleaned
4821 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4823 u16 i = tx_ring->next_to_clean;
4824 struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
4826 while (i != tx_ring->next_to_use) {
4827 union e1000_adv_tx_desc *eop_desc, *tx_desc;
4829 /* Free all the Tx ring sk_buffs or xdp frames */
4830 if (tx_buffer->type == IGB_TYPE_SKB)
4831 dev_kfree_skb_any(tx_buffer->skb);
4833 xdp_return_frame(tx_buffer->xdpf);
4835 /* unmap skb header data */
4836 dma_unmap_single(tx_ring->dev,
4837 dma_unmap_addr(tx_buffer, dma),
4838 dma_unmap_len(tx_buffer, len),
4841 /* check for eop_desc to determine the end of the packet */
4842 eop_desc = tx_buffer->next_to_watch;
4843 tx_desc = IGB_TX_DESC(tx_ring, i);
4845 /* unmap remaining buffers */
4846 while (tx_desc != eop_desc) {
4850 if (unlikely(i == tx_ring->count)) {
4852 tx_buffer = tx_ring->tx_buffer_info;
4853 tx_desc = IGB_TX_DESC(tx_ring, 0);
4856 /* unmap any remaining paged data */
4857 if (dma_unmap_len(tx_buffer, len))
4858 dma_unmap_page(tx_ring->dev,
4859 dma_unmap_addr(tx_buffer, dma),
4860 dma_unmap_len(tx_buffer, len),
4864 tx_buffer->next_to_watch = NULL;
4866 /* move us one more past the eop_desc for start of next pkt */
4869 if (unlikely(i == tx_ring->count)) {
4871 tx_buffer = tx_ring->tx_buffer_info;
4875 /* reset BQL for queue */
4876 netdev_tx_reset_queue(txring_txq(tx_ring));
4878 /* reset next_to_use and next_to_clean */
4879 tx_ring->next_to_use = 0;
4880 tx_ring->next_to_clean = 0;
4884 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4885 * @adapter: board private structure
4887 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4891 for (i = 0; i < adapter->num_tx_queues; i++)
4892 if (adapter->tx_ring[i])
4893 igb_clean_tx_ring(adapter->tx_ring[i]);
4897 * igb_free_rx_resources - Free Rx Resources
4898 * @rx_ring: ring to clean the resources from
4900 * Free all receive software resources
4902 void igb_free_rx_resources(struct igb_ring *rx_ring)
4904 igb_clean_rx_ring(rx_ring);
4906 rx_ring->xdp_prog = NULL;
4907 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4908 vfree(rx_ring->rx_buffer_info);
4909 rx_ring->rx_buffer_info = NULL;
4911 /* if not set, then don't free */
4915 dma_free_coherent(rx_ring->dev, rx_ring->size,
4916 rx_ring->desc, rx_ring->dma);
4918 rx_ring->desc = NULL;
4922 * igb_free_all_rx_resources - Free Rx Resources for All Queues
4923 * @adapter: board private structure
4925 * Free all receive software resources
4927 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4931 for (i = 0; i < adapter->num_rx_queues; i++)
4932 if (adapter->rx_ring[i])
4933 igb_free_rx_resources(adapter->rx_ring[i]);
4937 * igb_clean_rx_ring - Free Rx Buffers per Queue
4938 * @rx_ring: ring to free buffers from
4940 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
4942 u16 i = rx_ring->next_to_clean;
4944 dev_kfree_skb(rx_ring->skb);
4945 rx_ring->skb = NULL;
4947 /* Free all the Rx ring sk_buffs */
4948 while (i != rx_ring->next_to_alloc) {
4949 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4951 /* Invalidate cache lines that may have been written to by
4952 * device so that we avoid corrupting memory.
4954 dma_sync_single_range_for_cpu(rx_ring->dev,
4956 buffer_info->page_offset,
4957 igb_rx_bufsz(rx_ring),
4960 /* free resources associated with mapping */
4961 dma_unmap_page_attrs(rx_ring->dev,
4963 igb_rx_pg_size(rx_ring),
4966 __page_frag_cache_drain(buffer_info->page,
4967 buffer_info->pagecnt_bias);
4970 if (i == rx_ring->count)
4974 rx_ring->next_to_alloc = 0;
4975 rx_ring->next_to_clean = 0;
4976 rx_ring->next_to_use = 0;
4980 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4981 * @adapter: board private structure
4983 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4987 for (i = 0; i < adapter->num_rx_queues; i++)
4988 if (adapter->rx_ring[i])
4989 igb_clean_rx_ring(adapter->rx_ring[i]);
4993 * igb_set_mac - Change the Ethernet Address of the NIC
4994 * @netdev: network interface device structure
4995 * @p: pointer to an address structure
4997 * Returns 0 on success, negative on failure
4999 static int igb_set_mac(struct net_device *netdev, void *p)
5001 struct igb_adapter *adapter = netdev_priv(netdev);
5002 struct e1000_hw *hw = &adapter->hw;
5003 struct sockaddr *addr = p;
5005 if (!is_valid_ether_addr(addr->sa_data))
5006 return -EADDRNOTAVAIL;
5008 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
5009 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
5011 /* set the correct pool for the new PF MAC address in entry 0 */
5012 igb_set_default_mac_filter(adapter);
5018 * igb_write_mc_addr_list - write multicast addresses to MTA
5019 * @netdev: network interface device structure
5021 * Writes multicast address list to the MTA hash table.
5022 * Returns: -ENOMEM on failure
5023 * 0 on no addresses written
5024 * X on writing X addresses to MTA
5026 static int igb_write_mc_addr_list(struct net_device *netdev)
5028 struct igb_adapter *adapter = netdev_priv(netdev);
5029 struct e1000_hw *hw = &adapter->hw;
5030 struct netdev_hw_addr *ha;
5034 if (netdev_mc_empty(netdev)) {
5035 /* nothing to program, so clear mc list */
5036 igb_update_mc_addr_list(hw, NULL, 0);
5037 igb_restore_vf_multicasts(adapter);
5041 mta_list = kcalloc(netdev_mc_count(netdev), 6, GFP_ATOMIC);
5045 /* The shared function expects a packed array of only addresses. */
5047 netdev_for_each_mc_addr(ha, netdev)
5048 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
5050 igb_update_mc_addr_list(hw, mta_list, i);
5053 return netdev_mc_count(netdev);
5056 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
5058 struct e1000_hw *hw = &adapter->hw;
5061 switch (hw->mac.type) {
5065 /* VLAN filtering needed for VLAN prio filter */
5066 if (adapter->netdev->features & NETIF_F_NTUPLE)
5072 /* VLAN filtering needed for pool filtering */
5073 if (adapter->vfs_allocated_count)
5080 /* We are already in VLAN promisc, nothing to do */
5081 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
5084 if (!adapter->vfs_allocated_count)
5087 /* Add PF to all active pools */
5088 pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5090 for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5091 u32 vlvf = rd32(E1000_VLVF(i));
5094 wr32(E1000_VLVF(i), vlvf);
5098 /* Set all bits in the VLAN filter table array */
5099 for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
5100 hw->mac.ops.write_vfta(hw, i, ~0U);
5102 /* Set flag so we don't redo unnecessary work */
5103 adapter->flags |= IGB_FLAG_VLAN_PROMISC;
5108 #define VFTA_BLOCK_SIZE 8
5109 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
5111 struct e1000_hw *hw = &adapter->hw;
5112 u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
5113 u32 vid_start = vfta_offset * 32;
5114 u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
5115 u32 i, vid, word, bits, pf_id;
5117 /* guarantee that we don't scrub out management VLAN */
5118 vid = adapter->mng_vlan_id;
5119 if (vid >= vid_start && vid < vid_end)
5120 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5122 if (!adapter->vfs_allocated_count)
5125 pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5127 for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5128 u32 vlvf = rd32(E1000_VLVF(i));
5130 /* pull VLAN ID from VLVF */
5131 vid = vlvf & VLAN_VID_MASK;
5133 /* only concern ourselves with a certain range */
5134 if (vid < vid_start || vid >= vid_end)
5137 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
5138 /* record VLAN ID in VFTA */
5139 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5141 /* if PF is part of this then continue */
5142 if (test_bit(vid, adapter->active_vlans))
5146 /* remove PF from the pool */
5148 bits &= rd32(E1000_VLVF(i));
5149 wr32(E1000_VLVF(i), bits);
5153 /* extract values from active_vlans and write back to VFTA */
5154 for (i = VFTA_BLOCK_SIZE; i--;) {
5155 vid = (vfta_offset + i) * 32;
5156 word = vid / BITS_PER_LONG;
5157 bits = vid % BITS_PER_LONG;
5159 vfta[i] |= adapter->active_vlans[word] >> bits;
5161 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
5165 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
5169 /* We are not in VLAN promisc, nothing to do */
5170 if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
5173 /* Set flag so we don't redo unnecessary work */
5174 adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
5176 for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
5177 igb_scrub_vfta(adapter, i);
5181 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
5182 * @netdev: network interface device structure
5184 * The set_rx_mode entry point is called whenever the unicast or multicast
5185 * address lists or the network interface flags are updated. This routine is
5186 * responsible for configuring the hardware for proper unicast, multicast,
5187 * promiscuous mode, and all-multi behavior.
5189 static void igb_set_rx_mode(struct net_device *netdev)
5191 struct igb_adapter *adapter = netdev_priv(netdev);
5192 struct e1000_hw *hw = &adapter->hw;
5193 unsigned int vfn = adapter->vfs_allocated_count;
5194 u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
5197 /* Check for Promiscuous and All Multicast modes */
5198 if (netdev->flags & IFF_PROMISC) {
5199 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
5200 vmolr |= E1000_VMOLR_MPME;
5202 /* enable use of UTA filter to force packets to default pool */
5203 if (hw->mac.type == e1000_82576)
5204 vmolr |= E1000_VMOLR_ROPE;
5206 if (netdev->flags & IFF_ALLMULTI) {
5207 rctl |= E1000_RCTL_MPE;
5208 vmolr |= E1000_VMOLR_MPME;
5210 /* Write addresses to the MTA, if the attempt fails
5211 * then we should just turn on promiscuous mode so
5212 * that we can at least receive multicast traffic
5214 count = igb_write_mc_addr_list(netdev);
5216 rctl |= E1000_RCTL_MPE;
5217 vmolr |= E1000_VMOLR_MPME;
5219 vmolr |= E1000_VMOLR_ROMPE;
5224 /* Write addresses to available RAR registers, if there is not
5225 * sufficient space to store all the addresses then enable
5226 * unicast promiscuous mode
5228 if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
5229 rctl |= E1000_RCTL_UPE;
5230 vmolr |= E1000_VMOLR_ROPE;
5233 /* enable VLAN filtering by default */
5234 rctl |= E1000_RCTL_VFE;
5236 /* disable VLAN filtering for modes that require it */
5237 if ((netdev->flags & IFF_PROMISC) ||
5238 (netdev->features & NETIF_F_RXALL)) {
5239 /* if we fail to set all rules then just clear VFE */
5240 if (igb_vlan_promisc_enable(adapter))
5241 rctl &= ~E1000_RCTL_VFE;
5243 igb_vlan_promisc_disable(adapter);
5246 /* update state of unicast, multicast, and VLAN filtering modes */
5247 rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
5249 wr32(E1000_RCTL, rctl);
5251 #if (PAGE_SIZE < 8192)
5252 if (!adapter->vfs_allocated_count) {
5253 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5254 rlpml = IGB_MAX_FRAME_BUILD_SKB;
5257 wr32(E1000_RLPML, rlpml);
5259 /* In order to support SR-IOV and eventually VMDq it is necessary to set
5260 * the VMOLR to enable the appropriate modes. Without this workaround
5261 * we will have issues with VLAN tag stripping not being done for frames
5262 * that are only arriving because we are the default pool
5264 if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
5267 /* set UTA to appropriate mode */
5268 igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
5270 vmolr |= rd32(E1000_VMOLR(vfn)) &
5271 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
5273 /* enable Rx jumbo frames, restrict as needed to support build_skb */
5274 vmolr &= ~E1000_VMOLR_RLPML_MASK;
5275 #if (PAGE_SIZE < 8192)
5276 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5277 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
5280 vmolr |= MAX_JUMBO_FRAME_SIZE;
5281 vmolr |= E1000_VMOLR_LPE;
5283 wr32(E1000_VMOLR(vfn), vmolr);
5285 igb_restore_vf_multicasts(adapter);
5288 static void igb_check_wvbr(struct igb_adapter *adapter)
5290 struct e1000_hw *hw = &adapter->hw;
5293 switch (hw->mac.type) {
5296 wvbr = rd32(E1000_WVBR);
5304 adapter->wvbr |= wvbr;
5307 #define IGB_STAGGERED_QUEUE_OFFSET 8
5309 static void igb_spoof_check(struct igb_adapter *adapter)
5316 for (j = 0; j < adapter->vfs_allocated_count; j++) {
5317 if (adapter->wvbr & BIT(j) ||
5318 adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
5319 dev_warn(&adapter->pdev->dev,
5320 "Spoof event(s) detected on VF %d\n", j);
5323 BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
5328 /* Need to wait a few seconds after link up to get diagnostic information from
5331 static void igb_update_phy_info(struct timer_list *t)
5333 struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
5334 igb_get_phy_info(&adapter->hw);
5338 * igb_has_link - check shared code for link and determine up/down
5339 * @adapter: pointer to driver private info
5341 bool igb_has_link(struct igb_adapter *adapter)
5343 struct e1000_hw *hw = &adapter->hw;
5344 bool link_active = false;
5346 /* get_link_status is set on LSC (link status) interrupt or
5347 * rx sequence error interrupt. get_link_status will stay
5348 * false until the e1000_check_for_link establishes link
5349 * for copper adapters ONLY
5351 switch (hw->phy.media_type) {
5352 case e1000_media_type_copper:
5353 if (!hw->mac.get_link_status)
5356 case e1000_media_type_internal_serdes:
5357 hw->mac.ops.check_for_link(hw);
5358 link_active = !hw->mac.get_link_status;
5361 case e1000_media_type_unknown:
5365 if (((hw->mac.type == e1000_i210) ||
5366 (hw->mac.type == e1000_i211)) &&
5367 (hw->phy.id == I210_I_PHY_ID)) {
5368 if (!netif_carrier_ok(adapter->netdev)) {
5369 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5370 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
5371 adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
5372 adapter->link_check_timeout = jiffies;
5379 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
5382 u32 ctrl_ext, thstat;
5384 /* check for thermal sensor event on i350 copper only */
5385 if (hw->mac.type == e1000_i350) {
5386 thstat = rd32(E1000_THSTAT);
5387 ctrl_ext = rd32(E1000_CTRL_EXT);
5389 if ((hw->phy.media_type == e1000_media_type_copper) &&
5390 !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
5391 ret = !!(thstat & event);
5398 * igb_check_lvmmc - check for malformed packets received
5399 * and indicated in LVMMC register
5400 * @adapter: pointer to adapter
5402 static void igb_check_lvmmc(struct igb_adapter *adapter)
5404 struct e1000_hw *hw = &adapter->hw;
5407 lvmmc = rd32(E1000_LVMMC);
5409 if (unlikely(net_ratelimit())) {
5410 netdev_warn(adapter->netdev,
5411 "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
5418 * igb_watchdog - Timer Call-back
5419 * @t: pointer to timer_list containing our private info pointer
5421 static void igb_watchdog(struct timer_list *t)
5423 struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5424 /* Do the rest outside of interrupt context */
5425 schedule_work(&adapter->watchdog_task);
5428 static void igb_watchdog_task(struct work_struct *work)
5430 struct igb_adapter *adapter = container_of(work,
5433 struct e1000_hw *hw = &adapter->hw;
5434 struct e1000_phy_info *phy = &hw->phy;
5435 struct net_device *netdev = adapter->netdev;
5439 u16 phy_data, retry_count = 20;
5441 link = igb_has_link(adapter);
5443 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
5444 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
5445 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5450 /* Force link down if we have fiber to swap to */
5451 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5452 if (hw->phy.media_type == e1000_media_type_copper) {
5453 connsw = rd32(E1000_CONNSW);
5454 if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
5459 /* Perform a reset if the media type changed. */
5460 if (hw->dev_spec._82575.media_changed) {
5461 hw->dev_spec._82575.media_changed = false;
5462 adapter->flags |= IGB_FLAG_MEDIA_RESET;
5465 /* Cancel scheduled suspend requests. */
5466 pm_runtime_resume(netdev->dev.parent);
5468 if (!netif_carrier_ok(netdev)) {
5471 hw->mac.ops.get_speed_and_duplex(hw,
5472 &adapter->link_speed,
5473 &adapter->link_duplex);
5475 ctrl = rd32(E1000_CTRL);
5476 /* Links status message must follow this format */
5478 "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5480 adapter->link_speed,
5481 adapter->link_duplex == FULL_DUPLEX ?
5483 (ctrl & E1000_CTRL_TFCE) &&
5484 (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
5485 (ctrl & E1000_CTRL_RFCE) ? "RX" :
5486 (ctrl & E1000_CTRL_TFCE) ? "TX" : "None");
5488 /* disable EEE if enabled */
5489 if ((adapter->flags & IGB_FLAG_EEE) &&
5490 (adapter->link_duplex == HALF_DUPLEX)) {
5491 dev_info(&adapter->pdev->dev,
5492 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
5493 adapter->hw.dev_spec._82575.eee_disable = true;
5494 adapter->flags &= ~IGB_FLAG_EEE;
5497 /* check if SmartSpeed worked */
5498 igb_check_downshift(hw);
5499 if (phy->speed_downgraded)
5500 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
5502 /* check for thermal sensor event */
5503 if (igb_thermal_sensor_event(hw,
5504 E1000_THSTAT_LINK_THROTTLE))
5505 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
5507 /* adjust timeout factor according to speed/duplex */
5508 adapter->tx_timeout_factor = 1;
5509 switch (adapter->link_speed) {
5511 adapter->tx_timeout_factor = 14;
5514 /* maybe add some timeout factor ? */
5518 if (adapter->link_speed != SPEED_1000 ||
5519 !hw->phy.ops.read_reg)
5522 /* wait for Remote receiver status OK */
5524 if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
5526 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
5530 goto retry_read_status;
5531 } else if (!retry_count) {
5532 dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
5535 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
5538 netif_carrier_on(netdev);
5540 igb_ping_all_vfs(adapter);
5541 igb_check_vf_rate_limit(adapter);
5543 /* link state has changed, schedule phy info update */
5544 if (!test_bit(__IGB_DOWN, &adapter->state))
5545 mod_timer(&adapter->phy_info_timer,
5546 round_jiffies(jiffies + 2 * HZ));
5549 if (netif_carrier_ok(netdev)) {
5550 adapter->link_speed = 0;
5551 adapter->link_duplex = 0;
5553 /* check for thermal sensor event */
5554 if (igb_thermal_sensor_event(hw,
5555 E1000_THSTAT_PWR_DOWN)) {
5556 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
5559 /* Links status message must follow this format */
5560 netdev_info(netdev, "igb: %s NIC Link is Down\n",
5562 netif_carrier_off(netdev);
5564 igb_ping_all_vfs(adapter);
5566 /* link state has changed, schedule phy info update */
5567 if (!test_bit(__IGB_DOWN, &adapter->state))
5568 mod_timer(&adapter->phy_info_timer,
5569 round_jiffies(jiffies + 2 * HZ));
5571 /* link is down, time to check for alternate media */
5572 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5573 igb_check_swap_media(adapter);
5574 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5575 schedule_work(&adapter->reset_task);
5576 /* return immediately */
5580 pm_schedule_suspend(netdev->dev.parent,
5583 /* also check for alternate media here */
5584 } else if (!netif_carrier_ok(netdev) &&
5585 (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
5586 igb_check_swap_media(adapter);
5587 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5588 schedule_work(&adapter->reset_task);
5589 /* return immediately */
5595 spin_lock(&adapter->stats64_lock);
5596 igb_update_stats(adapter);
5597 spin_unlock(&adapter->stats64_lock);
5599 for (i = 0; i < adapter->num_tx_queues; i++) {
5600 struct igb_ring *tx_ring = adapter->tx_ring[i];
5601 if (!netif_carrier_ok(netdev)) {
5602 /* We've lost link, so the controller stops DMA,
5603 * but we've got queued Tx work that's never going
5604 * to get done, so reset controller to flush Tx.
5605 * (Do the reset outside of interrupt context).
5607 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
5608 adapter->tx_timeout_count++;
5609 schedule_work(&adapter->reset_task);
5610 /* return immediately since reset is imminent */
5615 /* Force detection of hung controller every watchdog period */
5616 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5619 /* Cause software interrupt to ensure Rx ring is cleaned */
5620 if (adapter->flags & IGB_FLAG_HAS_MSIX) {
5623 for (i = 0; i < adapter->num_q_vectors; i++)
5624 eics |= adapter->q_vector[i]->eims_value;
5625 wr32(E1000_EICS, eics);
5627 wr32(E1000_ICS, E1000_ICS_RXDMT0);
5630 igb_spoof_check(adapter);
5631 igb_ptp_rx_hang(adapter);
5632 igb_ptp_tx_hang(adapter);
5634 /* Check LVMMC register on i350/i354 only */
5635 if ((adapter->hw.mac.type == e1000_i350) ||
5636 (adapter->hw.mac.type == e1000_i354))
5637 igb_check_lvmmc(adapter);
5639 /* Reset the timer */
5640 if (!test_bit(__IGB_DOWN, &adapter->state)) {
5641 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
5642 mod_timer(&adapter->watchdog_timer,
5643 round_jiffies(jiffies + HZ));
5645 mod_timer(&adapter->watchdog_timer,
5646 round_jiffies(jiffies + 2 * HZ));
5650 enum latency_range {
5654 latency_invalid = 255
5658 * igb_update_ring_itr - update the dynamic ITR value based on packet size
5659 * @q_vector: pointer to q_vector
5661 * Stores a new ITR value based on strictly on packet size. This
5662 * algorithm is less sophisticated than that used in igb_update_itr,
5663 * due to the difficulty of synchronizing statistics across multiple
5664 * receive rings. The divisors and thresholds used by this function
5665 * were determined based on theoretical maximum wire speed and testing
5666 * data, in order to minimize response time while increasing bulk
5668 * This functionality is controlled by ethtool's coalescing settings.
5669 * NOTE: This function is called only when operating in a multiqueue
5670 * receive environment.
5672 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
5674 int new_val = q_vector->itr_val;
5675 int avg_wire_size = 0;
5676 struct igb_adapter *adapter = q_vector->adapter;
5677 unsigned int packets;
5679 /* For non-gigabit speeds, just fix the interrupt rate at 4000
5680 * ints/sec - ITR timer value of 120 ticks.
5682 if (adapter->link_speed != SPEED_1000) {
5683 new_val = IGB_4K_ITR;
5687 packets = q_vector->rx.total_packets;
5689 avg_wire_size = q_vector->rx.total_bytes / packets;
5691 packets = q_vector->tx.total_packets;
5693 avg_wire_size = max_t(u32, avg_wire_size,
5694 q_vector->tx.total_bytes / packets);
5696 /* if avg_wire_size isn't set no work was done */
5700 /* Add 24 bytes to size to account for CRC, preamble, and gap */
5701 avg_wire_size += 24;
5703 /* Don't starve jumbo frames */
5704 avg_wire_size = min(avg_wire_size, 3000);
5706 /* Give a little boost to mid-size frames */
5707 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
5708 new_val = avg_wire_size / 3;
5710 new_val = avg_wire_size / 2;
5712 /* conservative mode (itr 3) eliminates the lowest_latency setting */
5713 if (new_val < IGB_20K_ITR &&
5714 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5715 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5716 new_val = IGB_20K_ITR;
5719 if (new_val != q_vector->itr_val) {
5720 q_vector->itr_val = new_val;
5721 q_vector->set_itr = 1;
5724 q_vector->rx.total_bytes = 0;
5725 q_vector->rx.total_packets = 0;
5726 q_vector->tx.total_bytes = 0;
5727 q_vector->tx.total_packets = 0;
5731 * igb_update_itr - update the dynamic ITR value based on statistics
5732 * @q_vector: pointer to q_vector
5733 * @ring_container: ring info to update the itr for
5735 * Stores a new ITR value based on packets and byte
5736 * counts during the last interrupt. The advantage of per interrupt
5737 * computation is faster updates and more accurate ITR for the current
5738 * traffic pattern. Constants in this function were computed
5739 * based on theoretical maximum wire speed and thresholds were set based
5740 * on testing data as well as attempting to minimize response time
5741 * while increasing bulk throughput.
5742 * This functionality is controlled by ethtool's coalescing settings.
5743 * NOTE: These calculations are only valid when operating in a single-
5744 * queue environment.
5746 static void igb_update_itr(struct igb_q_vector *q_vector,
5747 struct igb_ring_container *ring_container)
5749 unsigned int packets = ring_container->total_packets;
5750 unsigned int bytes = ring_container->total_bytes;
5751 u8 itrval = ring_container->itr;
5753 /* no packets, exit with status unchanged */
5758 case lowest_latency:
5759 /* handle TSO and jumbo frames */
5760 if (bytes/packets > 8000)
5761 itrval = bulk_latency;
5762 else if ((packets < 5) && (bytes > 512))
5763 itrval = low_latency;
5765 case low_latency: /* 50 usec aka 20000 ints/s */
5766 if (bytes > 10000) {
5767 /* this if handles the TSO accounting */
5768 if (bytes/packets > 8000)
5769 itrval = bulk_latency;
5770 else if ((packets < 10) || ((bytes/packets) > 1200))
5771 itrval = bulk_latency;
5772 else if ((packets > 35))
5773 itrval = lowest_latency;
5774 } else if (bytes/packets > 2000) {
5775 itrval = bulk_latency;
5776 } else if (packets <= 2 && bytes < 512) {
5777 itrval = lowest_latency;
5780 case bulk_latency: /* 250 usec aka 4000 ints/s */
5781 if (bytes > 25000) {
5783 itrval = low_latency;
5784 } else if (bytes < 1500) {
5785 itrval = low_latency;
5790 /* clear work counters since we have the values we need */
5791 ring_container->total_bytes = 0;
5792 ring_container->total_packets = 0;
5794 /* write updated itr to ring container */
5795 ring_container->itr = itrval;
5798 static void igb_set_itr(struct igb_q_vector *q_vector)
5800 struct igb_adapter *adapter = q_vector->adapter;
5801 u32 new_itr = q_vector->itr_val;
5804 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5805 if (adapter->link_speed != SPEED_1000) {
5807 new_itr = IGB_4K_ITR;
5811 igb_update_itr(q_vector, &q_vector->tx);
5812 igb_update_itr(q_vector, &q_vector->rx);
5814 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5816 /* conservative mode (itr 3) eliminates the lowest_latency setting */
5817 if (current_itr == lowest_latency &&
5818 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5819 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5820 current_itr = low_latency;
5822 switch (current_itr) {
5823 /* counts and packets in update_itr are dependent on these numbers */
5824 case lowest_latency:
5825 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5828 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5831 new_itr = IGB_4K_ITR; /* 4,000 ints/sec */
5838 if (new_itr != q_vector->itr_val) {
5839 /* this attempts to bias the interrupt rate towards Bulk
5840 * by adding intermediate steps when interrupt rate is
5843 new_itr = new_itr > q_vector->itr_val ?
5844 max((new_itr * q_vector->itr_val) /
5845 (new_itr + (q_vector->itr_val >> 2)),
5847 /* Don't write the value here; it resets the adapter's
5848 * internal timer, and causes us to delay far longer than
5849 * we should between interrupts. Instead, we write the ITR
5850 * value at the beginning of the next interrupt so the timing
5851 * ends up being correct.
5853 q_vector->itr_val = new_itr;
5854 q_vector->set_itr = 1;
5858 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring,
5859 struct igb_tx_buffer *first,
5860 u32 vlan_macip_lens, u32 type_tucmd,
5863 struct e1000_adv_tx_context_desc *context_desc;
5864 u16 i = tx_ring->next_to_use;
5865 struct timespec64 ts;
5867 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5870 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5872 /* set bits to identify this as an advanced context descriptor */
5873 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5875 /* For 82575, context index must be unique per ring. */
5876 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5877 mss_l4len_idx |= tx_ring->reg_idx << 4;
5879 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5880 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
5881 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
5883 /* We assume there is always a valid tx time available. Invalid times
5884 * should have been handled by the upper layers.
5886 if (tx_ring->launchtime_enable) {
5887 ts = ktime_to_timespec64(first->skb->tstamp);
5888 skb_txtime_consumed(first->skb);
5889 context_desc->seqnum_seed = cpu_to_le32(ts.tv_nsec / 32);
5891 context_desc->seqnum_seed = 0;
5895 static int igb_tso(struct igb_ring *tx_ring,
5896 struct igb_tx_buffer *first,
5899 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
5900 struct sk_buff *skb = first->skb;
5911 u32 paylen, l4_offset;
5914 if (skb->ip_summed != CHECKSUM_PARTIAL)
5917 if (!skb_is_gso(skb))
5920 err = skb_cow_head(skb, 0);
5924 ip.hdr = skb_network_header(skb);
5925 l4.hdr = skb_checksum_start(skb);
5927 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5928 type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ?
5929 E1000_ADVTXD_TUCMD_L4T_UDP : E1000_ADVTXD_TUCMD_L4T_TCP;
5931 /* initialize outer IP header fields */
5932 if (ip.v4->version == 4) {
5933 unsigned char *csum_start = skb_checksum_start(skb);
5934 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
5936 /* IP header will have to cancel out any data that
5937 * is not a part of the outer IP header
5939 ip.v4->check = csum_fold(csum_partial(trans_start,
5940 csum_start - trans_start,
5942 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5945 first->tx_flags |= IGB_TX_FLAGS_TSO |
5949 ip.v6->payload_len = 0;
5950 first->tx_flags |= IGB_TX_FLAGS_TSO |
5954 /* determine offset of inner transport header */
5955 l4_offset = l4.hdr - skb->data;
5957 /* remove payload length from inner checksum */
5958 paylen = skb->len - l4_offset;
5959 if (type_tucmd & E1000_ADVTXD_TUCMD_L4T_TCP) {
5960 /* compute length of segmentation header */
5961 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
5962 csum_replace_by_diff(&l4.tcp->check,
5963 (__force __wsum)htonl(paylen));
5965 /* compute length of segmentation header */
5966 *hdr_len = sizeof(*l4.udp) + l4_offset;
5967 csum_replace_by_diff(&l4.udp->check,
5968 (__force __wsum)htonl(paylen));
5971 /* update gso size and bytecount with header size */
5972 first->gso_segs = skb_shinfo(skb)->gso_segs;
5973 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5976 mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
5977 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5979 /* VLAN MACLEN IPLEN */
5980 vlan_macip_lens = l4.hdr - ip.hdr;
5981 vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
5982 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5984 igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens,
5985 type_tucmd, mss_l4len_idx);
5990 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff *skb)
5992 unsigned int offset = 0;
5994 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
5996 return offset == skb_checksum_start_offset(skb);
5999 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
6001 struct sk_buff *skb = first->skb;
6002 u32 vlan_macip_lens = 0;
6005 if (skb->ip_summed != CHECKSUM_PARTIAL) {
6007 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN) &&
6008 !tx_ring->launchtime_enable)
6013 switch (skb->csum_offset) {
6014 case offsetof(struct tcphdr, check):
6015 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
6017 case offsetof(struct udphdr, check):
6019 case offsetof(struct sctphdr, checksum):
6020 /* validate that this is actually an SCTP request */
6021 if (((first->protocol == htons(ETH_P_IP)) &&
6022 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
6023 ((first->protocol == htons(ETH_P_IPV6)) &&
6024 igb_ipv6_csum_is_sctp(skb))) {
6025 type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
6030 skb_checksum_help(skb);
6034 /* update TX checksum flag */
6035 first->tx_flags |= IGB_TX_FLAGS_CSUM;
6036 vlan_macip_lens = skb_checksum_start_offset(skb) -
6037 skb_network_offset(skb);
6039 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
6040 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
6042 igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens, type_tucmd, 0);
6045 #define IGB_SET_FLAG(_input, _flag, _result) \
6046 ((_flag <= _result) ? \
6047 ((u32)(_input & _flag) * (_result / _flag)) : \
6048 ((u32)(_input & _flag) / (_flag / _result)))
6050 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6052 /* set type for advanced descriptor with frame checksum insertion */
6053 u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
6054 E1000_ADVTXD_DCMD_DEXT |
6055 E1000_ADVTXD_DCMD_IFCS;
6057 /* set HW vlan bit if vlan is present */
6058 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
6059 (E1000_ADVTXD_DCMD_VLE));
6061 /* set segmentation bits for TSO */
6062 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
6063 (E1000_ADVTXD_DCMD_TSE));
6065 /* set timestamp bit if present */
6066 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
6067 (E1000_ADVTXD_MAC_TSTAMP));
6069 /* insert frame checksum */
6070 cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
6075 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
6076 union e1000_adv_tx_desc *tx_desc,
6077 u32 tx_flags, unsigned int paylen)
6079 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
6081 /* 82575 requires a unique index per ring */
6082 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6083 olinfo_status |= tx_ring->reg_idx << 4;
6085 /* insert L4 checksum */
6086 olinfo_status |= IGB_SET_FLAG(tx_flags,
6088 (E1000_TXD_POPTS_TXSM << 8));
6090 /* insert IPv4 checksum */
6091 olinfo_status |= IGB_SET_FLAG(tx_flags,
6093 (E1000_TXD_POPTS_IXSM << 8));
6095 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6098 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6100 struct net_device *netdev = tx_ring->netdev;
6102 netif_stop_subqueue(netdev, tx_ring->queue_index);
6104 /* Herbert's original patch had:
6105 * smp_mb__after_netif_stop_queue();
6106 * but since that doesn't exist yet, just open code it.
6110 /* We need to check again in a case another CPU has just
6111 * made room available.
6113 if (igb_desc_unused(tx_ring) < size)
6117 netif_wake_subqueue(netdev, tx_ring->queue_index);
6119 u64_stats_update_begin(&tx_ring->tx_syncp2);
6120 tx_ring->tx_stats.restart_queue2++;
6121 u64_stats_update_end(&tx_ring->tx_syncp2);
6126 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6128 if (igb_desc_unused(tx_ring) >= size)
6130 return __igb_maybe_stop_tx(tx_ring, size);
6133 static int igb_tx_map(struct igb_ring *tx_ring,
6134 struct igb_tx_buffer *first,
6137 struct sk_buff *skb = first->skb;
6138 struct igb_tx_buffer *tx_buffer;
6139 union e1000_adv_tx_desc *tx_desc;
6142 unsigned int data_len, size;
6143 u32 tx_flags = first->tx_flags;
6144 u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
6145 u16 i = tx_ring->next_to_use;
6147 tx_desc = IGB_TX_DESC(tx_ring, i);
6149 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
6151 size = skb_headlen(skb);
6152 data_len = skb->data_len;
6154 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6158 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6159 if (dma_mapping_error(tx_ring->dev, dma))
6162 /* record length, and DMA address */
6163 dma_unmap_len_set(tx_buffer, len, size);
6164 dma_unmap_addr_set(tx_buffer, dma, dma);
6166 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6168 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
6169 tx_desc->read.cmd_type_len =
6170 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
6174 if (i == tx_ring->count) {
6175 tx_desc = IGB_TX_DESC(tx_ring, 0);
6178 tx_desc->read.olinfo_status = 0;
6180 dma += IGB_MAX_DATA_PER_TXD;
6181 size -= IGB_MAX_DATA_PER_TXD;
6183 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6186 if (likely(!data_len))
6189 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6193 if (i == tx_ring->count) {
6194 tx_desc = IGB_TX_DESC(tx_ring, 0);
6197 tx_desc->read.olinfo_status = 0;
6199 size = skb_frag_size(frag);
6202 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
6203 size, DMA_TO_DEVICE);
6205 tx_buffer = &tx_ring->tx_buffer_info[i];
6208 /* write last descriptor with RS and EOP bits */
6209 cmd_type |= size | IGB_TXD_DCMD;
6210 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6212 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6214 /* set the timestamp */
6215 first->time_stamp = jiffies;
6217 skb_tx_timestamp(skb);
6219 /* Force memory writes to complete before letting h/w know there
6220 * are new descriptors to fetch. (Only applicable for weak-ordered
6221 * memory model archs, such as IA-64).
6223 * We also need this memory barrier to make certain all of the
6224 * status bits have been updated before next_to_watch is written.
6228 /* set next_to_watch value indicating a packet is present */
6229 first->next_to_watch = tx_desc;
6232 if (i == tx_ring->count)
6235 tx_ring->next_to_use = i;
6237 /* Make sure there is space in the ring for the next send. */
6238 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6240 if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
6241 writel(i, tx_ring->tail);
6246 dev_err(tx_ring->dev, "TX DMA map failed\n");
6247 tx_buffer = &tx_ring->tx_buffer_info[i];
6249 /* clear dma mappings for failed tx_buffer_info map */
6250 while (tx_buffer != first) {
6251 if (dma_unmap_len(tx_buffer, len))
6252 dma_unmap_page(tx_ring->dev,
6253 dma_unmap_addr(tx_buffer, dma),
6254 dma_unmap_len(tx_buffer, len),
6256 dma_unmap_len_set(tx_buffer, len, 0);
6259 i += tx_ring->count;
6260 tx_buffer = &tx_ring->tx_buffer_info[i];
6263 if (dma_unmap_len(tx_buffer, len))
6264 dma_unmap_single(tx_ring->dev,
6265 dma_unmap_addr(tx_buffer, dma),
6266 dma_unmap_len(tx_buffer, len),
6268 dma_unmap_len_set(tx_buffer, len, 0);
6270 dev_kfree_skb_any(tx_buffer->skb);
6271 tx_buffer->skb = NULL;
6273 tx_ring->next_to_use = i;
6278 int igb_xmit_xdp_ring(struct igb_adapter *adapter,
6279 struct igb_ring *tx_ring,
6280 struct xdp_frame *xdpf)
6282 union e1000_adv_tx_desc *tx_desc;
6283 u32 len, cmd_type, olinfo_status;
6284 struct igb_tx_buffer *tx_buffer;
6290 if (unlikely(!igb_desc_unused(tx_ring)))
6291 return IGB_XDP_CONSUMED;
6293 dma = dma_map_single(tx_ring->dev, xdpf->data, len, DMA_TO_DEVICE);
6294 if (dma_mapping_error(tx_ring->dev, dma))
6295 return IGB_XDP_CONSUMED;
6297 /* record the location of the first descriptor for this packet */
6298 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6299 tx_buffer->bytecount = len;
6300 tx_buffer->gso_segs = 1;
6301 tx_buffer->protocol = 0;
6303 i = tx_ring->next_to_use;
6304 tx_desc = IGB_TX_DESC(tx_ring, i);
6306 dma_unmap_len_set(tx_buffer, len, len);
6307 dma_unmap_addr_set(tx_buffer, dma, dma);
6308 tx_buffer->type = IGB_TYPE_XDP;
6309 tx_buffer->xdpf = xdpf;
6311 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6313 /* put descriptor type bits */
6314 cmd_type = E1000_ADVTXD_DTYP_DATA |
6315 E1000_ADVTXD_DCMD_DEXT |
6316 E1000_ADVTXD_DCMD_IFCS;
6317 cmd_type |= len | IGB_TXD_DCMD;
6318 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6320 olinfo_status = len << E1000_ADVTXD_PAYLEN_SHIFT;
6321 /* 82575 requires a unique index per ring */
6322 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6323 olinfo_status |= tx_ring->reg_idx << 4;
6325 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6327 netdev_tx_sent_queue(txring_txq(tx_ring), tx_buffer->bytecount);
6329 /* set the timestamp */
6330 tx_buffer->time_stamp = jiffies;
6332 /* Avoid any potential race with xdp_xmit and cleanup */
6335 /* set next_to_watch value indicating a packet is present */
6337 if (i == tx_ring->count)
6340 tx_buffer->next_to_watch = tx_desc;
6341 tx_ring->next_to_use = i;
6343 /* Make sure there is space in the ring for the next send. */
6344 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6346 if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more())
6347 writel(i, tx_ring->tail);
6352 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
6353 struct igb_ring *tx_ring)
6355 struct igb_tx_buffer *first;
6359 u16 count = TXD_USE_COUNT(skb_headlen(skb));
6360 __be16 protocol = vlan_get_protocol(skb);
6363 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
6364 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
6365 * + 2 desc gap to keep tail from touching head,
6366 * + 1 desc for context descriptor,
6367 * otherwise try next time
6369 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6370 count += TXD_USE_COUNT(skb_frag_size(
6371 &skb_shinfo(skb)->frags[f]));
6373 if (igb_maybe_stop_tx(tx_ring, count + 3)) {
6374 /* this is a hard error */
6375 return NETDEV_TX_BUSY;
6378 /* record the location of the first descriptor for this packet */
6379 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6380 first->type = IGB_TYPE_SKB;
6382 first->bytecount = skb->len;
6383 first->gso_segs = 1;
6385 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6386 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6388 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
6389 !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
6391 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6392 tx_flags |= IGB_TX_FLAGS_TSTAMP;
6394 adapter->ptp_tx_skb = skb_get(skb);
6395 adapter->ptp_tx_start = jiffies;
6396 if (adapter->hw.mac.type == e1000_82576)
6397 schedule_work(&adapter->ptp_tx_work);
6399 adapter->tx_hwtstamp_skipped++;
6403 if (skb_vlan_tag_present(skb)) {
6404 tx_flags |= IGB_TX_FLAGS_VLAN;
6405 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
6408 /* record initial flags and protocol */
6409 first->tx_flags = tx_flags;
6410 first->protocol = protocol;
6412 tso = igb_tso(tx_ring, first, &hdr_len);
6416 igb_tx_csum(tx_ring, first);
6418 if (igb_tx_map(tx_ring, first, hdr_len))
6419 goto cleanup_tx_tstamp;
6421 return NETDEV_TX_OK;
6424 dev_kfree_skb_any(first->skb);
6427 if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
6428 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6430 dev_kfree_skb_any(adapter->ptp_tx_skb);
6431 adapter->ptp_tx_skb = NULL;
6432 if (adapter->hw.mac.type == e1000_82576)
6433 cancel_work_sync(&adapter->ptp_tx_work);
6434 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
6437 return NETDEV_TX_OK;
6440 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
6441 struct sk_buff *skb)
6443 unsigned int r_idx = skb->queue_mapping;
6445 if (r_idx >= adapter->num_tx_queues)
6446 r_idx = r_idx % adapter->num_tx_queues;
6448 return adapter->tx_ring[r_idx];
6451 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
6452 struct net_device *netdev)
6454 struct igb_adapter *adapter = netdev_priv(netdev);
6456 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
6457 * in order to meet this minimum size requirement.
6459 if (skb_put_padto(skb, 17))
6460 return NETDEV_TX_OK;
6462 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
6466 * igb_tx_timeout - Respond to a Tx Hang
6467 * @netdev: network interface device structure
6468 * @txqueue: number of the Tx queue that hung (unused)
6470 static void igb_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
6472 struct igb_adapter *adapter = netdev_priv(netdev);
6473 struct e1000_hw *hw = &adapter->hw;
6475 /* Do the reset outside of interrupt context */
6476 adapter->tx_timeout_count++;
6478 if (hw->mac.type >= e1000_82580)
6479 hw->dev_spec._82575.global_device_reset = true;
6481 schedule_work(&adapter->reset_task);
6483 (adapter->eims_enable_mask & ~adapter->eims_other));
6486 static void igb_reset_task(struct work_struct *work)
6488 struct igb_adapter *adapter;
6489 adapter = container_of(work, struct igb_adapter, reset_task);
6492 /* If we're already down or resetting, just bail */
6493 if (test_bit(__IGB_DOWN, &adapter->state) ||
6494 test_bit(__IGB_RESETTING, &adapter->state)) {
6500 netdev_err(adapter->netdev, "Reset adapter\n");
6501 igb_reinit_locked(adapter);
6506 * igb_get_stats64 - Get System Network Statistics
6507 * @netdev: network interface device structure
6508 * @stats: rtnl_link_stats64 pointer
6510 static void igb_get_stats64(struct net_device *netdev,
6511 struct rtnl_link_stats64 *stats)
6513 struct igb_adapter *adapter = netdev_priv(netdev);
6515 spin_lock(&adapter->stats64_lock);
6516 igb_update_stats(adapter);
6517 memcpy(stats, &adapter->stats64, sizeof(*stats));
6518 spin_unlock(&adapter->stats64_lock);
6522 * igb_change_mtu - Change the Maximum Transfer Unit
6523 * @netdev: network interface device structure
6524 * @new_mtu: new value for maximum frame size
6526 * Returns 0 on success, negative on failure
6528 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
6530 struct igb_adapter *adapter = netdev_priv(netdev);
6531 int max_frame = new_mtu + IGB_ETH_PKT_HDR_PAD;
6533 if (adapter->xdp_prog) {
6536 for (i = 0; i < adapter->num_rx_queues; i++) {
6537 struct igb_ring *ring = adapter->rx_ring[i];
6539 if (max_frame > igb_rx_bufsz(ring)) {
6540 netdev_warn(adapter->netdev,
6541 "Requested MTU size is not supported with XDP. Max frame size is %d\n",
6548 /* adjust max frame to be at least the size of a standard frame */
6549 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
6550 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
6552 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
6553 usleep_range(1000, 2000);
6555 /* igb_down has a dependency on max_frame_size */
6556 adapter->max_frame_size = max_frame;
6558 if (netif_running(netdev))
6561 netdev_dbg(netdev, "changing MTU from %d to %d\n",
6562 netdev->mtu, new_mtu);
6563 netdev->mtu = new_mtu;
6565 if (netif_running(netdev))
6570 clear_bit(__IGB_RESETTING, &adapter->state);
6576 * igb_update_stats - Update the board statistics counters
6577 * @adapter: board private structure
6579 void igb_update_stats(struct igb_adapter *adapter)
6581 struct rtnl_link_stats64 *net_stats = &adapter->stats64;
6582 struct e1000_hw *hw = &adapter->hw;
6583 struct pci_dev *pdev = adapter->pdev;
6588 u64 _bytes, _packets;
6590 /* Prevent stats update while adapter is being reset, or if the pci
6591 * connection is down.
6593 if (adapter->link_speed == 0)
6595 if (pci_channel_offline(pdev))
6602 for (i = 0; i < adapter->num_rx_queues; i++) {
6603 struct igb_ring *ring = adapter->rx_ring[i];
6604 u32 rqdpc = rd32(E1000_RQDPC(i));
6605 if (hw->mac.type >= e1000_i210)
6606 wr32(E1000_RQDPC(i), 0);
6609 ring->rx_stats.drops += rqdpc;
6610 net_stats->rx_fifo_errors += rqdpc;
6614 start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
6615 _bytes = ring->rx_stats.bytes;
6616 _packets = ring->rx_stats.packets;
6617 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
6619 packets += _packets;
6622 net_stats->rx_bytes = bytes;
6623 net_stats->rx_packets = packets;
6627 for (i = 0; i < adapter->num_tx_queues; i++) {
6628 struct igb_ring *ring = adapter->tx_ring[i];
6630 start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
6631 _bytes = ring->tx_stats.bytes;
6632 _packets = ring->tx_stats.packets;
6633 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
6635 packets += _packets;
6637 net_stats->tx_bytes = bytes;
6638 net_stats->tx_packets = packets;
6641 /* read stats registers */
6642 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
6643 adapter->stats.gprc += rd32(E1000_GPRC);
6644 adapter->stats.gorc += rd32(E1000_GORCL);
6645 rd32(E1000_GORCH); /* clear GORCL */
6646 adapter->stats.bprc += rd32(E1000_BPRC);
6647 adapter->stats.mprc += rd32(E1000_MPRC);
6648 adapter->stats.roc += rd32(E1000_ROC);
6650 adapter->stats.prc64 += rd32(E1000_PRC64);
6651 adapter->stats.prc127 += rd32(E1000_PRC127);
6652 adapter->stats.prc255 += rd32(E1000_PRC255);
6653 adapter->stats.prc511 += rd32(E1000_PRC511);
6654 adapter->stats.prc1023 += rd32(E1000_PRC1023);
6655 adapter->stats.prc1522 += rd32(E1000_PRC1522);
6656 adapter->stats.symerrs += rd32(E1000_SYMERRS);
6657 adapter->stats.sec += rd32(E1000_SEC);
6659 mpc = rd32(E1000_MPC);
6660 adapter->stats.mpc += mpc;
6661 net_stats->rx_fifo_errors += mpc;
6662 adapter->stats.scc += rd32(E1000_SCC);
6663 adapter->stats.ecol += rd32(E1000_ECOL);
6664 adapter->stats.mcc += rd32(E1000_MCC);
6665 adapter->stats.latecol += rd32(E1000_LATECOL);
6666 adapter->stats.dc += rd32(E1000_DC);
6667 adapter->stats.rlec += rd32(E1000_RLEC);
6668 adapter->stats.xonrxc += rd32(E1000_XONRXC);
6669 adapter->stats.xontxc += rd32(E1000_XONTXC);
6670 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
6671 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
6672 adapter->stats.fcruc += rd32(E1000_FCRUC);
6673 adapter->stats.gptc += rd32(E1000_GPTC);
6674 adapter->stats.gotc += rd32(E1000_GOTCL);
6675 rd32(E1000_GOTCH); /* clear GOTCL */
6676 adapter->stats.rnbc += rd32(E1000_RNBC);
6677 adapter->stats.ruc += rd32(E1000_RUC);
6678 adapter->stats.rfc += rd32(E1000_RFC);
6679 adapter->stats.rjc += rd32(E1000_RJC);
6680 adapter->stats.tor += rd32(E1000_TORH);
6681 adapter->stats.tot += rd32(E1000_TOTH);
6682 adapter->stats.tpr += rd32(E1000_TPR);
6684 adapter->stats.ptc64 += rd32(E1000_PTC64);
6685 adapter->stats.ptc127 += rd32(E1000_PTC127);
6686 adapter->stats.ptc255 += rd32(E1000_PTC255);
6687 adapter->stats.ptc511 += rd32(E1000_PTC511);
6688 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
6689 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
6691 adapter->stats.mptc += rd32(E1000_MPTC);
6692 adapter->stats.bptc += rd32(E1000_BPTC);
6694 adapter->stats.tpt += rd32(E1000_TPT);
6695 adapter->stats.colc += rd32(E1000_COLC);
6697 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
6698 /* read internal phy specific stats */
6699 reg = rd32(E1000_CTRL_EXT);
6700 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
6701 adapter->stats.rxerrc += rd32(E1000_RXERRC);
6703 /* this stat has invalid values on i210/i211 */
6704 if ((hw->mac.type != e1000_i210) &&
6705 (hw->mac.type != e1000_i211))
6706 adapter->stats.tncrs += rd32(E1000_TNCRS);
6709 adapter->stats.tsctc += rd32(E1000_TSCTC);
6710 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
6712 adapter->stats.iac += rd32(E1000_IAC);
6713 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
6714 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
6715 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
6716 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
6717 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
6718 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
6719 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
6720 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
6722 /* Fill out the OS statistics structure */
6723 net_stats->multicast = adapter->stats.mprc;
6724 net_stats->collisions = adapter->stats.colc;
6728 /* RLEC on some newer hardware can be incorrect so build
6729 * our own version based on RUC and ROC
6731 net_stats->rx_errors = adapter->stats.rxerrc +
6732 adapter->stats.crcerrs + adapter->stats.algnerrc +
6733 adapter->stats.ruc + adapter->stats.roc +
6734 adapter->stats.cexterr;
6735 net_stats->rx_length_errors = adapter->stats.ruc +
6737 net_stats->rx_crc_errors = adapter->stats.crcerrs;
6738 net_stats->rx_frame_errors = adapter->stats.algnerrc;
6739 net_stats->rx_missed_errors = adapter->stats.mpc;
6742 net_stats->tx_errors = adapter->stats.ecol +
6743 adapter->stats.latecol;
6744 net_stats->tx_aborted_errors = adapter->stats.ecol;
6745 net_stats->tx_window_errors = adapter->stats.latecol;
6746 net_stats->tx_carrier_errors = adapter->stats.tncrs;
6748 /* Tx Dropped needs to be maintained elsewhere */
6750 /* Management Stats */
6751 adapter->stats.mgptc += rd32(E1000_MGTPTC);
6752 adapter->stats.mgprc += rd32(E1000_MGTPRC);
6753 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
6756 reg = rd32(E1000_MANC);
6757 if (reg & E1000_MANC_EN_BMC2OS) {
6758 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
6759 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
6760 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
6761 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
6765 static void igb_perout(struct igb_adapter *adapter, int tsintr_tt)
6767 int pin = ptp_find_pin(adapter->ptp_clock, PTP_PF_PEROUT, tsintr_tt);
6768 struct e1000_hw *hw = &adapter->hw;
6769 struct timespec64 ts;
6772 if (pin < 0 || pin >= IGB_N_PEROUT)
6775 spin_lock(&adapter->tmreg_lock);
6776 ts = timespec64_add(adapter->perout[pin].start,
6777 adapter->perout[pin].period);
6778 /* u32 conversion of tv_sec is safe until y2106 */
6779 wr32((tsintr_tt == 1) ? E1000_TRGTTIML1 : E1000_TRGTTIML0, ts.tv_nsec);
6780 wr32((tsintr_tt == 1) ? E1000_TRGTTIMH1 : E1000_TRGTTIMH0, (u32)ts.tv_sec);
6781 tsauxc = rd32(E1000_TSAUXC);
6782 tsauxc |= TSAUXC_EN_TT0;
6783 wr32(E1000_TSAUXC, tsauxc);
6784 adapter->perout[pin].start = ts;
6785 spin_unlock(&adapter->tmreg_lock);
6788 static void igb_extts(struct igb_adapter *adapter, int tsintr_tt)
6790 int pin = ptp_find_pin(adapter->ptp_clock, PTP_PF_EXTTS, tsintr_tt);
6791 struct e1000_hw *hw = &adapter->hw;
6792 struct ptp_clock_event event;
6795 if (pin < 0 || pin >= IGB_N_EXTTS)
6798 nsec = rd32((tsintr_tt == 1) ? E1000_AUXSTMPL1 : E1000_AUXSTMPL0);
6799 sec = rd32((tsintr_tt == 1) ? E1000_AUXSTMPH1 : E1000_AUXSTMPH0);
6800 event.type = PTP_CLOCK_EXTTS;
6801 event.index = tsintr_tt;
6802 event.timestamp = sec * 1000000000ULL + nsec;
6803 ptp_clock_event(adapter->ptp_clock, &event);
6806 static void igb_tsync_interrupt(struct igb_adapter *adapter)
6808 struct e1000_hw *hw = &adapter->hw;
6809 u32 tsicr = rd32(E1000_TSICR);
6810 struct ptp_clock_event event;
6812 if (tsicr & TSINTR_SYS_WRAP) {
6813 event.type = PTP_CLOCK_PPS;
6814 if (adapter->ptp_caps.pps)
6815 ptp_clock_event(adapter->ptp_clock, &event);
6818 if (tsicr & E1000_TSICR_TXTS) {
6819 /* retrieve hardware timestamp */
6820 schedule_work(&adapter->ptp_tx_work);
6823 if (tsicr & TSINTR_TT0)
6824 igb_perout(adapter, 0);
6826 if (tsicr & TSINTR_TT1)
6827 igb_perout(adapter, 1);
6829 if (tsicr & TSINTR_AUTT0)
6830 igb_extts(adapter, 0);
6832 if (tsicr & TSINTR_AUTT1)
6833 igb_extts(adapter, 1);
6836 static irqreturn_t igb_msix_other(int irq, void *data)
6838 struct igb_adapter *adapter = data;
6839 struct e1000_hw *hw = &adapter->hw;
6840 u32 icr = rd32(E1000_ICR);
6841 /* reading ICR causes bit 31 of EICR to be cleared */
6843 if (icr & E1000_ICR_DRSTA)
6844 schedule_work(&adapter->reset_task);
6846 if (icr & E1000_ICR_DOUTSYNC) {
6847 /* HW is reporting DMA is out of sync */
6848 adapter->stats.doosync++;
6849 /* The DMA Out of Sync is also indication of a spoof event
6850 * in IOV mode. Check the Wrong VM Behavior register to
6851 * see if it is really a spoof event.
6853 igb_check_wvbr(adapter);
6856 /* Check for a mailbox event */
6857 if (icr & E1000_ICR_VMMB)
6858 igb_msg_task(adapter);
6860 if (icr & E1000_ICR_LSC) {
6861 hw->mac.get_link_status = 1;
6862 /* guard against interrupt when we're going down */
6863 if (!test_bit(__IGB_DOWN, &adapter->state))
6864 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6867 if (icr & E1000_ICR_TS)
6868 igb_tsync_interrupt(adapter);
6870 wr32(E1000_EIMS, adapter->eims_other);
6875 static void igb_write_itr(struct igb_q_vector *q_vector)
6877 struct igb_adapter *adapter = q_vector->adapter;
6878 u32 itr_val = q_vector->itr_val & 0x7FFC;
6880 if (!q_vector->set_itr)
6886 if (adapter->hw.mac.type == e1000_82575)
6887 itr_val |= itr_val << 16;
6889 itr_val |= E1000_EITR_CNT_IGNR;
6891 writel(itr_val, q_vector->itr_register);
6892 q_vector->set_itr = 0;
6895 static irqreturn_t igb_msix_ring(int irq, void *data)
6897 struct igb_q_vector *q_vector = data;
6899 /* Write the ITR value calculated from the previous interrupt. */
6900 igb_write_itr(q_vector);
6902 napi_schedule(&q_vector->napi);
6907 #ifdef CONFIG_IGB_DCA
6908 static void igb_update_tx_dca(struct igb_adapter *adapter,
6909 struct igb_ring *tx_ring,
6912 struct e1000_hw *hw = &adapter->hw;
6913 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
6915 if (hw->mac.type != e1000_82575)
6916 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
6918 /* We can enable relaxed ordering for reads, but not writes when
6919 * DCA is enabled. This is due to a known issue in some chipsets
6920 * which will cause the DCA tag to be cleared.
6922 txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6923 E1000_DCA_TXCTRL_DATA_RRO_EN |
6924 E1000_DCA_TXCTRL_DESC_DCA_EN;
6926 wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6929 static void igb_update_rx_dca(struct igb_adapter *adapter,
6930 struct igb_ring *rx_ring,
6933 struct e1000_hw *hw = &adapter->hw;
6934 u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6936 if (hw->mac.type != e1000_82575)
6937 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
6939 /* We can enable relaxed ordering for reads, but not writes when
6940 * DCA is enabled. This is due to a known issue in some chipsets
6941 * which will cause the DCA tag to be cleared.
6943 rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6944 E1000_DCA_RXCTRL_DESC_DCA_EN;
6946 wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6949 static void igb_update_dca(struct igb_q_vector *q_vector)
6951 struct igb_adapter *adapter = q_vector->adapter;
6952 int cpu = get_cpu();
6954 if (q_vector->cpu == cpu)
6957 if (q_vector->tx.ring)
6958 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6960 if (q_vector->rx.ring)
6961 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6963 q_vector->cpu = cpu;
6968 static void igb_setup_dca(struct igb_adapter *adapter)
6970 struct e1000_hw *hw = &adapter->hw;
6973 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6976 /* Always use CB2 mode, difference is masked in the CB driver. */
6977 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6979 for (i = 0; i < adapter->num_q_vectors; i++) {
6980 adapter->q_vector[i]->cpu = -1;
6981 igb_update_dca(adapter->q_vector[i]);
6985 static int __igb_notify_dca(struct device *dev, void *data)
6987 struct net_device *netdev = dev_get_drvdata(dev);
6988 struct igb_adapter *adapter = netdev_priv(netdev);
6989 struct pci_dev *pdev = adapter->pdev;
6990 struct e1000_hw *hw = &adapter->hw;
6991 unsigned long event = *(unsigned long *)data;
6994 case DCA_PROVIDER_ADD:
6995 /* if already enabled, don't do it again */
6996 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6998 if (dca_add_requester(dev) == 0) {
6999 adapter->flags |= IGB_FLAG_DCA_ENABLED;
7000 dev_info(&pdev->dev, "DCA enabled\n");
7001 igb_setup_dca(adapter);
7004 fallthrough; /* since DCA is disabled. */
7005 case DCA_PROVIDER_REMOVE:
7006 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
7007 /* without this a class_device is left
7008 * hanging around in the sysfs model
7010 dca_remove_requester(dev);
7011 dev_info(&pdev->dev, "DCA disabled\n");
7012 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
7013 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
7021 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
7026 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
7029 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7031 #endif /* CONFIG_IGB_DCA */
7033 #ifdef CONFIG_PCI_IOV
7034 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
7036 unsigned char mac_addr[ETH_ALEN];
7038 eth_zero_addr(mac_addr);
7039 igb_set_vf_mac(adapter, vf, mac_addr);
7041 /* By default spoof check is enabled for all VFs */
7042 adapter->vf_data[vf].spoofchk_enabled = true;
7044 /* By default VFs are not trusted */
7045 adapter->vf_data[vf].trusted = false;
7051 static void igb_ping_all_vfs(struct igb_adapter *adapter)
7053 struct e1000_hw *hw = &adapter->hw;
7057 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
7058 ping = E1000_PF_CONTROL_MSG;
7059 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
7060 ping |= E1000_VT_MSGTYPE_CTS;
7061 igb_write_mbx(hw, &ping, 1, i);
7065 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7067 struct e1000_hw *hw = &adapter->hw;
7068 u32 vmolr = rd32(E1000_VMOLR(vf));
7069 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7071 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
7072 IGB_VF_FLAG_MULTI_PROMISC);
7073 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7075 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
7076 vmolr |= E1000_VMOLR_MPME;
7077 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
7078 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
7080 /* if we have hashes and we are clearing a multicast promisc
7081 * flag we need to write the hashes to the MTA as this step
7082 * was previously skipped
7084 if (vf_data->num_vf_mc_hashes > 30) {
7085 vmolr |= E1000_VMOLR_MPME;
7086 } else if (vf_data->num_vf_mc_hashes) {
7089 vmolr |= E1000_VMOLR_ROMPE;
7090 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7091 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7095 wr32(E1000_VMOLR(vf), vmolr);
7097 /* there are flags left unprocessed, likely not supported */
7098 if (*msgbuf & E1000_VT_MSGINFO_MASK)
7104 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
7105 u32 *msgbuf, u32 vf)
7107 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7108 u16 *hash_list = (u16 *)&msgbuf[1];
7109 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7112 /* salt away the number of multicast addresses assigned
7113 * to this VF for later use to restore when the PF multi cast
7116 vf_data->num_vf_mc_hashes = n;
7118 /* only up to 30 hash values supported */
7122 /* store the hashes for later use */
7123 for (i = 0; i < n; i++)
7124 vf_data->vf_mc_hashes[i] = hash_list[i];
7126 /* Flush and reset the mta with the new values */
7127 igb_set_rx_mode(adapter->netdev);
7132 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
7134 struct e1000_hw *hw = &adapter->hw;
7135 struct vf_data_storage *vf_data;
7138 for (i = 0; i < adapter->vfs_allocated_count; i++) {
7139 u32 vmolr = rd32(E1000_VMOLR(i));
7141 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7143 vf_data = &adapter->vf_data[i];
7145 if ((vf_data->num_vf_mc_hashes > 30) ||
7146 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
7147 vmolr |= E1000_VMOLR_MPME;
7148 } else if (vf_data->num_vf_mc_hashes) {
7149 vmolr |= E1000_VMOLR_ROMPE;
7150 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7151 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7153 wr32(E1000_VMOLR(i), vmolr);
7157 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
7159 struct e1000_hw *hw = &adapter->hw;
7160 u32 pool_mask, vlvf_mask, i;
7162 /* create mask for VF and other pools */
7163 pool_mask = E1000_VLVF_POOLSEL_MASK;
7164 vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
7166 /* drop PF from pool bits */
7167 pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
7168 adapter->vfs_allocated_count);
7170 /* Find the vlan filter for this id */
7171 for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
7172 u32 vlvf = rd32(E1000_VLVF(i));
7173 u32 vfta_mask, vid, vfta;
7175 /* remove the vf from the pool */
7176 if (!(vlvf & vlvf_mask))
7179 /* clear out bit from VLVF */
7182 /* if other pools are present, just remove ourselves */
7183 if (vlvf & pool_mask)
7186 /* if PF is present, leave VFTA */
7187 if (vlvf & E1000_VLVF_POOLSEL_MASK)
7190 vid = vlvf & E1000_VLVF_VLANID_MASK;
7191 vfta_mask = BIT(vid % 32);
7193 /* clear bit from VFTA */
7194 vfta = adapter->shadow_vfta[vid / 32];
7195 if (vfta & vfta_mask)
7196 hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
7198 /* clear pool selection enable */
7199 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7200 vlvf &= E1000_VLVF_POOLSEL_MASK;
7204 /* clear pool bits */
7205 wr32(E1000_VLVF(i), vlvf);
7209 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
7214 /* short cut the special case */
7218 /* Search for the VLAN id in the VLVF entries */
7219 for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
7220 vlvf = rd32(E1000_VLVF(idx));
7221 if ((vlvf & VLAN_VID_MASK) == vlan)
7228 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
7230 struct e1000_hw *hw = &adapter->hw;
7234 idx = igb_find_vlvf_entry(hw, vid);
7238 /* See if any other pools are set for this VLAN filter
7239 * entry other than the PF.
7241 pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
7242 bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
7243 bits &= rd32(E1000_VLVF(idx));
7245 /* Disable the filter so this falls into the default pool. */
7247 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7248 wr32(E1000_VLVF(idx), BIT(pf_id));
7250 wr32(E1000_VLVF(idx), 0);
7254 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
7257 int pf_id = adapter->vfs_allocated_count;
7258 struct e1000_hw *hw = &adapter->hw;
7261 /* If VLAN overlaps with one the PF is currently monitoring make
7262 * sure that we are able to allocate a VLVF entry. This may be
7263 * redundant but it guarantees PF will maintain visibility to
7266 if (add && test_bit(vid, adapter->active_vlans)) {
7267 err = igb_vfta_set(hw, vid, pf_id, true, false);
7272 err = igb_vfta_set(hw, vid, vf, add, false);
7277 /* If we failed to add the VF VLAN or we are removing the VF VLAN
7278 * we may need to drop the PF pool bit in order to allow us to free
7279 * up the VLVF resources.
7281 if (test_bit(vid, adapter->active_vlans) ||
7282 (adapter->flags & IGB_FLAG_VLAN_PROMISC))
7283 igb_update_pf_vlvf(adapter, vid);
7288 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
7290 struct e1000_hw *hw = &adapter->hw;
7293 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
7295 wr32(E1000_VMVIR(vf), 0);
7298 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
7303 err = igb_set_vf_vlan(adapter, vlan, true, vf);
7307 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
7308 igb_set_vmolr(adapter, vf, !vlan);
7310 /* revoke access to previous VLAN */
7311 if (vlan != adapter->vf_data[vf].pf_vlan)
7312 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7315 adapter->vf_data[vf].pf_vlan = vlan;
7316 adapter->vf_data[vf].pf_qos = qos;
7317 igb_set_vf_vlan_strip(adapter, vf, true);
7318 dev_info(&adapter->pdev->dev,
7319 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
7320 if (test_bit(__IGB_DOWN, &adapter->state)) {
7321 dev_warn(&adapter->pdev->dev,
7322 "The VF VLAN has been set, but the PF device is not up.\n");
7323 dev_warn(&adapter->pdev->dev,
7324 "Bring the PF device up before attempting to use the VF device.\n");
7330 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
7332 /* Restore tagless access via VLAN 0 */
7333 igb_set_vf_vlan(adapter, 0, true, vf);
7335 igb_set_vmvir(adapter, 0, vf);
7336 igb_set_vmolr(adapter, vf, true);
7338 /* Remove any PF assigned VLAN */
7339 if (adapter->vf_data[vf].pf_vlan)
7340 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7343 adapter->vf_data[vf].pf_vlan = 0;
7344 adapter->vf_data[vf].pf_qos = 0;
7345 igb_set_vf_vlan_strip(adapter, vf, false);
7350 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
7351 u16 vlan, u8 qos, __be16 vlan_proto)
7353 struct igb_adapter *adapter = netdev_priv(netdev);
7355 if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
7358 if (vlan_proto != htons(ETH_P_8021Q))
7359 return -EPROTONOSUPPORT;
7361 return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
7362 igb_disable_port_vlan(adapter, vf);
7365 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7367 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7368 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
7371 if (adapter->vf_data[vf].pf_vlan)
7374 /* VLAN 0 is a special case, don't allow it to be removed */
7378 ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
7380 igb_set_vf_vlan_strip(adapter, vf, !!vid);
7384 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
7386 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7388 /* clear flags - except flag that indicates PF has set the MAC */
7389 vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
7390 vf_data->last_nack = jiffies;
7392 /* reset vlans for device */
7393 igb_clear_vf_vfta(adapter, vf);
7394 igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
7395 igb_set_vmvir(adapter, vf_data->pf_vlan |
7396 (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
7397 igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
7398 igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
7400 /* reset multicast table array for vf */
7401 adapter->vf_data[vf].num_vf_mc_hashes = 0;
7403 /* Flush and reset the mta with the new values */
7404 igb_set_rx_mode(adapter->netdev);
7407 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
7409 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7411 /* clear mac address as we were hotplug removed/added */
7412 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
7413 eth_zero_addr(vf_mac);
7415 /* process remaining reset events */
7416 igb_vf_reset(adapter, vf);
7419 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
7421 struct e1000_hw *hw = &adapter->hw;
7422 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7423 u32 reg, msgbuf[3] = {};
7424 u8 *addr = (u8 *)(&msgbuf[1]);
7426 /* process all the same items cleared in a function level reset */
7427 igb_vf_reset(adapter, vf);
7429 /* set vf mac address */
7430 igb_set_vf_mac(adapter, vf, vf_mac);
7432 /* enable transmit and receive for vf */
7433 reg = rd32(E1000_VFTE);
7434 wr32(E1000_VFTE, reg | BIT(vf));
7435 reg = rd32(E1000_VFRE);
7436 wr32(E1000_VFRE, reg | BIT(vf));
7438 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
7440 /* reply to reset with ack and vf mac address */
7441 if (!is_zero_ether_addr(vf_mac)) {
7442 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
7443 memcpy(addr, vf_mac, ETH_ALEN);
7445 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
7447 igb_write_mbx(hw, msgbuf, 3, vf);
7450 static void igb_flush_mac_table(struct igb_adapter *adapter)
7452 struct e1000_hw *hw = &adapter->hw;
7455 for (i = 0; i < hw->mac.rar_entry_count; i++) {
7456 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
7457 eth_zero_addr(adapter->mac_table[i].addr);
7458 adapter->mac_table[i].queue = 0;
7459 igb_rar_set_index(adapter, i);
7463 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
7465 struct e1000_hw *hw = &adapter->hw;
7466 /* do not count rar entries reserved for VFs MAC addresses */
7467 int rar_entries = hw->mac.rar_entry_count -
7468 adapter->vfs_allocated_count;
7471 for (i = 0; i < rar_entries; i++) {
7472 /* do not count default entries */
7473 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
7476 /* do not count "in use" entries for different queues */
7477 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
7478 (adapter->mac_table[i].queue != queue))
7487 /* Set default MAC address for the PF in the first RAR entry */
7488 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
7490 struct igb_mac_addr *mac_table = &adapter->mac_table[0];
7492 ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
7493 mac_table->queue = adapter->vfs_allocated_count;
7494 mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7496 igb_rar_set_index(adapter, 0);
7499 /* If the filter to be added and an already existing filter express
7500 * the same address and address type, it should be possible to only
7501 * override the other configurations, for example the queue to steer
7504 static bool igb_mac_entry_can_be_used(const struct igb_mac_addr *entry,
7505 const u8 *addr, const u8 flags)
7507 if (!(entry->state & IGB_MAC_STATE_IN_USE))
7510 if ((entry->state & IGB_MAC_STATE_SRC_ADDR) !=
7511 (flags & IGB_MAC_STATE_SRC_ADDR))
7514 if (!ether_addr_equal(addr, entry->addr))
7520 /* Add a MAC filter for 'addr' directing matching traffic to 'queue',
7521 * 'flags' is used to indicate what kind of match is made, match is by
7522 * default for the destination address, if matching by source address
7523 * is desired the flag IGB_MAC_STATE_SRC_ADDR can be used.
7525 static int igb_add_mac_filter_flags(struct igb_adapter *adapter,
7526 const u8 *addr, const u8 queue,
7529 struct e1000_hw *hw = &adapter->hw;
7530 int rar_entries = hw->mac.rar_entry_count -
7531 adapter->vfs_allocated_count;
7534 if (is_zero_ether_addr(addr))
7537 /* Search for the first empty entry in the MAC table.
7538 * Do not touch entries at the end of the table reserved for the VF MAC
7541 for (i = 0; i < rar_entries; i++) {
7542 if (!igb_mac_entry_can_be_used(&adapter->mac_table[i],
7546 ether_addr_copy(adapter->mac_table[i].addr, addr);
7547 adapter->mac_table[i].queue = queue;
7548 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE | flags;
7550 igb_rar_set_index(adapter, i);
7557 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7560 return igb_add_mac_filter_flags(adapter, addr, queue, 0);
7563 /* Remove a MAC filter for 'addr' directing matching traffic to
7564 * 'queue', 'flags' is used to indicate what kind of match need to be
7565 * removed, match is by default for the destination address, if
7566 * matching by source address is to be removed the flag
7567 * IGB_MAC_STATE_SRC_ADDR can be used.
7569 static int igb_del_mac_filter_flags(struct igb_adapter *adapter,
7570 const u8 *addr, const u8 queue,
7573 struct e1000_hw *hw = &adapter->hw;
7574 int rar_entries = hw->mac.rar_entry_count -
7575 adapter->vfs_allocated_count;
7578 if (is_zero_ether_addr(addr))
7581 /* Search for matching entry in the MAC table based on given address
7582 * and queue. Do not touch entries at the end of the table reserved
7583 * for the VF MAC addresses.
7585 for (i = 0; i < rar_entries; i++) {
7586 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
7588 if ((adapter->mac_table[i].state & flags) != flags)
7590 if (adapter->mac_table[i].queue != queue)
7592 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
7595 /* When a filter for the default address is "deleted",
7596 * we return it to its initial configuration
7598 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT) {
7599 adapter->mac_table[i].state =
7600 IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7601 adapter->mac_table[i].queue =
7602 adapter->vfs_allocated_count;
7604 adapter->mac_table[i].state = 0;
7605 adapter->mac_table[i].queue = 0;
7606 eth_zero_addr(adapter->mac_table[i].addr);
7609 igb_rar_set_index(adapter, i);
7616 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7619 return igb_del_mac_filter_flags(adapter, addr, queue, 0);
7622 int igb_add_mac_steering_filter(struct igb_adapter *adapter,
7623 const u8 *addr, u8 queue, u8 flags)
7625 struct e1000_hw *hw = &adapter->hw;
7627 /* In theory, this should be supported on 82575 as well, but
7628 * that part wasn't easily accessible during development.
7630 if (hw->mac.type != e1000_i210)
7633 return igb_add_mac_filter_flags(adapter, addr, queue,
7634 IGB_MAC_STATE_QUEUE_STEERING | flags);
7637 int igb_del_mac_steering_filter(struct igb_adapter *adapter,
7638 const u8 *addr, u8 queue, u8 flags)
7640 return igb_del_mac_filter_flags(adapter, addr, queue,
7641 IGB_MAC_STATE_QUEUE_STEERING | flags);
7644 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
7646 struct igb_adapter *adapter = netdev_priv(netdev);
7649 ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7651 return min_t(int, ret, 0);
7654 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
7656 struct igb_adapter *adapter = netdev_priv(netdev);
7658 igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7663 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
7664 const u32 info, const u8 *addr)
7666 struct pci_dev *pdev = adapter->pdev;
7667 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7668 struct list_head *pos;
7669 struct vf_mac_filter *entry = NULL;
7672 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7673 !vf_data->trusted) {
7674 dev_warn(&pdev->dev,
7675 "VF %d requested MAC filter but is administratively denied\n",
7679 if (!is_valid_ether_addr(addr)) {
7680 dev_warn(&pdev->dev,
7681 "VF %d attempted to set invalid MAC filter\n",
7687 case E1000_VF_MAC_FILTER_CLR:
7688 /* remove all unicast MAC filters related to the current VF */
7689 list_for_each(pos, &adapter->vf_macs.l) {
7690 entry = list_entry(pos, struct vf_mac_filter, l);
7691 if (entry->vf == vf) {
7694 igb_del_mac_filter(adapter, entry->vf_mac, vf);
7698 case E1000_VF_MAC_FILTER_ADD:
7699 /* try to find empty slot in the list */
7700 list_for_each(pos, &adapter->vf_macs.l) {
7701 entry = list_entry(pos, struct vf_mac_filter, l);
7706 if (entry && entry->free) {
7707 entry->free = false;
7709 ether_addr_copy(entry->vf_mac, addr);
7711 ret = igb_add_mac_filter(adapter, addr, vf);
7712 ret = min_t(int, ret, 0);
7718 dev_warn(&pdev->dev,
7719 "VF %d has requested MAC filter but there is no space for it\n",
7730 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
7732 struct pci_dev *pdev = adapter->pdev;
7733 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7734 u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
7736 /* The VF MAC Address is stored in a packed array of bytes
7737 * starting at the second 32 bit word of the msg array
7739 unsigned char *addr = (unsigned char *)&msg[1];
7743 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7744 !vf_data->trusted) {
7745 dev_warn(&pdev->dev,
7746 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
7751 if (!is_valid_ether_addr(addr)) {
7752 dev_warn(&pdev->dev,
7753 "VF %d attempted to set invalid MAC\n",
7758 ret = igb_set_vf_mac(adapter, vf, addr);
7760 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
7766 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
7768 struct e1000_hw *hw = &adapter->hw;
7769 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7770 u32 msg = E1000_VT_MSGTYPE_NACK;
7772 /* if device isn't clear to send it shouldn't be reading either */
7773 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
7774 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
7775 igb_write_mbx(hw, &msg, 1, vf);
7776 vf_data->last_nack = jiffies;
7780 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
7782 struct pci_dev *pdev = adapter->pdev;
7783 u32 msgbuf[E1000_VFMAILBOX_SIZE];
7784 struct e1000_hw *hw = &adapter->hw;
7785 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7788 retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
7791 /* if receive failed revoke VF CTS stats and restart init */
7792 dev_err(&pdev->dev, "Error receiving message from VF\n");
7793 vf_data->flags &= ~IGB_VF_FLAG_CTS;
7794 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7799 /* this is a message we already processed, do nothing */
7800 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
7803 /* until the vf completes a reset it should not be
7804 * allowed to start any configuration.
7806 if (msgbuf[0] == E1000_VF_RESET) {
7807 /* unlocks mailbox */
7808 igb_vf_reset_msg(adapter, vf);
7812 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
7813 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7819 switch ((msgbuf[0] & 0xFFFF)) {
7820 case E1000_VF_SET_MAC_ADDR:
7821 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
7823 case E1000_VF_SET_PROMISC:
7824 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
7826 case E1000_VF_SET_MULTICAST:
7827 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
7829 case E1000_VF_SET_LPE:
7830 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
7832 case E1000_VF_SET_VLAN:
7834 if (vf_data->pf_vlan)
7835 dev_warn(&pdev->dev,
7836 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
7839 retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
7842 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
7847 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
7849 /* notify the VF of the results of what it sent us */
7851 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
7853 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
7855 /* unlocks mailbox */
7856 igb_write_mbx(hw, msgbuf, 1, vf);
7860 igb_unlock_mbx(hw, vf);
7863 static void igb_msg_task(struct igb_adapter *adapter)
7865 struct e1000_hw *hw = &adapter->hw;
7866 unsigned long flags;
7869 spin_lock_irqsave(&adapter->vfs_lock, flags);
7870 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
7871 /* process any reset requests */
7872 if (!igb_check_for_rst(hw, vf))
7873 igb_vf_reset_event(adapter, vf);
7875 /* process any messages pending */
7876 if (!igb_check_for_msg(hw, vf))
7877 igb_rcv_msg_from_vf(adapter, vf);
7879 /* process any acks */
7880 if (!igb_check_for_ack(hw, vf))
7881 igb_rcv_ack_from_vf(adapter, vf);
7883 spin_unlock_irqrestore(&adapter->vfs_lock, flags);
7887 * igb_set_uta - Set unicast filter table address
7888 * @adapter: board private structure
7889 * @set: boolean indicating if we are setting or clearing bits
7891 * The unicast table address is a register array of 32-bit registers.
7892 * The table is meant to be used in a way similar to how the MTA is used
7893 * however due to certain limitations in the hardware it is necessary to
7894 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
7895 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
7897 static void igb_set_uta(struct igb_adapter *adapter, bool set)
7899 struct e1000_hw *hw = &adapter->hw;
7900 u32 uta = set ? ~0 : 0;
7903 /* we only need to do this if VMDq is enabled */
7904 if (!adapter->vfs_allocated_count)
7907 for (i = hw->mac.uta_reg_count; i--;)
7908 array_wr32(E1000_UTA, i, uta);
7912 * igb_intr_msi - Interrupt Handler
7913 * @irq: interrupt number
7914 * @data: pointer to a network interface device structure
7916 static irqreturn_t igb_intr_msi(int irq, void *data)
7918 struct igb_adapter *adapter = data;
7919 struct igb_q_vector *q_vector = adapter->q_vector[0];
7920 struct e1000_hw *hw = &adapter->hw;
7921 /* read ICR disables interrupts using IAM */
7922 u32 icr = rd32(E1000_ICR);
7924 igb_write_itr(q_vector);
7926 if (icr & E1000_ICR_DRSTA)
7927 schedule_work(&adapter->reset_task);
7929 if (icr & E1000_ICR_DOUTSYNC) {
7930 /* HW is reporting DMA is out of sync */
7931 adapter->stats.doosync++;
7934 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7935 hw->mac.get_link_status = 1;
7936 if (!test_bit(__IGB_DOWN, &adapter->state))
7937 mod_timer(&adapter->watchdog_timer, jiffies + 1);
7940 if (icr & E1000_ICR_TS)
7941 igb_tsync_interrupt(adapter);
7943 napi_schedule(&q_vector->napi);
7949 * igb_intr - Legacy Interrupt Handler
7950 * @irq: interrupt number
7951 * @data: pointer to a network interface device structure
7953 static irqreturn_t igb_intr(int irq, void *data)
7955 struct igb_adapter *adapter = data;
7956 struct igb_q_vector *q_vector = adapter->q_vector[0];
7957 struct e1000_hw *hw = &adapter->hw;
7958 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
7959 * need for the IMC write
7961 u32 icr = rd32(E1000_ICR);
7963 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
7964 * not set, then the adapter didn't send an interrupt
7966 if (!(icr & E1000_ICR_INT_ASSERTED))
7969 igb_write_itr(q_vector);
7971 if (icr & E1000_ICR_DRSTA)
7972 schedule_work(&adapter->reset_task);
7974 if (icr & E1000_ICR_DOUTSYNC) {
7975 /* HW is reporting DMA is out of sync */
7976 adapter->stats.doosync++;
7979 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7980 hw->mac.get_link_status = 1;
7981 /* guard against interrupt when we're going down */
7982 if (!test_bit(__IGB_DOWN, &adapter->state))
7983 mod_timer(&adapter->watchdog_timer, jiffies + 1);
7986 if (icr & E1000_ICR_TS)
7987 igb_tsync_interrupt(adapter);
7989 napi_schedule(&q_vector->napi);
7994 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
7996 struct igb_adapter *adapter = q_vector->adapter;
7997 struct e1000_hw *hw = &adapter->hw;
7999 if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
8000 (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
8001 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
8002 igb_set_itr(q_vector);
8004 igb_update_ring_itr(q_vector);
8007 if (!test_bit(__IGB_DOWN, &adapter->state)) {
8008 if (adapter->flags & IGB_FLAG_HAS_MSIX)
8009 wr32(E1000_EIMS, q_vector->eims_value);
8011 igb_irq_enable(adapter);
8016 * igb_poll - NAPI Rx polling callback
8017 * @napi: napi polling structure
8018 * @budget: count of how many packets we should handle
8020 static int igb_poll(struct napi_struct *napi, int budget)
8022 struct igb_q_vector *q_vector = container_of(napi,
8023 struct igb_q_vector,
8025 bool clean_complete = true;
8028 #ifdef CONFIG_IGB_DCA
8029 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
8030 igb_update_dca(q_vector);
8032 if (q_vector->tx.ring)
8033 clean_complete = igb_clean_tx_irq(q_vector, budget);
8035 if (q_vector->rx.ring) {
8036 int cleaned = igb_clean_rx_irq(q_vector, budget);
8038 work_done += cleaned;
8039 if (cleaned >= budget)
8040 clean_complete = false;
8043 /* If all work not completed, return budget and keep polling */
8044 if (!clean_complete)
8047 /* Exit the polling mode, but don't re-enable interrupts if stack might
8048 * poll us due to busy-polling
8050 if (likely(napi_complete_done(napi, work_done)))
8051 igb_ring_irq_enable(q_vector);
8057 * igb_clean_tx_irq - Reclaim resources after transmit completes
8058 * @q_vector: pointer to q_vector containing needed info
8059 * @napi_budget: Used to determine if we are in netpoll
8061 * returns true if ring is completely cleaned
8063 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
8065 struct igb_adapter *adapter = q_vector->adapter;
8066 struct igb_ring *tx_ring = q_vector->tx.ring;
8067 struct igb_tx_buffer *tx_buffer;
8068 union e1000_adv_tx_desc *tx_desc;
8069 unsigned int total_bytes = 0, total_packets = 0;
8070 unsigned int budget = q_vector->tx.work_limit;
8071 unsigned int i = tx_ring->next_to_clean;
8073 if (test_bit(__IGB_DOWN, &adapter->state))
8076 tx_buffer = &tx_ring->tx_buffer_info[i];
8077 tx_desc = IGB_TX_DESC(tx_ring, i);
8078 i -= tx_ring->count;
8081 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
8083 /* if next_to_watch is not set then there is no work pending */
8087 /* prevent any other reads prior to eop_desc */
8090 /* if DD is not set pending work has not been completed */
8091 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
8094 /* clear next_to_watch to prevent false hangs */
8095 tx_buffer->next_to_watch = NULL;
8097 /* update the statistics for this packet */
8098 total_bytes += tx_buffer->bytecount;
8099 total_packets += tx_buffer->gso_segs;
8102 if (tx_buffer->type == IGB_TYPE_SKB)
8103 napi_consume_skb(tx_buffer->skb, napi_budget);
8105 xdp_return_frame(tx_buffer->xdpf);
8107 /* unmap skb header data */
8108 dma_unmap_single(tx_ring->dev,
8109 dma_unmap_addr(tx_buffer, dma),
8110 dma_unmap_len(tx_buffer, len),
8113 /* clear tx_buffer data */
8114 dma_unmap_len_set(tx_buffer, len, 0);
8116 /* clear last DMA location and unmap remaining buffers */
8117 while (tx_desc != eop_desc) {
8122 i -= tx_ring->count;
8123 tx_buffer = tx_ring->tx_buffer_info;
8124 tx_desc = IGB_TX_DESC(tx_ring, 0);
8127 /* unmap any remaining paged data */
8128 if (dma_unmap_len(tx_buffer, len)) {
8129 dma_unmap_page(tx_ring->dev,
8130 dma_unmap_addr(tx_buffer, dma),
8131 dma_unmap_len(tx_buffer, len),
8133 dma_unmap_len_set(tx_buffer, len, 0);
8137 /* move us one more past the eop_desc for start of next pkt */
8142 i -= tx_ring->count;
8143 tx_buffer = tx_ring->tx_buffer_info;
8144 tx_desc = IGB_TX_DESC(tx_ring, 0);
8147 /* issue prefetch for next Tx descriptor */
8150 /* update budget accounting */
8152 } while (likely(budget));
8154 netdev_tx_completed_queue(txring_txq(tx_ring),
8155 total_packets, total_bytes);
8156 i += tx_ring->count;
8157 tx_ring->next_to_clean = i;
8158 u64_stats_update_begin(&tx_ring->tx_syncp);
8159 tx_ring->tx_stats.bytes += total_bytes;
8160 tx_ring->tx_stats.packets += total_packets;
8161 u64_stats_update_end(&tx_ring->tx_syncp);
8162 q_vector->tx.total_bytes += total_bytes;
8163 q_vector->tx.total_packets += total_packets;
8165 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
8166 struct e1000_hw *hw = &adapter->hw;
8168 /* Detect a transmit hang in hardware, this serializes the
8169 * check with the clearing of time_stamp and movement of i
8171 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
8172 if (tx_buffer->next_to_watch &&
8173 time_after(jiffies, tx_buffer->time_stamp +
8174 (adapter->tx_timeout_factor * HZ)) &&
8175 !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
8177 /* detected Tx unit hang */
8178 dev_err(tx_ring->dev,
8179 "Detected Tx Unit Hang\n"
8183 " next_to_use <%x>\n"
8184 " next_to_clean <%x>\n"
8185 "buffer_info[next_to_clean]\n"
8186 " time_stamp <%lx>\n"
8187 " next_to_watch <%p>\n"
8189 " desc.status <%x>\n",
8190 tx_ring->queue_index,
8191 rd32(E1000_TDH(tx_ring->reg_idx)),
8192 readl(tx_ring->tail),
8193 tx_ring->next_to_use,
8194 tx_ring->next_to_clean,
8195 tx_buffer->time_stamp,
8196 tx_buffer->next_to_watch,
8198 tx_buffer->next_to_watch->wb.status);
8199 netif_stop_subqueue(tx_ring->netdev,
8200 tx_ring->queue_index);
8202 /* we are about to reset, no point in enabling stuff */
8207 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
8208 if (unlikely(total_packets &&
8209 netif_carrier_ok(tx_ring->netdev) &&
8210 igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
8211 /* Make sure that anybody stopping the queue after this
8212 * sees the new next_to_clean.
8215 if (__netif_subqueue_stopped(tx_ring->netdev,
8216 tx_ring->queue_index) &&
8217 !(test_bit(__IGB_DOWN, &adapter->state))) {
8218 netif_wake_subqueue(tx_ring->netdev,
8219 tx_ring->queue_index);
8221 u64_stats_update_begin(&tx_ring->tx_syncp);
8222 tx_ring->tx_stats.restart_queue++;
8223 u64_stats_update_end(&tx_ring->tx_syncp);
8231 * igb_reuse_rx_page - page flip buffer and store it back on the ring
8232 * @rx_ring: rx descriptor ring to store buffers on
8233 * @old_buff: donor buffer to have page reused
8235 * Synchronizes page for reuse by the adapter
8237 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
8238 struct igb_rx_buffer *old_buff)
8240 struct igb_rx_buffer *new_buff;
8241 u16 nta = rx_ring->next_to_alloc;
8243 new_buff = &rx_ring->rx_buffer_info[nta];
8245 /* update, and store next to alloc */
8247 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
8249 /* Transfer page from old buffer to new buffer.
8250 * Move each member individually to avoid possible store
8251 * forwarding stalls.
8253 new_buff->dma = old_buff->dma;
8254 new_buff->page = old_buff->page;
8255 new_buff->page_offset = old_buff->page_offset;
8256 new_buff->pagecnt_bias = old_buff->pagecnt_bias;
8259 static inline bool igb_page_is_reserved(struct page *page)
8261 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
8264 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
8267 unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
8268 struct page *page = rx_buffer->page;
8270 /* avoid re-using remote pages */
8271 if (unlikely(igb_page_is_reserved(page)))
8274 #if (PAGE_SIZE < 8192)
8275 /* if we are only owner of page we can reuse it */
8276 if (unlikely((rx_buf_pgcnt - pagecnt_bias) > 1))
8279 #define IGB_LAST_OFFSET \
8280 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
8282 if (rx_buffer->page_offset > IGB_LAST_OFFSET)
8286 /* If we have drained the page fragment pool we need to update
8287 * the pagecnt_bias and page count so that we fully restock the
8288 * number of references the driver holds.
8290 if (unlikely(pagecnt_bias == 1)) {
8291 page_ref_add(page, USHRT_MAX - 1);
8292 rx_buffer->pagecnt_bias = USHRT_MAX;
8299 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
8300 * @rx_ring: rx descriptor ring to transact packets on
8301 * @rx_buffer: buffer containing page to add
8302 * @skb: sk_buff to place the data into
8303 * @size: size of buffer to be added
8305 * This function will add the data contained in rx_buffer->page to the skb.
8307 static void igb_add_rx_frag(struct igb_ring *rx_ring,
8308 struct igb_rx_buffer *rx_buffer,
8309 struct sk_buff *skb,
8312 #if (PAGE_SIZE < 8192)
8313 unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8315 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
8316 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
8317 SKB_DATA_ALIGN(size);
8319 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
8320 rx_buffer->page_offset, size, truesize);
8321 #if (PAGE_SIZE < 8192)
8322 rx_buffer->page_offset ^= truesize;
8324 rx_buffer->page_offset += truesize;
8328 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
8329 struct igb_rx_buffer *rx_buffer,
8330 struct xdp_buff *xdp,
8331 union e1000_adv_rx_desc *rx_desc)
8333 #if (PAGE_SIZE < 8192)
8334 unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8336 unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
8337 xdp->data_hard_start);
8339 unsigned int size = xdp->data_end - xdp->data;
8340 unsigned int headlen;
8341 struct sk_buff *skb;
8343 /* prefetch first cache line of first page */
8344 net_prefetch(xdp->data);
8346 /* allocate a skb to store the frags */
8347 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
8351 if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
8352 if (!igb_ptp_rx_pktstamp(rx_ring->q_vector, xdp->data, skb)) {
8353 xdp->data += IGB_TS_HDR_LEN;
8354 size -= IGB_TS_HDR_LEN;
8358 /* Determine available headroom for copy */
8360 if (headlen > IGB_RX_HDR_LEN)
8361 headlen = eth_get_headlen(skb->dev, xdp->data, IGB_RX_HDR_LEN);
8363 /* align pull length to size of long to optimize memcpy performance */
8364 memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen, sizeof(long)));
8366 /* update all of the pointers */
8369 skb_add_rx_frag(skb, 0, rx_buffer->page,
8370 (xdp->data + headlen) - page_address(rx_buffer->page),
8372 #if (PAGE_SIZE < 8192)
8373 rx_buffer->page_offset ^= truesize;
8375 rx_buffer->page_offset += truesize;
8378 rx_buffer->pagecnt_bias++;
8384 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
8385 struct igb_rx_buffer *rx_buffer,
8386 struct xdp_buff *xdp,
8387 union e1000_adv_rx_desc *rx_desc)
8389 #if (PAGE_SIZE < 8192)
8390 unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8392 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
8393 SKB_DATA_ALIGN(xdp->data_end -
8394 xdp->data_hard_start);
8396 unsigned int metasize = xdp->data - xdp->data_meta;
8397 struct sk_buff *skb;
8399 /* prefetch first cache line of first page */
8400 net_prefetch(xdp->data_meta);
8402 /* build an skb around the page buffer */
8403 skb = build_skb(xdp->data_hard_start, truesize);
8407 /* update pointers within the skb to store the data */
8408 skb_reserve(skb, xdp->data - xdp->data_hard_start);
8409 __skb_put(skb, xdp->data_end - xdp->data);
8412 skb_metadata_set(skb, metasize);
8414 /* pull timestamp out of packet data */
8415 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8416 if (!igb_ptp_rx_pktstamp(rx_ring->q_vector, skb->data, skb))
8417 __skb_pull(skb, IGB_TS_HDR_LEN);
8420 /* update buffer offset */
8421 #if (PAGE_SIZE < 8192)
8422 rx_buffer->page_offset ^= truesize;
8424 rx_buffer->page_offset += truesize;
8430 static struct sk_buff *igb_run_xdp(struct igb_adapter *adapter,
8431 struct igb_ring *rx_ring,
8432 struct xdp_buff *xdp)
8434 int err, result = IGB_XDP_PASS;
8435 struct bpf_prog *xdp_prog;
8439 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
8444 prefetchw(xdp->data_hard_start); /* xdp_frame write */
8446 act = bpf_prog_run_xdp(xdp_prog, xdp);
8451 result = igb_xdp_xmit_back(adapter, xdp);
8452 if (result == IGB_XDP_CONSUMED)
8456 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
8459 result = IGB_XDP_REDIR;
8462 bpf_warn_invalid_xdp_action(act);
8466 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
8469 result = IGB_XDP_CONSUMED;
8474 return ERR_PTR(-result);
8477 static unsigned int igb_rx_frame_truesize(struct igb_ring *rx_ring,
8480 unsigned int truesize;
8482 #if (PAGE_SIZE < 8192)
8483 truesize = igb_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
8485 truesize = ring_uses_build_skb(rx_ring) ?
8486 SKB_DATA_ALIGN(IGB_SKB_PAD + size) +
8487 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
8488 SKB_DATA_ALIGN(size);
8493 static void igb_rx_buffer_flip(struct igb_ring *rx_ring,
8494 struct igb_rx_buffer *rx_buffer,
8497 unsigned int truesize = igb_rx_frame_truesize(rx_ring, size);
8498 #if (PAGE_SIZE < 8192)
8499 rx_buffer->page_offset ^= truesize;
8501 rx_buffer->page_offset += truesize;
8505 static inline void igb_rx_checksum(struct igb_ring *ring,
8506 union e1000_adv_rx_desc *rx_desc,
8507 struct sk_buff *skb)
8509 skb_checksum_none_assert(skb);
8511 /* Ignore Checksum bit is set */
8512 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
8515 /* Rx checksum disabled via ethtool */
8516 if (!(ring->netdev->features & NETIF_F_RXCSUM))
8519 /* TCP/UDP checksum error bit is set */
8520 if (igb_test_staterr(rx_desc,
8521 E1000_RXDEXT_STATERR_TCPE |
8522 E1000_RXDEXT_STATERR_IPE)) {
8523 /* work around errata with sctp packets where the TCPE aka
8524 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
8525 * packets, (aka let the stack check the crc32c)
8527 if (!((skb->len == 60) &&
8528 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
8529 u64_stats_update_begin(&ring->rx_syncp);
8530 ring->rx_stats.csum_err++;
8531 u64_stats_update_end(&ring->rx_syncp);
8533 /* let the stack verify checksum errors */
8536 /* It must be a TCP or UDP packet with a valid checksum */
8537 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
8538 E1000_RXD_STAT_UDPCS))
8539 skb->ip_summed = CHECKSUM_UNNECESSARY;
8541 dev_dbg(ring->dev, "cksum success: bits %08X\n",
8542 le32_to_cpu(rx_desc->wb.upper.status_error));
8545 static inline void igb_rx_hash(struct igb_ring *ring,
8546 union e1000_adv_rx_desc *rx_desc,
8547 struct sk_buff *skb)
8549 if (ring->netdev->features & NETIF_F_RXHASH)
8551 le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
8556 * igb_is_non_eop - process handling of non-EOP buffers
8557 * @rx_ring: Rx ring being processed
8558 * @rx_desc: Rx descriptor for current buffer
8560 * This function updates next to clean. If the buffer is an EOP buffer
8561 * this function exits returning false, otherwise it will place the
8562 * sk_buff in the next buffer to be chained and return true indicating
8563 * that this is in fact a non-EOP buffer.
8565 static bool igb_is_non_eop(struct igb_ring *rx_ring,
8566 union e1000_adv_rx_desc *rx_desc)
8568 u32 ntc = rx_ring->next_to_clean + 1;
8570 /* fetch, update, and store next to clean */
8571 ntc = (ntc < rx_ring->count) ? ntc : 0;
8572 rx_ring->next_to_clean = ntc;
8574 prefetch(IGB_RX_DESC(rx_ring, ntc));
8576 if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
8583 * igb_cleanup_headers - Correct corrupted or empty headers
8584 * @rx_ring: rx descriptor ring packet is being transacted on
8585 * @rx_desc: pointer to the EOP Rx descriptor
8586 * @skb: pointer to current skb being fixed
8588 * Address the case where we are pulling data in on pages only
8589 * and as such no data is present in the skb header.
8591 * In addition if skb is not at least 60 bytes we need to pad it so that
8592 * it is large enough to qualify as a valid Ethernet frame.
8594 * Returns true if an error was encountered and skb was freed.
8596 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8597 union e1000_adv_rx_desc *rx_desc,
8598 struct sk_buff *skb)
8600 /* XDP packets use error pointer so abort at this point */
8604 if (unlikely((igb_test_staterr(rx_desc,
8605 E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8606 struct net_device *netdev = rx_ring->netdev;
8607 if (!(netdev->features & NETIF_F_RXALL)) {
8608 dev_kfree_skb_any(skb);
8613 /* if eth_skb_pad returns an error the skb was freed */
8614 if (eth_skb_pad(skb))
8621 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
8622 * @rx_ring: rx descriptor ring packet is being transacted on
8623 * @rx_desc: pointer to the EOP Rx descriptor
8624 * @skb: pointer to current skb being populated
8626 * This function checks the ring, descriptor, and packet information in
8627 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
8628 * other fields within the skb.
8630 static void igb_process_skb_fields(struct igb_ring *rx_ring,
8631 union e1000_adv_rx_desc *rx_desc,
8632 struct sk_buff *skb)
8634 struct net_device *dev = rx_ring->netdev;
8636 igb_rx_hash(rx_ring, rx_desc, skb);
8638 igb_rx_checksum(rx_ring, rx_desc, skb);
8640 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
8641 !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
8642 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
8644 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
8645 igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
8648 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
8649 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
8650 vid = be16_to_cpu((__force __be16)rx_desc->wb.upper.vlan);
8652 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
8654 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
8657 skb_record_rx_queue(skb, rx_ring->queue_index);
8659 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
8662 static unsigned int igb_rx_offset(struct igb_ring *rx_ring)
8664 return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
8667 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
8668 const unsigned int size, int *rx_buf_pgcnt)
8670 struct igb_rx_buffer *rx_buffer;
8672 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
8674 #if (PAGE_SIZE < 8192)
8675 page_count(rx_buffer->page);
8679 prefetchw(rx_buffer->page);
8681 /* we are reusing so sync this buffer for CPU use */
8682 dma_sync_single_range_for_cpu(rx_ring->dev,
8684 rx_buffer->page_offset,
8688 rx_buffer->pagecnt_bias--;
8693 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
8694 struct igb_rx_buffer *rx_buffer, int rx_buf_pgcnt)
8696 if (igb_can_reuse_rx_page(rx_buffer, rx_buf_pgcnt)) {
8697 /* hand second half of page back to the ring */
8698 igb_reuse_rx_page(rx_ring, rx_buffer);
8700 /* We are not reusing the buffer so unmap it and free
8701 * any references we are holding to it
8703 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
8704 igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
8706 __page_frag_cache_drain(rx_buffer->page,
8707 rx_buffer->pagecnt_bias);
8710 /* clear contents of rx_buffer */
8711 rx_buffer->page = NULL;
8714 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
8716 struct igb_adapter *adapter = q_vector->adapter;
8717 struct igb_ring *rx_ring = q_vector->rx.ring;
8718 struct sk_buff *skb = rx_ring->skb;
8719 unsigned int total_bytes = 0, total_packets = 0;
8720 u16 cleaned_count = igb_desc_unused(rx_ring);
8721 unsigned int xdp_xmit = 0;
8722 struct xdp_buff xdp;
8725 xdp.rxq = &rx_ring->xdp_rxq;
8727 /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
8728 #if (PAGE_SIZE < 8192)
8729 xdp.frame_sz = igb_rx_frame_truesize(rx_ring, 0);
8732 while (likely(total_packets < budget)) {
8733 union e1000_adv_rx_desc *rx_desc;
8734 struct igb_rx_buffer *rx_buffer;
8737 /* return some buffers to hardware, one at a time is too slow */
8738 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8739 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8743 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8744 size = le16_to_cpu(rx_desc->wb.upper.length);
8748 /* This memory barrier is needed to keep us from reading
8749 * any other fields out of the rx_desc until we know the
8750 * descriptor has been written back
8754 rx_buffer = igb_get_rx_buffer(rx_ring, size, &rx_buf_pgcnt);
8756 /* retrieve a buffer from the ring */
8758 xdp.data = page_address(rx_buffer->page) +
8759 rx_buffer->page_offset;
8760 xdp.data_meta = xdp.data;
8761 xdp.data_hard_start = xdp.data -
8762 igb_rx_offset(rx_ring);
8763 xdp.data_end = xdp.data + size;
8764 #if (PAGE_SIZE > 4096)
8765 /* At larger PAGE_SIZE, frame_sz depend on len size */
8766 xdp.frame_sz = igb_rx_frame_truesize(rx_ring, size);
8768 skb = igb_run_xdp(adapter, rx_ring, &xdp);
8772 unsigned int xdp_res = -PTR_ERR(skb);
8774 if (xdp_res & (IGB_XDP_TX | IGB_XDP_REDIR)) {
8775 xdp_xmit |= xdp_res;
8776 igb_rx_buffer_flip(rx_ring, rx_buffer, size);
8778 rx_buffer->pagecnt_bias++;
8781 total_bytes += size;
8783 igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
8784 else if (ring_uses_build_skb(rx_ring))
8785 skb = igb_build_skb(rx_ring, rx_buffer, &xdp, rx_desc);
8787 skb = igb_construct_skb(rx_ring, rx_buffer,
8790 /* exit if we failed to retrieve a buffer */
8792 rx_ring->rx_stats.alloc_failed++;
8793 rx_buffer->pagecnt_bias++;
8797 igb_put_rx_buffer(rx_ring, rx_buffer, rx_buf_pgcnt);
8800 /* fetch next buffer in frame if non-eop */
8801 if (igb_is_non_eop(rx_ring, rx_desc))
8804 /* verify the packet layout is correct */
8805 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8810 /* probably a little skewed due to removing CRC */
8811 total_bytes += skb->len;
8813 /* populate checksum, timestamp, VLAN, and protocol */
8814 igb_process_skb_fields(rx_ring, rx_desc, skb);
8816 napi_gro_receive(&q_vector->napi, skb);
8818 /* reset skb pointer */
8821 /* update budget accounting */
8825 /* place incomplete frames back on ring for completion */
8828 if (xdp_xmit & IGB_XDP_REDIR)
8831 if (xdp_xmit & IGB_XDP_TX) {
8832 struct igb_ring *tx_ring = igb_xdp_tx_queue_mapping(adapter);
8834 igb_xdp_ring_update_tail(tx_ring);
8837 u64_stats_update_begin(&rx_ring->rx_syncp);
8838 rx_ring->rx_stats.packets += total_packets;
8839 rx_ring->rx_stats.bytes += total_bytes;
8840 u64_stats_update_end(&rx_ring->rx_syncp);
8841 q_vector->rx.total_packets += total_packets;
8842 q_vector->rx.total_bytes += total_bytes;
8845 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8847 return total_packets;
8850 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8851 struct igb_rx_buffer *bi)
8853 struct page *page = bi->page;
8856 /* since we are recycling buffers we should seldom need to alloc */
8860 /* alloc new page for storage */
8861 page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
8862 if (unlikely(!page)) {
8863 rx_ring->rx_stats.alloc_failed++;
8867 /* map page for use */
8868 dma = dma_map_page_attrs(rx_ring->dev, page, 0,
8869 igb_rx_pg_size(rx_ring),
8873 /* if mapping failed free memory back to system since
8874 * there isn't much point in holding memory we can't use
8876 if (dma_mapping_error(rx_ring->dev, dma)) {
8877 __free_pages(page, igb_rx_pg_order(rx_ring));
8879 rx_ring->rx_stats.alloc_failed++;
8885 bi->page_offset = igb_rx_offset(rx_ring);
8886 page_ref_add(page, USHRT_MAX - 1);
8887 bi->pagecnt_bias = USHRT_MAX;
8893 * igb_alloc_rx_buffers - Replace used receive buffers
8894 * @rx_ring: rx descriptor ring to allocate new receive buffers
8895 * @cleaned_count: count of buffers to allocate
8897 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8899 union e1000_adv_rx_desc *rx_desc;
8900 struct igb_rx_buffer *bi;
8901 u16 i = rx_ring->next_to_use;
8908 rx_desc = IGB_RX_DESC(rx_ring, i);
8909 bi = &rx_ring->rx_buffer_info[i];
8910 i -= rx_ring->count;
8912 bufsz = igb_rx_bufsz(rx_ring);
8915 if (!igb_alloc_mapped_page(rx_ring, bi))
8918 /* sync the buffer for use by the device */
8919 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
8920 bi->page_offset, bufsz,
8923 /* Refresh the desc even if buffer_addrs didn't change
8924 * because each write-back erases this info.
8926 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8932 rx_desc = IGB_RX_DESC(rx_ring, 0);
8933 bi = rx_ring->rx_buffer_info;
8934 i -= rx_ring->count;
8937 /* clear the length for the next_to_use descriptor */
8938 rx_desc->wb.upper.length = 0;
8941 } while (cleaned_count);
8943 i += rx_ring->count;
8945 if (rx_ring->next_to_use != i) {
8946 /* record the next descriptor to use */
8947 rx_ring->next_to_use = i;
8949 /* update next to alloc since we have filled the ring */
8950 rx_ring->next_to_alloc = i;
8952 /* Force memory writes to complete before letting h/w
8953 * know there are new descriptors to fetch. (Only
8954 * applicable for weak-ordered memory model archs,
8958 writel(i, rx_ring->tail);
8964 * @netdev: pointer to netdev struct
8965 * @ifr: interface structure
8966 * @cmd: ioctl command to execute
8968 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8970 struct igb_adapter *adapter = netdev_priv(netdev);
8971 struct mii_ioctl_data *data = if_mii(ifr);
8973 if (adapter->hw.phy.media_type != e1000_media_type_copper)
8978 data->phy_id = adapter->hw.phy.addr;
8981 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8994 * @netdev: pointer to netdev struct
8995 * @ifr: interface structure
8996 * @cmd: ioctl command to execute
8998 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
9004 return igb_mii_ioctl(netdev, ifr, cmd);
9006 return igb_ptp_get_ts_config(netdev, ifr);
9008 return igb_ptp_set_ts_config(netdev, ifr);
9014 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
9016 struct igb_adapter *adapter = hw->back;
9018 pci_read_config_word(adapter->pdev, reg, value);
9021 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
9023 struct igb_adapter *adapter = hw->back;
9025 pci_write_config_word(adapter->pdev, reg, *value);
9028 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9030 struct igb_adapter *adapter = hw->back;
9032 if (pcie_capability_read_word(adapter->pdev, reg, value))
9033 return -E1000_ERR_CONFIG;
9038 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9040 struct igb_adapter *adapter = hw->back;
9042 if (pcie_capability_write_word(adapter->pdev, reg, *value))
9043 return -E1000_ERR_CONFIG;
9048 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
9050 struct igb_adapter *adapter = netdev_priv(netdev);
9051 struct e1000_hw *hw = &adapter->hw;
9053 bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
9056 /* enable VLAN tag insert/strip */
9057 ctrl = rd32(E1000_CTRL);
9058 ctrl |= E1000_CTRL_VME;
9059 wr32(E1000_CTRL, ctrl);
9061 /* Disable CFI check */
9062 rctl = rd32(E1000_RCTL);
9063 rctl &= ~E1000_RCTL_CFIEN;
9064 wr32(E1000_RCTL, rctl);
9066 /* disable VLAN tag insert/strip */
9067 ctrl = rd32(E1000_CTRL);
9068 ctrl &= ~E1000_CTRL_VME;
9069 wr32(E1000_CTRL, ctrl);
9072 igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
9075 static int igb_vlan_rx_add_vid(struct net_device *netdev,
9076 __be16 proto, u16 vid)
9078 struct igb_adapter *adapter = netdev_priv(netdev);
9079 struct e1000_hw *hw = &adapter->hw;
9080 int pf_id = adapter->vfs_allocated_count;
9082 /* add the filter since PF can receive vlans w/o entry in vlvf */
9083 if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9084 igb_vfta_set(hw, vid, pf_id, true, !!vid);
9086 set_bit(vid, adapter->active_vlans);
9091 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
9092 __be16 proto, u16 vid)
9094 struct igb_adapter *adapter = netdev_priv(netdev);
9095 int pf_id = adapter->vfs_allocated_count;
9096 struct e1000_hw *hw = &adapter->hw;
9098 /* remove VID from filter table */
9099 if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9100 igb_vfta_set(hw, vid, pf_id, false, true);
9102 clear_bit(vid, adapter->active_vlans);
9107 static void igb_restore_vlan(struct igb_adapter *adapter)
9111 igb_vlan_mode(adapter->netdev, adapter->netdev->features);
9112 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
9114 for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
9115 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
9118 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
9120 struct pci_dev *pdev = adapter->pdev;
9121 struct e1000_mac_info *mac = &adapter->hw.mac;
9125 /* Make sure dplx is at most 1 bit and lsb of speed is not set
9126 * for the switch() below to work
9128 if ((spd & 1) || (dplx & ~1))
9131 /* Fiber NIC's only allow 1000 gbps Full duplex
9132 * and 100Mbps Full duplex for 100baseFx sfp
9134 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
9135 switch (spd + dplx) {
9136 case SPEED_10 + DUPLEX_HALF:
9137 case SPEED_10 + DUPLEX_FULL:
9138 case SPEED_100 + DUPLEX_HALF:
9145 switch (spd + dplx) {
9146 case SPEED_10 + DUPLEX_HALF:
9147 mac->forced_speed_duplex = ADVERTISE_10_HALF;
9149 case SPEED_10 + DUPLEX_FULL:
9150 mac->forced_speed_duplex = ADVERTISE_10_FULL;
9152 case SPEED_100 + DUPLEX_HALF:
9153 mac->forced_speed_duplex = ADVERTISE_100_HALF;
9155 case SPEED_100 + DUPLEX_FULL:
9156 mac->forced_speed_duplex = ADVERTISE_100_FULL;
9158 case SPEED_1000 + DUPLEX_FULL:
9160 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
9162 case SPEED_1000 + DUPLEX_HALF: /* not supported */
9167 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
9168 adapter->hw.phy.mdix = AUTO_ALL_MODES;
9173 dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
9177 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
9180 struct net_device *netdev = pci_get_drvdata(pdev);
9181 struct igb_adapter *adapter = netdev_priv(netdev);
9182 struct e1000_hw *hw = &adapter->hw;
9183 u32 ctrl, rctl, status;
9184 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
9188 netif_device_detach(netdev);
9190 if (netif_running(netdev))
9191 __igb_close(netdev, true);
9193 igb_ptp_suspend(adapter);
9195 igb_clear_interrupt_scheme(adapter);
9198 status = rd32(E1000_STATUS);
9199 if (status & E1000_STATUS_LU)
9200 wufc &= ~E1000_WUFC_LNKC;
9203 igb_setup_rctl(adapter);
9204 igb_set_rx_mode(netdev);
9206 /* turn on all-multi mode if wake on multicast is enabled */
9207 if (wufc & E1000_WUFC_MC) {
9208 rctl = rd32(E1000_RCTL);
9209 rctl |= E1000_RCTL_MPE;
9210 wr32(E1000_RCTL, rctl);
9213 ctrl = rd32(E1000_CTRL);
9214 ctrl |= E1000_CTRL_ADVD3WUC;
9215 wr32(E1000_CTRL, ctrl);
9217 /* Allow time for pending master requests to run */
9218 igb_disable_pcie_master(hw);
9220 wr32(E1000_WUC, E1000_WUC_PME_EN);
9221 wr32(E1000_WUFC, wufc);
9224 wr32(E1000_WUFC, 0);
9227 wake = wufc || adapter->en_mng_pt;
9229 igb_power_down_link(adapter);
9231 igb_power_up_link(adapter);
9234 *enable_wake = wake;
9236 /* Release control of h/w to f/w. If f/w is AMT enabled, this
9237 * would have already happened in close and is redundant.
9239 igb_release_hw_control(adapter);
9241 pci_disable_device(pdev);
9246 static void igb_deliver_wake_packet(struct net_device *netdev)
9248 struct igb_adapter *adapter = netdev_priv(netdev);
9249 struct e1000_hw *hw = &adapter->hw;
9250 struct sk_buff *skb;
9253 wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
9255 /* WUPM stores only the first 128 bytes of the wake packet.
9256 * Read the packet only if we have the whole thing.
9258 if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
9261 skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
9267 /* Ensure reads are 32-bit aligned */
9268 wupl = roundup(wupl, 4);
9270 memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
9272 skb->protocol = eth_type_trans(skb, netdev);
9276 static int __maybe_unused igb_suspend(struct device *dev)
9278 return __igb_shutdown(to_pci_dev(dev), NULL, 0);
9281 static int __maybe_unused __igb_resume(struct device *dev, bool rpm)
9283 struct pci_dev *pdev = to_pci_dev(dev);
9284 struct net_device *netdev = pci_get_drvdata(pdev);
9285 struct igb_adapter *adapter = netdev_priv(netdev);
9286 struct e1000_hw *hw = &adapter->hw;
9289 pci_set_power_state(pdev, PCI_D0);
9290 pci_restore_state(pdev);
9291 pci_save_state(pdev);
9293 if (!pci_device_is_present(pdev))
9295 err = pci_enable_device_mem(pdev);
9298 "igb: Cannot enable PCI device from suspend\n");
9301 pci_set_master(pdev);
9303 pci_enable_wake(pdev, PCI_D3hot, 0);
9304 pci_enable_wake(pdev, PCI_D3cold, 0);
9306 if (igb_init_interrupt_scheme(adapter, true)) {
9307 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9313 /* let the f/w know that the h/w is now under the control of the
9316 igb_get_hw_control(adapter);
9318 val = rd32(E1000_WUS);
9319 if (val & WAKE_PKT_WUS)
9320 igb_deliver_wake_packet(netdev);
9322 wr32(E1000_WUS, ~0);
9326 if (!err && netif_running(netdev))
9327 err = __igb_open(netdev, true);
9330 netif_device_attach(netdev);
9337 static int __maybe_unused igb_resume(struct device *dev)
9339 return __igb_resume(dev, false);
9342 static int __maybe_unused igb_runtime_idle(struct device *dev)
9344 struct net_device *netdev = dev_get_drvdata(dev);
9345 struct igb_adapter *adapter = netdev_priv(netdev);
9347 if (!igb_has_link(adapter))
9348 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9353 static int __maybe_unused igb_runtime_suspend(struct device *dev)
9355 return __igb_shutdown(to_pci_dev(dev), NULL, 1);
9358 static int __maybe_unused igb_runtime_resume(struct device *dev)
9360 return __igb_resume(dev, true);
9363 static void igb_shutdown(struct pci_dev *pdev)
9367 __igb_shutdown(pdev, &wake, 0);
9369 if (system_state == SYSTEM_POWER_OFF) {
9370 pci_wake_from_d3(pdev, wake);
9371 pci_set_power_state(pdev, PCI_D3hot);
9375 #ifdef CONFIG_PCI_IOV
9376 static int igb_sriov_reinit(struct pci_dev *dev)
9378 struct net_device *netdev = pci_get_drvdata(dev);
9379 struct igb_adapter *adapter = netdev_priv(netdev);
9380 struct pci_dev *pdev = adapter->pdev;
9384 if (netif_running(netdev))
9389 igb_clear_interrupt_scheme(adapter);
9391 igb_init_queue_configuration(adapter);
9393 if (igb_init_interrupt_scheme(adapter, true)) {
9395 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9399 if (netif_running(netdev))
9407 static int igb_pci_disable_sriov(struct pci_dev *dev)
9409 int err = igb_disable_sriov(dev);
9412 err = igb_sriov_reinit(dev);
9417 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
9419 int err = igb_enable_sriov(dev, num_vfs);
9424 err = igb_sriov_reinit(dev);
9433 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
9435 #ifdef CONFIG_PCI_IOV
9437 return igb_pci_disable_sriov(dev);
9439 return igb_pci_enable_sriov(dev, num_vfs);
9445 * igb_io_error_detected - called when PCI error is detected
9446 * @pdev: Pointer to PCI device
9447 * @state: The current pci connection state
9449 * This function is called after a PCI bus error affecting
9450 * this device has been detected.
9452 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9453 pci_channel_state_t state)
9455 struct net_device *netdev = pci_get_drvdata(pdev);
9456 struct igb_adapter *adapter = netdev_priv(netdev);
9458 if (state == pci_channel_io_normal) {
9459 dev_warn(&pdev->dev, "Non-correctable non-fatal error reported.\n");
9460 return PCI_ERS_RESULT_CAN_RECOVER;
9463 netif_device_detach(netdev);
9465 if (state == pci_channel_io_perm_failure)
9466 return PCI_ERS_RESULT_DISCONNECT;
9468 if (netif_running(netdev))
9470 pci_disable_device(pdev);
9472 /* Request a slot slot reset. */
9473 return PCI_ERS_RESULT_NEED_RESET;
9477 * igb_io_slot_reset - called after the pci bus has been reset.
9478 * @pdev: Pointer to PCI device
9480 * Restart the card from scratch, as if from a cold-boot. Implementation
9481 * resembles the first-half of the __igb_resume routine.
9483 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9485 struct net_device *netdev = pci_get_drvdata(pdev);
9486 struct igb_adapter *adapter = netdev_priv(netdev);
9487 struct e1000_hw *hw = &adapter->hw;
9488 pci_ers_result_t result;
9490 if (pci_enable_device_mem(pdev)) {
9492 "Cannot re-enable PCI device after reset.\n");
9493 result = PCI_ERS_RESULT_DISCONNECT;
9495 pci_set_master(pdev);
9496 pci_restore_state(pdev);
9497 pci_save_state(pdev);
9499 pci_enable_wake(pdev, PCI_D3hot, 0);
9500 pci_enable_wake(pdev, PCI_D3cold, 0);
9502 /* In case of PCI error, adapter lose its HW address
9503 * so we should re-assign it here.
9505 hw->hw_addr = adapter->io_addr;
9508 wr32(E1000_WUS, ~0);
9509 result = PCI_ERS_RESULT_RECOVERED;
9516 * igb_io_resume - called when traffic can start flowing again.
9517 * @pdev: Pointer to PCI device
9519 * This callback is called when the error recovery driver tells us that
9520 * its OK to resume normal operation. Implementation resembles the
9521 * second-half of the __igb_resume routine.
9523 static void igb_io_resume(struct pci_dev *pdev)
9525 struct net_device *netdev = pci_get_drvdata(pdev);
9526 struct igb_adapter *adapter = netdev_priv(netdev);
9528 if (netif_running(netdev)) {
9529 if (igb_up(adapter)) {
9530 dev_err(&pdev->dev, "igb_up failed after reset\n");
9535 netif_device_attach(netdev);
9537 /* let the f/w know that the h/w is now under the control of the
9540 igb_get_hw_control(adapter);
9544 * igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
9545 * @adapter: Pointer to adapter structure
9546 * @index: Index of the RAR entry which need to be synced with MAC table
9548 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
9550 struct e1000_hw *hw = &adapter->hw;
9551 u32 rar_low, rar_high;
9552 u8 *addr = adapter->mac_table[index].addr;
9554 /* HW expects these to be in network order when they are plugged
9555 * into the registers which are little endian. In order to guarantee
9556 * that ordering we need to do an leXX_to_cpup here in order to be
9557 * ready for the byteswap that occurs with writel
9559 rar_low = le32_to_cpup((__le32 *)(addr));
9560 rar_high = le16_to_cpup((__le16 *)(addr + 4));
9562 /* Indicate to hardware the Address is Valid. */
9563 if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
9564 if (is_valid_ether_addr(addr))
9565 rar_high |= E1000_RAH_AV;
9567 if (adapter->mac_table[index].state & IGB_MAC_STATE_SRC_ADDR)
9568 rar_high |= E1000_RAH_ASEL_SRC_ADDR;
9570 switch (hw->mac.type) {
9573 if (adapter->mac_table[index].state &
9574 IGB_MAC_STATE_QUEUE_STEERING)
9575 rar_high |= E1000_RAH_QSEL_ENABLE;
9577 rar_high |= E1000_RAH_POOL_1 *
9578 adapter->mac_table[index].queue;
9581 rar_high |= E1000_RAH_POOL_1 <<
9582 adapter->mac_table[index].queue;
9587 wr32(E1000_RAL(index), rar_low);
9589 wr32(E1000_RAH(index), rar_high);
9593 static int igb_set_vf_mac(struct igb_adapter *adapter,
9594 int vf, unsigned char *mac_addr)
9596 struct e1000_hw *hw = &adapter->hw;
9597 /* VF MAC addresses start at end of receive addresses and moves
9598 * towards the first, as a result a collision should not be possible
9600 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
9601 unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
9603 ether_addr_copy(vf_mac_addr, mac_addr);
9604 ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
9605 adapter->mac_table[rar_entry].queue = vf;
9606 adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
9607 igb_rar_set_index(adapter, rar_entry);
9612 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9614 struct igb_adapter *adapter = netdev_priv(netdev);
9616 if (vf >= adapter->vfs_allocated_count)
9619 /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
9620 * flag and allows to overwrite the MAC via VF netdev. This
9621 * is necessary to allow libvirt a way to restore the original
9622 * MAC after unbinding vfio-pci and reloading igbvf after shutting
9625 if (is_zero_ether_addr(mac)) {
9626 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
9627 dev_info(&adapter->pdev->dev,
9628 "remove administratively set MAC on VF %d\n",
9630 } else if (is_valid_ether_addr(mac)) {
9631 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9632 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
9634 dev_info(&adapter->pdev->dev,
9635 "Reload the VF driver to make this change effective.");
9636 /* Generate additional warning if PF is down */
9637 if (test_bit(__IGB_DOWN, &adapter->state)) {
9638 dev_warn(&adapter->pdev->dev,
9639 "The VF MAC address has been set, but the PF device is not up.\n");
9640 dev_warn(&adapter->pdev->dev,
9641 "Bring the PF device up before attempting to use the VF device.\n");
9646 return igb_set_vf_mac(adapter, vf, mac);
9649 static int igb_link_mbps(int internal_link_speed)
9651 switch (internal_link_speed) {
9661 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9668 /* Calculate the rate factor values to set */
9669 rf_int = link_speed / tx_rate;
9670 rf_dec = (link_speed - (rf_int * tx_rate));
9671 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
9674 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9675 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
9676 E1000_RTTBCNRC_RF_INT_MASK);
9677 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9682 wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
9683 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9684 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9686 wr32(E1000_RTTBCNRM, 0x14);
9687 wr32(E1000_RTTBCNRC, bcnrc_val);
9690 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9692 int actual_link_speed, i;
9693 bool reset_rate = false;
9695 /* VF TX rate limit was not set or not supported */
9696 if ((adapter->vf_rate_link_speed == 0) ||
9697 (adapter->hw.mac.type != e1000_82576))
9700 actual_link_speed = igb_link_mbps(adapter->link_speed);
9701 if (actual_link_speed != adapter->vf_rate_link_speed) {
9703 adapter->vf_rate_link_speed = 0;
9704 dev_info(&adapter->pdev->dev,
9705 "Link speed has been changed. VF Transmit rate is disabled\n");
9708 for (i = 0; i < adapter->vfs_allocated_count; i++) {
9710 adapter->vf_data[i].tx_rate = 0;
9712 igb_set_vf_rate_limit(&adapter->hw, i,
9713 adapter->vf_data[i].tx_rate,
9718 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
9719 int min_tx_rate, int max_tx_rate)
9721 struct igb_adapter *adapter = netdev_priv(netdev);
9722 struct e1000_hw *hw = &adapter->hw;
9723 int actual_link_speed;
9725 if (hw->mac.type != e1000_82576)
9731 actual_link_speed = igb_link_mbps(adapter->link_speed);
9732 if ((vf >= adapter->vfs_allocated_count) ||
9733 (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
9734 (max_tx_rate < 0) ||
9735 (max_tx_rate > actual_link_speed))
9738 adapter->vf_rate_link_speed = actual_link_speed;
9739 adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
9740 igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
9745 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
9748 struct igb_adapter *adapter = netdev_priv(netdev);
9749 struct e1000_hw *hw = &adapter->hw;
9750 u32 reg_val, reg_offset;
9752 if (!adapter->vfs_allocated_count)
9755 if (vf >= adapter->vfs_allocated_count)
9758 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
9759 reg_val = rd32(reg_offset);
9761 reg_val |= (BIT(vf) |
9762 BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9764 reg_val &= ~(BIT(vf) |
9765 BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9766 wr32(reg_offset, reg_val);
9768 adapter->vf_data[vf].spoofchk_enabled = setting;
9772 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)
9774 struct igb_adapter *adapter = netdev_priv(netdev);
9776 if (vf >= adapter->vfs_allocated_count)
9778 if (adapter->vf_data[vf].trusted == setting)
9781 adapter->vf_data[vf].trusted = setting;
9783 dev_info(&adapter->pdev->dev, "VF %u is %strusted\n",
9784 vf, setting ? "" : "not ");
9788 static int igb_ndo_get_vf_config(struct net_device *netdev,
9789 int vf, struct ifla_vf_info *ivi)
9791 struct igb_adapter *adapter = netdev_priv(netdev);
9792 if (vf >= adapter->vfs_allocated_count)
9795 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9796 ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9797 ivi->min_tx_rate = 0;
9798 ivi->vlan = adapter->vf_data[vf].pf_vlan;
9799 ivi->qos = adapter->vf_data[vf].pf_qos;
9800 ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9801 ivi->trusted = adapter->vf_data[vf].trusted;
9805 static void igb_vmm_control(struct igb_adapter *adapter)
9807 struct e1000_hw *hw = &adapter->hw;
9810 switch (hw->mac.type) {
9816 /* replication is not supported for 82575 */
9819 /* notify HW that the MAC is adding vlan tags */
9820 reg = rd32(E1000_DTXCTL);
9821 reg |= E1000_DTXCTL_VLAN_ADDED;
9822 wr32(E1000_DTXCTL, reg);
9825 /* enable replication vlan tag stripping */
9826 reg = rd32(E1000_RPLOLR);
9827 reg |= E1000_RPLOLR_STRVLAN;
9828 wr32(E1000_RPLOLR, reg);
9831 /* none of the above registers are supported by i350 */
9835 if (adapter->vfs_allocated_count) {
9836 igb_vmdq_set_loopback_pf(hw, true);
9837 igb_vmdq_set_replication_pf(hw, true);
9838 igb_vmdq_set_anti_spoofing_pf(hw, true,
9839 adapter->vfs_allocated_count);
9841 igb_vmdq_set_loopback_pf(hw, false);
9842 igb_vmdq_set_replication_pf(hw, false);
9846 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9848 struct e1000_hw *hw = &adapter->hw;
9853 if (hw->mac.type > e1000_82580) {
9854 if (adapter->flags & IGB_FLAG_DMAC) {
9855 /* force threshold to 0. */
9856 wr32(E1000_DMCTXTH, 0);
9858 /* DMA Coalescing high water mark needs to be greater
9859 * than the Rx threshold. Set hwm to PBA - max frame
9860 * size in 16B units, capping it at PBA - 6KB.
9862 hwm = 64 * (pba - 6);
9863 reg = rd32(E1000_FCRTC);
9864 reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9865 reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9866 & E1000_FCRTC_RTH_COAL_MASK);
9867 wr32(E1000_FCRTC, reg);
9869 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
9870 * frame size, capping it at PBA - 10KB.
9872 dmac_thr = pba - 10;
9873 reg = rd32(E1000_DMACR);
9874 reg &= ~E1000_DMACR_DMACTHR_MASK;
9875 reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9876 & E1000_DMACR_DMACTHR_MASK);
9878 /* transition to L0x or L1 if available..*/
9879 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9881 /* watchdog timer= +-1000 usec in 32usec intervals */
9884 /* Disable BMC-to-OS Watchdog Enable */
9885 if (hw->mac.type != e1000_i354)
9886 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9887 wr32(E1000_DMACR, reg);
9889 /* no lower threshold to disable
9890 * coalescing(smart fifb)-UTRESH=0
9892 wr32(E1000_DMCRTRH, 0);
9894 reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
9896 wr32(E1000_DMCTLX, reg);
9898 /* free space in tx packet buffer to wake from
9901 wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9902 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9905 if (hw->mac.type >= e1000_i210 ||
9906 (adapter->flags & IGB_FLAG_DMAC)) {
9907 reg = rd32(E1000_PCIEMISC);
9908 reg |= E1000_PCIEMISC_LX_DECISION;
9909 wr32(E1000_PCIEMISC, reg);
9910 } /* endif adapter->dmac is not disabled */
9911 } else if (hw->mac.type == e1000_82580) {
9912 u32 reg = rd32(E1000_PCIEMISC);
9914 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
9915 wr32(E1000_DMACR, 0);
9920 * igb_read_i2c_byte - Reads 8 bit word over I2C
9921 * @hw: pointer to hardware structure
9922 * @byte_offset: byte offset to read
9923 * @dev_addr: device address
9926 * Performs byte read operation over I2C interface at
9927 * a specified device address.
9929 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9930 u8 dev_addr, u8 *data)
9932 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9933 struct i2c_client *this_client = adapter->i2c_client;
9938 return E1000_ERR_I2C;
9940 swfw_mask = E1000_SWFW_PHY0_SM;
9942 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9943 return E1000_ERR_SWFW_SYNC;
9945 status = i2c_smbus_read_byte_data(this_client, byte_offset);
9946 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9949 return E1000_ERR_I2C;
9957 * igb_write_i2c_byte - Writes 8 bit word over I2C
9958 * @hw: pointer to hardware structure
9959 * @byte_offset: byte offset to write
9960 * @dev_addr: device address
9961 * @data: value to write
9963 * Performs byte write operation over I2C interface at
9964 * a specified device address.
9966 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9967 u8 dev_addr, u8 data)
9969 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9970 struct i2c_client *this_client = adapter->i2c_client;
9972 u16 swfw_mask = E1000_SWFW_PHY0_SM;
9975 return E1000_ERR_I2C;
9977 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9978 return E1000_ERR_SWFW_SYNC;
9979 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9980 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9983 return E1000_ERR_I2C;
9989 int igb_reinit_queues(struct igb_adapter *adapter)
9991 struct net_device *netdev = adapter->netdev;
9992 struct pci_dev *pdev = adapter->pdev;
9995 if (netif_running(netdev))
9998 igb_reset_interrupt_capability(adapter);
10000 if (igb_init_interrupt_scheme(adapter, true)) {
10001 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
10005 if (netif_running(netdev))
10006 err = igb_open(netdev);
10011 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
10013 struct igb_nfc_filter *rule;
10015 spin_lock(&adapter->nfc_lock);
10017 hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
10018 igb_erase_filter(adapter, rule);
10020 hlist_for_each_entry(rule, &adapter->cls_flower_list, nfc_node)
10021 igb_erase_filter(adapter, rule);
10023 spin_unlock(&adapter->nfc_lock);
10026 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
10028 struct igb_nfc_filter *rule;
10030 spin_lock(&adapter->nfc_lock);
10032 hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
10033 igb_add_filter(adapter, rule);
10035 spin_unlock(&adapter->nfc_lock);