drivers/net/ethernet/intel/igb/igb_main.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/bitops.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/pagemap.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/ipv6.h>
  34 #include <linux/slab.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/net_tstamp.h>
  38 #include <linux/mii.h>
  39 #include <linux/ethtool.h>
  40 #include <linux/if.h>
  41 #include <linux/if_vlan.h>
  42 #include <linux/pci.h>
  43 #include <linux/pci-aspm.h>
  44 #include <linux/delay.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/ip.h>
  47 #include <linux/tcp.h>
  48 #include <linux/sctp.h>
  49 #include <linux/if_ether.h>
  50 #include <linux/aer.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/pm_runtime.h>
  53 #include <linux/etherdevice.h>
  54 #ifdef CONFIG_IGB_DCA
  55 #include <linux/dca.h>
  56 #endif
  57 #include <linux/i2c.h>
  58 #include "igb.h"
  59
  60 #define MAJ 5
  61 #define MIN 4
  62 #define BUILD 0
  63 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  64 __stringify(BUILD) "-k"
  65 char igb_driver_name[] = "igb";
  66 char igb_driver_version[] = DRV_VERSION;
  67 static const char igb_driver_string[] =
  68                                 "Intel(R) Gigabit Ethernet Network Driver";
  69 static const char igb_copyright[] =
  70                                 "Copyright (c) 2007-2014 Intel Corporation.";
  71
  72 static const struct e1000_info *igb_info_tbl[] = {
  73         [board_82575] = &e1000_82575_info,
  74 };
  75
  76 static const struct pci_device_id igb_pci_tbl[] = {
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 112         /* required last entry */
 113         {0, }
 114 };
 115
 116 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 117
 118 static int igb_setup_all_tx_resources(struct igb_adapter *);
 119 static int igb_setup_all_rx_resources(struct igb_adapter *);
 120 static void igb_free_all_tx_resources(struct igb_adapter *);
 121 static void igb_free_all_rx_resources(struct igb_adapter *);
 122 static void igb_setup_mrqc(struct igb_adapter *);
 123 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 124 static void igb_remove(struct pci_dev *pdev);
 125 static int igb_sw_init(struct igb_adapter *);
 126 int igb_open(struct net_device *);
 127 int igb_close(struct net_device *);
 128 static void igb_configure(struct igb_adapter *);
 129 static void igb_configure_tx(struct igb_adapter *);
 130 static void igb_configure_rx(struct igb_adapter *);
 131 static void igb_clean_all_tx_rings(struct igb_adapter *);
 132 static void igb_clean_all_rx_rings(struct igb_adapter *);
 133 static void igb_clean_tx_ring(struct igb_ring *);
 134 static void igb_clean_rx_ring(struct igb_ring *);
 135 static void igb_set_rx_mode(struct net_device *);
 136 static void igb_update_phy_info(unsigned long);
 137 static void igb_watchdog(unsigned long);
 138 static void igb_watchdog_task(struct work_struct *);
 139 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 140 static void igb_get_stats64(struct net_device *dev,
 141                             struct rtnl_link_stats64 *stats);
 142 static int igb_change_mtu(struct net_device *, int);
 143 static int igb_set_mac(struct net_device *, void *);
 144 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 145 static irqreturn_t igb_intr(int irq, void *);
 146 static irqreturn_t igb_intr_msi(int irq, void *);
 147 static irqreturn_t igb_msix_other(int irq, void *);
 148 static irqreturn_t igb_msix_ring(int irq, void *);
 149 #ifdef CONFIG_IGB_DCA
 150 static void igb_update_dca(struct igb_q_vector *);
 151 static void igb_setup_dca(struct igb_adapter *);
 152 #endif /* CONFIG_IGB_DCA */
 153 static int igb_poll(struct napi_struct *, int);
 154 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 155 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 156 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 157 static void igb_tx_timeout(struct net_device *);
 158 static void igb_reset_task(struct work_struct *);
 159 static void igb_vlan_mode(struct net_device *netdev,
 160                           netdev_features_t features);
 161 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 162 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 163 static void igb_restore_vlan(struct igb_adapter *);
 164 static void igb_rar_set_index(struct igb_adapter *, u32);
 165 static void igb_ping_all_vfs(struct igb_adapter *);
 166 static void igb_msg_task(struct igb_adapter *);
 167 static void igb_vmm_control(struct igb_adapter *);
 168 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 169 static void igb_flush_mac_table(struct igb_adapter *);
 170 static int igb_available_rars(struct igb_adapter *, u8);
 171 static void igb_set_default_mac_filter(struct igb_adapter *);
 172 static int igb_uc_sync(struct net_device *, const unsigned char *);
 173 static int igb_uc_unsync(struct net_device *, const unsigned char *);
 174 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 175 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 176 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 177                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 178 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 179 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 180                                    bool setting);
 181 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 182                                  struct ifla_vf_info *ivi);
 183 static void igb_check_vf_rate_limit(struct igb_adapter *);
 184 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 185 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 186
 187 #ifdef CONFIG_PCI_IOV
 188 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 189 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 190 static int igb_disable_sriov(struct pci_dev *dev);
 191 static int igb_pci_disable_sriov(struct pci_dev *dev);
 192 #endif
 193
 194 static int igb_suspend(struct device *);
 195 static int igb_resume(struct device *);
 196 static int igb_runtime_suspend(struct device *dev);
 197 static int igb_runtime_resume(struct device *dev);
 198 static int igb_runtime_idle(struct device *dev);
 199 static const struct dev_pm_ops igb_pm_ops = {
 200         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 201         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 202                         igb_runtime_idle)
 203 };
 204 static void igb_shutdown(struct pci_dev *);
 205 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 206 #ifdef CONFIG_IGB_DCA
 207 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 208 static struct notifier_block dca_notifier = {
 209         .notifier_call  = igb_notify_dca,
 210         .next           = NULL,
 211         .priority       = 0
 212 };
 213 #endif
 214 #ifdef CONFIG_NET_POLL_CONTROLLER
 215 /* for netdump / net console */
 216 static void igb_netpoll(struct net_device *);
 217 #endif
 218 #ifdef CONFIG_PCI_IOV
 219 static unsigned int max_vfs;
 220 module_param(max_vfs, uint, 0);
 221 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 222 #endif /* CONFIG_PCI_IOV */
 223
 224 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 225                      pci_channel_state_t);
 226 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 227 static void igb_io_resume(struct pci_dev *);
 228
 229 static const struct pci_error_handlers igb_err_handler = {
 230         .error_detected = igb_io_error_detected,
 231         .slot_reset = igb_io_slot_reset,
 232         .resume = igb_io_resume,
 233 };
 234
 235 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 236
 237 static struct pci_driver igb_driver = {
 238         .name     = igb_driver_name,
 239         .id_table = igb_pci_tbl,
 240         .probe    = igb_probe,
 241         .remove   = igb_remove,
 242 #ifdef CONFIG_PM
 243         .driver.pm = &igb_pm_ops,
 244 #endif
 245         .shutdown = igb_shutdown,
 246         .sriov_configure = igb_pci_sriov_configure,
 247         .err_handler = &igb_err_handler
 248 };
 249
 250 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 251 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 252 MODULE_LICENSE("GPL");
 253 MODULE_VERSION(DRV_VERSION);
 254
 255 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 256 static int debug = -1;
 257 module_param(debug, int, 0);
 258 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 259
 260 struct igb_reg_info {
 261         u32 ofs;
 262         char *name;
 263 };
 264
 265 static const struct igb_reg_info igb_reg_info_tbl[] = {
 266
 267         /* General Registers */
 268         {E1000_CTRL, "CTRL"},
 269         {E1000_STATUS, "STATUS"},
 270         {E1000_CTRL_EXT, "CTRL_EXT"},
 271
 272         /* Interrupt Registers */
 273         {E1000_ICR, "ICR"},
 274
 275         /* RX Registers */
 276         {E1000_RCTL, "RCTL"},
 277         {E1000_RDLEN(0), "RDLEN"},
 278         {E1000_RDH(0), "RDH"},
 279         {E1000_RDT(0), "RDT"},
 280         {E1000_RXDCTL(0), "RXDCTL"},
 281         {E1000_RDBAL(0), "RDBAL"},
 282         {E1000_RDBAH(0), "RDBAH"},
 283
 284         /* TX Registers */
 285         {E1000_TCTL, "TCTL"},
 286         {E1000_TDBAL(0), "TDBAL"},
 287         {E1000_TDBAH(0), "TDBAH"},
 288         {E1000_TDLEN(0), "TDLEN"},
 289         {E1000_TDH(0), "TDH"},
 290         {E1000_TDT(0), "TDT"},
 291         {E1000_TXDCTL(0), "TXDCTL"},
 292         {E1000_TDFH, "TDFH"},
 293         {E1000_TDFT, "TDFT"},
 294         {E1000_TDFHS, "TDFHS"},
 295         {E1000_TDFPC, "TDFPC"},
 296
 297         /* List Terminator */
 298         {}
 299 };
 300
 301 /* igb_regdump - register printout routine */
 302 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 303 {
 304         int n = 0;
 305         char rname[16];
 306         u32 regs[8];
 307
 308         switch (reginfo->ofs) {
 309         case E1000_RDLEN(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDLEN(n));
 312                 break;
 313         case E1000_RDH(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDH(n));
 316                 break;
 317         case E1000_RDT(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_RDT(n));
 320                 break;
 321         case E1000_RXDCTL(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_RXDCTL(n));
 324                 break;
 325         case E1000_RDBAL(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_RDBAL(n));
 328                 break;
 329         case E1000_RDBAH(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_RDBAH(n));
 332                 break;
 333         case E1000_TDBAL(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_RDBAL(n));
 336                 break;
 337         case E1000_TDBAH(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TDBAH(n));
 340                 break;
 341         case E1000_TDLEN(0):
 342                 for (n = 0; n < 4; n++)
 343                         regs[n] = rd32(E1000_TDLEN(n));
 344                 break;
 345         case E1000_TDH(0):
 346                 for (n = 0; n < 4; n++)
 347                         regs[n] = rd32(E1000_TDH(n));
 348                 break;
 349         case E1000_TDT(0):
 350                 for (n = 0; n < 4; n++)
 351                         regs[n] = rd32(E1000_TDT(n));
 352                 break;
 353         case E1000_TXDCTL(0):
 354                 for (n = 0; n < 4; n++)
 355                         regs[n] = rd32(E1000_TXDCTL(n));
 356                 break;
 357         default:
 358                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 359                 return;
 360         }
 361
 362         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 363         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 364                 regs[2], regs[3]);
 365 }
 366
 367 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 368 static void igb_dump(struct igb_adapter *adapter)
 369 {
 370         struct net_device *netdev = adapter->netdev;
 371         struct e1000_hw *hw = &adapter->hw;
 372         struct igb_reg_info *reginfo;
 373         struct igb_ring *tx_ring;
 374         union e1000_adv_tx_desc *tx_desc;
 375         struct my_u0 { u64 a; u64 b; } *u0;
 376         struct igb_ring *rx_ring;
 377         union e1000_adv_rx_desc *rx_desc;
 378         u32 staterr;
 379         u16 i, n;
 380
 381         if (!netif_msg_hw(adapter))
 382                 return;
 383
 384         /* Print netdevice Info */
 385         if (netdev) {
 386                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 387                 pr_info("Device Name     state            trans_start\n");
 388                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 389                         netdev->state, dev_trans_start(netdev));
 390         }
 391
 392         /* Print Registers */
 393         dev_info(&adapter->pdev->dev, "Register Dump\n");
 394         pr_info(" Register Name   Value\n");
 395         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 396              reginfo->name; reginfo++) {
 397                 igb_regdump(hw, reginfo);
 398         }
 399
 400         /* Print TX Ring Summary */
 401         if (!netdev || !netif_running(netdev))
 402                 goto exit;
 403
 404         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 405         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 406         for (n = 0; n < adapter->num_tx_queues; n++) {
 407                 struct igb_tx_buffer *buffer_info;
 408                 tx_ring = adapter->tx_ring[n];
 409                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 410                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 411                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 412                         (u64)dma_unmap_addr(buffer_info, dma),
 413                         dma_unmap_len(buffer_info, len),
 414                         buffer_info->next_to_watch,
 415                         (u64)buffer_info->time_stamp);
 416         }
 417
 418         /* Print TX Rings */
 419         if (!netif_msg_tx_done(adapter))
 420                 goto rx_ring_summary;
 421
 422         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 423
 424         /* Transmit Descriptor Formats
 425          *
 426          * Advanced Transmit Descriptor
 427          *   +--------------------------------------------------------------+
 428          * 0 |         Buffer Address [63:0]                                |
 429          *   +--------------------------------------------------------------+
 430          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 431          *   +--------------------------------------------------------------+
 432          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 433          */
 434
 435         for (n = 0; n < adapter->num_tx_queues; n++) {
 436                 tx_ring = adapter->tx_ring[n];
 437                 pr_info("------------------------------------\n");
 438                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 439                 pr_info("------------------------------------\n");
 440                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 441
 442                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 443                         const char *next_desc;
 444                         struct igb_tx_buffer *buffer_info;
 445                         tx_desc = IGB_TX_DESC(tx_ring, i);
 446                         buffer_info = &tx_ring->tx_buffer_info[i];
 447                         u0 = (struct my_u0 *)tx_desc;
 448                         if (i == tx_ring->next_to_use &&
 449                             i == tx_ring->next_to_clean)
 450                                 next_desc = " NTC/U";
 451                         else if (i == tx_ring->next_to_use)
 452                                 next_desc = " NTU";
 453                         else if (i == tx_ring->next_to_clean)
 454                                 next_desc = " NTC";
 455                         else
 456                                 next_desc = "";
 457
 458                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 459                                 i, le64_to_cpu(u0->a),
 460                                 le64_to_cpu(u0->b),
 461                                 (u64)dma_unmap_addr(buffer_info, dma),
 462                                 dma_unmap_len(buffer_info, len),
 463                                 buffer_info->next_to_watch,
 464                                 (u64)buffer_info->time_stamp,
 465                                 buffer_info->skb, next_desc);
 466
 467                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 468                                 print_hex_dump(KERN_INFO, "",
 469                                         DUMP_PREFIX_ADDRESS,
 470                                         16, 1, buffer_info->skb->data,
 471                                         dma_unmap_len(buffer_info, len),
 472                                         true);
 473                 }
 474         }
 475
 476         /* Print RX Rings Summary */
 477 rx_ring_summary:
 478         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 479         pr_info("Queue [NTU] [NTC]\n");
 480         for (n = 0; n < adapter->num_rx_queues; n++) {
 481                 rx_ring = adapter->rx_ring[n];
 482                 pr_info(" %5d %5X %5X\n",
 483                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 484         }
 485
 486         /* Print RX Rings */
 487         if (!netif_msg_rx_status(adapter))
 488                 goto exit;
 489
 490         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 491
 492         /* Advanced Receive Descriptor (Read) Format
 493          *    63                                           1        0
 494          *    +-----------------------------------------------------+
 495          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 496          *    +----------------------------------------------+------+
 497          *  8 |       Header Buffer Address [63:1]           |  DD  |
 498          *    +-----------------------------------------------------+
 499          *
 500          *
 501          * Advanced Receive Descriptor (Write-Back) Format
 502          *
 503          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 504          *   +------------------------------------------------------+
 505          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 506          *   | Checksum   Ident  |   |           |    | Type | Type |
 507          *   +------------------------------------------------------+
 508          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 509          *   +------------------------------------------------------+
 510          *   63       48 47    32 31            20 19               0
 511          */
 512
 513         for (n = 0; n < adapter->num_rx_queues; n++) {
 514                 rx_ring = adapter->rx_ring[n];
 515                 pr_info("------------------------------------\n");
 516                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 517                 pr_info("------------------------------------\n");
 518                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 519                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 520
 521                 for (i = 0; i < rx_ring->count; i++) {
 522                         const char *next_desc;
 523                         struct igb_rx_buffer *buffer_info;
 524                         buffer_info = &rx_ring->rx_buffer_info[i];
 525                         rx_desc = IGB_RX_DESC(rx_ring, i);
 526                         u0 = (struct my_u0 *)rx_desc;
 527                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 528
 529                         if (i == rx_ring->next_to_use)
 530                                 next_desc = " NTU";
 531                         else if (i == rx_ring->next_to_clean)
 532                                 next_desc = " NTC";
 533                         else
 534                                 next_desc = "";
 535
 536                         if (staterr & E1000_RXD_STAT_DD) {
 537                                 /* Descriptor Done */
 538                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 539                                         "RWB", i,
 540                                         le64_to_cpu(u0->a),
 541                                         le64_to_cpu(u0->b),
 542                                         next_desc);
 543                         } else {
 544                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 545                                         "R  ", i,
 546                                         le64_to_cpu(u0->a),
 547                                         le64_to_cpu(u0->b),
 548                                         (u64)buffer_info->dma,
 549                                         next_desc);
 550
 551                                 if (netif_msg_pktdata(adapter) &&
 552                                     buffer_info->dma && buffer_info->page) {
 553                                         print_hex_dump(KERN_INFO, "",
 554                                           DUMP_PREFIX_ADDRESS,
 555                                           16, 1,
 556                                           page_address(buffer_info->page) +
 557                                                       buffer_info->page_offset,
 558                                           igb_rx_bufsz(rx_ring), true);
 559                                 }
 560                         }
 561                 }
 562         }
 563
 564 exit:
 565         return;
 566 }
 567
 568 /**
 569  *  igb_get_i2c_data - Reads the I2C SDA data bit
 570  *  @hw: pointer to hardware structure
 571  *  @i2cctl: Current value of I2CCTL register
 572  *
 573  *  Returns the I2C data bit value
 574  **/
 575 static int igb_get_i2c_data(void *data)
 576 {
 577         struct igb_adapter *adapter = (struct igb_adapter *)data;
 578         struct e1000_hw *hw = &adapter->hw;
 579         s32 i2cctl = rd32(E1000_I2CPARAMS);
 580
 581         return !!(i2cctl & E1000_I2C_DATA_IN);
 582 }
 583
 584 /**
 585  *  igb_set_i2c_data - Sets the I2C data bit
 586  *  @data: pointer to hardware structure
 587  *  @state: I2C data value (0 or 1) to set
 588  *
 589  *  Sets the I2C data bit
 590  **/
 591 static void igb_set_i2c_data(void *data, int state)
 592 {
 593         struct igb_adapter *adapter = (struct igb_adapter *)data;
 594         struct e1000_hw *hw = &adapter->hw;
 595         s32 i2cctl = rd32(E1000_I2CPARAMS);
 596
 597         if (state)
 598                 i2cctl |= E1000_I2C_DATA_OUT;
 599         else
 600                 i2cctl &= ~E1000_I2C_DATA_OUT;
 601
 602         i2cctl &= ~E1000_I2C_DATA_OE_N;
 603         i2cctl |= E1000_I2C_CLK_OE_N;
 604         wr32(E1000_I2CPARAMS, i2cctl);
 605         wrfl();
 606
 607 }
 608
 609 /**
 610  *  igb_set_i2c_clk - Sets the I2C SCL clock
 611  *  @data: pointer to hardware structure
 612  *  @state: state to set clock
 613  *
 614  *  Sets the I2C clock line to state
 615  **/
 616 static void igb_set_i2c_clk(void *data, int state)
 617 {
 618         struct igb_adapter *adapter = (struct igb_adapter *)data;
 619         struct e1000_hw *hw = &adapter->hw;
 620         s32 i2cctl = rd32(E1000_I2CPARAMS);
 621
 622         if (state) {
 623                 i2cctl |= E1000_I2C_CLK_OUT;
 624                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 625         } else {
 626                 i2cctl &= ~E1000_I2C_CLK_OUT;
 627                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 628         }
 629         wr32(E1000_I2CPARAMS, i2cctl);
 630         wrfl();
 631 }
 632
 633 /**
 634  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 635  *  @data: pointer to hardware structure
 636  *
 637  *  Gets the I2C clock state
 638  **/
 639 static int igb_get_i2c_clk(void *data)
 640 {
 641         struct igb_adapter *adapter = (struct igb_adapter *)data;
 642         struct e1000_hw *hw = &adapter->hw;
 643         s32 i2cctl = rd32(E1000_I2CPARAMS);
 644
 645         return !!(i2cctl & E1000_I2C_CLK_IN);
 646 }
 647
 648 static const struct i2c_algo_bit_data igb_i2c_algo = {
 649         .setsda         = igb_set_i2c_data,
 650         .setscl         = igb_set_i2c_clk,
 651         .getsda         = igb_get_i2c_data,
 652         .getscl         = igb_get_i2c_clk,
 653         .udelay         = 5,
 654         .timeout        = 20,
 655 };
 656
 657 /**
 658  *  igb_get_hw_dev - return device
 659  *  @hw: pointer to hardware structure
 660  *
 661  *  used by hardware layer to print debugging information
 662  **/
 663 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 664 {
 665         struct igb_adapter *adapter = hw->back;
 666         return adapter->netdev;
 667 }
 668
 669 /**
 670  *  igb_init_module - Driver Registration Routine
 671  *
 672  *  igb_init_module is the first routine called when the driver is
 673  *  loaded. All it does is register with the PCI subsystem.
 674  **/
 675 static int __init igb_init_module(void)
 676 {
 677         int ret;
 678
 679         pr_info("%s - version %s\n",
 680                igb_driver_string, igb_driver_version);
 681         pr_info("%s\n", igb_copyright);
 682
 683 #ifdef CONFIG_IGB_DCA
 684         dca_register_notify(&dca_notifier);
 685 #endif
 686         ret = pci_register_driver(&igb_driver);
 687         return ret;
 688 }
 689
 690 module_init(igb_init_module);
 691
 692 /**
 693  *  igb_exit_module - Driver Exit Cleanup Routine
 694  *
 695  *  igb_exit_module is called just before the driver is removed
 696  *  from memory.
 697  **/
 698 static void __exit igb_exit_module(void)
 699 {
 700 #ifdef CONFIG_IGB_DCA
 701         dca_unregister_notify(&dca_notifier);
 702 #endif
 703         pci_unregister_driver(&igb_driver);
 704 }
 705
 706 module_exit(igb_exit_module);
 707
 708 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 709 /**
 710  *  igb_cache_ring_register - Descriptor ring to register mapping
 711  *  @adapter: board private structure to initialize
 712  *
 713  *  Once we know the feature-set enabled for the device, we'll cache
 714  *  the register offset the descriptor ring is assigned to.
 715  **/
 716 static void igb_cache_ring_register(struct igb_adapter *adapter)
 717 {
 718         int i = 0, j = 0;
 719         u32 rbase_offset = adapter->vfs_allocated_count;
 720
 721         switch (adapter->hw.mac.type) {
 722         case e1000_82576:
 723                 /* The queues are allocated for virtualization such that VF 0
 724                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 725                  * In order to avoid collision we start at the first free queue
 726                  * and continue consuming queues in the same sequence
 727                  */
 728                 if (adapter->vfs_allocated_count) {
 729                         for (; i < adapter->rss_queues; i++)
 730                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 731                                                                Q_IDX_82576(i);
 732                 }
 733                 /* Fall through */
 734         case e1000_82575:
 735         case e1000_82580:
 736         case e1000_i350:
 737         case e1000_i354:
 738         case e1000_i210:
 739         case e1000_i211:
 740                 /* Fall through */
 741         default:
 742                 for (; i < adapter->num_rx_queues; i++)
 743                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 744                 for (; j < adapter->num_tx_queues; j++)
 745                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 746                 break;
 747         }
 748 }
 749
 750 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 751 {
 752         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 753         u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
 754         u32 value = 0;
 755
 756         if (E1000_REMOVED(hw_addr))
 757                 return ~value;
 758
 759         value = readl(&hw_addr[reg]);
 760
 761         /* reads should not return all F's */
 762         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 763                 struct net_device *netdev = igb->netdev;
 764                 hw->hw_addr = NULL;
 765                 netif_device_detach(netdev);
 766                 netdev_err(netdev, "PCIe link lost, device now detached\n");
 767         }
 768
 769         return value;
 770 }
 771
 772 /**
 773  *  igb_write_ivar - configure ivar for given MSI-X vector
 774  *  @hw: pointer to the HW structure
 775  *  @msix_vector: vector number we are allocating to a given ring
 776  *  @index: row index of IVAR register to write within IVAR table
 777  *  @offset: column offset of in IVAR, should be multiple of 8
 778  *
 779  *  This function is intended to handle the writing of the IVAR register
 780  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 781  *  each containing an cause allocation for an Rx and Tx ring, and a
 782  *  variable number of rows depending on the number of queues supported.
 783  **/
 784 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 785                            int index, int offset)
 786 {
 787         u32 ivar = array_rd32(E1000_IVAR0, index);
 788
 789         /* clear any bits that are currently set */
 790         ivar &= ~((u32)0xFF << offset);
 791
 792         /* write vector and valid bit */
 793         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 794
 795         array_wr32(E1000_IVAR0, index, ivar);
 796 }
 797
 798 #define IGB_N0_QUEUE -1
 799 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 800 {
 801         struct igb_adapter *adapter = q_vector->adapter;
 802         struct e1000_hw *hw = &adapter->hw;
 803         int rx_queue = IGB_N0_QUEUE;
 804         int tx_queue = IGB_N0_QUEUE;
 805         u32 msixbm = 0;
 806
 807         if (q_vector->rx.ring)
 808                 rx_queue = q_vector->rx.ring->reg_idx;
 809         if (q_vector->tx.ring)
 810                 tx_queue = q_vector->tx.ring->reg_idx;
 811
 812         switch (hw->mac.type) {
 813         case e1000_82575:
 814                 /* The 82575 assigns vectors using a bitmask, which matches the
 815                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 816                  * or more queues to a vector, we write the appropriate bits
 817                  * into the MSIXBM register for that vector.
 818                  */
 819                 if (rx_queue > IGB_N0_QUEUE)
 820                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 821                 if (tx_queue > IGB_N0_QUEUE)
 822                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 823                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 824                         msixbm |= E1000_EIMS_OTHER;
 825                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 826                 q_vector->eims_value = msixbm;
 827                 break;
 828         case e1000_82576:
 829                 /* 82576 uses a table that essentially consists of 2 columns
 830                  * with 8 rows.  The ordering is column-major so we use the
 831                  * lower 3 bits as the row index, and the 4th bit as the
 832                  * column offset.
 833                  */
 834                 if (rx_queue > IGB_N0_QUEUE)
 835                         igb_write_ivar(hw, msix_vector,
 836                                        rx_queue & 0x7,
 837                                        (rx_queue & 0x8) << 1);
 838                 if (tx_queue > IGB_N0_QUEUE)
 839                         igb_write_ivar(hw, msix_vector,
 840                                        tx_queue & 0x7,
 841                                        ((tx_queue & 0x8) << 1) + 8);
 842                 q_vector->eims_value = BIT(msix_vector);
 843                 break;
 844         case e1000_82580:
 845         case e1000_i350:
 846         case e1000_i354:
 847         case e1000_i210:
 848         case e1000_i211:
 849                 /* On 82580 and newer adapters the scheme is similar to 82576
 850                  * however instead of ordering column-major we have things
 851                  * ordered row-major.  So we traverse the table by using
 852                  * bit 0 as the column offset, and the remaining bits as the
 853                  * row index.
 854                  */
 855                 if (rx_queue > IGB_N0_QUEUE)
 856                         igb_write_ivar(hw, msix_vector,
 857                                        rx_queue >> 1,
 858                                        (rx_queue & 0x1) << 4);
 859                 if (tx_queue > IGB_N0_QUEUE)
 860                         igb_write_ivar(hw, msix_vector,
 861                                        tx_queue >> 1,
 862                                        ((tx_queue & 0x1) << 4) + 8);
 863                 q_vector->eims_value = BIT(msix_vector);
 864                 break;
 865         default:
 866                 BUG();
 867                 break;
 868         }
 869
 870         /* add q_vector eims value to global eims_enable_mask */
 871         adapter->eims_enable_mask |= q_vector->eims_value;
 872
 873         /* configure q_vector to set itr on first interrupt */
 874         q_vector->set_itr = 1;
 875 }
 876
 877 /**
 878  *  igb_configure_msix - Configure MSI-X hardware
 879  *  @adapter: board private structure to initialize
 880  *
 881  *  igb_configure_msix sets up the hardware to properly
 882  *  generate MSI-X interrupts.
 883  **/
 884 static void igb_configure_msix(struct igb_adapter *adapter)
 885 {
 886         u32 tmp;
 887         int i, vector = 0;
 888         struct e1000_hw *hw = &adapter->hw;
 889
 890         adapter->eims_enable_mask = 0;
 891
 892         /* set vector for other causes, i.e. link changes */
 893         switch (hw->mac.type) {
 894         case e1000_82575:
 895                 tmp = rd32(E1000_CTRL_EXT);
 896                 /* enable MSI-X PBA support*/
 897                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 898
 899                 /* Auto-Mask interrupts upon ICR read. */
 900                 tmp |= E1000_CTRL_EXT_EIAME;
 901                 tmp |= E1000_CTRL_EXT_IRCA;
 902
 903                 wr32(E1000_CTRL_EXT, tmp);
 904
 905                 /* enable msix_other interrupt */
 906                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 907                 adapter->eims_other = E1000_EIMS_OTHER;
 908
 909                 break;
 910
 911         case e1000_82576:
 912         case e1000_82580:
 913         case e1000_i350:
 914         case e1000_i354:
 915         case e1000_i210:
 916         case e1000_i211:
 917                 /* Turn on MSI-X capability first, or our settings
 918                  * won't stick.  And it will take days to debug.
 919                  */
 920                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 921                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 922                      E1000_GPIE_NSICR);
 923
 924                 /* enable msix_other interrupt */
 925                 adapter->eims_other = BIT(vector);
 926                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 927
 928                 wr32(E1000_IVAR_MISC, tmp);
 929                 break;
 930         default:
 931                 /* do nothing, since nothing else supports MSI-X */
 932                 break;
 933         } /* switch (hw->mac.type) */
 934
 935         adapter->eims_enable_mask |= adapter->eims_other;
 936
 937         for (i = 0; i < adapter->num_q_vectors; i++)
 938                 igb_assign_vector(adapter->q_vector[i], vector++);
 939
 940         wrfl();
 941 }
 942
 943 /**
 944  *  igb_request_msix - Initialize MSI-X interrupts
 945  *  @adapter: board private structure to initialize
 946  *
 947  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 948  *  kernel.
 949  **/
 950 static int igb_request_msix(struct igb_adapter *adapter)
 951 {
 952         unsigned int num_q_vectors = adapter->num_q_vectors;
 953         struct net_device *netdev = adapter->netdev;
 954         int i, err = 0, vector = 0, free_vector = 0;
 955
 956         err = request_irq(adapter->msix_entries[vector].vector,
 957                           igb_msix_other, 0, netdev->name, adapter);
 958         if (err)
 959                 goto err_out;
 960
 961         if (num_q_vectors > MAX_Q_VECTORS) {
 962                 num_q_vectors = MAX_Q_VECTORS;
 963                 dev_warn(&adapter->pdev->dev,
 964                          "The number of queue vectors (%d) is higher than max allowed (%d)\n",
 965                          adapter->num_q_vectors, MAX_Q_VECTORS);
 966         }
 967         for (i = 0; i < num_q_vectors; i++) {
 968                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 969
 970                 vector++;
 971
 972                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 973
 974                 if (q_vector->rx.ring && q_vector->tx.ring)
 975                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 976                                 q_vector->rx.ring->queue_index);
 977                 else if (q_vector->tx.ring)
 978                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 979                                 q_vector->tx.ring->queue_index);
 980                 else if (q_vector->rx.ring)
 981                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 982                                 q_vector->rx.ring->queue_index);
 983                 else
 984                         sprintf(q_vector->name, "%s-unused", netdev->name);
 985
 986                 err = request_irq(adapter->msix_entries[vector].vector,
 987                                   igb_msix_ring, 0, q_vector->name,
 988                                   q_vector);
 989                 if (err)
 990                         goto err_free;
 991         }
 992
 993         igb_configure_msix(adapter);
 994         return 0;
 995
 996 err_free:
 997         /* free already assigned IRQs */
 998         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 999
1000         vector--;
1001         for (i = 0; i < vector; i++) {
1002                 free_irq(adapter->msix_entries[free_vector++].vector,
1003                          adapter->q_vector[i]);
1004         }
1005 err_out:
1006         return err;
1007 }
1008
1009 /**
1010  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1011  *  @adapter: board private structure to initialize
1012  *  @v_idx: Index of vector to be freed
1013  *
1014  *  This function frees the memory allocated to the q_vector.
1015  **/
1016 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1017 {
1018         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1019
1020         adapter->q_vector[v_idx] = NULL;
1021
1022         /* igb_get_stats64() might access the rings on this vector,
1023          * we must wait a grace period before freeing it.
1024          */
1025         if (q_vector)
1026                 kfree_rcu(q_vector, rcu);
1027 }
1028
1029 /**
1030  *  igb_reset_q_vector - Reset config for interrupt vector
1031  *  @adapter: board private structure to initialize
1032  *  @v_idx: Index of vector to be reset
1033  *
1034  *  If NAPI is enabled it will delete any references to the
1035  *  NAPI struct. This is preparation for igb_free_q_vector.
1036  **/
1037 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1038 {
1039         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1040
1041         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1042          * allocated. So, q_vector is NULL so we should stop here.
1043          */
1044         if (!q_vector)
1045                 return;
1046
1047         if (q_vector->tx.ring)
1048                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1049
1050         if (q_vector->rx.ring)
1051                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1052
1053         netif_napi_del(&q_vector->napi);
1054
1055 }
1056
1057 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1058 {
1059         int v_idx = adapter->num_q_vectors;
1060
1061         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1062                 pci_disable_msix(adapter->pdev);
1063         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1064                 pci_disable_msi(adapter->pdev);
1065
1066         while (v_idx--)
1067                 igb_reset_q_vector(adapter, v_idx);
1068 }
1069
1070 /**
1071  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1072  *  @adapter: board private structure to initialize
1073  *
1074  *  This function frees the memory allocated to the q_vectors.  In addition if
1075  *  NAPI is enabled it will delete any references to the NAPI struct prior
1076  *  to freeing the q_vector.
1077  **/
1078 static void igb_free_q_vectors(struct igb_adapter *adapter)
1079 {
1080         int v_idx = adapter->num_q_vectors;
1081
1082         adapter->num_tx_queues = 0;
1083         adapter->num_rx_queues = 0;
1084         adapter->num_q_vectors = 0;
1085
1086         while (v_idx--) {
1087                 igb_reset_q_vector(adapter, v_idx);
1088                 igb_free_q_vector(adapter, v_idx);
1089         }
1090 }
1091
1092 /**
1093  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1094  *  @adapter: board private structure to initialize
1095  *
1096  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1097  *  MSI-X interrupts allocated.
1098  */
1099 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1100 {
1101         igb_free_q_vectors(adapter);
1102         igb_reset_interrupt_capability(adapter);
1103 }
1104
1105 /**
1106  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1107  *  @adapter: board private structure to initialize
1108  *  @msix: boolean value of MSIX capability
1109  *
1110  *  Attempt to configure interrupts using the best available
1111  *  capabilities of the hardware and kernel.
1112  **/
1113 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1114 {
1115         int err;
1116         int numvecs, i;
1117
1118         if (!msix)
1119                 goto msi_only;
1120         adapter->flags |= IGB_FLAG_HAS_MSIX;
1121
1122         /* Number of supported queues. */
1123         adapter->num_rx_queues = adapter->rss_queues;
1124         if (adapter->vfs_allocated_count)
1125                 adapter->num_tx_queues = 1;
1126         else
1127                 adapter->num_tx_queues = adapter->rss_queues;
1128
1129         /* start with one vector for every Rx queue */
1130         numvecs = adapter->num_rx_queues;
1131
1132         /* if Tx handler is separate add 1 for every Tx queue */
1133         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1134                 numvecs += adapter->num_tx_queues;
1135
1136         /* store the number of vectors reserved for queues */
1137         adapter->num_q_vectors = numvecs;
1138
1139         /* add 1 vector for link status interrupts */
1140         numvecs++;
1141         for (i = 0; i < numvecs; i++)
1142                 adapter->msix_entries[i].entry = i;
1143
1144         err = pci_enable_msix_range(adapter->pdev,
1145                                     adapter->msix_entries,
1146                                     numvecs,
1147                                     numvecs);
1148         if (err > 0)
1149                 return;
1150
1151         igb_reset_interrupt_capability(adapter);
1152
1153         /* If we can't do MSI-X, try MSI */
1154 msi_only:
1155         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1156 #ifdef CONFIG_PCI_IOV
1157         /* disable SR-IOV for non MSI-X configurations */
1158         if (adapter->vf_data) {
1159                 struct e1000_hw *hw = &adapter->hw;
1160                 /* disable iov and allow time for transactions to clear */
1161                 pci_disable_sriov(adapter->pdev);
1162                 msleep(500);
1163
1164                 kfree(adapter->vf_mac_list);
1165                 adapter->vf_mac_list = NULL;
1166                 kfree(adapter->vf_data);
1167                 adapter->vf_data = NULL;
1168                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1169                 wrfl();
1170                 msleep(100);
1171                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1172         }
1173 #endif
1174         adapter->vfs_allocated_count = 0;
1175         adapter->rss_queues = 1;
1176         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1177         adapter->num_rx_queues = 1;
1178         adapter->num_tx_queues = 1;
1179         adapter->num_q_vectors = 1;
1180         if (!pci_enable_msi(adapter->pdev))
1181                 adapter->flags |= IGB_FLAG_HAS_MSI;
1182 }
1183
1184 static void igb_add_ring(struct igb_ring *ring,
1185                          struct igb_ring_container *head)
1186 {
1187         head->ring = ring;
1188         head->count++;
1189 }
1190
1191 /**
1192  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1193  *  @adapter: board private structure to initialize
1194  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1195  *  @v_idx: index of vector in adapter struct
1196  *  @txr_count: total number of Tx rings to allocate
1197  *  @txr_idx: index of first Tx ring to allocate
1198  *  @rxr_count: total number of Rx rings to allocate
1199  *  @rxr_idx: index of first Rx ring to allocate
1200  *
1201  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1202  **/
1203 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1204                               int v_count, int v_idx,
1205                               int txr_count, int txr_idx,
1206                               int rxr_count, int rxr_idx)
1207 {
1208         struct igb_q_vector *q_vector;
1209         struct igb_ring *ring;
1210         int ring_count, size;
1211
1212         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1213         if (txr_count > 1 || rxr_count > 1)
1214                 return -ENOMEM;
1215
1216         ring_count = txr_count + rxr_count;
1217         size = sizeof(struct igb_q_vector) +
1218                (sizeof(struct igb_ring) * ring_count);
1219
1220         /* allocate q_vector and rings */
1221         q_vector = adapter->q_vector[v_idx];
1222         if (!q_vector) {
1223                 q_vector = kzalloc(size, GFP_KERNEL);
1224         } else if (size > ksize(q_vector)) {
1225                 struct igb_q_vector *new_q_vector;
1226
1227                 new_q_vector = kzalloc(size, GFP_KERNEL);
1228                 if (new_q_vector)
1229                         kfree_rcu(q_vector, rcu);
1230                 q_vector = new_q_vector;
1231         } else {
1232                 memset(q_vector, 0, size);
1233         }
1234         if (!q_vector)
1235                 return -ENOMEM;
1236
1237         /* initialize NAPI */
1238         netif_napi_add(adapter->netdev, &q_vector->napi,
1239                        igb_poll, 64);
1240
1241         /* tie q_vector and adapter together */
1242         adapter->q_vector[v_idx] = q_vector;
1243         q_vector->adapter = adapter;
1244
1245         /* initialize work limits */
1246         q_vector->tx.work_limit = adapter->tx_work_limit;
1247
1248         /* initialize ITR configuration */
1249         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1250         q_vector->itr_val = IGB_START_ITR;
1251
1252         /* initialize pointer to rings */
1253         ring = q_vector->ring;
1254
1255         /* intialize ITR */
1256         if (rxr_count) {
1257                 /* rx or rx/tx vector */
1258                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1259                         q_vector->itr_val = adapter->rx_itr_setting;
1260         } else {
1261                 /* tx only vector */
1262                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1263                         q_vector->itr_val = adapter->tx_itr_setting;
1264         }
1265
1266         if (txr_count) {
1267                 /* assign generic ring traits */
1268                 ring->dev = &adapter->pdev->dev;
1269                 ring->netdev = adapter->netdev;
1270
1271                 /* configure backlink on ring */
1272                 ring->q_vector = q_vector;
1273
1274                 /* update q_vector Tx values */
1275                 igb_add_ring(ring, &q_vector->tx);
1276
1277                 /* For 82575, context index must be unique per ring. */
1278                 if (adapter->hw.mac.type == e1000_82575)
1279                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1280
1281                 /* apply Tx specific ring traits */
1282                 ring->count = adapter->tx_ring_count;
1283                 ring->queue_index = txr_idx;
1284
1285                 u64_stats_init(&ring->tx_syncp);
1286                 u64_stats_init(&ring->tx_syncp2);
1287
1288                 /* assign ring to adapter */
1289                 adapter->tx_ring[txr_idx] = ring;
1290
1291                 /* push pointer to next ring */
1292                 ring++;
1293         }
1294
1295         if (rxr_count) {
1296                 /* assign generic ring traits */
1297                 ring->dev = &adapter->pdev->dev;
1298                 ring->netdev = adapter->netdev;
1299
1300                 /* configure backlink on ring */
1301                 ring->q_vector = q_vector;
1302
1303                 /* update q_vector Rx values */
1304                 igb_add_ring(ring, &q_vector->rx);
1305
1306                 /* set flag indicating ring supports SCTP checksum offload */
1307                 if (adapter->hw.mac.type >= e1000_82576)
1308                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1309
1310                 /* On i350, i354, i210, and i211, loopback VLAN packets
1311                  * have the tag byte-swapped.
1312                  */
1313                 if (adapter->hw.mac.type >= e1000_i350)
1314                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1315
1316                 /* apply Rx specific ring traits */
1317                 ring->count = adapter->rx_ring_count;
1318                 ring->queue_index = rxr_idx;
1319
1320                 u64_stats_init(&ring->rx_syncp);
1321
1322                 /* assign ring to adapter */
1323                 adapter->rx_ring[rxr_idx] = ring;
1324         }
1325
1326         return 0;
1327 }
1328
1329
1330 /**
1331  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1332  *  @adapter: board private structure to initialize
1333  *
1334  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1335  *  return -ENOMEM.
1336  **/
1337 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1338 {
1339         int q_vectors = adapter->num_q_vectors;
1340         int rxr_remaining = adapter->num_rx_queues;
1341         int txr_remaining = adapter->num_tx_queues;
1342         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1343         int err;
1344
1345         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1346                 for (; rxr_remaining; v_idx++) {
1347                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1348                                                  0, 0, 1, rxr_idx);
1349
1350                         if (err)
1351                                 goto err_out;
1352
1353                         /* update counts and index */
1354                         rxr_remaining--;
1355                         rxr_idx++;
1356                 }
1357         }
1358
1359         for (; v_idx < q_vectors; v_idx++) {
1360                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1361                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1362
1363                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1364                                          tqpv, txr_idx, rqpv, rxr_idx);
1365
1366                 if (err)
1367                         goto err_out;
1368
1369                 /* update counts and index */
1370                 rxr_remaining -= rqpv;
1371                 txr_remaining -= tqpv;
1372                 rxr_idx++;
1373                 txr_idx++;
1374         }
1375
1376         return 0;
1377
1378 err_out:
1379         adapter->num_tx_queues = 0;
1380         adapter->num_rx_queues = 0;
1381         adapter->num_q_vectors = 0;
1382
1383         while (v_idx--)
1384                 igb_free_q_vector(adapter, v_idx);
1385
1386         return -ENOMEM;
1387 }
1388
1389 /**
1390  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1391  *  @adapter: board private structure to initialize
1392  *  @msix: boolean value of MSIX capability
1393  *
1394  *  This function initializes the interrupts and allocates all of the queues.
1395  **/
1396 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1397 {
1398         struct pci_dev *pdev = adapter->pdev;
1399         int err;
1400
1401         igb_set_interrupt_capability(adapter, msix);
1402
1403         err = igb_alloc_q_vectors(adapter);
1404         if (err) {
1405                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1406                 goto err_alloc_q_vectors;
1407         }
1408
1409         igb_cache_ring_register(adapter);
1410
1411         return 0;
1412
1413 err_alloc_q_vectors:
1414         igb_reset_interrupt_capability(adapter);
1415         return err;
1416 }
1417
1418 /**
1419  *  igb_request_irq - initialize interrupts
1420  *  @adapter: board private structure to initialize
1421  *
1422  *  Attempts to configure interrupts using the best available
1423  *  capabilities of the hardware and kernel.
1424  **/
1425 static int igb_request_irq(struct igb_adapter *adapter)
1426 {
1427         struct net_device *netdev = adapter->netdev;
1428         struct pci_dev *pdev = adapter->pdev;
1429         int err = 0;
1430
1431         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1432                 err = igb_request_msix(adapter);
1433                 if (!err)
1434                         goto request_done;
1435                 /* fall back to MSI */
1436                 igb_free_all_tx_resources(adapter);
1437                 igb_free_all_rx_resources(adapter);
1438
1439                 igb_clear_interrupt_scheme(adapter);
1440                 err = igb_init_interrupt_scheme(adapter, false);
1441                 if (err)
1442                         goto request_done;
1443
1444                 igb_setup_all_tx_resources(adapter);
1445                 igb_setup_all_rx_resources(adapter);
1446                 igb_configure(adapter);
1447         }
1448
1449         igb_assign_vector(adapter->q_vector[0], 0);
1450
1451         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1452                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1453                                   netdev->name, adapter);
1454                 if (!err)
1455                         goto request_done;
1456
1457                 /* fall back to legacy interrupts */
1458                 igb_reset_interrupt_capability(adapter);
1459                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1460         }
1461
1462         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1463                           netdev->name, adapter);
1464
1465         if (err)
1466                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1467                         err);
1468
1469 request_done:
1470         return err;
1471 }
1472
1473 static void igb_free_irq(struct igb_adapter *adapter)
1474 {
1475         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1476                 int vector = 0, i;
1477
1478                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1479
1480                 for (i = 0; i < adapter->num_q_vectors; i++)
1481                         free_irq(adapter->msix_entries[vector++].vector,
1482                                  adapter->q_vector[i]);
1483         } else {
1484                 free_irq(adapter->pdev->irq, adapter);
1485         }
1486 }
1487
1488 /**
1489  *  igb_irq_disable - Mask off interrupt generation on the NIC
1490  *  @adapter: board private structure
1491  **/
1492 static void igb_irq_disable(struct igb_adapter *adapter)
1493 {
1494         struct e1000_hw *hw = &adapter->hw;
1495
1496         /* we need to be careful when disabling interrupts.  The VFs are also
1497          * mapped into these registers and so clearing the bits can cause
1498          * issues on the VF drivers so we only need to clear what we set
1499          */
1500         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1501                 u32 regval = rd32(E1000_EIAM);
1502
1503                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1504                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1505                 regval = rd32(E1000_EIAC);
1506                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1507         }
1508
1509         wr32(E1000_IAM, 0);
1510         wr32(E1000_IMC, ~0);
1511         wrfl();
1512         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1513                 int i;
1514
1515                 for (i = 0; i < adapter->num_q_vectors; i++)
1516                         synchronize_irq(adapter->msix_entries[i].vector);
1517         } else {
1518                 synchronize_irq(adapter->pdev->irq);
1519         }
1520 }
1521
1522 /**
1523  *  igb_irq_enable - Enable default interrupt generation settings
1524  *  @adapter: board private structure
1525  **/
1526 static void igb_irq_enable(struct igb_adapter *adapter)
1527 {
1528         struct e1000_hw *hw = &adapter->hw;
1529
1530         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1531                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1532                 u32 regval = rd32(E1000_EIAC);
1533
1534                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1535                 regval = rd32(E1000_EIAM);
1536                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1537                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1538                 if (adapter->vfs_allocated_count) {
1539                         wr32(E1000_MBVFIMR, 0xFF);
1540                         ims |= E1000_IMS_VMMB;
1541                 }
1542                 wr32(E1000_IMS, ims);
1543         } else {
1544                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1545                                 E1000_IMS_DRSTA);
1546                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1547                                 E1000_IMS_DRSTA);
1548         }
1549 }
1550
1551 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1552 {
1553         struct e1000_hw *hw = &adapter->hw;
1554         u16 pf_id = adapter->vfs_allocated_count;
1555         u16 vid = adapter->hw.mng_cookie.vlan_id;
1556         u16 old_vid = adapter->mng_vlan_id;
1557
1558         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1559                 /* add VID to filter table */
1560                 igb_vfta_set(hw, vid, pf_id, true, true);
1561                 adapter->mng_vlan_id = vid;
1562         } else {
1563                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1564         }
1565
1566         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1567             (vid != old_vid) &&
1568             !test_bit(old_vid, adapter->active_vlans)) {
1569                 /* remove VID from filter table */
1570                 igb_vfta_set(hw, vid, pf_id, false, true);
1571         }
1572 }
1573
1574 /**
1575  *  igb_release_hw_control - release control of the h/w to f/w
1576  *  @adapter: address of board private structure
1577  *
1578  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1579  *  For ASF and Pass Through versions of f/w this means that the
1580  *  driver is no longer loaded.
1581  **/
1582 static void igb_release_hw_control(struct igb_adapter *adapter)
1583 {
1584         struct e1000_hw *hw = &adapter->hw;
1585         u32 ctrl_ext;
1586
1587         /* Let firmware take over control of h/w */
1588         ctrl_ext = rd32(E1000_CTRL_EXT);
1589         wr32(E1000_CTRL_EXT,
1590                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1591 }
1592
1593 /**
1594  *  igb_get_hw_control - get control of the h/w from f/w
1595  *  @adapter: address of board private structure
1596  *
1597  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1598  *  For ASF and Pass Through versions of f/w this means that
1599  *  the driver is loaded.
1600  **/
1601 static void igb_get_hw_control(struct igb_adapter *adapter)
1602 {
1603         struct e1000_hw *hw = &adapter->hw;
1604         u32 ctrl_ext;
1605
1606         /* Let firmware know the driver has taken over */
1607         ctrl_ext = rd32(E1000_CTRL_EXT);
1608         wr32(E1000_CTRL_EXT,
1609                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1610 }
1611
1612 /**
1613  *  igb_configure - configure the hardware for RX and TX
1614  *  @adapter: private board structure
1615  **/
1616 static void igb_configure(struct igb_adapter *adapter)
1617 {
1618         struct net_device *netdev = adapter->netdev;
1619         int i;
1620
1621         igb_get_hw_control(adapter);
1622         igb_set_rx_mode(netdev);
1623
1624         igb_restore_vlan(adapter);
1625
1626         igb_setup_tctl(adapter);
1627         igb_setup_mrqc(adapter);
1628         igb_setup_rctl(adapter);
1629
1630         igb_nfc_filter_restore(adapter);
1631         igb_configure_tx(adapter);
1632         igb_configure_rx(adapter);
1633
1634         igb_rx_fifo_flush_82575(&adapter->hw);
1635
1636         /* call igb_desc_unused which always leaves
1637          * at least 1 descriptor unused to make sure
1638          * next_to_use != next_to_clean
1639          */
1640         for (i = 0; i < adapter->num_rx_queues; i++) {
1641                 struct igb_ring *ring = adapter->rx_ring[i];
1642                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1643         }
1644 }
1645
1646 /**
1647  *  igb_power_up_link - Power up the phy/serdes link
1648  *  @adapter: address of board private structure
1649  **/
1650 void igb_power_up_link(struct igb_adapter *adapter)
1651 {
1652         igb_reset_phy(&adapter->hw);
1653
1654         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1655                 igb_power_up_phy_copper(&adapter->hw);
1656         else
1657                 igb_power_up_serdes_link_82575(&adapter->hw);
1658
1659         igb_setup_link(&adapter->hw);
1660 }
1661
1662 /**
1663  *  igb_power_down_link - Power down the phy/serdes link
1664  *  @adapter: address of board private structure
1665  */
1666 static void igb_power_down_link(struct igb_adapter *adapter)
1667 {
1668         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1669                 igb_power_down_phy_copper_82575(&adapter->hw);
1670         else
1671                 igb_shutdown_serdes_link_82575(&adapter->hw);
1672 }
1673
1674 /**
1675  * Detect and switch function for Media Auto Sense
1676  * @adapter: address of the board private structure
1677  **/
1678 static void igb_check_swap_media(struct igb_adapter *adapter)
1679 {
1680         struct e1000_hw *hw = &adapter->hw;
1681         u32 ctrl_ext, connsw;
1682         bool swap_now = false;
1683
1684         ctrl_ext = rd32(E1000_CTRL_EXT);
1685         connsw = rd32(E1000_CONNSW);
1686
1687         /* need to live swap if current media is copper and we have fiber/serdes
1688          * to go to.
1689          */
1690
1691         if ((hw->phy.media_type == e1000_media_type_copper) &&
1692             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1693                 swap_now = true;
1694         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
1695                    !(connsw & E1000_CONNSW_SERDESD)) {
1696                 /* copper signal takes time to appear */
1697                 if (adapter->copper_tries < 4) {
1698                         adapter->copper_tries++;
1699                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1700                         wr32(E1000_CONNSW, connsw);
1701                         return;
1702                 } else {
1703                         adapter->copper_tries = 0;
1704                         if ((connsw & E1000_CONNSW_PHYSD) &&
1705                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1706                                 swap_now = true;
1707                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1708                                 wr32(E1000_CONNSW, connsw);
1709                         }
1710                 }
1711         }
1712
1713         if (!swap_now)
1714                 return;
1715
1716         switch (hw->phy.media_type) {
1717         case e1000_media_type_copper:
1718                 netdev_info(adapter->netdev,
1719                         "MAS: changing media to fiber/serdes\n");
1720                 ctrl_ext |=
1721                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1722                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1723                 adapter->copper_tries = 0;
1724                 break;
1725         case e1000_media_type_internal_serdes:
1726         case e1000_media_type_fiber:
1727                 netdev_info(adapter->netdev,
1728                         "MAS: changing media to copper\n");
1729                 ctrl_ext &=
1730                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1731                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1732                 break;
1733         default:
1734                 /* shouldn't get here during regular operation */
1735                 netdev_err(adapter->netdev,
1736                         "AMS: Invalid media type found, returning\n");
1737                 break;
1738         }
1739         wr32(E1000_CTRL_EXT, ctrl_ext);
1740 }
1741
1742 /**
1743  *  igb_up - Open the interface and prepare it to handle traffic
1744  *  @adapter: board private structure
1745  **/
1746 int igb_up(struct igb_adapter *adapter)
1747 {
1748         struct e1000_hw *hw = &adapter->hw;
1749         int i;
1750
1751         /* hardware has been reset, we need to reload some things */
1752         igb_configure(adapter);
1753
1754         clear_bit(__IGB_DOWN, &adapter->state);
1755
1756         for (i = 0; i < adapter->num_q_vectors; i++)
1757                 napi_enable(&(adapter->q_vector[i]->napi));
1758
1759         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1760                 igb_configure_msix(adapter);
1761         else
1762                 igb_assign_vector(adapter->q_vector[0], 0);
1763
1764         /* Clear any pending interrupts. */
1765         rd32(E1000_ICR);
1766         igb_irq_enable(adapter);
1767
1768         /* notify VFs that reset has been completed */
1769         if (adapter->vfs_allocated_count) {
1770                 u32 reg_data = rd32(E1000_CTRL_EXT);
1771
1772                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1773                 wr32(E1000_CTRL_EXT, reg_data);
1774         }
1775
1776         netif_tx_start_all_queues(adapter->netdev);
1777
1778         /* start the watchdog. */
1779         hw->mac.get_link_status = 1;
1780         schedule_work(&adapter->watchdog_task);
1781
1782         if ((adapter->flags & IGB_FLAG_EEE) &&
1783             (!hw->dev_spec._82575.eee_disable))
1784                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1785
1786         return 0;
1787 }
1788
1789 void igb_down(struct igb_adapter *adapter)
1790 {
1791         struct net_device *netdev = adapter->netdev;
1792         struct e1000_hw *hw = &adapter->hw;
1793         u32 tctl, rctl;
1794         int i;
1795
1796         /* signal that we're down so the interrupt handler does not
1797          * reschedule our watchdog timer
1798          */
1799         set_bit(__IGB_DOWN, &adapter->state);
1800
1801         /* disable receives in the hardware */
1802         rctl = rd32(E1000_RCTL);
1803         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1804         /* flush and sleep below */
1805
1806         igb_nfc_filter_exit(adapter);
1807
1808         netif_carrier_off(netdev);
1809         netif_tx_stop_all_queues(netdev);
1810
1811         /* disable transmits in the hardware */
1812         tctl = rd32(E1000_TCTL);
1813         tctl &= ~E1000_TCTL_EN;
1814         wr32(E1000_TCTL, tctl);
1815         /* flush both disables and wait for them to finish */
1816         wrfl();
1817         usleep_range(10000, 11000);
1818
1819         igb_irq_disable(adapter);
1820
1821         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1822
1823         for (i = 0; i < adapter->num_q_vectors; i++) {
1824                 if (adapter->q_vector[i]) {
1825                         napi_synchronize(&adapter->q_vector[i]->napi);
1826                         napi_disable(&adapter->q_vector[i]->napi);
1827                 }
1828         }
1829
1830         del_timer_sync(&adapter->watchdog_timer);
1831         del_timer_sync(&adapter->phy_info_timer);
1832
1833         /* record the stats before reset*/
1834         spin_lock(&adapter->stats64_lock);
1835         igb_update_stats(adapter);
1836         spin_unlock(&adapter->stats64_lock);
1837
1838         adapter->link_speed = 0;
1839         adapter->link_duplex = 0;
1840
1841         if (!pci_channel_offline(adapter->pdev))
1842                 igb_reset(adapter);
1843
1844         /* clear VLAN promisc flag so VFTA will be updated if necessary */
1845         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
1846
1847         igb_clean_all_tx_rings(adapter);
1848         igb_clean_all_rx_rings(adapter);
1849 #ifdef CONFIG_IGB_DCA
1850
1851         /* since we reset the hardware DCA settings were cleared */
1852         igb_setup_dca(adapter);
1853 #endif
1854 }
1855
1856 void igb_reinit_locked(struct igb_adapter *adapter)
1857 {
1858         WARN_ON(in_interrupt());
1859         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1860                 usleep_range(1000, 2000);
1861         igb_down(adapter);
1862         igb_up(adapter);
1863         clear_bit(__IGB_RESETTING, &adapter->state);
1864 }
1865
1866 /** igb_enable_mas - Media Autosense re-enable after swap
1867  *
1868  * @adapter: adapter struct
1869  **/
1870 static void igb_enable_mas(struct igb_adapter *adapter)
1871 {
1872         struct e1000_hw *hw = &adapter->hw;
1873         u32 connsw = rd32(E1000_CONNSW);
1874
1875         /* configure for SerDes media detect */
1876         if ((hw->phy.media_type == e1000_media_type_copper) &&
1877             (!(connsw & E1000_CONNSW_SERDESD))) {
1878                 connsw |= E1000_CONNSW_ENRGSRC;
1879                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1880                 wr32(E1000_CONNSW, connsw);
1881                 wrfl();
1882         }
1883 }
1884
1885 void igb_reset(struct igb_adapter *adapter)
1886 {
1887         struct pci_dev *pdev = adapter->pdev;
1888         struct e1000_hw *hw = &adapter->hw;
1889         struct e1000_mac_info *mac = &hw->mac;
1890         struct e1000_fc_info *fc = &hw->fc;
1891         u32 pba, hwm;
1892
1893         /* Repartition Pba for greater than 9k mtu
1894          * To take effect CTRL.RST is required.
1895          */
1896         switch (mac->type) {
1897         case e1000_i350:
1898         case e1000_i354:
1899         case e1000_82580:
1900                 pba = rd32(E1000_RXPBS);
1901                 pba = igb_rxpbs_adjust_82580(pba);
1902                 break;
1903         case e1000_82576:
1904                 pba = rd32(E1000_RXPBS);
1905                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1906                 break;
1907         case e1000_82575:
1908         case e1000_i210:
1909         case e1000_i211:
1910         default:
1911                 pba = E1000_PBA_34K;
1912                 break;
1913         }
1914
1915         if (mac->type == e1000_82575) {
1916                 u32 min_rx_space, min_tx_space, needed_tx_space;
1917
1918                 /* write Rx PBA so that hardware can report correct Tx PBA */
1919                 wr32(E1000_PBA, pba);
1920
1921                 /* To maintain wire speed transmits, the Tx FIFO should be
1922                  * large enough to accommodate two full transmit packets,
1923                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1924                  * the Rx FIFO should be large enough to accommodate at least
1925                  * one full receive packet and is similarly rounded up and
1926                  * expressed in KB.
1927                  */
1928                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
1929
1930                 /* The Tx FIFO also stores 16 bytes of information about the Tx
1931                  * but don't include Ethernet FCS because hardware appends it.
1932                  * We only need to round down to the nearest 512 byte block
1933                  * count since the value we care about is 2 frames, not 1.
1934                  */
1935                 min_tx_space = adapter->max_frame_size;
1936                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
1937                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
1938
1939                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1940                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
1941
1942                 /* If current Tx allocation is less than the min Tx FIFO size,
1943                  * and the min Tx FIFO size is less than the current Rx FIFO
1944                  * allocation, take space away from current Rx allocation.
1945                  */
1946                 if (needed_tx_space < pba) {
1947                         pba -= needed_tx_space;
1948
1949                         /* if short on Rx space, Rx wins and must trump Tx
1950                          * adjustment
1951                          */
1952                         if (pba < min_rx_space)
1953                                 pba = min_rx_space;
1954                 }
1955
1956                 /* adjust PBA for jumbo frames */
1957                 wr32(E1000_PBA, pba);
1958         }
1959
1960         /* flow control settings
1961          * The high water mark must be low enough to fit one full frame
1962          * after transmitting the pause frame.  As such we must have enough
1963          * space to allow for us to complete our current transmit and then
1964          * receive the frame that is in progress from the link partner.
1965          * Set it to:
1966          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
1967          */
1968         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
1969
1970         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1971         fc->low_water = fc->high_water - 16;
1972         fc->pause_time = 0xFFFF;
1973         fc->send_xon = 1;
1974         fc->current_mode = fc->requested_mode;
1975
1976         /* disable receive for all VFs and wait one second */
1977         if (adapter->vfs_allocated_count) {
1978                 int i;
1979
1980                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1981                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1982
1983                 /* ping all the active vfs to let them know we are going down */
1984                 igb_ping_all_vfs(adapter);
1985
1986                 /* disable transmits and receives */
1987                 wr32(E1000_VFRE, 0);
1988                 wr32(E1000_VFTE, 0);
1989         }
1990
1991         /* Allow time for pending master requests to run */
1992         hw->mac.ops.reset_hw(hw);
1993         wr32(E1000_WUC, 0);
1994
1995         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1996                 /* need to resetup here after media swap */
1997                 adapter->ei.get_invariants(hw);
1998                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1999         }
2000         if ((mac->type == e1000_82575) &&
2001             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
2002                 igb_enable_mas(adapter);
2003         }
2004         if (hw->mac.ops.init_hw(hw))
2005                 dev_err(&pdev->dev, "Hardware Error\n");
2006
2007         /* RAR registers were cleared during init_hw, clear mac table */
2008         igb_flush_mac_table(adapter);
2009         __dev_uc_unsync(adapter->netdev, NULL);
2010
2011         /* Recover default RAR entry */
2012         igb_set_default_mac_filter(adapter);
2013
2014         /* Flow control settings reset on hardware reset, so guarantee flow
2015          * control is off when forcing speed.
2016          */
2017         if (!hw->mac.autoneg)
2018                 igb_force_mac_fc(hw);
2019
2020         igb_init_dmac(adapter, pba);
2021 #ifdef CONFIG_IGB_HWMON
2022         /* Re-initialize the thermal sensor on i350 devices. */
2023         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2024                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2025                         /* If present, re-initialize the external thermal sensor
2026                          * interface.
2027                          */
2028                         if (adapter->ets)
2029                                 mac->ops.init_thermal_sensor_thresh(hw);
2030                 }
2031         }
2032 #endif
2033         /* Re-establish EEE setting */
2034         if (hw->phy.media_type == e1000_media_type_copper) {
2035                 switch (mac->type) {
2036                 case e1000_i350:
2037                 case e1000_i210:
2038                 case e1000_i211:
2039                         igb_set_eee_i350(hw, true, true);
2040                         break;
2041                 case e1000_i354:
2042                         igb_set_eee_i354(hw, true, true);
2043                         break;
2044                 default:
2045                         break;
2046                 }
2047         }
2048         if (!netif_running(adapter->netdev))
2049                 igb_power_down_link(adapter);
2050
2051         igb_update_mng_vlan(adapter);
2052
2053         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2054         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2055
2056         /* Re-enable PTP, where applicable. */
2057         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2058                 igb_ptp_reset(adapter);
2059
2060         igb_get_phy_info(hw);
2061 }
2062
2063 static netdev_features_t igb_fix_features(struct net_device *netdev,
2064         netdev_features_t features)
2065 {
2066         /* Since there is no support for separate Rx/Tx vlan accel
2067          * enable/disable make sure Tx flag is always in same state as Rx.
2068          */
2069         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2070                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2071         else
2072                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2073
2074         return features;
2075 }
2076
2077 static int igb_set_features(struct net_device *netdev,
2078         netdev_features_t features)
2079 {
2080         netdev_features_t changed = netdev->features ^ features;
2081         struct igb_adapter *adapter = netdev_priv(netdev);
2082
2083         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2084                 igb_vlan_mode(netdev, features);
2085
2086         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2087                 return 0;
2088
2089         if (!(features & NETIF_F_NTUPLE)) {
2090                 struct hlist_node *node2;
2091                 struct igb_nfc_filter *rule;
2092
2093                 spin_lock(&adapter->nfc_lock);
2094                 hlist_for_each_entry_safe(rule, node2,
2095                                           &adapter->nfc_filter_list, nfc_node) {
2096                         igb_erase_filter(adapter, rule);
2097                         hlist_del(&rule->nfc_node);
2098                         kfree(rule);
2099                 }
2100                 spin_unlock(&adapter->nfc_lock);
2101                 adapter->nfc_filter_count = 0;
2102         }
2103
2104         netdev->features = features;
2105
2106         if (netif_running(netdev))
2107                 igb_reinit_locked(adapter);
2108         else
2109                 igb_reset(adapter);
2110
2111         return 0;
2112 }
2113
2114 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2115                            struct net_device *dev,
2116                            const unsigned char *addr, u16 vid,
2117                            u16 flags)
2118 {
2119         /* guarantee we can provide a unique filter for the unicast address */
2120         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2121                 struct igb_adapter *adapter = netdev_priv(dev);
2122                 int vfn = adapter->vfs_allocated_count;
2123
2124                 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2125                         return -ENOMEM;
2126         }
2127
2128         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2129 }
2130
2131 #define IGB_MAX_MAC_HDR_LEN     127
2132 #define IGB_MAX_NETWORK_HDR_LEN 511
2133
2134 static netdev_features_t
2135 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2136                    netdev_features_t features)
2137 {
2138         unsigned int network_hdr_len, mac_hdr_len;
2139
2140         /* Make certain the headers can be described by a context descriptor */
2141         mac_hdr_len = skb_network_header(skb) - skb->data;
2142         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2143                 return features & ~(NETIF_F_HW_CSUM |
2144                                     NETIF_F_SCTP_CRC |
2145                                     NETIF_F_HW_VLAN_CTAG_TX |
2146                                     NETIF_F_TSO |
2147                                     NETIF_F_TSO6);
2148
2149         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2150         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2151                 return features & ~(NETIF_F_HW_CSUM |
2152                                     NETIF_F_SCTP_CRC |
2153                                     NETIF_F_TSO |
2154                                     NETIF_F_TSO6);
2155
2156         /* We can only support IPV4 TSO in tunnels if we can mangle the
2157          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2158          */
2159         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2160                 features &= ~NETIF_F_TSO;
2161
2162         return features;
2163 }
2164
2165 static const struct net_device_ops igb_netdev_ops = {
2166         .ndo_open               = igb_open,
2167         .ndo_stop               = igb_close,
2168         .ndo_start_xmit         = igb_xmit_frame,
2169         .ndo_get_stats64        = igb_get_stats64,
2170         .ndo_set_rx_mode        = igb_set_rx_mode,
2171         .ndo_set_mac_address    = igb_set_mac,
2172         .ndo_change_mtu         = igb_change_mtu,
2173         .ndo_do_ioctl           = igb_ioctl,
2174         .ndo_tx_timeout         = igb_tx_timeout,
2175         .ndo_validate_addr      = eth_validate_addr,
2176         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2177         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2178         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2179         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2180         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2181         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2182         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2183 #ifdef CONFIG_NET_POLL_CONTROLLER
2184         .ndo_poll_controller    = igb_netpoll,
2185 #endif
2186         .ndo_fix_features       = igb_fix_features,
2187         .ndo_set_features       = igb_set_features,
2188         .ndo_fdb_add            = igb_ndo_fdb_add,
2189         .ndo_features_check     = igb_features_check,
2190 };
2191
2192 /**
2193  * igb_set_fw_version - Configure version string for ethtool
2194  * @adapter: adapter struct
2195  **/
2196 void igb_set_fw_version(struct igb_adapter *adapter)
2197 {
2198         struct e1000_hw *hw = &adapter->hw;
2199         struct e1000_fw_version fw;
2200
2201         igb_get_fw_version(hw, &fw);
2202
2203         switch (hw->mac.type) {
2204         case e1000_i210:
2205         case e1000_i211:
2206                 if (!(igb_get_flash_presence_i210(hw))) {
2207                         snprintf(adapter->fw_version,
2208                                  sizeof(adapter->fw_version),
2209                                  "%2d.%2d-%d",
2210                                  fw.invm_major, fw.invm_minor,
2211                                  fw.invm_img_type);
2212                         break;
2213                 }
2214                 /* fall through */
2215         default:
2216                 /* if option is rom valid, display its version too */
2217                 if (fw.or_valid) {
2218                         snprintf(adapter->fw_version,
2219                                  sizeof(adapter->fw_version),
2220                                  "%d.%d, 0x%08x, %d.%d.%d",
2221                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2222                                  fw.or_major, fw.or_build, fw.or_patch);
2223                 /* no option rom */
2224                 } else if (fw.etrack_id != 0X0000) {
2225                         snprintf(adapter->fw_version,
2226                             sizeof(adapter->fw_version),
2227                             "%d.%d, 0x%08x",
2228                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2229                 } else {
2230                 snprintf(adapter->fw_version,
2231                     sizeof(adapter->fw_version),
2232                     "%d.%d.%d",
2233                     fw.eep_major, fw.eep_minor, fw.eep_build);
2234                 }
2235                 break;
2236         }
2237 }
2238
2239 /**
2240  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2241  *
2242  * @adapter: adapter struct
2243  **/
2244 static void igb_init_mas(struct igb_adapter *adapter)
2245 {
2246         struct e1000_hw *hw = &adapter->hw;
2247         u16 eeprom_data;
2248
2249         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2250         switch (hw->bus.func) {
2251         case E1000_FUNC_0:
2252                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2253                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2254                         netdev_info(adapter->netdev,
2255                                 "MAS: Enabling Media Autosense for port %d\n",
2256                                 hw->bus.func);
2257                 }
2258                 break;
2259         case E1000_FUNC_1:
2260                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2261                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2262                         netdev_info(adapter->netdev,
2263                                 "MAS: Enabling Media Autosense for port %d\n",
2264                                 hw->bus.func);
2265                 }
2266                 break;
2267         case E1000_FUNC_2:
2268                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2269                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2270                         netdev_info(adapter->netdev,
2271                                 "MAS: Enabling Media Autosense for port %d\n",
2272                                 hw->bus.func);
2273                 }
2274                 break;
2275         case E1000_FUNC_3:
2276                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2277                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2278                         netdev_info(adapter->netdev,
2279                                 "MAS: Enabling Media Autosense for port %d\n",
2280                                 hw->bus.func);
2281                 }
2282                 break;
2283         default:
2284                 /* Shouldn't get here */
2285                 netdev_err(adapter->netdev,
2286                         "MAS: Invalid port configuration, returning\n");
2287                 break;
2288         }
2289 }
2290
2291 /**
2292  *  igb_init_i2c - Init I2C interface
2293  *  @adapter: pointer to adapter structure
2294  **/
2295 static s32 igb_init_i2c(struct igb_adapter *adapter)
2296 {
2297         s32 status = 0;
2298
2299         /* I2C interface supported on i350 devices */
2300         if (adapter->hw.mac.type != e1000_i350)
2301                 return 0;
2302
2303         /* Initialize the i2c bus which is controlled by the registers.
2304          * This bus will use the i2c_algo_bit structue that implements
2305          * the protocol through toggling of the 4 bits in the register.
2306          */
2307         adapter->i2c_adap.owner = THIS_MODULE;
2308         adapter->i2c_algo = igb_i2c_algo;
2309         adapter->i2c_algo.data = adapter;
2310         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2311         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2312         strlcpy(adapter->i2c_adap.name, "igb BB",
2313                 sizeof(adapter->i2c_adap.name));
2314         status = i2c_bit_add_bus(&adapter->i2c_adap);
2315         return status;
2316 }
2317
2318 /**
2319  *  igb_probe - Device Initialization Routine
2320  *  @pdev: PCI device information struct
2321  *  @ent: entry in igb_pci_tbl
2322  *
2323  *  Returns 0 on success, negative on failure
2324  *
2325  *  igb_probe initializes an adapter identified by a pci_dev structure.
2326  *  The OS initialization, configuring of the adapter private structure,
2327  *  and a hardware reset occur.
2328  **/
2329 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2330 {
2331         struct net_device *netdev;
2332         struct igb_adapter *adapter;
2333         struct e1000_hw *hw;
2334         u16 eeprom_data = 0;
2335         s32 ret_val;
2336         static int global_quad_port_a; /* global quad port a indication */
2337         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2338         int err, pci_using_dac;
2339         u8 part_str[E1000_PBANUM_LENGTH];
2340
2341         /* Catch broken hardware that put the wrong VF device ID in
2342          * the PCIe SR-IOV capability.
2343          */
2344         if (pdev->is_virtfn) {
2345                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2346                         pci_name(pdev), pdev->vendor, pdev->device);
2347                 return -EINVAL;
2348         }
2349
2350         err = pci_enable_device_mem(pdev);
2351         if (err)
2352                 return err;
2353
2354         pci_using_dac = 0;
2355         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2356         if (!err) {
2357                 pci_using_dac = 1;
2358         } else {
2359                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2360                 if (err) {
2361                         dev_err(&pdev->dev,
2362                                 "No usable DMA configuration, aborting\n");
2363                         goto err_dma;
2364                 }
2365         }
2366
2367         err = pci_request_mem_regions(pdev, igb_driver_name);
2368         if (err)
2369                 goto err_pci_reg;
2370
2371         pci_enable_pcie_error_reporting(pdev);
2372
2373         pci_set_master(pdev);
2374         pci_save_state(pdev);
2375
2376         err = -ENOMEM;
2377         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2378                                    IGB_MAX_TX_QUEUES);
2379         if (!netdev)
2380                 goto err_alloc_etherdev;
2381
2382         SET_NETDEV_DEV(netdev, &pdev->dev);
2383
2384         pci_set_drvdata(pdev, netdev);
2385         adapter = netdev_priv(netdev);
2386         adapter->netdev = netdev;
2387         adapter->pdev = pdev;
2388         hw = &adapter->hw;
2389         hw->back = adapter;
2390         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2391
2392         err = -EIO;
2393         adapter->io_addr = pci_iomap(pdev, 0, 0);
2394         if (!adapter->io_addr)
2395                 goto err_ioremap;
2396         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
2397         hw->hw_addr = adapter->io_addr;
2398
2399         netdev->netdev_ops = &igb_netdev_ops;
2400         igb_set_ethtool_ops(netdev);
2401         netdev->watchdog_timeo = 5 * HZ;
2402
2403         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2404
2405         netdev->mem_start = pci_resource_start(pdev, 0);
2406         netdev->mem_end = pci_resource_end(pdev, 0);
2407
2408         /* PCI config space info */
2409         hw->vendor_id = pdev->vendor;
2410         hw->device_id = pdev->device;
2411         hw->revision_id = pdev->revision;
2412         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2413         hw->subsystem_device_id = pdev->subsystem_device;
2414
2415         /* Copy the default MAC, PHY and NVM function pointers */
2416         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2417         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2418         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2419         /* Initialize skew-specific constants */
2420         err = ei->get_invariants(hw);
2421         if (err)
2422                 goto err_sw_init;
2423
2424         /* setup the private structure */
2425         err = igb_sw_init(adapter);
2426         if (err)
2427                 goto err_sw_init;
2428
2429         igb_get_bus_info_pcie(hw);
2430
2431         hw->phy.autoneg_wait_to_complete = false;
2432
2433         /* Copper options */
2434         if (hw->phy.media_type == e1000_media_type_copper) {
2435                 hw->phy.mdix = AUTO_ALL_MODES;
2436                 hw->phy.disable_polarity_correction = false;
2437                 hw->phy.ms_type = e1000_ms_hw_default;
2438         }
2439
2440         if (igb_check_reset_block(hw))
2441                 dev_info(&pdev->dev,
2442                         "PHY reset is blocked due to SOL/IDER session.\n");
2443
2444         /* features is initialized to 0 in allocation, it might have bits
2445          * set by igb_sw_init so we should use an or instead of an
2446          * assignment.
2447          */
2448         netdev->features |= NETIF_F_SG |
2449                             NETIF_F_TSO |
2450                             NETIF_F_TSO6 |
2451                             NETIF_F_RXHASH |
2452                             NETIF_F_RXCSUM |
2453                             NETIF_F_HW_CSUM;
2454
2455         if (hw->mac.type >= e1000_82576)
2456                 netdev->features |= NETIF_F_SCTP_CRC;
2457
2458 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
2459                                   NETIF_F_GSO_GRE_CSUM | \
2460                                   NETIF_F_GSO_IPXIP4 | \
2461                                   NETIF_F_GSO_IPXIP6 | \
2462                                   NETIF_F_GSO_UDP_TUNNEL | \
2463                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
2464
2465         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
2466         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
2467
2468         /* copy netdev features into list of user selectable features */
2469         netdev->hw_features |= netdev->features |
2470                                NETIF_F_HW_VLAN_CTAG_RX |
2471                                NETIF_F_HW_VLAN_CTAG_TX |
2472                                NETIF_F_RXALL;
2473
2474         if (hw->mac.type >= e1000_i350)
2475                 netdev->hw_features |= NETIF_F_NTUPLE;
2476
2477         if (pci_using_dac)
2478                 netdev->features |= NETIF_F_HIGHDMA;
2479
2480         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
2481         netdev->mpls_features |= NETIF_F_HW_CSUM;
2482         netdev->hw_enc_features |= netdev->vlan_features;
2483
2484         /* set this bit last since it cannot be part of vlan_features */
2485         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
2486                             NETIF_F_HW_VLAN_CTAG_RX |
2487                             NETIF_F_HW_VLAN_CTAG_TX;
2488
2489         netdev->priv_flags |= IFF_SUPP_NOFCS;
2490
2491         netdev->priv_flags |= IFF_UNICAST_FLT;
2492
2493         /* MTU range: 68 - 9216 */
2494         netdev->min_mtu = ETH_MIN_MTU;
2495         netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
2496
2497         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2498
2499         /* before reading the NVM, reset the controller to put the device in a
2500          * known good starting state
2501          */
2502         hw->mac.ops.reset_hw(hw);
2503
2504         /* make sure the NVM is good , i211/i210 parts can have special NVM
2505          * that doesn't contain a checksum
2506          */
2507         switch (hw->mac.type) {
2508         case e1000_i210:
2509         case e1000_i211:
2510                 if (igb_get_flash_presence_i210(hw)) {
2511                         if (hw->nvm.ops.validate(hw) < 0) {
2512                                 dev_err(&pdev->dev,
2513                                         "The NVM Checksum Is Not Valid\n");
2514                                 err = -EIO;
2515                                 goto err_eeprom;
2516                         }
2517                 }
2518                 break;
2519         default:
2520                 if (hw->nvm.ops.validate(hw) < 0) {
2521                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2522                         err = -EIO;
2523                         goto err_eeprom;
2524                 }
2525                 break;
2526         }
2527
2528         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
2529                 /* copy the MAC address out of the NVM */
2530                 if (hw->mac.ops.read_mac_addr(hw))
2531                         dev_err(&pdev->dev, "NVM Read Error\n");
2532         }
2533
2534         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2535
2536         if (!is_valid_ether_addr(netdev->dev_addr)) {
2537                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2538                 err = -EIO;
2539                 goto err_eeprom;
2540         }
2541
2542         igb_set_default_mac_filter(adapter);
2543
2544         /* get firmware version for ethtool -i */
2545         igb_set_fw_version(adapter);
2546
2547         /* configure RXPBSIZE and TXPBSIZE */
2548         if (hw->mac.type == e1000_i210) {
2549                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
2550                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
2551         }
2552
2553         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2554                     (unsigned long) adapter);
2555         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2556                     (unsigned long) adapter);
2557
2558         INIT_WORK(&adapter->reset_task, igb_reset_task);
2559         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2560
2561         /* Initialize link properties that are user-changeable */
2562         adapter->fc_autoneg = true;
2563         hw->mac.autoneg = true;
2564         hw->phy.autoneg_advertised = 0x2f;
2565
2566         hw->fc.requested_mode = e1000_fc_default;
2567         hw->fc.current_mode = e1000_fc_default;
2568
2569         igb_validate_mdi_setting(hw);
2570
2571         /* By default, support wake on port A */
2572         if (hw->bus.func == 0)
2573                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2574
2575         /* Check the NVM for wake support on non-port A ports */
2576         if (hw->mac.type >= e1000_82580)
2577                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2578                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2579                                  &eeprom_data);
2580         else if (hw->bus.func == 1)
2581                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2582
2583         if (eeprom_data & IGB_EEPROM_APME)
2584                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2585
2586         /* now that we have the eeprom settings, apply the special cases where
2587          * the eeprom may be wrong or the board simply won't support wake on
2588          * lan on a particular port
2589          */
2590         switch (pdev->device) {
2591         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2592                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2593                 break;
2594         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2595         case E1000_DEV_ID_82576_FIBER:
2596         case E1000_DEV_ID_82576_SERDES:
2597                 /* Wake events only supported on port A for dual fiber
2598                  * regardless of eeprom setting
2599                  */
2600                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2601                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2602                 break;
2603         case E1000_DEV_ID_82576_QUAD_COPPER:
2604         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2605                 /* if quad port adapter, disable WoL on all but port A */
2606                 if (global_quad_port_a != 0)
2607                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2608                 else
2609                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2610                 /* Reset for multiple quad port adapters */
2611                 if (++global_quad_port_a == 4)
2612                         global_quad_port_a = 0;
2613                 break;
2614         default:
2615                 /* If the device can't wake, don't set software support */
2616                 if (!device_can_wakeup(&adapter->pdev->dev))
2617                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2618         }
2619
2620         /* initialize the wol settings based on the eeprom settings */
2621         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2622                 adapter->wol |= E1000_WUFC_MAG;
2623
2624         /* Some vendors want WoL disabled by default, but still supported */
2625         if ((hw->mac.type == e1000_i350) &&
2626             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2627                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2628                 adapter->wol = 0;
2629         }
2630
2631         /* Some vendors want the ability to Use the EEPROM setting as
2632          * enable/disable only, and not for capability
2633          */
2634         if (((hw->mac.type == e1000_i350) ||
2635              (hw->mac.type == e1000_i354)) &&
2636             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
2637                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2638                 adapter->wol = 0;
2639         }
2640         if (hw->mac.type == e1000_i350) {
2641                 if (((pdev->subsystem_device == 0x5001) ||
2642                      (pdev->subsystem_device == 0x5002)) &&
2643                                 (hw->bus.func == 0)) {
2644                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2645                         adapter->wol = 0;
2646                 }
2647                 if (pdev->subsystem_device == 0x1F52)
2648                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2649         }
2650
2651         device_set_wakeup_enable(&adapter->pdev->dev,
2652                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2653
2654         /* reset the hardware with the new settings */
2655         igb_reset(adapter);
2656
2657         /* Init the I2C interface */
2658         err = igb_init_i2c(adapter);
2659         if (err) {
2660                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2661                 goto err_eeprom;
2662         }
2663
2664         /* let the f/w know that the h/w is now under the control of the
2665          * driver.
2666          */
2667         igb_get_hw_control(adapter);
2668
2669         strcpy(netdev->name, "eth%d");
2670         err = register_netdev(netdev);
2671         if (err)
2672                 goto err_register;
2673
2674         /* carrier off reporting is important to ethtool even BEFORE open */
2675         netif_carrier_off(netdev);
2676
2677 #ifdef CONFIG_IGB_DCA
2678         if (dca_add_requester(&pdev->dev) == 0) {
2679                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2680                 dev_info(&pdev->dev, "DCA enabled\n");
2681                 igb_setup_dca(adapter);
2682         }
2683
2684 #endif
2685 #ifdef CONFIG_IGB_HWMON
2686         /* Initialize the thermal sensor on i350 devices. */
2687         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2688                 u16 ets_word;
2689
2690                 /* Read the NVM to determine if this i350 device supports an
2691                  * external thermal sensor.
2692                  */
2693                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2694                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2695                         adapter->ets = true;
2696                 else
2697                         adapter->ets = false;
2698                 if (igb_sysfs_init(adapter))
2699                         dev_err(&pdev->dev,
2700                                 "failed to allocate sysfs resources\n");
2701         } else {
2702                 adapter->ets = false;
2703         }
2704 #endif
2705         /* Check if Media Autosense is enabled */
2706         adapter->ei = *ei;
2707         if (hw->dev_spec._82575.mas_capable)
2708                 igb_init_mas(adapter);
2709
2710         /* do hw tstamp init after resetting */
2711         igb_ptp_init(adapter);
2712
2713         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2714         /* print bus type/speed/width info, not applicable to i354 */
2715         if (hw->mac.type != e1000_i354) {
2716                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2717                          netdev->name,
2718                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2719                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2720                            "unknown"),
2721                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2722                           "Width x4" :
2723                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2724                           "Width x2" :
2725                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2726                           "Width x1" : "unknown"), netdev->dev_addr);
2727         }
2728
2729         if ((hw->mac.type >= e1000_i210 ||
2730              igb_get_flash_presence_i210(hw))) {
2731                 ret_val = igb_read_part_string(hw, part_str,
2732                                                E1000_PBANUM_LENGTH);
2733         } else {
2734                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2735         }
2736
2737         if (ret_val)
2738                 strcpy(part_str, "Unknown");
2739         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2740         dev_info(&pdev->dev,
2741                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2742                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2743                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2744                 adapter->num_rx_queues, adapter->num_tx_queues);
2745         if (hw->phy.media_type == e1000_media_type_copper) {
2746                 switch (hw->mac.type) {
2747                 case e1000_i350:
2748                 case e1000_i210:
2749                 case e1000_i211:
2750                         /* Enable EEE for internal copper PHY devices */
2751                         err = igb_set_eee_i350(hw, true, true);
2752                         if ((!err) &&
2753                             (!hw->dev_spec._82575.eee_disable)) {
2754                                 adapter->eee_advert =
2755                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2756                                 adapter->flags |= IGB_FLAG_EEE;
2757                         }
2758                         break;
2759                 case e1000_i354:
2760                         if ((rd32(E1000_CTRL_EXT) &
2761                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2762                                 err = igb_set_eee_i354(hw, true, true);
2763                                 if ((!err) &&
2764                                         (!hw->dev_spec._82575.eee_disable)) {
2765                                         adapter->eee_advert =
2766                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2767                                         adapter->flags |= IGB_FLAG_EEE;
2768                                 }
2769                         }
2770                         break;
2771                 default:
2772                         break;
2773                 }
2774         }
2775         pm_runtime_put_noidle(&pdev->dev);
2776         return 0;
2777
2778 err_register:
2779         igb_release_hw_control(adapter);
2780         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2781 err_eeprom:
2782         if (!igb_check_reset_block(hw))
2783                 igb_reset_phy(hw);
2784
2785         if (hw->flash_address)
2786                 iounmap(hw->flash_address);
2787 err_sw_init:
2788         kfree(adapter->mac_table);
2789         kfree(adapter->shadow_vfta);
2790         igb_clear_interrupt_scheme(adapter);
2791 #ifdef CONFIG_PCI_IOV
2792         igb_disable_sriov(pdev);
2793 #endif
2794         pci_iounmap(pdev, adapter->io_addr);
2795 err_ioremap:
2796         free_netdev(netdev);
2797 err_alloc_etherdev:
2798         pci_disable_pcie_error_reporting(pdev);
2799         pci_release_mem_regions(pdev);
2800 err_pci_reg:
2801 err_dma:
2802         pci_disable_device(pdev);
2803         return err;
2804 }
2805
2806 #ifdef CONFIG_PCI_IOV
2807 static int igb_disable_sriov(struct pci_dev *pdev)
2808 {
2809         struct net_device *netdev = pci_get_drvdata(pdev);
2810         struct igb_adapter *adapter = netdev_priv(netdev);
2811         struct e1000_hw *hw = &adapter->hw;
2812         unsigned long flags;
2813
2814         /* reclaim resources allocated to VFs */
2815         if (adapter->vf_data) {
2816                 /* disable iov and allow time for transactions to clear */
2817                 if (pci_vfs_assigned(pdev)) {
2818                         dev_warn(&pdev->dev,
2819                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2820                         return -EPERM;
2821                 } else {
2822                         pci_disable_sriov(pdev);
2823                         msleep(500);
2824                 }
2825                 spin_lock_irqsave(&adapter->vfs_lock, flags);
2826                 kfree(adapter->vf_mac_list);
2827                 adapter->vf_mac_list = NULL;
2828                 kfree(adapter->vf_data);
2829                 adapter->vf_data = NULL;
2830                 adapter->vfs_allocated_count = 0;
2831                 spin_unlock_irqrestore(&adapter->vfs_lock, flags);
2832                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2833                 wrfl();
2834                 msleep(100);
2835                 dev_info(&pdev->dev, "IOV Disabled\n");
2836
2837                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2838                 adapter->flags |= IGB_FLAG_DMAC;
2839         }
2840
2841         return 0;
2842 }
2843
2844 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2845 {
2846         struct net_device *netdev = pci_get_drvdata(pdev);
2847         struct igb_adapter *adapter = netdev_priv(netdev);
2848         int old_vfs = pci_num_vf(pdev);
2849         struct vf_mac_filter *mac_list;
2850         int err = 0;
2851         int num_vf_mac_filters, i;
2852
2853         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2854                 err = -EPERM;
2855                 goto out;
2856         }
2857         if (!num_vfs)
2858                 goto out;
2859
2860         if (old_vfs) {
2861                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2862                          old_vfs, max_vfs);
2863                 adapter->vfs_allocated_count = old_vfs;
2864         } else
2865                 adapter->vfs_allocated_count = num_vfs;
2866
2867         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2868                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2869
2870         /* if allocation failed then we do not support SR-IOV */
2871         if (!adapter->vf_data) {
2872                 adapter->vfs_allocated_count = 0;
2873                 dev_err(&pdev->dev,
2874                         "Unable to allocate memory for VF Data Storage\n");
2875                 err = -ENOMEM;
2876                 goto out;
2877         }
2878
2879         /* Due to the limited number of RAR entries calculate potential
2880          * number of MAC filters available for the VFs. Reserve entries
2881          * for PF default MAC, PF MAC filters and at least one RAR entry
2882          * for each VF for VF MAC.
2883          */
2884         num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
2885                              (1 + IGB_PF_MAC_FILTERS_RESERVED +
2886                               adapter->vfs_allocated_count);
2887
2888         adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
2889                                        sizeof(struct vf_mac_filter),
2890                                        GFP_KERNEL);
2891
2892         mac_list = adapter->vf_mac_list;
2893         INIT_LIST_HEAD(&adapter->vf_macs.l);
2894
2895         if (adapter->vf_mac_list) {
2896                 /* Initialize list of VF MAC filters */
2897                 for (i = 0; i < num_vf_mac_filters; i++) {
2898                         mac_list->vf = -1;
2899                         mac_list->free = true;
2900                         list_add(&mac_list->l, &adapter->vf_macs.l);
2901                         mac_list++;
2902                 }
2903         } else {
2904                 /* If we could not allocate memory for the VF MAC filters
2905                  * we can continue without this feature but warn user.
2906                  */
2907                 dev_err(&pdev->dev,
2908                         "Unable to allocate memory for VF MAC filter list\n");
2909         }
2910
2911         /* only call pci_enable_sriov() if no VFs are allocated already */
2912         if (!old_vfs) {
2913                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2914                 if (err)
2915                         goto err_out;
2916         }
2917         dev_info(&pdev->dev, "%d VFs allocated\n",
2918                  adapter->vfs_allocated_count);
2919         for (i = 0; i < adapter->vfs_allocated_count; i++)
2920                 igb_vf_configure(adapter, i);
2921
2922         /* DMA Coalescing is not supported in IOV mode. */
2923         adapter->flags &= ~IGB_FLAG_DMAC;
2924         goto out;
2925
2926 err_out:
2927         kfree(adapter->vf_mac_list);
2928         adapter->vf_mac_list = NULL;
2929         kfree(adapter->vf_data);
2930         adapter->vf_data = NULL;
2931         adapter->vfs_allocated_count = 0;
2932 out:
2933         return err;
2934 }
2935
2936 #endif
2937 /**
2938  *  igb_remove_i2c - Cleanup  I2C interface
2939  *  @adapter: pointer to adapter structure
2940  **/
2941 static void igb_remove_i2c(struct igb_adapter *adapter)
2942 {
2943         /* free the adapter bus structure */
2944         i2c_del_adapter(&adapter->i2c_adap);
2945 }
2946
2947 /**
2948  *  igb_remove - Device Removal Routine
2949  *  @pdev: PCI device information struct
2950  *
2951  *  igb_remove is called by the PCI subsystem to alert the driver
2952  *  that it should release a PCI device.  The could be caused by a
2953  *  Hot-Plug event, or because the driver is going to be removed from
2954  *  memory.
2955  **/
2956 static void igb_remove(struct pci_dev *pdev)
2957 {
2958         struct net_device *netdev = pci_get_drvdata(pdev);
2959         struct igb_adapter *adapter = netdev_priv(netdev);
2960         struct e1000_hw *hw = &adapter->hw;
2961
2962         pm_runtime_get_noresume(&pdev->dev);
2963 #ifdef CONFIG_IGB_HWMON
2964         igb_sysfs_exit(adapter);
2965 #endif
2966         igb_remove_i2c(adapter);
2967         igb_ptp_stop(adapter);
2968         /* The watchdog timer may be rescheduled, so explicitly
2969          * disable watchdog from being rescheduled.
2970          */
2971         set_bit(__IGB_DOWN, &adapter->state);
2972         del_timer_sync(&adapter->watchdog_timer);
2973         del_timer_sync(&adapter->phy_info_timer);
2974
2975         cancel_work_sync(&adapter->reset_task);
2976         cancel_work_sync(&adapter->watchdog_task);
2977
2978 #ifdef CONFIG_IGB_DCA
2979         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2980                 dev_info(&pdev->dev, "DCA disabled\n");
2981                 dca_remove_requester(&pdev->dev);
2982                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2983                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2984         }
2985 #endif
2986
2987         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2988          * would have already happened in close and is redundant.
2989          */
2990         igb_release_hw_control(adapter);
2991
2992 #ifdef CONFIG_PCI_IOV
2993         rtnl_lock();
2994         igb_disable_sriov(pdev);
2995         rtnl_unlock();
2996 #endif
2997
2998         unregister_netdev(netdev);
2999
3000         igb_clear_interrupt_scheme(adapter);
3001
3002         pci_iounmap(pdev, adapter->io_addr);
3003         if (hw->flash_address)
3004                 iounmap(hw->flash_address);
3005         pci_release_mem_regions(pdev);
3006
3007         kfree(adapter->mac_table);
3008         kfree(adapter->shadow_vfta);
3009         free_netdev(netdev);
3010
3011         pci_disable_pcie_error_reporting(pdev);
3012
3013         pci_disable_device(pdev);
3014 }
3015
3016 /**
3017  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3018  *  @adapter: board private structure to initialize
3019  *
3020  *  This function initializes the vf specific data storage and then attempts to
3021  *  allocate the VFs.  The reason for ordering it this way is because it is much
3022  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
3023  *  the memory for the VFs.
3024  **/
3025 static void igb_probe_vfs(struct igb_adapter *adapter)
3026 {
3027 #ifdef CONFIG_PCI_IOV
3028         struct pci_dev *pdev = adapter->pdev;
3029         struct e1000_hw *hw = &adapter->hw;
3030
3031         /* Virtualization features not supported on i210 family. */
3032         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
3033                 return;
3034
3035         /* Of the below we really only want the effect of getting
3036          * IGB_FLAG_HAS_MSIX set (if available), without which
3037          * igb_enable_sriov() has no effect.
3038          */
3039         igb_set_interrupt_capability(adapter, true);
3040         igb_reset_interrupt_capability(adapter);
3041
3042         pci_sriov_set_totalvfs(pdev, 7);
3043         igb_enable_sriov(pdev, max_vfs);
3044
3045 #endif /* CONFIG_PCI_IOV */
3046 }
3047
3048 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3049 {
3050         struct e1000_hw *hw = &adapter->hw;
3051         u32 max_rss_queues;
3052
3053         /* Determine the maximum number of RSS queues supported. */
3054         switch (hw->mac.type) {
3055         case e1000_i211:
3056                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3057                 break;
3058         case e1000_82575:
3059         case e1000_i210:
3060                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3061                 break;
3062         case e1000_i350:
3063                 /* I350 cannot do RSS and SR-IOV at the same time */
3064                 if (!!adapter->vfs_allocated_count) {
3065                         max_rss_queues = 1;
3066                         break;
3067                 }
3068                 /* fall through */
3069         case e1000_82576:
3070                 if (!!adapter->vfs_allocated_count) {
3071                         max_rss_queues = 2;
3072                         break;
3073                 }
3074                 /* fall through */
3075         case e1000_82580:
3076         case e1000_i354:
3077         default:
3078                 max_rss_queues = IGB_MAX_RX_QUEUES;
3079                 break;
3080         }
3081
3082         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3083
3084         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3085 }
3086
3087 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3088                               const u32 max_rss_queues)
3089 {
3090         struct e1000_hw *hw = &adapter->hw;
3091
3092         /* Determine if we need to pair queues. */
3093         switch (hw->mac.type) {
3094         case e1000_82575:
3095         case e1000_i211:
3096                 /* Device supports enough interrupts without queue pairing. */
3097                 break;
3098         case e1000_82576:
3099         case e1000_82580:
3100         case e1000_i350:
3101         case e1000_i354:
3102         case e1000_i210:
3103         default:
3104                 /* If rss_queues > half of max_rss_queues, pair the queues in
3105                  * order to conserve interrupts due to limited supply.
3106                  */
3107                 if (adapter->rss_queues > (max_rss_queues / 2))
3108                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3109                 else
3110                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3111                 break;
3112         }
3113 }
3114
3115 /**
3116  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3117  *  @adapter: board private structure to initialize
3118  *
3119  *  igb_sw_init initializes the Adapter private data structure.
3120  *  Fields are initialized based on PCI device information and
3121  *  OS network device settings (MTU size).
3122  **/
3123 static int igb_sw_init(struct igb_adapter *adapter)
3124 {
3125         struct e1000_hw *hw = &adapter->hw;
3126         struct net_device *netdev = adapter->netdev;
3127         struct pci_dev *pdev = adapter->pdev;
3128
3129         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3130
3131         /* set default ring sizes */
3132         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3133         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3134
3135         /* set default ITR values */
3136         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3137         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3138
3139         /* set default work limits */
3140         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3141
3142         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3143                                   VLAN_HLEN;
3144         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3145
3146         spin_lock_init(&adapter->nfc_lock);
3147         spin_lock_init(&adapter->stats64_lock);
3148
3149         /* init spinlock to avoid concurrency of VF resources */
3150         spin_lock_init(&adapter->vfs_lock);
3151 #ifdef CONFIG_PCI_IOV
3152         switch (hw->mac.type) {
3153         case e1000_82576:
3154         case e1000_i350:
3155                 if (max_vfs > 7) {
3156                         dev_warn(&pdev->dev,
3157                                  "Maximum of 7 VFs per PF, using max\n");
3158                         max_vfs = adapter->vfs_allocated_count = 7;
3159                 } else
3160                         adapter->vfs_allocated_count = max_vfs;
3161                 if (adapter->vfs_allocated_count)
3162                         dev_warn(&pdev->dev,
3163                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3164                 break;
3165         default:
3166                 break;
3167         }
3168 #endif /* CONFIG_PCI_IOV */
3169
3170         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3171         adapter->flags |= IGB_FLAG_HAS_MSIX;
3172
3173         adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3174                                      hw->mac.rar_entry_count, GFP_ATOMIC);
3175         if (!adapter->mac_table)
3176                 return -ENOMEM;
3177
3178         igb_probe_vfs(adapter);
3179
3180         igb_init_queue_configuration(adapter);
3181
3182         /* Setup and initialize a copy of the hw vlan table array */
3183         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
3184                                        GFP_ATOMIC);
3185         if (!adapter->shadow_vfta)
3186                 return -ENOMEM;
3187
3188         /* This call may decrease the number of queues */
3189         if (igb_init_interrupt_scheme(adapter, true)) {
3190                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3191                 return -ENOMEM;
3192         }
3193
3194         /* Explicitly disable IRQ since the NIC can be in any state. */
3195         igb_irq_disable(adapter);
3196
3197         if (hw->mac.type >= e1000_i350)
3198                 adapter->flags &= ~IGB_FLAG_DMAC;
3199
3200         set_bit(__IGB_DOWN, &adapter->state);
3201         return 0;
3202 }
3203
3204 /**
3205  *  igb_open - Called when a network interface is made active
3206  *  @netdev: network interface device structure
3207  *
3208  *  Returns 0 on success, negative value on failure
3209  *
3210  *  The open entry point is called when a network interface is made
3211  *  active by the system (IFF_UP).  At this point all resources needed
3212  *  for transmit and receive operations are allocated, the interrupt
3213  *  handler is registered with the OS, the watchdog timer is started,
3214  *  and the stack is notified that the interface is ready.
3215  **/
3216 static int __igb_open(struct net_device *netdev, bool resuming)
3217 {
3218         struct igb_adapter *adapter = netdev_priv(netdev);
3219         struct e1000_hw *hw = &adapter->hw;
3220         struct pci_dev *pdev = adapter->pdev;
3221         int err;
3222         int i;
3223
3224         /* disallow open during test */
3225         if (test_bit(__IGB_TESTING, &adapter->state)) {
3226                 WARN_ON(resuming);
3227                 return -EBUSY;
3228         }
3229
3230         if (!resuming)
3231                 pm_runtime_get_sync(&pdev->dev);
3232
3233         netif_carrier_off(netdev);
3234
3235         /* allocate transmit descriptors */
3236         err = igb_setup_all_tx_resources(adapter);
3237         if (err)
3238                 goto err_setup_tx;
3239
3240         /* allocate receive descriptors */
3241         err = igb_setup_all_rx_resources(adapter);
3242         if (err)
3243                 goto err_setup_rx;
3244
3245         igb_power_up_link(adapter);
3246
3247         /* before we allocate an interrupt, we must be ready to handle it.
3248          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3249          * as soon as we call pci_request_irq, so we have to setup our
3250          * clean_rx handler before we do so.
3251          */
3252         igb_configure(adapter);
3253
3254         err = igb_request_irq(adapter);
3255         if (err)
3256                 goto err_req_irq;
3257
3258         /* Notify the stack of the actual queue counts. */
3259         err = netif_set_real_num_tx_queues(adapter->netdev,
3260                                            adapter->num_tx_queues);
3261         if (err)
3262                 goto err_set_queues;
3263
3264         err = netif_set_real_num_rx_queues(adapter->netdev,
3265                                            adapter->num_rx_queues);
3266         if (err)
3267                 goto err_set_queues;
3268
3269         /* From here on the code is the same as igb_up() */
3270         clear_bit(__IGB_DOWN, &adapter->state);
3271
3272         for (i = 0; i < adapter->num_q_vectors; i++)
3273                 napi_enable(&(adapter->q_vector[i]->napi));
3274
3275         /* Clear any pending interrupts. */
3276         rd32(E1000_ICR);
3277
3278         igb_irq_enable(adapter);
3279
3280         /* notify VFs that reset has been completed */
3281         if (adapter->vfs_allocated_count) {
3282                 u32 reg_data = rd32(E1000_CTRL_EXT);
3283
3284                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3285                 wr32(E1000_CTRL_EXT, reg_data);
3286         }
3287
3288         netif_tx_start_all_queues(netdev);
3289
3290         if (!resuming)
3291                 pm_runtime_put(&pdev->dev);
3292
3293         /* start the watchdog. */
3294         hw->mac.get_link_status = 1;
3295         schedule_work(&adapter->watchdog_task);
3296
3297         return 0;
3298
3299 err_set_queues:
3300         igb_free_irq(adapter);
3301 err_req_irq:
3302         igb_release_hw_control(adapter);
3303         igb_power_down_link(adapter);
3304         igb_free_all_rx_resources(adapter);
3305 err_setup_rx:
3306         igb_free_all_tx_resources(adapter);
3307 err_setup_tx:
3308         igb_reset(adapter);
3309         if (!resuming)
3310                 pm_runtime_put(&pdev->dev);
3311
3312         return err;
3313 }
3314
3315 int igb_open(struct net_device *netdev)
3316 {
3317         return __igb_open(netdev, false);
3318 }
3319
3320 /**
3321  *  igb_close - Disables a network interface
3322  *  @netdev: network interface device structure
3323  *
3324  *  Returns 0, this is not allowed to fail
3325  *
3326  *  The close entry point is called when an interface is de-activated
3327  *  by the OS.  The hardware is still under the driver's control, but
3328  *  needs to be disabled.  A global MAC reset is issued to stop the
3329  *  hardware, and all transmit and receive resources are freed.
3330  **/
3331 static int __igb_close(struct net_device *netdev, bool suspending)
3332 {
3333         struct igb_adapter *adapter = netdev_priv(netdev);
3334         struct pci_dev *pdev = adapter->pdev;
3335
3336         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3337
3338         if (!suspending)
3339                 pm_runtime_get_sync(&pdev->dev);
3340
3341         igb_down(adapter);
3342         igb_free_irq(adapter);
3343
3344         igb_free_all_tx_resources(adapter);
3345         igb_free_all_rx_resources(adapter);
3346
3347         if (!suspending)
3348                 pm_runtime_put_sync(&pdev->dev);
3349         return 0;
3350 }
3351
3352 int igb_close(struct net_device *netdev)
3353 {
3354         if (netif_device_present(netdev) || netdev->dismantle)
3355                 return __igb_close(netdev, false);
3356         return 0;
3357 }
3358
3359 /**
3360  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3361  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3362  *
3363  *  Return 0 on success, negative on failure
3364  **/
3365 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3366 {
3367         struct device *dev = tx_ring->dev;
3368         int size;
3369
3370         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3371
3372         tx_ring->tx_buffer_info = vmalloc(size);
3373         if (!tx_ring->tx_buffer_info)
3374                 goto err;
3375
3376         /* round up to nearest 4K */
3377         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3378         tx_ring->size = ALIGN(tx_ring->size, 4096);
3379
3380         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3381                                            &tx_ring->dma, GFP_KERNEL);
3382         if (!tx_ring->desc)
3383                 goto err;
3384
3385         tx_ring->next_to_use = 0;
3386         tx_ring->next_to_clean = 0;
3387
3388         return 0;
3389
3390 err:
3391         vfree(tx_ring->tx_buffer_info);
3392         tx_ring->tx_buffer_info = NULL;
3393         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3394         return -ENOMEM;
3395 }
3396
3397 /**
3398  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3399  *                               (Descriptors) for all queues
3400  *  @adapter: board private structure
3401  *
3402  *  Return 0 on success, negative on failure
3403  **/
3404 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3405 {
3406         struct pci_dev *pdev = adapter->pdev;
3407         int i, err = 0;
3408
3409         for (i = 0; i < adapter->num_tx_queues; i++) {
3410                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3411                 if (err) {
3412                         dev_err(&pdev->dev,
3413                                 "Allocation for Tx Queue %u failed\n", i);
3414                         for (i--; i >= 0; i--)
3415                                 igb_free_tx_resources(adapter->tx_ring[i]);
3416                         break;
3417                 }
3418         }
3419
3420         return err;
3421 }
3422
3423 /**
3424  *  igb_setup_tctl - configure the transmit control registers
3425  *  @adapter: Board private structure
3426  **/
3427 void igb_setup_tctl(struct igb_adapter *adapter)
3428 {
3429         struct e1000_hw *hw = &adapter->hw;
3430         u32 tctl;
3431
3432         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3433         wr32(E1000_TXDCTL(0), 0);
3434
3435         /* Program the Transmit Control Register */
3436         tctl = rd32(E1000_TCTL);
3437         tctl &= ~E1000_TCTL_CT;
3438         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3439                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3440
3441         igb_config_collision_dist(hw);
3442
3443         /* Enable transmits */
3444         tctl |= E1000_TCTL_EN;
3445
3446         wr32(E1000_TCTL, tctl);
3447 }
3448
3449 /**
3450  *  igb_configure_tx_ring - Configure transmit ring after Reset
3451  *  @adapter: board private structure
3452  *  @ring: tx ring to configure
3453  *
3454  *  Configure a transmit ring after a reset.
3455  **/
3456 void igb_configure_tx_ring(struct igb_adapter *adapter,
3457                            struct igb_ring *ring)
3458 {
3459         struct e1000_hw *hw = &adapter->hw;
3460         u32 txdctl = 0;
3461         u64 tdba = ring->dma;
3462         int reg_idx = ring->reg_idx;
3463
3464         /* disable the queue */
3465         wr32(E1000_TXDCTL(reg_idx), 0);
3466         wrfl();
3467         mdelay(10);
3468
3469         wr32(E1000_TDLEN(reg_idx),
3470              ring->count * sizeof(union e1000_adv_tx_desc));
3471         wr32(E1000_TDBAL(reg_idx),
3472              tdba & 0x00000000ffffffffULL);
3473         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3474
3475         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
3476         wr32(E1000_TDH(reg_idx), 0);
3477         writel(0, ring->tail);
3478
3479         txdctl |= IGB_TX_PTHRESH;
3480         txdctl |= IGB_TX_HTHRESH << 8;
3481         txdctl |= IGB_TX_WTHRESH << 16;
3482
3483         /* reinitialize tx_buffer_info */
3484         memset(ring->tx_buffer_info, 0,
3485                sizeof(struct igb_tx_buffer) * ring->count);
3486
3487         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3488         wr32(E1000_TXDCTL(reg_idx), txdctl);
3489 }
3490
3491 /**
3492  *  igb_configure_tx - Configure transmit Unit after Reset
3493  *  @adapter: board private structure
3494  *
3495  *  Configure the Tx unit of the MAC after a reset.
3496  **/
3497 static void igb_configure_tx(struct igb_adapter *adapter)
3498 {
3499         int i;
3500
3501         for (i = 0; i < adapter->num_tx_queues; i++)
3502                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3503 }
3504
3505 /**
3506  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3507  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3508  *
3509  *  Returns 0 on success, negative on failure
3510  **/
3511 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3512 {
3513         struct device *dev = rx_ring->dev;
3514         int size;
3515
3516         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3517
3518         rx_ring->rx_buffer_info = vmalloc(size);
3519         if (!rx_ring->rx_buffer_info)
3520                 goto err;
3521
3522         /* Round up to nearest 4K */
3523         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3524         rx_ring->size = ALIGN(rx_ring->size, 4096);
3525
3526         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3527                                            &rx_ring->dma, GFP_KERNEL);
3528         if (!rx_ring->desc)
3529                 goto err;
3530
3531         rx_ring->next_to_alloc = 0;
3532         rx_ring->next_to_clean = 0;
3533         rx_ring->next_to_use = 0;
3534
3535         return 0;
3536
3537 err:
3538         vfree(rx_ring->rx_buffer_info);
3539         rx_ring->rx_buffer_info = NULL;
3540         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3541         return -ENOMEM;
3542 }
3543
3544 /**
3545  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3546  *                               (Descriptors) for all queues
3547  *  @adapter: board private structure
3548  *
3549  *  Return 0 on success, negative on failure
3550  **/
3551 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3552 {
3553         struct pci_dev *pdev = adapter->pdev;
3554         int i, err = 0;
3555
3556         for (i = 0; i < adapter->num_rx_queues; i++) {
3557                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3558                 if (err) {
3559                         dev_err(&pdev->dev,
3560                                 "Allocation for Rx Queue %u failed\n", i);
3561                         for (i--; i >= 0; i--)
3562                                 igb_free_rx_resources(adapter->rx_ring[i]);
3563                         break;
3564                 }
3565         }
3566
3567         return err;
3568 }
3569
3570 /**
3571  *  igb_setup_mrqc - configure the multiple receive queue control registers
3572  *  @adapter: Board private structure
3573  **/
3574 static void igb_setup_mrqc(struct igb_adapter *adapter)
3575 {
3576         struct e1000_hw *hw = &adapter->hw;
3577         u32 mrqc, rxcsum;
3578         u32 j, num_rx_queues;
3579         u32 rss_key[10];
3580
3581         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3582         for (j = 0; j < 10; j++)
3583                 wr32(E1000_RSSRK(j), rss_key[j]);
3584
3585         num_rx_queues = adapter->rss_queues;
3586
3587         switch (hw->mac.type) {
3588         case e1000_82576:
3589                 /* 82576 supports 2 RSS queues for SR-IOV */
3590                 if (adapter->vfs_allocated_count)
3591                         num_rx_queues = 2;
3592                 break;
3593         default:
3594                 break;
3595         }
3596
3597         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3598                 for (j = 0; j < IGB_RETA_SIZE; j++)
3599                         adapter->rss_indir_tbl[j] =
3600                         (j * num_rx_queues) / IGB_RETA_SIZE;
3601                 adapter->rss_indir_tbl_init = num_rx_queues;
3602         }
3603         igb_write_rss_indir_tbl(adapter);
3604
3605         /* Disable raw packet checksumming so that RSS hash is placed in
3606          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3607          * offloads as they are enabled by default
3608          */
3609         rxcsum = rd32(E1000_RXCSUM);
3610         rxcsum |= E1000_RXCSUM_PCSD;
3611
3612         if (adapter->hw.mac.type >= e1000_82576)
3613                 /* Enable Receive Checksum Offload for SCTP */
3614                 rxcsum |= E1000_RXCSUM_CRCOFL;
3615
3616         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3617         wr32(E1000_RXCSUM, rxcsum);
3618
3619         /* Generate RSS hash based on packet types, TCP/UDP
3620          * port numbers and/or IPv4/v6 src and dst addresses
3621          */
3622         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3623                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3624                E1000_MRQC_RSS_FIELD_IPV6 |
3625                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3626                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3627
3628         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3629                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3630         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3631                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3632
3633         /* If VMDq is enabled then we set the appropriate mode for that, else
3634          * we default to RSS so that an RSS hash is calculated per packet even
3635          * if we are only using one queue
3636          */
3637         if (adapter->vfs_allocated_count) {
3638                 if (hw->mac.type > e1000_82575) {
3639                         /* Set the default pool for the PF's first queue */
3640                         u32 vtctl = rd32(E1000_VT_CTL);
3641
3642                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3643                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3644                         vtctl |= adapter->vfs_allocated_count <<
3645                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3646                         wr32(E1000_VT_CTL, vtctl);
3647                 }
3648                 if (adapter->rss_queues > 1)
3649                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
3650                 else
3651                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3652         } else {
3653                 if (hw->mac.type != e1000_i211)
3654                         mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
3655         }
3656         igb_vmm_control(adapter);
3657
3658         wr32(E1000_MRQC, mrqc);
3659 }
3660
3661 /**
3662  *  igb_setup_rctl - configure the receive control registers
3663  *  @adapter: Board private structure
3664  **/
3665 void igb_setup_rctl(struct igb_adapter *adapter)
3666 {
3667         struct e1000_hw *hw = &adapter->hw;
3668         u32 rctl;
3669
3670         rctl = rd32(E1000_RCTL);
3671
3672         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3673         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3674
3675         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3676                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3677
3678         /* enable stripping of CRC. It's unlikely this will break BMC
3679          * redirection as it did with e1000. Newer features require
3680          * that the HW strips the CRC.
3681          */
3682         rctl |= E1000_RCTL_SECRC;
3683
3684         /* disable store bad packets and clear size bits. */
3685         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3686
3687         /* enable LPE to allow for reception of jumbo frames */
3688         rctl |= E1000_RCTL_LPE;
3689
3690         /* disable queue 0 to prevent tail write w/o re-config */
3691         wr32(E1000_RXDCTL(0), 0);
3692
3693         /* Attention!!!  For SR-IOV PF driver operations you must enable
3694          * queue drop for all VF and PF queues to prevent head of line blocking
3695          * if an un-trusted VF does not provide descriptors to hardware.
3696          */
3697         if (adapter->vfs_allocated_count) {
3698                 /* set all queue drop enable bits */
3699                 wr32(E1000_QDE, ALL_QUEUES);
3700         }
3701
3702         /* This is useful for sniffing bad packets. */
3703         if (adapter->netdev->features & NETIF_F_RXALL) {
3704                 /* UPE and MPE will be handled by normal PROMISC logic
3705                  * in e1000e_set_rx_mode
3706                  */
3707                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3708                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3709                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3710
3711                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
3712                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3713                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3714                  * and that breaks VLANs.
3715                  */
3716         }
3717
3718         wr32(E1000_RCTL, rctl);
3719 }
3720
3721 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3722                                    int vfn)
3723 {
3724         struct e1000_hw *hw = &adapter->hw;
3725         u32 vmolr;
3726
3727         if (size > MAX_JUMBO_FRAME_SIZE)
3728                 size = MAX_JUMBO_FRAME_SIZE;
3729
3730         vmolr = rd32(E1000_VMOLR(vfn));
3731         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3732         vmolr |= size | E1000_VMOLR_LPE;
3733         wr32(E1000_VMOLR(vfn), vmolr);
3734
3735         return 0;
3736 }
3737
3738 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3739                                          int vfn, bool enable)
3740 {
3741         struct e1000_hw *hw = &adapter->hw;
3742         u32 val, reg;
3743
3744         if (hw->mac.type < e1000_82576)
3745                 return;
3746
3747         if (hw->mac.type == e1000_i350)
3748                 reg = E1000_DVMOLR(vfn);
3749         else
3750                 reg = E1000_VMOLR(vfn);
3751
3752         val = rd32(reg);
3753         if (enable)
3754                 val |= E1000_VMOLR_STRVLAN;
3755         else
3756                 val &= ~(E1000_VMOLR_STRVLAN);
3757         wr32(reg, val);
3758 }
3759
3760 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3761                                  int vfn, bool aupe)
3762 {
3763         struct e1000_hw *hw = &adapter->hw;
3764         u32 vmolr;
3765
3766         /* This register exists only on 82576 and newer so if we are older then
3767          * we should exit and do nothing
3768          */
3769         if (hw->mac.type < e1000_82576)
3770                 return;
3771
3772         vmolr = rd32(E1000_VMOLR(vfn));
3773         if (aupe)
3774                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3775         else
3776                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3777
3778         /* clear all bits that might not be set */
3779         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3780
3781         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3782                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3783         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3784          * multicast packets
3785          */
3786         if (vfn <= adapter->vfs_allocated_count)
3787                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3788
3789         wr32(E1000_VMOLR(vfn), vmolr);
3790 }
3791
3792 /**
3793  *  igb_configure_rx_ring - Configure a receive ring after Reset
3794  *  @adapter: board private structure
3795  *  @ring: receive ring to be configured
3796  *
3797  *  Configure the Rx unit of the MAC after a reset.
3798  **/
3799 void igb_configure_rx_ring(struct igb_adapter *adapter,
3800                            struct igb_ring *ring)
3801 {
3802         struct e1000_hw *hw = &adapter->hw;
3803         union e1000_adv_rx_desc *rx_desc;
3804         u64 rdba = ring->dma;
3805         int reg_idx = ring->reg_idx;
3806         u32 srrctl = 0, rxdctl = 0;
3807
3808         /* disable the queue */
3809         wr32(E1000_RXDCTL(reg_idx), 0);
3810
3811         /* Set DMA base address registers */
3812         wr32(E1000_RDBAL(reg_idx),
3813              rdba & 0x00000000ffffffffULL);
3814         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3815         wr32(E1000_RDLEN(reg_idx),
3816              ring->count * sizeof(union e1000_adv_rx_desc));
3817
3818         /* initialize head and tail */
3819         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
3820         wr32(E1000_RDH(reg_idx), 0);
3821         writel(0, ring->tail);
3822
3823         /* set descriptor configuration */
3824         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3825         if (ring_uses_large_buffer(ring))
3826                 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3827         else
3828                 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3829         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3830         if (hw->mac.type >= e1000_82580)
3831                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3832         /* Only set Drop Enable if we are supporting multiple queues */
3833         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3834                 srrctl |= E1000_SRRCTL_DROP_EN;
3835
3836         wr32(E1000_SRRCTL(reg_idx), srrctl);
3837
3838         /* set filtering for VMDQ pools */
3839         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3840
3841         rxdctl |= IGB_RX_PTHRESH;
3842         rxdctl |= IGB_RX_HTHRESH << 8;
3843         rxdctl |= IGB_RX_WTHRESH << 16;
3844
3845         /* initialize rx_buffer_info */
3846         memset(ring->rx_buffer_info, 0,
3847                sizeof(struct igb_rx_buffer) * ring->count);
3848
3849         /* initialize Rx descriptor 0 */
3850         rx_desc = IGB_RX_DESC(ring, 0);
3851         rx_desc->wb.upper.length = 0;
3852
3853         /* enable receive descriptor fetching */
3854         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3855         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3856 }
3857
3858 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
3859                                   struct igb_ring *rx_ring)
3860 {
3861         /* set build_skb and buffer size flags */
3862         clear_ring_build_skb_enabled(rx_ring);
3863         clear_ring_uses_large_buffer(rx_ring);
3864
3865         if (adapter->flags & IGB_FLAG_RX_LEGACY)
3866                 return;
3867
3868         set_ring_build_skb_enabled(rx_ring);
3869
3870 #if (PAGE_SIZE < 8192)
3871         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
3872                 return;
3873
3874         set_ring_uses_large_buffer(rx_ring);
3875 #endif
3876 }
3877
3878 /**
3879  *  igb_configure_rx - Configure receive Unit after Reset
3880  *  @adapter: board private structure
3881  *
3882  *  Configure the Rx unit of the MAC after a reset.
3883  **/
3884 static void igb_configure_rx(struct igb_adapter *adapter)
3885 {
3886         int i;
3887
3888         /* set the correct pool for the PF default MAC address in entry 0 */
3889         igb_set_default_mac_filter(adapter);
3890
3891         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3892          * the Base and Length of the Rx Descriptor Ring
3893          */
3894         for (i = 0; i < adapter->num_rx_queues; i++) {
3895                 struct igb_ring *rx_ring = adapter->rx_ring[i];
3896
3897                 igb_set_rx_buffer_len(adapter, rx_ring);
3898                 igb_configure_rx_ring(adapter, rx_ring);
3899         }
3900 }
3901
3902 /**
3903  *  igb_free_tx_resources - Free Tx Resources per Queue
3904  *  @tx_ring: Tx descriptor ring for a specific queue
3905  *
3906  *  Free all transmit software resources
3907  **/
3908 void igb_free_tx_resources(struct igb_ring *tx_ring)
3909 {
3910         igb_clean_tx_ring(tx_ring);
3911
3912         vfree(tx_ring->tx_buffer_info);
3913         tx_ring->tx_buffer_info = NULL;
3914
3915         /* if not set, then don't free */
3916         if (!tx_ring->desc)
3917                 return;
3918
3919         dma_free_coherent(tx_ring->dev, tx_ring->size,
3920                           tx_ring->desc, tx_ring->dma);
3921
3922         tx_ring->desc = NULL;
3923 }
3924
3925 /**
3926  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3927  *  @adapter: board private structure
3928  *
3929  *  Free all transmit software resources
3930  **/
3931 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3932 {
3933         int i;
3934
3935         for (i = 0; i < adapter->num_tx_queues; i++)
3936                 if (adapter->tx_ring[i])
3937                         igb_free_tx_resources(adapter->tx_ring[i]);
3938 }
3939
3940 /**
3941  *  igb_clean_tx_ring - Free Tx Buffers
3942  *  @tx_ring: ring to be cleaned
3943  **/
3944 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3945 {
3946         u16 i = tx_ring->next_to_clean;
3947         struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
3948
3949         while (i != tx_ring->next_to_use) {
3950                 union e1000_adv_tx_desc *eop_desc, *tx_desc;
3951
3952                 /* Free all the Tx ring sk_buffs */
3953                 dev_kfree_skb_any(tx_buffer->skb);
3954
3955                 /* unmap skb header data */
3956                 dma_unmap_single(tx_ring->dev,
3957                                  dma_unmap_addr(tx_buffer, dma),
3958                                  dma_unmap_len(tx_buffer, len),
3959                                  DMA_TO_DEVICE);
3960
3961                 /* check for eop_desc to determine the end of the packet */
3962                 eop_desc = tx_buffer->next_to_watch;
3963                 tx_desc = IGB_TX_DESC(tx_ring, i);
3964
3965                 /* unmap remaining buffers */
3966                 while (tx_desc != eop_desc) {
3967                         tx_buffer++;
3968                         tx_desc++;
3969                         i++;
3970                         if (unlikely(i == tx_ring->count)) {
3971                                 i = 0;
3972                                 tx_buffer = tx_ring->tx_buffer_info;
3973                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
3974                         }
3975
3976                         /* unmap any remaining paged data */
3977                         if (dma_unmap_len(tx_buffer, len))
3978                                 dma_unmap_page(tx_ring->dev,
3979                                                dma_unmap_addr(tx_buffer, dma),
3980                                                dma_unmap_len(tx_buffer, len),
3981                                                DMA_TO_DEVICE);
3982                 }
3983
3984                 tx_buffer->next_to_watch = NULL;
3985
3986                 /* move us one more past the eop_desc for start of next pkt */
3987                 tx_buffer++;
3988                 i++;
3989                 if (unlikely(i == tx_ring->count)) {
3990                         i = 0;
3991                         tx_buffer = tx_ring->tx_buffer_info;
3992                 }
3993         }
3994
3995         /* reset BQL for queue */
3996         netdev_tx_reset_queue(txring_txq(tx_ring));
3997
3998         /* reset next_to_use and next_to_clean */
3999         tx_ring->next_to_use = 0;
4000         tx_ring->next_to_clean = 0;
4001 }
4002
4003 /**
4004  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
4005  *  @adapter: board private structure
4006  **/
4007 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4008 {
4009         int i;
4010
4011         for (i = 0; i < adapter->num_tx_queues; i++)
4012                 if (adapter->tx_ring[i])
4013                         igb_clean_tx_ring(adapter->tx_ring[i]);
4014 }
4015
4016 /**
4017  *  igb_free_rx_resources - Free Rx Resources
4018  *  @rx_ring: ring to clean the resources from
4019  *
4020  *  Free all receive software resources
4021  **/
4022 void igb_free_rx_resources(struct igb_ring *rx_ring)
4023 {
4024         igb_clean_rx_ring(rx_ring);
4025
4026         vfree(rx_ring->rx_buffer_info);
4027         rx_ring->rx_buffer_info = NULL;
4028
4029         /* if not set, then don't free */
4030         if (!rx_ring->desc)
4031                 return;
4032
4033         dma_free_coherent(rx_ring->dev, rx_ring->size,
4034                           rx_ring->desc, rx_ring->dma);
4035
4036         rx_ring->desc = NULL;
4037 }
4038
4039 /**
4040  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
4041  *  @adapter: board private structure
4042  *
4043  *  Free all receive software resources
4044  **/
4045 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4046 {
4047         int i;
4048
4049         for (i = 0; i < adapter->num_rx_queues; i++)
4050                 if (adapter->rx_ring[i])
4051                         igb_free_rx_resources(adapter->rx_ring[i]);
4052 }
4053
4054 /**
4055  *  igb_clean_rx_ring - Free Rx Buffers per Queue
4056  *  @rx_ring: ring to free buffers from
4057  **/
4058 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
4059 {
4060         u16 i = rx_ring->next_to_clean;
4061
4062         if (rx_ring->skb)
4063                 dev_kfree_skb(rx_ring->skb);
4064         rx_ring->skb = NULL;
4065
4066         /* Free all the Rx ring sk_buffs */
4067         while (i != rx_ring->next_to_alloc) {
4068                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4069
4070                 /* Invalidate cache lines that may have been written to by
4071                  * device so that we avoid corrupting memory.
4072                  */
4073                 dma_sync_single_range_for_cpu(rx_ring->dev,
4074                                               buffer_info->dma,
4075                                               buffer_info->page_offset,
4076                                               igb_rx_bufsz(rx_ring),
4077                                               DMA_FROM_DEVICE);
4078
4079                 /* free resources associated with mapping */
4080                 dma_unmap_page_attrs(rx_ring->dev,
4081                                      buffer_info->dma,
4082                                      igb_rx_pg_size(rx_ring),
4083                                      DMA_FROM_DEVICE,
4084                                      IGB_RX_DMA_ATTR);
4085                 __page_frag_cache_drain(buffer_info->page,
4086                                         buffer_info->pagecnt_bias);
4087
4088                 i++;
4089                 if (i == rx_ring->count)
4090                         i = 0;
4091         }
4092
4093         rx_ring->next_to_alloc = 0;
4094         rx_ring->next_to_clean = 0;
4095         rx_ring->next_to_use = 0;
4096 }
4097
4098 /**
4099  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
4100  *  @adapter: board private structure
4101  **/
4102 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4103 {
4104         int i;
4105
4106         for (i = 0; i < adapter->num_rx_queues; i++)
4107                 if (adapter->rx_ring[i])
4108                         igb_clean_rx_ring(adapter->rx_ring[i]);
4109 }
4110
4111 /**
4112  *  igb_set_mac - Change the Ethernet Address of the NIC
4113  *  @netdev: network interface device structure
4114  *  @p: pointer to an address structure
4115  *
4116  *  Returns 0 on success, negative on failure
4117  **/
4118 static int igb_set_mac(struct net_device *netdev, void *p)
4119 {
4120         struct igb_adapter *adapter = netdev_priv(netdev);
4121         struct e1000_hw *hw = &adapter->hw;
4122         struct sockaddr *addr = p;
4123
4124         if (!is_valid_ether_addr(addr->sa_data))
4125                 return -EADDRNOTAVAIL;
4126
4127         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4128         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4129
4130         /* set the correct pool for the new PF MAC address in entry 0 */
4131         igb_set_default_mac_filter(adapter);
4132
4133         return 0;
4134 }
4135
4136 /**
4137  *  igb_write_mc_addr_list - write multicast addresses to MTA
4138  *  @netdev: network interface device structure
4139  *
4140  *  Writes multicast address list to the MTA hash table.
4141  *  Returns: -ENOMEM on failure
4142  *           0 on no addresses written
4143  *           X on writing X addresses to MTA
4144  **/
4145 static int igb_write_mc_addr_list(struct net_device *netdev)
4146 {
4147         struct igb_adapter *adapter = netdev_priv(netdev);
4148         struct e1000_hw *hw = &adapter->hw;
4149         struct netdev_hw_addr *ha;
4150         u8  *mta_list;
4151         int i;
4152
4153         if (netdev_mc_empty(netdev)) {
4154                 /* nothing to program, so clear mc list */
4155                 igb_update_mc_addr_list(hw, NULL, 0);
4156                 igb_restore_vf_multicasts(adapter);
4157                 return 0;
4158         }
4159
4160         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
4161         if (!mta_list)
4162                 return -ENOMEM;
4163
4164         /* The shared function expects a packed array of only addresses. */
4165         i = 0;
4166         netdev_for_each_mc_addr(ha, netdev)
4167                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4168
4169         igb_update_mc_addr_list(hw, mta_list, i);
4170         kfree(mta_list);
4171
4172         return netdev_mc_count(netdev);
4173 }
4174
4175 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
4176 {
4177         struct e1000_hw *hw = &adapter->hw;
4178         u32 i, pf_id;
4179
4180         switch (hw->mac.type) {
4181         case e1000_i210:
4182         case e1000_i211:
4183         case e1000_i350:
4184                 /* VLAN filtering needed for VLAN prio filter */
4185                 if (adapter->netdev->features & NETIF_F_NTUPLE)
4186                         break;
4187                 /* fall through */
4188         case e1000_82576:
4189         case e1000_82580:
4190         case e1000_i354:
4191                 /* VLAN filtering needed for pool filtering */
4192                 if (adapter->vfs_allocated_count)
4193                         break;
4194                 /* fall through */
4195         default:
4196                 return 1;
4197         }
4198
4199         /* We are already in VLAN promisc, nothing to do */
4200         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
4201                 return 0;
4202
4203         if (!adapter->vfs_allocated_count)
4204                 goto set_vfta;
4205
4206         /* Add PF to all active pools */
4207         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4208
4209         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4210                 u32 vlvf = rd32(E1000_VLVF(i));
4211
4212                 vlvf |= BIT(pf_id);
4213                 wr32(E1000_VLVF(i), vlvf);
4214         }
4215
4216 set_vfta:
4217         /* Set all bits in the VLAN filter table array */
4218         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
4219                 hw->mac.ops.write_vfta(hw, i, ~0U);
4220
4221         /* Set flag so we don't redo unnecessary work */
4222         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
4223
4224         return 0;
4225 }
4226
4227 #define VFTA_BLOCK_SIZE 8
4228 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
4229 {
4230         struct e1000_hw *hw = &adapter->hw;
4231         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4232         u32 vid_start = vfta_offset * 32;
4233         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4234         u32 i, vid, word, bits, pf_id;
4235
4236         /* guarantee that we don't scrub out management VLAN */
4237         vid = adapter->mng_vlan_id;
4238         if (vid >= vid_start && vid < vid_end)
4239                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4240
4241         if (!adapter->vfs_allocated_count)
4242                 goto set_vfta;
4243
4244         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4245
4246         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4247                 u32 vlvf = rd32(E1000_VLVF(i));
4248
4249                 /* pull VLAN ID from VLVF */
4250                 vid = vlvf & VLAN_VID_MASK;
4251
4252                 /* only concern ourselves with a certain range */
4253                 if (vid < vid_start || vid >= vid_end)
4254                         continue;
4255
4256                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
4257                         /* record VLAN ID in VFTA */
4258                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4259
4260                         /* if PF is part of this then continue */
4261                         if (test_bit(vid, adapter->active_vlans))
4262                                 continue;
4263                 }
4264
4265                 /* remove PF from the pool */
4266                 bits = ~BIT(pf_id);
4267                 bits &= rd32(E1000_VLVF(i));
4268                 wr32(E1000_VLVF(i), bits);
4269         }
4270
4271 set_vfta:
4272         /* extract values from active_vlans and write back to VFTA */
4273         for (i = VFTA_BLOCK_SIZE; i--;) {
4274                 vid = (vfta_offset + i) * 32;
4275                 word = vid / BITS_PER_LONG;
4276                 bits = vid % BITS_PER_LONG;
4277
4278                 vfta[i] |= adapter->active_vlans[word] >> bits;
4279
4280                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
4281         }
4282 }
4283
4284 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
4285 {
4286         u32 i;
4287
4288         /* We are not in VLAN promisc, nothing to do */
4289         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
4290                 return;
4291
4292         /* Set flag so we don't redo unnecessary work */
4293         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
4294
4295         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
4296                 igb_scrub_vfta(adapter, i);
4297 }
4298
4299 /**
4300  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4301  *  @netdev: network interface device structure
4302  *
4303  *  The set_rx_mode entry point is called whenever the unicast or multicast
4304  *  address lists or the network interface flags are updated.  This routine is
4305  *  responsible for configuring the hardware for proper unicast, multicast,
4306  *  promiscuous mode, and all-multi behavior.
4307  **/
4308 static void igb_set_rx_mode(struct net_device *netdev)
4309 {
4310         struct igb_adapter *adapter = netdev_priv(netdev);
4311         struct e1000_hw *hw = &adapter->hw;
4312         unsigned int vfn = adapter->vfs_allocated_count;
4313         u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
4314         int count;
4315
4316         /* Check for Promiscuous and All Multicast modes */
4317         if (netdev->flags & IFF_PROMISC) {
4318                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
4319                 vmolr |= E1000_VMOLR_MPME;
4320
4321                 /* enable use of UTA filter to force packets to default pool */
4322                 if (hw->mac.type == e1000_82576)
4323                         vmolr |= E1000_VMOLR_ROPE;
4324         } else {
4325                 if (netdev->flags & IFF_ALLMULTI) {
4326                         rctl |= E1000_RCTL_MPE;
4327                         vmolr |= E1000_VMOLR_MPME;
4328                 } else {
4329                         /* Write addresses to the MTA, if the attempt fails
4330                          * then we should just turn on promiscuous mode so
4331                          * that we can at least receive multicast traffic
4332                          */
4333                         count = igb_write_mc_addr_list(netdev);
4334                         if (count < 0) {
4335                                 rctl |= E1000_RCTL_MPE;
4336                                 vmolr |= E1000_VMOLR_MPME;
4337                         } else if (count) {
4338                                 vmolr |= E1000_VMOLR_ROMPE;
4339                         }
4340                 }
4341         }
4342
4343         /* Write addresses to available RAR registers, if there is not
4344          * sufficient space to store all the addresses then enable
4345          * unicast promiscuous mode
4346          */
4347         if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
4348                 rctl |= E1000_RCTL_UPE;
4349                 vmolr |= E1000_VMOLR_ROPE;
4350         }
4351
4352         /* enable VLAN filtering by default */
4353         rctl |= E1000_RCTL_VFE;
4354
4355         /* disable VLAN filtering for modes that require it */
4356         if ((netdev->flags & IFF_PROMISC) ||
4357             (netdev->features & NETIF_F_RXALL)) {
4358                 /* if we fail to set all rules then just clear VFE */
4359                 if (igb_vlan_promisc_enable(adapter))
4360                         rctl &= ~E1000_RCTL_VFE;
4361         } else {
4362                 igb_vlan_promisc_disable(adapter);
4363         }
4364
4365         /* update state of unicast, multicast, and VLAN filtering modes */
4366         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
4367                                      E1000_RCTL_VFE);
4368         wr32(E1000_RCTL, rctl);
4369
4370 #if (PAGE_SIZE < 8192)
4371         if (!adapter->vfs_allocated_count) {
4372                 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4373                         rlpml = IGB_MAX_FRAME_BUILD_SKB;
4374         }
4375 #endif
4376         wr32(E1000_RLPML, rlpml);
4377
4378         /* In order to support SR-IOV and eventually VMDq it is necessary to set
4379          * the VMOLR to enable the appropriate modes.  Without this workaround
4380          * we will have issues with VLAN tag stripping not being done for frames
4381          * that are only arriving because we are the default pool
4382          */
4383         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4384                 return;
4385
4386         /* set UTA to appropriate mode */
4387         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
4388
4389         vmolr |= rd32(E1000_VMOLR(vfn)) &
4390                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4391
4392         /* enable Rx jumbo frames, restrict as needed to support build_skb */
4393         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4394 #if (PAGE_SIZE < 8192)
4395         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4396                 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
4397         else
4398 #endif
4399                 vmolr |= MAX_JUMBO_FRAME_SIZE;
4400         vmolr |= E1000_VMOLR_LPE;
4401
4402         wr32(E1000_VMOLR(vfn), vmolr);
4403
4404         igb_restore_vf_multicasts(adapter);
4405 }
4406
4407 static void igb_check_wvbr(struct igb_adapter *adapter)
4408 {
4409         struct e1000_hw *hw = &adapter->hw;
4410         u32 wvbr = 0;
4411
4412         switch (hw->mac.type) {
4413         case e1000_82576:
4414         case e1000_i350:
4415                 wvbr = rd32(E1000_WVBR);
4416                 if (!wvbr)
4417                         return;
4418                 break;
4419         default:
4420                 break;
4421         }
4422
4423         adapter->wvbr |= wvbr;
4424 }
4425
4426 #define IGB_STAGGERED_QUEUE_OFFSET 8
4427
4428 static void igb_spoof_check(struct igb_adapter *adapter)
4429 {
4430         int j;
4431
4432         if (!adapter->wvbr)
4433                 return;
4434
4435         for (j = 0; j < adapter->vfs_allocated_count; j++) {
4436                 if (adapter->wvbr & BIT(j) ||
4437                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
4438                         dev_warn(&adapter->pdev->dev,
4439                                 "Spoof event(s) detected on VF %d\n", j);
4440                         adapter->wvbr &=
4441                                 ~(BIT(j) |
4442                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
4443                 }
4444         }
4445 }
4446
4447 /* Need to wait a few seconds after link up to get diagnostic information from
4448  * the phy
4449  */
4450 static void igb_update_phy_info(unsigned long data)
4451 {
4452         struct igb_adapter *adapter = (struct igb_adapter *) data;
4453         igb_get_phy_info(&adapter->hw);
4454 }
4455
4456 /**
4457  *  igb_has_link - check shared code for link and determine up/down
4458  *  @adapter: pointer to driver private info
4459  **/
4460 bool igb_has_link(struct igb_adapter *adapter)
4461 {
4462         struct e1000_hw *hw = &adapter->hw;
4463         bool link_active = false;
4464
4465         /* get_link_status is set on LSC (link status) interrupt or
4466          * rx sequence error interrupt.  get_link_status will stay
4467          * false until the e1000_check_for_link establishes link
4468          * for copper adapters ONLY
4469          */
4470         switch (hw->phy.media_type) {
4471         case e1000_media_type_copper:
4472                 if (!hw->mac.get_link_status)
4473                         return true;
4474         case e1000_media_type_internal_serdes:
4475                 hw->mac.ops.check_for_link(hw);
4476                 link_active = !hw->mac.get_link_status;
4477                 break;
4478         default:
4479         case e1000_media_type_unknown:
4480                 break;
4481         }
4482
4483         if (((hw->mac.type == e1000_i210) ||
4484              (hw->mac.type == e1000_i211)) &&
4485              (hw->phy.id == I210_I_PHY_ID)) {
4486                 if (!netif_carrier_ok(adapter->netdev)) {
4487                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4488                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4489                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4490                         adapter->link_check_timeout = jiffies;
4491                 }
4492         }
4493
4494         return link_active;
4495 }
4496
4497 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4498 {
4499         bool ret = false;
4500         u32 ctrl_ext, thstat;
4501
4502         /* check for thermal sensor event on i350 copper only */
4503         if (hw->mac.type == e1000_i350) {
4504                 thstat = rd32(E1000_THSTAT);
4505                 ctrl_ext = rd32(E1000_CTRL_EXT);
4506
4507                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4508                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4509                         ret = !!(thstat & event);
4510         }
4511
4512         return ret;
4513 }
4514
4515 /**
4516  *  igb_check_lvmmc - check for malformed packets received
4517  *  and indicated in LVMMC register
4518  *  @adapter: pointer to adapter
4519  **/
4520 static void igb_check_lvmmc(struct igb_adapter *adapter)
4521 {
4522         struct e1000_hw *hw = &adapter->hw;
4523         u32 lvmmc;
4524
4525         lvmmc = rd32(E1000_LVMMC);
4526         if (lvmmc) {
4527                 if (unlikely(net_ratelimit())) {
4528                         netdev_warn(adapter->netdev,
4529                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4530                                     lvmmc);
4531                 }
4532         }
4533 }
4534
4535 /**
4536  *  igb_watchdog - Timer Call-back
4537  *  @data: pointer to adapter cast into an unsigned long
4538  **/
4539 static void igb_watchdog(unsigned long data)
4540 {
4541         struct igb_adapter *adapter = (struct igb_adapter *)data;
4542         /* Do the rest outside of interrupt context */
4543         schedule_work(&adapter->watchdog_task);
4544 }
4545
4546 static void igb_watchdog_task(struct work_struct *work)
4547 {
4548         struct igb_adapter *adapter = container_of(work,
4549                                                    struct igb_adapter,
4550                                                    watchdog_task);
4551         struct e1000_hw *hw = &adapter->hw;
4552         struct e1000_phy_info *phy = &hw->phy;
4553         struct net_device *netdev = adapter->netdev;
4554         u32 link;
4555         int i;
4556         u32 connsw;
4557         u16 phy_data, retry_count = 20;
4558
4559         link = igb_has_link(adapter);
4560
4561         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4562                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4563                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4564                 else
4565                         link = false;
4566         }
4567
4568         /* Force link down if we have fiber to swap to */
4569         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4570                 if (hw->phy.media_type == e1000_media_type_copper) {
4571                         connsw = rd32(E1000_CONNSW);
4572                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4573                                 link = 0;
4574                 }
4575         }
4576         if (link) {
4577                 /* Perform a reset if the media type changed. */
4578                 if (hw->dev_spec._82575.media_changed) {
4579                         hw->dev_spec._82575.media_changed = false;
4580                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4581                         igb_reset(adapter);
4582                 }
4583                 /* Cancel scheduled suspend requests. */
4584                 pm_runtime_resume(netdev->dev.parent);
4585
4586                 if (!netif_carrier_ok(netdev)) {
4587                         u32 ctrl;
4588
4589                         hw->mac.ops.get_speed_and_duplex(hw,
4590                                                          &adapter->link_speed,
4591                                                          &adapter->link_duplex);
4592
4593                         ctrl = rd32(E1000_CTRL);
4594                         /* Links status message must follow this format */
4595                         netdev_info(netdev,
4596                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4597                                netdev->name,
4598                                adapter->link_speed,
4599                                adapter->link_duplex == FULL_DUPLEX ?
4600                                "Full" : "Half",
4601                                (ctrl & E1000_CTRL_TFCE) &&
4602                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4603                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4604                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4605
4606                         /* disable EEE if enabled */
4607                         if ((adapter->flags & IGB_FLAG_EEE) &&
4608                                 (adapter->link_duplex == HALF_DUPLEX)) {
4609                                 dev_info(&adapter->pdev->dev,
4610                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4611                                 adapter->hw.dev_spec._82575.eee_disable = true;
4612                                 adapter->flags &= ~IGB_FLAG_EEE;
4613                         }
4614
4615                         /* check if SmartSpeed worked */
4616                         igb_check_downshift(hw);
4617                         if (phy->speed_downgraded)
4618                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4619
4620                         /* check for thermal sensor event */
4621                         if (igb_thermal_sensor_event(hw,
4622                             E1000_THSTAT_LINK_THROTTLE))
4623                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
4624
4625                         /* adjust timeout factor according to speed/duplex */
4626                         adapter->tx_timeout_factor = 1;
4627                         switch (adapter->link_speed) {
4628                         case SPEED_10:
4629                                 adapter->tx_timeout_factor = 14;
4630                                 break;
4631                         case SPEED_100:
4632                                 /* maybe add some timeout factor ? */
4633                                 break;
4634                         }
4635
4636                         if (adapter->link_speed != SPEED_1000 ||
4637                             !hw->phy.ops.read_reg)
4638                                 goto no_wait;
4639
4640                         /* wait for Remote receiver status OK */
4641 retry_read_status:
4642                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
4643                                               &phy_data)) {
4644                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
4645                                     retry_count) {
4646                                         msleep(100);
4647                                         retry_count--;
4648                                         goto retry_read_status;
4649                                 } else if (!retry_count) {
4650                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
4651                                 }
4652                         } else {
4653                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
4654                         }
4655 no_wait:
4656                         netif_carrier_on(netdev);
4657
4658                         igb_ping_all_vfs(adapter);
4659                         igb_check_vf_rate_limit(adapter);
4660
4661                         /* link state has changed, schedule phy info update */
4662                         if (!test_bit(__IGB_DOWN, &adapter->state))
4663                                 mod_timer(&adapter->phy_info_timer,
4664                                           round_jiffies(jiffies + 2 * HZ));
4665                 }
4666         } else {
4667                 if (netif_carrier_ok(netdev)) {
4668                         adapter->link_speed = 0;
4669                         adapter->link_duplex = 0;
4670
4671                         /* check for thermal sensor event */
4672                         if (igb_thermal_sensor_event(hw,
4673                             E1000_THSTAT_PWR_DOWN)) {
4674                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
4675                         }
4676
4677                         /* Links status message must follow this format */
4678                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
4679                                netdev->name);
4680                         netif_carrier_off(netdev);
4681
4682                         igb_ping_all_vfs(adapter);
4683
4684                         /* link state has changed, schedule phy info update */
4685                         if (!test_bit(__IGB_DOWN, &adapter->state))
4686                                 mod_timer(&adapter->phy_info_timer,
4687                                           round_jiffies(jiffies + 2 * HZ));
4688
4689                         /* link is down, time to check for alternate media */
4690                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4691                                 igb_check_swap_media(adapter);
4692                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4693                                         schedule_work(&adapter->reset_task);
4694                                         /* return immediately */
4695                                         return;
4696                                 }
4697                         }
4698                         pm_schedule_suspend(netdev->dev.parent,
4699                                             MSEC_PER_SEC * 5);
4700
4701                 /* also check for alternate media here */
4702                 } else if (!netif_carrier_ok(netdev) &&
4703                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4704                         igb_check_swap_media(adapter);
4705                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4706                                 schedule_work(&adapter->reset_task);
4707                                 /* return immediately */
4708                                 return;
4709                         }
4710                 }
4711         }
4712
4713         spin_lock(&adapter->stats64_lock);
4714         igb_update_stats(adapter);
4715         spin_unlock(&adapter->stats64_lock);
4716
4717         for (i = 0; i < adapter->num_tx_queues; i++) {
4718                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4719                 if (!netif_carrier_ok(netdev)) {
4720                         /* We've lost link, so the controller stops DMA,
4721                          * but we've got queued Tx work that's never going
4722                          * to get done, so reset controller to flush Tx.
4723                          * (Do the reset outside of interrupt context).
4724                          */
4725                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4726                                 adapter->tx_timeout_count++;
4727                                 schedule_work(&adapter->reset_task);
4728                                 /* return immediately since reset is imminent */
4729                                 return;
4730                         }
4731                 }
4732
4733                 /* Force detection of hung controller every watchdog period */
4734                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4735         }
4736
4737         /* Cause software interrupt to ensure Rx ring is cleaned */
4738         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4739                 u32 eics = 0;
4740
4741                 for (i = 0; i < adapter->num_q_vectors; i++)
4742                         eics |= adapter->q_vector[i]->eims_value;
4743                 wr32(E1000_EICS, eics);
4744         } else {
4745                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4746         }
4747
4748         igb_spoof_check(adapter);
4749         igb_ptp_rx_hang(adapter);
4750         igb_ptp_tx_hang(adapter);
4751
4752         /* Check LVMMC register on i350/i354 only */
4753         if ((adapter->hw.mac.type == e1000_i350) ||
4754             (adapter->hw.mac.type == e1000_i354))
4755                 igb_check_lvmmc(adapter);
4756
4757         /* Reset the timer */
4758         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4759                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4760                         mod_timer(&adapter->watchdog_timer,
4761                                   round_jiffies(jiffies +  HZ));
4762                 else
4763                         mod_timer(&adapter->watchdog_timer,
4764                                   round_jiffies(jiffies + 2 * HZ));
4765         }
4766 }
4767
4768 enum latency_range {
4769         lowest_latency = 0,
4770         low_latency = 1,
4771         bulk_latency = 2,
4772         latency_invalid = 255
4773 };
4774
4775 /**
4776  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4777  *  @q_vector: pointer to q_vector
4778  *
4779  *  Stores a new ITR value based on strictly on packet size.  This
4780  *  algorithm is less sophisticated than that used in igb_update_itr,
4781  *  due to the difficulty of synchronizing statistics across multiple
4782  *  receive rings.  The divisors and thresholds used by this function
4783  *  were determined based on theoretical maximum wire speed and testing
4784  *  data, in order to minimize response time while increasing bulk
4785  *  throughput.
4786  *  This functionality is controlled by ethtool's coalescing settings.
4787  *  NOTE:  This function is called only when operating in a multiqueue
4788  *         receive environment.
4789  **/
4790 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4791 {
4792         int new_val = q_vector->itr_val;
4793         int avg_wire_size = 0;
4794         struct igb_adapter *adapter = q_vector->adapter;
4795         unsigned int packets;
4796
4797         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4798          * ints/sec - ITR timer value of 120 ticks.
4799          */
4800         if (adapter->link_speed != SPEED_1000) {
4801                 new_val = IGB_4K_ITR;
4802                 goto set_itr_val;
4803         }
4804
4805         packets = q_vector->rx.total_packets;
4806         if (packets)
4807                 avg_wire_size = q_vector->rx.total_bytes / packets;
4808
4809         packets = q_vector->tx.total_packets;
4810         if (packets)
4811                 avg_wire_size = max_t(u32, avg_wire_size,
4812                                       q_vector->tx.total_bytes / packets);
4813
4814         /* if avg_wire_size isn't set no work was done */
4815         if (!avg_wire_size)
4816                 goto clear_counts;
4817
4818         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4819         avg_wire_size += 24;
4820
4821         /* Don't starve jumbo frames */
4822         avg_wire_size = min(avg_wire_size, 3000);
4823
4824         /* Give a little boost to mid-size frames */
4825         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4826                 new_val = avg_wire_size / 3;
4827         else
4828                 new_val = avg_wire_size / 2;
4829
4830         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4831         if (new_val < IGB_20K_ITR &&
4832             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4833              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4834                 new_val = IGB_20K_ITR;
4835
4836 set_itr_val:
4837         if (new_val != q_vector->itr_val) {
4838                 q_vector->itr_val = new_val;
4839                 q_vector->set_itr = 1;
4840         }
4841 clear_counts:
4842         q_vector->rx.total_bytes = 0;
4843         q_vector->rx.total_packets = 0;
4844         q_vector->tx.total_bytes = 0;
4845         q_vector->tx.total_packets = 0;
4846 }
4847
4848 /**
4849  *  igb_update_itr - update the dynamic ITR value based on statistics
4850  *  @q_vector: pointer to q_vector
4851  *  @ring_container: ring info to update the itr for
4852  *
4853  *  Stores a new ITR value based on packets and byte
4854  *  counts during the last interrupt.  The advantage of per interrupt
4855  *  computation is faster updates and more accurate ITR for the current
4856  *  traffic pattern.  Constants in this function were computed
4857  *  based on theoretical maximum wire speed and thresholds were set based
4858  *  on testing data as well as attempting to minimize response time
4859  *  while increasing bulk throughput.
4860  *  This functionality is controlled by ethtool's coalescing settings.
4861  *  NOTE:  These calculations are only valid when operating in a single-
4862  *         queue environment.
4863  **/
4864 static void igb_update_itr(struct igb_q_vector *q_vector,
4865                            struct igb_ring_container *ring_container)
4866 {
4867         unsigned int packets = ring_container->total_packets;
4868         unsigned int bytes = ring_container->total_bytes;
4869         u8 itrval = ring_container->itr;
4870
4871         /* no packets, exit with status unchanged */
4872         if (packets == 0)
4873                 return;
4874
4875         switch (itrval) {
4876         case lowest_latency:
4877                 /* handle TSO and jumbo frames */
4878                 if (bytes/packets > 8000)
4879                         itrval = bulk_latency;
4880                 else if ((packets < 5) && (bytes > 512))
4881                         itrval = low_latency;
4882                 break;
4883         case low_latency:  /* 50 usec aka 20000 ints/s */
4884                 if (bytes > 10000) {
4885                         /* this if handles the TSO accounting */
4886                         if (bytes/packets > 8000)
4887                                 itrval = bulk_latency;
4888                         else if ((packets < 10) || ((bytes/packets) > 1200))
4889                                 itrval = bulk_latency;
4890                         else if ((packets > 35))
4891                                 itrval = lowest_latency;
4892                 } else if (bytes/packets > 2000) {
4893                         itrval = bulk_latency;
4894                 } else if (packets <= 2 && bytes < 512) {
4895                         itrval = lowest_latency;
4896                 }
4897                 break;
4898         case bulk_latency: /* 250 usec aka 4000 ints/s */
4899                 if (bytes > 25000) {
4900                         if (packets > 35)
4901                                 itrval = low_latency;
4902                 } else if (bytes < 1500) {
4903                         itrval = low_latency;
4904                 }
4905                 break;
4906         }
4907
4908         /* clear work counters since we have the values we need */
4909         ring_container->total_bytes = 0;
4910         ring_container->total_packets = 0;
4911
4912         /* write updated itr to ring container */
4913         ring_container->itr = itrval;
4914 }
4915
4916 static void igb_set_itr(struct igb_q_vector *q_vector)
4917 {
4918         struct igb_adapter *adapter = q_vector->adapter;
4919         u32 new_itr = q_vector->itr_val;
4920         u8 current_itr = 0;
4921
4922         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4923         if (adapter->link_speed != SPEED_1000) {
4924                 current_itr = 0;
4925                 new_itr = IGB_4K_ITR;
4926                 goto set_itr_now;
4927         }
4928
4929         igb_update_itr(q_vector, &q_vector->tx);
4930         igb_update_itr(q_vector, &q_vector->rx);
4931
4932         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4933
4934         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4935         if (current_itr == lowest_latency &&
4936             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4937              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4938                 current_itr = low_latency;
4939
4940         switch (current_itr) {
4941         /* counts and packets in update_itr are dependent on these numbers */
4942         case lowest_latency:
4943                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4944                 break;
4945         case low_latency:
4946                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4947                 break;
4948         case bulk_latency:
4949                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4950                 break;
4951         default:
4952                 break;
4953         }
4954
4955 set_itr_now:
4956         if (new_itr != q_vector->itr_val) {
4957                 /* this attempts to bias the interrupt rate towards Bulk
4958                  * by adding intermediate steps when interrupt rate is
4959                  * increasing
4960                  */
4961                 new_itr = new_itr > q_vector->itr_val ?
4962                           max((new_itr * q_vector->itr_val) /
4963                           (new_itr + (q_vector->itr_val >> 2)),
4964                           new_itr) : new_itr;
4965                 /* Don't write the value here; it resets the adapter's
4966                  * internal timer, and causes us to delay far longer than
4967                  * we should between interrupts.  Instead, we write the ITR
4968                  * value at the beginning of the next interrupt so the timing
4969                  * ends up being correct.
4970                  */
4971                 q_vector->itr_val = new_itr;
4972                 q_vector->set_itr = 1;
4973         }
4974 }
4975
4976 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4977                             u32 type_tucmd, u32 mss_l4len_idx)
4978 {
4979         struct e1000_adv_tx_context_desc *context_desc;
4980         u16 i = tx_ring->next_to_use;
4981
4982         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4983
4984         i++;
4985         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4986
4987         /* set bits to identify this as an advanced context descriptor */
4988         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4989
4990         /* For 82575, context index must be unique per ring. */
4991         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4992                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4993
4994         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4995         context_desc->seqnum_seed       = 0;
4996         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4997         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4998 }
4999
5000 static int igb_tso(struct igb_ring *tx_ring,
5001                    struct igb_tx_buffer *first,
5002                    u8 *hdr_len)
5003 {
5004         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
5005         struct sk_buff *skb = first->skb;
5006         union {
5007                 struct iphdr *v4;
5008                 struct ipv6hdr *v6;
5009                 unsigned char *hdr;
5010         } ip;
5011         union {
5012                 struct tcphdr *tcp;
5013                 unsigned char *hdr;
5014         } l4;
5015         u32 paylen, l4_offset;
5016         int err;
5017
5018         if (skb->ip_summed != CHECKSUM_PARTIAL)
5019                 return 0;
5020
5021         if (!skb_is_gso(skb))
5022                 return 0;
5023
5024         err = skb_cow_head(skb, 0);
5025         if (err < 0)
5026                 return err;
5027
5028         ip.hdr = skb_network_header(skb);
5029         l4.hdr = skb_checksum_start(skb);
5030
5031         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5032         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5033
5034         /* initialize outer IP header fields */
5035         if (ip.v4->version == 4) {
5036                 unsigned char *csum_start = skb_checksum_start(skb);
5037                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
5038
5039                 /* IP header will have to cancel out any data that
5040                  * is not a part of the outer IP header
5041                  */
5042                 ip.v4->check = csum_fold(csum_partial(trans_start,
5043                                                       csum_start - trans_start,
5044                                                       0));
5045                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5046
5047                 ip.v4->tot_len = 0;
5048                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5049                                    IGB_TX_FLAGS_CSUM |
5050                                    IGB_TX_FLAGS_IPV4;
5051         } else {
5052                 ip.v6->payload_len = 0;
5053                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5054                                    IGB_TX_FLAGS_CSUM;
5055         }
5056
5057         /* determine offset of inner transport header */
5058         l4_offset = l4.hdr - skb->data;
5059
5060         /* compute length of segmentation header */
5061         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
5062
5063         /* remove payload length from inner checksum */
5064         paylen = skb->len - l4_offset;
5065         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
5066
5067         /* update gso size and bytecount with header size */
5068         first->gso_segs = skb_shinfo(skb)->gso_segs;
5069         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5070
5071         /* MSS L4LEN IDX */
5072         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
5073         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5074
5075         /* VLAN MACLEN IPLEN */
5076         vlan_macip_lens = l4.hdr - ip.hdr;
5077         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
5078         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5079
5080         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5081
5082         return 1;
5083 }
5084
5085 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff *skb)
5086 {
5087         unsigned int offset = 0;
5088
5089         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
5090
5091         return offset == skb_checksum_start_offset(skb);
5092 }
5093
5094 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5095 {
5096         struct sk_buff *skb = first->skb;
5097         u32 vlan_macip_lens = 0;
5098         u32 type_tucmd = 0;
5099
5100         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5101 csum_failed:
5102                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5103                         return;
5104                 goto no_csum;
5105         }
5106
5107         switch (skb->csum_offset) {
5108         case offsetof(struct tcphdr, check):
5109                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5110                 /* fall through */
5111         case offsetof(struct udphdr, check):
5112                 break;
5113         case offsetof(struct sctphdr, checksum):
5114                 /* validate that this is actually an SCTP request */
5115                 if (((first->protocol == htons(ETH_P_IP)) &&
5116                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
5117                     ((first->protocol == htons(ETH_P_IPV6)) &&
5118                      igb_ipv6_csum_is_sctp(skb))) {
5119                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
5120                         break;
5121                 }
5122         default:
5123                 skb_checksum_help(skb);
5124                 goto csum_failed;
5125         }
5126
5127         /* update TX checksum flag */
5128         first->tx_flags |= IGB_TX_FLAGS_CSUM;
5129         vlan_macip_lens = skb_checksum_start_offset(skb) -
5130                           skb_network_offset(skb);
5131 no_csum:
5132         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5133         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5134
5135         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
5136 }
5137
5138 #define IGB_SET_FLAG(_input, _flag, _result) \
5139         ((_flag <= _result) ? \
5140          ((u32)(_input & _flag) * (_result / _flag)) : \
5141          ((u32)(_input & _flag) / (_flag / _result)))
5142
5143 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5144 {
5145         /* set type for advanced descriptor with frame checksum insertion */
5146         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5147                        E1000_ADVTXD_DCMD_DEXT |
5148                        E1000_ADVTXD_DCMD_IFCS;
5149
5150         /* set HW vlan bit if vlan is present */
5151         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5152                                  (E1000_ADVTXD_DCMD_VLE));
5153
5154         /* set segmentation bits for TSO */
5155         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5156                                  (E1000_ADVTXD_DCMD_TSE));
5157
5158         /* set timestamp bit if present */
5159         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5160                                  (E1000_ADVTXD_MAC_TSTAMP));
5161
5162         /* insert frame checksum */
5163         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
5164
5165         return cmd_type;
5166 }
5167
5168 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5169                                  union e1000_adv_tx_desc *tx_desc,
5170                                  u32 tx_flags, unsigned int paylen)
5171 {
5172         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5173
5174         /* 82575 requires a unique index per ring */
5175         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5176                 olinfo_status |= tx_ring->reg_idx << 4;
5177
5178         /* insert L4 checksum */
5179         olinfo_status |= IGB_SET_FLAG(tx_flags,
5180                                       IGB_TX_FLAGS_CSUM,
5181                                       (E1000_TXD_POPTS_TXSM << 8));
5182
5183         /* insert IPv4 checksum */
5184         olinfo_status |= IGB_SET_FLAG(tx_flags,
5185                                       IGB_TX_FLAGS_IPV4,
5186                                       (E1000_TXD_POPTS_IXSM << 8));
5187
5188         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5189 }
5190
5191 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5192 {
5193         struct net_device *netdev = tx_ring->netdev;
5194
5195         netif_stop_subqueue(netdev, tx_ring->queue_index);
5196
5197         /* Herbert's original patch had:
5198          *  smp_mb__after_netif_stop_queue();
5199          * but since that doesn't exist yet, just open code it.
5200          */
5201         smp_mb();
5202
5203         /* We need to check again in a case another CPU has just
5204          * made room available.
5205          */
5206         if (igb_desc_unused(tx_ring) < size)
5207                 return -EBUSY;
5208
5209         /* A reprieve! */
5210         netif_wake_subqueue(netdev, tx_ring->queue_index);
5211
5212         u64_stats_update_begin(&tx_ring->tx_syncp2);
5213         tx_ring->tx_stats.restart_queue2++;
5214         u64_stats_update_end(&tx_ring->tx_syncp2);
5215
5216         return 0;
5217 }
5218
5219 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5220 {
5221         if (igb_desc_unused(tx_ring) >= size)
5222                 return 0;
5223         return __igb_maybe_stop_tx(tx_ring, size);
5224 }
5225
5226 static int igb_tx_map(struct igb_ring *tx_ring,
5227                       struct igb_tx_buffer *first,
5228                       const u8 hdr_len)
5229 {
5230         struct sk_buff *skb = first->skb;
5231         struct igb_tx_buffer *tx_buffer;
5232         union e1000_adv_tx_desc *tx_desc;
5233         struct skb_frag_struct *frag;
5234         dma_addr_t dma;
5235         unsigned int data_len, size;
5236         u32 tx_flags = first->tx_flags;
5237         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5238         u16 i = tx_ring->next_to_use;
5239
5240         tx_desc = IGB_TX_DESC(tx_ring, i);
5241
5242         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5243
5244         size = skb_headlen(skb);
5245         data_len = skb->data_len;
5246
5247         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5248
5249         tx_buffer = first;
5250
5251         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5252                 if (dma_mapping_error(tx_ring->dev, dma))
5253                         goto dma_error;
5254
5255                 /* record length, and DMA address */
5256                 dma_unmap_len_set(tx_buffer, len, size);
5257                 dma_unmap_addr_set(tx_buffer, dma, dma);
5258
5259                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5260
5261                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5262                         tx_desc->read.cmd_type_len =
5263                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5264
5265                         i++;
5266                         tx_desc++;
5267                         if (i == tx_ring->count) {
5268                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5269                                 i = 0;
5270                         }
5271                         tx_desc->read.olinfo_status = 0;
5272
5273                         dma += IGB_MAX_DATA_PER_TXD;
5274                         size -= IGB_MAX_DATA_PER_TXD;
5275
5276                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5277                 }
5278
5279                 if (likely(!data_len))
5280                         break;
5281
5282                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5283
5284                 i++;
5285                 tx_desc++;
5286                 if (i == tx_ring->count) {
5287                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5288                         i = 0;
5289                 }
5290                 tx_desc->read.olinfo_status = 0;
5291
5292                 size = skb_frag_size(frag);
5293                 data_len -= size;
5294
5295                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5296                                        size, DMA_TO_DEVICE);
5297
5298                 tx_buffer = &tx_ring->tx_buffer_info[i];
5299         }
5300
5301         /* write last descriptor with RS and EOP bits */
5302         cmd_type |= size | IGB_TXD_DCMD;
5303         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5304
5305         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5306
5307         /* set the timestamp */
5308         first->time_stamp = jiffies;
5309
5310         /* Force memory writes to complete before letting h/w know there
5311          * are new descriptors to fetch.  (Only applicable for weak-ordered
5312          * memory model archs, such as IA-64).
5313          *
5314          * We also need this memory barrier to make certain all of the
5315          * status bits have been updated before next_to_watch is written.
5316          */
5317         wmb();
5318
5319         /* set next_to_watch value indicating a packet is present */
5320         first->next_to_watch = tx_desc;
5321
5322         i++;
5323         if (i == tx_ring->count)
5324                 i = 0;
5325
5326         tx_ring->next_to_use = i;
5327
5328         /* Make sure there is space in the ring for the next send. */
5329         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5330
5331         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
5332                 writel(i, tx_ring->tail);
5333
5334                 /* we need this if more than one processor can write to our tail
5335                  * at a time, it synchronizes IO on IA64/Altix systems
5336                  */
5337                 mmiowb();
5338         }
5339         return 0;
5340
5341 dma_error:
5342         dev_err(tx_ring->dev, "TX DMA map failed\n");
5343         tx_buffer = &tx_ring->tx_buffer_info[i];
5344
5345         /* clear dma mappings for failed tx_buffer_info map */
5346         while (tx_buffer != first) {
5347                 if (dma_unmap_len(tx_buffer, len))
5348                         dma_unmap_page(tx_ring->dev,
5349                                        dma_unmap_addr(tx_buffer, dma),
5350                                        dma_unmap_len(tx_buffer, len),
5351                                        DMA_TO_DEVICE);
5352                 dma_unmap_len_set(tx_buffer, len, 0);
5353
5354                 if (i-- == 0)
5355                         i += tx_ring->count;
5356                 tx_buffer = &tx_ring->tx_buffer_info[i];
5357         }
5358
5359         if (dma_unmap_len(tx_buffer, len))
5360                 dma_unmap_single(tx_ring->dev,
5361                                  dma_unmap_addr(tx_buffer, dma),
5362                                  dma_unmap_len(tx_buffer, len),
5363                                  DMA_TO_DEVICE);
5364         dma_unmap_len_set(tx_buffer, len, 0);
5365
5366         dev_kfree_skb_any(tx_buffer->skb);
5367         tx_buffer->skb = NULL;
5368
5369         tx_ring->next_to_use = i;
5370
5371         return -1;
5372 }
5373
5374 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5375                                 struct igb_ring *tx_ring)
5376 {
5377         struct igb_tx_buffer *first;
5378         int tso;
5379         u32 tx_flags = 0;
5380         unsigned short f;
5381         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5382         __be16 protocol = vlan_get_protocol(skb);
5383         u8 hdr_len = 0;
5384
5385         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5386          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5387          *       + 2 desc gap to keep tail from touching head,
5388          *       + 1 desc for context descriptor,
5389          * otherwise try next time
5390          */
5391         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5392                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5393
5394         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5395                 /* this is a hard error */
5396                 return NETDEV_TX_BUSY;
5397         }
5398
5399         /* record the location of the first descriptor for this packet */
5400         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5401         first->skb = skb;
5402         first->bytecount = skb->len;
5403         first->gso_segs = 1;
5404
5405         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5406                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5407
5408                 if (adapter->tstamp_config.tx_type & HWTSTAMP_TX_ON &&
5409                     !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
5410                                            &adapter->state)) {
5411                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5412                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5413
5414                         adapter->ptp_tx_skb = skb_get(skb);
5415                         adapter->ptp_tx_start = jiffies;
5416                         if (adapter->hw.mac.type == e1000_82576)
5417                                 schedule_work(&adapter->ptp_tx_work);
5418                 } else {
5419                         adapter->tx_hwtstamp_skipped++;
5420                 }
5421         }
5422
5423         skb_tx_timestamp(skb);
5424
5425         if (skb_vlan_tag_present(skb)) {
5426                 tx_flags |= IGB_TX_FLAGS_VLAN;
5427                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5428         }
5429
5430         /* record initial flags and protocol */
5431         first->tx_flags = tx_flags;
5432         first->protocol = protocol;
5433
5434         tso = igb_tso(tx_ring, first, &hdr_len);
5435         if (tso < 0)
5436                 goto out_drop;
5437         else if (!tso)
5438                 igb_tx_csum(tx_ring, first);
5439
5440         if (igb_tx_map(tx_ring, first, hdr_len))
5441                 goto cleanup_tx_tstamp;
5442
5443         return NETDEV_TX_OK;
5444
5445 out_drop:
5446         dev_kfree_skb_any(first->skb);
5447         first->skb = NULL;
5448 cleanup_tx_tstamp:
5449         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
5450                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5451
5452                 dev_kfree_skb_any(adapter->ptp_tx_skb);
5453                 adapter->ptp_tx_skb = NULL;
5454                 if (adapter->hw.mac.type == e1000_82576)
5455                         cancel_work_sync(&adapter->ptp_tx_work);
5456                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
5457         }
5458
5459         return NETDEV_TX_OK;
5460 }
5461
5462 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5463                                                     struct sk_buff *skb)
5464 {
5465         unsigned int r_idx = skb->queue_mapping;
5466
5467         if (r_idx >= adapter->num_tx_queues)
5468                 r_idx = r_idx % adapter->num_tx_queues;
5469
5470         return adapter->tx_ring[r_idx];
5471 }
5472
5473 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5474                                   struct net_device *netdev)
5475 {
5476         struct igb_adapter *adapter = netdev_priv(netdev);
5477
5478         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5479          * in order to meet this minimum size requirement.
5480          */
5481         if (skb_put_padto(skb, 17))
5482                 return NETDEV_TX_OK;
5483
5484         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5485 }
5486
5487 /**
5488  *  igb_tx_timeout - Respond to a Tx Hang
5489  *  @netdev: network interface device structure
5490  **/
5491 static void igb_tx_timeout(struct net_device *netdev)
5492 {
5493         struct igb_adapter *adapter = netdev_priv(netdev);
5494         struct e1000_hw *hw = &adapter->hw;
5495
5496         /* Do the reset outside of interrupt context */
5497         adapter->tx_timeout_count++;
5498
5499         if (hw->mac.type >= e1000_82580)
5500                 hw->dev_spec._82575.global_device_reset = true;
5501
5502         schedule_work(&adapter->reset_task);
5503         wr32(E1000_EICS,
5504              (adapter->eims_enable_mask & ~adapter->eims_other));
5505 }
5506
5507 static void igb_reset_task(struct work_struct *work)
5508 {
5509         struct igb_adapter *adapter;
5510         adapter = container_of(work, struct igb_adapter, reset_task);
5511
5512         rtnl_lock();
5513         /* If we're already down or resetting, just bail */
5514         if (test_bit(__IGB_DOWN, &adapter->state) ||
5515             test_bit(__IGB_RESETTING, &adapter->state)) {
5516                 rtnl_unlock();
5517                 return;
5518         }
5519
5520         igb_dump(adapter);
5521         netdev_err(adapter->netdev, "Reset adapter\n");
5522         igb_reinit_locked(adapter);
5523         rtnl_unlock();
5524 }
5525
5526 /**
5527  *  igb_get_stats64 - Get System Network Statistics
5528  *  @netdev: network interface device structure
5529  *  @stats: rtnl_link_stats64 pointer
5530  **/
5531 static void igb_get_stats64(struct net_device *netdev,
5532                             struct rtnl_link_stats64 *stats)
5533 {
5534         struct igb_adapter *adapter = netdev_priv(netdev);
5535
5536         spin_lock(&adapter->stats64_lock);
5537         igb_update_stats(adapter);
5538         memcpy(stats, &adapter->stats64, sizeof(*stats));
5539         spin_unlock(&adapter->stats64_lock);
5540 }
5541
5542 /**
5543  *  igb_change_mtu - Change the Maximum Transfer Unit
5544  *  @netdev: network interface device structure
5545  *  @new_mtu: new value for maximum frame size
5546  *
5547  *  Returns 0 on success, negative on failure
5548  **/
5549 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5550 {
5551         struct igb_adapter *adapter = netdev_priv(netdev);
5552         struct pci_dev *pdev = adapter->pdev;
5553         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5554
5555         /* adjust max frame to be at least the size of a standard frame */
5556         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5557                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5558
5559         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5560                 usleep_range(1000, 2000);
5561
5562         /* igb_down has a dependency on max_frame_size */
5563         adapter->max_frame_size = max_frame;
5564
5565         if (netif_running(netdev))
5566                 igb_down(adapter);
5567
5568         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5569                  netdev->mtu, new_mtu);
5570         netdev->mtu = new_mtu;
5571
5572         if (netif_running(netdev))
5573                 igb_up(adapter);
5574         else
5575                 igb_reset(adapter);
5576
5577         clear_bit(__IGB_RESETTING, &adapter->state);
5578
5579         return 0;
5580 }
5581
5582 /**
5583  *  igb_update_stats - Update the board statistics counters
5584  *  @adapter: board private structure
5585  **/
5586 void igb_update_stats(struct igb_adapter *adapter)
5587 {
5588         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
5589         struct e1000_hw *hw = &adapter->hw;
5590         struct pci_dev *pdev = adapter->pdev;
5591         u32 reg, mpc;
5592         int i;
5593         u64 bytes, packets;
5594         unsigned int start;
5595         u64 _bytes, _packets;
5596
5597         /* Prevent stats update while adapter is being reset, or if the pci
5598          * connection is down.
5599          */
5600         if (adapter->link_speed == 0)
5601                 return;
5602         if (pci_channel_offline(pdev))
5603                 return;
5604
5605         bytes = 0;
5606         packets = 0;
5607
5608         rcu_read_lock();
5609         for (i = 0; i < adapter->num_rx_queues; i++) {
5610                 struct igb_ring *ring = adapter->rx_ring[i];
5611                 u32 rqdpc = rd32(E1000_RQDPC(i));
5612                 if (hw->mac.type >= e1000_i210)
5613                         wr32(E1000_RQDPC(i), 0);
5614
5615                 if (rqdpc) {
5616                         ring->rx_stats.drops += rqdpc;
5617                         net_stats->rx_fifo_errors += rqdpc;
5618                 }
5619
5620                 do {
5621                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5622                         _bytes = ring->rx_stats.bytes;
5623                         _packets = ring->rx_stats.packets;
5624                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5625                 bytes += _bytes;
5626                 packets += _packets;
5627         }
5628
5629         net_stats->rx_bytes = bytes;
5630         net_stats->rx_packets = packets;
5631
5632         bytes = 0;
5633         packets = 0;
5634         for (i = 0; i < adapter->num_tx_queues; i++) {
5635                 struct igb_ring *ring = adapter->tx_ring[i];
5636                 do {
5637                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5638                         _bytes = ring->tx_stats.bytes;
5639                         _packets = ring->tx_stats.packets;
5640                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5641                 bytes += _bytes;
5642                 packets += _packets;
5643         }
5644         net_stats->tx_bytes = bytes;
5645         net_stats->tx_packets = packets;
5646         rcu_read_unlock();
5647
5648         /* read stats registers */
5649         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5650         adapter->stats.gprc += rd32(E1000_GPRC);
5651         adapter->stats.gorc += rd32(E1000_GORCL);
5652         rd32(E1000_GORCH); /* clear GORCL */
5653         adapter->stats.bprc += rd32(E1000_BPRC);
5654         adapter->stats.mprc += rd32(E1000_MPRC);
5655         adapter->stats.roc += rd32(E1000_ROC);
5656
5657         adapter->stats.prc64 += rd32(E1000_PRC64);
5658         adapter->stats.prc127 += rd32(E1000_PRC127);
5659         adapter->stats.prc255 += rd32(E1000_PRC255);
5660         adapter->stats.prc511 += rd32(E1000_PRC511);
5661         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5662         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5663         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5664         adapter->stats.sec += rd32(E1000_SEC);
5665
5666         mpc = rd32(E1000_MPC);
5667         adapter->stats.mpc += mpc;
5668         net_stats->rx_fifo_errors += mpc;
5669         adapter->stats.scc += rd32(E1000_SCC);
5670         adapter->stats.ecol += rd32(E1000_ECOL);
5671         adapter->stats.mcc += rd32(E1000_MCC);
5672         adapter->stats.latecol += rd32(E1000_LATECOL);
5673         adapter->stats.dc += rd32(E1000_DC);
5674         adapter->stats.rlec += rd32(E1000_RLEC);
5675         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5676         adapter->stats.xontxc += rd32(E1000_XONTXC);
5677         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5678         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5679         adapter->stats.fcruc += rd32(E1000_FCRUC);
5680         adapter->stats.gptc += rd32(E1000_GPTC);
5681         adapter->stats.gotc += rd32(E1000_GOTCL);
5682         rd32(E1000_GOTCH); /* clear GOTCL */
5683         adapter->stats.rnbc += rd32(E1000_RNBC);
5684         adapter->stats.ruc += rd32(E1000_RUC);
5685         adapter->stats.rfc += rd32(E1000_RFC);
5686         adapter->stats.rjc += rd32(E1000_RJC);
5687         adapter->stats.tor += rd32(E1000_TORH);
5688         adapter->stats.tot += rd32(E1000_TOTH);
5689         adapter->stats.tpr += rd32(E1000_TPR);
5690
5691         adapter->stats.ptc64 += rd32(E1000_PTC64);
5692         adapter->stats.ptc127 += rd32(E1000_PTC127);
5693         adapter->stats.ptc255 += rd32(E1000_PTC255);
5694         adapter->stats.ptc511 += rd32(E1000_PTC511);
5695         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5696         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5697
5698         adapter->stats.mptc += rd32(E1000_MPTC);
5699         adapter->stats.bptc += rd32(E1000_BPTC);
5700
5701         adapter->stats.tpt += rd32(E1000_TPT);
5702         adapter->stats.colc += rd32(E1000_COLC);
5703
5704         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5705         /* read internal phy specific stats */
5706         reg = rd32(E1000_CTRL_EXT);
5707         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5708                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5709
5710                 /* this stat has invalid values on i210/i211 */
5711                 if ((hw->mac.type != e1000_i210) &&
5712                     (hw->mac.type != e1000_i211))
5713                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5714         }
5715
5716         adapter->stats.tsctc += rd32(E1000_TSCTC);
5717         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5718
5719         adapter->stats.iac += rd32(E1000_IAC);
5720         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5721         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5722         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5723         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5724         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5725         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5726         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5727         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5728
5729         /* Fill out the OS statistics structure */
5730         net_stats->multicast = adapter->stats.mprc;
5731         net_stats->collisions = adapter->stats.colc;
5732
5733         /* Rx Errors */
5734
5735         /* RLEC on some newer hardware can be incorrect so build
5736          * our own version based on RUC and ROC
5737          */
5738         net_stats->rx_errors = adapter->stats.rxerrc +
5739                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5740                 adapter->stats.ruc + adapter->stats.roc +
5741                 adapter->stats.cexterr;
5742         net_stats->rx_length_errors = adapter->stats.ruc +
5743                                       adapter->stats.roc;
5744         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5745         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5746         net_stats->rx_missed_errors = adapter->stats.mpc;
5747
5748         /* Tx Errors */
5749         net_stats->tx_errors = adapter->stats.ecol +
5750                                adapter->stats.latecol;
5751         net_stats->tx_aborted_errors = adapter->stats.ecol;
5752         net_stats->tx_window_errors = adapter->stats.latecol;
5753         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5754
5755         /* Tx Dropped needs to be maintained elsewhere */
5756
5757         /* Management Stats */
5758         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5759         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5760         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5761
5762         /* OS2BMC Stats */
5763         reg = rd32(E1000_MANC);
5764         if (reg & E1000_MANC_EN_BMC2OS) {
5765                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5766                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5767                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5768                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5769         }
5770 }
5771
5772 static void igb_tsync_interrupt(struct igb_adapter *adapter)
5773 {
5774         struct e1000_hw *hw = &adapter->hw;
5775         struct ptp_clock_event event;
5776         struct timespec64 ts;
5777         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
5778
5779         if (tsicr & TSINTR_SYS_WRAP) {
5780                 event.type = PTP_CLOCK_PPS;
5781                 if (adapter->ptp_caps.pps)
5782                         ptp_clock_event(adapter->ptp_clock, &event);
5783                 ack |= TSINTR_SYS_WRAP;
5784         }
5785
5786         if (tsicr & E1000_TSICR_TXTS) {
5787                 /* retrieve hardware timestamp */
5788                 schedule_work(&adapter->ptp_tx_work);
5789                 ack |= E1000_TSICR_TXTS;
5790         }
5791
5792         if (tsicr & TSINTR_TT0) {
5793                 spin_lock(&adapter->tmreg_lock);
5794                 ts = timespec64_add(adapter->perout[0].start,
5795                                     adapter->perout[0].period);
5796                 /* u32 conversion of tv_sec is safe until y2106 */
5797                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
5798                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
5799                 tsauxc = rd32(E1000_TSAUXC);
5800                 tsauxc |= TSAUXC_EN_TT0;
5801                 wr32(E1000_TSAUXC, tsauxc);
5802                 adapter->perout[0].start = ts;
5803                 spin_unlock(&adapter->tmreg_lock);
5804                 ack |= TSINTR_TT0;
5805         }
5806
5807         if (tsicr & TSINTR_TT1) {
5808                 spin_lock(&adapter->tmreg_lock);
5809                 ts = timespec64_add(adapter->perout[1].start,
5810                                     adapter->perout[1].period);
5811                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
5812                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
5813                 tsauxc = rd32(E1000_TSAUXC);
5814                 tsauxc |= TSAUXC_EN_TT1;
5815                 wr32(E1000_TSAUXC, tsauxc);
5816                 adapter->perout[1].start = ts;
5817                 spin_unlock(&adapter->tmreg_lock);
5818                 ack |= TSINTR_TT1;
5819         }
5820
5821         if (tsicr & TSINTR_AUTT0) {
5822                 nsec = rd32(E1000_AUXSTMPL0);
5823                 sec  = rd32(E1000_AUXSTMPH0);
5824                 event.type = PTP_CLOCK_EXTTS;
5825                 event.index = 0;
5826                 event.timestamp = sec * 1000000000ULL + nsec;
5827                 ptp_clock_event(adapter->ptp_clock, &event);
5828                 ack |= TSINTR_AUTT0;
5829         }
5830
5831         if (tsicr & TSINTR_AUTT1) {
5832                 nsec = rd32(E1000_AUXSTMPL1);
5833                 sec  = rd32(E1000_AUXSTMPH1);
5834                 event.type = PTP_CLOCK_EXTTS;
5835                 event.index = 1;
5836                 event.timestamp = sec * 1000000000ULL + nsec;
5837                 ptp_clock_event(adapter->ptp_clock, &event);
5838                 ack |= TSINTR_AUTT1;
5839         }
5840
5841         /* acknowledge the interrupts */
5842         wr32(E1000_TSICR, ack);
5843 }
5844
5845 static irqreturn_t igb_msix_other(int irq, void *data)
5846 {
5847         struct igb_adapter *adapter = data;
5848         struct e1000_hw *hw = &adapter->hw;
5849         u32 icr = rd32(E1000_ICR);
5850         /* reading ICR causes bit 31 of EICR to be cleared */
5851
5852         if (icr & E1000_ICR_DRSTA)
5853                 schedule_work(&adapter->reset_task);
5854
5855         if (icr & E1000_ICR_DOUTSYNC) {
5856                 /* HW is reporting DMA is out of sync */
5857                 adapter->stats.doosync++;
5858                 /* The DMA Out of Sync is also indication of a spoof event
5859                  * in IOV mode. Check the Wrong VM Behavior register to
5860                  * see if it is really a spoof event.
5861                  */
5862                 igb_check_wvbr(adapter);
5863         }
5864
5865         /* Check for a mailbox event */
5866         if (icr & E1000_ICR_VMMB)
5867                 igb_msg_task(adapter);
5868
5869         if (icr & E1000_ICR_LSC) {
5870                 hw->mac.get_link_status = 1;
5871                 /* guard against interrupt when we're going down */
5872                 if (!test_bit(__IGB_DOWN, &adapter->state))
5873                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5874         }
5875
5876         if (icr & E1000_ICR_TS)
5877                 igb_tsync_interrupt(adapter);
5878
5879         wr32(E1000_EIMS, adapter->eims_other);
5880
5881         return IRQ_HANDLED;
5882 }
5883
5884 static void igb_write_itr(struct igb_q_vector *q_vector)
5885 {
5886         struct igb_adapter *adapter = q_vector->adapter;
5887         u32 itr_val = q_vector->itr_val & 0x7FFC;
5888
5889         if (!q_vector->set_itr)
5890                 return;
5891
5892         if (!itr_val)
5893                 itr_val = 0x4;
5894
5895         if (adapter->hw.mac.type == e1000_82575)
5896                 itr_val |= itr_val << 16;
5897         else
5898                 itr_val |= E1000_EITR_CNT_IGNR;
5899
5900         writel(itr_val, q_vector->itr_register);
5901         q_vector->set_itr = 0;
5902 }
5903
5904 static irqreturn_t igb_msix_ring(int irq, void *data)
5905 {
5906         struct igb_q_vector *q_vector = data;
5907
5908         /* Write the ITR value calculated from the previous interrupt. */
5909         igb_write_itr(q_vector);
5910
5911         napi_schedule(&q_vector->napi);
5912
5913         return IRQ_HANDLED;
5914 }
5915
5916 #ifdef CONFIG_IGB_DCA
5917 static void igb_update_tx_dca(struct igb_adapter *adapter,
5918                               struct igb_ring *tx_ring,
5919                               int cpu)
5920 {
5921         struct e1000_hw *hw = &adapter->hw;
5922         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5923
5924         if (hw->mac.type != e1000_82575)
5925                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5926
5927         /* We can enable relaxed ordering for reads, but not writes when
5928          * DCA is enabled.  This is due to a known issue in some chipsets
5929          * which will cause the DCA tag to be cleared.
5930          */
5931         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5932                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5933                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5934
5935         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5936 }
5937
5938 static void igb_update_rx_dca(struct igb_adapter *adapter,
5939                               struct igb_ring *rx_ring,
5940                               int cpu)
5941 {
5942         struct e1000_hw *hw = &adapter->hw;
5943         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5944
5945         if (hw->mac.type != e1000_82575)
5946                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5947
5948         /* We can enable relaxed ordering for reads, but not writes when
5949          * DCA is enabled.  This is due to a known issue in some chipsets
5950          * which will cause the DCA tag to be cleared.
5951          */
5952         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5953                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5954
5955         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5956 }
5957
5958 static void igb_update_dca(struct igb_q_vector *q_vector)
5959 {
5960         struct igb_adapter *adapter = q_vector->adapter;
5961         int cpu = get_cpu();
5962
5963         if (q_vector->cpu == cpu)
5964                 goto out_no_update;
5965
5966         if (q_vector->tx.ring)
5967                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5968
5969         if (q_vector->rx.ring)
5970                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5971
5972         q_vector->cpu = cpu;
5973 out_no_update:
5974         put_cpu();
5975 }
5976
5977 static void igb_setup_dca(struct igb_adapter *adapter)
5978 {
5979         struct e1000_hw *hw = &adapter->hw;
5980         int i;
5981
5982         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5983                 return;
5984
5985         /* Always use CB2 mode, difference is masked in the CB driver. */
5986         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5987
5988         for (i = 0; i < adapter->num_q_vectors; i++) {
5989                 adapter->q_vector[i]->cpu = -1;
5990                 igb_update_dca(adapter->q_vector[i]);
5991         }
5992 }
5993
5994 static int __igb_notify_dca(struct device *dev, void *data)
5995 {
5996         struct net_device *netdev = dev_get_drvdata(dev);
5997         struct igb_adapter *adapter = netdev_priv(netdev);
5998         struct pci_dev *pdev = adapter->pdev;
5999         struct e1000_hw *hw = &adapter->hw;
6000         unsigned long event = *(unsigned long *)data;
6001
6002         switch (event) {
6003         case DCA_PROVIDER_ADD:
6004                 /* if already enabled, don't do it again */
6005                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6006                         break;
6007                 if (dca_add_requester(dev) == 0) {
6008                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6009                         dev_info(&pdev->dev, "DCA enabled\n");
6010                         igb_setup_dca(adapter);
6011                         break;
6012                 }
6013                 /* Fall Through since DCA is disabled. */
6014         case DCA_PROVIDER_REMOVE:
6015                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6016                         /* without this a class_device is left
6017                          * hanging around in the sysfs model
6018                          */
6019                         dca_remove_requester(dev);
6020                         dev_info(&pdev->dev, "DCA disabled\n");
6021                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6022                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
6023                 }
6024                 break;
6025         }
6026
6027         return 0;
6028 }
6029
6030 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6031                           void *p)
6032 {
6033         int ret_val;
6034
6035         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6036                                          __igb_notify_dca);
6037
6038         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6039 }
6040 #endif /* CONFIG_IGB_DCA */
6041
6042 #ifdef CONFIG_PCI_IOV
6043 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6044 {
6045         unsigned char mac_addr[ETH_ALEN];
6046
6047         eth_zero_addr(mac_addr);
6048         igb_set_vf_mac(adapter, vf, mac_addr);
6049
6050         /* By default spoof check is enabled for all VFs */
6051         adapter->vf_data[vf].spoofchk_enabled = true;
6052
6053         return 0;
6054 }
6055
6056 #endif
6057 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6058 {
6059         struct e1000_hw *hw = &adapter->hw;
6060         u32 ping;
6061         int i;
6062
6063         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6064                 ping = E1000_PF_CONTROL_MSG;
6065                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6066                         ping |= E1000_VT_MSGTYPE_CTS;
6067                 igb_write_mbx(hw, &ping, 1, i);
6068         }
6069 }
6070
6071 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6072 {
6073         struct e1000_hw *hw = &adapter->hw;
6074         u32 vmolr = rd32(E1000_VMOLR(vf));
6075         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6076
6077         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6078                             IGB_VF_FLAG_MULTI_PROMISC);
6079         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6080
6081         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6082                 vmolr |= E1000_VMOLR_MPME;
6083                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6084                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6085         } else {
6086                 /* if we have hashes and we are clearing a multicast promisc
6087                  * flag we need to write the hashes to the MTA as this step
6088                  * was previously skipped
6089                  */
6090                 if (vf_data->num_vf_mc_hashes > 30) {
6091                         vmolr |= E1000_VMOLR_MPME;
6092                 } else if (vf_data->num_vf_mc_hashes) {
6093                         int j;
6094
6095                         vmolr |= E1000_VMOLR_ROMPE;
6096                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6097                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6098                 }
6099         }
6100
6101         wr32(E1000_VMOLR(vf), vmolr);
6102
6103         /* there are flags left unprocessed, likely not supported */
6104         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6105                 return -EINVAL;
6106
6107         return 0;
6108 }
6109
6110 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6111                                   u32 *msgbuf, u32 vf)
6112 {
6113         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6114         u16 *hash_list = (u16 *)&msgbuf[1];
6115         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6116         int i;
6117
6118         /* salt away the number of multicast addresses assigned
6119          * to this VF for later use to restore when the PF multi cast
6120          * list changes
6121          */
6122         vf_data->num_vf_mc_hashes = n;
6123
6124         /* only up to 30 hash values supported */
6125         if (n > 30)
6126                 n = 30;
6127
6128         /* store the hashes for later use */
6129         for (i = 0; i < n; i++)
6130                 vf_data->vf_mc_hashes[i] = hash_list[i];
6131
6132         /* Flush and reset the mta with the new values */
6133         igb_set_rx_mode(adapter->netdev);
6134
6135         return 0;
6136 }
6137
6138 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6139 {
6140         struct e1000_hw *hw = &adapter->hw;
6141         struct vf_data_storage *vf_data;
6142         int i, j;
6143
6144         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6145                 u32 vmolr = rd32(E1000_VMOLR(i));
6146
6147                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6148
6149                 vf_data = &adapter->vf_data[i];
6150
6151                 if ((vf_data->num_vf_mc_hashes > 30) ||
6152                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6153                         vmolr |= E1000_VMOLR_MPME;
6154                 } else if (vf_data->num_vf_mc_hashes) {
6155                         vmolr |= E1000_VMOLR_ROMPE;
6156                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6157                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6158                 }
6159                 wr32(E1000_VMOLR(i), vmolr);
6160         }
6161 }
6162
6163 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6164 {
6165         struct e1000_hw *hw = &adapter->hw;
6166         u32 pool_mask, vlvf_mask, i;
6167
6168         /* create mask for VF and other pools */
6169         pool_mask = E1000_VLVF_POOLSEL_MASK;
6170         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
6171
6172         /* drop PF from pool bits */
6173         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
6174                              adapter->vfs_allocated_count);
6175
6176         /* Find the vlan filter for this id */
6177         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
6178                 u32 vlvf = rd32(E1000_VLVF(i));
6179                 u32 vfta_mask, vid, vfta;
6180
6181                 /* remove the vf from the pool */
6182                 if (!(vlvf & vlvf_mask))
6183                         continue;
6184
6185                 /* clear out bit from VLVF */
6186                 vlvf ^= vlvf_mask;
6187
6188                 /* if other pools are present, just remove ourselves */
6189                 if (vlvf & pool_mask)
6190                         goto update_vlvfb;
6191
6192                 /* if PF is present, leave VFTA */
6193                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
6194                         goto update_vlvf;
6195
6196                 vid = vlvf & E1000_VLVF_VLANID_MASK;
6197                 vfta_mask = BIT(vid % 32);
6198
6199                 /* clear bit from VFTA */
6200                 vfta = adapter->shadow_vfta[vid / 32];
6201                 if (vfta & vfta_mask)
6202                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
6203 update_vlvf:
6204                 /* clear pool selection enable */
6205                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6206                         vlvf &= E1000_VLVF_POOLSEL_MASK;
6207                 else
6208                         vlvf = 0;
6209 update_vlvfb:
6210                 /* clear pool bits */
6211                 wr32(E1000_VLVF(i), vlvf);
6212         }
6213 }
6214
6215 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
6216 {
6217         u32 vlvf;
6218         int idx;
6219
6220         /* short cut the special case */
6221         if (vlan == 0)
6222                 return 0;
6223
6224         /* Search for the VLAN id in the VLVF entries */
6225         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
6226                 vlvf = rd32(E1000_VLVF(idx));
6227                 if ((vlvf & VLAN_VID_MASK) == vlan)
6228                         break;
6229         }
6230
6231         return idx;
6232 }
6233
6234 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
6235 {
6236         struct e1000_hw *hw = &adapter->hw;
6237         u32 bits, pf_id;
6238         int idx;
6239
6240         idx = igb_find_vlvf_entry(hw, vid);
6241         if (!idx)
6242                 return;
6243
6244         /* See if any other pools are set for this VLAN filter
6245          * entry other than the PF.
6246          */
6247         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
6248         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
6249         bits &= rd32(E1000_VLVF(idx));
6250
6251         /* Disable the filter so this falls into the default pool. */
6252         if (!bits) {
6253                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6254                         wr32(E1000_VLVF(idx), BIT(pf_id));
6255                 else
6256                         wr32(E1000_VLVF(idx), 0);
6257         }
6258 }
6259
6260 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
6261                            bool add, u32 vf)
6262 {
6263         int pf_id = adapter->vfs_allocated_count;
6264         struct e1000_hw *hw = &adapter->hw;
6265         int err;
6266
6267         /* If VLAN overlaps with one the PF is currently monitoring make
6268          * sure that we are able to allocate a VLVF entry.  This may be
6269          * redundant but it guarantees PF will maintain visibility to
6270          * the VLAN.
6271          */
6272         if (add && test_bit(vid, adapter->active_vlans)) {
6273                 err = igb_vfta_set(hw, vid, pf_id, true, false);
6274                 if (err)
6275                         return err;
6276         }
6277
6278         err = igb_vfta_set(hw, vid, vf, add, false);
6279
6280         if (add && !err)
6281                 return err;
6282
6283         /* If we failed to add the VF VLAN or we are removing the VF VLAN
6284          * we may need to drop the PF pool bit in order to allow us to free
6285          * up the VLVF resources.
6286          */
6287         if (test_bit(vid, adapter->active_vlans) ||
6288             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
6289                 igb_update_pf_vlvf(adapter, vid);
6290
6291         return err;
6292 }
6293
6294 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6295 {
6296         struct e1000_hw *hw = &adapter->hw;
6297
6298         if (vid)
6299                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6300         else
6301                 wr32(E1000_VMVIR(vf), 0);
6302 }
6303
6304 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
6305                                 u16 vlan, u8 qos)
6306 {
6307         int err;
6308
6309         err = igb_set_vf_vlan(adapter, vlan, true, vf);
6310         if (err)
6311                 return err;
6312
6313         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6314         igb_set_vmolr(adapter, vf, !vlan);
6315
6316         /* revoke access to previous VLAN */
6317         if (vlan != adapter->vf_data[vf].pf_vlan)
6318                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6319                                 false, vf);
6320
6321         adapter->vf_data[vf].pf_vlan = vlan;
6322         adapter->vf_data[vf].pf_qos = qos;
6323         igb_set_vf_vlan_strip(adapter, vf, true);
6324         dev_info(&adapter->pdev->dev,
6325                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6326         if (test_bit(__IGB_DOWN, &adapter->state)) {
6327                 dev_warn(&adapter->pdev->dev,
6328                          "The VF VLAN has been set, but the PF device is not up.\n");
6329                 dev_warn(&adapter->pdev->dev,
6330                          "Bring the PF device up before attempting to use the VF device.\n");
6331         }
6332
6333         return err;
6334 }
6335
6336 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
6337 {
6338         /* Restore tagless access via VLAN 0 */
6339         igb_set_vf_vlan(adapter, 0, true, vf);
6340
6341         igb_set_vmvir(adapter, 0, vf);
6342         igb_set_vmolr(adapter, vf, true);
6343
6344         /* Remove any PF assigned VLAN */
6345         if (adapter->vf_data[vf].pf_vlan)
6346                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6347                                 false, vf);
6348
6349         adapter->vf_data[vf].pf_vlan = 0;
6350         adapter->vf_data[vf].pf_qos = 0;
6351         igb_set_vf_vlan_strip(adapter, vf, false);
6352
6353         return 0;
6354 }
6355
6356 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
6357                                u16 vlan, u8 qos, __be16 vlan_proto)
6358 {
6359         struct igb_adapter *adapter = netdev_priv(netdev);
6360
6361         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
6362                 return -EINVAL;
6363
6364         if (vlan_proto != htons(ETH_P_8021Q))
6365                 return -EPROTONOSUPPORT;
6366
6367         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
6368                                igb_disable_port_vlan(adapter, vf);
6369 }
6370
6371 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6372 {
6373         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6374         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6375         int ret;
6376
6377         if (adapter->vf_data[vf].pf_vlan)
6378                 return -1;
6379
6380         /* VLAN 0 is a special case, don't allow it to be removed */
6381         if (!vid && !add)
6382                 return 0;
6383
6384         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
6385         if (!ret)
6386                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
6387         return ret;
6388 }
6389
6390 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6391 {
6392         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6393
6394         /* clear flags - except flag that indicates PF has set the MAC */
6395         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
6396         vf_data->last_nack = jiffies;
6397
6398         /* reset vlans for device */
6399         igb_clear_vf_vfta(adapter, vf);
6400         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
6401         igb_set_vmvir(adapter, vf_data->pf_vlan |
6402                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
6403         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
6404         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
6405
6406         /* reset multicast table array for vf */
6407         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6408
6409         /* Flush and reset the mta with the new values */
6410         igb_set_rx_mode(adapter->netdev);
6411 }
6412
6413 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6414 {
6415         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6416
6417         /* clear mac address as we were hotplug removed/added */
6418         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6419                 eth_zero_addr(vf_mac);
6420
6421         /* process remaining reset events */
6422         igb_vf_reset(adapter, vf);
6423 }
6424
6425 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6426 {
6427         struct e1000_hw *hw = &adapter->hw;
6428         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6429         u32 reg, msgbuf[3] = {};
6430         u8 *addr = (u8 *)(&msgbuf[1]);
6431
6432         /* process all the same items cleared in a function level reset */
6433         igb_vf_reset(adapter, vf);
6434
6435         /* set vf mac address */
6436         igb_set_vf_mac(adapter, vf, vf_mac);
6437
6438         /* enable transmit and receive for vf */
6439         reg = rd32(E1000_VFTE);
6440         wr32(E1000_VFTE, reg | BIT(vf));
6441         reg = rd32(E1000_VFRE);
6442         wr32(E1000_VFRE, reg | BIT(vf));
6443
6444         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6445
6446         /* reply to reset with ack and vf mac address */
6447         if (!is_zero_ether_addr(vf_mac)) {
6448                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6449                 memcpy(addr, vf_mac, ETH_ALEN);
6450         } else {
6451                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
6452         }
6453         igb_write_mbx(hw, msgbuf, 3, vf);
6454 }
6455
6456 static void igb_flush_mac_table(struct igb_adapter *adapter)
6457 {
6458         struct e1000_hw *hw = &adapter->hw;
6459         int i;
6460
6461         for (i = 0; i < hw->mac.rar_entry_count; i++) {
6462                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
6463                 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
6464                 adapter->mac_table[i].queue = 0;
6465                 igb_rar_set_index(adapter, i);
6466         }
6467 }
6468
6469 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
6470 {
6471         struct e1000_hw *hw = &adapter->hw;
6472         /* do not count rar entries reserved for VFs MAC addresses */
6473         int rar_entries = hw->mac.rar_entry_count -
6474                           adapter->vfs_allocated_count;
6475         int i, count = 0;
6476
6477         for (i = 0; i < rar_entries; i++) {
6478                 /* do not count default entries */
6479                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
6480                         continue;
6481
6482                 /* do not count "in use" entries for different queues */
6483                 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
6484                     (adapter->mac_table[i].queue != queue))
6485                         continue;
6486
6487                 count++;
6488         }
6489
6490         return count;
6491 }
6492
6493 /* Set default MAC address for the PF in the first RAR entry */
6494 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
6495 {
6496         struct igb_mac_addr *mac_table = &adapter->mac_table[0];
6497
6498         ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
6499         mac_table->queue = adapter->vfs_allocated_count;
6500         mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
6501
6502         igb_rar_set_index(adapter, 0);
6503 }
6504
6505 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
6506                               const u8 queue)
6507 {
6508         struct e1000_hw *hw = &adapter->hw;
6509         int rar_entries = hw->mac.rar_entry_count -
6510                           adapter->vfs_allocated_count;
6511         int i;
6512
6513         if (is_zero_ether_addr(addr))
6514                 return -EINVAL;
6515
6516         /* Search for the first empty entry in the MAC table.
6517          * Do not touch entries at the end of the table reserved for the VF MAC
6518          * addresses.
6519          */
6520         for (i = 0; i < rar_entries; i++) {
6521                 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
6522                         continue;
6523
6524                 ether_addr_copy(adapter->mac_table[i].addr, addr);
6525                 adapter->mac_table[i].queue = queue;
6526                 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE;
6527
6528                 igb_rar_set_index(adapter, i);
6529                 return i;
6530         }
6531
6532         return -ENOSPC;
6533 }
6534
6535 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
6536                               const u8 queue)
6537 {
6538         struct e1000_hw *hw = &adapter->hw;
6539         int rar_entries = hw->mac.rar_entry_count -
6540                           adapter->vfs_allocated_count;
6541         int i;
6542
6543         if (is_zero_ether_addr(addr))
6544                 return -EINVAL;
6545
6546         /* Search for matching entry in the MAC table based on given address
6547          * and queue. Do not touch entries at the end of the table reserved
6548          * for the VF MAC addresses.
6549          */
6550         for (i = 0; i < rar_entries; i++) {
6551                 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
6552                         continue;
6553                 if (adapter->mac_table[i].queue != queue)
6554                         continue;
6555                 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
6556                         continue;
6557
6558                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
6559                 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
6560                 adapter->mac_table[i].queue = 0;
6561
6562                 igb_rar_set_index(adapter, i);
6563                 return 0;
6564         }
6565
6566         return -ENOENT;
6567 }
6568
6569 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
6570 {
6571         struct igb_adapter *adapter = netdev_priv(netdev);
6572         int ret;
6573
6574         ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
6575
6576         return min_t(int, ret, 0);
6577 }
6578
6579 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
6580 {
6581         struct igb_adapter *adapter = netdev_priv(netdev);
6582
6583         igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
6584
6585         return 0;
6586 }
6587
6588 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
6589                                  const u32 info, const u8 *addr)
6590 {
6591         struct pci_dev *pdev = adapter->pdev;
6592         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6593         struct list_head *pos;
6594         struct vf_mac_filter *entry = NULL;
6595         int ret = 0;
6596
6597         switch (info) {
6598         case E1000_VF_MAC_FILTER_CLR:
6599                 /* remove all unicast MAC filters related to the current VF */
6600                 list_for_each(pos, &adapter->vf_macs.l) {
6601                         entry = list_entry(pos, struct vf_mac_filter, l);
6602                         if (entry->vf == vf) {
6603                                 entry->vf = -1;
6604                                 entry->free = true;
6605                                 igb_del_mac_filter(adapter, entry->vf_mac, vf);
6606                         }
6607                 }
6608                 break;
6609         case E1000_VF_MAC_FILTER_ADD:
6610                 if (vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) {
6611                         dev_warn(&pdev->dev,
6612                                  "VF %d requested MAC filter but is administratively denied\n",
6613                                  vf);
6614                         return -EINVAL;
6615                 }
6616
6617                 if (!is_valid_ether_addr(addr)) {
6618                         dev_warn(&pdev->dev,
6619                                  "VF %d attempted to set invalid MAC filter\n",
6620                                  vf);
6621                         return -EINVAL;
6622                 }
6623
6624                 /* try to find empty slot in the list */
6625                 list_for_each(pos, &adapter->vf_macs.l) {
6626                         entry = list_entry(pos, struct vf_mac_filter, l);
6627                         if (entry->free)
6628                                 break;
6629                 }
6630
6631                 if (entry && entry->free) {
6632                         entry->free = false;
6633                         entry->vf = vf;
6634                         ether_addr_copy(entry->vf_mac, addr);
6635
6636                         ret = igb_add_mac_filter(adapter, addr, vf);
6637                         ret = min_t(int, ret, 0);
6638                 } else {
6639                         ret = -ENOSPC;
6640                 }
6641
6642                 if (ret == -ENOSPC)
6643                         dev_warn(&pdev->dev,
6644                                  "VF %d has requested MAC filter but there is no space for it\n",
6645                                  vf);
6646                 break;
6647         default:
6648                 ret = -EINVAL;
6649                 break;
6650         }
6651
6652         return ret;
6653 }
6654
6655 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6656 {
6657         struct pci_dev *pdev = adapter->pdev;
6658         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6659         u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
6660
6661         /* The VF MAC Address is stored in a packed array of bytes
6662          * starting at the second 32 bit word of the msg array
6663          */
6664         unsigned char *addr = (unsigned char *)&msg[1];
6665         int ret = 0;
6666
6667         if (!info) {
6668                 if (vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) {
6669                         dev_warn(&pdev->dev,
6670                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6671                                  vf);
6672                         return -EINVAL;
6673                 }
6674
6675                 if (!is_valid_ether_addr(addr)) {
6676                         dev_warn(&pdev->dev,
6677                                  "VF %d attempted to set invalid MAC\n",
6678                                  vf);
6679                         return -EINVAL;
6680                 }
6681
6682                 ret = igb_set_vf_mac(adapter, vf, addr);
6683         } else {
6684                 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
6685         }
6686
6687         return ret;
6688 }
6689
6690 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6691 {
6692         struct e1000_hw *hw = &adapter->hw;
6693         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6694         u32 msg = E1000_VT_MSGTYPE_NACK;
6695
6696         /* if device isn't clear to send it shouldn't be reading either */
6697         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6698             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6699                 igb_write_mbx(hw, &msg, 1, vf);
6700                 vf_data->last_nack = jiffies;
6701         }
6702 }
6703
6704 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6705 {
6706         struct pci_dev *pdev = adapter->pdev;
6707         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6708         struct e1000_hw *hw = &adapter->hw;
6709         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6710         s32 retval;
6711
6712         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
6713
6714         if (retval) {
6715                 /* if receive failed revoke VF CTS stats and restart init */
6716                 dev_err(&pdev->dev, "Error receiving message from VF\n");
6717                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
6718                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6719                         goto unlock;
6720                 goto out;
6721         }
6722
6723         /* this is a message we already processed, do nothing */
6724         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6725                 goto unlock;
6726
6727         /* until the vf completes a reset it should not be
6728          * allowed to start any configuration.
6729          */
6730         if (msgbuf[0] == E1000_VF_RESET) {
6731                 /* unlocks mailbox */
6732                 igb_vf_reset_msg(adapter, vf);
6733                 return;
6734         }
6735
6736         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6737                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6738                         goto unlock;
6739                 retval = -1;
6740                 goto out;
6741         }
6742
6743         switch ((msgbuf[0] & 0xFFFF)) {
6744         case E1000_VF_SET_MAC_ADDR:
6745                 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6746                 break;
6747         case E1000_VF_SET_PROMISC:
6748                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6749                 break;
6750         case E1000_VF_SET_MULTICAST:
6751                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6752                 break;
6753         case E1000_VF_SET_LPE:
6754                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6755                 break;
6756         case E1000_VF_SET_VLAN:
6757                 retval = -1;
6758                 if (vf_data->pf_vlan)
6759                         dev_warn(&pdev->dev,
6760                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6761                                  vf);
6762                 else
6763                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
6764                 break;
6765         default:
6766                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6767                 retval = -1;
6768                 break;
6769         }
6770
6771         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6772 out:
6773         /* notify the VF of the results of what it sent us */
6774         if (retval)
6775                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6776         else
6777                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6778
6779         /* unlocks mailbox */
6780         igb_write_mbx(hw, msgbuf, 1, vf);
6781         return;
6782
6783 unlock:
6784         igb_unlock_mbx(hw, vf);
6785 }
6786
6787 static void igb_msg_task(struct igb_adapter *adapter)
6788 {
6789         struct e1000_hw *hw = &adapter->hw;
6790         unsigned long flags;
6791         u32 vf;
6792
6793         spin_lock_irqsave(&adapter->vfs_lock, flags);
6794         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6795                 /* process any reset requests */
6796                 if (!igb_check_for_rst(hw, vf))
6797                         igb_vf_reset_event(adapter, vf);
6798
6799                 /* process any messages pending */
6800                 if (!igb_check_for_msg(hw, vf))
6801                         igb_rcv_msg_from_vf(adapter, vf);
6802
6803                 /* process any acks */
6804                 if (!igb_check_for_ack(hw, vf))
6805                         igb_rcv_ack_from_vf(adapter, vf);
6806         }
6807         spin_unlock_irqrestore(&adapter->vfs_lock, flags);
6808 }
6809
6810 /**
6811  *  igb_set_uta - Set unicast filter table address
6812  *  @adapter: board private structure
6813  *  @set: boolean indicating if we are setting or clearing bits
6814  *
6815  *  The unicast table address is a register array of 32-bit registers.
6816  *  The table is meant to be used in a way similar to how the MTA is used
6817  *  however due to certain limitations in the hardware it is necessary to
6818  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6819  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6820  **/
6821 static void igb_set_uta(struct igb_adapter *adapter, bool set)
6822 {
6823         struct e1000_hw *hw = &adapter->hw;
6824         u32 uta = set ? ~0 : 0;
6825         int i;
6826
6827         /* we only need to do this if VMDq is enabled */
6828         if (!adapter->vfs_allocated_count)
6829                 return;
6830
6831         for (i = hw->mac.uta_reg_count; i--;)
6832                 array_wr32(E1000_UTA, i, uta);
6833 }
6834
6835 /**
6836  *  igb_intr_msi - Interrupt Handler
6837  *  @irq: interrupt number
6838  *  @data: pointer to a network interface device structure
6839  **/
6840 static irqreturn_t igb_intr_msi(int irq, void *data)
6841 {
6842         struct igb_adapter *adapter = data;
6843         struct igb_q_vector *q_vector = adapter->q_vector[0];
6844         struct e1000_hw *hw = &adapter->hw;
6845         /* read ICR disables interrupts using IAM */
6846         u32 icr = rd32(E1000_ICR);
6847
6848         igb_write_itr(q_vector);
6849
6850         if (icr & E1000_ICR_DRSTA)
6851                 schedule_work(&adapter->reset_task);
6852
6853         if (icr & E1000_ICR_DOUTSYNC) {
6854                 /* HW is reporting DMA is out of sync */
6855                 adapter->stats.doosync++;
6856         }
6857
6858         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6859                 hw->mac.get_link_status = 1;
6860                 if (!test_bit(__IGB_DOWN, &adapter->state))
6861                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6862         }
6863
6864         if (icr & E1000_ICR_TS)
6865                 igb_tsync_interrupt(adapter);
6866
6867         napi_schedule(&q_vector->napi);
6868
6869         return IRQ_HANDLED;
6870 }
6871
6872 /**
6873  *  igb_intr - Legacy Interrupt Handler
6874  *  @irq: interrupt number
6875  *  @data: pointer to a network interface device structure
6876  **/
6877 static irqreturn_t igb_intr(int irq, void *data)
6878 {
6879         struct igb_adapter *adapter = data;
6880         struct igb_q_vector *q_vector = adapter->q_vector[0];
6881         struct e1000_hw *hw = &adapter->hw;
6882         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6883          * need for the IMC write
6884          */
6885         u32 icr = rd32(E1000_ICR);
6886
6887         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6888          * not set, then the adapter didn't send an interrupt
6889          */
6890         if (!(icr & E1000_ICR_INT_ASSERTED))
6891                 return IRQ_NONE;
6892
6893         igb_write_itr(q_vector);
6894
6895         if (icr & E1000_ICR_DRSTA)
6896                 schedule_work(&adapter->reset_task);
6897
6898         if (icr & E1000_ICR_DOUTSYNC) {
6899                 /* HW is reporting DMA is out of sync */
6900                 adapter->stats.doosync++;
6901         }
6902
6903         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6904                 hw->mac.get_link_status = 1;
6905                 /* guard against interrupt when we're going down */
6906                 if (!test_bit(__IGB_DOWN, &adapter->state))
6907                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6908         }
6909
6910         if (icr & E1000_ICR_TS)
6911                 igb_tsync_interrupt(adapter);
6912
6913         napi_schedule(&q_vector->napi);
6914
6915         return IRQ_HANDLED;
6916 }
6917
6918 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6919 {
6920         struct igb_adapter *adapter = q_vector->adapter;
6921         struct e1000_hw *hw = &adapter->hw;
6922
6923         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6924             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6925                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6926                         igb_set_itr(q_vector);
6927                 else
6928                         igb_update_ring_itr(q_vector);
6929         }
6930
6931         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6932                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6933                         wr32(E1000_EIMS, q_vector->eims_value);
6934                 else
6935                         igb_irq_enable(adapter);
6936         }
6937 }
6938
6939 /**
6940  *  igb_poll - NAPI Rx polling callback
6941  *  @napi: napi polling structure
6942  *  @budget: count of how many packets we should handle
6943  **/
6944 static int igb_poll(struct napi_struct *napi, int budget)
6945 {
6946         struct igb_q_vector *q_vector = container_of(napi,
6947                                                      struct igb_q_vector,
6948                                                      napi);
6949         bool clean_complete = true;
6950         int work_done = 0;
6951
6952 #ifdef CONFIG_IGB_DCA
6953         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6954                 igb_update_dca(q_vector);
6955 #endif
6956         if (q_vector->tx.ring)
6957                 clean_complete = igb_clean_tx_irq(q_vector, budget);
6958
6959         if (q_vector->rx.ring) {
6960                 int cleaned = igb_clean_rx_irq(q_vector, budget);
6961
6962                 work_done += cleaned;
6963                 if (cleaned >= budget)
6964                         clean_complete = false;
6965         }
6966
6967         /* If all work not completed, return budget and keep polling */
6968         if (!clean_complete)
6969                 return budget;
6970
6971         /* If not enough Rx work done, exit the polling mode */
6972         napi_complete_done(napi, work_done);
6973         igb_ring_irq_enable(q_vector);
6974
6975         return 0;
6976 }
6977
6978 /**
6979  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6980  *  @q_vector: pointer to q_vector containing needed info
6981  *  @napi_budget: Used to determine if we are in netpoll
6982  *
6983  *  returns true if ring is completely cleaned
6984  **/
6985 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
6986 {
6987         struct igb_adapter *adapter = q_vector->adapter;
6988         struct igb_ring *tx_ring = q_vector->tx.ring;
6989         struct igb_tx_buffer *tx_buffer;
6990         union e1000_adv_tx_desc *tx_desc;
6991         unsigned int total_bytes = 0, total_packets = 0;
6992         unsigned int budget = q_vector->tx.work_limit;
6993         unsigned int i = tx_ring->next_to_clean;
6994
6995         if (test_bit(__IGB_DOWN, &adapter->state))
6996                 return true;
6997
6998         tx_buffer = &tx_ring->tx_buffer_info[i];
6999         tx_desc = IGB_TX_DESC(tx_ring, i);
7000         i -= tx_ring->count;
7001
7002         do {
7003                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
7004
7005                 /* if next_to_watch is not set then there is no work pending */
7006                 if (!eop_desc)
7007                         break;
7008
7009                 /* prevent any other reads prior to eop_desc */
7010                 smp_rmb();
7011
7012                 /* if DD is not set pending work has not been completed */
7013                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7014                         break;
7015
7016                 /* clear next_to_watch to prevent false hangs */
7017                 tx_buffer->next_to_watch = NULL;
7018
7019                 /* update the statistics for this packet */
7020                 total_bytes += tx_buffer->bytecount;
7021                 total_packets += tx_buffer->gso_segs;
7022
7023                 /* free the skb */
7024                 napi_consume_skb(tx_buffer->skb, napi_budget);
7025
7026                 /* unmap skb header data */
7027                 dma_unmap_single(tx_ring->dev,
7028                                  dma_unmap_addr(tx_buffer, dma),
7029                                  dma_unmap_len(tx_buffer, len),
7030                                  DMA_TO_DEVICE);
7031
7032                 /* clear tx_buffer data */
7033                 dma_unmap_len_set(tx_buffer, len, 0);
7034
7035                 /* clear last DMA location and unmap remaining buffers */
7036                 while (tx_desc != eop_desc) {
7037                         tx_buffer++;
7038                         tx_desc++;
7039                         i++;
7040                         if (unlikely(!i)) {
7041                                 i -= tx_ring->count;
7042                                 tx_buffer = tx_ring->tx_buffer_info;
7043                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7044                         }
7045
7046                         /* unmap any remaining paged data */
7047                         if (dma_unmap_len(tx_buffer, len)) {
7048                                 dma_unmap_page(tx_ring->dev,
7049                                                dma_unmap_addr(tx_buffer, dma),
7050                                                dma_unmap_len(tx_buffer, len),
7051                                                DMA_TO_DEVICE);
7052                                 dma_unmap_len_set(tx_buffer, len, 0);
7053                         }
7054                 }
7055
7056                 /* move us one more past the eop_desc for start of next pkt */
7057                 tx_buffer++;
7058                 tx_desc++;
7059                 i++;
7060                 if (unlikely(!i)) {
7061                         i -= tx_ring->count;
7062                         tx_buffer = tx_ring->tx_buffer_info;
7063                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7064                 }
7065
7066                 /* issue prefetch for next Tx descriptor */
7067                 prefetch(tx_desc);
7068
7069                 /* update budget accounting */
7070                 budget--;
7071         } while (likely(budget));
7072
7073         netdev_tx_completed_queue(txring_txq(tx_ring),
7074                                   total_packets, total_bytes);
7075         i += tx_ring->count;
7076         tx_ring->next_to_clean = i;
7077         u64_stats_update_begin(&tx_ring->tx_syncp);
7078         tx_ring->tx_stats.bytes += total_bytes;
7079         tx_ring->tx_stats.packets += total_packets;
7080         u64_stats_update_end(&tx_ring->tx_syncp);
7081         q_vector->tx.total_bytes += total_bytes;
7082         q_vector->tx.total_packets += total_packets;
7083
7084         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7085                 struct e1000_hw *hw = &adapter->hw;
7086
7087                 /* Detect a transmit hang in hardware, this serializes the
7088                  * check with the clearing of time_stamp and movement of i
7089                  */
7090                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7091                 if (tx_buffer->next_to_watch &&
7092                     time_after(jiffies, tx_buffer->time_stamp +
7093                                (adapter->tx_timeout_factor * HZ)) &&
7094                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
7095
7096                         /* detected Tx unit hang */
7097                         dev_err(tx_ring->dev,
7098                                 "Detected Tx Unit Hang\n"
7099                                 "  Tx Queue             <%d>\n"
7100                                 "  TDH                  <%x>\n"
7101                                 "  TDT                  <%x>\n"
7102                                 "  next_to_use          <%x>\n"
7103                                 "  next_to_clean        <%x>\n"
7104                                 "buffer_info[next_to_clean]\n"
7105                                 "  time_stamp           <%lx>\n"
7106                                 "  next_to_watch        <%p>\n"
7107                                 "  jiffies              <%lx>\n"
7108                                 "  desc.status          <%x>\n",
7109                                 tx_ring->queue_index,
7110                                 rd32(E1000_TDH(tx_ring->reg_idx)),
7111                                 readl(tx_ring->tail),
7112                                 tx_ring->next_to_use,
7113                                 tx_ring->next_to_clean,
7114                                 tx_buffer->time_stamp,
7115                                 tx_buffer->next_to_watch,
7116                                 jiffies,
7117                                 tx_buffer->next_to_watch->wb.status);
7118                         netif_stop_subqueue(tx_ring->netdev,
7119                                             tx_ring->queue_index);
7120
7121                         /* we are about to reset, no point in enabling stuff */
7122                         return true;
7123                 }
7124         }
7125
7126 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7127         if (unlikely(total_packets &&
7128             netif_carrier_ok(tx_ring->netdev) &&
7129             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7130                 /* Make sure that anybody stopping the queue after this
7131                  * sees the new next_to_clean.
7132                  */
7133                 smp_mb();
7134                 if (__netif_subqueue_stopped(tx_ring->netdev,
7135                                              tx_ring->queue_index) &&
7136                     !(test_bit(__IGB_DOWN, &adapter->state))) {
7137                         netif_wake_subqueue(tx_ring->netdev,
7138                                             tx_ring->queue_index);
7139
7140                         u64_stats_update_begin(&tx_ring->tx_syncp);
7141                         tx_ring->tx_stats.restart_queue++;
7142                         u64_stats_update_end(&tx_ring->tx_syncp);
7143                 }
7144         }
7145
7146         return !!budget;
7147 }
7148
7149 /**
7150  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
7151  *  @rx_ring: rx descriptor ring to store buffers on
7152  *  @old_buff: donor buffer to have page reused
7153  *
7154  *  Synchronizes page for reuse by the adapter
7155  **/
7156 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7157                               struct igb_rx_buffer *old_buff)
7158 {
7159         struct igb_rx_buffer *new_buff;
7160         u16 nta = rx_ring->next_to_alloc;
7161
7162         new_buff = &rx_ring->rx_buffer_info[nta];
7163
7164         /* update, and store next to alloc */
7165         nta++;
7166         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7167
7168         /* Transfer page from old buffer to new buffer.
7169          * Move each member individually to avoid possible store
7170          * forwarding stalls.
7171          */
7172         new_buff->dma           = old_buff->dma;
7173         new_buff->page          = old_buff->page;
7174         new_buff->page_offset   = old_buff->page_offset;
7175         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
7176 }
7177
7178 static inline bool igb_page_is_reserved(struct page *page)
7179 {
7180         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
7181 }
7182
7183 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer)
7184 {
7185         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
7186         struct page *page = rx_buffer->page;
7187
7188         /* avoid re-using remote pages */
7189         if (unlikely(igb_page_is_reserved(page)))
7190                 return false;
7191
7192 #if (PAGE_SIZE < 8192)
7193         /* if we are only owner of page we can reuse it */
7194         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
7195                 return false;
7196 #else
7197 #define IGB_LAST_OFFSET \
7198         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
7199
7200         if (rx_buffer->page_offset > IGB_LAST_OFFSET)
7201                 return false;
7202 #endif
7203
7204         /* If we have drained the page fragment pool we need to update
7205          * the pagecnt_bias and page count so that we fully restock the
7206          * number of references the driver holds.
7207          */
7208         if (unlikely(!pagecnt_bias)) {
7209                 page_ref_add(page, USHRT_MAX);
7210                 rx_buffer->pagecnt_bias = USHRT_MAX;
7211         }
7212
7213         return true;
7214 }
7215
7216 /**
7217  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7218  *  @rx_ring: rx descriptor ring to transact packets on
7219  *  @rx_buffer: buffer containing page to add
7220  *  @skb: sk_buff to place the data into
7221  *  @size: size of buffer to be added
7222  *
7223  *  This function will add the data contained in rx_buffer->page to the skb.
7224  **/
7225 static void igb_add_rx_frag(struct igb_ring *rx_ring,
7226                             struct igb_rx_buffer *rx_buffer,
7227                             struct sk_buff *skb,
7228                             unsigned int size)
7229 {
7230 #if (PAGE_SIZE < 8192)
7231         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
7232 #else
7233         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
7234                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
7235                                 SKB_DATA_ALIGN(size);
7236 #endif
7237         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
7238                         rx_buffer->page_offset, size, truesize);
7239 #if (PAGE_SIZE < 8192)
7240         rx_buffer->page_offset ^= truesize;
7241 #else
7242         rx_buffer->page_offset += truesize;
7243 #endif
7244 }
7245
7246 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
7247                                          struct igb_rx_buffer *rx_buffer,
7248                                          union e1000_adv_rx_desc *rx_desc,
7249                                          unsigned int size)
7250 {
7251         void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
7252 #if (PAGE_SIZE < 8192)
7253         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
7254 #else
7255         unsigned int truesize = SKB_DATA_ALIGN(size);
7256 #endif
7257         unsigned int headlen;
7258         struct sk_buff *skb;
7259
7260         /* prefetch first cache line of first page */
7261         prefetch(va);
7262 #if L1_CACHE_BYTES < 128
7263         prefetch(va + L1_CACHE_BYTES);
7264 #endif
7265
7266         /* allocate a skb to store the frags */
7267         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
7268         if (unlikely(!skb))
7269                 return NULL;
7270
7271         if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
7272                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7273                 va += IGB_TS_HDR_LEN;
7274                 size -= IGB_TS_HDR_LEN;
7275         }
7276
7277         /* Determine available headroom for copy */
7278         headlen = size;
7279         if (headlen > IGB_RX_HDR_LEN)
7280                 headlen = eth_get_headlen(va, IGB_RX_HDR_LEN);
7281
7282         /* align pull length to size of long to optimize memcpy performance */
7283         memcpy(__skb_put(skb, headlen), va, ALIGN(headlen, sizeof(long)));
7284
7285         /* update all of the pointers */
7286         size -= headlen;
7287         if (size) {
7288                 skb_add_rx_frag(skb, 0, rx_buffer->page,
7289                                 (va + headlen) - page_address(rx_buffer->page),
7290                                 size, truesize);
7291 #if (PAGE_SIZE < 8192)
7292                 rx_buffer->page_offset ^= truesize;
7293 #else
7294                 rx_buffer->page_offset += truesize;
7295 #endif
7296         } else {
7297                 rx_buffer->pagecnt_bias++;
7298         }
7299
7300         return skb;
7301 }
7302
7303 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
7304                                      struct igb_rx_buffer *rx_buffer,
7305                                      union e1000_adv_rx_desc *rx_desc,
7306                                      unsigned int size)
7307 {
7308         void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
7309 #if (PAGE_SIZE < 8192)
7310         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
7311 #else
7312         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
7313                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size);
7314 #endif
7315         struct sk_buff *skb;
7316
7317         /* prefetch first cache line of first page */
7318         prefetch(va);
7319 #if L1_CACHE_BYTES < 128
7320         prefetch(va + L1_CACHE_BYTES);
7321 #endif
7322
7323         /* build an skb around the page buffer */
7324         skb = build_skb(va - IGB_SKB_PAD, truesize);
7325         if (unlikely(!skb))
7326                 return NULL;
7327
7328         /* update pointers within the skb to store the data */
7329         skb_reserve(skb, IGB_SKB_PAD);
7330         __skb_put(skb, size);
7331
7332         /* pull timestamp out of packet data */
7333         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7334                 igb_ptp_rx_pktstamp(rx_ring->q_vector, skb->data, skb);
7335                 __skb_pull(skb, IGB_TS_HDR_LEN);
7336         }
7337
7338         /* update buffer offset */
7339 #if (PAGE_SIZE < 8192)
7340         rx_buffer->page_offset ^= truesize;
7341 #else
7342         rx_buffer->page_offset += truesize;
7343 #endif
7344
7345         return skb;
7346 }
7347
7348 static inline void igb_rx_checksum(struct igb_ring *ring,
7349                                    union e1000_adv_rx_desc *rx_desc,
7350                                    struct sk_buff *skb)
7351 {
7352         skb_checksum_none_assert(skb);
7353
7354         /* Ignore Checksum bit is set */
7355         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7356                 return;
7357
7358         /* Rx checksum disabled via ethtool */
7359         if (!(ring->netdev->features & NETIF_F_RXCSUM))
7360                 return;
7361
7362         /* TCP/UDP checksum error bit is set */
7363         if (igb_test_staterr(rx_desc,
7364                              E1000_RXDEXT_STATERR_TCPE |
7365                              E1000_RXDEXT_STATERR_IPE)) {
7366                 /* work around errata with sctp packets where the TCPE aka
7367                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7368                  * packets, (aka let the stack check the crc32c)
7369                  */
7370                 if (!((skb->len == 60) &&
7371                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
7372                         u64_stats_update_begin(&ring->rx_syncp);
7373                         ring->rx_stats.csum_err++;
7374                         u64_stats_update_end(&ring->rx_syncp);
7375                 }
7376                 /* let the stack verify checksum errors */
7377                 return;
7378         }
7379         /* It must be a TCP or UDP packet with a valid checksum */
7380         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7381                                       E1000_RXD_STAT_UDPCS))
7382                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7383
7384         dev_dbg(ring->dev, "cksum success: bits %08X\n",
7385                 le32_to_cpu(rx_desc->wb.upper.status_error));
7386 }
7387
7388 static inline void igb_rx_hash(struct igb_ring *ring,
7389                                union e1000_adv_rx_desc *rx_desc,
7390                                struct sk_buff *skb)
7391 {
7392         if (ring->netdev->features & NETIF_F_RXHASH)
7393                 skb_set_hash(skb,
7394                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7395                              PKT_HASH_TYPE_L3);
7396 }
7397
7398 /**
7399  *  igb_is_non_eop - process handling of non-EOP buffers
7400  *  @rx_ring: Rx ring being processed
7401  *  @rx_desc: Rx descriptor for current buffer
7402  *  @skb: current socket buffer containing buffer in progress
7403  *
7404  *  This function updates next to clean.  If the buffer is an EOP buffer
7405  *  this function exits returning false, otherwise it will place the
7406  *  sk_buff in the next buffer to be chained and return true indicating
7407  *  that this is in fact a non-EOP buffer.
7408  **/
7409 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7410                            union e1000_adv_rx_desc *rx_desc)
7411 {
7412         u32 ntc = rx_ring->next_to_clean + 1;
7413
7414         /* fetch, update, and store next to clean */
7415         ntc = (ntc < rx_ring->count) ? ntc : 0;
7416         rx_ring->next_to_clean = ntc;
7417
7418         prefetch(IGB_RX_DESC(rx_ring, ntc));
7419
7420         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7421                 return false;
7422
7423         return true;
7424 }
7425
7426 /**
7427  *  igb_cleanup_headers - Correct corrupted or empty headers
7428  *  @rx_ring: rx descriptor ring packet is being transacted on
7429  *  @rx_desc: pointer to the EOP Rx descriptor
7430  *  @skb: pointer to current skb being fixed
7431  *
7432  *  Address the case where we are pulling data in on pages only
7433  *  and as such no data is present in the skb header.
7434  *
7435  *  In addition if skb is not at least 60 bytes we need to pad it so that
7436  *  it is large enough to qualify as a valid Ethernet frame.
7437  *
7438  *  Returns true if an error was encountered and skb was freed.
7439  **/
7440 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
7441                                 union e1000_adv_rx_desc *rx_desc,
7442                                 struct sk_buff *skb)
7443 {
7444         if (unlikely((igb_test_staterr(rx_desc,
7445                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
7446                 struct net_device *netdev = rx_ring->netdev;
7447                 if (!(netdev->features & NETIF_F_RXALL)) {
7448                         dev_kfree_skb_any(skb);
7449                         return true;
7450                 }
7451         }
7452
7453         /* if eth_skb_pad returns an error the skb was freed */
7454         if (eth_skb_pad(skb))
7455                 return true;
7456
7457         return false;
7458 }
7459
7460 /**
7461  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
7462  *  @rx_ring: rx descriptor ring packet is being transacted on
7463  *  @rx_desc: pointer to the EOP Rx descriptor
7464  *  @skb: pointer to current skb being populated
7465  *
7466  *  This function checks the ring, descriptor, and packet information in
7467  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
7468  *  other fields within the skb.
7469  **/
7470 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7471                                    union e1000_adv_rx_desc *rx_desc,
7472                                    struct sk_buff *skb)
7473 {
7474         struct net_device *dev = rx_ring->netdev;
7475
7476         igb_rx_hash(rx_ring, rx_desc, skb);
7477
7478         igb_rx_checksum(rx_ring, rx_desc, skb);
7479
7480         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
7481             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
7482                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
7483
7484         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7485             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7486                 u16 vid;
7487
7488                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7489                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7490                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7491                 else
7492                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7493
7494                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7495         }
7496
7497         skb_record_rx_queue(skb, rx_ring->queue_index);
7498
7499         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
7500 }
7501
7502 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
7503                                                const unsigned int size)
7504 {
7505         struct igb_rx_buffer *rx_buffer;
7506
7507         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7508         prefetchw(rx_buffer->page);
7509
7510         /* we are reusing so sync this buffer for CPU use */
7511         dma_sync_single_range_for_cpu(rx_ring->dev,
7512                                       rx_buffer->dma,
7513                                       rx_buffer->page_offset,
7514                                       size,
7515                                       DMA_FROM_DEVICE);
7516
7517         rx_buffer->pagecnt_bias--;
7518
7519         return rx_buffer;
7520 }
7521
7522 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
7523                               struct igb_rx_buffer *rx_buffer)
7524 {
7525         if (igb_can_reuse_rx_page(rx_buffer)) {
7526                 /* hand second half of page back to the ring */
7527                 igb_reuse_rx_page(rx_ring, rx_buffer);
7528         } else {
7529                 /* We are not reusing the buffer so unmap it and free
7530                  * any references we are holding to it
7531                  */
7532                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
7533                                      igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
7534                                      IGB_RX_DMA_ATTR);
7535                 __page_frag_cache_drain(rx_buffer->page,
7536                                         rx_buffer->pagecnt_bias);
7537         }
7538
7539         /* clear contents of rx_buffer */
7540         rx_buffer->page = NULL;
7541 }
7542
7543 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
7544 {
7545         struct igb_ring *rx_ring = q_vector->rx.ring;
7546         struct sk_buff *skb = rx_ring->skb;
7547         unsigned int total_bytes = 0, total_packets = 0;
7548         u16 cleaned_count = igb_desc_unused(rx_ring);
7549
7550         while (likely(total_packets < budget)) {
7551                 union e1000_adv_rx_desc *rx_desc;
7552                 struct igb_rx_buffer *rx_buffer;
7553                 unsigned int size;
7554
7555                 /* return some buffers to hardware, one at a time is too slow */
7556                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7557                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7558                         cleaned_count = 0;
7559                 }
7560
7561                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
7562                 size = le16_to_cpu(rx_desc->wb.upper.length);
7563                 if (!size)
7564                         break;
7565
7566                 /* This memory barrier is needed to keep us from reading
7567                  * any other fields out of the rx_desc until we know the
7568                  * descriptor has been written back
7569                  */
7570                 dma_rmb();
7571
7572                 rx_buffer = igb_get_rx_buffer(rx_ring, size);
7573
7574                 /* retrieve a buffer from the ring */
7575                 if (skb)
7576                         igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
7577                 else if (ring_uses_build_skb(rx_ring))
7578                         skb = igb_build_skb(rx_ring, rx_buffer, rx_desc, size);
7579                 else
7580                         skb = igb_construct_skb(rx_ring, rx_buffer,
7581                                                 rx_desc, size);
7582
7583                 /* exit if we failed to retrieve a buffer */
7584                 if (!skb) {
7585                         rx_ring->rx_stats.alloc_failed++;
7586                         rx_buffer->pagecnt_bias++;
7587                         break;
7588                 }
7589
7590                 igb_put_rx_buffer(rx_ring, rx_buffer);
7591                 cleaned_count++;
7592
7593                 /* fetch next buffer in frame if non-eop */
7594                 if (igb_is_non_eop(rx_ring, rx_desc))
7595                         continue;
7596
7597                 /* verify the packet layout is correct */
7598                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
7599                         skb = NULL;
7600                         continue;
7601                 }
7602
7603                 /* probably a little skewed due to removing CRC */
7604                 total_bytes += skb->len;
7605
7606                 /* populate checksum, timestamp, VLAN, and protocol */
7607                 igb_process_skb_fields(rx_ring, rx_desc, skb);
7608
7609                 napi_gro_receive(&q_vector->napi, skb);
7610
7611                 /* reset skb pointer */
7612                 skb = NULL;
7613
7614                 /* update budget accounting */
7615                 total_packets++;
7616         }
7617
7618         /* place incomplete frames back on ring for completion */
7619         rx_ring->skb = skb;
7620
7621         u64_stats_update_begin(&rx_ring->rx_syncp);
7622         rx_ring->rx_stats.packets += total_packets;
7623         rx_ring->rx_stats.bytes += total_bytes;
7624         u64_stats_update_end(&rx_ring->rx_syncp);
7625         q_vector->rx.total_packets += total_packets;
7626         q_vector->rx.total_bytes += total_bytes;
7627
7628         if (cleaned_count)
7629                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7630
7631         return total_packets;
7632 }
7633
7634 static inline unsigned int igb_rx_offset(struct igb_ring *rx_ring)
7635 {
7636         return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
7637 }
7638
7639 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
7640                                   struct igb_rx_buffer *bi)
7641 {
7642         struct page *page = bi->page;
7643         dma_addr_t dma;
7644
7645         /* since we are recycling buffers we should seldom need to alloc */
7646         if (likely(page))
7647                 return true;
7648
7649         /* alloc new page for storage */
7650         page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
7651         if (unlikely(!page)) {
7652                 rx_ring->rx_stats.alloc_failed++;
7653                 return false;
7654         }
7655
7656         /* map page for use */
7657         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
7658                                  igb_rx_pg_size(rx_ring),
7659                                  DMA_FROM_DEVICE,
7660                                  IGB_RX_DMA_ATTR);
7661
7662         /* if mapping failed free memory back to system since
7663          * there isn't much point in holding memory we can't use
7664          */
7665         if (dma_mapping_error(rx_ring->dev, dma)) {
7666                 __free_pages(page, igb_rx_pg_order(rx_ring));
7667
7668                 rx_ring->rx_stats.alloc_failed++;
7669                 return false;
7670         }
7671
7672         bi->dma = dma;
7673         bi->page = page;
7674         bi->page_offset = igb_rx_offset(rx_ring);
7675         bi->pagecnt_bias = 1;
7676
7677         return true;
7678 }
7679
7680 /**
7681  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7682  *  @adapter: address of board private structure
7683  **/
7684 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7685 {
7686         union e1000_adv_rx_desc *rx_desc;
7687         struct igb_rx_buffer *bi;
7688         u16 i = rx_ring->next_to_use;
7689         u16 bufsz;
7690
7691         /* nothing to do */
7692         if (!cleaned_count)
7693                 return;
7694
7695         rx_desc = IGB_RX_DESC(rx_ring, i);
7696         bi = &rx_ring->rx_buffer_info[i];
7697         i -= rx_ring->count;
7698
7699         bufsz = igb_rx_bufsz(rx_ring);
7700
7701         do {
7702                 if (!igb_alloc_mapped_page(rx_ring, bi))
7703                         break;
7704
7705                 /* sync the buffer for use by the device */
7706                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
7707                                                  bi->page_offset, bufsz,
7708                                                  DMA_FROM_DEVICE);
7709
7710                 /* Refresh the desc even if buffer_addrs didn't change
7711                  * because each write-back erases this info.
7712                  */
7713                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7714
7715                 rx_desc++;
7716                 bi++;
7717                 i++;
7718                 if (unlikely(!i)) {
7719                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7720                         bi = rx_ring->rx_buffer_info;
7721                         i -= rx_ring->count;
7722                 }
7723
7724                 /* clear the length for the next_to_use descriptor */
7725                 rx_desc->wb.upper.length = 0;
7726
7727                 cleaned_count--;
7728         } while (cleaned_count);
7729
7730         i += rx_ring->count;
7731
7732         if (rx_ring->next_to_use != i) {
7733                 /* record the next descriptor to use */
7734                 rx_ring->next_to_use = i;
7735
7736                 /* update next to alloc since we have filled the ring */
7737                 rx_ring->next_to_alloc = i;
7738
7739                 /* Force memory writes to complete before letting h/w
7740                  * know there are new descriptors to fetch.  (Only
7741                  * applicable for weak-ordered memory model archs,
7742                  * such as IA-64).
7743                  */
7744                 wmb();
7745                 writel(i, rx_ring->tail);
7746         }
7747 }
7748
7749 /**
7750  * igb_mii_ioctl -
7751  * @netdev:
7752  * @ifreq:
7753  * @cmd:
7754  **/
7755 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7756 {
7757         struct igb_adapter *adapter = netdev_priv(netdev);
7758         struct mii_ioctl_data *data = if_mii(ifr);
7759
7760         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7761                 return -EOPNOTSUPP;
7762
7763         switch (cmd) {
7764         case SIOCGMIIPHY:
7765                 data->phy_id = adapter->hw.phy.addr;
7766                 break;
7767         case SIOCGMIIREG:
7768                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7769                                      &data->val_out))
7770                         return -EIO;
7771                 break;
7772         case SIOCSMIIREG:
7773         default:
7774                 return -EOPNOTSUPP;
7775         }
7776         return 0;
7777 }
7778
7779 /**
7780  * igb_ioctl -
7781  * @netdev:
7782  * @ifreq:
7783  * @cmd:
7784  **/
7785 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7786 {
7787         switch (cmd) {
7788         case SIOCGMIIPHY:
7789         case SIOCGMIIREG:
7790         case SIOCSMIIREG:
7791                 return igb_mii_ioctl(netdev, ifr, cmd);
7792         case SIOCGHWTSTAMP:
7793                 return igb_ptp_get_ts_config(netdev, ifr);
7794         case SIOCSHWTSTAMP:
7795                 return igb_ptp_set_ts_config(netdev, ifr);
7796         default:
7797                 return -EOPNOTSUPP;
7798         }
7799 }
7800
7801 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7802 {
7803         struct igb_adapter *adapter = hw->back;
7804
7805         pci_read_config_word(adapter->pdev, reg, value);
7806 }
7807
7808 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7809 {
7810         struct igb_adapter *adapter = hw->back;
7811
7812         pci_write_config_word(adapter->pdev, reg, *value);
7813 }
7814
7815 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7816 {
7817         struct igb_adapter *adapter = hw->back;
7818
7819         if (pcie_capability_read_word(adapter->pdev, reg, value))
7820                 return -E1000_ERR_CONFIG;
7821
7822         return 0;
7823 }
7824
7825 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7826 {
7827         struct igb_adapter *adapter = hw->back;
7828
7829         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7830                 return -E1000_ERR_CONFIG;
7831
7832         return 0;
7833 }
7834
7835 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7836 {
7837         struct igb_adapter *adapter = netdev_priv(netdev);
7838         struct e1000_hw *hw = &adapter->hw;
7839         u32 ctrl, rctl;
7840         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7841
7842         if (enable) {
7843                 /* enable VLAN tag insert/strip */
7844                 ctrl = rd32(E1000_CTRL);
7845                 ctrl |= E1000_CTRL_VME;
7846                 wr32(E1000_CTRL, ctrl);
7847
7848                 /* Disable CFI check */
7849                 rctl = rd32(E1000_RCTL);
7850                 rctl &= ~E1000_RCTL_CFIEN;
7851                 wr32(E1000_RCTL, rctl);
7852         } else {
7853                 /* disable VLAN tag insert/strip */
7854                 ctrl = rd32(E1000_CTRL);
7855                 ctrl &= ~E1000_CTRL_VME;
7856                 wr32(E1000_CTRL, ctrl);
7857         }
7858
7859         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
7860 }
7861
7862 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7863                                __be16 proto, u16 vid)
7864 {
7865         struct igb_adapter *adapter = netdev_priv(netdev);
7866         struct e1000_hw *hw = &adapter->hw;
7867         int pf_id = adapter->vfs_allocated_count;
7868
7869         /* add the filter since PF can receive vlans w/o entry in vlvf */
7870         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7871                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
7872
7873         set_bit(vid, adapter->active_vlans);
7874
7875         return 0;
7876 }
7877
7878 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7879                                 __be16 proto, u16 vid)
7880 {
7881         struct igb_adapter *adapter = netdev_priv(netdev);
7882         int pf_id = adapter->vfs_allocated_count;
7883         struct e1000_hw *hw = &adapter->hw;
7884
7885         /* remove VID from filter table */
7886         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7887                 igb_vfta_set(hw, vid, pf_id, false, true);
7888
7889         clear_bit(vid, adapter->active_vlans);
7890
7891         return 0;
7892 }
7893
7894 static void igb_restore_vlan(struct igb_adapter *adapter)
7895 {
7896         u16 vid = 1;
7897
7898         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7899         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
7900
7901         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
7902                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7903 }
7904
7905 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7906 {
7907         struct pci_dev *pdev = adapter->pdev;
7908         struct e1000_mac_info *mac = &adapter->hw.mac;
7909
7910         mac->autoneg = 0;
7911
7912         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7913          * for the switch() below to work
7914          */
7915         if ((spd & 1) || (dplx & ~1))
7916                 goto err_inval;
7917
7918         /* Fiber NIC's only allow 1000 gbps Full duplex
7919          * and 100Mbps Full duplex for 100baseFx sfp
7920          */
7921         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7922                 switch (spd + dplx) {
7923                 case SPEED_10 + DUPLEX_HALF:
7924                 case SPEED_10 + DUPLEX_FULL:
7925                 case SPEED_100 + DUPLEX_HALF:
7926                         goto err_inval;
7927                 default:
7928                         break;
7929                 }
7930         }
7931
7932         switch (spd + dplx) {
7933         case SPEED_10 + DUPLEX_HALF:
7934                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7935                 break;
7936         case SPEED_10 + DUPLEX_FULL:
7937                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7938                 break;
7939         case SPEED_100 + DUPLEX_HALF:
7940                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7941                 break;
7942         case SPEED_100 + DUPLEX_FULL:
7943                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7944                 break;
7945         case SPEED_1000 + DUPLEX_FULL:
7946                 mac->autoneg = 1;
7947                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7948                 break;
7949         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7950         default:
7951                 goto err_inval;
7952         }
7953
7954         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7955         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7956
7957         return 0;
7958
7959 err_inval:
7960         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7961         return -EINVAL;
7962 }
7963
7964 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7965                           bool runtime)
7966 {
7967         struct net_device *netdev = pci_get_drvdata(pdev);
7968         struct igb_adapter *adapter = netdev_priv(netdev);
7969         struct e1000_hw *hw = &adapter->hw;
7970         u32 ctrl, rctl, status;
7971         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7972         bool wake;
7973
7974         rtnl_lock();
7975         netif_device_detach(netdev);
7976
7977         if (netif_running(netdev))
7978                 __igb_close(netdev, true);
7979
7980         igb_ptp_suspend(adapter);
7981
7982         igb_clear_interrupt_scheme(adapter);
7983         rtnl_unlock();
7984
7985         status = rd32(E1000_STATUS);
7986         if (status & E1000_STATUS_LU)
7987                 wufc &= ~E1000_WUFC_LNKC;
7988
7989         if (wufc) {
7990                 igb_setup_rctl(adapter);
7991                 igb_set_rx_mode(netdev);
7992
7993                 /* turn on all-multi mode if wake on multicast is enabled */
7994                 if (wufc & E1000_WUFC_MC) {
7995                         rctl = rd32(E1000_RCTL);
7996                         rctl |= E1000_RCTL_MPE;
7997                         wr32(E1000_RCTL, rctl);
7998                 }
7999
8000                 ctrl = rd32(E1000_CTRL);
8001                 ctrl |= E1000_CTRL_ADVD3WUC;
8002                 wr32(E1000_CTRL, ctrl);
8003
8004                 /* Allow time for pending master requests to run */
8005                 igb_disable_pcie_master(hw);
8006
8007                 wr32(E1000_WUC, E1000_WUC_PME_EN);
8008                 wr32(E1000_WUFC, wufc);
8009         } else {
8010                 wr32(E1000_WUC, 0);
8011                 wr32(E1000_WUFC, 0);
8012         }
8013
8014         wake = wufc || adapter->en_mng_pt;
8015         if (!wake)
8016                 igb_power_down_link(adapter);
8017         else
8018                 igb_power_up_link(adapter);
8019
8020         if (enable_wake)
8021                 *enable_wake = wake;
8022
8023         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8024          * would have already happened in close and is redundant.
8025          */
8026         igb_release_hw_control(adapter);
8027
8028         pci_disable_device(pdev);
8029
8030         return 0;
8031 }
8032
8033 static void igb_deliver_wake_packet(struct net_device *netdev)
8034 {
8035         struct igb_adapter *adapter = netdev_priv(netdev);
8036         struct e1000_hw *hw = &adapter->hw;
8037         struct sk_buff *skb;
8038         u32 wupl;
8039
8040         wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
8041
8042         /* WUPM stores only the first 128 bytes of the wake packet.
8043          * Read the packet only if we have the whole thing.
8044          */
8045         if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
8046                 return;
8047
8048         skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
8049         if (!skb)
8050                 return;
8051
8052         skb_put(skb, wupl);
8053
8054         /* Ensure reads are 32-bit aligned */
8055         wupl = roundup(wupl, 4);
8056
8057         memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
8058
8059         skb->protocol = eth_type_trans(skb, netdev);
8060         netif_rx(skb);
8061 }
8062
8063 static int __maybe_unused igb_suspend(struct device *dev)
8064 {
8065         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
8066 }
8067
8068 static int __maybe_unused igb_resume(struct device *dev)
8069 {
8070         struct pci_dev *pdev = to_pci_dev(dev);
8071         struct net_device *netdev = pci_get_drvdata(pdev);
8072         struct igb_adapter *adapter = netdev_priv(netdev);
8073         struct e1000_hw *hw = &adapter->hw;
8074         u32 err, val;
8075
8076         pci_set_power_state(pdev, PCI_D0);
8077         pci_restore_state(pdev);
8078         pci_save_state(pdev);
8079
8080         if (!pci_device_is_present(pdev))
8081                 return -ENODEV;
8082         err = pci_enable_device_mem(pdev);
8083         if (err) {
8084                 dev_err(&pdev->dev,
8085                         "igb: Cannot enable PCI device from suspend\n");
8086                 return err;
8087         }
8088         pci_set_master(pdev);
8089
8090         pci_enable_wake(pdev, PCI_D3hot, 0);
8091         pci_enable_wake(pdev, PCI_D3cold, 0);
8092
8093         if (igb_init_interrupt_scheme(adapter, true)) {
8094                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8095                 return -ENOMEM;
8096         }
8097
8098         igb_reset(adapter);
8099
8100         /* let the f/w know that the h/w is now under the control of the
8101          * driver.
8102          */
8103         igb_get_hw_control(adapter);
8104
8105         val = rd32(E1000_WUS);
8106         if (val & WAKE_PKT_WUS)
8107                 igb_deliver_wake_packet(netdev);
8108
8109         wr32(E1000_WUS, ~0);
8110
8111         rtnl_lock();
8112         if (!err && netif_running(netdev))
8113                 err = __igb_open(netdev, true);
8114
8115         if (!err)
8116                 netif_device_attach(netdev);
8117         rtnl_unlock();
8118
8119         return err;
8120 }
8121
8122 static int __maybe_unused igb_runtime_idle(struct device *dev)
8123 {
8124         struct pci_dev *pdev = to_pci_dev(dev);
8125         struct net_device *netdev = pci_get_drvdata(pdev);
8126         struct igb_adapter *adapter = netdev_priv(netdev);
8127
8128         if (!igb_has_link(adapter))
8129                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
8130
8131         return -EBUSY;
8132 }
8133
8134 static int __maybe_unused igb_runtime_suspend(struct device *dev)
8135 {
8136         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
8137 }
8138
8139 static int __maybe_unused igb_runtime_resume(struct device *dev)
8140 {
8141         return igb_resume(dev);
8142 }
8143
8144 static void igb_shutdown(struct pci_dev *pdev)
8145 {
8146         bool wake;
8147
8148         __igb_shutdown(pdev, &wake, 0);
8149
8150         if (system_state == SYSTEM_POWER_OFF) {
8151                 pci_wake_from_d3(pdev, wake);
8152                 pci_set_power_state(pdev, PCI_D3hot);
8153         }
8154 }
8155
8156 #ifdef CONFIG_PCI_IOV
8157 static int igb_sriov_reinit(struct pci_dev *dev)
8158 {
8159         struct net_device *netdev = pci_get_drvdata(dev);
8160         struct igb_adapter *adapter = netdev_priv(netdev);
8161         struct pci_dev *pdev = adapter->pdev;
8162
8163         rtnl_lock();
8164
8165         if (netif_running(netdev))
8166                 igb_close(netdev);
8167         else
8168                 igb_reset(adapter);
8169
8170         igb_clear_interrupt_scheme(adapter);
8171
8172         igb_init_queue_configuration(adapter);
8173
8174         if (igb_init_interrupt_scheme(adapter, true)) {
8175                 rtnl_unlock();
8176                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8177                 return -ENOMEM;
8178         }
8179
8180         if (netif_running(netdev))
8181                 igb_open(netdev);
8182
8183         rtnl_unlock();
8184
8185         return 0;
8186 }
8187
8188 static int igb_pci_disable_sriov(struct pci_dev *dev)
8189 {
8190         int err = igb_disable_sriov(dev);
8191
8192         if (!err)
8193                 err = igb_sriov_reinit(dev);
8194
8195         return err;
8196 }
8197
8198 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
8199 {
8200         int err = igb_enable_sriov(dev, num_vfs);
8201
8202         if (err)
8203                 goto out;
8204
8205         err = igb_sriov_reinit(dev);
8206         if (!err)
8207                 return num_vfs;
8208
8209 out:
8210         return err;
8211 }
8212
8213 #endif
8214 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
8215 {
8216 #ifdef CONFIG_PCI_IOV
8217         if (num_vfs == 0)
8218                 return igb_pci_disable_sriov(dev);
8219         else
8220                 return igb_pci_enable_sriov(dev, num_vfs);
8221 #endif
8222         return 0;
8223 }
8224
8225 #ifdef CONFIG_NET_POLL_CONTROLLER
8226 /* Polling 'interrupt' - used by things like netconsole to send skbs
8227  * without having to re-enable interrupts. It's not called while
8228  * the interrupt routine is executing.
8229  */
8230 static void igb_netpoll(struct net_device *netdev)
8231 {
8232         struct igb_adapter *adapter = netdev_priv(netdev);
8233         struct e1000_hw *hw = &adapter->hw;
8234         struct igb_q_vector *q_vector;
8235         int i;
8236
8237         for (i = 0; i < adapter->num_q_vectors; i++) {
8238                 q_vector = adapter->q_vector[i];
8239                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
8240                         wr32(E1000_EIMC, q_vector->eims_value);
8241                 else
8242                         igb_irq_disable(adapter);
8243                 napi_schedule(&q_vector->napi);
8244         }
8245 }
8246 #endif /* CONFIG_NET_POLL_CONTROLLER */
8247
8248 /**
8249  *  igb_io_error_detected - called when PCI error is detected
8250  *  @pdev: Pointer to PCI device
8251  *  @state: The current pci connection state
8252  *
8253  *  This function is called after a PCI bus error affecting
8254  *  this device has been detected.
8255  **/
8256 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
8257                                               pci_channel_state_t state)
8258 {
8259         struct net_device *netdev = pci_get_drvdata(pdev);
8260         struct igb_adapter *adapter = netdev_priv(netdev);
8261
8262         netif_device_detach(netdev);
8263
8264         if (state == pci_channel_io_perm_failure)
8265                 return PCI_ERS_RESULT_DISCONNECT;
8266
8267         if (netif_running(netdev))
8268                 igb_down(adapter);
8269         pci_disable_device(pdev);
8270
8271         /* Request a slot slot reset. */
8272         return PCI_ERS_RESULT_NEED_RESET;
8273 }
8274
8275 /**
8276  *  igb_io_slot_reset - called after the pci bus has been reset.
8277  *  @pdev: Pointer to PCI device
8278  *
8279  *  Restart the card from scratch, as if from a cold-boot. Implementation
8280  *  resembles the first-half of the igb_resume routine.
8281  **/
8282 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
8283 {
8284         struct net_device *netdev = pci_get_drvdata(pdev);
8285         struct igb_adapter *adapter = netdev_priv(netdev);
8286         struct e1000_hw *hw = &adapter->hw;
8287         pci_ers_result_t result;
8288         int err;
8289
8290         if (pci_enable_device_mem(pdev)) {
8291                 dev_err(&pdev->dev,
8292                         "Cannot re-enable PCI device after reset.\n");
8293                 result = PCI_ERS_RESULT_DISCONNECT;
8294         } else {
8295                 pci_set_master(pdev);
8296                 pci_restore_state(pdev);
8297                 pci_save_state(pdev);
8298
8299                 pci_enable_wake(pdev, PCI_D3hot, 0);
8300                 pci_enable_wake(pdev, PCI_D3cold, 0);
8301
8302                 /* In case of PCI error, adapter lose its HW address
8303                  * so we should re-assign it here.
8304                  */
8305                 hw->hw_addr = adapter->io_addr;
8306
8307                 igb_reset(adapter);
8308                 wr32(E1000_WUS, ~0);
8309                 result = PCI_ERS_RESULT_RECOVERED;
8310         }
8311
8312         err = pci_cleanup_aer_uncorrect_error_status(pdev);
8313         if (err) {
8314                 dev_err(&pdev->dev,
8315                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
8316                         err);
8317                 /* non-fatal, continue */
8318         }
8319
8320         return result;
8321 }
8322
8323 /**
8324  *  igb_io_resume - called when traffic can start flowing again.
8325  *  @pdev: Pointer to PCI device
8326  *
8327  *  This callback is called when the error recovery driver tells us that
8328  *  its OK to resume normal operation. Implementation resembles the
8329  *  second-half of the igb_resume routine.
8330  */
8331 static void igb_io_resume(struct pci_dev *pdev)
8332 {
8333         struct net_device *netdev = pci_get_drvdata(pdev);
8334         struct igb_adapter *adapter = netdev_priv(netdev);
8335
8336         if (netif_running(netdev)) {
8337                 if (igb_up(adapter)) {
8338                         dev_err(&pdev->dev, "igb_up failed after reset\n");
8339                         return;
8340                 }
8341         }
8342
8343         netif_device_attach(netdev);
8344
8345         /* let the f/w know that the h/w is now under the control of the
8346          * driver.
8347          */
8348         igb_get_hw_control(adapter);
8349 }
8350
8351 /**
8352  *  igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
8353  *  @adapter: Pointer to adapter structure
8354  *  @index: Index of the RAR entry which need to be synced with MAC table
8355  **/
8356 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
8357 {
8358         struct e1000_hw *hw = &adapter->hw;
8359         u32 rar_low, rar_high;
8360         u8 *addr = adapter->mac_table[index].addr;
8361
8362         /* HW expects these to be in network order when they are plugged
8363          * into the registers which are little endian.  In order to guarantee
8364          * that ordering we need to do an leXX_to_cpup here in order to be
8365          * ready for the byteswap that occurs with writel
8366          */
8367         rar_low = le32_to_cpup((__le32 *)(addr));
8368         rar_high = le16_to_cpup((__le16 *)(addr + 4));
8369
8370         /* Indicate to hardware the Address is Valid. */
8371         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
8372                 if (is_valid_ether_addr(addr))
8373                         rar_high |= E1000_RAH_AV;
8374
8375                 switch (hw->mac.type) {
8376                 case e1000_82575:
8377                 case e1000_i210:
8378                         rar_high |= E1000_RAH_POOL_1 *
8379                                     adapter->mac_table[index].queue;
8380                         break;
8381                 default:
8382                         rar_high |= E1000_RAH_POOL_1 <<
8383                                     adapter->mac_table[index].queue;
8384                         break;
8385                 }
8386         }
8387
8388         wr32(E1000_RAL(index), rar_low);
8389         wrfl();
8390         wr32(E1000_RAH(index), rar_high);
8391         wrfl();
8392 }
8393
8394 static int igb_set_vf_mac(struct igb_adapter *adapter,
8395                           int vf, unsigned char *mac_addr)
8396 {
8397         struct e1000_hw *hw = &adapter->hw;
8398         /* VF MAC addresses start at end of receive addresses and moves
8399          * towards the first, as a result a collision should not be possible
8400          */
8401         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
8402         unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
8403
8404         ether_addr_copy(vf_mac_addr, mac_addr);
8405         ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
8406         adapter->mac_table[rar_entry].queue = vf;
8407         adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
8408         igb_rar_set_index(adapter, rar_entry);
8409
8410         return 0;
8411 }
8412
8413 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
8414 {
8415         struct igb_adapter *adapter = netdev_priv(netdev);
8416
8417         if (vf >= adapter->vfs_allocated_count)
8418                 return -EINVAL;
8419
8420         /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
8421          * flag and allows to overwrite the MAC via VF netdev.  This
8422          * is necessary to allow libvirt a way to restore the original
8423          * MAC after unbinding vfio-pci and reloading igbvf after shutting
8424          * down a VM.
8425          */
8426         if (is_zero_ether_addr(mac)) {
8427                 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
8428                 dev_info(&adapter->pdev->dev,
8429                          "remove administratively set MAC on VF %d\n",
8430                          vf);
8431         } else if (is_valid_ether_addr(mac)) {
8432                 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
8433                 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
8434                          mac, vf);
8435                 dev_info(&adapter->pdev->dev,
8436                          "Reload the VF driver to make this change effective.");
8437                 /* Generate additional warning if PF is down */
8438                 if (test_bit(__IGB_DOWN, &adapter->state)) {
8439                         dev_warn(&adapter->pdev->dev,
8440                                  "The VF MAC address has been set, but the PF device is not up.\n");
8441                         dev_warn(&adapter->pdev->dev,
8442                                  "Bring the PF device up before attempting to use the VF device.\n");
8443                 }
8444         } else {
8445                 return -EINVAL;
8446         }
8447         return igb_set_vf_mac(adapter, vf, mac);
8448 }
8449
8450 static int igb_link_mbps(int internal_link_speed)
8451 {
8452         switch (internal_link_speed) {
8453         case SPEED_100:
8454                 return 100;
8455         case SPEED_1000:
8456                 return 1000;
8457         default:
8458                 return 0;
8459         }
8460 }
8461
8462 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
8463                                   int link_speed)
8464 {
8465         int rf_dec, rf_int;
8466         u32 bcnrc_val;
8467
8468         if (tx_rate != 0) {
8469                 /* Calculate the rate factor values to set */
8470                 rf_int = link_speed / tx_rate;
8471                 rf_dec = (link_speed - (rf_int * tx_rate));
8472                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
8473                          tx_rate;
8474
8475                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
8476                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
8477                               E1000_RTTBCNRC_RF_INT_MASK);
8478                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
8479         } else {
8480                 bcnrc_val = 0;
8481         }
8482
8483         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
8484         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
8485          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
8486          */
8487         wr32(E1000_RTTBCNRM, 0x14);
8488         wr32(E1000_RTTBCNRC, bcnrc_val);
8489 }
8490
8491 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
8492 {
8493         int actual_link_speed, i;
8494         bool reset_rate = false;
8495
8496         /* VF TX rate limit was not set or not supported */
8497         if ((adapter->vf_rate_link_speed == 0) ||
8498             (adapter->hw.mac.type != e1000_82576))
8499                 return;
8500
8501         actual_link_speed = igb_link_mbps(adapter->link_speed);
8502         if (actual_link_speed != adapter->vf_rate_link_speed) {
8503                 reset_rate = true;
8504                 adapter->vf_rate_link_speed = 0;
8505                 dev_info(&adapter->pdev->dev,
8506                          "Link speed has been changed. VF Transmit rate is disabled\n");
8507         }
8508
8509         for (i = 0; i < adapter->vfs_allocated_count; i++) {
8510                 if (reset_rate)
8511                         adapter->vf_data[i].tx_rate = 0;
8512
8513                 igb_set_vf_rate_limit(&adapter->hw, i,
8514                                       adapter->vf_data[i].tx_rate,
8515                                       actual_link_speed);
8516         }
8517 }
8518
8519 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
8520                              int min_tx_rate, int max_tx_rate)
8521 {
8522         struct igb_adapter *adapter = netdev_priv(netdev);
8523         struct e1000_hw *hw = &adapter->hw;
8524         int actual_link_speed;
8525
8526         if (hw->mac.type != e1000_82576)
8527                 return -EOPNOTSUPP;
8528
8529         if (min_tx_rate)
8530                 return -EINVAL;
8531
8532         actual_link_speed = igb_link_mbps(adapter->link_speed);
8533         if ((vf >= adapter->vfs_allocated_count) ||
8534             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
8535             (max_tx_rate < 0) ||
8536             (max_tx_rate > actual_link_speed))
8537                 return -EINVAL;
8538
8539         adapter->vf_rate_link_speed = actual_link_speed;
8540         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
8541         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
8542
8543         return 0;
8544 }
8545
8546 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
8547                                    bool setting)
8548 {
8549         struct igb_adapter *adapter = netdev_priv(netdev);
8550         struct e1000_hw *hw = &adapter->hw;
8551         u32 reg_val, reg_offset;
8552
8553         if (!adapter->vfs_allocated_count)
8554                 return -EOPNOTSUPP;
8555
8556         if (vf >= adapter->vfs_allocated_count)
8557                 return -EINVAL;
8558
8559         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
8560         reg_val = rd32(reg_offset);
8561         if (setting)
8562                 reg_val |= (BIT(vf) |
8563                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8564         else
8565                 reg_val &= ~(BIT(vf) |
8566                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8567         wr32(reg_offset, reg_val);
8568
8569         adapter->vf_data[vf].spoofchk_enabled = setting;
8570         return 0;
8571 }
8572
8573 static int igb_ndo_get_vf_config(struct net_device *netdev,
8574                                  int vf, struct ifla_vf_info *ivi)
8575 {
8576         struct igb_adapter *adapter = netdev_priv(netdev);
8577         if (vf >= adapter->vfs_allocated_count)
8578                 return -EINVAL;
8579         ivi->vf = vf;
8580         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
8581         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
8582         ivi->min_tx_rate = 0;
8583         ivi->vlan = adapter->vf_data[vf].pf_vlan;
8584         ivi->qos = adapter->vf_data[vf].pf_qos;
8585         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
8586         return 0;
8587 }
8588
8589 static void igb_vmm_control(struct igb_adapter *adapter)
8590 {
8591         struct e1000_hw *hw = &adapter->hw;
8592         u32 reg;
8593
8594         switch (hw->mac.type) {
8595         case e1000_82575:
8596         case e1000_i210:
8597         case e1000_i211:
8598         case e1000_i354:
8599         default:
8600                 /* replication is not supported for 82575 */
8601                 return;
8602         case e1000_82576:
8603                 /* notify HW that the MAC is adding vlan tags */
8604                 reg = rd32(E1000_DTXCTL);
8605                 reg |= E1000_DTXCTL_VLAN_ADDED;
8606                 wr32(E1000_DTXCTL, reg);
8607                 /* Fall through */
8608         case e1000_82580:
8609                 /* enable replication vlan tag stripping */
8610                 reg = rd32(E1000_RPLOLR);
8611                 reg |= E1000_RPLOLR_STRVLAN;
8612                 wr32(E1000_RPLOLR, reg);
8613                 /* Fall through */
8614         case e1000_i350:
8615                 /* none of the above registers are supported by i350 */
8616                 break;
8617         }
8618
8619         if (adapter->vfs_allocated_count) {
8620                 igb_vmdq_set_loopback_pf(hw, true);
8621                 igb_vmdq_set_replication_pf(hw, true);
8622                 igb_vmdq_set_anti_spoofing_pf(hw, true,
8623                                               adapter->vfs_allocated_count);
8624         } else {
8625                 igb_vmdq_set_loopback_pf(hw, false);
8626                 igb_vmdq_set_replication_pf(hw, false);
8627         }
8628 }
8629
8630 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
8631 {
8632         struct e1000_hw *hw = &adapter->hw;
8633         u32 dmac_thr;
8634         u16 hwm;
8635         u32 reg;
8636
8637         if (hw->mac.type > e1000_82580) {
8638                 if (adapter->flags & IGB_FLAG_DMAC) {
8639                         /* force threshold to 0. */
8640                         wr32(E1000_DMCTXTH, 0);
8641
8642                         /* DMA Coalescing high water mark needs to be greater
8643                          * than the Rx threshold. Set hwm to PBA - max frame
8644                          * size in 16B units, capping it at PBA - 6KB.
8645                          */
8646                         hwm = 64 * (pba - 6);
8647                         reg = rd32(E1000_FCRTC);
8648                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
8649                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
8650                                 & E1000_FCRTC_RTH_COAL_MASK);
8651                         wr32(E1000_FCRTC, reg);
8652
8653                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8654                          * frame size, capping it at PBA - 10KB.
8655                          */
8656                         dmac_thr = pba - 10;
8657                         reg = rd32(E1000_DMACR);
8658                         reg &= ~E1000_DMACR_DMACTHR_MASK;
8659                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
8660                                 & E1000_DMACR_DMACTHR_MASK);
8661
8662                         /* transition to L0x or L1 if available..*/
8663                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
8664
8665                         /* watchdog timer= +-1000 usec in 32usec intervals */
8666                         reg |= (1000 >> 5);
8667
8668                         /* Disable BMC-to-OS Watchdog Enable */
8669                         if (hw->mac.type != e1000_i354)
8670                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
8671                         wr32(E1000_DMACR, reg);
8672
8673                         /* no lower threshold to disable
8674                          * coalescing(smart fifb)-UTRESH=0
8675                          */
8676                         wr32(E1000_DMCRTRH, 0);
8677
8678                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
8679
8680                         wr32(E1000_DMCTLX, reg);
8681
8682                         /* free space in tx packet buffer to wake from
8683                          * DMA coal
8684                          */
8685                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
8686                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
8687                 }
8688
8689                 if (hw->mac.type >= e1000_i210 ||
8690                     (adapter->flags & IGB_FLAG_DMAC)) {
8691                         reg = rd32(E1000_PCIEMISC);
8692                         reg |= E1000_PCIEMISC_LX_DECISION;
8693                         wr32(E1000_PCIEMISC, reg);
8694                 } /* endif adapter->dmac is not disabled */
8695         } else if (hw->mac.type == e1000_82580) {
8696                 u32 reg = rd32(E1000_PCIEMISC);
8697
8698                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
8699                 wr32(E1000_DMACR, 0);
8700         }
8701 }
8702
8703 /**
8704  *  igb_read_i2c_byte - Reads 8 bit word over I2C
8705  *  @hw: pointer to hardware structure
8706  *  @byte_offset: byte offset to read
8707  *  @dev_addr: device address
8708  *  @data: value read
8709  *
8710  *  Performs byte read operation over I2C interface at
8711  *  a specified device address.
8712  **/
8713 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8714                       u8 dev_addr, u8 *data)
8715 {
8716         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8717         struct i2c_client *this_client = adapter->i2c_client;
8718         s32 status;
8719         u16 swfw_mask = 0;
8720
8721         if (!this_client)
8722                 return E1000_ERR_I2C;
8723
8724         swfw_mask = E1000_SWFW_PHY0_SM;
8725
8726         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8727                 return E1000_ERR_SWFW_SYNC;
8728
8729         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8730         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8731
8732         if (status < 0)
8733                 return E1000_ERR_I2C;
8734         else {
8735                 *data = status;
8736                 return 0;
8737         }
8738 }
8739
8740 /**
8741  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8742  *  @hw: pointer to hardware structure
8743  *  @byte_offset: byte offset to write
8744  *  @dev_addr: device address
8745  *  @data: value to write
8746  *
8747  *  Performs byte write operation over I2C interface at
8748  *  a specified device address.
8749  **/
8750 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8751                        u8 dev_addr, u8 data)
8752 {
8753         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8754         struct i2c_client *this_client = adapter->i2c_client;
8755         s32 status;
8756         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8757
8758         if (!this_client)
8759                 return E1000_ERR_I2C;
8760
8761         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8762                 return E1000_ERR_SWFW_SYNC;
8763         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8764         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8765
8766         if (status)
8767                 return E1000_ERR_I2C;
8768         else
8769                 return 0;
8770
8771 }
8772
8773 int igb_reinit_queues(struct igb_adapter *adapter)
8774 {
8775         struct net_device *netdev = adapter->netdev;
8776         struct pci_dev *pdev = adapter->pdev;
8777         int err = 0;
8778
8779         if (netif_running(netdev))
8780                 igb_close(netdev);
8781
8782         igb_reset_interrupt_capability(adapter);
8783
8784         if (igb_init_interrupt_scheme(adapter, true)) {
8785                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8786                 return -ENOMEM;
8787         }
8788
8789         if (netif_running(netdev))
8790                 err = igb_open(netdev);
8791
8792         return err;
8793 }
8794
8795 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
8796 {
8797         struct igb_nfc_filter *rule;
8798
8799         spin_lock(&adapter->nfc_lock);
8800
8801         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
8802                 igb_erase_filter(adapter, rule);
8803
8804         spin_unlock(&adapter->nfc_lock);
8805 }
8806
8807 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
8808 {
8809         struct igb_nfc_filter *rule;
8810
8811         spin_lock(&adapter->nfc_lock);
8812
8813         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
8814                 igb_add_filter(adapter, rule);
8815
8816         spin_unlock(&adapter->nfc_lock);
8817 }
8818 /* igb_main.c */