drivers/net/ethernet/intel/igb/igb_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/bitops.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/ipv6.h>
  14 #include <linux/slab.h>
  15 #include <net/checksum.h>
  16 #include <net/ip6_checksum.h>
  17 #include <net/pkt_sched.h>
  18 #include <net/pkt_cls.h>
  19 #include <linux/net_tstamp.h>
  20 #include <linux/mii.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/pci.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/ip.h>
  28 #include <linux/tcp.h>
  29 #include <linux/sctp.h>
  30 #include <linux/if_ether.h>
  31 #include <linux/aer.h>
  32 #include <linux/prefetch.h>
  33 #include <linux/pm_runtime.h>
  34 #include <linux/etherdevice.h>
  35 #ifdef CONFIG_IGB_DCA
  36 #include <linux/dca.h>
  37 #endif
  38 #include <linux/i2c.h>
  39 #include "igb.h"
  40
  41 #define MAJ 5
  42 #define MIN 4
  43 #define BUILD 0
  44 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  45 __stringify(BUILD) "-k"
  46
  47 enum queue_mode {
  48         QUEUE_MODE_STRICT_PRIORITY,
  49         QUEUE_MODE_STREAM_RESERVATION,
  50 };
  51
  52 enum tx_queue_prio {
  53         TX_QUEUE_PRIO_HIGH,
  54         TX_QUEUE_PRIO_LOW,
  55 };
  56
  57 char igb_driver_name[] = "igb";
  58 char igb_driver_version[] = DRV_VERSION;
  59 static const char igb_driver_string[] =
  60                                 "Intel(R) Gigabit Ethernet Network Driver";
  61 static const char igb_copyright[] =
  62                                 "Copyright (c) 2007-2014 Intel Corporation.";
  63
  64 static const struct e1000_info *igb_info_tbl[] = {
  65         [board_82575] = &e1000_82575_info,
  66 };
  67
  68 static const struct pci_device_id igb_pci_tbl[] = {
  69         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  70         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  71         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  72         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  73         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  74         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  75         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 104         /* required last entry */
 105         {0, }
 106 };
 107
 108 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 109
 110 static int igb_setup_all_tx_resources(struct igb_adapter *);
 111 static int igb_setup_all_rx_resources(struct igb_adapter *);
 112 static void igb_free_all_tx_resources(struct igb_adapter *);
 113 static void igb_free_all_rx_resources(struct igb_adapter *);
 114 static void igb_setup_mrqc(struct igb_adapter *);
 115 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 116 static void igb_remove(struct pci_dev *pdev);
 117 static int igb_sw_init(struct igb_adapter *);
 118 int igb_open(struct net_device *);
 119 int igb_close(struct net_device *);
 120 static void igb_configure(struct igb_adapter *);
 121 static void igb_configure_tx(struct igb_adapter *);
 122 static void igb_configure_rx(struct igb_adapter *);
 123 static void igb_clean_all_tx_rings(struct igb_adapter *);
 124 static void igb_clean_all_rx_rings(struct igb_adapter *);
 125 static void igb_clean_tx_ring(struct igb_ring *);
 126 static void igb_clean_rx_ring(struct igb_ring *);
 127 static void igb_set_rx_mode(struct net_device *);
 128 static void igb_update_phy_info(struct timer_list *);
 129 static void igb_watchdog(struct timer_list *);
 130 static void igb_watchdog_task(struct work_struct *);
 131 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 132 static void igb_get_stats64(struct net_device *dev,
 133                             struct rtnl_link_stats64 *stats);
 134 static int igb_change_mtu(struct net_device *, int);
 135 static int igb_set_mac(struct net_device *, void *);
 136 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 137 static irqreturn_t igb_intr(int irq, void *);
 138 static irqreturn_t igb_intr_msi(int irq, void *);
 139 static irqreturn_t igb_msix_other(int irq, void *);
 140 static irqreturn_t igb_msix_ring(int irq, void *);
 141 #ifdef CONFIG_IGB_DCA
 142 static void igb_update_dca(struct igb_q_vector *);
 143 static void igb_setup_dca(struct igb_adapter *);
 144 #endif /* CONFIG_IGB_DCA */
 145 static int igb_poll(struct napi_struct *, int);
 146 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 147 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 148 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 149 static void igb_tx_timeout(struct net_device *);
 150 static void igb_reset_task(struct work_struct *);
 151 static void igb_vlan_mode(struct net_device *netdev,
 152                           netdev_features_t features);
 153 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 154 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 155 static void igb_restore_vlan(struct igb_adapter *);
 156 static void igb_rar_set_index(struct igb_adapter *, u32);
 157 static void igb_ping_all_vfs(struct igb_adapter *);
 158 static void igb_msg_task(struct igb_adapter *);
 159 static void igb_vmm_control(struct igb_adapter *);
 160 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 161 static void igb_flush_mac_table(struct igb_adapter *);
 162 static int igb_available_rars(struct igb_adapter *, u8);
 163 static void igb_set_default_mac_filter(struct igb_adapter *);
 164 static int igb_uc_sync(struct net_device *, const unsigned char *);
 165 static int igb_uc_unsync(struct net_device *, const unsigned char *);
 166 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 167 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 168 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 169                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 170 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 171 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 172                                    bool setting);
 173 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf,
 174                                 bool setting);
 175 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 176                                  struct ifla_vf_info *ivi);
 177 static void igb_check_vf_rate_limit(struct igb_adapter *);
 178 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 179 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 180
 181 #ifdef CONFIG_PCI_IOV
 182 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 183 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 184 static int igb_disable_sriov(struct pci_dev *dev);
 185 static int igb_pci_disable_sriov(struct pci_dev *dev);
 186 #endif
 187
 188 static int igb_suspend(struct device *);
 189 static int igb_resume(struct device *);
 190 static int igb_runtime_suspend(struct device *dev);
 191 static int igb_runtime_resume(struct device *dev);
 192 static int igb_runtime_idle(struct device *dev);
 193 static const struct dev_pm_ops igb_pm_ops = {
 194         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 195         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 196                         igb_runtime_idle)
 197 };
 198 static void igb_shutdown(struct pci_dev *);
 199 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 200 #ifdef CONFIG_IGB_DCA
 201 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 202 static struct notifier_block dca_notifier = {
 203         .notifier_call  = igb_notify_dca,
 204         .next           = NULL,
 205         .priority       = 0
 206 };
 207 #endif
 208 #ifdef CONFIG_PCI_IOV
 209 static unsigned int max_vfs;
 210 module_param(max_vfs, uint, 0);
 211 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 212 #endif /* CONFIG_PCI_IOV */
 213
 214 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 215                      pci_channel_state_t);
 216 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 217 static void igb_io_resume(struct pci_dev *);
 218
 219 static const struct pci_error_handlers igb_err_handler = {
 220         .error_detected = igb_io_error_detected,
 221         .slot_reset = igb_io_slot_reset,
 222         .resume = igb_io_resume,
 223 };
 224
 225 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 226
 227 static struct pci_driver igb_driver = {
 228         .name     = igb_driver_name,
 229         .id_table = igb_pci_tbl,
 230         .probe    = igb_probe,
 231         .remove   = igb_remove,
 232 #ifdef CONFIG_PM
 233         .driver.pm = &igb_pm_ops,
 234 #endif
 235         .shutdown = igb_shutdown,
 236         .sriov_configure = igb_pci_sriov_configure,
 237         .err_handler = &igb_err_handler
 238 };
 239
 240 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 241 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 242 MODULE_LICENSE("GPL");
 243 MODULE_VERSION(DRV_VERSION);
 244
 245 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 246 static int debug = -1;
 247 module_param(debug, int, 0);
 248 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 249
 250 struct igb_reg_info {
 251         u32 ofs;
 252         char *name;
 253 };
 254
 255 static const struct igb_reg_info igb_reg_info_tbl[] = {
 256
 257         /* General Registers */
 258         {E1000_CTRL, "CTRL"},
 259         {E1000_STATUS, "STATUS"},
 260         {E1000_CTRL_EXT, "CTRL_EXT"},
 261
 262         /* Interrupt Registers */
 263         {E1000_ICR, "ICR"},
 264
 265         /* RX Registers */
 266         {E1000_RCTL, "RCTL"},
 267         {E1000_RDLEN(0), "RDLEN"},
 268         {E1000_RDH(0), "RDH"},
 269         {E1000_RDT(0), "RDT"},
 270         {E1000_RXDCTL(0), "RXDCTL"},
 271         {E1000_RDBAL(0), "RDBAL"},
 272         {E1000_RDBAH(0), "RDBAH"},
 273
 274         /* TX Registers */
 275         {E1000_TCTL, "TCTL"},
 276         {E1000_TDBAL(0), "TDBAL"},
 277         {E1000_TDBAH(0), "TDBAH"},
 278         {E1000_TDLEN(0), "TDLEN"},
 279         {E1000_TDH(0), "TDH"},
 280         {E1000_TDT(0), "TDT"},
 281         {E1000_TXDCTL(0), "TXDCTL"},
 282         {E1000_TDFH, "TDFH"},
 283         {E1000_TDFT, "TDFT"},
 284         {E1000_TDFHS, "TDFHS"},
 285         {E1000_TDFPC, "TDFPC"},
 286
 287         /* List Terminator */
 288         {}
 289 };
 290
 291 /* igb_regdump - register printout routine */
 292 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 293 {
 294         int n = 0;
 295         char rname[16];
 296         u32 regs[8];
 297
 298         switch (reginfo->ofs) {
 299         case E1000_RDLEN(0):
 300                 for (n = 0; n < 4; n++)
 301                         regs[n] = rd32(E1000_RDLEN(n));
 302                 break;
 303         case E1000_RDH(0):
 304                 for (n = 0; n < 4; n++)
 305                         regs[n] = rd32(E1000_RDH(n));
 306                 break;
 307         case E1000_RDT(0):
 308                 for (n = 0; n < 4; n++)
 309                         regs[n] = rd32(E1000_RDT(n));
 310                 break;
 311         case E1000_RXDCTL(0):
 312                 for (n = 0; n < 4; n++)
 313                         regs[n] = rd32(E1000_RXDCTL(n));
 314                 break;
 315         case E1000_RDBAL(0):
 316                 for (n = 0; n < 4; n++)
 317                         regs[n] = rd32(E1000_RDBAL(n));
 318                 break;
 319         case E1000_RDBAH(0):
 320                 for (n = 0; n < 4; n++)
 321                         regs[n] = rd32(E1000_RDBAH(n));
 322                 break;
 323         case E1000_TDBAL(0):
 324                 for (n = 0; n < 4; n++)
 325                         regs[n] = rd32(E1000_RDBAL(n));
 326                 break;
 327         case E1000_TDBAH(0):
 328                 for (n = 0; n < 4; n++)
 329                         regs[n] = rd32(E1000_TDBAH(n));
 330                 break;
 331         case E1000_TDLEN(0):
 332                 for (n = 0; n < 4; n++)
 333                         regs[n] = rd32(E1000_TDLEN(n));
 334                 break;
 335         case E1000_TDH(0):
 336                 for (n = 0; n < 4; n++)
 337                         regs[n] = rd32(E1000_TDH(n));
 338                 break;
 339         case E1000_TDT(0):
 340                 for (n = 0; n < 4; n++)
 341                         regs[n] = rd32(E1000_TDT(n));
 342                 break;
 343         case E1000_TXDCTL(0):
 344                 for (n = 0; n < 4; n++)
 345                         regs[n] = rd32(E1000_TXDCTL(n));
 346                 break;
 347         default:
 348                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 349                 return;
 350         }
 351
 352         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 353         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 354                 regs[2], regs[3]);
 355 }
 356
 357 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 358 static void igb_dump(struct igb_adapter *adapter)
 359 {
 360         struct net_device *netdev = adapter->netdev;
 361         struct e1000_hw *hw = &adapter->hw;
 362         struct igb_reg_info *reginfo;
 363         struct igb_ring *tx_ring;
 364         union e1000_adv_tx_desc *tx_desc;
 365         struct my_u0 { u64 a; u64 b; } *u0;
 366         struct igb_ring *rx_ring;
 367         union e1000_adv_rx_desc *rx_desc;
 368         u32 staterr;
 369         u16 i, n;
 370
 371         if (!netif_msg_hw(adapter))
 372                 return;
 373
 374         /* Print netdevice Info */
 375         if (netdev) {
 376                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 377                 pr_info("Device Name     state            trans_start\n");
 378                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 379                         netdev->state, dev_trans_start(netdev));
 380         }
 381
 382         /* Print Registers */
 383         dev_info(&adapter->pdev->dev, "Register Dump\n");
 384         pr_info(" Register Name   Value\n");
 385         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 386              reginfo->name; reginfo++) {
 387                 igb_regdump(hw, reginfo);
 388         }
 389
 390         /* Print TX Ring Summary */
 391         if (!netdev || !netif_running(netdev))
 392                 goto exit;
 393
 394         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 395         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 396         for (n = 0; n < adapter->num_tx_queues; n++) {
 397                 struct igb_tx_buffer *buffer_info;
 398                 tx_ring = adapter->tx_ring[n];
 399                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 400                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 401                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 402                         (u64)dma_unmap_addr(buffer_info, dma),
 403                         dma_unmap_len(buffer_info, len),
 404                         buffer_info->next_to_watch,
 405                         (u64)buffer_info->time_stamp);
 406         }
 407
 408         /* Print TX Rings */
 409         if (!netif_msg_tx_done(adapter))
 410                 goto rx_ring_summary;
 411
 412         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 413
 414         /* Transmit Descriptor Formats
 415          *
 416          * Advanced Transmit Descriptor
 417          *   +--------------------------------------------------------------+
 418          * 0 |         Buffer Address [63:0]                                |
 419          *   +--------------------------------------------------------------+
 420          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 421          *   +--------------------------------------------------------------+
 422          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 423          */
 424
 425         for (n = 0; n < adapter->num_tx_queues; n++) {
 426                 tx_ring = adapter->tx_ring[n];
 427                 pr_info("------------------------------------\n");
 428                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 429                 pr_info("------------------------------------\n");
 430                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 431
 432                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 433                         const char *next_desc;
 434                         struct igb_tx_buffer *buffer_info;
 435                         tx_desc = IGB_TX_DESC(tx_ring, i);
 436                         buffer_info = &tx_ring->tx_buffer_info[i];
 437                         u0 = (struct my_u0 *)tx_desc;
 438                         if (i == tx_ring->next_to_use &&
 439                             i == tx_ring->next_to_clean)
 440                                 next_desc = " NTC/U";
 441                         else if (i == tx_ring->next_to_use)
 442                                 next_desc = " NTU";
 443                         else if (i == tx_ring->next_to_clean)
 444                                 next_desc = " NTC";
 445                         else
 446                                 next_desc = "";
 447
 448                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 449                                 i, le64_to_cpu(u0->a),
 450                                 le64_to_cpu(u0->b),
 451                                 (u64)dma_unmap_addr(buffer_info, dma),
 452                                 dma_unmap_len(buffer_info, len),
 453                                 buffer_info->next_to_watch,
 454                                 (u64)buffer_info->time_stamp,
 455                                 buffer_info->skb, next_desc);
 456
 457                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 458                                 print_hex_dump(KERN_INFO, "",
 459                                         DUMP_PREFIX_ADDRESS,
 460                                         16, 1, buffer_info->skb->data,
 461                                         dma_unmap_len(buffer_info, len),
 462                                         true);
 463                 }
 464         }
 465
 466         /* Print RX Rings Summary */
 467 rx_ring_summary:
 468         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 469         pr_info("Queue [NTU] [NTC]\n");
 470         for (n = 0; n < adapter->num_rx_queues; n++) {
 471                 rx_ring = adapter->rx_ring[n];
 472                 pr_info(" %5d %5X %5X\n",
 473                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 474         }
 475
 476         /* Print RX Rings */
 477         if (!netif_msg_rx_status(adapter))
 478                 goto exit;
 479
 480         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 481
 482         /* Advanced Receive Descriptor (Read) Format
 483          *    63                                           1        0
 484          *    +-----------------------------------------------------+
 485          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 486          *    +----------------------------------------------+------+
 487          *  8 |       Header Buffer Address [63:1]           |  DD  |
 488          *    +-----------------------------------------------------+
 489          *
 490          *
 491          * Advanced Receive Descriptor (Write-Back) Format
 492          *
 493          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 494          *   +------------------------------------------------------+
 495          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 496          *   | Checksum   Ident  |   |           |    | Type | Type |
 497          *   +------------------------------------------------------+
 498          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 499          *   +------------------------------------------------------+
 500          *   63       48 47    32 31            20 19               0
 501          */
 502
 503         for (n = 0; n < adapter->num_rx_queues; n++) {
 504                 rx_ring = adapter->rx_ring[n];
 505                 pr_info("------------------------------------\n");
 506                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 507                 pr_info("------------------------------------\n");
 508                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 509                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 510
 511                 for (i = 0; i < rx_ring->count; i++) {
 512                         const char *next_desc;
 513                         struct igb_rx_buffer *buffer_info;
 514                         buffer_info = &rx_ring->rx_buffer_info[i];
 515                         rx_desc = IGB_RX_DESC(rx_ring, i);
 516                         u0 = (struct my_u0 *)rx_desc;
 517                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 518
 519                         if (i == rx_ring->next_to_use)
 520                                 next_desc = " NTU";
 521                         else if (i == rx_ring->next_to_clean)
 522                                 next_desc = " NTC";
 523                         else
 524                                 next_desc = "";
 525
 526                         if (staterr & E1000_RXD_STAT_DD) {
 527                                 /* Descriptor Done */
 528                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 529                                         "RWB", i,
 530                                         le64_to_cpu(u0->a),
 531                                         le64_to_cpu(u0->b),
 532                                         next_desc);
 533                         } else {
 534                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 535                                         "R  ", i,
 536                                         le64_to_cpu(u0->a),
 537                                         le64_to_cpu(u0->b),
 538                                         (u64)buffer_info->dma,
 539                                         next_desc);
 540
 541                                 if (netif_msg_pktdata(adapter) &&
 542                                     buffer_info->dma && buffer_info->page) {
 543                                         print_hex_dump(KERN_INFO, "",
 544                                           DUMP_PREFIX_ADDRESS,
 545                                           16, 1,
 546                                           page_address(buffer_info->page) +
 547                                                       buffer_info->page_offset,
 548                                           igb_rx_bufsz(rx_ring), true);
 549                                 }
 550                         }
 551                 }
 552         }
 553
 554 exit:
 555         return;
 556 }
 557
 558 /**
 559  *  igb_get_i2c_data - Reads the I2C SDA data bit
 560  *  @hw: pointer to hardware structure
 561  *  @i2cctl: Current value of I2CCTL register
 562  *
 563  *  Returns the I2C data bit value
 564  **/
 565 static int igb_get_i2c_data(void *data)
 566 {
 567         struct igb_adapter *adapter = (struct igb_adapter *)data;
 568         struct e1000_hw *hw = &adapter->hw;
 569         s32 i2cctl = rd32(E1000_I2CPARAMS);
 570
 571         return !!(i2cctl & E1000_I2C_DATA_IN);
 572 }
 573
 574 /**
 575  *  igb_set_i2c_data - Sets the I2C data bit
 576  *  @data: pointer to hardware structure
 577  *  @state: I2C data value (0 or 1) to set
 578  *
 579  *  Sets the I2C data bit
 580  **/
 581 static void igb_set_i2c_data(void *data, int state)
 582 {
 583         struct igb_adapter *adapter = (struct igb_adapter *)data;
 584         struct e1000_hw *hw = &adapter->hw;
 585         s32 i2cctl = rd32(E1000_I2CPARAMS);
 586
 587         if (state)
 588                 i2cctl |= E1000_I2C_DATA_OUT;
 589         else
 590                 i2cctl &= ~E1000_I2C_DATA_OUT;
 591
 592         i2cctl &= ~E1000_I2C_DATA_OE_N;
 593         i2cctl |= E1000_I2C_CLK_OE_N;
 594         wr32(E1000_I2CPARAMS, i2cctl);
 595         wrfl();
 596
 597 }
 598
 599 /**
 600  *  igb_set_i2c_clk - Sets the I2C SCL clock
 601  *  @data: pointer to hardware structure
 602  *  @state: state to set clock
 603  *
 604  *  Sets the I2C clock line to state
 605  **/
 606 static void igb_set_i2c_clk(void *data, int state)
 607 {
 608         struct igb_adapter *adapter = (struct igb_adapter *)data;
 609         struct e1000_hw *hw = &adapter->hw;
 610         s32 i2cctl = rd32(E1000_I2CPARAMS);
 611
 612         if (state) {
 613                 i2cctl |= E1000_I2C_CLK_OUT;
 614                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 615         } else {
 616                 i2cctl &= ~E1000_I2C_CLK_OUT;
 617                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 618         }
 619         wr32(E1000_I2CPARAMS, i2cctl);
 620         wrfl();
 621 }
 622
 623 /**
 624  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 625  *  @data: pointer to hardware structure
 626  *
 627  *  Gets the I2C clock state
 628  **/
 629 static int igb_get_i2c_clk(void *data)
 630 {
 631         struct igb_adapter *adapter = (struct igb_adapter *)data;
 632         struct e1000_hw *hw = &adapter->hw;
 633         s32 i2cctl = rd32(E1000_I2CPARAMS);
 634
 635         return !!(i2cctl & E1000_I2C_CLK_IN);
 636 }
 637
 638 static const struct i2c_algo_bit_data igb_i2c_algo = {
 639         .setsda         = igb_set_i2c_data,
 640         .setscl         = igb_set_i2c_clk,
 641         .getsda         = igb_get_i2c_data,
 642         .getscl         = igb_get_i2c_clk,
 643         .udelay         = 5,
 644         .timeout        = 20,
 645 };
 646
 647 /**
 648  *  igb_get_hw_dev - return device
 649  *  @hw: pointer to hardware structure
 650  *
 651  *  used by hardware layer to print debugging information
 652  **/
 653 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 654 {
 655         struct igb_adapter *adapter = hw->back;
 656         return adapter->netdev;
 657 }
 658
 659 /**
 660  *  igb_init_module - Driver Registration Routine
 661  *
 662  *  igb_init_module is the first routine called when the driver is
 663  *  loaded. All it does is register with the PCI subsystem.
 664  **/
 665 static int __init igb_init_module(void)
 666 {
 667         int ret;
 668
 669         pr_info("%s - version %s\n",
 670                igb_driver_string, igb_driver_version);
 671         pr_info("%s\n", igb_copyright);
 672
 673 #ifdef CONFIG_IGB_DCA
 674         dca_register_notify(&dca_notifier);
 675 #endif
 676         ret = pci_register_driver(&igb_driver);
 677         return ret;
 678 }
 679
 680 module_init(igb_init_module);
 681
 682 /**
 683  *  igb_exit_module - Driver Exit Cleanup Routine
 684  *
 685  *  igb_exit_module is called just before the driver is removed
 686  *  from memory.
 687  **/
 688 static void __exit igb_exit_module(void)
 689 {
 690 #ifdef CONFIG_IGB_DCA
 691         dca_unregister_notify(&dca_notifier);
 692 #endif
 693         pci_unregister_driver(&igb_driver);
 694 }
 695
 696 module_exit(igb_exit_module);
 697
 698 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 699 /**
 700  *  igb_cache_ring_register - Descriptor ring to register mapping
 701  *  @adapter: board private structure to initialize
 702  *
 703  *  Once we know the feature-set enabled for the device, we'll cache
 704  *  the register offset the descriptor ring is assigned to.
 705  **/
 706 static void igb_cache_ring_register(struct igb_adapter *adapter)
 707 {
 708         int i = 0, j = 0;
 709         u32 rbase_offset = adapter->vfs_allocated_count;
 710
 711         switch (adapter->hw.mac.type) {
 712         case e1000_82576:
 713                 /* The queues are allocated for virtualization such that VF 0
 714                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 715                  * In order to avoid collision we start at the first free queue
 716                  * and continue consuming queues in the same sequence
 717                  */
 718                 if (adapter->vfs_allocated_count) {
 719                         for (; i < adapter->rss_queues; i++)
 720                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 721                                                                Q_IDX_82576(i);
 722                 }
 723                 /* Fall through */
 724         case e1000_82575:
 725         case e1000_82580:
 726         case e1000_i350:
 727         case e1000_i354:
 728         case e1000_i210:
 729         case e1000_i211:
 730                 /* Fall through */
 731         default:
 732                 for (; i < adapter->num_rx_queues; i++)
 733                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 734                 for (; j < adapter->num_tx_queues; j++)
 735                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 736                 break;
 737         }
 738 }
 739
 740 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 741 {
 742         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 743         u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
 744         u32 value = 0;
 745
 746         if (E1000_REMOVED(hw_addr))
 747                 return ~value;
 748
 749         value = readl(&hw_addr[reg]);
 750
 751         /* reads should not return all F's */
 752         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 753                 struct net_device *netdev = igb->netdev;
 754                 hw->hw_addr = NULL;
 755                 netdev_err(netdev, "PCIe link lost\n");
 756         }
 757
 758         return value;
 759 }
 760
 761 /**
 762  *  igb_write_ivar - configure ivar for given MSI-X vector
 763  *  @hw: pointer to the HW structure
 764  *  @msix_vector: vector number we are allocating to a given ring
 765  *  @index: row index of IVAR register to write within IVAR table
 766  *  @offset: column offset of in IVAR, should be multiple of 8
 767  *
 768  *  This function is intended to handle the writing of the IVAR register
 769  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 770  *  each containing an cause allocation for an Rx and Tx ring, and a
 771  *  variable number of rows depending on the number of queues supported.
 772  **/
 773 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 774                            int index, int offset)
 775 {
 776         u32 ivar = array_rd32(E1000_IVAR0, index);
 777
 778         /* clear any bits that are currently set */
 779         ivar &= ~((u32)0xFF << offset);
 780
 781         /* write vector and valid bit */
 782         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 783
 784         array_wr32(E1000_IVAR0, index, ivar);
 785 }
 786
 787 #define IGB_N0_QUEUE -1
 788 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 789 {
 790         struct igb_adapter *adapter = q_vector->adapter;
 791         struct e1000_hw *hw = &adapter->hw;
 792         int rx_queue = IGB_N0_QUEUE;
 793         int tx_queue = IGB_N0_QUEUE;
 794         u32 msixbm = 0;
 795
 796         if (q_vector->rx.ring)
 797                 rx_queue = q_vector->rx.ring->reg_idx;
 798         if (q_vector->tx.ring)
 799                 tx_queue = q_vector->tx.ring->reg_idx;
 800
 801         switch (hw->mac.type) {
 802         case e1000_82575:
 803                 /* The 82575 assigns vectors using a bitmask, which matches the
 804                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 805                  * or more queues to a vector, we write the appropriate bits
 806                  * into the MSIXBM register for that vector.
 807                  */
 808                 if (rx_queue > IGB_N0_QUEUE)
 809                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 810                 if (tx_queue > IGB_N0_QUEUE)
 811                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 812                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 813                         msixbm |= E1000_EIMS_OTHER;
 814                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 815                 q_vector->eims_value = msixbm;
 816                 break;
 817         case e1000_82576:
 818                 /* 82576 uses a table that essentially consists of 2 columns
 819                  * with 8 rows.  The ordering is column-major so we use the
 820                  * lower 3 bits as the row index, and the 4th bit as the
 821                  * column offset.
 822                  */
 823                 if (rx_queue > IGB_N0_QUEUE)
 824                         igb_write_ivar(hw, msix_vector,
 825                                        rx_queue & 0x7,
 826                                        (rx_queue & 0x8) << 1);
 827                 if (tx_queue > IGB_N0_QUEUE)
 828                         igb_write_ivar(hw, msix_vector,
 829                                        tx_queue & 0x7,
 830                                        ((tx_queue & 0x8) << 1) + 8);
 831                 q_vector->eims_value = BIT(msix_vector);
 832                 break;
 833         case e1000_82580:
 834         case e1000_i350:
 835         case e1000_i354:
 836         case e1000_i210:
 837         case e1000_i211:
 838                 /* On 82580 and newer adapters the scheme is similar to 82576
 839                  * however instead of ordering column-major we have things
 840                  * ordered row-major.  So we traverse the table by using
 841                  * bit 0 as the column offset, and the remaining bits as the
 842                  * row index.
 843                  */
 844                 if (rx_queue > IGB_N0_QUEUE)
 845                         igb_write_ivar(hw, msix_vector,
 846                                        rx_queue >> 1,
 847                                        (rx_queue & 0x1) << 4);
 848                 if (tx_queue > IGB_N0_QUEUE)
 849                         igb_write_ivar(hw, msix_vector,
 850                                        tx_queue >> 1,
 851                                        ((tx_queue & 0x1) << 4) + 8);
 852                 q_vector->eims_value = BIT(msix_vector);
 853                 break;
 854         default:
 855                 BUG();
 856                 break;
 857         }
 858
 859         /* add q_vector eims value to global eims_enable_mask */
 860         adapter->eims_enable_mask |= q_vector->eims_value;
 861
 862         /* configure q_vector to set itr on first interrupt */
 863         q_vector->set_itr = 1;
 864 }
 865
 866 /**
 867  *  igb_configure_msix - Configure MSI-X hardware
 868  *  @adapter: board private structure to initialize
 869  *
 870  *  igb_configure_msix sets up the hardware to properly
 871  *  generate MSI-X interrupts.
 872  **/
 873 static void igb_configure_msix(struct igb_adapter *adapter)
 874 {
 875         u32 tmp;
 876         int i, vector = 0;
 877         struct e1000_hw *hw = &adapter->hw;
 878
 879         adapter->eims_enable_mask = 0;
 880
 881         /* set vector for other causes, i.e. link changes */
 882         switch (hw->mac.type) {
 883         case e1000_82575:
 884                 tmp = rd32(E1000_CTRL_EXT);
 885                 /* enable MSI-X PBA support*/
 886                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 887
 888                 /* Auto-Mask interrupts upon ICR read. */
 889                 tmp |= E1000_CTRL_EXT_EIAME;
 890                 tmp |= E1000_CTRL_EXT_IRCA;
 891
 892                 wr32(E1000_CTRL_EXT, tmp);
 893
 894                 /* enable msix_other interrupt */
 895                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 896                 adapter->eims_other = E1000_EIMS_OTHER;
 897
 898                 break;
 899
 900         case e1000_82576:
 901         case e1000_82580:
 902         case e1000_i350:
 903         case e1000_i354:
 904         case e1000_i210:
 905         case e1000_i211:
 906                 /* Turn on MSI-X capability first, or our settings
 907                  * won't stick.  And it will take days to debug.
 908                  */
 909                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 910                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 911                      E1000_GPIE_NSICR);
 912
 913                 /* enable msix_other interrupt */
 914                 adapter->eims_other = BIT(vector);
 915                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 916
 917                 wr32(E1000_IVAR_MISC, tmp);
 918                 break;
 919         default:
 920                 /* do nothing, since nothing else supports MSI-X */
 921                 break;
 922         } /* switch (hw->mac.type) */
 923
 924         adapter->eims_enable_mask |= adapter->eims_other;
 925
 926         for (i = 0; i < adapter->num_q_vectors; i++)
 927                 igb_assign_vector(adapter->q_vector[i], vector++);
 928
 929         wrfl();
 930 }
 931
 932 /**
 933  *  igb_request_msix - Initialize MSI-X interrupts
 934  *  @adapter: board private structure to initialize
 935  *
 936  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 937  *  kernel.
 938  **/
 939 static int igb_request_msix(struct igb_adapter *adapter)
 940 {
 941         unsigned int num_q_vectors = adapter->num_q_vectors;
 942         struct net_device *netdev = adapter->netdev;
 943         int i, err = 0, vector = 0, free_vector = 0;
 944
 945         err = request_irq(adapter->msix_entries[vector].vector,
 946                           igb_msix_other, 0, netdev->name, adapter);
 947         if (err)
 948                 goto err_out;
 949
 950         if (num_q_vectors > MAX_Q_VECTORS) {
 951                 num_q_vectors = MAX_Q_VECTORS;
 952                 dev_warn(&adapter->pdev->dev,
 953                          "The number of queue vectors (%d) is higher than max allowed (%d)\n",
 954                          adapter->num_q_vectors, MAX_Q_VECTORS);
 955         }
 956         for (i = 0; i < num_q_vectors; i++) {
 957                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 958
 959                 vector++;
 960
 961                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 962
 963                 if (q_vector->rx.ring && q_vector->tx.ring)
 964                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 965                                 q_vector->rx.ring->queue_index);
 966                 else if (q_vector->tx.ring)
 967                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 968                                 q_vector->tx.ring->queue_index);
 969                 else if (q_vector->rx.ring)
 970                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 971                                 q_vector->rx.ring->queue_index);
 972                 else
 973                         sprintf(q_vector->name, "%s-unused", netdev->name);
 974
 975                 err = request_irq(adapter->msix_entries[vector].vector,
 976                                   igb_msix_ring, 0, q_vector->name,
 977                                   q_vector);
 978                 if (err)
 979                         goto err_free;
 980         }
 981
 982         igb_configure_msix(adapter);
 983         return 0;
 984
 985 err_free:
 986         /* free already assigned IRQs */
 987         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 988
 989         vector--;
 990         for (i = 0; i < vector; i++) {
 991                 free_irq(adapter->msix_entries[free_vector++].vector,
 992                          adapter->q_vector[i]);
 993         }
 994 err_out:
 995         return err;
 996 }
 997
 998 /**
 999  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1000  *  @adapter: board private structure to initialize
1001  *  @v_idx: Index of vector to be freed
1002  *
1003  *  This function frees the memory allocated to the q_vector.
1004  **/
1005 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1006 {
1007         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1008
1009         adapter->q_vector[v_idx] = NULL;
1010
1011         /* igb_get_stats64() might access the rings on this vector,
1012          * we must wait a grace period before freeing it.
1013          */
1014         if (q_vector)
1015                 kfree_rcu(q_vector, rcu);
1016 }
1017
1018 /**
1019  *  igb_reset_q_vector - Reset config for interrupt vector
1020  *  @adapter: board private structure to initialize
1021  *  @v_idx: Index of vector to be reset
1022  *
1023  *  If NAPI is enabled it will delete any references to the
1024  *  NAPI struct. This is preparation for igb_free_q_vector.
1025  **/
1026 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1027 {
1028         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1029
1030         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1031          * allocated. So, q_vector is NULL so we should stop here.
1032          */
1033         if (!q_vector)
1034                 return;
1035
1036         if (q_vector->tx.ring)
1037                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1038
1039         if (q_vector->rx.ring)
1040                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1041
1042         netif_napi_del(&q_vector->napi);
1043
1044 }
1045
1046 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1047 {
1048         int v_idx = adapter->num_q_vectors;
1049
1050         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1051                 pci_disable_msix(adapter->pdev);
1052         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1053                 pci_disable_msi(adapter->pdev);
1054
1055         while (v_idx--)
1056                 igb_reset_q_vector(adapter, v_idx);
1057 }
1058
1059 /**
1060  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1061  *  @adapter: board private structure to initialize
1062  *
1063  *  This function frees the memory allocated to the q_vectors.  In addition if
1064  *  NAPI is enabled it will delete any references to the NAPI struct prior
1065  *  to freeing the q_vector.
1066  **/
1067 static void igb_free_q_vectors(struct igb_adapter *adapter)
1068 {
1069         int v_idx = adapter->num_q_vectors;
1070
1071         adapter->num_tx_queues = 0;
1072         adapter->num_rx_queues = 0;
1073         adapter->num_q_vectors = 0;
1074
1075         while (v_idx--) {
1076                 igb_reset_q_vector(adapter, v_idx);
1077                 igb_free_q_vector(adapter, v_idx);
1078         }
1079 }
1080
1081 /**
1082  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1083  *  @adapter: board private structure to initialize
1084  *
1085  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1086  *  MSI-X interrupts allocated.
1087  */
1088 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1089 {
1090         igb_free_q_vectors(adapter);
1091         igb_reset_interrupt_capability(adapter);
1092 }
1093
1094 /**
1095  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1096  *  @adapter: board private structure to initialize
1097  *  @msix: boolean value of MSIX capability
1098  *
1099  *  Attempt to configure interrupts using the best available
1100  *  capabilities of the hardware and kernel.
1101  **/
1102 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1103 {
1104         int err;
1105         int numvecs, i;
1106
1107         if (!msix)
1108                 goto msi_only;
1109         adapter->flags |= IGB_FLAG_HAS_MSIX;
1110
1111         /* Number of supported queues. */
1112         adapter->num_rx_queues = adapter->rss_queues;
1113         if (adapter->vfs_allocated_count)
1114                 adapter->num_tx_queues = 1;
1115         else
1116                 adapter->num_tx_queues = adapter->rss_queues;
1117
1118         /* start with one vector for every Rx queue */
1119         numvecs = adapter->num_rx_queues;
1120
1121         /* if Tx handler is separate add 1 for every Tx queue */
1122         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1123                 numvecs += adapter->num_tx_queues;
1124
1125         /* store the number of vectors reserved for queues */
1126         adapter->num_q_vectors = numvecs;
1127
1128         /* add 1 vector for link status interrupts */
1129         numvecs++;
1130         for (i = 0; i < numvecs; i++)
1131                 adapter->msix_entries[i].entry = i;
1132
1133         err = pci_enable_msix_range(adapter->pdev,
1134                                     adapter->msix_entries,
1135                                     numvecs,
1136                                     numvecs);
1137         if (err > 0)
1138                 return;
1139
1140         igb_reset_interrupt_capability(adapter);
1141
1142         /* If we can't do MSI-X, try MSI */
1143 msi_only:
1144         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1145 #ifdef CONFIG_PCI_IOV
1146         /* disable SR-IOV for non MSI-X configurations */
1147         if (adapter->vf_data) {
1148                 struct e1000_hw *hw = &adapter->hw;
1149                 /* disable iov and allow time for transactions to clear */
1150                 pci_disable_sriov(adapter->pdev);
1151                 msleep(500);
1152
1153                 kfree(adapter->vf_mac_list);
1154                 adapter->vf_mac_list = NULL;
1155                 kfree(adapter->vf_data);
1156                 adapter->vf_data = NULL;
1157                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1158                 wrfl();
1159                 msleep(100);
1160                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1161         }
1162 #endif
1163         adapter->vfs_allocated_count = 0;
1164         adapter->rss_queues = 1;
1165         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1166         adapter->num_rx_queues = 1;
1167         adapter->num_tx_queues = 1;
1168         adapter->num_q_vectors = 1;
1169         if (!pci_enable_msi(adapter->pdev))
1170                 adapter->flags |= IGB_FLAG_HAS_MSI;
1171 }
1172
1173 static void igb_add_ring(struct igb_ring *ring,
1174                          struct igb_ring_container *head)
1175 {
1176         head->ring = ring;
1177         head->count++;
1178 }
1179
1180 /**
1181  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1182  *  @adapter: board private structure to initialize
1183  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1184  *  @v_idx: index of vector in adapter struct
1185  *  @txr_count: total number of Tx rings to allocate
1186  *  @txr_idx: index of first Tx ring to allocate
1187  *  @rxr_count: total number of Rx rings to allocate
1188  *  @rxr_idx: index of first Rx ring to allocate
1189  *
1190  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1191  **/
1192 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1193                               int v_count, int v_idx,
1194                               int txr_count, int txr_idx,
1195                               int rxr_count, int rxr_idx)
1196 {
1197         struct igb_q_vector *q_vector;
1198         struct igb_ring *ring;
1199         int ring_count, size;
1200
1201         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1202         if (txr_count > 1 || rxr_count > 1)
1203                 return -ENOMEM;
1204
1205         ring_count = txr_count + rxr_count;
1206         size = sizeof(struct igb_q_vector) +
1207                (sizeof(struct igb_ring) * ring_count);
1208
1209         /* allocate q_vector and rings */
1210         q_vector = adapter->q_vector[v_idx];
1211         if (!q_vector) {
1212                 q_vector = kzalloc(size, GFP_KERNEL);
1213         } else if (size > ksize(q_vector)) {
1214                 kfree_rcu(q_vector, rcu);
1215                 q_vector = kzalloc(size, GFP_KERNEL);
1216         } else {
1217                 memset(q_vector, 0, size);
1218         }
1219         if (!q_vector)
1220                 return -ENOMEM;
1221
1222         /* initialize NAPI */
1223         netif_napi_add(adapter->netdev, &q_vector->napi,
1224                        igb_poll, 64);
1225
1226         /* tie q_vector and adapter together */
1227         adapter->q_vector[v_idx] = q_vector;
1228         q_vector->adapter = adapter;
1229
1230         /* initialize work limits */
1231         q_vector->tx.work_limit = adapter->tx_work_limit;
1232
1233         /* initialize ITR configuration */
1234         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1235         q_vector->itr_val = IGB_START_ITR;
1236
1237         /* initialize pointer to rings */
1238         ring = q_vector->ring;
1239
1240         /* intialize ITR */
1241         if (rxr_count) {
1242                 /* rx or rx/tx vector */
1243                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1244                         q_vector->itr_val = adapter->rx_itr_setting;
1245         } else {
1246                 /* tx only vector */
1247                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1248                         q_vector->itr_val = adapter->tx_itr_setting;
1249         }
1250
1251         if (txr_count) {
1252                 /* assign generic ring traits */
1253                 ring->dev = &adapter->pdev->dev;
1254                 ring->netdev = adapter->netdev;
1255
1256                 /* configure backlink on ring */
1257                 ring->q_vector = q_vector;
1258
1259                 /* update q_vector Tx values */
1260                 igb_add_ring(ring, &q_vector->tx);
1261
1262                 /* For 82575, context index must be unique per ring. */
1263                 if (adapter->hw.mac.type == e1000_82575)
1264                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1265
1266                 /* apply Tx specific ring traits */
1267                 ring->count = adapter->tx_ring_count;
1268                 ring->queue_index = txr_idx;
1269
1270                 ring->cbs_enable = false;
1271                 ring->idleslope = 0;
1272                 ring->sendslope = 0;
1273                 ring->hicredit = 0;
1274                 ring->locredit = 0;
1275
1276                 u64_stats_init(&ring->tx_syncp);
1277                 u64_stats_init(&ring->tx_syncp2);
1278
1279                 /* assign ring to adapter */
1280                 adapter->tx_ring[txr_idx] = ring;
1281
1282                 /* push pointer to next ring */
1283                 ring++;
1284         }
1285
1286         if (rxr_count) {
1287                 /* assign generic ring traits */
1288                 ring->dev = &adapter->pdev->dev;
1289                 ring->netdev = adapter->netdev;
1290
1291                 /* configure backlink on ring */
1292                 ring->q_vector = q_vector;
1293
1294                 /* update q_vector Rx values */
1295                 igb_add_ring(ring, &q_vector->rx);
1296
1297                 /* set flag indicating ring supports SCTP checksum offload */
1298                 if (adapter->hw.mac.type >= e1000_82576)
1299                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1300
1301                 /* On i350, i354, i210, and i211, loopback VLAN packets
1302                  * have the tag byte-swapped.
1303                  */
1304                 if (adapter->hw.mac.type >= e1000_i350)
1305                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1306
1307                 /* apply Rx specific ring traits */
1308                 ring->count = adapter->rx_ring_count;
1309                 ring->queue_index = rxr_idx;
1310
1311                 u64_stats_init(&ring->rx_syncp);
1312
1313                 /* assign ring to adapter */
1314                 adapter->rx_ring[rxr_idx] = ring;
1315         }
1316
1317         return 0;
1318 }
1319
1320
1321 /**
1322  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1323  *  @adapter: board private structure to initialize
1324  *
1325  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1326  *  return -ENOMEM.
1327  **/
1328 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1329 {
1330         int q_vectors = adapter->num_q_vectors;
1331         int rxr_remaining = adapter->num_rx_queues;
1332         int txr_remaining = adapter->num_tx_queues;
1333         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1334         int err;
1335
1336         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1337                 for (; rxr_remaining; v_idx++) {
1338                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1339                                                  0, 0, 1, rxr_idx);
1340
1341                         if (err)
1342                                 goto err_out;
1343
1344                         /* update counts and index */
1345                         rxr_remaining--;
1346                         rxr_idx++;
1347                 }
1348         }
1349
1350         for (; v_idx < q_vectors; v_idx++) {
1351                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1352                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1353
1354                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1355                                          tqpv, txr_idx, rqpv, rxr_idx);
1356
1357                 if (err)
1358                         goto err_out;
1359
1360                 /* update counts and index */
1361                 rxr_remaining -= rqpv;
1362                 txr_remaining -= tqpv;
1363                 rxr_idx++;
1364                 txr_idx++;
1365         }
1366
1367         return 0;
1368
1369 err_out:
1370         adapter->num_tx_queues = 0;
1371         adapter->num_rx_queues = 0;
1372         adapter->num_q_vectors = 0;
1373
1374         while (v_idx--)
1375                 igb_free_q_vector(adapter, v_idx);
1376
1377         return -ENOMEM;
1378 }
1379
1380 /**
1381  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1382  *  @adapter: board private structure to initialize
1383  *  @msix: boolean value of MSIX capability
1384  *
1385  *  This function initializes the interrupts and allocates all of the queues.
1386  **/
1387 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1388 {
1389         struct pci_dev *pdev = adapter->pdev;
1390         int err;
1391
1392         igb_set_interrupt_capability(adapter, msix);
1393
1394         err = igb_alloc_q_vectors(adapter);
1395         if (err) {
1396                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1397                 goto err_alloc_q_vectors;
1398         }
1399
1400         igb_cache_ring_register(adapter);
1401
1402         return 0;
1403
1404 err_alloc_q_vectors:
1405         igb_reset_interrupt_capability(adapter);
1406         return err;
1407 }
1408
1409 /**
1410  *  igb_request_irq - initialize interrupts
1411  *  @adapter: board private structure to initialize
1412  *
1413  *  Attempts to configure interrupts using the best available
1414  *  capabilities of the hardware and kernel.
1415  **/
1416 static int igb_request_irq(struct igb_adapter *adapter)
1417 {
1418         struct net_device *netdev = adapter->netdev;
1419         struct pci_dev *pdev = adapter->pdev;
1420         int err = 0;
1421
1422         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1423                 err = igb_request_msix(adapter);
1424                 if (!err)
1425                         goto request_done;
1426                 /* fall back to MSI */
1427                 igb_free_all_tx_resources(adapter);
1428                 igb_free_all_rx_resources(adapter);
1429
1430                 igb_clear_interrupt_scheme(adapter);
1431                 err = igb_init_interrupt_scheme(adapter, false);
1432                 if (err)
1433                         goto request_done;
1434
1435                 igb_setup_all_tx_resources(adapter);
1436                 igb_setup_all_rx_resources(adapter);
1437                 igb_configure(adapter);
1438         }
1439
1440         igb_assign_vector(adapter->q_vector[0], 0);
1441
1442         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1443                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1444                                   netdev->name, adapter);
1445                 if (!err)
1446                         goto request_done;
1447
1448                 /* fall back to legacy interrupts */
1449                 igb_reset_interrupt_capability(adapter);
1450                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1451         }
1452
1453         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1454                           netdev->name, adapter);
1455
1456         if (err)
1457                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1458                         err);
1459
1460 request_done:
1461         return err;
1462 }
1463
1464 static void igb_free_irq(struct igb_adapter *adapter)
1465 {
1466         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1467                 int vector = 0, i;
1468
1469                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1470
1471                 for (i = 0; i < adapter->num_q_vectors; i++)
1472                         free_irq(adapter->msix_entries[vector++].vector,
1473                                  adapter->q_vector[i]);
1474         } else {
1475                 free_irq(adapter->pdev->irq, adapter);
1476         }
1477 }
1478
1479 /**
1480  *  igb_irq_disable - Mask off interrupt generation on the NIC
1481  *  @adapter: board private structure
1482  **/
1483 static void igb_irq_disable(struct igb_adapter *adapter)
1484 {
1485         struct e1000_hw *hw = &adapter->hw;
1486
1487         /* we need to be careful when disabling interrupts.  The VFs are also
1488          * mapped into these registers and so clearing the bits can cause
1489          * issues on the VF drivers so we only need to clear what we set
1490          */
1491         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1492                 u32 regval = rd32(E1000_EIAM);
1493
1494                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1495                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1496                 regval = rd32(E1000_EIAC);
1497                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1498         }
1499
1500         wr32(E1000_IAM, 0);
1501         wr32(E1000_IMC, ~0);
1502         wrfl();
1503         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1504                 int i;
1505
1506                 for (i = 0; i < adapter->num_q_vectors; i++)
1507                         synchronize_irq(adapter->msix_entries[i].vector);
1508         } else {
1509                 synchronize_irq(adapter->pdev->irq);
1510         }
1511 }
1512
1513 /**
1514  *  igb_irq_enable - Enable default interrupt generation settings
1515  *  @adapter: board private structure
1516  **/
1517 static void igb_irq_enable(struct igb_adapter *adapter)
1518 {
1519         struct e1000_hw *hw = &adapter->hw;
1520
1521         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1522                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1523                 u32 regval = rd32(E1000_EIAC);
1524
1525                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1526                 regval = rd32(E1000_EIAM);
1527                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1528                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1529                 if (adapter->vfs_allocated_count) {
1530                         wr32(E1000_MBVFIMR, 0xFF);
1531                         ims |= E1000_IMS_VMMB;
1532                 }
1533                 wr32(E1000_IMS, ims);
1534         } else {
1535                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1536                                 E1000_IMS_DRSTA);
1537                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1538                                 E1000_IMS_DRSTA);
1539         }
1540 }
1541
1542 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1543 {
1544         struct e1000_hw *hw = &adapter->hw;
1545         u16 pf_id = adapter->vfs_allocated_count;
1546         u16 vid = adapter->hw.mng_cookie.vlan_id;
1547         u16 old_vid = adapter->mng_vlan_id;
1548
1549         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1550                 /* add VID to filter table */
1551                 igb_vfta_set(hw, vid, pf_id, true, true);
1552                 adapter->mng_vlan_id = vid;
1553         } else {
1554                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1555         }
1556
1557         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1558             (vid != old_vid) &&
1559             !test_bit(old_vid, adapter->active_vlans)) {
1560                 /* remove VID from filter table */
1561                 igb_vfta_set(hw, vid, pf_id, false, true);
1562         }
1563 }
1564
1565 /**
1566  *  igb_release_hw_control - release control of the h/w to f/w
1567  *  @adapter: address of board private structure
1568  *
1569  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1570  *  For ASF and Pass Through versions of f/w this means that the
1571  *  driver is no longer loaded.
1572  **/
1573 static void igb_release_hw_control(struct igb_adapter *adapter)
1574 {
1575         struct e1000_hw *hw = &adapter->hw;
1576         u32 ctrl_ext;
1577
1578         /* Let firmware take over control of h/w */
1579         ctrl_ext = rd32(E1000_CTRL_EXT);
1580         wr32(E1000_CTRL_EXT,
1581                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1582 }
1583
1584 /**
1585  *  igb_get_hw_control - get control of the h/w from f/w
1586  *  @adapter: address of board private structure
1587  *
1588  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1589  *  For ASF and Pass Through versions of f/w this means that
1590  *  the driver is loaded.
1591  **/
1592 static void igb_get_hw_control(struct igb_adapter *adapter)
1593 {
1594         struct e1000_hw *hw = &adapter->hw;
1595         u32 ctrl_ext;
1596
1597         /* Let firmware know the driver has taken over */
1598         ctrl_ext = rd32(E1000_CTRL_EXT);
1599         wr32(E1000_CTRL_EXT,
1600                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1601 }
1602
1603 static void enable_fqtss(struct igb_adapter *adapter, bool enable)
1604 {
1605         struct net_device *netdev = adapter->netdev;
1606         struct e1000_hw *hw = &adapter->hw;
1607
1608         WARN_ON(hw->mac.type != e1000_i210);
1609
1610         if (enable)
1611                 adapter->flags |= IGB_FLAG_FQTSS;
1612         else
1613                 adapter->flags &= ~IGB_FLAG_FQTSS;
1614
1615         if (netif_running(netdev))
1616                 schedule_work(&adapter->reset_task);
1617 }
1618
1619 static bool is_fqtss_enabled(struct igb_adapter *adapter)
1620 {
1621         return (adapter->flags & IGB_FLAG_FQTSS) ? true : false;
1622 }
1623
1624 static void set_tx_desc_fetch_prio(struct e1000_hw *hw, int queue,
1625                                    enum tx_queue_prio prio)
1626 {
1627         u32 val;
1628
1629         WARN_ON(hw->mac.type != e1000_i210);
1630         WARN_ON(queue < 0 || queue > 4);
1631
1632         val = rd32(E1000_I210_TXDCTL(queue));
1633
1634         if (prio == TX_QUEUE_PRIO_HIGH)
1635                 val |= E1000_TXDCTL_PRIORITY;
1636         else
1637                 val &= ~E1000_TXDCTL_PRIORITY;
1638
1639         wr32(E1000_I210_TXDCTL(queue), val);
1640 }
1641
1642 static void set_queue_mode(struct e1000_hw *hw, int queue, enum queue_mode mode)
1643 {
1644         u32 val;
1645
1646         WARN_ON(hw->mac.type != e1000_i210);
1647         WARN_ON(queue < 0 || queue > 1);
1648
1649         val = rd32(E1000_I210_TQAVCC(queue));
1650
1651         if (mode == QUEUE_MODE_STREAM_RESERVATION)
1652                 val |= E1000_TQAVCC_QUEUEMODE;
1653         else
1654                 val &= ~E1000_TQAVCC_QUEUEMODE;
1655
1656         wr32(E1000_I210_TQAVCC(queue), val);
1657 }
1658
1659 static bool is_any_cbs_enabled(struct igb_adapter *adapter)
1660 {
1661         int i;
1662
1663         for (i = 0; i < adapter->num_tx_queues; i++) {
1664                 if (adapter->tx_ring[i]->cbs_enable)
1665                         return true;
1666         }
1667
1668         return false;
1669 }
1670
1671 static bool is_any_txtime_enabled(struct igb_adapter *adapter)
1672 {
1673         int i;
1674
1675         for (i = 0; i < adapter->num_tx_queues; i++) {
1676                 if (adapter->tx_ring[i]->launchtime_enable)
1677                         return true;
1678         }
1679
1680         return false;
1681 }
1682
1683 /**
1684  *  igb_config_tx_modes - Configure "Qav Tx mode" features on igb
1685  *  @adapter: pointer to adapter struct
1686  *  @queue: queue number
1687  *
1688  *  Configure CBS and Launchtime for a given hardware queue.
1689  *  Parameters are retrieved from the correct Tx ring, so
1690  *  igb_save_cbs_params() and igb_save_txtime_params() should be used
1691  *  for setting those correctly prior to this function being called.
1692  **/
1693 static void igb_config_tx_modes(struct igb_adapter *adapter, int queue)
1694 {
1695         struct net_device *netdev = adapter->netdev;
1696         struct e1000_hw *hw = &adapter->hw;
1697         struct igb_ring *ring;
1698         u32 tqavcc, tqavctrl;
1699         u16 value;
1700
1701         WARN_ON(hw->mac.type != e1000_i210);
1702         WARN_ON(queue < 0 || queue > 1);
1703         ring = adapter->tx_ring[queue];
1704
1705         /* If any of the Qav features is enabled, configure queues as SR and
1706          * with HIGH PRIO. If none is, then configure them with LOW PRIO and
1707          * as SP.
1708          */
1709         if (ring->cbs_enable || ring->launchtime_enable) {
1710                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_HIGH);
1711                 set_queue_mode(hw, queue, QUEUE_MODE_STREAM_RESERVATION);
1712         } else {
1713                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_LOW);
1714                 set_queue_mode(hw, queue, QUEUE_MODE_STRICT_PRIORITY);
1715         }
1716
1717         /* If CBS is enabled, set DataTranARB and config its parameters. */
1718         if (ring->cbs_enable || queue == 0) {
1719                 /* i210 does not allow the queue 0 to be in the Strict
1720                  * Priority mode while the Qav mode is enabled, so,
1721                  * instead of disabling strict priority mode, we give
1722                  * queue 0 the maximum of credits possible.
1723                  *
1724                  * See section 8.12.19 of the i210 datasheet, "Note:
1725                  * Queue0 QueueMode must be set to 1b when
1726                  * TransmitMode is set to Qav."
1727                  */
1728                 if (queue == 0 && !ring->cbs_enable) {
1729                         /* max "linkspeed" idleslope in kbps */
1730                         ring->idleslope = 1000000;
1731                         ring->hicredit = ETH_FRAME_LEN;
1732                 }
1733
1734                 /* Always set data transfer arbitration to credit-based
1735                  * shaper algorithm on TQAVCTRL if CBS is enabled for any of
1736                  * the queues.
1737                  */
1738                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1739                 tqavctrl |= E1000_TQAVCTRL_DATATRANARB;
1740                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1741
1742                 /* According to i210 datasheet section 7.2.7.7, we should set
1743                  * the 'idleSlope' field from TQAVCC register following the
1744                  * equation:
1745                  *
1746                  * For 100 Mbps link speed:
1747                  *
1748                  *     value = BW * 0x7735 * 0.2                          (E1)
1749                  *
1750                  * For 1000Mbps link speed:
1751                  *
1752                  *     value = BW * 0x7735 * 2                            (E2)
1753                  *
1754                  * E1 and E2 can be merged into one equation as shown below.
1755                  * Note that 'link-speed' is in Mbps.
1756                  *
1757                  *     value = BW * 0x7735 * 2 * link-speed
1758                  *                           --------------               (E3)
1759                  *                                1000
1760                  *
1761                  * 'BW' is the percentage bandwidth out of full link speed
1762                  * which can be found with the following equation. Note that
1763                  * idleSlope here is the parameter from this function which
1764                  * is in kbps.
1765                  *
1766                  *     BW =     idleSlope
1767                  *          -----------------                             (E4)
1768                  *          link-speed * 1000
1769                  *
1770                  * That said, we can come up with a generic equation to
1771                  * calculate the value we should set it TQAVCC register by
1772                  * replacing 'BW' in E3 by E4. The resulting equation is:
1773                  *
1774                  * value =     idleSlope     * 0x7735 * 2 * link-speed
1775                  *         -----------------            --------------    (E5)
1776                  *         link-speed * 1000                 1000
1777                  *
1778                  * 'link-speed' is present in both sides of the fraction so
1779                  * it is canceled out. The final equation is the following:
1780                  *
1781                  *     value = idleSlope * 61034
1782                  *             -----------------                          (E6)
1783                  *                  1000000
1784                  *
1785                  * NOTE: For i210, given the above, we can see that idleslope
1786                  *       is represented in 16.38431 kbps units by the value at
1787                  *       the TQAVCC register (1Gbps / 61034), which reduces
1788                  *       the granularity for idleslope increments.
1789                  *       For instance, if you want to configure a 2576kbps
1790                  *       idleslope, the value to be written on the register
1791                  *       would have to be 157.23. If rounded down, you end
1792                  *       up with less bandwidth available than originally
1793                  *       required (~2572 kbps). If rounded up, you end up
1794                  *       with a higher bandwidth (~2589 kbps). Below the
1795                  *       approach we take is to always round up the
1796                  *       calculated value, so the resulting bandwidth might
1797                  *       be slightly higher for some configurations.
1798                  */
1799                 value = DIV_ROUND_UP_ULL(ring->idleslope * 61034ULL, 1000000);
1800
1801                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1802                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1803                 tqavcc |= value;
1804                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1805
1806                 wr32(E1000_I210_TQAVHC(queue),
1807                      0x80000000 + ring->hicredit * 0x7735);
1808         } else {
1809
1810                 /* Set idleSlope to zero. */
1811                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1812                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1813                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1814
1815                 /* Set hiCredit to zero. */
1816                 wr32(E1000_I210_TQAVHC(queue), 0);
1817
1818                 /* If CBS is not enabled for any queues anymore, then return to
1819                  * the default state of Data Transmission Arbitration on
1820                  * TQAVCTRL.
1821                  */
1822                 if (!is_any_cbs_enabled(adapter)) {
1823                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1824                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANARB;
1825                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1826                 }
1827         }
1828
1829         /* If LaunchTime is enabled, set DataTranTIM. */
1830         if (ring->launchtime_enable) {
1831                 /* Always set DataTranTIM on TQAVCTRL if LaunchTime is enabled
1832                  * for any of the SR queues, and configure fetchtime delta.
1833                  * XXX NOTE:
1834                  *     - LaunchTime will be enabled for all SR queues.
1835                  *     - A fixed offset can be added relative to the launch
1836                  *       time of all packets if configured at reg LAUNCH_OS0.
1837                  *       We are keeping it as 0 for now (default value).
1838                  */
1839                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1840                 tqavctrl |= E1000_TQAVCTRL_DATATRANTIM |
1841                        E1000_TQAVCTRL_FETCHTIME_DELTA;
1842                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1843         } else {
1844                 /* If Launchtime is not enabled for any SR queues anymore,
1845                  * then clear DataTranTIM on TQAVCTRL and clear fetchtime delta,
1846                  * effectively disabling Launchtime.
1847                  */
1848                 if (!is_any_txtime_enabled(adapter)) {
1849                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1850                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANTIM;
1851                         tqavctrl &= ~E1000_TQAVCTRL_FETCHTIME_DELTA;
1852                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1853                 }
1854         }
1855
1856         /* XXX: In i210 controller the sendSlope and loCredit parameters from
1857          * CBS are not configurable by software so we don't do any 'controller
1858          * configuration' in respect to these parameters.
1859          */
1860
1861         netdev_dbg(netdev, "Qav Tx mode: cbs %s, launchtime %s, queue %d \
1862                             idleslope %d sendslope %d hiCredit %d \
1863                             locredit %d\n",
1864                    (ring->cbs_enable) ? "enabled" : "disabled",
1865                    (ring->launchtime_enable) ? "enabled" : "disabled", queue,
1866                    ring->idleslope, ring->sendslope, ring->hicredit,
1867                    ring->locredit);
1868 }
1869
1870 static int igb_save_txtime_params(struct igb_adapter *adapter, int queue,
1871                                   bool enable)
1872 {
1873         struct igb_ring *ring;
1874
1875         if (queue < 0 || queue > adapter->num_tx_queues)
1876                 return -EINVAL;
1877
1878         ring = adapter->tx_ring[queue];
1879         ring->launchtime_enable = enable;
1880
1881         return 0;
1882 }
1883
1884 static int igb_save_cbs_params(struct igb_adapter *adapter, int queue,
1885                                bool enable, int idleslope, int sendslope,
1886                                int hicredit, int locredit)
1887 {
1888         struct igb_ring *ring;
1889
1890         if (queue < 0 || queue > adapter->num_tx_queues)
1891                 return -EINVAL;
1892
1893         ring = adapter->tx_ring[queue];
1894
1895         ring->cbs_enable = enable;
1896         ring->idleslope = idleslope;
1897         ring->sendslope = sendslope;
1898         ring->hicredit = hicredit;
1899         ring->locredit = locredit;
1900
1901         return 0;
1902 }
1903
1904 /**
1905  *  igb_setup_tx_mode - Switch to/from Qav Tx mode when applicable
1906  *  @adapter: pointer to adapter struct
1907  *
1908  *  Configure TQAVCTRL register switching the controller's Tx mode
1909  *  if FQTSS mode is enabled or disabled. Additionally, will issue
1910  *  a call to igb_config_tx_modes() per queue so any previously saved
1911  *  Tx parameters are applied.
1912  **/
1913 static void igb_setup_tx_mode(struct igb_adapter *adapter)
1914 {
1915         struct net_device *netdev = adapter->netdev;
1916         struct e1000_hw *hw = &adapter->hw;
1917         u32 val;
1918
1919         /* Only i210 controller supports changing the transmission mode. */
1920         if (hw->mac.type != e1000_i210)
1921                 return;
1922
1923         if (is_fqtss_enabled(adapter)) {
1924                 int i, max_queue;
1925
1926                 /* Configure TQAVCTRL register: set transmit mode to 'Qav',
1927                  * set data fetch arbitration to 'round robin', set SP_WAIT_SR
1928                  * so SP queues wait for SR ones.
1929                  */
1930                 val = rd32(E1000_I210_TQAVCTRL);
1931                 val |= E1000_TQAVCTRL_XMIT_MODE | E1000_TQAVCTRL_SP_WAIT_SR;
1932                 val &= ~E1000_TQAVCTRL_DATAFETCHARB;
1933                 wr32(E1000_I210_TQAVCTRL, val);
1934
1935                 /* Configure Tx and Rx packet buffers sizes as described in
1936                  * i210 datasheet section 7.2.7.7.
1937                  */
1938                 val = rd32(E1000_TXPBS);
1939                 val &= ~I210_TXPBSIZE_MASK;
1940                 val |= I210_TXPBSIZE_PB0_8KB | I210_TXPBSIZE_PB1_8KB |
1941                         I210_TXPBSIZE_PB2_4KB | I210_TXPBSIZE_PB3_4KB;
1942                 wr32(E1000_TXPBS, val);
1943
1944                 val = rd32(E1000_RXPBS);
1945                 val &= ~I210_RXPBSIZE_MASK;
1946                 val |= I210_RXPBSIZE_PB_32KB;
1947                 wr32(E1000_RXPBS, val);
1948
1949                 /* Section 8.12.9 states that MAX_TPKT_SIZE from DTXMXPKTSZ
1950                  * register should not exceed the buffer size programmed in
1951                  * TXPBS. The smallest buffer size programmed in TXPBS is 4kB
1952                  * so according to the datasheet we should set MAX_TPKT_SIZE to
1953                  * 4kB / 64.
1954                  *
1955                  * However, when we do so, no frame from queue 2 and 3 are
1956                  * transmitted.  It seems the MAX_TPKT_SIZE should not be great
1957                  * or _equal_ to the buffer size programmed in TXPBS. For this
1958                  * reason, we set set MAX_ TPKT_SIZE to (4kB - 1) / 64.
1959                  */
1960                 val = (4096 - 1) / 64;
1961                 wr32(E1000_I210_DTXMXPKTSZ, val);
1962
1963                 /* Since FQTSS mode is enabled, apply any CBS configuration
1964                  * previously set. If no previous CBS configuration has been
1965                  * done, then the initial configuration is applied, which means
1966                  * CBS is disabled.
1967                  */
1968                 max_queue = (adapter->num_tx_queues < I210_SR_QUEUES_NUM) ?
1969                             adapter->num_tx_queues : I210_SR_QUEUES_NUM;
1970
1971                 for (i = 0; i < max_queue; i++) {
1972                         igb_config_tx_modes(adapter, i);
1973                 }
1974         } else {
1975                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
1976                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
1977                 wr32(E1000_I210_DTXMXPKTSZ, I210_DTXMXPKTSZ_DEFAULT);
1978
1979                 val = rd32(E1000_I210_TQAVCTRL);
1980                 /* According to Section 8.12.21, the other flags we've set when
1981                  * enabling FQTSS are not relevant when disabling FQTSS so we
1982                  * don't set they here.
1983                  */
1984                 val &= ~E1000_TQAVCTRL_XMIT_MODE;
1985                 wr32(E1000_I210_TQAVCTRL, val);
1986         }
1987
1988         netdev_dbg(netdev, "FQTSS %s\n", (is_fqtss_enabled(adapter)) ?
1989                    "enabled" : "disabled");
1990 }
1991
1992 /**
1993  *  igb_configure - configure the hardware for RX and TX
1994  *  @adapter: private board structure
1995  **/
1996 static void igb_configure(struct igb_adapter *adapter)
1997 {
1998         struct net_device *netdev = adapter->netdev;
1999         int i;
2000
2001         igb_get_hw_control(adapter);
2002         igb_set_rx_mode(netdev);
2003         igb_setup_tx_mode(adapter);
2004
2005         igb_restore_vlan(adapter);
2006
2007         igb_setup_tctl(adapter);
2008         igb_setup_mrqc(adapter);
2009         igb_setup_rctl(adapter);
2010
2011         igb_nfc_filter_restore(adapter);
2012         igb_configure_tx(adapter);
2013         igb_configure_rx(adapter);
2014
2015         igb_rx_fifo_flush_82575(&adapter->hw);
2016
2017         /* call igb_desc_unused which always leaves
2018          * at least 1 descriptor unused to make sure
2019          * next_to_use != next_to_clean
2020          */
2021         for (i = 0; i < adapter->num_rx_queues; i++) {
2022                 struct igb_ring *ring = adapter->rx_ring[i];
2023                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
2024         }
2025 }
2026
2027 /**
2028  *  igb_power_up_link - Power up the phy/serdes link
2029  *  @adapter: address of board private structure
2030  **/
2031 void igb_power_up_link(struct igb_adapter *adapter)
2032 {
2033         igb_reset_phy(&adapter->hw);
2034
2035         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2036                 igb_power_up_phy_copper(&adapter->hw);
2037         else
2038                 igb_power_up_serdes_link_82575(&adapter->hw);
2039
2040         igb_setup_link(&adapter->hw);
2041 }
2042
2043 /**
2044  *  igb_power_down_link - Power down the phy/serdes link
2045  *  @adapter: address of board private structure
2046  */
2047 static void igb_power_down_link(struct igb_adapter *adapter)
2048 {
2049         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2050                 igb_power_down_phy_copper_82575(&adapter->hw);
2051         else
2052                 igb_shutdown_serdes_link_82575(&adapter->hw);
2053 }
2054
2055 /**
2056  * Detect and switch function for Media Auto Sense
2057  * @adapter: address of the board private structure
2058  **/
2059 static void igb_check_swap_media(struct igb_adapter *adapter)
2060 {
2061         struct e1000_hw *hw = &adapter->hw;
2062         u32 ctrl_ext, connsw;
2063         bool swap_now = false;
2064
2065         ctrl_ext = rd32(E1000_CTRL_EXT);
2066         connsw = rd32(E1000_CONNSW);
2067
2068         /* need to live swap if current media is copper and we have fiber/serdes
2069          * to go to.
2070          */
2071
2072         if ((hw->phy.media_type == e1000_media_type_copper) &&
2073             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
2074                 swap_now = true;
2075         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
2076                    !(connsw & E1000_CONNSW_SERDESD)) {
2077                 /* copper signal takes time to appear */
2078                 if (adapter->copper_tries < 4) {
2079                         adapter->copper_tries++;
2080                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
2081                         wr32(E1000_CONNSW, connsw);
2082                         return;
2083                 } else {
2084                         adapter->copper_tries = 0;
2085                         if ((connsw & E1000_CONNSW_PHYSD) &&
2086                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
2087                                 swap_now = true;
2088                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
2089                                 wr32(E1000_CONNSW, connsw);
2090                         }
2091                 }
2092         }
2093
2094         if (!swap_now)
2095                 return;
2096
2097         switch (hw->phy.media_type) {
2098         case e1000_media_type_copper:
2099                 netdev_info(adapter->netdev,
2100                         "MAS: changing media to fiber/serdes\n");
2101                 ctrl_ext |=
2102                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2103                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2104                 adapter->copper_tries = 0;
2105                 break;
2106         case e1000_media_type_internal_serdes:
2107         case e1000_media_type_fiber:
2108                 netdev_info(adapter->netdev,
2109                         "MAS: changing media to copper\n");
2110                 ctrl_ext &=
2111                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2112                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2113                 break;
2114         default:
2115                 /* shouldn't get here during regular operation */
2116                 netdev_err(adapter->netdev,
2117                         "AMS: Invalid media type found, returning\n");
2118                 break;
2119         }
2120         wr32(E1000_CTRL_EXT, ctrl_ext);
2121 }
2122
2123 /**
2124  *  igb_up - Open the interface and prepare it to handle traffic
2125  *  @adapter: board private structure
2126  **/
2127 int igb_up(struct igb_adapter *adapter)
2128 {
2129         struct e1000_hw *hw = &adapter->hw;
2130         int i;
2131
2132         /* hardware has been reset, we need to reload some things */
2133         igb_configure(adapter);
2134
2135         clear_bit(__IGB_DOWN, &adapter->state);
2136
2137         for (i = 0; i < adapter->num_q_vectors; i++)
2138                 napi_enable(&(adapter->q_vector[i]->napi));
2139
2140         if (adapter->flags & IGB_FLAG_HAS_MSIX)
2141                 igb_configure_msix(adapter);
2142         else
2143                 igb_assign_vector(adapter->q_vector[0], 0);
2144
2145         /* Clear any pending interrupts. */
2146         rd32(E1000_TSICR);
2147         rd32(E1000_ICR);
2148         igb_irq_enable(adapter);
2149
2150         /* notify VFs that reset has been completed */
2151         if (adapter->vfs_allocated_count) {
2152                 u32 reg_data = rd32(E1000_CTRL_EXT);
2153
2154                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2155                 wr32(E1000_CTRL_EXT, reg_data);
2156         }
2157
2158         netif_tx_start_all_queues(adapter->netdev);
2159
2160         /* start the watchdog. */
2161         hw->mac.get_link_status = 1;
2162         schedule_work(&adapter->watchdog_task);
2163
2164         if ((adapter->flags & IGB_FLAG_EEE) &&
2165             (!hw->dev_spec._82575.eee_disable))
2166                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
2167
2168         return 0;
2169 }
2170
2171 void igb_down(struct igb_adapter *adapter)
2172 {
2173         struct net_device *netdev = adapter->netdev;
2174         struct e1000_hw *hw = &adapter->hw;
2175         u32 tctl, rctl;
2176         int i;
2177
2178         /* signal that we're down so the interrupt handler does not
2179          * reschedule our watchdog timer
2180          */
2181         set_bit(__IGB_DOWN, &adapter->state);
2182
2183         /* disable receives in the hardware */
2184         rctl = rd32(E1000_RCTL);
2185         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
2186         /* flush and sleep below */
2187
2188         igb_nfc_filter_exit(adapter);
2189
2190         netif_carrier_off(netdev);
2191         netif_tx_stop_all_queues(netdev);
2192
2193         /* disable transmits in the hardware */
2194         tctl = rd32(E1000_TCTL);
2195         tctl &= ~E1000_TCTL_EN;
2196         wr32(E1000_TCTL, tctl);
2197         /* flush both disables and wait for them to finish */
2198         wrfl();
2199         usleep_range(10000, 11000);
2200
2201         igb_irq_disable(adapter);
2202
2203         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
2204
2205         for (i = 0; i < adapter->num_q_vectors; i++) {
2206                 if (adapter->q_vector[i]) {
2207                         napi_synchronize(&adapter->q_vector[i]->napi);
2208                         napi_disable(&adapter->q_vector[i]->napi);
2209                 }
2210         }
2211
2212         del_timer_sync(&adapter->watchdog_timer);
2213         del_timer_sync(&adapter->phy_info_timer);
2214
2215         /* record the stats before reset*/
2216         spin_lock(&adapter->stats64_lock);
2217         igb_update_stats(adapter);
2218         spin_unlock(&adapter->stats64_lock);
2219
2220         adapter->link_speed = 0;
2221         adapter->link_duplex = 0;
2222
2223         if (!pci_channel_offline(adapter->pdev))
2224                 igb_reset(adapter);
2225
2226         /* clear VLAN promisc flag so VFTA will be updated if necessary */
2227         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
2228
2229         igb_clean_all_tx_rings(adapter);
2230         igb_clean_all_rx_rings(adapter);
2231 #ifdef CONFIG_IGB_DCA
2232
2233         /* since we reset the hardware DCA settings were cleared */
2234         igb_setup_dca(adapter);
2235 #endif
2236 }
2237
2238 void igb_reinit_locked(struct igb_adapter *adapter)
2239 {
2240         WARN_ON(in_interrupt());
2241         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2242                 usleep_range(1000, 2000);
2243         igb_down(adapter);
2244         igb_up(adapter);
2245         clear_bit(__IGB_RESETTING, &adapter->state);
2246 }
2247
2248 /** igb_enable_mas - Media Autosense re-enable after swap
2249  *
2250  * @adapter: adapter struct
2251  **/
2252 static void igb_enable_mas(struct igb_adapter *adapter)
2253 {
2254         struct e1000_hw *hw = &adapter->hw;
2255         u32 connsw = rd32(E1000_CONNSW);
2256
2257         /* configure for SerDes media detect */
2258         if ((hw->phy.media_type == e1000_media_type_copper) &&
2259             (!(connsw & E1000_CONNSW_SERDESD))) {
2260                 connsw |= E1000_CONNSW_ENRGSRC;
2261                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
2262                 wr32(E1000_CONNSW, connsw);
2263                 wrfl();
2264         }
2265 }
2266
2267 void igb_reset(struct igb_adapter *adapter)
2268 {
2269         struct pci_dev *pdev = adapter->pdev;
2270         struct e1000_hw *hw = &adapter->hw;
2271         struct e1000_mac_info *mac = &hw->mac;
2272         struct e1000_fc_info *fc = &hw->fc;
2273         u32 pba, hwm;
2274
2275         /* Repartition Pba for greater than 9k mtu
2276          * To take effect CTRL.RST is required.
2277          */
2278         switch (mac->type) {
2279         case e1000_i350:
2280         case e1000_i354:
2281         case e1000_82580:
2282                 pba = rd32(E1000_RXPBS);
2283                 pba = igb_rxpbs_adjust_82580(pba);
2284                 break;
2285         case e1000_82576:
2286                 pba = rd32(E1000_RXPBS);
2287                 pba &= E1000_RXPBS_SIZE_MASK_82576;
2288                 break;
2289         case e1000_82575:
2290         case e1000_i210:
2291         case e1000_i211:
2292         default:
2293                 pba = E1000_PBA_34K;
2294                 break;
2295         }
2296
2297         if (mac->type == e1000_82575) {
2298                 u32 min_rx_space, min_tx_space, needed_tx_space;
2299
2300                 /* write Rx PBA so that hardware can report correct Tx PBA */
2301                 wr32(E1000_PBA, pba);
2302
2303                 /* To maintain wire speed transmits, the Tx FIFO should be
2304                  * large enough to accommodate two full transmit packets,
2305                  * rounded up to the next 1KB and expressed in KB.  Likewise,
2306                  * the Rx FIFO should be large enough to accommodate at least
2307                  * one full receive packet and is similarly rounded up and
2308                  * expressed in KB.
2309                  */
2310                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
2311
2312                 /* The Tx FIFO also stores 16 bytes of information about the Tx
2313                  * but don't include Ethernet FCS because hardware appends it.
2314                  * We only need to round down to the nearest 512 byte block
2315                  * count since the value we care about is 2 frames, not 1.
2316                  */
2317                 min_tx_space = adapter->max_frame_size;
2318                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
2319                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
2320
2321                 /* upper 16 bits has Tx packet buffer allocation size in KB */
2322                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
2323
2324                 /* If current Tx allocation is less than the min Tx FIFO size,
2325                  * and the min Tx FIFO size is less than the current Rx FIFO
2326                  * allocation, take space away from current Rx allocation.
2327                  */
2328                 if (needed_tx_space < pba) {
2329                         pba -= needed_tx_space;
2330
2331                         /* if short on Rx space, Rx wins and must trump Tx
2332                          * adjustment
2333                          */
2334                         if (pba < min_rx_space)
2335                                 pba = min_rx_space;
2336                 }
2337
2338                 /* adjust PBA for jumbo frames */
2339                 wr32(E1000_PBA, pba);
2340         }
2341
2342         /* flow control settings
2343          * The high water mark must be low enough to fit one full frame
2344          * after transmitting the pause frame.  As such we must have enough
2345          * space to allow for us to complete our current transmit and then
2346          * receive the frame that is in progress from the link partner.
2347          * Set it to:
2348          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
2349          */
2350         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
2351
2352         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
2353         fc->low_water = fc->high_water - 16;
2354         fc->pause_time = 0xFFFF;
2355         fc->send_xon = 1;
2356         fc->current_mode = fc->requested_mode;
2357
2358         /* disable receive for all VFs and wait one second */
2359         if (adapter->vfs_allocated_count) {
2360                 int i;
2361
2362                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
2363                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
2364
2365                 /* ping all the active vfs to let them know we are going down */
2366                 igb_ping_all_vfs(adapter);
2367
2368                 /* disable transmits and receives */
2369                 wr32(E1000_VFRE, 0);
2370                 wr32(E1000_VFTE, 0);
2371         }
2372
2373         /* Allow time for pending master requests to run */
2374         hw->mac.ops.reset_hw(hw);
2375         wr32(E1000_WUC, 0);
2376
2377         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2378                 /* need to resetup here after media swap */
2379                 adapter->ei.get_invariants(hw);
2380                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2381         }
2382         if ((mac->type == e1000_82575) &&
2383             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
2384                 igb_enable_mas(adapter);
2385         }
2386         if (hw->mac.ops.init_hw(hw))
2387                 dev_err(&pdev->dev, "Hardware Error\n");
2388
2389         /* RAR registers were cleared during init_hw, clear mac table */
2390         igb_flush_mac_table(adapter);
2391         __dev_uc_unsync(adapter->netdev, NULL);
2392
2393         /* Recover default RAR entry */
2394         igb_set_default_mac_filter(adapter);
2395
2396         /* Flow control settings reset on hardware reset, so guarantee flow
2397          * control is off when forcing speed.
2398          */
2399         if (!hw->mac.autoneg)
2400                 igb_force_mac_fc(hw);
2401
2402         igb_init_dmac(adapter, pba);
2403 #ifdef CONFIG_IGB_HWMON
2404         /* Re-initialize the thermal sensor on i350 devices. */
2405         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2406                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2407                         /* If present, re-initialize the external thermal sensor
2408                          * interface.
2409                          */
2410                         if (adapter->ets)
2411                                 mac->ops.init_thermal_sensor_thresh(hw);
2412                 }
2413         }
2414 #endif
2415         /* Re-establish EEE setting */
2416         if (hw->phy.media_type == e1000_media_type_copper) {
2417                 switch (mac->type) {
2418                 case e1000_i350:
2419                 case e1000_i210:
2420                 case e1000_i211:
2421                         igb_set_eee_i350(hw, true, true);
2422                         break;
2423                 case e1000_i354:
2424                         igb_set_eee_i354(hw, true, true);
2425                         break;
2426                 default:
2427                         break;
2428                 }
2429         }
2430         if (!netif_running(adapter->netdev))
2431                 igb_power_down_link(adapter);
2432
2433         igb_update_mng_vlan(adapter);
2434
2435         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2436         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2437
2438         /* Re-enable PTP, where applicable. */
2439         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2440                 igb_ptp_reset(adapter);
2441
2442         igb_get_phy_info(hw);
2443 }
2444
2445 static netdev_features_t igb_fix_features(struct net_device *netdev,
2446         netdev_features_t features)
2447 {
2448         /* Since there is no support for separate Rx/Tx vlan accel
2449          * enable/disable make sure Tx flag is always in same state as Rx.
2450          */
2451         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2452                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2453         else
2454                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2455
2456         return features;
2457 }
2458
2459 static int igb_set_features(struct net_device *netdev,
2460         netdev_features_t features)
2461 {
2462         netdev_features_t changed = netdev->features ^ features;
2463         struct igb_adapter *adapter = netdev_priv(netdev);
2464
2465         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2466                 igb_vlan_mode(netdev, features);
2467
2468         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2469                 return 0;
2470
2471         if (!(features & NETIF_F_NTUPLE)) {
2472                 struct hlist_node *node2;
2473                 struct igb_nfc_filter *rule;
2474
2475                 spin_lock(&adapter->nfc_lock);
2476                 hlist_for_each_entry_safe(rule, node2,
2477                                           &adapter->nfc_filter_list, nfc_node) {
2478                         igb_erase_filter(adapter, rule);
2479                         hlist_del(&rule->nfc_node);
2480                         kfree(rule);
2481                 }
2482                 spin_unlock(&adapter->nfc_lock);
2483                 adapter->nfc_filter_count = 0;
2484         }
2485
2486         netdev->features = features;
2487
2488         if (netif_running(netdev))
2489                 igb_reinit_locked(adapter);
2490         else
2491                 igb_reset(adapter);
2492
2493         return 0;
2494 }
2495
2496 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2497                            struct net_device *dev,
2498                            const unsigned char *addr, u16 vid,
2499                            u16 flags)
2500 {
2501         /* guarantee we can provide a unique filter for the unicast address */
2502         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2503                 struct igb_adapter *adapter = netdev_priv(dev);
2504                 int vfn = adapter->vfs_allocated_count;
2505
2506                 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2507                         return -ENOMEM;
2508         }
2509
2510         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2511 }
2512
2513 #define IGB_MAX_MAC_HDR_LEN     127
2514 #define IGB_MAX_NETWORK_HDR_LEN 511
2515
2516 static netdev_features_t
2517 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2518                    netdev_features_t features)
2519 {
2520         unsigned int network_hdr_len, mac_hdr_len;
2521
2522         /* Make certain the headers can be described by a context descriptor */
2523         mac_hdr_len = skb_network_header(skb) - skb->data;
2524         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2525                 return features & ~(NETIF_F_HW_CSUM |
2526                                     NETIF_F_SCTP_CRC |
2527                                     NETIF_F_HW_VLAN_CTAG_TX |
2528                                     NETIF_F_TSO |
2529                                     NETIF_F_TSO6);
2530
2531         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2532         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2533                 return features & ~(NETIF_F_HW_CSUM |
2534                                     NETIF_F_SCTP_CRC |
2535                                     NETIF_F_TSO |
2536                                     NETIF_F_TSO6);
2537
2538         /* We can only support IPV4 TSO in tunnels if we can mangle the
2539          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2540          */
2541         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2542                 features &= ~NETIF_F_TSO;
2543
2544         return features;
2545 }
2546
2547 static void igb_offload_apply(struct igb_adapter *adapter, s32 queue)
2548 {
2549         if (!is_fqtss_enabled(adapter)) {
2550                 enable_fqtss(adapter, true);
2551                 return;
2552         }
2553
2554         igb_config_tx_modes(adapter, queue);
2555
2556         if (!is_any_cbs_enabled(adapter) && !is_any_txtime_enabled(adapter))
2557                 enable_fqtss(adapter, false);
2558 }
2559
2560 static int igb_offload_cbs(struct igb_adapter *adapter,
2561                            struct tc_cbs_qopt_offload *qopt)
2562 {
2563         struct e1000_hw *hw = &adapter->hw;
2564         int err;
2565
2566         /* CBS offloading is only supported by i210 controller. */
2567         if (hw->mac.type != e1000_i210)
2568                 return -EOPNOTSUPP;
2569
2570         /* CBS offloading is only supported by queue 0 and queue 1. */
2571         if (qopt->queue < 0 || qopt->queue > 1)
2572                 return -EINVAL;
2573
2574         err = igb_save_cbs_params(adapter, qopt->queue, qopt->enable,
2575                                   qopt->idleslope, qopt->sendslope,
2576                                   qopt->hicredit, qopt->locredit);
2577         if (err)
2578                 return err;
2579
2580         igb_offload_apply(adapter, qopt->queue);
2581
2582         return 0;
2583 }
2584
2585 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2586 #define VLAN_PRIO_FULL_MASK (0x07)
2587
2588 static int igb_parse_cls_flower(struct igb_adapter *adapter,
2589                                 struct tc_cls_flower_offload *f,
2590                                 int traffic_class,
2591                                 struct igb_nfc_filter *input)
2592 {
2593         struct netlink_ext_ack *extack = f->common.extack;
2594
2595         if (f->dissector->used_keys &
2596             ~(BIT(FLOW_DISSECTOR_KEY_BASIC) |
2597               BIT(FLOW_DISSECTOR_KEY_CONTROL) |
2598               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2599               BIT(FLOW_DISSECTOR_KEY_VLAN))) {
2600                 NL_SET_ERR_MSG_MOD(extack,
2601                                    "Unsupported key used, only BASIC, CONTROL, ETH_ADDRS and VLAN are supported");
2602                 return -EOPNOTSUPP;
2603         }
2604
2605         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2606                 struct flow_dissector_key_eth_addrs *key, *mask;
2607
2608                 key = skb_flow_dissector_target(f->dissector,
2609                                                 FLOW_DISSECTOR_KEY_ETH_ADDRS,
2610                                                 f->key);
2611                 mask = skb_flow_dissector_target(f->dissector,
2612                                                  FLOW_DISSECTOR_KEY_ETH_ADDRS,
2613                                                  f->mask);
2614
2615                 if (!is_zero_ether_addr(mask->dst)) {
2616                         if (!is_broadcast_ether_addr(mask->dst)) {
2617                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for destination MAC address");
2618                                 return -EINVAL;
2619                         }
2620
2621                         input->filter.match_flags |=
2622                                 IGB_FILTER_FLAG_DST_MAC_ADDR;
2623                         ether_addr_copy(input->filter.dst_addr, key->dst);
2624                 }
2625
2626                 if (!is_zero_ether_addr(mask->src)) {
2627                         if (!is_broadcast_ether_addr(mask->src)) {
2628                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for source MAC address");
2629                                 return -EINVAL;
2630                         }
2631
2632                         input->filter.match_flags |=
2633                                 IGB_FILTER_FLAG_SRC_MAC_ADDR;
2634                         ether_addr_copy(input->filter.src_addr, key->src);
2635                 }
2636         }
2637
2638         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
2639                 struct flow_dissector_key_basic *key, *mask;
2640
2641                 key = skb_flow_dissector_target(f->dissector,
2642                                                 FLOW_DISSECTOR_KEY_BASIC,
2643                                                 f->key);
2644                 mask = skb_flow_dissector_target(f->dissector,
2645                                                  FLOW_DISSECTOR_KEY_BASIC,
2646                                                  f->mask);
2647
2648                 if (mask->n_proto) {
2649                         if (mask->n_proto != ETHER_TYPE_FULL_MASK) {
2650                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for EtherType filter");
2651                                 return -EINVAL;
2652                         }
2653
2654                         input->filter.match_flags |= IGB_FILTER_FLAG_ETHER_TYPE;
2655                         input->filter.etype = key->n_proto;
2656                 }
2657         }
2658
2659         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
2660                 struct flow_dissector_key_vlan *key, *mask;
2661
2662                 key = skb_flow_dissector_target(f->dissector,
2663                                                 FLOW_DISSECTOR_KEY_VLAN,
2664                                                 f->key);
2665                 mask = skb_flow_dissector_target(f->dissector,
2666                                                  FLOW_DISSECTOR_KEY_VLAN,
2667                                                  f->mask);
2668
2669                 if (mask->vlan_priority) {
2670                         if (mask->vlan_priority != VLAN_PRIO_FULL_MASK) {
2671                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for VLAN priority");
2672                                 return -EINVAL;
2673                         }
2674
2675                         input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2676                         input->filter.vlan_tci = key->vlan_priority;
2677                 }
2678         }
2679
2680         input->action = traffic_class;
2681         input->cookie = f->cookie;
2682
2683         return 0;
2684 }
2685
2686 static int igb_configure_clsflower(struct igb_adapter *adapter,
2687                                    struct tc_cls_flower_offload *cls_flower)
2688 {
2689         struct netlink_ext_ack *extack = cls_flower->common.extack;
2690         struct igb_nfc_filter *filter, *f;
2691         int err, tc;
2692
2693         tc = tc_classid_to_hwtc(adapter->netdev, cls_flower->classid);
2694         if (tc < 0) {
2695                 NL_SET_ERR_MSG_MOD(extack, "Invalid traffic class");
2696                 return -EINVAL;
2697         }
2698
2699         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
2700         if (!filter)
2701                 return -ENOMEM;
2702
2703         err = igb_parse_cls_flower(adapter, cls_flower, tc, filter);
2704         if (err < 0)
2705                 goto err_parse;
2706
2707         spin_lock(&adapter->nfc_lock);
2708
2709         hlist_for_each_entry(f, &adapter->nfc_filter_list, nfc_node) {
2710                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2711                         err = -EEXIST;
2712                         NL_SET_ERR_MSG_MOD(extack,
2713                                            "This filter is already set in ethtool");
2714                         goto err_locked;
2715                 }
2716         }
2717
2718         hlist_for_each_entry(f, &adapter->cls_flower_list, nfc_node) {
2719                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2720                         err = -EEXIST;
2721                         NL_SET_ERR_MSG_MOD(extack,
2722                                            "This filter is already set in cls_flower");
2723                         goto err_locked;
2724                 }
2725         }
2726
2727         err = igb_add_filter(adapter, filter);
2728         if (err < 0) {
2729                 NL_SET_ERR_MSG_MOD(extack, "Could not add filter to the adapter");
2730                 goto err_locked;
2731         }
2732
2733         hlist_add_head(&filter->nfc_node, &adapter->cls_flower_list);
2734
2735         spin_unlock(&adapter->nfc_lock);
2736
2737         return 0;
2738
2739 err_locked:
2740         spin_unlock(&adapter->nfc_lock);
2741
2742 err_parse:
2743         kfree(filter);
2744
2745         return err;
2746 }
2747
2748 static int igb_delete_clsflower(struct igb_adapter *adapter,
2749                                 struct tc_cls_flower_offload *cls_flower)
2750 {
2751         struct igb_nfc_filter *filter;
2752         int err;
2753
2754         spin_lock(&adapter->nfc_lock);
2755
2756         hlist_for_each_entry(filter, &adapter->cls_flower_list, nfc_node)
2757                 if (filter->cookie == cls_flower->cookie)
2758                         break;
2759
2760         if (!filter) {
2761                 err = -ENOENT;
2762                 goto out;
2763         }
2764
2765         err = igb_erase_filter(adapter, filter);
2766         if (err < 0)
2767                 goto out;
2768
2769         hlist_del(&filter->nfc_node);
2770         kfree(filter);
2771
2772 out:
2773         spin_unlock(&adapter->nfc_lock);
2774
2775         return err;
2776 }
2777
2778 static int igb_setup_tc_cls_flower(struct igb_adapter *adapter,
2779                                    struct tc_cls_flower_offload *cls_flower)
2780 {
2781         switch (cls_flower->command) {
2782         case TC_CLSFLOWER_REPLACE:
2783                 return igb_configure_clsflower(adapter, cls_flower);
2784         case TC_CLSFLOWER_DESTROY:
2785                 return igb_delete_clsflower(adapter, cls_flower);
2786         case TC_CLSFLOWER_STATS:
2787                 return -EOPNOTSUPP;
2788         default:
2789                 return -EOPNOTSUPP;
2790         }
2791 }
2792
2793 static int igb_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
2794                                  void *cb_priv)
2795 {
2796         struct igb_adapter *adapter = cb_priv;
2797
2798         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
2799                 return -EOPNOTSUPP;
2800
2801         switch (type) {
2802         case TC_SETUP_CLSFLOWER:
2803                 return igb_setup_tc_cls_flower(adapter, type_data);
2804
2805         default:
2806                 return -EOPNOTSUPP;
2807         }
2808 }
2809
2810 static int igb_setup_tc_block(struct igb_adapter *adapter,
2811                               struct tc_block_offload *f)
2812 {
2813         if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
2814                 return -EOPNOTSUPP;
2815
2816         switch (f->command) {
2817         case TC_BLOCK_BIND:
2818                 return tcf_block_cb_register(f->block, igb_setup_tc_block_cb,
2819                                              adapter, adapter, f->extack);
2820         case TC_BLOCK_UNBIND:
2821                 tcf_block_cb_unregister(f->block, igb_setup_tc_block_cb,
2822                                         adapter);
2823                 return 0;
2824         default:
2825                 return -EOPNOTSUPP;
2826         }
2827 }
2828
2829 static int igb_offload_txtime(struct igb_adapter *adapter,
2830                               struct tc_etf_qopt_offload *qopt)
2831 {
2832         struct e1000_hw *hw = &adapter->hw;
2833         int err;
2834
2835         /* Launchtime offloading is only supported by i210 controller. */
2836         if (hw->mac.type != e1000_i210)
2837                 return -EOPNOTSUPP;
2838
2839         /* Launchtime offloading is only supported by queues 0 and 1. */
2840         if (qopt->queue < 0 || qopt->queue > 1)
2841                 return -EINVAL;
2842
2843         err = igb_save_txtime_params(adapter, qopt->queue, qopt->enable);
2844         if (err)
2845                 return err;
2846
2847         igb_offload_apply(adapter, qopt->queue);
2848
2849         return 0;
2850 }
2851
2852 static int igb_setup_tc(struct net_device *dev, enum tc_setup_type type,
2853                         void *type_data)
2854 {
2855         struct igb_adapter *adapter = netdev_priv(dev);
2856
2857         switch (type) {
2858         case TC_SETUP_QDISC_CBS:
2859                 return igb_offload_cbs(adapter, type_data);
2860         case TC_SETUP_BLOCK:
2861                 return igb_setup_tc_block(adapter, type_data);
2862         case TC_SETUP_QDISC_ETF:
2863                 return igb_offload_txtime(adapter, type_data);
2864
2865         default:
2866                 return -EOPNOTSUPP;
2867         }
2868 }
2869
2870 static const struct net_device_ops igb_netdev_ops = {
2871         .ndo_open               = igb_open,
2872         .ndo_stop               = igb_close,
2873         .ndo_start_xmit         = igb_xmit_frame,
2874         .ndo_get_stats64        = igb_get_stats64,
2875         .ndo_set_rx_mode        = igb_set_rx_mode,
2876         .ndo_set_mac_address    = igb_set_mac,
2877         .ndo_change_mtu         = igb_change_mtu,
2878         .ndo_do_ioctl           = igb_ioctl,
2879         .ndo_tx_timeout         = igb_tx_timeout,
2880         .ndo_validate_addr      = eth_validate_addr,
2881         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2882         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2883         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2884         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2885         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2886         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2887         .ndo_set_vf_trust       = igb_ndo_set_vf_trust,
2888         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2889         .ndo_fix_features       = igb_fix_features,
2890         .ndo_set_features       = igb_set_features,
2891         .ndo_fdb_add            = igb_ndo_fdb_add,
2892         .ndo_features_check     = igb_features_check,
2893         .ndo_setup_tc           = igb_setup_tc,
2894 };
2895
2896 /**
2897  * igb_set_fw_version - Configure version string for ethtool
2898  * @adapter: adapter struct
2899  **/
2900 void igb_set_fw_version(struct igb_adapter *adapter)
2901 {
2902         struct e1000_hw *hw = &adapter->hw;
2903         struct e1000_fw_version fw;
2904
2905         igb_get_fw_version(hw, &fw);
2906
2907         switch (hw->mac.type) {
2908         case e1000_i210:
2909         case e1000_i211:
2910                 if (!(igb_get_flash_presence_i210(hw))) {
2911                         snprintf(adapter->fw_version,
2912                                  sizeof(adapter->fw_version),
2913                                  "%2d.%2d-%d",
2914                                  fw.invm_major, fw.invm_minor,
2915                                  fw.invm_img_type);
2916                         break;
2917                 }
2918                 /* fall through */
2919         default:
2920                 /* if option is rom valid, display its version too */
2921                 if (fw.or_valid) {
2922                         snprintf(adapter->fw_version,
2923                                  sizeof(adapter->fw_version),
2924                                  "%d.%d, 0x%08x, %d.%d.%d",
2925                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2926                                  fw.or_major, fw.or_build, fw.or_patch);
2927                 /* no option rom */
2928                 } else if (fw.etrack_id != 0X0000) {
2929                         snprintf(adapter->fw_version,
2930                             sizeof(adapter->fw_version),
2931                             "%d.%d, 0x%08x",
2932                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2933                 } else {
2934                 snprintf(adapter->fw_version,
2935                     sizeof(adapter->fw_version),
2936                     "%d.%d.%d",
2937                     fw.eep_major, fw.eep_minor, fw.eep_build);
2938                 }
2939                 break;
2940         }
2941 }
2942
2943 /**
2944  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2945  *
2946  * @adapter: adapter struct
2947  **/
2948 static void igb_init_mas(struct igb_adapter *adapter)
2949 {
2950         struct e1000_hw *hw = &adapter->hw;
2951         u16 eeprom_data;
2952
2953         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2954         switch (hw->bus.func) {
2955         case E1000_FUNC_0:
2956                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2957                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2958                         netdev_info(adapter->netdev,
2959                                 "MAS: Enabling Media Autosense for port %d\n",
2960                                 hw->bus.func);
2961                 }
2962                 break;
2963         case E1000_FUNC_1:
2964                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2965                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2966                         netdev_info(adapter->netdev,
2967                                 "MAS: Enabling Media Autosense for port %d\n",
2968                                 hw->bus.func);
2969                 }
2970                 break;
2971         case E1000_FUNC_2:
2972                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2973                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2974                         netdev_info(adapter->netdev,
2975                                 "MAS: Enabling Media Autosense for port %d\n",
2976                                 hw->bus.func);
2977                 }
2978                 break;
2979         case E1000_FUNC_3:
2980                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2981                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2982                         netdev_info(adapter->netdev,
2983                                 "MAS: Enabling Media Autosense for port %d\n",
2984                                 hw->bus.func);
2985                 }
2986                 break;
2987         default:
2988                 /* Shouldn't get here */
2989                 netdev_err(adapter->netdev,
2990                         "MAS: Invalid port configuration, returning\n");
2991                 break;
2992         }
2993 }
2994
2995 /**
2996  *  igb_init_i2c - Init I2C interface
2997  *  @adapter: pointer to adapter structure
2998  **/
2999 static s32 igb_init_i2c(struct igb_adapter *adapter)
3000 {
3001         s32 status = 0;
3002
3003         /* I2C interface supported on i350 devices */
3004         if (adapter->hw.mac.type != e1000_i350)
3005                 return 0;
3006
3007         /* Initialize the i2c bus which is controlled by the registers.
3008          * This bus will use the i2c_algo_bit structue that implements
3009          * the protocol through toggling of the 4 bits in the register.
3010          */
3011         adapter->i2c_adap.owner = THIS_MODULE;
3012         adapter->i2c_algo = igb_i2c_algo;
3013         adapter->i2c_algo.data = adapter;
3014         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
3015         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
3016         strlcpy(adapter->i2c_adap.name, "igb BB",
3017                 sizeof(adapter->i2c_adap.name));
3018         status = i2c_bit_add_bus(&adapter->i2c_adap);
3019         return status;
3020 }
3021
3022 /**
3023  *  igb_probe - Device Initialization Routine
3024  *  @pdev: PCI device information struct
3025  *  @ent: entry in igb_pci_tbl
3026  *
3027  *  Returns 0 on success, negative on failure
3028  *
3029  *  igb_probe initializes an adapter identified by a pci_dev structure.
3030  *  The OS initialization, configuring of the adapter private structure,
3031  *  and a hardware reset occur.
3032  **/
3033 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3034 {
3035         struct net_device *netdev;
3036         struct igb_adapter *adapter;
3037         struct e1000_hw *hw;
3038         u16 eeprom_data = 0;
3039         s32 ret_val;
3040         static int global_quad_port_a; /* global quad port a indication */
3041         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
3042         int err, pci_using_dac;
3043         u8 part_str[E1000_PBANUM_LENGTH];
3044
3045         /* Catch broken hardware that put the wrong VF device ID in
3046          * the PCIe SR-IOV capability.
3047          */
3048         if (pdev->is_virtfn) {
3049                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
3050                         pci_name(pdev), pdev->vendor, pdev->device);
3051                 return -EINVAL;
3052         }
3053
3054         err = pci_enable_device_mem(pdev);
3055         if (err)
3056                 return err;
3057
3058         pci_using_dac = 0;
3059         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3060         if (!err) {
3061                 pci_using_dac = 1;
3062         } else {
3063                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3064                 if (err) {
3065                         dev_err(&pdev->dev,
3066                                 "No usable DMA configuration, aborting\n");
3067                         goto err_dma;
3068                 }
3069         }
3070
3071         err = pci_request_mem_regions(pdev, igb_driver_name);
3072         if (err)
3073                 goto err_pci_reg;
3074
3075         pci_enable_pcie_error_reporting(pdev);
3076
3077         pci_set_master(pdev);
3078         pci_save_state(pdev);
3079
3080         err = -ENOMEM;
3081         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
3082                                    IGB_MAX_TX_QUEUES);
3083         if (!netdev)
3084                 goto err_alloc_etherdev;
3085
3086         SET_NETDEV_DEV(netdev, &pdev->dev);
3087
3088         pci_set_drvdata(pdev, netdev);
3089         adapter = netdev_priv(netdev);
3090         adapter->netdev = netdev;
3091         adapter->pdev = pdev;
3092         hw = &adapter->hw;
3093         hw->back = adapter;
3094         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3095
3096         err = -EIO;
3097         adapter->io_addr = pci_iomap(pdev, 0, 0);
3098         if (!adapter->io_addr)
3099                 goto err_ioremap;
3100         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
3101         hw->hw_addr = adapter->io_addr;
3102
3103         netdev->netdev_ops = &igb_netdev_ops;
3104         igb_set_ethtool_ops(netdev);
3105         netdev->watchdog_timeo = 5 * HZ;
3106
3107         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
3108
3109         netdev->mem_start = pci_resource_start(pdev, 0);
3110         netdev->mem_end = pci_resource_end(pdev, 0);
3111
3112         /* PCI config space info */
3113         hw->vendor_id = pdev->vendor;
3114         hw->device_id = pdev->device;
3115         hw->revision_id = pdev->revision;
3116         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3117         hw->subsystem_device_id = pdev->subsystem_device;
3118
3119         /* Copy the default MAC, PHY and NVM function pointers */
3120         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
3121         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
3122         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
3123         /* Initialize skew-specific constants */
3124         err = ei->get_invariants(hw);
3125         if (err)
3126                 goto err_sw_init;
3127
3128         /* setup the private structure */
3129         err = igb_sw_init(adapter);
3130         if (err)
3131                 goto err_sw_init;
3132
3133         igb_get_bus_info_pcie(hw);
3134
3135         hw->phy.autoneg_wait_to_complete = false;
3136
3137         /* Copper options */
3138         if (hw->phy.media_type == e1000_media_type_copper) {
3139                 hw->phy.mdix = AUTO_ALL_MODES;
3140                 hw->phy.disable_polarity_correction = false;
3141                 hw->phy.ms_type = e1000_ms_hw_default;
3142         }
3143
3144         if (igb_check_reset_block(hw))
3145                 dev_info(&pdev->dev,
3146                         "PHY reset is blocked due to SOL/IDER session.\n");
3147
3148         /* features is initialized to 0 in allocation, it might have bits
3149          * set by igb_sw_init so we should use an or instead of an
3150          * assignment.
3151          */
3152         netdev->features |= NETIF_F_SG |
3153                             NETIF_F_TSO |
3154                             NETIF_F_TSO6 |
3155                             NETIF_F_RXHASH |
3156                             NETIF_F_RXCSUM |
3157                             NETIF_F_HW_CSUM;
3158
3159         if (hw->mac.type >= e1000_82576)
3160                 netdev->features |= NETIF_F_SCTP_CRC;
3161
3162         if (hw->mac.type >= e1000_i350)
3163                 netdev->features |= NETIF_F_HW_TC;
3164
3165 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
3166                                   NETIF_F_GSO_GRE_CSUM | \
3167                                   NETIF_F_GSO_IPXIP4 | \
3168                                   NETIF_F_GSO_IPXIP6 | \
3169                                   NETIF_F_GSO_UDP_TUNNEL | \
3170                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
3171
3172         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
3173         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
3174
3175         /* copy netdev features into list of user selectable features */
3176         netdev->hw_features |= netdev->features |
3177                                NETIF_F_HW_VLAN_CTAG_RX |
3178                                NETIF_F_HW_VLAN_CTAG_TX |
3179                                NETIF_F_RXALL;
3180
3181         if (hw->mac.type >= e1000_i350)
3182                 netdev->hw_features |= NETIF_F_NTUPLE;
3183
3184         if (pci_using_dac)
3185                 netdev->features |= NETIF_F_HIGHDMA;
3186
3187         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
3188         netdev->mpls_features |= NETIF_F_HW_CSUM;
3189         netdev->hw_enc_features |= netdev->vlan_features;
3190
3191         /* set this bit last since it cannot be part of vlan_features */
3192         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
3193                             NETIF_F_HW_VLAN_CTAG_RX |
3194                             NETIF_F_HW_VLAN_CTAG_TX;
3195
3196         netdev->priv_flags |= IFF_SUPP_NOFCS;
3197
3198         netdev->priv_flags |= IFF_UNICAST_FLT;
3199
3200         /* MTU range: 68 - 9216 */
3201         netdev->min_mtu = ETH_MIN_MTU;
3202         netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
3203
3204         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
3205
3206         /* before reading the NVM, reset the controller to put the device in a
3207          * known good starting state
3208          */
3209         hw->mac.ops.reset_hw(hw);
3210
3211         /* make sure the NVM is good , i211/i210 parts can have special NVM
3212          * that doesn't contain a checksum
3213          */
3214         switch (hw->mac.type) {
3215         case e1000_i210:
3216         case e1000_i211:
3217                 if (igb_get_flash_presence_i210(hw)) {
3218                         if (hw->nvm.ops.validate(hw) < 0) {
3219                                 dev_err(&pdev->dev,
3220                                         "The NVM Checksum Is Not Valid\n");
3221                                 err = -EIO;
3222                                 goto err_eeprom;
3223                         }
3224                 }
3225                 break;
3226         default:
3227                 if (hw->nvm.ops.validate(hw) < 0) {
3228                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
3229                         err = -EIO;
3230                         goto err_eeprom;
3231                 }
3232                 break;
3233         }
3234
3235         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
3236                 /* copy the MAC address out of the NVM */
3237                 if (hw->mac.ops.read_mac_addr(hw))
3238                         dev_err(&pdev->dev, "NVM Read Error\n");
3239         }
3240
3241         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
3242
3243         if (!is_valid_ether_addr(netdev->dev_addr)) {
3244                 dev_err(&pdev->dev, "Invalid MAC Address\n");
3245                 err = -EIO;
3246                 goto err_eeprom;
3247         }
3248
3249         igb_set_default_mac_filter(adapter);
3250
3251         /* get firmware version for ethtool -i */
3252         igb_set_fw_version(adapter);
3253
3254         /* configure RXPBSIZE and TXPBSIZE */
3255         if (hw->mac.type == e1000_i210) {
3256                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
3257                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
3258         }
3259
3260         timer_setup(&adapter->watchdog_timer, igb_watchdog, 0);
3261         timer_setup(&adapter->phy_info_timer, igb_update_phy_info, 0);
3262
3263         INIT_WORK(&adapter->reset_task, igb_reset_task);
3264         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
3265
3266         /* Initialize link properties that are user-changeable */
3267         adapter->fc_autoneg = true;
3268         hw->mac.autoneg = true;
3269         hw->phy.autoneg_advertised = 0x2f;
3270
3271         hw->fc.requested_mode = e1000_fc_default;
3272         hw->fc.current_mode = e1000_fc_default;
3273
3274         igb_validate_mdi_setting(hw);
3275
3276         /* By default, support wake on port A */
3277         if (hw->bus.func == 0)
3278                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3279
3280         /* Check the NVM for wake support on non-port A ports */
3281         if (hw->mac.type >= e1000_82580)
3282                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
3283                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
3284                                  &eeprom_data);
3285         else if (hw->bus.func == 1)
3286                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
3287
3288         if (eeprom_data & IGB_EEPROM_APME)
3289                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3290
3291         /* now that we have the eeprom settings, apply the special cases where
3292          * the eeprom may be wrong or the board simply won't support wake on
3293          * lan on a particular port
3294          */
3295         switch (pdev->device) {
3296         case E1000_DEV_ID_82575GB_QUAD_COPPER:
3297                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3298                 break;
3299         case E1000_DEV_ID_82575EB_FIBER_SERDES:
3300         case E1000_DEV_ID_82576_FIBER:
3301         case E1000_DEV_ID_82576_SERDES:
3302                 /* Wake events only supported on port A for dual fiber
3303                  * regardless of eeprom setting
3304                  */
3305                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
3306                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3307                 break;
3308         case E1000_DEV_ID_82576_QUAD_COPPER:
3309         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
3310                 /* if quad port adapter, disable WoL on all but port A */
3311                 if (global_quad_port_a != 0)
3312                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3313                 else
3314                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
3315                 /* Reset for multiple quad port adapters */
3316                 if (++global_quad_port_a == 4)
3317                         global_quad_port_a = 0;
3318                 break;
3319         default:
3320                 /* If the device can't wake, don't set software support */
3321                 if (!device_can_wakeup(&adapter->pdev->dev))
3322                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3323         }
3324
3325         /* initialize the wol settings based on the eeprom settings */
3326         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
3327                 adapter->wol |= E1000_WUFC_MAG;
3328
3329         /* Some vendors want WoL disabled by default, but still supported */
3330         if ((hw->mac.type == e1000_i350) &&
3331             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
3332                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3333                 adapter->wol = 0;
3334         }
3335
3336         /* Some vendors want the ability to Use the EEPROM setting as
3337          * enable/disable only, and not for capability
3338          */
3339         if (((hw->mac.type == e1000_i350) ||
3340              (hw->mac.type == e1000_i354)) &&
3341             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
3342                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3343                 adapter->wol = 0;
3344         }
3345         if (hw->mac.type == e1000_i350) {
3346                 if (((pdev->subsystem_device == 0x5001) ||
3347                      (pdev->subsystem_device == 0x5002)) &&
3348                                 (hw->bus.func == 0)) {
3349                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3350                         adapter->wol = 0;
3351                 }
3352                 if (pdev->subsystem_device == 0x1F52)
3353                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3354         }
3355
3356         device_set_wakeup_enable(&adapter->pdev->dev,
3357                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
3358
3359         /* reset the hardware with the new settings */
3360         igb_reset(adapter);
3361
3362         /* Init the I2C interface */
3363         err = igb_init_i2c(adapter);
3364         if (err) {
3365                 dev_err(&pdev->dev, "failed to init i2c interface\n");
3366                 goto err_eeprom;
3367         }
3368
3369         /* let the f/w know that the h/w is now under the control of the
3370          * driver.
3371          */
3372         igb_get_hw_control(adapter);
3373
3374         strcpy(netdev->name, "eth%d");
3375         err = register_netdev(netdev);
3376         if (err)
3377                 goto err_register;
3378
3379         /* carrier off reporting is important to ethtool even BEFORE open */
3380         netif_carrier_off(netdev);
3381
3382 #ifdef CONFIG_IGB_DCA
3383         if (dca_add_requester(&pdev->dev) == 0) {
3384                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3385                 dev_info(&pdev->dev, "DCA enabled\n");
3386                 igb_setup_dca(adapter);
3387         }
3388
3389 #endif
3390 #ifdef CONFIG_IGB_HWMON
3391         /* Initialize the thermal sensor on i350 devices. */
3392         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
3393                 u16 ets_word;
3394
3395                 /* Read the NVM to determine if this i350 device supports an
3396                  * external thermal sensor.
3397                  */
3398                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
3399                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
3400                         adapter->ets = true;
3401                 else
3402                         adapter->ets = false;
3403                 if (igb_sysfs_init(adapter))
3404                         dev_err(&pdev->dev,
3405                                 "failed to allocate sysfs resources\n");
3406         } else {
3407                 adapter->ets = false;
3408         }
3409 #endif
3410         /* Check if Media Autosense is enabled */
3411         adapter->ei = *ei;
3412         if (hw->dev_spec._82575.mas_capable)
3413                 igb_init_mas(adapter);
3414
3415         /* do hw tstamp init after resetting */
3416         igb_ptp_init(adapter);
3417
3418         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
3419         /* print bus type/speed/width info, not applicable to i354 */
3420         if (hw->mac.type != e1000_i354) {
3421                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
3422                          netdev->name,
3423                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
3424                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
3425                            "unknown"),
3426                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
3427                           "Width x4" :
3428                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
3429                           "Width x2" :
3430                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
3431                           "Width x1" : "unknown"), netdev->dev_addr);
3432         }
3433
3434         if ((hw->mac.type >= e1000_i210 ||
3435              igb_get_flash_presence_i210(hw))) {
3436                 ret_val = igb_read_part_string(hw, part_str,
3437                                                E1000_PBANUM_LENGTH);
3438         } else {
3439                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
3440         }
3441
3442         if (ret_val)
3443                 strcpy(part_str, "Unknown");
3444         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
3445         dev_info(&pdev->dev,
3446                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3447                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
3448                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3449                 adapter->num_rx_queues, adapter->num_tx_queues);
3450         if (hw->phy.media_type == e1000_media_type_copper) {
3451                 switch (hw->mac.type) {
3452                 case e1000_i350:
3453                 case e1000_i210:
3454                 case e1000_i211:
3455                         /* Enable EEE for internal copper PHY devices */
3456                         err = igb_set_eee_i350(hw, true, true);
3457                         if ((!err) &&
3458                             (!hw->dev_spec._82575.eee_disable)) {
3459                                 adapter->eee_advert =
3460                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
3461                                 adapter->flags |= IGB_FLAG_EEE;
3462                         }
3463                         break;
3464                 case e1000_i354:
3465                         if ((rd32(E1000_CTRL_EXT) &
3466                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3467                                 err = igb_set_eee_i354(hw, true, true);
3468                                 if ((!err) &&
3469                                         (!hw->dev_spec._82575.eee_disable)) {
3470                                         adapter->eee_advert =
3471                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3472                                         adapter->flags |= IGB_FLAG_EEE;
3473                                 }
3474                         }
3475                         break;
3476                 default:
3477                         break;
3478                 }
3479         }
3480
3481         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NEVER_SKIP);
3482
3483         pm_runtime_put_noidle(&pdev->dev);
3484         return 0;
3485
3486 err_register:
3487         igb_release_hw_control(adapter);
3488         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3489 err_eeprom:
3490         if (!igb_check_reset_block(hw))
3491                 igb_reset_phy(hw);
3492
3493         if (hw->flash_address)
3494                 iounmap(hw->flash_address);
3495 err_sw_init:
3496         kfree(adapter->mac_table);
3497         kfree(adapter->shadow_vfta);
3498         igb_clear_interrupt_scheme(adapter);
3499 #ifdef CONFIG_PCI_IOV
3500         igb_disable_sriov(pdev);
3501 #endif
3502         pci_iounmap(pdev, adapter->io_addr);
3503 err_ioremap:
3504         free_netdev(netdev);
3505 err_alloc_etherdev:
3506         pci_disable_pcie_error_reporting(pdev);
3507         pci_release_mem_regions(pdev);
3508 err_pci_reg:
3509 err_dma:
3510         pci_disable_device(pdev);
3511         return err;
3512 }
3513
3514 #ifdef CONFIG_PCI_IOV
3515 static int igb_disable_sriov(struct pci_dev *pdev)
3516 {
3517         struct net_device *netdev = pci_get_drvdata(pdev);
3518         struct igb_adapter *adapter = netdev_priv(netdev);
3519         struct e1000_hw *hw = &adapter->hw;
3520
3521         /* reclaim resources allocated to VFs */
3522         if (adapter->vf_data) {
3523                 /* disable iov and allow time for transactions to clear */
3524                 if (pci_vfs_assigned(pdev)) {
3525                         dev_warn(&pdev->dev,
3526                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
3527                         return -EPERM;
3528                 } else {
3529                         pci_disable_sriov(pdev);
3530                         msleep(500);
3531                 }
3532
3533                 kfree(adapter->vf_mac_list);
3534                 adapter->vf_mac_list = NULL;
3535                 kfree(adapter->vf_data);
3536                 adapter->vf_data = NULL;
3537                 adapter->vfs_allocated_count = 0;
3538                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
3539                 wrfl();
3540                 msleep(100);
3541                 dev_info(&pdev->dev, "IOV Disabled\n");
3542
3543                 /* Re-enable DMA Coalescing flag since IOV is turned off */
3544                 adapter->flags |= IGB_FLAG_DMAC;
3545         }
3546
3547         return 0;
3548 }
3549
3550 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
3551 {
3552         struct net_device *netdev = pci_get_drvdata(pdev);
3553         struct igb_adapter *adapter = netdev_priv(netdev);
3554         int old_vfs = pci_num_vf(pdev);
3555         struct vf_mac_filter *mac_list;
3556         int err = 0;
3557         int num_vf_mac_filters, i;
3558
3559         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
3560                 err = -EPERM;
3561                 goto out;
3562         }
3563         if (!num_vfs)
3564                 goto out;
3565
3566         if (old_vfs) {
3567                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
3568                          old_vfs, max_vfs);
3569                 adapter->vfs_allocated_count = old_vfs;
3570         } else
3571                 adapter->vfs_allocated_count = num_vfs;
3572
3573         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
3574                                 sizeof(struct vf_data_storage), GFP_KERNEL);
3575
3576         /* if allocation failed then we do not support SR-IOV */
3577         if (!adapter->vf_data) {
3578                 adapter->vfs_allocated_count = 0;
3579                 err = -ENOMEM;
3580                 goto out;
3581         }
3582
3583         /* Due to the limited number of RAR entries calculate potential
3584          * number of MAC filters available for the VFs. Reserve entries
3585          * for PF default MAC, PF MAC filters and at least one RAR entry
3586          * for each VF for VF MAC.
3587          */
3588         num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
3589                              (1 + IGB_PF_MAC_FILTERS_RESERVED +
3590                               adapter->vfs_allocated_count);
3591
3592         adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
3593                                        sizeof(struct vf_mac_filter),
3594                                        GFP_KERNEL);
3595
3596         mac_list = adapter->vf_mac_list;
3597         INIT_LIST_HEAD(&adapter->vf_macs.l);
3598
3599         if (adapter->vf_mac_list) {
3600                 /* Initialize list of VF MAC filters */
3601                 for (i = 0; i < num_vf_mac_filters; i++) {
3602                         mac_list->vf = -1;
3603                         mac_list->free = true;
3604                         list_add(&mac_list->l, &adapter->vf_macs.l);
3605                         mac_list++;
3606                 }
3607         } else {
3608                 /* If we could not allocate memory for the VF MAC filters
3609                  * we can continue without this feature but warn user.
3610                  */
3611                 dev_err(&pdev->dev,
3612                         "Unable to allocate memory for VF MAC filter list\n");
3613         }
3614
3615         /* only call pci_enable_sriov() if no VFs are allocated already */
3616         if (!old_vfs) {
3617                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
3618                 if (err)
3619                         goto err_out;
3620         }
3621         dev_info(&pdev->dev, "%d VFs allocated\n",
3622                  adapter->vfs_allocated_count);
3623         for (i = 0; i < adapter->vfs_allocated_count; i++)
3624                 igb_vf_configure(adapter, i);
3625
3626         /* DMA Coalescing is not supported in IOV mode. */
3627         adapter->flags &= ~IGB_FLAG_DMAC;
3628         goto out;
3629
3630 err_out:
3631         kfree(adapter->vf_mac_list);
3632         adapter->vf_mac_list = NULL;
3633         kfree(adapter->vf_data);
3634         adapter->vf_data = NULL;
3635         adapter->vfs_allocated_count = 0;
3636 out:
3637         return err;
3638 }
3639
3640 #endif
3641 /**
3642  *  igb_remove_i2c - Cleanup  I2C interface
3643  *  @adapter: pointer to adapter structure
3644  **/
3645 static void igb_remove_i2c(struct igb_adapter *adapter)
3646 {
3647         /* free the adapter bus structure */
3648         i2c_del_adapter(&adapter->i2c_adap);
3649 }
3650
3651 /**
3652  *  igb_remove - Device Removal Routine
3653  *  @pdev: PCI device information struct
3654  *
3655  *  igb_remove is called by the PCI subsystem to alert the driver
3656  *  that it should release a PCI device.  The could be caused by a
3657  *  Hot-Plug event, or because the driver is going to be removed from
3658  *  memory.
3659  **/
3660 static void igb_remove(struct pci_dev *pdev)
3661 {
3662         struct net_device *netdev = pci_get_drvdata(pdev);
3663         struct igb_adapter *adapter = netdev_priv(netdev);
3664         struct e1000_hw *hw = &adapter->hw;
3665
3666         pm_runtime_get_noresume(&pdev->dev);
3667 #ifdef CONFIG_IGB_HWMON
3668         igb_sysfs_exit(adapter);
3669 #endif
3670         igb_remove_i2c(adapter);
3671         igb_ptp_stop(adapter);
3672         /* The watchdog timer may be rescheduled, so explicitly
3673          * disable watchdog from being rescheduled.
3674          */
3675         set_bit(__IGB_DOWN, &adapter->state);
3676         del_timer_sync(&adapter->watchdog_timer);
3677         del_timer_sync(&adapter->phy_info_timer);
3678
3679         cancel_work_sync(&adapter->reset_task);
3680         cancel_work_sync(&adapter->watchdog_task);
3681
3682 #ifdef CONFIG_IGB_DCA
3683         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3684                 dev_info(&pdev->dev, "DCA disabled\n");
3685                 dca_remove_requester(&pdev->dev);
3686                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3687                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
3688         }
3689 #endif
3690
3691         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3692          * would have already happened in close and is redundant.
3693          */
3694         igb_release_hw_control(adapter);
3695
3696 #ifdef CONFIG_PCI_IOV
3697         igb_disable_sriov(pdev);
3698 #endif
3699
3700         unregister_netdev(netdev);
3701
3702         igb_clear_interrupt_scheme(adapter);
3703
3704         pci_iounmap(pdev, adapter->io_addr);
3705         if (hw->flash_address)
3706                 iounmap(hw->flash_address);
3707         pci_release_mem_regions(pdev);
3708
3709         kfree(adapter->mac_table);
3710         kfree(adapter->shadow_vfta);
3711         free_netdev(netdev);
3712
3713         pci_disable_pcie_error_reporting(pdev);
3714
3715         pci_disable_device(pdev);
3716 }
3717
3718 /**
3719  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3720  *  @adapter: board private structure to initialize
3721  *
3722  *  This function initializes the vf specific data storage and then attempts to
3723  *  allocate the VFs.  The reason for ordering it this way is because it is much
3724  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
3725  *  the memory for the VFs.
3726  **/
3727 static void igb_probe_vfs(struct igb_adapter *adapter)
3728 {
3729 #ifdef CONFIG_PCI_IOV
3730         struct pci_dev *pdev = adapter->pdev;
3731         struct e1000_hw *hw = &adapter->hw;
3732
3733         /* Virtualization features not supported on i210 family. */
3734         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
3735                 return;
3736
3737         /* Of the below we really only want the effect of getting
3738          * IGB_FLAG_HAS_MSIX set (if available), without which
3739          * igb_enable_sriov() has no effect.
3740          */
3741         igb_set_interrupt_capability(adapter, true);
3742         igb_reset_interrupt_capability(adapter);
3743
3744         pci_sriov_set_totalvfs(pdev, 7);
3745         igb_enable_sriov(pdev, max_vfs);
3746
3747 #endif /* CONFIG_PCI_IOV */
3748 }
3749
3750 unsigned int igb_get_max_rss_queues(struct igb_adapter *adapter)
3751 {
3752         struct e1000_hw *hw = &adapter->hw;
3753         unsigned int max_rss_queues;
3754
3755         /* Determine the maximum number of RSS queues supported. */
3756         switch (hw->mac.type) {
3757         case e1000_i211:
3758                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3759                 break;
3760         case e1000_82575:
3761         case e1000_i210:
3762                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3763                 break;
3764         case e1000_i350:
3765                 /* I350 cannot do RSS and SR-IOV at the same time */
3766                 if (!!adapter->vfs_allocated_count) {
3767                         max_rss_queues = 1;
3768                         break;
3769                 }
3770                 /* fall through */
3771         case e1000_82576:
3772                 if (!!adapter->vfs_allocated_count) {
3773                         max_rss_queues = 2;
3774                         break;
3775                 }
3776                 /* fall through */
3777         case e1000_82580:
3778         case e1000_i354:
3779         default:
3780                 max_rss_queues = IGB_MAX_RX_QUEUES;
3781                 break;
3782         }
3783
3784         return max_rss_queues;
3785 }
3786
3787 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3788 {
3789         u32 max_rss_queues;
3790
3791         max_rss_queues = igb_get_max_rss_queues(adapter);
3792         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3793
3794         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3795 }
3796
3797 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3798                               const u32 max_rss_queues)
3799 {
3800         struct e1000_hw *hw = &adapter->hw;
3801
3802         /* Determine if we need to pair queues. */
3803         switch (hw->mac.type) {
3804         case e1000_82575:
3805         case e1000_i211:
3806                 /* Device supports enough interrupts without queue pairing. */
3807                 break;
3808         case e1000_82576:
3809         case e1000_82580:
3810         case e1000_i350:
3811         case e1000_i354:
3812         case e1000_i210:
3813         default:
3814                 /* If rss_queues > half of max_rss_queues, pair the queues in
3815                  * order to conserve interrupts due to limited supply.
3816                  */
3817                 if (adapter->rss_queues > (max_rss_queues / 2))
3818                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3819                 else
3820                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3821                 break;
3822         }
3823 }
3824
3825 /**
3826  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3827  *  @adapter: board private structure to initialize
3828  *
3829  *  igb_sw_init initializes the Adapter private data structure.
3830  *  Fields are initialized based on PCI device information and
3831  *  OS network device settings (MTU size).
3832  **/
3833 static int igb_sw_init(struct igb_adapter *adapter)
3834 {
3835         struct e1000_hw *hw = &adapter->hw;
3836         struct net_device *netdev = adapter->netdev;
3837         struct pci_dev *pdev = adapter->pdev;
3838
3839         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3840
3841         /* set default ring sizes */
3842         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3843         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3844
3845         /* set default ITR values */
3846         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3847         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3848
3849         /* set default work limits */
3850         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3851
3852         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3853                                   VLAN_HLEN;
3854         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3855
3856         spin_lock_init(&adapter->nfc_lock);
3857         spin_lock_init(&adapter->stats64_lock);
3858 #ifdef CONFIG_PCI_IOV
3859         switch (hw->mac.type) {
3860         case e1000_82576:
3861         case e1000_i350:
3862                 if (max_vfs > 7) {
3863                         dev_warn(&pdev->dev,
3864                                  "Maximum of 7 VFs per PF, using max\n");
3865                         max_vfs = adapter->vfs_allocated_count = 7;
3866                 } else
3867                         adapter->vfs_allocated_count = max_vfs;
3868                 if (adapter->vfs_allocated_count)
3869                         dev_warn(&pdev->dev,
3870                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3871                 break;
3872         default:
3873                 break;
3874         }
3875 #endif /* CONFIG_PCI_IOV */
3876
3877         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3878         adapter->flags |= IGB_FLAG_HAS_MSIX;
3879
3880         adapter->mac_table = kcalloc(hw->mac.rar_entry_count,
3881                                      sizeof(struct igb_mac_addr),
3882                                      GFP_KERNEL);
3883         if (!adapter->mac_table)
3884                 return -ENOMEM;
3885
3886         igb_probe_vfs(adapter);
3887
3888         igb_init_queue_configuration(adapter);
3889
3890         /* Setup and initialize a copy of the hw vlan table array */
3891         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
3892                                        GFP_KERNEL);
3893         if (!adapter->shadow_vfta)
3894                 return -ENOMEM;
3895
3896         /* This call may decrease the number of queues */
3897         if (igb_init_interrupt_scheme(adapter, true)) {
3898                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3899                 return -ENOMEM;
3900         }
3901
3902         /* Explicitly disable IRQ since the NIC can be in any state. */
3903         igb_irq_disable(adapter);
3904
3905         if (hw->mac.type >= e1000_i350)
3906                 adapter->flags &= ~IGB_FLAG_DMAC;
3907
3908         set_bit(__IGB_DOWN, &adapter->state);
3909         return 0;
3910 }
3911
3912 /**
3913  *  igb_open - Called when a network interface is made active
3914  *  @netdev: network interface device structure
3915  *
3916  *  Returns 0 on success, negative value on failure
3917  *
3918  *  The open entry point is called when a network interface is made
3919  *  active by the system (IFF_UP).  At this point all resources needed
3920  *  for transmit and receive operations are allocated, the interrupt
3921  *  handler is registered with the OS, the watchdog timer is started,
3922  *  and the stack is notified that the interface is ready.
3923  **/
3924 static int __igb_open(struct net_device *netdev, bool resuming)
3925 {
3926         struct igb_adapter *adapter = netdev_priv(netdev);
3927         struct e1000_hw *hw = &adapter->hw;
3928         struct pci_dev *pdev = adapter->pdev;
3929         int err;
3930         int i;
3931
3932         /* disallow open during test */
3933         if (test_bit(__IGB_TESTING, &adapter->state)) {
3934                 WARN_ON(resuming);
3935                 return -EBUSY;
3936         }
3937
3938         if (!resuming)
3939                 pm_runtime_get_sync(&pdev->dev);
3940
3941         netif_carrier_off(netdev);
3942
3943         /* allocate transmit descriptors */
3944         err = igb_setup_all_tx_resources(adapter);
3945         if (err)
3946                 goto err_setup_tx;
3947
3948         /* allocate receive descriptors */
3949         err = igb_setup_all_rx_resources(adapter);
3950         if (err)
3951                 goto err_setup_rx;
3952
3953         igb_power_up_link(adapter);
3954
3955         /* before we allocate an interrupt, we must be ready to handle it.
3956          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3957          * as soon as we call pci_request_irq, so we have to setup our
3958          * clean_rx handler before we do so.
3959          */
3960         igb_configure(adapter);
3961
3962         err = igb_request_irq(adapter);
3963         if (err)
3964                 goto err_req_irq;
3965
3966         /* Notify the stack of the actual queue counts. */
3967         err = netif_set_real_num_tx_queues(adapter->netdev,
3968                                            adapter->num_tx_queues);
3969         if (err)
3970                 goto err_set_queues;
3971
3972         err = netif_set_real_num_rx_queues(adapter->netdev,
3973                                            adapter->num_rx_queues);
3974         if (err)
3975                 goto err_set_queues;
3976
3977         /* From here on the code is the same as igb_up() */
3978         clear_bit(__IGB_DOWN, &adapter->state);
3979
3980         for (i = 0; i < adapter->num_q_vectors; i++)
3981                 napi_enable(&(adapter->q_vector[i]->napi));
3982
3983         /* Clear any pending interrupts. */
3984         rd32(E1000_TSICR);
3985         rd32(E1000_ICR);
3986
3987         igb_irq_enable(adapter);
3988
3989         /* notify VFs that reset has been completed */
3990         if (adapter->vfs_allocated_count) {
3991                 u32 reg_data = rd32(E1000_CTRL_EXT);
3992
3993                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3994                 wr32(E1000_CTRL_EXT, reg_data);
3995         }
3996
3997         netif_tx_start_all_queues(netdev);
3998
3999         if (!resuming)
4000                 pm_runtime_put(&pdev->dev);
4001
4002         /* start the watchdog. */
4003         hw->mac.get_link_status = 1;
4004         schedule_work(&adapter->watchdog_task);
4005
4006         return 0;
4007
4008 err_set_queues:
4009         igb_free_irq(adapter);
4010 err_req_irq:
4011         igb_release_hw_control(adapter);
4012         igb_power_down_link(adapter);
4013         igb_free_all_rx_resources(adapter);
4014 err_setup_rx:
4015         igb_free_all_tx_resources(adapter);
4016 err_setup_tx:
4017         igb_reset(adapter);
4018         if (!resuming)
4019                 pm_runtime_put(&pdev->dev);
4020
4021         return err;
4022 }
4023
4024 int igb_open(struct net_device *netdev)
4025 {
4026         return __igb_open(netdev, false);
4027 }
4028
4029 /**
4030  *  igb_close - Disables a network interface
4031  *  @netdev: network interface device structure
4032  *
4033  *  Returns 0, this is not allowed to fail
4034  *
4035  *  The close entry point is called when an interface is de-activated
4036  *  by the OS.  The hardware is still under the driver's control, but
4037  *  needs to be disabled.  A global MAC reset is issued to stop the
4038  *  hardware, and all transmit and receive resources are freed.
4039  **/
4040 static int __igb_close(struct net_device *netdev, bool suspending)
4041 {
4042         struct igb_adapter *adapter = netdev_priv(netdev);
4043         struct pci_dev *pdev = adapter->pdev;
4044
4045         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4046
4047         if (!suspending)
4048                 pm_runtime_get_sync(&pdev->dev);
4049
4050         igb_down(adapter);
4051         igb_free_irq(adapter);
4052
4053         igb_free_all_tx_resources(adapter);
4054         igb_free_all_rx_resources(adapter);
4055
4056         if (!suspending)
4057                 pm_runtime_put_sync(&pdev->dev);
4058         return 0;
4059 }
4060
4061 int igb_close(struct net_device *netdev)
4062 {
4063         if (netif_device_present(netdev) || netdev->dismantle)
4064                 return __igb_close(netdev, false);
4065         return 0;
4066 }
4067
4068 /**
4069  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
4070  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
4071  *
4072  *  Return 0 on success, negative on failure
4073  **/
4074 int igb_setup_tx_resources(struct igb_ring *tx_ring)
4075 {
4076         struct device *dev = tx_ring->dev;
4077         int size;
4078
4079         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4080
4081         tx_ring->tx_buffer_info = vmalloc(size);
4082         if (!tx_ring->tx_buffer_info)
4083                 goto err;
4084
4085         /* round up to nearest 4K */
4086         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
4087         tx_ring->size = ALIGN(tx_ring->size, 4096);
4088
4089         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4090                                            &tx_ring->dma, GFP_KERNEL);
4091         if (!tx_ring->desc)
4092                 goto err;
4093
4094         tx_ring->next_to_use = 0;
4095         tx_ring->next_to_clean = 0;
4096
4097         return 0;
4098
4099 err:
4100         vfree(tx_ring->tx_buffer_info);
4101         tx_ring->tx_buffer_info = NULL;
4102         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4103         return -ENOMEM;
4104 }
4105
4106 /**
4107  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
4108  *                               (Descriptors) for all queues
4109  *  @adapter: board private structure
4110  *
4111  *  Return 0 on success, negative on failure
4112  **/
4113 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
4114 {
4115         struct pci_dev *pdev = adapter->pdev;
4116         int i, err = 0;
4117
4118         for (i = 0; i < adapter->num_tx_queues; i++) {
4119                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
4120                 if (err) {
4121                         dev_err(&pdev->dev,
4122                                 "Allocation for Tx Queue %u failed\n", i);
4123                         for (i--; i >= 0; i--)
4124                                 igb_free_tx_resources(adapter->tx_ring[i]);
4125                         break;
4126                 }
4127         }
4128
4129         return err;
4130 }
4131
4132 /**
4133  *  igb_setup_tctl - configure the transmit control registers
4134  *  @adapter: Board private structure
4135  **/
4136 void igb_setup_tctl(struct igb_adapter *adapter)
4137 {
4138         struct e1000_hw *hw = &adapter->hw;
4139         u32 tctl;
4140
4141         /* disable queue 0 which is enabled by default on 82575 and 82576 */
4142         wr32(E1000_TXDCTL(0), 0);
4143
4144         /* Program the Transmit Control Register */
4145         tctl = rd32(E1000_TCTL);
4146         tctl &= ~E1000_TCTL_CT;
4147         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
4148                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
4149
4150         igb_config_collision_dist(hw);
4151
4152         /* Enable transmits */
4153         tctl |= E1000_TCTL_EN;
4154
4155         wr32(E1000_TCTL, tctl);
4156 }
4157
4158 /**
4159  *  igb_configure_tx_ring - Configure transmit ring after Reset
4160  *  @adapter: board private structure
4161  *  @ring: tx ring to configure
4162  *
4163  *  Configure a transmit ring after a reset.
4164  **/
4165 void igb_configure_tx_ring(struct igb_adapter *adapter,
4166                            struct igb_ring *ring)
4167 {
4168         struct e1000_hw *hw = &adapter->hw;
4169         u32 txdctl = 0;
4170         u64 tdba = ring->dma;
4171         int reg_idx = ring->reg_idx;
4172
4173         wr32(E1000_TDLEN(reg_idx),
4174              ring->count * sizeof(union e1000_adv_tx_desc));
4175         wr32(E1000_TDBAL(reg_idx),
4176              tdba & 0x00000000ffffffffULL);
4177         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
4178
4179         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
4180         wr32(E1000_TDH(reg_idx), 0);
4181         writel(0, ring->tail);
4182
4183         txdctl |= IGB_TX_PTHRESH;
4184         txdctl |= IGB_TX_HTHRESH << 8;
4185         txdctl |= IGB_TX_WTHRESH << 16;
4186
4187         /* reinitialize tx_buffer_info */
4188         memset(ring->tx_buffer_info, 0,
4189                sizeof(struct igb_tx_buffer) * ring->count);
4190
4191         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
4192         wr32(E1000_TXDCTL(reg_idx), txdctl);
4193 }
4194
4195 /**
4196  *  igb_configure_tx - Configure transmit Unit after Reset
4197  *  @adapter: board private structure
4198  *
4199  *  Configure the Tx unit of the MAC after a reset.
4200  **/
4201 static void igb_configure_tx(struct igb_adapter *adapter)
4202 {
4203         struct e1000_hw *hw = &adapter->hw;
4204         int i;
4205
4206         /* disable the queues */
4207         for (i = 0; i < adapter->num_tx_queues; i++)
4208                 wr32(E1000_TXDCTL(adapter->tx_ring[i]->reg_idx), 0);
4209
4210         wrfl();
4211         usleep_range(10000, 20000);
4212
4213         for (i = 0; i < adapter->num_tx_queues; i++)
4214                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
4215 }
4216
4217 /**
4218  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
4219  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
4220  *
4221  *  Returns 0 on success, negative on failure
4222  **/
4223 int igb_setup_rx_resources(struct igb_ring *rx_ring)
4224 {
4225         struct device *dev = rx_ring->dev;
4226         int size;
4227
4228         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4229
4230         rx_ring->rx_buffer_info = vmalloc(size);
4231         if (!rx_ring->rx_buffer_info)
4232                 goto err;
4233
4234         /* Round up to nearest 4K */
4235         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
4236         rx_ring->size = ALIGN(rx_ring->size, 4096);
4237
4238         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4239                                            &rx_ring->dma, GFP_KERNEL);
4240         if (!rx_ring->desc)
4241                 goto err;
4242
4243         rx_ring->next_to_alloc = 0;
4244         rx_ring->next_to_clean = 0;
4245         rx_ring->next_to_use = 0;
4246
4247         return 0;
4248
4249 err:
4250         vfree(rx_ring->rx_buffer_info);
4251         rx_ring->rx_buffer_info = NULL;
4252         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4253         return -ENOMEM;
4254 }
4255
4256 /**
4257  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
4258  *                               (Descriptors) for all queues
4259  *  @adapter: board private structure
4260  *
4261  *  Return 0 on success, negative on failure
4262  **/
4263 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
4264 {
4265         struct pci_dev *pdev = adapter->pdev;
4266         int i, err = 0;
4267
4268         for (i = 0; i < adapter->num_rx_queues; i++) {
4269                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
4270                 if (err) {
4271                         dev_err(&pdev->dev,
4272                                 "Allocation for Rx Queue %u failed\n", i);
4273                         for (i--; i >= 0; i--)
4274                                 igb_free_rx_resources(adapter->rx_ring[i]);
4275                         break;
4276                 }
4277         }
4278
4279         return err;
4280 }
4281
4282 /**
4283  *  igb_setup_mrqc - configure the multiple receive queue control registers
4284  *  @adapter: Board private structure
4285  **/
4286 static void igb_setup_mrqc(struct igb_adapter *adapter)
4287 {
4288         struct e1000_hw *hw = &adapter->hw;
4289         u32 mrqc, rxcsum;
4290         u32 j, num_rx_queues;
4291         u32 rss_key[10];
4292
4293         netdev_rss_key_fill(rss_key, sizeof(rss_key));
4294         for (j = 0; j < 10; j++)
4295                 wr32(E1000_RSSRK(j), rss_key[j]);
4296
4297         num_rx_queues = adapter->rss_queues;
4298
4299         switch (hw->mac.type) {
4300         case e1000_82576:
4301                 /* 82576 supports 2 RSS queues for SR-IOV */
4302                 if (adapter->vfs_allocated_count)
4303                         num_rx_queues = 2;
4304                 break;
4305         default:
4306                 break;
4307         }
4308
4309         if (adapter->rss_indir_tbl_init != num_rx_queues) {
4310                 for (j = 0; j < IGB_RETA_SIZE; j++)
4311                         adapter->rss_indir_tbl[j] =
4312                         (j * num_rx_queues) / IGB_RETA_SIZE;
4313                 adapter->rss_indir_tbl_init = num_rx_queues;
4314         }
4315         igb_write_rss_indir_tbl(adapter);
4316
4317         /* Disable raw packet checksumming so that RSS hash is placed in
4318          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
4319          * offloads as they are enabled by default
4320          */
4321         rxcsum = rd32(E1000_RXCSUM);
4322         rxcsum |= E1000_RXCSUM_PCSD;
4323
4324         if (adapter->hw.mac.type >= e1000_82576)
4325                 /* Enable Receive Checksum Offload for SCTP */
4326                 rxcsum |= E1000_RXCSUM_CRCOFL;
4327
4328         /* Don't need to set TUOFL or IPOFL, they default to 1 */
4329         wr32(E1000_RXCSUM, rxcsum);
4330
4331         /* Generate RSS hash based on packet types, TCP/UDP
4332          * port numbers and/or IPv4/v6 src and dst addresses
4333          */
4334         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
4335                E1000_MRQC_RSS_FIELD_IPV4_TCP |
4336                E1000_MRQC_RSS_FIELD_IPV6 |
4337                E1000_MRQC_RSS_FIELD_IPV6_TCP |
4338                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
4339
4340         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
4341                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
4342         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
4343                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
4344
4345         /* If VMDq is enabled then we set the appropriate mode for that, else
4346          * we default to RSS so that an RSS hash is calculated per packet even
4347          * if we are only using one queue
4348          */
4349         if (adapter->vfs_allocated_count) {
4350                 if (hw->mac.type > e1000_82575) {
4351                         /* Set the default pool for the PF's first queue */
4352                         u32 vtctl = rd32(E1000_VT_CTL);
4353
4354                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
4355                                    E1000_VT_CTL_DISABLE_DEF_POOL);
4356                         vtctl |= adapter->vfs_allocated_count <<
4357                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
4358                         wr32(E1000_VT_CTL, vtctl);
4359                 }
4360                 if (adapter->rss_queues > 1)
4361                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
4362                 else
4363                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
4364         } else {
4365                 if (hw->mac.type != e1000_i211)
4366                         mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
4367         }
4368         igb_vmm_control(adapter);
4369
4370         wr32(E1000_MRQC, mrqc);
4371 }
4372
4373 /**
4374  *  igb_setup_rctl - configure the receive control registers
4375  *  @adapter: Board private structure
4376  **/
4377 void igb_setup_rctl(struct igb_adapter *adapter)
4378 {
4379         struct e1000_hw *hw = &adapter->hw;
4380         u32 rctl;
4381
4382         rctl = rd32(E1000_RCTL);
4383
4384         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
4385         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
4386
4387         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
4388                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4389
4390         /* enable stripping of CRC. It's unlikely this will break BMC
4391          * redirection as it did with e1000. Newer features require
4392          * that the HW strips the CRC.
4393          */
4394         rctl |= E1000_RCTL_SECRC;
4395
4396         /* disable store bad packets and clear size bits. */
4397         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
4398
4399         /* enable LPE to allow for reception of jumbo frames */
4400         rctl |= E1000_RCTL_LPE;
4401
4402         /* disable queue 0 to prevent tail write w/o re-config */
4403         wr32(E1000_RXDCTL(0), 0);
4404
4405         /* Attention!!!  For SR-IOV PF driver operations you must enable
4406          * queue drop for all VF and PF queues to prevent head of line blocking
4407          * if an un-trusted VF does not provide descriptors to hardware.
4408          */
4409         if (adapter->vfs_allocated_count) {
4410                 /* set all queue drop enable bits */
4411                 wr32(E1000_QDE, ALL_QUEUES);
4412         }
4413
4414         /* This is useful for sniffing bad packets. */
4415         if (adapter->netdev->features & NETIF_F_RXALL) {
4416                 /* UPE and MPE will be handled by normal PROMISC logic
4417                  * in e1000e_set_rx_mode
4418                  */
4419                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
4420                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
4421                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
4422
4423                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
4424                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
4425                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
4426                  * and that breaks VLANs.
4427                  */
4428         }
4429
4430         wr32(E1000_RCTL, rctl);
4431 }
4432
4433 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
4434                                    int vfn)
4435 {
4436         struct e1000_hw *hw = &adapter->hw;
4437         u32 vmolr;
4438
4439         if (size > MAX_JUMBO_FRAME_SIZE)
4440                 size = MAX_JUMBO_FRAME_SIZE;
4441
4442         vmolr = rd32(E1000_VMOLR(vfn));
4443         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4444         vmolr |= size | E1000_VMOLR_LPE;
4445         wr32(E1000_VMOLR(vfn), vmolr);
4446
4447         return 0;
4448 }
4449
4450 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
4451                                          int vfn, bool enable)
4452 {
4453         struct e1000_hw *hw = &adapter->hw;
4454         u32 val, reg;
4455
4456         if (hw->mac.type < e1000_82576)
4457                 return;
4458
4459         if (hw->mac.type == e1000_i350)
4460                 reg = E1000_DVMOLR(vfn);
4461         else
4462                 reg = E1000_VMOLR(vfn);
4463
4464         val = rd32(reg);
4465         if (enable)
4466                 val |= E1000_VMOLR_STRVLAN;
4467         else
4468                 val &= ~(E1000_VMOLR_STRVLAN);
4469         wr32(reg, val);
4470 }
4471
4472 static inline void igb_set_vmolr(struct igb_adapter *adapter,
4473                                  int vfn, bool aupe)
4474 {
4475         struct e1000_hw *hw = &adapter->hw;
4476         u32 vmolr;
4477
4478         /* This register exists only on 82576 and newer so if we are older then
4479          * we should exit and do nothing
4480          */
4481         if (hw->mac.type < e1000_82576)
4482                 return;
4483
4484         vmolr = rd32(E1000_VMOLR(vfn));
4485         if (aupe)
4486                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
4487         else
4488                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
4489
4490         /* clear all bits that might not be set */
4491         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
4492
4493         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
4494                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
4495         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
4496          * multicast packets
4497          */
4498         if (vfn <= adapter->vfs_allocated_count)
4499                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
4500
4501         wr32(E1000_VMOLR(vfn), vmolr);
4502 }
4503
4504 /**
4505  *  igb_configure_rx_ring - Configure a receive ring after Reset
4506  *  @adapter: board private structure
4507  *  @ring: receive ring to be configured
4508  *
4509  *  Configure the Rx unit of the MAC after a reset.
4510  **/
4511 void igb_configure_rx_ring(struct igb_adapter *adapter,
4512                            struct igb_ring *ring)
4513 {
4514         struct e1000_hw *hw = &adapter->hw;
4515         union e1000_adv_rx_desc *rx_desc;
4516         u64 rdba = ring->dma;
4517         int reg_idx = ring->reg_idx;
4518         u32 srrctl = 0, rxdctl = 0;
4519
4520         /* disable the queue */
4521         wr32(E1000_RXDCTL(reg_idx), 0);
4522
4523         /* Set DMA base address registers */
4524         wr32(E1000_RDBAL(reg_idx),
4525              rdba & 0x00000000ffffffffULL);
4526         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
4527         wr32(E1000_RDLEN(reg_idx),
4528              ring->count * sizeof(union e1000_adv_rx_desc));
4529
4530         /* initialize head and tail */
4531         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
4532         wr32(E1000_RDH(reg_idx), 0);
4533         writel(0, ring->tail);
4534
4535         /* set descriptor configuration */
4536         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
4537         if (ring_uses_large_buffer(ring))
4538                 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4539         else
4540                 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4541         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
4542         if (hw->mac.type >= e1000_82580)
4543                 srrctl |= E1000_SRRCTL_TIMESTAMP;
4544         /* Only set Drop Enable if we are supporting multiple queues */
4545         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
4546                 srrctl |= E1000_SRRCTL_DROP_EN;
4547
4548         wr32(E1000_SRRCTL(reg_idx), srrctl);
4549
4550         /* set filtering for VMDQ pools */
4551         igb_set_vmolr(adapter, reg_idx & 0x7, true);
4552
4553         rxdctl |= IGB_RX_PTHRESH;
4554         rxdctl |= IGB_RX_HTHRESH << 8;
4555         rxdctl |= IGB_RX_WTHRESH << 16;
4556
4557         /* initialize rx_buffer_info */
4558         memset(ring->rx_buffer_info, 0,
4559                sizeof(struct igb_rx_buffer) * ring->count);
4560
4561         /* initialize Rx descriptor 0 */
4562         rx_desc = IGB_RX_DESC(ring, 0);
4563         rx_desc->wb.upper.length = 0;
4564
4565         /* enable receive descriptor fetching */
4566         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
4567         wr32(E1000_RXDCTL(reg_idx), rxdctl);
4568 }
4569
4570 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
4571                                   struct igb_ring *rx_ring)
4572 {
4573         /* set build_skb and buffer size flags */
4574         clear_ring_build_skb_enabled(rx_ring);
4575         clear_ring_uses_large_buffer(rx_ring);
4576
4577         if (adapter->flags & IGB_FLAG_RX_LEGACY)
4578                 return;
4579
4580         set_ring_build_skb_enabled(rx_ring);
4581
4582 #if (PAGE_SIZE < 8192)
4583         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4584                 return;
4585
4586         set_ring_uses_large_buffer(rx_ring);
4587 #endif
4588 }
4589
4590 /**
4591  *  igb_configure_rx - Configure receive Unit after Reset
4592  *  @adapter: board private structure
4593  *
4594  *  Configure the Rx unit of the MAC after a reset.
4595  **/
4596 static void igb_configure_rx(struct igb_adapter *adapter)
4597 {
4598         int i;
4599
4600         /* set the correct pool for the PF default MAC address in entry 0 */
4601         igb_set_default_mac_filter(adapter);
4602
4603         /* Setup the HW Rx Head and Tail Descriptor Pointers and
4604          * the Base and Length of the Rx Descriptor Ring
4605          */
4606         for (i = 0; i < adapter->num_rx_queues; i++) {
4607                 struct igb_ring *rx_ring = adapter->rx_ring[i];
4608
4609                 igb_set_rx_buffer_len(adapter, rx_ring);
4610                 igb_configure_rx_ring(adapter, rx_ring);
4611         }
4612 }
4613
4614 /**
4615  *  igb_free_tx_resources - Free Tx Resources per Queue
4616  *  @tx_ring: Tx descriptor ring for a specific queue
4617  *
4618  *  Free all transmit software resources
4619  **/
4620 void igb_free_tx_resources(struct igb_ring *tx_ring)
4621 {
4622         igb_clean_tx_ring(tx_ring);
4623
4624         vfree(tx_ring->tx_buffer_info);
4625         tx_ring->tx_buffer_info = NULL;
4626
4627         /* if not set, then don't free */
4628         if (!tx_ring->desc)
4629                 return;
4630
4631         dma_free_coherent(tx_ring->dev, tx_ring->size,
4632                           tx_ring->desc, tx_ring->dma);
4633
4634         tx_ring->desc = NULL;
4635 }
4636
4637 /**
4638  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
4639  *  @adapter: board private structure
4640  *
4641  *  Free all transmit software resources
4642  **/
4643 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4644 {
4645         int i;
4646
4647         for (i = 0; i < adapter->num_tx_queues; i++)
4648                 if (adapter->tx_ring[i])
4649                         igb_free_tx_resources(adapter->tx_ring[i]);
4650 }
4651
4652 /**
4653  *  igb_clean_tx_ring - Free Tx Buffers
4654  *  @tx_ring: ring to be cleaned
4655  **/
4656 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4657 {
4658         u16 i = tx_ring->next_to_clean;
4659         struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
4660
4661         while (i != tx_ring->next_to_use) {
4662                 union e1000_adv_tx_desc *eop_desc, *tx_desc;
4663
4664                 /* Free all the Tx ring sk_buffs */
4665                 dev_kfree_skb_any(tx_buffer->skb);
4666
4667                 /* unmap skb header data */
4668                 dma_unmap_single(tx_ring->dev,
4669                                  dma_unmap_addr(tx_buffer, dma),
4670                                  dma_unmap_len(tx_buffer, len),
4671                                  DMA_TO_DEVICE);
4672
4673                 /* check for eop_desc to determine the end of the packet */
4674                 eop_desc = tx_buffer->next_to_watch;
4675                 tx_desc = IGB_TX_DESC(tx_ring, i);
4676
4677                 /* unmap remaining buffers */
4678                 while (tx_desc != eop_desc) {
4679                         tx_buffer++;
4680                         tx_desc++;
4681                         i++;
4682                         if (unlikely(i == tx_ring->count)) {
4683                                 i = 0;
4684                                 tx_buffer = tx_ring->tx_buffer_info;
4685                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4686                         }
4687
4688                         /* unmap any remaining paged data */
4689                         if (dma_unmap_len(tx_buffer, len))
4690                                 dma_unmap_page(tx_ring->dev,
4691                                                dma_unmap_addr(tx_buffer, dma),
4692                                                dma_unmap_len(tx_buffer, len),
4693                                                DMA_TO_DEVICE);
4694                 }
4695
4696                 tx_buffer->next_to_watch = NULL;
4697
4698                 /* move us one more past the eop_desc for start of next pkt */
4699                 tx_buffer++;
4700                 i++;
4701                 if (unlikely(i == tx_ring->count)) {
4702                         i = 0;
4703                         tx_buffer = tx_ring->tx_buffer_info;
4704                 }
4705         }
4706
4707         /* reset BQL for queue */
4708         netdev_tx_reset_queue(txring_txq(tx_ring));
4709
4710         /* reset next_to_use and next_to_clean */
4711         tx_ring->next_to_use = 0;
4712         tx_ring->next_to_clean = 0;
4713 }
4714
4715 /**
4716  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
4717  *  @adapter: board private structure
4718  **/
4719 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4720 {
4721         int i;
4722
4723         for (i = 0; i < adapter->num_tx_queues; i++)
4724                 if (adapter->tx_ring[i])
4725                         igb_clean_tx_ring(adapter->tx_ring[i]);
4726 }
4727
4728 /**
4729  *  igb_free_rx_resources - Free Rx Resources
4730  *  @rx_ring: ring to clean the resources from
4731  *
4732  *  Free all receive software resources
4733  **/
4734 void igb_free_rx_resources(struct igb_ring *rx_ring)
4735 {
4736         igb_clean_rx_ring(rx_ring);
4737
4738         vfree(rx_ring->rx_buffer_info);
4739         rx_ring->rx_buffer_info = NULL;
4740
4741         /* if not set, then don't free */
4742         if (!rx_ring->desc)
4743                 return;
4744
4745         dma_free_coherent(rx_ring->dev, rx_ring->size,
4746                           rx_ring->desc, rx_ring->dma);
4747
4748         rx_ring->desc = NULL;
4749 }
4750
4751 /**
4752  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
4753  *  @adapter: board private structure
4754  *
4755  *  Free all receive software resources
4756  **/
4757 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4758 {
4759         int i;
4760
4761         for (i = 0; i < adapter->num_rx_queues; i++)
4762                 if (adapter->rx_ring[i])
4763                         igb_free_rx_resources(adapter->rx_ring[i]);
4764 }
4765
4766 /**
4767  *  igb_clean_rx_ring - Free Rx Buffers per Queue
4768  *  @rx_ring: ring to free buffers from
4769  **/
4770 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
4771 {
4772         u16 i = rx_ring->next_to_clean;
4773
4774         if (rx_ring->skb)
4775                 dev_kfree_skb(rx_ring->skb);
4776         rx_ring->skb = NULL;
4777
4778         /* Free all the Rx ring sk_buffs */
4779         while (i != rx_ring->next_to_alloc) {
4780                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4781
4782                 /* Invalidate cache lines that may have been written to by
4783                  * device so that we avoid corrupting memory.
4784                  */
4785                 dma_sync_single_range_for_cpu(rx_ring->dev,
4786                                               buffer_info->dma,
4787                                               buffer_info->page_offset,
4788                                               igb_rx_bufsz(rx_ring),
4789                                               DMA_FROM_DEVICE);
4790
4791                 /* free resources associated with mapping */
4792                 dma_unmap_page_attrs(rx_ring->dev,
4793                                      buffer_info->dma,
4794                                      igb_rx_pg_size(rx_ring),
4795                                      DMA_FROM_DEVICE,
4796                                      IGB_RX_DMA_ATTR);
4797                 __page_frag_cache_drain(buffer_info->page,
4798                                         buffer_info->pagecnt_bias);
4799
4800                 i++;
4801                 if (i == rx_ring->count)
4802                         i = 0;
4803         }
4804
4805         rx_ring->next_to_alloc = 0;
4806         rx_ring->next_to_clean = 0;
4807         rx_ring->next_to_use = 0;
4808 }
4809
4810 /**
4811  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
4812  *  @adapter: board private structure
4813  **/
4814 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4815 {
4816         int i;
4817
4818         for (i = 0; i < adapter->num_rx_queues; i++)
4819                 if (adapter->rx_ring[i])
4820                         igb_clean_rx_ring(adapter->rx_ring[i]);
4821 }
4822
4823 /**
4824  *  igb_set_mac - Change the Ethernet Address of the NIC
4825  *  @netdev: network interface device structure
4826  *  @p: pointer to an address structure
4827  *
4828  *  Returns 0 on success, negative on failure
4829  **/
4830 static int igb_set_mac(struct net_device *netdev, void *p)
4831 {
4832         struct igb_adapter *adapter = netdev_priv(netdev);
4833         struct e1000_hw *hw = &adapter->hw;
4834         struct sockaddr *addr = p;
4835
4836         if (!is_valid_ether_addr(addr->sa_data))
4837                 return -EADDRNOTAVAIL;
4838
4839         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4840         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4841
4842         /* set the correct pool for the new PF MAC address in entry 0 */
4843         igb_set_default_mac_filter(adapter);
4844
4845         return 0;
4846 }
4847
4848 /**
4849  *  igb_write_mc_addr_list - write multicast addresses to MTA
4850  *  @netdev: network interface device structure
4851  *
4852  *  Writes multicast address list to the MTA hash table.
4853  *  Returns: -ENOMEM on failure
4854  *           0 on no addresses written
4855  *           X on writing X addresses to MTA
4856  **/
4857 static int igb_write_mc_addr_list(struct net_device *netdev)
4858 {
4859         struct igb_adapter *adapter = netdev_priv(netdev);
4860         struct e1000_hw *hw = &adapter->hw;
4861         struct netdev_hw_addr *ha;
4862         u8  *mta_list;
4863         int i;
4864
4865         if (netdev_mc_empty(netdev)) {
4866                 /* nothing to program, so clear mc list */
4867                 igb_update_mc_addr_list(hw, NULL, 0);
4868                 igb_restore_vf_multicasts(adapter);
4869                 return 0;
4870         }
4871
4872         mta_list = kcalloc(netdev_mc_count(netdev), 6, GFP_ATOMIC);
4873         if (!mta_list)
4874                 return -ENOMEM;
4875
4876         /* The shared function expects a packed array of only addresses. */
4877         i = 0;
4878         netdev_for_each_mc_addr(ha, netdev)
4879                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4880
4881         igb_update_mc_addr_list(hw, mta_list, i);
4882         kfree(mta_list);
4883
4884         return netdev_mc_count(netdev);
4885 }
4886
4887 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
4888 {
4889         struct e1000_hw *hw = &adapter->hw;
4890         u32 i, pf_id;
4891
4892         switch (hw->mac.type) {
4893         case e1000_i210:
4894         case e1000_i211:
4895         case e1000_i350:
4896                 /* VLAN filtering needed for VLAN prio filter */
4897                 if (adapter->netdev->features & NETIF_F_NTUPLE)
4898                         break;
4899                 /* fall through */
4900         case e1000_82576:
4901         case e1000_82580:
4902         case e1000_i354:
4903                 /* VLAN filtering needed for pool filtering */
4904                 if (adapter->vfs_allocated_count)
4905                         break;
4906                 /* fall through */
4907         default:
4908                 return 1;
4909         }
4910
4911         /* We are already in VLAN promisc, nothing to do */
4912         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
4913                 return 0;
4914
4915         if (!adapter->vfs_allocated_count)
4916                 goto set_vfta;
4917
4918         /* Add PF to all active pools */
4919         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4920
4921         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4922                 u32 vlvf = rd32(E1000_VLVF(i));
4923
4924                 vlvf |= BIT(pf_id);
4925                 wr32(E1000_VLVF(i), vlvf);
4926         }
4927
4928 set_vfta:
4929         /* Set all bits in the VLAN filter table array */
4930         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
4931                 hw->mac.ops.write_vfta(hw, i, ~0U);
4932
4933         /* Set flag so we don't redo unnecessary work */
4934         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
4935
4936         return 0;
4937 }
4938
4939 #define VFTA_BLOCK_SIZE 8
4940 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
4941 {
4942         struct e1000_hw *hw = &adapter->hw;
4943         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4944         u32 vid_start = vfta_offset * 32;
4945         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4946         u32 i, vid, word, bits, pf_id;
4947
4948         /* guarantee that we don't scrub out management VLAN */
4949         vid = adapter->mng_vlan_id;
4950         if (vid >= vid_start && vid < vid_end)
4951                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4952
4953         if (!adapter->vfs_allocated_count)
4954                 goto set_vfta;
4955
4956         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4957
4958         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4959                 u32 vlvf = rd32(E1000_VLVF(i));
4960
4961                 /* pull VLAN ID from VLVF */
4962                 vid = vlvf & VLAN_VID_MASK;
4963
4964                 /* only concern ourselves with a certain range */
4965                 if (vid < vid_start || vid >= vid_end)
4966                         continue;
4967
4968                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
4969                         /* record VLAN ID in VFTA */
4970                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4971
4972                         /* if PF is part of this then continue */
4973                         if (test_bit(vid, adapter->active_vlans))
4974                                 continue;
4975                 }
4976
4977                 /* remove PF from the pool */
4978                 bits = ~BIT(pf_id);
4979                 bits &= rd32(E1000_VLVF(i));
4980                 wr32(E1000_VLVF(i), bits);
4981         }
4982
4983 set_vfta:
4984         /* extract values from active_vlans and write back to VFTA */
4985         for (i = VFTA_BLOCK_SIZE; i--;) {
4986                 vid = (vfta_offset + i) * 32;
4987                 word = vid / BITS_PER_LONG;
4988                 bits = vid % BITS_PER_LONG;
4989
4990                 vfta[i] |= adapter->active_vlans[word] >> bits;
4991
4992                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
4993         }
4994 }
4995
4996 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
4997 {
4998         u32 i;
4999
5000         /* We are not in VLAN promisc, nothing to do */
5001         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
5002                 return;
5003
5004         /* Set flag so we don't redo unnecessary work */
5005         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
5006
5007         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
5008                 igb_scrub_vfta(adapter, i);
5009 }
5010
5011 /**
5012  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
5013  *  @netdev: network interface device structure
5014  *
5015  *  The set_rx_mode entry point is called whenever the unicast or multicast
5016  *  address lists or the network interface flags are updated.  This routine is
5017  *  responsible for configuring the hardware for proper unicast, multicast,
5018  *  promiscuous mode, and all-multi behavior.
5019  **/
5020 static void igb_set_rx_mode(struct net_device *netdev)
5021 {
5022         struct igb_adapter *adapter = netdev_priv(netdev);
5023         struct e1000_hw *hw = &adapter->hw;
5024         unsigned int vfn = adapter->vfs_allocated_count;
5025         u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
5026         int count;
5027
5028         /* Check for Promiscuous and All Multicast modes */
5029         if (netdev->flags & IFF_PROMISC) {
5030                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
5031                 vmolr |= E1000_VMOLR_MPME;
5032
5033                 /* enable use of UTA filter to force packets to default pool */
5034                 if (hw->mac.type == e1000_82576)
5035                         vmolr |= E1000_VMOLR_ROPE;
5036         } else {
5037                 if (netdev->flags & IFF_ALLMULTI) {
5038                         rctl |= E1000_RCTL_MPE;
5039                         vmolr |= E1000_VMOLR_MPME;
5040                 } else {
5041                         /* Write addresses to the MTA, if the attempt fails
5042                          * then we should just turn on promiscuous mode so
5043                          * that we can at least receive multicast traffic
5044                          */
5045                         count = igb_write_mc_addr_list(netdev);
5046                         if (count < 0) {
5047                                 rctl |= E1000_RCTL_MPE;
5048                                 vmolr |= E1000_VMOLR_MPME;
5049                         } else if (count) {
5050                                 vmolr |= E1000_VMOLR_ROMPE;
5051                         }
5052                 }
5053         }
5054
5055         /* Write addresses to available RAR registers, if there is not
5056          * sufficient space to store all the addresses then enable
5057          * unicast promiscuous mode
5058          */
5059         if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
5060                 rctl |= E1000_RCTL_UPE;
5061                 vmolr |= E1000_VMOLR_ROPE;
5062         }
5063
5064         /* enable VLAN filtering by default */
5065         rctl |= E1000_RCTL_VFE;
5066
5067         /* disable VLAN filtering for modes that require it */
5068         if ((netdev->flags & IFF_PROMISC) ||
5069             (netdev->features & NETIF_F_RXALL)) {
5070                 /* if we fail to set all rules then just clear VFE */
5071                 if (igb_vlan_promisc_enable(adapter))
5072                         rctl &= ~E1000_RCTL_VFE;
5073         } else {
5074                 igb_vlan_promisc_disable(adapter);
5075         }
5076
5077         /* update state of unicast, multicast, and VLAN filtering modes */
5078         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
5079                                      E1000_RCTL_VFE);
5080         wr32(E1000_RCTL, rctl);
5081
5082 #if (PAGE_SIZE < 8192)
5083         if (!adapter->vfs_allocated_count) {
5084                 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5085                         rlpml = IGB_MAX_FRAME_BUILD_SKB;
5086         }
5087 #endif
5088         wr32(E1000_RLPML, rlpml);
5089
5090         /* In order to support SR-IOV and eventually VMDq it is necessary to set
5091          * the VMOLR to enable the appropriate modes.  Without this workaround
5092          * we will have issues with VLAN tag stripping not being done for frames
5093          * that are only arriving because we are the default pool
5094          */
5095         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
5096                 return;
5097
5098         /* set UTA to appropriate mode */
5099         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
5100
5101         vmolr |= rd32(E1000_VMOLR(vfn)) &
5102                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
5103
5104         /* enable Rx jumbo frames, restrict as needed to support build_skb */
5105         vmolr &= ~E1000_VMOLR_RLPML_MASK;
5106 #if (PAGE_SIZE < 8192)
5107         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5108                 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
5109         else
5110 #endif
5111                 vmolr |= MAX_JUMBO_FRAME_SIZE;
5112         vmolr |= E1000_VMOLR_LPE;
5113
5114         wr32(E1000_VMOLR(vfn), vmolr);
5115
5116         igb_restore_vf_multicasts(adapter);
5117 }
5118
5119 static void igb_check_wvbr(struct igb_adapter *adapter)
5120 {
5121         struct e1000_hw *hw = &adapter->hw;
5122         u32 wvbr = 0;
5123
5124         switch (hw->mac.type) {
5125         case e1000_82576:
5126         case e1000_i350:
5127                 wvbr = rd32(E1000_WVBR);
5128                 if (!wvbr)
5129                         return;
5130                 break;
5131         default:
5132                 break;
5133         }
5134
5135         adapter->wvbr |= wvbr;
5136 }
5137
5138 #define IGB_STAGGERED_QUEUE_OFFSET 8
5139
5140 static void igb_spoof_check(struct igb_adapter *adapter)
5141 {
5142         int j;
5143
5144         if (!adapter->wvbr)
5145                 return;
5146
5147         for (j = 0; j < adapter->vfs_allocated_count; j++) {
5148                 if (adapter->wvbr & BIT(j) ||
5149                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
5150                         dev_warn(&adapter->pdev->dev,
5151                                 "Spoof event(s) detected on VF %d\n", j);
5152                         adapter->wvbr &=
5153                                 ~(BIT(j) |
5154                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
5155                 }
5156         }
5157 }
5158
5159 /* Need to wait a few seconds after link up to get diagnostic information from
5160  * the phy
5161  */
5162 static void igb_update_phy_info(struct timer_list *t)
5163 {
5164         struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
5165         igb_get_phy_info(&adapter->hw);
5166 }
5167
5168 /**
5169  *  igb_has_link - check shared code for link and determine up/down
5170  *  @adapter: pointer to driver private info
5171  **/
5172 bool igb_has_link(struct igb_adapter *adapter)
5173 {
5174         struct e1000_hw *hw = &adapter->hw;
5175         bool link_active = false;
5176
5177         /* get_link_status is set on LSC (link status) interrupt or
5178          * rx sequence error interrupt.  get_link_status will stay
5179          * false until the e1000_check_for_link establishes link
5180          * for copper adapters ONLY
5181          */
5182         switch (hw->phy.media_type) {
5183         case e1000_media_type_copper:
5184                 if (!hw->mac.get_link_status)
5185                         return true;
5186                 /* fall through */
5187         case e1000_media_type_internal_serdes:
5188                 hw->mac.ops.check_for_link(hw);
5189                 link_active = !hw->mac.get_link_status;
5190                 break;
5191         default:
5192         case e1000_media_type_unknown:
5193                 break;
5194         }
5195
5196         if (((hw->mac.type == e1000_i210) ||
5197              (hw->mac.type == e1000_i211)) &&
5198              (hw->phy.id == I210_I_PHY_ID)) {
5199                 if (!netif_carrier_ok(adapter->netdev)) {
5200                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5201                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
5202                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
5203                         adapter->link_check_timeout = jiffies;
5204                 }
5205         }
5206
5207         return link_active;
5208 }
5209
5210 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
5211 {
5212         bool ret = false;
5213         u32 ctrl_ext, thstat;
5214
5215         /* check for thermal sensor event on i350 copper only */
5216         if (hw->mac.type == e1000_i350) {
5217                 thstat = rd32(E1000_THSTAT);
5218                 ctrl_ext = rd32(E1000_CTRL_EXT);
5219
5220                 if ((hw->phy.media_type == e1000_media_type_copper) &&
5221                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
5222                         ret = !!(thstat & event);
5223         }
5224
5225         return ret;
5226 }
5227
5228 /**
5229  *  igb_check_lvmmc - check for malformed packets received
5230  *  and indicated in LVMMC register
5231  *  @adapter: pointer to adapter
5232  **/
5233 static void igb_check_lvmmc(struct igb_adapter *adapter)
5234 {
5235         struct e1000_hw *hw = &adapter->hw;
5236         u32 lvmmc;
5237
5238         lvmmc = rd32(E1000_LVMMC);
5239         if (lvmmc) {
5240                 if (unlikely(net_ratelimit())) {
5241                         netdev_warn(adapter->netdev,
5242                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
5243                                     lvmmc);
5244                 }
5245         }
5246 }
5247
5248 /**
5249  *  igb_watchdog - Timer Call-back
5250  *  @data: pointer to adapter cast into an unsigned long
5251  **/
5252 static void igb_watchdog(struct timer_list *t)
5253 {
5254         struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5255         /* Do the rest outside of interrupt context */
5256         schedule_work(&adapter->watchdog_task);
5257 }
5258
5259 static void igb_watchdog_task(struct work_struct *work)
5260 {
5261         struct igb_adapter *adapter = container_of(work,
5262                                                    struct igb_adapter,
5263                                                    watchdog_task);
5264         struct e1000_hw *hw = &adapter->hw;
5265         struct e1000_phy_info *phy = &hw->phy;
5266         struct net_device *netdev = adapter->netdev;
5267         u32 link;
5268         int i;
5269         u32 connsw;
5270         u16 phy_data, retry_count = 20;
5271
5272         link = igb_has_link(adapter);
5273
5274         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
5275                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
5276                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5277                 else
5278                         link = false;
5279         }
5280
5281         /* Force link down if we have fiber to swap to */
5282         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5283                 if (hw->phy.media_type == e1000_media_type_copper) {
5284                         connsw = rd32(E1000_CONNSW);
5285                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
5286                                 link = 0;
5287                 }
5288         }
5289         if (link) {
5290                 /* Perform a reset if the media type changed. */
5291                 if (hw->dev_spec._82575.media_changed) {
5292                         hw->dev_spec._82575.media_changed = false;
5293                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
5294                         igb_reset(adapter);
5295                 }
5296                 /* Cancel scheduled suspend requests. */
5297                 pm_runtime_resume(netdev->dev.parent);
5298
5299                 if (!netif_carrier_ok(netdev)) {
5300                         u32 ctrl;
5301
5302                         hw->mac.ops.get_speed_and_duplex(hw,
5303                                                          &adapter->link_speed,
5304                                                          &adapter->link_duplex);
5305
5306                         ctrl = rd32(E1000_CTRL);
5307                         /* Links status message must follow this format */
5308                         netdev_info(netdev,
5309                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5310                                netdev->name,
5311                                adapter->link_speed,
5312                                adapter->link_duplex == FULL_DUPLEX ?
5313                                "Full" : "Half",
5314                                (ctrl & E1000_CTRL_TFCE) &&
5315                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
5316                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
5317                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
5318
5319                         /* disable EEE if enabled */
5320                         if ((adapter->flags & IGB_FLAG_EEE) &&
5321                                 (adapter->link_duplex == HALF_DUPLEX)) {
5322                                 dev_info(&adapter->pdev->dev,
5323                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
5324                                 adapter->hw.dev_spec._82575.eee_disable = true;
5325                                 adapter->flags &= ~IGB_FLAG_EEE;
5326                         }
5327
5328                         /* check if SmartSpeed worked */
5329                         igb_check_downshift(hw);
5330                         if (phy->speed_downgraded)
5331                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
5332
5333                         /* check for thermal sensor event */
5334                         if (igb_thermal_sensor_event(hw,
5335                             E1000_THSTAT_LINK_THROTTLE))
5336                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
5337
5338                         /* adjust timeout factor according to speed/duplex */
5339                         adapter->tx_timeout_factor = 1;
5340                         switch (adapter->link_speed) {
5341                         case SPEED_10:
5342                                 adapter->tx_timeout_factor = 14;
5343                                 break;
5344                         case SPEED_100:
5345                                 /* maybe add some timeout factor ? */
5346                                 break;
5347                         }
5348
5349                         if (adapter->link_speed != SPEED_1000 ||
5350                             !hw->phy.ops.read_reg)
5351                                 goto no_wait;
5352
5353                         /* wait for Remote receiver status OK */
5354 retry_read_status:
5355                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
5356                                               &phy_data)) {
5357                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
5358                                     retry_count) {
5359                                         msleep(100);
5360                                         retry_count--;
5361                                         goto retry_read_status;
5362                                 } else if (!retry_count) {
5363                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
5364                                 }
5365                         } else {
5366                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
5367                         }
5368 no_wait:
5369                         netif_carrier_on(netdev);
5370
5371                         igb_ping_all_vfs(adapter);
5372                         igb_check_vf_rate_limit(adapter);
5373
5374                         /* link state has changed, schedule phy info update */
5375                         if (!test_bit(__IGB_DOWN, &adapter->state))
5376                                 mod_timer(&adapter->phy_info_timer,
5377                                           round_jiffies(jiffies + 2 * HZ));
5378                 }
5379         } else {
5380                 if (netif_carrier_ok(netdev)) {
5381                         adapter->link_speed = 0;
5382                         adapter->link_duplex = 0;
5383
5384                         /* check for thermal sensor event */
5385                         if (igb_thermal_sensor_event(hw,
5386                             E1000_THSTAT_PWR_DOWN)) {
5387                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
5388                         }
5389
5390                         /* Links status message must follow this format */
5391                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
5392                                netdev->name);
5393                         netif_carrier_off(netdev);
5394
5395                         igb_ping_all_vfs(adapter);
5396
5397                         /* link state has changed, schedule phy info update */
5398                         if (!test_bit(__IGB_DOWN, &adapter->state))
5399                                 mod_timer(&adapter->phy_info_timer,
5400                                           round_jiffies(jiffies + 2 * HZ));
5401
5402                         /* link is down, time to check for alternate media */
5403                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5404                                 igb_check_swap_media(adapter);
5405                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5406                                         schedule_work(&adapter->reset_task);
5407                                         /* return immediately */
5408                                         return;
5409                                 }
5410                         }
5411                         pm_schedule_suspend(netdev->dev.parent,
5412                                             MSEC_PER_SEC * 5);
5413
5414                 /* also check for alternate media here */
5415                 } else if (!netif_carrier_ok(netdev) &&
5416                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
5417                         igb_check_swap_media(adapter);
5418                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5419                                 schedule_work(&adapter->reset_task);
5420                                 /* return immediately */
5421                                 return;
5422                         }
5423                 }
5424         }
5425
5426         spin_lock(&adapter->stats64_lock);
5427         igb_update_stats(adapter);
5428         spin_unlock(&adapter->stats64_lock);
5429
5430         for (i = 0; i < adapter->num_tx_queues; i++) {
5431                 struct igb_ring *tx_ring = adapter->tx_ring[i];
5432                 if (!netif_carrier_ok(netdev)) {
5433                         /* We've lost link, so the controller stops DMA,
5434                          * but we've got queued Tx work that's never going
5435                          * to get done, so reset controller to flush Tx.
5436                          * (Do the reset outside of interrupt context).
5437                          */
5438                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
5439                                 adapter->tx_timeout_count++;
5440                                 schedule_work(&adapter->reset_task);
5441                                 /* return immediately since reset is imminent */
5442                                 return;
5443                         }
5444                 }
5445
5446                 /* Force detection of hung controller every watchdog period */
5447                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5448         }
5449
5450         /* Cause software interrupt to ensure Rx ring is cleaned */
5451         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
5452                 u32 eics = 0;
5453
5454                 for (i = 0; i < adapter->num_q_vectors; i++)
5455                         eics |= adapter->q_vector[i]->eims_value;
5456                 wr32(E1000_EICS, eics);
5457         } else {
5458                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
5459         }
5460
5461         igb_spoof_check(adapter);
5462         igb_ptp_rx_hang(adapter);
5463         igb_ptp_tx_hang(adapter);
5464
5465         /* Check LVMMC register on i350/i354 only */
5466         if ((adapter->hw.mac.type == e1000_i350) ||
5467             (adapter->hw.mac.type == e1000_i354))
5468                 igb_check_lvmmc(adapter);
5469
5470         /* Reset the timer */
5471         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5472                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
5473                         mod_timer(&adapter->watchdog_timer,
5474                                   round_jiffies(jiffies +  HZ));
5475                 else
5476                         mod_timer(&adapter->watchdog_timer,
5477                                   round_jiffies(jiffies + 2 * HZ));
5478         }
5479 }
5480
5481 enum latency_range {
5482         lowest_latency = 0,
5483         low_latency = 1,
5484         bulk_latency = 2,
5485         latency_invalid = 255
5486 };
5487
5488 /**
5489  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
5490  *  @q_vector: pointer to q_vector
5491  *
5492  *  Stores a new ITR value based on strictly on packet size.  This
5493  *  algorithm is less sophisticated than that used in igb_update_itr,
5494  *  due to the difficulty of synchronizing statistics across multiple
5495  *  receive rings.  The divisors and thresholds used by this function
5496  *  were determined based on theoretical maximum wire speed and testing
5497  *  data, in order to minimize response time while increasing bulk
5498  *  throughput.
5499  *  This functionality is controlled by ethtool's coalescing settings.
5500  *  NOTE:  This function is called only when operating in a multiqueue
5501  *         receive environment.
5502  **/
5503 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
5504 {
5505         int new_val = q_vector->itr_val;
5506         int avg_wire_size = 0;
5507         struct igb_adapter *adapter = q_vector->adapter;
5508         unsigned int packets;
5509
5510         /* For non-gigabit speeds, just fix the interrupt rate at 4000
5511          * ints/sec - ITR timer value of 120 ticks.
5512          */
5513         if (adapter->link_speed != SPEED_1000) {
5514                 new_val = IGB_4K_ITR;
5515                 goto set_itr_val;
5516         }
5517
5518         packets = q_vector->rx.total_packets;
5519         if (packets)
5520                 avg_wire_size = q_vector->rx.total_bytes / packets;
5521
5522         packets = q_vector->tx.total_packets;
5523         if (packets)
5524                 avg_wire_size = max_t(u32, avg_wire_size,
5525                                       q_vector->tx.total_bytes / packets);
5526
5527         /* if avg_wire_size isn't set no work was done */
5528         if (!avg_wire_size)
5529                 goto clear_counts;
5530
5531         /* Add 24 bytes to size to account for CRC, preamble, and gap */
5532         avg_wire_size += 24;
5533
5534         /* Don't starve jumbo frames */
5535         avg_wire_size = min(avg_wire_size, 3000);
5536
5537         /* Give a little boost to mid-size frames */
5538         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
5539                 new_val = avg_wire_size / 3;
5540         else
5541                 new_val = avg_wire_size / 2;
5542
5543         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5544         if (new_val < IGB_20K_ITR &&
5545             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5546              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5547                 new_val = IGB_20K_ITR;
5548
5549 set_itr_val:
5550         if (new_val != q_vector->itr_val) {
5551                 q_vector->itr_val = new_val;
5552                 q_vector->set_itr = 1;
5553         }
5554 clear_counts:
5555         q_vector->rx.total_bytes = 0;
5556         q_vector->rx.total_packets = 0;
5557         q_vector->tx.total_bytes = 0;
5558         q_vector->tx.total_packets = 0;
5559 }
5560
5561 /**
5562  *  igb_update_itr - update the dynamic ITR value based on statistics
5563  *  @q_vector: pointer to q_vector
5564  *  @ring_container: ring info to update the itr for
5565  *
5566  *  Stores a new ITR value based on packets and byte
5567  *  counts during the last interrupt.  The advantage of per interrupt
5568  *  computation is faster updates and more accurate ITR for the current
5569  *  traffic pattern.  Constants in this function were computed
5570  *  based on theoretical maximum wire speed and thresholds were set based
5571  *  on testing data as well as attempting to minimize response time
5572  *  while increasing bulk throughput.
5573  *  This functionality is controlled by ethtool's coalescing settings.
5574  *  NOTE:  These calculations are only valid when operating in a single-
5575  *         queue environment.
5576  **/
5577 static void igb_update_itr(struct igb_q_vector *q_vector,
5578                            struct igb_ring_container *ring_container)
5579 {
5580         unsigned int packets = ring_container->total_packets;
5581         unsigned int bytes = ring_container->total_bytes;
5582         u8 itrval = ring_container->itr;
5583
5584         /* no packets, exit with status unchanged */
5585         if (packets == 0)
5586                 return;
5587
5588         switch (itrval) {
5589         case lowest_latency:
5590                 /* handle TSO and jumbo frames */
5591                 if (bytes/packets > 8000)
5592                         itrval = bulk_latency;
5593                 else if ((packets < 5) && (bytes > 512))
5594                         itrval = low_latency;
5595                 break;
5596         case low_latency:  /* 50 usec aka 20000 ints/s */
5597                 if (bytes > 10000) {
5598                         /* this if handles the TSO accounting */
5599                         if (bytes/packets > 8000)
5600                                 itrval = bulk_latency;
5601                         else if ((packets < 10) || ((bytes/packets) > 1200))
5602                                 itrval = bulk_latency;
5603                         else if ((packets > 35))
5604                                 itrval = lowest_latency;
5605                 } else if (bytes/packets > 2000) {
5606                         itrval = bulk_latency;
5607                 } else if (packets <= 2 && bytes < 512) {
5608                         itrval = lowest_latency;
5609                 }
5610                 break;
5611         case bulk_latency: /* 250 usec aka 4000 ints/s */
5612                 if (bytes > 25000) {
5613                         if (packets > 35)
5614                                 itrval = low_latency;
5615                 } else if (bytes < 1500) {
5616                         itrval = low_latency;
5617                 }
5618                 break;
5619         }
5620
5621         /* clear work counters since we have the values we need */
5622         ring_container->total_bytes = 0;
5623         ring_container->total_packets = 0;
5624
5625         /* write updated itr to ring container */
5626         ring_container->itr = itrval;
5627 }
5628
5629 static void igb_set_itr(struct igb_q_vector *q_vector)
5630 {
5631         struct igb_adapter *adapter = q_vector->adapter;
5632         u32 new_itr = q_vector->itr_val;
5633         u8 current_itr = 0;
5634
5635         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5636         if (adapter->link_speed != SPEED_1000) {
5637                 current_itr = 0;
5638                 new_itr = IGB_4K_ITR;
5639                 goto set_itr_now;
5640         }
5641
5642         igb_update_itr(q_vector, &q_vector->tx);
5643         igb_update_itr(q_vector, &q_vector->rx);
5644
5645         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5646
5647         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5648         if (current_itr == lowest_latency &&
5649             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5650              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5651                 current_itr = low_latency;
5652
5653         switch (current_itr) {
5654         /* counts and packets in update_itr are dependent on these numbers */
5655         case lowest_latency:
5656                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5657                 break;
5658         case low_latency:
5659                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5660                 break;
5661         case bulk_latency:
5662                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5663                 break;
5664         default:
5665                 break;
5666         }
5667
5668 set_itr_now:
5669         if (new_itr != q_vector->itr_val) {
5670                 /* this attempts to bias the interrupt rate towards Bulk
5671                  * by adding intermediate steps when interrupt rate is
5672                  * increasing
5673                  */
5674                 new_itr = new_itr > q_vector->itr_val ?
5675                           max((new_itr * q_vector->itr_val) /
5676                           (new_itr + (q_vector->itr_val >> 2)),
5677                           new_itr) : new_itr;
5678                 /* Don't write the value here; it resets the adapter's
5679                  * internal timer, and causes us to delay far longer than
5680                  * we should between interrupts.  Instead, we write the ITR
5681                  * value at the beginning of the next interrupt so the timing
5682                  * ends up being correct.
5683                  */
5684                 q_vector->itr_val = new_itr;
5685                 q_vector->set_itr = 1;
5686         }
5687 }
5688
5689 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring,
5690                             struct igb_tx_buffer *first,
5691                             u32 vlan_macip_lens, u32 type_tucmd,
5692                             u32 mss_l4len_idx)
5693 {
5694         struct e1000_adv_tx_context_desc *context_desc;
5695         u16 i = tx_ring->next_to_use;
5696         struct timespec64 ts;
5697
5698         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5699
5700         i++;
5701         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5702
5703         /* set bits to identify this as an advanced context descriptor */
5704         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5705
5706         /* For 82575, context index must be unique per ring. */
5707         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5708                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5709
5710         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5711         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5712         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5713
5714         /* We assume there is always a valid tx time available. Invalid times
5715          * should have been handled by the upper layers.
5716          */
5717         if (tx_ring->launchtime_enable) {
5718                 ts = ns_to_timespec64(first->skb->tstamp);
5719                 first->skb->tstamp = 0;
5720                 context_desc->seqnum_seed = cpu_to_le32(ts.tv_nsec / 32);
5721         } else {
5722                 context_desc->seqnum_seed = 0;
5723         }
5724 }
5725
5726 static int igb_tso(struct igb_ring *tx_ring,
5727                    struct igb_tx_buffer *first,
5728                    u8 *hdr_len)
5729 {
5730         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
5731         struct sk_buff *skb = first->skb;
5732         union {
5733                 struct iphdr *v4;
5734                 struct ipv6hdr *v6;
5735                 unsigned char *hdr;
5736         } ip;
5737         union {
5738                 struct tcphdr *tcp;
5739                 unsigned char *hdr;
5740         } l4;
5741         u32 paylen, l4_offset;
5742         int err;
5743
5744         if (skb->ip_summed != CHECKSUM_PARTIAL)
5745                 return 0;
5746
5747         if (!skb_is_gso(skb))
5748                 return 0;
5749
5750         err = skb_cow_head(skb, 0);
5751         if (err < 0)
5752                 return err;
5753
5754         ip.hdr = skb_network_header(skb);
5755         l4.hdr = skb_checksum_start(skb);
5756
5757         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5758         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5759
5760         /* initialize outer IP header fields */
5761         if (ip.v4->version == 4) {
5762                 unsigned char *csum_start = skb_checksum_start(skb);
5763                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
5764
5765                 /* IP header will have to cancel out any data that
5766                  * is not a part of the outer IP header
5767                  */
5768                 ip.v4->check = csum_fold(csum_partial(trans_start,
5769                                                       csum_start - trans_start,
5770                                                       0));
5771                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5772
5773                 ip.v4->tot_len = 0;
5774                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5775                                    IGB_TX_FLAGS_CSUM |
5776                                    IGB_TX_FLAGS_IPV4;
5777         } else {
5778                 ip.v6->payload_len = 0;
5779                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5780                                    IGB_TX_FLAGS_CSUM;
5781         }
5782
5783         /* determine offset of inner transport header */
5784         l4_offset = l4.hdr - skb->data;
5785
5786         /* compute length of segmentation header */
5787         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
5788
5789         /* remove payload length from inner checksum */
5790         paylen = skb->len - l4_offset;
5791         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
5792
5793         /* update gso size and bytecount with header size */
5794         first->gso_segs = skb_shinfo(skb)->gso_segs;
5795         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5796
5797         /* MSS L4LEN IDX */
5798         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
5799         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5800
5801         /* VLAN MACLEN IPLEN */
5802         vlan_macip_lens = l4.hdr - ip.hdr;
5803         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
5804         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5805
5806         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens,
5807                         type_tucmd, mss_l4len_idx);
5808
5809         return 1;
5810 }
5811
5812 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff *skb)
5813 {
5814         unsigned int offset = 0;
5815
5816         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
5817
5818         return offset == skb_checksum_start_offset(skb);
5819 }
5820
5821 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5822 {
5823         struct sk_buff *skb = first->skb;
5824         u32 vlan_macip_lens = 0;
5825         u32 type_tucmd = 0;
5826
5827         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5828 csum_failed:
5829                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN) &&
5830                     !tx_ring->launchtime_enable)
5831                         return;
5832                 goto no_csum;
5833         }
5834
5835         switch (skb->csum_offset) {
5836         case offsetof(struct tcphdr, check):
5837                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5838                 /* fall through */
5839         case offsetof(struct udphdr, check):
5840                 break;
5841         case offsetof(struct sctphdr, checksum):
5842                 /* validate that this is actually an SCTP request */
5843                 if (((first->protocol == htons(ETH_P_IP)) &&
5844                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
5845                     ((first->protocol == htons(ETH_P_IPV6)) &&
5846                      igb_ipv6_csum_is_sctp(skb))) {
5847                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
5848                         break;
5849                 }
5850                 /* fall through */
5851         default:
5852                 skb_checksum_help(skb);
5853                 goto csum_failed;
5854         }
5855
5856         /* update TX checksum flag */
5857         first->tx_flags |= IGB_TX_FLAGS_CSUM;
5858         vlan_macip_lens = skb_checksum_start_offset(skb) -
5859                           skb_network_offset(skb);
5860 no_csum:
5861         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5862         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5863
5864         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens, type_tucmd, 0);
5865 }
5866
5867 #define IGB_SET_FLAG(_input, _flag, _result) \
5868         ((_flag <= _result) ? \
5869          ((u32)(_input & _flag) * (_result / _flag)) : \
5870          ((u32)(_input & _flag) / (_flag / _result)))
5871
5872 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5873 {
5874         /* set type for advanced descriptor with frame checksum insertion */
5875         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5876                        E1000_ADVTXD_DCMD_DEXT |
5877                        E1000_ADVTXD_DCMD_IFCS;
5878
5879         /* set HW vlan bit if vlan is present */
5880         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5881                                  (E1000_ADVTXD_DCMD_VLE));
5882
5883         /* set segmentation bits for TSO */
5884         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5885                                  (E1000_ADVTXD_DCMD_TSE));
5886
5887         /* set timestamp bit if present */
5888         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5889                                  (E1000_ADVTXD_MAC_TSTAMP));
5890
5891         /* insert frame checksum */
5892         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
5893
5894         return cmd_type;
5895 }
5896
5897 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5898                                  union e1000_adv_tx_desc *tx_desc,
5899                                  u32 tx_flags, unsigned int paylen)
5900 {
5901         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5902
5903         /* 82575 requires a unique index per ring */
5904         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5905                 olinfo_status |= tx_ring->reg_idx << 4;
5906
5907         /* insert L4 checksum */
5908         olinfo_status |= IGB_SET_FLAG(tx_flags,
5909                                       IGB_TX_FLAGS_CSUM,
5910                                       (E1000_TXD_POPTS_TXSM << 8));
5911
5912         /* insert IPv4 checksum */
5913         olinfo_status |= IGB_SET_FLAG(tx_flags,
5914                                       IGB_TX_FLAGS_IPV4,
5915                                       (E1000_TXD_POPTS_IXSM << 8));
5916
5917         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5918 }
5919
5920 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5921 {
5922         struct net_device *netdev = tx_ring->netdev;
5923
5924         netif_stop_subqueue(netdev, tx_ring->queue_index);
5925
5926         /* Herbert's original patch had:
5927          *  smp_mb__after_netif_stop_queue();
5928          * but since that doesn't exist yet, just open code it.
5929          */
5930         smp_mb();
5931
5932         /* We need to check again in a case another CPU has just
5933          * made room available.
5934          */
5935         if (igb_desc_unused(tx_ring) < size)
5936                 return -EBUSY;
5937
5938         /* A reprieve! */
5939         netif_wake_subqueue(netdev, tx_ring->queue_index);
5940
5941         u64_stats_update_begin(&tx_ring->tx_syncp2);
5942         tx_ring->tx_stats.restart_queue2++;
5943         u64_stats_update_end(&tx_ring->tx_syncp2);
5944
5945         return 0;
5946 }
5947
5948 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5949 {
5950         if (igb_desc_unused(tx_ring) >= size)
5951                 return 0;
5952         return __igb_maybe_stop_tx(tx_ring, size);
5953 }
5954
5955 static int igb_tx_map(struct igb_ring *tx_ring,
5956                       struct igb_tx_buffer *first,
5957                       const u8 hdr_len)
5958 {
5959         struct sk_buff *skb = first->skb;
5960         struct igb_tx_buffer *tx_buffer;
5961         union e1000_adv_tx_desc *tx_desc;
5962         struct skb_frag_struct *frag;
5963         dma_addr_t dma;
5964         unsigned int data_len, size;
5965         u32 tx_flags = first->tx_flags;
5966         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5967         u16 i = tx_ring->next_to_use;
5968
5969         tx_desc = IGB_TX_DESC(tx_ring, i);
5970
5971         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5972
5973         size = skb_headlen(skb);
5974         data_len = skb->data_len;
5975
5976         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5977
5978         tx_buffer = first;
5979
5980         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5981                 if (dma_mapping_error(tx_ring->dev, dma))
5982                         goto dma_error;
5983
5984                 /* record length, and DMA address */
5985                 dma_unmap_len_set(tx_buffer, len, size);
5986                 dma_unmap_addr_set(tx_buffer, dma, dma);
5987
5988                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5989
5990                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5991                         tx_desc->read.cmd_type_len =
5992                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5993
5994                         i++;
5995                         tx_desc++;
5996                         if (i == tx_ring->count) {
5997                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5998                                 i = 0;
5999                         }
6000                         tx_desc->read.olinfo_status = 0;
6001
6002                         dma += IGB_MAX_DATA_PER_TXD;
6003                         size -= IGB_MAX_DATA_PER_TXD;
6004
6005                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
6006                 }
6007
6008                 if (likely(!data_len))
6009                         break;
6010
6011                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6012
6013                 i++;
6014                 tx_desc++;
6015                 if (i == tx_ring->count) {
6016                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6017                         i = 0;
6018                 }
6019                 tx_desc->read.olinfo_status = 0;
6020
6021                 size = skb_frag_size(frag);
6022                 data_len -= size;
6023
6024                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
6025                                        size, DMA_TO_DEVICE);
6026
6027                 tx_buffer = &tx_ring->tx_buffer_info[i];
6028         }
6029
6030         /* write last descriptor with RS and EOP bits */
6031         cmd_type |= size | IGB_TXD_DCMD;
6032         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6033
6034         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6035
6036         /* set the timestamp */
6037         first->time_stamp = jiffies;
6038
6039         /* Force memory writes to complete before letting h/w know there
6040          * are new descriptors to fetch.  (Only applicable for weak-ordered
6041          * memory model archs, such as IA-64).
6042          *
6043          * We also need this memory barrier to make certain all of the
6044          * status bits have been updated before next_to_watch is written.
6045          */
6046         dma_wmb();
6047
6048         /* set next_to_watch value indicating a packet is present */
6049         first->next_to_watch = tx_desc;
6050
6051         i++;
6052         if (i == tx_ring->count)
6053                 i = 0;
6054
6055         tx_ring->next_to_use = i;
6056
6057         /* Make sure there is space in the ring for the next send. */
6058         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6059
6060         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
6061                 writel(i, tx_ring->tail);
6062
6063                 /* we need this if more than one processor can write to our tail
6064                  * at a time, it synchronizes IO on IA64/Altix systems
6065                  */
6066                 mmiowb();
6067         }
6068         return 0;
6069
6070 dma_error:
6071         dev_err(tx_ring->dev, "TX DMA map failed\n");
6072         tx_buffer = &tx_ring->tx_buffer_info[i];
6073
6074         /* clear dma mappings for failed tx_buffer_info map */
6075         while (tx_buffer != first) {
6076                 if (dma_unmap_len(tx_buffer, len))
6077                         dma_unmap_page(tx_ring->dev,
6078                                        dma_unmap_addr(tx_buffer, dma),
6079                                        dma_unmap_len(tx_buffer, len),
6080                                        DMA_TO_DEVICE);
6081                 dma_unmap_len_set(tx_buffer, len, 0);
6082
6083                 if (i-- == 0)
6084                         i += tx_ring->count;
6085                 tx_buffer = &tx_ring->tx_buffer_info[i];
6086         }
6087
6088         if (dma_unmap_len(tx_buffer, len))
6089                 dma_unmap_single(tx_ring->dev,
6090                                  dma_unmap_addr(tx_buffer, dma),
6091                                  dma_unmap_len(tx_buffer, len),
6092                                  DMA_TO_DEVICE);
6093         dma_unmap_len_set(tx_buffer, len, 0);
6094
6095         dev_kfree_skb_any(tx_buffer->skb);
6096         tx_buffer->skb = NULL;
6097
6098         tx_ring->next_to_use = i;
6099
6100         return -1;
6101 }
6102
6103 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
6104                                 struct igb_ring *tx_ring)
6105 {
6106         struct igb_tx_buffer *first;
6107         int tso;
6108         u32 tx_flags = 0;
6109         unsigned short f;
6110         u16 count = TXD_USE_COUNT(skb_headlen(skb));
6111         __be16 protocol = vlan_get_protocol(skb);
6112         u8 hdr_len = 0;
6113
6114         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
6115          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
6116          *       + 2 desc gap to keep tail from touching head,
6117          *       + 1 desc for context descriptor,
6118          * otherwise try next time
6119          */
6120         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6121                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
6122
6123         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
6124                 /* this is a hard error */
6125                 return NETDEV_TX_BUSY;
6126         }
6127
6128         /* record the location of the first descriptor for this packet */
6129         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6130         first->skb = skb;
6131         first->bytecount = skb->len;
6132         first->gso_segs = 1;
6133
6134         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6135                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6136
6137                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
6138                     !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
6139                                            &adapter->state)) {
6140                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6141                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
6142
6143                         adapter->ptp_tx_skb = skb_get(skb);
6144                         adapter->ptp_tx_start = jiffies;
6145                         if (adapter->hw.mac.type == e1000_82576)
6146                                 schedule_work(&adapter->ptp_tx_work);
6147                 } else {
6148                         adapter->tx_hwtstamp_skipped++;
6149                 }
6150         }
6151
6152         if (skb_vlan_tag_present(skb)) {
6153                 tx_flags |= IGB_TX_FLAGS_VLAN;
6154                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
6155         }
6156
6157         /* record initial flags and protocol */
6158         first->tx_flags = tx_flags;
6159         first->protocol = protocol;
6160
6161         tso = igb_tso(tx_ring, first, &hdr_len);
6162         if (tso < 0)
6163                 goto out_drop;
6164         else if (!tso)
6165                 igb_tx_csum(tx_ring, first);
6166
6167         skb_tx_timestamp(skb);
6168
6169         if (igb_tx_map(tx_ring, first, hdr_len))
6170                 goto cleanup_tx_tstamp;
6171
6172         return NETDEV_TX_OK;
6173
6174 out_drop:
6175         dev_kfree_skb_any(first->skb);
6176         first->skb = NULL;
6177 cleanup_tx_tstamp:
6178         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
6179                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6180
6181                 dev_kfree_skb_any(adapter->ptp_tx_skb);
6182                 adapter->ptp_tx_skb = NULL;
6183                 if (adapter->hw.mac.type == e1000_82576)
6184                         cancel_work_sync(&adapter->ptp_tx_work);
6185                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
6186         }
6187
6188         return NETDEV_TX_OK;
6189 }
6190
6191 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
6192                                                     struct sk_buff *skb)
6193 {
6194         unsigned int r_idx = skb->queue_mapping;
6195
6196         if (r_idx >= adapter->num_tx_queues)
6197                 r_idx = r_idx % adapter->num_tx_queues;
6198
6199         return adapter->tx_ring[r_idx];
6200 }
6201
6202 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
6203                                   struct net_device *netdev)
6204 {
6205         struct igb_adapter *adapter = netdev_priv(netdev);
6206
6207         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
6208          * in order to meet this minimum size requirement.
6209          */
6210         if (skb_put_padto(skb, 17))
6211                 return NETDEV_TX_OK;
6212
6213         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
6214 }
6215
6216 /**
6217  *  igb_tx_timeout - Respond to a Tx Hang
6218  *  @netdev: network interface device structure
6219  **/
6220 static void igb_tx_timeout(struct net_device *netdev)
6221 {
6222         struct igb_adapter *adapter = netdev_priv(netdev);
6223         struct e1000_hw *hw = &adapter->hw;
6224
6225         /* Do the reset outside of interrupt context */
6226         adapter->tx_timeout_count++;
6227
6228         if (hw->mac.type >= e1000_82580)
6229                 hw->dev_spec._82575.global_device_reset = true;
6230
6231         schedule_work(&adapter->reset_task);
6232         wr32(E1000_EICS,
6233              (adapter->eims_enable_mask & ~adapter->eims_other));
6234 }
6235
6236 static void igb_reset_task(struct work_struct *work)
6237 {
6238         struct igb_adapter *adapter;
6239         adapter = container_of(work, struct igb_adapter, reset_task);
6240
6241         rtnl_lock();
6242         /* If we're already down or resetting, just bail */
6243         if (test_bit(__IGB_DOWN, &adapter->state) ||
6244             test_bit(__IGB_RESETTING, &adapter->state)) {
6245                 rtnl_unlock();
6246                 return;
6247         }
6248
6249         igb_dump(adapter);
6250         netdev_err(adapter->netdev, "Reset adapter\n");
6251         igb_reinit_locked(adapter);
6252         rtnl_unlock();
6253 }
6254
6255 /**
6256  *  igb_get_stats64 - Get System Network Statistics
6257  *  @netdev: network interface device structure
6258  *  @stats: rtnl_link_stats64 pointer
6259  **/
6260 static void igb_get_stats64(struct net_device *netdev,
6261                             struct rtnl_link_stats64 *stats)
6262 {
6263         struct igb_adapter *adapter = netdev_priv(netdev);
6264
6265         spin_lock(&adapter->stats64_lock);
6266         igb_update_stats(adapter);
6267         memcpy(stats, &adapter->stats64, sizeof(*stats));
6268         spin_unlock(&adapter->stats64_lock);
6269 }
6270
6271 /**
6272  *  igb_change_mtu - Change the Maximum Transfer Unit
6273  *  @netdev: network interface device structure
6274  *  @new_mtu: new value for maximum frame size
6275  *
6276  *  Returns 0 on success, negative on failure
6277  **/
6278 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
6279 {
6280         struct igb_adapter *adapter = netdev_priv(netdev);
6281         struct pci_dev *pdev = adapter->pdev;
6282         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
6283
6284         /* adjust max frame to be at least the size of a standard frame */
6285         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
6286                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
6287
6288         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
6289                 usleep_range(1000, 2000);
6290
6291         /* igb_down has a dependency on max_frame_size */
6292         adapter->max_frame_size = max_frame;
6293
6294         if (netif_running(netdev))
6295                 igb_down(adapter);
6296
6297         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
6298                  netdev->mtu, new_mtu);
6299         netdev->mtu = new_mtu;
6300
6301         if (netif_running(netdev))
6302                 igb_up(adapter);
6303         else
6304                 igb_reset(adapter);
6305
6306         clear_bit(__IGB_RESETTING, &adapter->state);
6307
6308         return 0;
6309 }
6310
6311 /**
6312  *  igb_update_stats - Update the board statistics counters
6313  *  @adapter: board private structure
6314  **/
6315 void igb_update_stats(struct igb_adapter *adapter)
6316 {
6317         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
6318         struct e1000_hw *hw = &adapter->hw;
6319         struct pci_dev *pdev = adapter->pdev;
6320         u32 reg, mpc;
6321         int i;
6322         u64 bytes, packets;
6323         unsigned int start;
6324         u64 _bytes, _packets;
6325
6326         /* Prevent stats update while adapter is being reset, or if the pci
6327          * connection is down.
6328          */
6329         if (adapter->link_speed == 0)
6330                 return;
6331         if (pci_channel_offline(pdev))
6332                 return;
6333
6334         bytes = 0;
6335         packets = 0;
6336
6337         rcu_read_lock();
6338         for (i = 0; i < adapter->num_rx_queues; i++) {
6339                 struct igb_ring *ring = adapter->rx_ring[i];
6340                 u32 rqdpc = rd32(E1000_RQDPC(i));
6341                 if (hw->mac.type >= e1000_i210)
6342                         wr32(E1000_RQDPC(i), 0);
6343
6344                 if (rqdpc) {
6345                         ring->rx_stats.drops += rqdpc;
6346                         net_stats->rx_fifo_errors += rqdpc;
6347                 }
6348
6349                 do {
6350                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
6351                         _bytes = ring->rx_stats.bytes;
6352                         _packets = ring->rx_stats.packets;
6353                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
6354                 bytes += _bytes;
6355                 packets += _packets;
6356         }
6357
6358         net_stats->rx_bytes = bytes;
6359         net_stats->rx_packets = packets;
6360
6361         bytes = 0;
6362         packets = 0;
6363         for (i = 0; i < adapter->num_tx_queues; i++) {
6364                 struct igb_ring *ring = adapter->tx_ring[i];
6365                 do {
6366                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
6367                         _bytes = ring->tx_stats.bytes;
6368                         _packets = ring->tx_stats.packets;
6369                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
6370                 bytes += _bytes;
6371                 packets += _packets;
6372         }
6373         net_stats->tx_bytes = bytes;
6374         net_stats->tx_packets = packets;
6375         rcu_read_unlock();
6376
6377         /* read stats registers */
6378         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
6379         adapter->stats.gprc += rd32(E1000_GPRC);
6380         adapter->stats.gorc += rd32(E1000_GORCL);
6381         rd32(E1000_GORCH); /* clear GORCL */
6382         adapter->stats.bprc += rd32(E1000_BPRC);
6383         adapter->stats.mprc += rd32(E1000_MPRC);
6384         adapter->stats.roc += rd32(E1000_ROC);
6385
6386         adapter->stats.prc64 += rd32(E1000_PRC64);
6387         adapter->stats.prc127 += rd32(E1000_PRC127);
6388         adapter->stats.prc255 += rd32(E1000_PRC255);
6389         adapter->stats.prc511 += rd32(E1000_PRC511);
6390         adapter->stats.prc1023 += rd32(E1000_PRC1023);
6391         adapter->stats.prc1522 += rd32(E1000_PRC1522);
6392         adapter->stats.symerrs += rd32(E1000_SYMERRS);
6393         adapter->stats.sec += rd32(E1000_SEC);
6394
6395         mpc = rd32(E1000_MPC);
6396         adapter->stats.mpc += mpc;
6397         net_stats->rx_fifo_errors += mpc;
6398         adapter->stats.scc += rd32(E1000_SCC);
6399         adapter->stats.ecol += rd32(E1000_ECOL);
6400         adapter->stats.mcc += rd32(E1000_MCC);
6401         adapter->stats.latecol += rd32(E1000_LATECOL);
6402         adapter->stats.dc += rd32(E1000_DC);
6403         adapter->stats.rlec += rd32(E1000_RLEC);
6404         adapter->stats.xonrxc += rd32(E1000_XONRXC);
6405         adapter->stats.xontxc += rd32(E1000_XONTXC);
6406         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
6407         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
6408         adapter->stats.fcruc += rd32(E1000_FCRUC);
6409         adapter->stats.gptc += rd32(E1000_GPTC);
6410         adapter->stats.gotc += rd32(E1000_GOTCL);
6411         rd32(E1000_GOTCH); /* clear GOTCL */
6412         adapter->stats.rnbc += rd32(E1000_RNBC);
6413         adapter->stats.ruc += rd32(E1000_RUC);
6414         adapter->stats.rfc += rd32(E1000_RFC);
6415         adapter->stats.rjc += rd32(E1000_RJC);
6416         adapter->stats.tor += rd32(E1000_TORH);
6417         adapter->stats.tot += rd32(E1000_TOTH);
6418         adapter->stats.tpr += rd32(E1000_TPR);
6419
6420         adapter->stats.ptc64 += rd32(E1000_PTC64);
6421         adapter->stats.ptc127 += rd32(E1000_PTC127);
6422         adapter->stats.ptc255 += rd32(E1000_PTC255);
6423         adapter->stats.ptc511 += rd32(E1000_PTC511);
6424         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
6425         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
6426
6427         adapter->stats.mptc += rd32(E1000_MPTC);
6428         adapter->stats.bptc += rd32(E1000_BPTC);
6429
6430         adapter->stats.tpt += rd32(E1000_TPT);
6431         adapter->stats.colc += rd32(E1000_COLC);
6432
6433         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
6434         /* read internal phy specific stats */
6435         reg = rd32(E1000_CTRL_EXT);
6436         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
6437                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
6438
6439                 /* this stat has invalid values on i210/i211 */
6440                 if ((hw->mac.type != e1000_i210) &&
6441                     (hw->mac.type != e1000_i211))
6442                         adapter->stats.tncrs += rd32(E1000_TNCRS);
6443         }
6444
6445         adapter->stats.tsctc += rd32(E1000_TSCTC);
6446         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
6447
6448         adapter->stats.iac += rd32(E1000_IAC);
6449         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
6450         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
6451         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
6452         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
6453         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
6454         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
6455         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
6456         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
6457
6458         /* Fill out the OS statistics structure */
6459         net_stats->multicast = adapter->stats.mprc;
6460         net_stats->collisions = adapter->stats.colc;
6461
6462         /* Rx Errors */
6463
6464         /* RLEC on some newer hardware can be incorrect so build
6465          * our own version based on RUC and ROC
6466          */
6467         net_stats->rx_errors = adapter->stats.rxerrc +
6468                 adapter->stats.crcerrs + adapter->stats.algnerrc +
6469                 adapter->stats.ruc + adapter->stats.roc +
6470                 adapter->stats.cexterr;
6471         net_stats->rx_length_errors = adapter->stats.ruc +
6472                                       adapter->stats.roc;
6473         net_stats->rx_crc_errors = adapter->stats.crcerrs;
6474         net_stats->rx_frame_errors = adapter->stats.algnerrc;
6475         net_stats->rx_missed_errors = adapter->stats.mpc;
6476
6477         /* Tx Errors */
6478         net_stats->tx_errors = adapter->stats.ecol +
6479                                adapter->stats.latecol;
6480         net_stats->tx_aborted_errors = adapter->stats.ecol;
6481         net_stats->tx_window_errors = adapter->stats.latecol;
6482         net_stats->tx_carrier_errors = adapter->stats.tncrs;
6483
6484         /* Tx Dropped needs to be maintained elsewhere */
6485
6486         /* Management Stats */
6487         adapter->stats.mgptc += rd32(E1000_MGTPTC);
6488         adapter->stats.mgprc += rd32(E1000_MGTPRC);
6489         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
6490
6491         /* OS2BMC Stats */
6492         reg = rd32(E1000_MANC);
6493         if (reg & E1000_MANC_EN_BMC2OS) {
6494                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
6495                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
6496                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
6497                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
6498         }
6499 }
6500
6501 static void igb_tsync_interrupt(struct igb_adapter *adapter)
6502 {
6503         struct e1000_hw *hw = &adapter->hw;
6504         struct ptp_clock_event event;
6505         struct timespec64 ts;
6506         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
6507
6508         if (tsicr & TSINTR_SYS_WRAP) {
6509                 event.type = PTP_CLOCK_PPS;
6510                 if (adapter->ptp_caps.pps)
6511                         ptp_clock_event(adapter->ptp_clock, &event);
6512                 ack |= TSINTR_SYS_WRAP;
6513         }
6514
6515         if (tsicr & E1000_TSICR_TXTS) {
6516                 /* retrieve hardware timestamp */
6517                 schedule_work(&adapter->ptp_tx_work);
6518                 ack |= E1000_TSICR_TXTS;
6519         }
6520
6521         if (tsicr & TSINTR_TT0) {
6522                 spin_lock(&adapter->tmreg_lock);
6523                 ts = timespec64_add(adapter->perout[0].start,
6524                                     adapter->perout[0].period);
6525                 /* u32 conversion of tv_sec is safe until y2106 */
6526                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
6527                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
6528                 tsauxc = rd32(E1000_TSAUXC);
6529                 tsauxc |= TSAUXC_EN_TT0;
6530                 wr32(E1000_TSAUXC, tsauxc);
6531                 adapter->perout[0].start = ts;
6532                 spin_unlock(&adapter->tmreg_lock);
6533                 ack |= TSINTR_TT0;
6534         }
6535
6536         if (tsicr & TSINTR_TT1) {
6537                 spin_lock(&adapter->tmreg_lock);
6538                 ts = timespec64_add(adapter->perout[1].start,
6539                                     adapter->perout[1].period);
6540                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
6541                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
6542                 tsauxc = rd32(E1000_TSAUXC);
6543                 tsauxc |= TSAUXC_EN_TT1;
6544                 wr32(E1000_TSAUXC, tsauxc);
6545                 adapter->perout[1].start = ts;
6546                 spin_unlock(&adapter->tmreg_lock);
6547                 ack |= TSINTR_TT1;
6548         }
6549
6550         if (tsicr & TSINTR_AUTT0) {
6551                 nsec = rd32(E1000_AUXSTMPL0);
6552                 sec  = rd32(E1000_AUXSTMPH0);
6553                 event.type = PTP_CLOCK_EXTTS;
6554                 event.index = 0;
6555                 event.timestamp = sec * 1000000000ULL + nsec;
6556                 ptp_clock_event(adapter->ptp_clock, &event);
6557                 ack |= TSINTR_AUTT0;
6558         }
6559
6560         if (tsicr & TSINTR_AUTT1) {
6561                 nsec = rd32(E1000_AUXSTMPL1);
6562                 sec  = rd32(E1000_AUXSTMPH1);
6563                 event.type = PTP_CLOCK_EXTTS;
6564                 event.index = 1;
6565                 event.timestamp = sec * 1000000000ULL + nsec;
6566                 ptp_clock_event(adapter->ptp_clock, &event);
6567                 ack |= TSINTR_AUTT1;
6568         }
6569
6570         /* acknowledge the interrupts */
6571         wr32(E1000_TSICR, ack);
6572 }
6573
6574 static irqreturn_t igb_msix_other(int irq, void *data)
6575 {
6576         struct igb_adapter *adapter = data;
6577         struct e1000_hw *hw = &adapter->hw;
6578         u32 icr = rd32(E1000_ICR);
6579         /* reading ICR causes bit 31 of EICR to be cleared */
6580
6581         if (icr & E1000_ICR_DRSTA)
6582                 schedule_work(&adapter->reset_task);
6583
6584         if (icr & E1000_ICR_DOUTSYNC) {
6585                 /* HW is reporting DMA is out of sync */
6586                 adapter->stats.doosync++;
6587                 /* The DMA Out of Sync is also indication of a spoof event
6588                  * in IOV mode. Check the Wrong VM Behavior register to
6589                  * see if it is really a spoof event.
6590                  */
6591                 igb_check_wvbr(adapter);
6592         }
6593
6594         /* Check for a mailbox event */
6595         if (icr & E1000_ICR_VMMB)
6596                 igb_msg_task(adapter);
6597
6598         if (icr & E1000_ICR_LSC) {
6599                 hw->mac.get_link_status = 1;
6600                 /* guard against interrupt when we're going down */
6601                 if (!test_bit(__IGB_DOWN, &adapter->state))
6602                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6603         }
6604
6605         if (icr & E1000_ICR_TS)
6606                 igb_tsync_interrupt(adapter);
6607
6608         wr32(E1000_EIMS, adapter->eims_other);
6609
6610         return IRQ_HANDLED;
6611 }
6612
6613 static void igb_write_itr(struct igb_q_vector *q_vector)
6614 {
6615         struct igb_adapter *adapter = q_vector->adapter;
6616         u32 itr_val = q_vector->itr_val & 0x7FFC;
6617
6618         if (!q_vector->set_itr)
6619                 return;
6620
6621         if (!itr_val)
6622                 itr_val = 0x4;
6623
6624         if (adapter->hw.mac.type == e1000_82575)
6625                 itr_val |= itr_val << 16;
6626         else
6627                 itr_val |= E1000_EITR_CNT_IGNR;
6628
6629         writel(itr_val, q_vector->itr_register);
6630         q_vector->set_itr = 0;
6631 }
6632
6633 static irqreturn_t igb_msix_ring(int irq, void *data)
6634 {
6635         struct igb_q_vector *q_vector = data;
6636
6637         /* Write the ITR value calculated from the previous interrupt. */
6638         igb_write_itr(q_vector);
6639
6640         napi_schedule(&q_vector->napi);
6641
6642         return IRQ_HANDLED;
6643 }
6644
6645 #ifdef CONFIG_IGB_DCA
6646 static void igb_update_tx_dca(struct igb_adapter *adapter,
6647                               struct igb_ring *tx_ring,
6648                               int cpu)
6649 {
6650         struct e1000_hw *hw = &adapter->hw;
6651         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
6652
6653         if (hw->mac.type != e1000_82575)
6654                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
6655
6656         /* We can enable relaxed ordering for reads, but not writes when
6657          * DCA is enabled.  This is due to a known issue in some chipsets
6658          * which will cause the DCA tag to be cleared.
6659          */
6660         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6661                   E1000_DCA_TXCTRL_DATA_RRO_EN |
6662                   E1000_DCA_TXCTRL_DESC_DCA_EN;
6663
6664         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6665 }
6666
6667 static void igb_update_rx_dca(struct igb_adapter *adapter,
6668                               struct igb_ring *rx_ring,
6669                               int cpu)
6670 {
6671         struct e1000_hw *hw = &adapter->hw;
6672         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6673
6674         if (hw->mac.type != e1000_82575)
6675                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
6676
6677         /* We can enable relaxed ordering for reads, but not writes when
6678          * DCA is enabled.  This is due to a known issue in some chipsets
6679          * which will cause the DCA tag to be cleared.
6680          */
6681         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6682                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6683
6684         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6685 }
6686
6687 static void igb_update_dca(struct igb_q_vector *q_vector)
6688 {
6689         struct igb_adapter *adapter = q_vector->adapter;
6690         int cpu = get_cpu();
6691
6692         if (q_vector->cpu == cpu)
6693                 goto out_no_update;
6694
6695         if (q_vector->tx.ring)
6696                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6697
6698         if (q_vector->rx.ring)
6699                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6700
6701         q_vector->cpu = cpu;
6702 out_no_update:
6703         put_cpu();
6704 }
6705
6706 static void igb_setup_dca(struct igb_adapter *adapter)
6707 {
6708         struct e1000_hw *hw = &adapter->hw;
6709         int i;
6710
6711         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6712                 return;
6713
6714         /* Always use CB2 mode, difference is masked in the CB driver. */
6715         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6716
6717         for (i = 0; i < adapter->num_q_vectors; i++) {
6718                 adapter->q_vector[i]->cpu = -1;
6719                 igb_update_dca(adapter->q_vector[i]);
6720         }
6721 }
6722
6723 static int __igb_notify_dca(struct device *dev, void *data)
6724 {
6725         struct net_device *netdev = dev_get_drvdata(dev);
6726         struct igb_adapter *adapter = netdev_priv(netdev);
6727         struct pci_dev *pdev = adapter->pdev;
6728         struct e1000_hw *hw = &adapter->hw;
6729         unsigned long event = *(unsigned long *)data;
6730
6731         switch (event) {
6732         case DCA_PROVIDER_ADD:
6733                 /* if already enabled, don't do it again */
6734                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6735                         break;
6736                 if (dca_add_requester(dev) == 0) {
6737                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6738                         dev_info(&pdev->dev, "DCA enabled\n");
6739                         igb_setup_dca(adapter);
6740                         break;
6741                 }
6742                 /* Fall Through since DCA is disabled. */
6743         case DCA_PROVIDER_REMOVE:
6744                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6745                         /* without this a class_device is left
6746                          * hanging around in the sysfs model
6747                          */
6748                         dca_remove_requester(dev);
6749                         dev_info(&pdev->dev, "DCA disabled\n");
6750                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6751                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
6752                 }
6753                 break;
6754         }
6755
6756         return 0;
6757 }
6758
6759 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6760                           void *p)
6761 {
6762         int ret_val;
6763
6764         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6765                                          __igb_notify_dca);
6766
6767         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6768 }
6769 #endif /* CONFIG_IGB_DCA */
6770
6771 #ifdef CONFIG_PCI_IOV
6772 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6773 {
6774         unsigned char mac_addr[ETH_ALEN];
6775
6776         eth_zero_addr(mac_addr);
6777         igb_set_vf_mac(adapter, vf, mac_addr);
6778
6779         /* By default spoof check is enabled for all VFs */
6780         adapter->vf_data[vf].spoofchk_enabled = true;
6781
6782         /* By default VFs are not trusted */
6783         adapter->vf_data[vf].trusted = false;
6784
6785         return 0;
6786 }
6787
6788 #endif
6789 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6790 {
6791         struct e1000_hw *hw = &adapter->hw;
6792         u32 ping;
6793         int i;
6794
6795         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6796                 ping = E1000_PF_CONTROL_MSG;
6797                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6798                         ping |= E1000_VT_MSGTYPE_CTS;
6799                 igb_write_mbx(hw, &ping, 1, i);
6800         }
6801 }
6802
6803 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6804 {
6805         struct e1000_hw *hw = &adapter->hw;
6806         u32 vmolr = rd32(E1000_VMOLR(vf));
6807         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6808
6809         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6810                             IGB_VF_FLAG_MULTI_PROMISC);
6811         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6812
6813         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6814                 vmolr |= E1000_VMOLR_MPME;
6815                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6816                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6817         } else {
6818                 /* if we have hashes and we are clearing a multicast promisc
6819                  * flag we need to write the hashes to the MTA as this step
6820                  * was previously skipped
6821                  */
6822                 if (vf_data->num_vf_mc_hashes > 30) {
6823                         vmolr |= E1000_VMOLR_MPME;
6824                 } else if (vf_data->num_vf_mc_hashes) {
6825                         int j;
6826
6827                         vmolr |= E1000_VMOLR_ROMPE;
6828                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6829                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6830                 }
6831         }
6832
6833         wr32(E1000_VMOLR(vf), vmolr);
6834
6835         /* there are flags left unprocessed, likely not supported */
6836         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6837                 return -EINVAL;
6838
6839         return 0;
6840 }
6841
6842 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6843                                   u32 *msgbuf, u32 vf)
6844 {
6845         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6846         u16 *hash_list = (u16 *)&msgbuf[1];
6847         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6848         int i;
6849
6850         /* salt away the number of multicast addresses assigned
6851          * to this VF for later use to restore when the PF multi cast
6852          * list changes
6853          */
6854         vf_data->num_vf_mc_hashes = n;
6855
6856         /* only up to 30 hash values supported */
6857         if (n > 30)
6858                 n = 30;
6859
6860         /* store the hashes for later use */
6861         for (i = 0; i < n; i++)
6862                 vf_data->vf_mc_hashes[i] = hash_list[i];
6863
6864         /* Flush and reset the mta with the new values */
6865         igb_set_rx_mode(adapter->netdev);
6866
6867         return 0;
6868 }
6869
6870 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6871 {
6872         struct e1000_hw *hw = &adapter->hw;
6873         struct vf_data_storage *vf_data;
6874         int i, j;
6875
6876         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6877                 u32 vmolr = rd32(E1000_VMOLR(i));
6878
6879                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6880
6881                 vf_data = &adapter->vf_data[i];
6882
6883                 if ((vf_data->num_vf_mc_hashes > 30) ||
6884                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6885                         vmolr |= E1000_VMOLR_MPME;
6886                 } else if (vf_data->num_vf_mc_hashes) {
6887                         vmolr |= E1000_VMOLR_ROMPE;
6888                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6889                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6890                 }
6891                 wr32(E1000_VMOLR(i), vmolr);
6892         }
6893 }
6894
6895 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6896 {
6897         struct e1000_hw *hw = &adapter->hw;
6898         u32 pool_mask, vlvf_mask, i;
6899
6900         /* create mask for VF and other pools */
6901         pool_mask = E1000_VLVF_POOLSEL_MASK;
6902         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
6903
6904         /* drop PF from pool bits */
6905         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
6906                              adapter->vfs_allocated_count);
6907
6908         /* Find the vlan filter for this id */
6909         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
6910                 u32 vlvf = rd32(E1000_VLVF(i));
6911                 u32 vfta_mask, vid, vfta;
6912
6913                 /* remove the vf from the pool */
6914                 if (!(vlvf & vlvf_mask))
6915                         continue;
6916
6917                 /* clear out bit from VLVF */
6918                 vlvf ^= vlvf_mask;
6919
6920                 /* if other pools are present, just remove ourselves */
6921                 if (vlvf & pool_mask)
6922                         goto update_vlvfb;
6923
6924                 /* if PF is present, leave VFTA */
6925                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
6926                         goto update_vlvf;
6927
6928                 vid = vlvf & E1000_VLVF_VLANID_MASK;
6929                 vfta_mask = BIT(vid % 32);
6930
6931                 /* clear bit from VFTA */
6932                 vfta = adapter->shadow_vfta[vid / 32];
6933                 if (vfta & vfta_mask)
6934                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
6935 update_vlvf:
6936                 /* clear pool selection enable */
6937                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6938                         vlvf &= E1000_VLVF_POOLSEL_MASK;
6939                 else
6940                         vlvf = 0;
6941 update_vlvfb:
6942                 /* clear pool bits */
6943                 wr32(E1000_VLVF(i), vlvf);
6944         }
6945 }
6946
6947 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
6948 {
6949         u32 vlvf;
6950         int idx;
6951
6952         /* short cut the special case */
6953         if (vlan == 0)
6954                 return 0;
6955
6956         /* Search for the VLAN id in the VLVF entries */
6957         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
6958                 vlvf = rd32(E1000_VLVF(idx));
6959                 if ((vlvf & VLAN_VID_MASK) == vlan)
6960                         break;
6961         }
6962
6963         return idx;
6964 }
6965
6966 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
6967 {
6968         struct e1000_hw *hw = &adapter->hw;
6969         u32 bits, pf_id;
6970         int idx;
6971
6972         idx = igb_find_vlvf_entry(hw, vid);
6973         if (!idx)
6974                 return;
6975
6976         /* See if any other pools are set for this VLAN filter
6977          * entry other than the PF.
6978          */
6979         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
6980         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
6981         bits &= rd32(E1000_VLVF(idx));
6982
6983         /* Disable the filter so this falls into the default pool. */
6984         if (!bits) {
6985                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6986                         wr32(E1000_VLVF(idx), BIT(pf_id));
6987                 else
6988                         wr32(E1000_VLVF(idx), 0);
6989         }
6990 }
6991
6992 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
6993                            bool add, u32 vf)
6994 {
6995         int pf_id = adapter->vfs_allocated_count;
6996         struct e1000_hw *hw = &adapter->hw;
6997         int err;
6998
6999         /* If VLAN overlaps with one the PF is currently monitoring make
7000          * sure that we are able to allocate a VLVF entry.  This may be
7001          * redundant but it guarantees PF will maintain visibility to
7002          * the VLAN.
7003          */
7004         if (add && test_bit(vid, adapter->active_vlans)) {
7005                 err = igb_vfta_set(hw, vid, pf_id, true, false);
7006                 if (err)
7007                         return err;
7008         }
7009
7010         err = igb_vfta_set(hw, vid, vf, add, false);
7011
7012         if (add && !err)
7013                 return err;
7014
7015         /* If we failed to add the VF VLAN or we are removing the VF VLAN
7016          * we may need to drop the PF pool bit in order to allow us to free
7017          * up the VLVF resources.
7018          */
7019         if (test_bit(vid, adapter->active_vlans) ||
7020             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
7021                 igb_update_pf_vlvf(adapter, vid);
7022
7023         return err;
7024 }
7025
7026 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
7027 {
7028         struct e1000_hw *hw = &adapter->hw;
7029
7030         if (vid)
7031                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
7032         else
7033                 wr32(E1000_VMVIR(vf), 0);
7034 }
7035
7036 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
7037                                 u16 vlan, u8 qos)
7038 {
7039         int err;
7040
7041         err = igb_set_vf_vlan(adapter, vlan, true, vf);
7042         if (err)
7043                 return err;
7044
7045         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
7046         igb_set_vmolr(adapter, vf, !vlan);
7047
7048         /* revoke access to previous VLAN */
7049         if (vlan != adapter->vf_data[vf].pf_vlan)
7050                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7051                                 false, vf);
7052
7053         adapter->vf_data[vf].pf_vlan = vlan;
7054         adapter->vf_data[vf].pf_qos = qos;
7055         igb_set_vf_vlan_strip(adapter, vf, true);
7056         dev_info(&adapter->pdev->dev,
7057                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
7058         if (test_bit(__IGB_DOWN, &adapter->state)) {
7059                 dev_warn(&adapter->pdev->dev,
7060                          "The VF VLAN has been set, but the PF device is not up.\n");
7061                 dev_warn(&adapter->pdev->dev,
7062                          "Bring the PF device up before attempting to use the VF device.\n");
7063         }
7064
7065         return err;
7066 }
7067
7068 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
7069 {
7070         /* Restore tagless access via VLAN 0 */
7071         igb_set_vf_vlan(adapter, 0, true, vf);
7072
7073         igb_set_vmvir(adapter, 0, vf);
7074         igb_set_vmolr(adapter, vf, true);
7075
7076         /* Remove any PF assigned VLAN */
7077         if (adapter->vf_data[vf].pf_vlan)
7078                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7079                                 false, vf);
7080
7081         adapter->vf_data[vf].pf_vlan = 0;
7082         adapter->vf_data[vf].pf_qos = 0;
7083         igb_set_vf_vlan_strip(adapter, vf, false);
7084
7085         return 0;
7086 }
7087
7088 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
7089                                u16 vlan, u8 qos, __be16 vlan_proto)
7090 {
7091         struct igb_adapter *adapter = netdev_priv(netdev);
7092
7093         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
7094                 return -EINVAL;
7095
7096         if (vlan_proto != htons(ETH_P_8021Q))
7097                 return -EPROTONOSUPPORT;
7098
7099         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
7100                                igb_disable_port_vlan(adapter, vf);
7101 }
7102
7103 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7104 {
7105         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7106         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
7107         int ret;
7108
7109         if (adapter->vf_data[vf].pf_vlan)
7110                 return -1;
7111
7112         /* VLAN 0 is a special case, don't allow it to be removed */
7113         if (!vid && !add)
7114                 return 0;
7115
7116         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
7117         if (!ret)
7118                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
7119         return ret;
7120 }
7121
7122 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
7123 {
7124         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7125
7126         /* clear flags - except flag that indicates PF has set the MAC */
7127         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
7128         vf_data->last_nack = jiffies;
7129
7130         /* reset vlans for device */
7131         igb_clear_vf_vfta(adapter, vf);
7132         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
7133         igb_set_vmvir(adapter, vf_data->pf_vlan |
7134                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
7135         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
7136         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
7137
7138         /* reset multicast table array for vf */
7139         adapter->vf_data[vf].num_vf_mc_hashes = 0;
7140
7141         /* Flush and reset the mta with the new values */
7142         igb_set_rx_mode(adapter->netdev);
7143 }
7144
7145 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
7146 {
7147         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7148
7149         /* clear mac address as we were hotplug removed/added */
7150         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
7151                 eth_zero_addr(vf_mac);
7152
7153         /* process remaining reset events */
7154         igb_vf_reset(adapter, vf);
7155 }
7156
7157 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
7158 {
7159         struct e1000_hw *hw = &adapter->hw;
7160         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7161         u32 reg, msgbuf[3];
7162         u8 *addr = (u8 *)(&msgbuf[1]);
7163
7164         /* process all the same items cleared in a function level reset */
7165         igb_vf_reset(adapter, vf);
7166
7167         /* set vf mac address */
7168         igb_set_vf_mac(adapter, vf, vf_mac);
7169
7170         /* enable transmit and receive for vf */
7171         reg = rd32(E1000_VFTE);
7172         wr32(E1000_VFTE, reg | BIT(vf));
7173         reg = rd32(E1000_VFRE);
7174         wr32(E1000_VFRE, reg | BIT(vf));
7175
7176         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
7177
7178         /* reply to reset with ack and vf mac address */
7179         if (!is_zero_ether_addr(vf_mac)) {
7180                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
7181                 memcpy(addr, vf_mac, ETH_ALEN);
7182         } else {
7183                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
7184         }
7185         igb_write_mbx(hw, msgbuf, 3, vf);
7186 }
7187
7188 static void igb_flush_mac_table(struct igb_adapter *adapter)
7189 {
7190         struct e1000_hw *hw = &adapter->hw;
7191         int i;
7192
7193         for (i = 0; i < hw->mac.rar_entry_count; i++) {
7194                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
7195                 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
7196                 adapter->mac_table[i].queue = 0;
7197                 igb_rar_set_index(adapter, i);
7198         }
7199 }
7200
7201 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
7202 {
7203         struct e1000_hw *hw = &adapter->hw;
7204         /* do not count rar entries reserved for VFs MAC addresses */
7205         int rar_entries = hw->mac.rar_entry_count -
7206                           adapter->vfs_allocated_count;
7207         int i, count = 0;
7208
7209         for (i = 0; i < rar_entries; i++) {
7210                 /* do not count default entries */
7211                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
7212                         continue;
7213
7214                 /* do not count "in use" entries for different queues */
7215                 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
7216                     (adapter->mac_table[i].queue != queue))
7217                         continue;
7218
7219                 count++;
7220         }
7221
7222         return count;
7223 }
7224
7225 /* Set default MAC address for the PF in the first RAR entry */
7226 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
7227 {
7228         struct igb_mac_addr *mac_table = &adapter->mac_table[0];
7229
7230         ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
7231         mac_table->queue = adapter->vfs_allocated_count;
7232         mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7233
7234         igb_rar_set_index(adapter, 0);
7235 }
7236
7237 /* If the filter to be added and an already existing filter express
7238  * the same address and address type, it should be possible to only
7239  * override the other configurations, for example the queue to steer
7240  * traffic.
7241  */
7242 static bool igb_mac_entry_can_be_used(const struct igb_mac_addr *entry,
7243                                       const u8 *addr, const u8 flags)
7244 {
7245         if (!(entry->state & IGB_MAC_STATE_IN_USE))
7246                 return true;
7247
7248         if ((entry->state & IGB_MAC_STATE_SRC_ADDR) !=
7249             (flags & IGB_MAC_STATE_SRC_ADDR))
7250                 return false;
7251
7252         if (!ether_addr_equal(addr, entry->addr))
7253                 return false;
7254
7255         return true;
7256 }
7257
7258 /* Add a MAC filter for 'addr' directing matching traffic to 'queue',
7259  * 'flags' is used to indicate what kind of match is made, match is by
7260  * default for the destination address, if matching by source address
7261  * is desired the flag IGB_MAC_STATE_SRC_ADDR can be used.
7262  */
7263 static int igb_add_mac_filter_flags(struct igb_adapter *adapter,
7264                                     const u8 *addr, const u8 queue,
7265                                     const u8 flags)
7266 {
7267         struct e1000_hw *hw = &adapter->hw;
7268         int rar_entries = hw->mac.rar_entry_count -
7269                           adapter->vfs_allocated_count;
7270         int i;
7271
7272         if (is_zero_ether_addr(addr))
7273                 return -EINVAL;
7274
7275         /* Search for the first empty entry in the MAC table.
7276          * Do not touch entries at the end of the table reserved for the VF MAC
7277          * addresses.
7278          */
7279         for (i = 0; i < rar_entries; i++) {
7280                 if (!igb_mac_entry_can_be_used(&adapter->mac_table[i],
7281                                                addr, flags))
7282                         continue;
7283
7284                 ether_addr_copy(adapter->mac_table[i].addr, addr);
7285                 adapter->mac_table[i].queue = queue;
7286                 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE | flags;
7287
7288                 igb_rar_set_index(adapter, i);
7289                 return i;
7290         }
7291
7292         return -ENOSPC;
7293 }
7294
7295 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7296                               const u8 queue)
7297 {
7298         return igb_add_mac_filter_flags(adapter, addr, queue, 0);
7299 }
7300
7301 /* Remove a MAC filter for 'addr' directing matching traffic to
7302  * 'queue', 'flags' is used to indicate what kind of match need to be
7303  * removed, match is by default for the destination address, if
7304  * matching by source address is to be removed the flag
7305  * IGB_MAC_STATE_SRC_ADDR can be used.
7306  */
7307 static int igb_del_mac_filter_flags(struct igb_adapter *adapter,
7308                                     const u8 *addr, const u8 queue,
7309                                     const u8 flags)
7310 {
7311         struct e1000_hw *hw = &adapter->hw;
7312         int rar_entries = hw->mac.rar_entry_count -
7313                           adapter->vfs_allocated_count;
7314         int i;
7315
7316         if (is_zero_ether_addr(addr))
7317                 return -EINVAL;
7318
7319         /* Search for matching entry in the MAC table based on given address
7320          * and queue. Do not touch entries at the end of the table reserved
7321          * for the VF MAC addresses.
7322          */
7323         for (i = 0; i < rar_entries; i++) {
7324                 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
7325                         continue;
7326                 if ((adapter->mac_table[i].state & flags) != flags)
7327                         continue;
7328                 if (adapter->mac_table[i].queue != queue)
7329                         continue;
7330                 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
7331                         continue;
7332
7333                 /* When a filter for the default address is "deleted",
7334                  * we return it to its initial configuration
7335                  */
7336                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT) {
7337                         adapter->mac_table[i].state =
7338                                 IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7339                         adapter->mac_table[i].queue =
7340                                 adapter->vfs_allocated_count;
7341                 } else {
7342                         adapter->mac_table[i].state = 0;
7343                         adapter->mac_table[i].queue = 0;
7344                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
7345                 }
7346
7347                 igb_rar_set_index(adapter, i);
7348                 return 0;
7349         }
7350
7351         return -ENOENT;
7352 }
7353
7354 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7355                               const u8 queue)
7356 {
7357         return igb_del_mac_filter_flags(adapter, addr, queue, 0);
7358 }
7359
7360 int igb_add_mac_steering_filter(struct igb_adapter *adapter,
7361                                 const u8 *addr, u8 queue, u8 flags)
7362 {
7363         struct e1000_hw *hw = &adapter->hw;
7364
7365         /* In theory, this should be supported on 82575 as well, but
7366          * that part wasn't easily accessible during development.
7367          */
7368         if (hw->mac.type != e1000_i210)
7369                 return -EOPNOTSUPP;
7370
7371         return igb_add_mac_filter_flags(adapter, addr, queue,
7372                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7373 }
7374
7375 int igb_del_mac_steering_filter(struct igb_adapter *adapter,
7376                                 const u8 *addr, u8 queue, u8 flags)
7377 {
7378         return igb_del_mac_filter_flags(adapter, addr, queue,
7379                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7380 }
7381
7382 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
7383 {
7384         struct igb_adapter *adapter = netdev_priv(netdev);
7385         int ret;
7386
7387         ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7388
7389         return min_t(int, ret, 0);
7390 }
7391
7392 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
7393 {
7394         struct igb_adapter *adapter = netdev_priv(netdev);
7395
7396         igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7397
7398         return 0;
7399 }
7400
7401 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
7402                                  const u32 info, const u8 *addr)
7403 {
7404         struct pci_dev *pdev = adapter->pdev;
7405         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7406         struct list_head *pos;
7407         struct vf_mac_filter *entry = NULL;
7408         int ret = 0;
7409
7410         if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7411             !vf_data->trusted) {
7412                 dev_warn(&pdev->dev,
7413                          "VF %d requested MAC filter but is administratively denied\n",
7414                           vf);
7415                 return -EINVAL;
7416         }
7417         if (!is_valid_ether_addr(addr)) {
7418                 dev_warn(&pdev->dev,
7419                          "VF %d attempted to set invalid MAC filter\n",
7420                           vf);
7421                 return -EINVAL;
7422         }
7423
7424         switch (info) {
7425         case E1000_VF_MAC_FILTER_CLR:
7426                 /* remove all unicast MAC filters related to the current VF */
7427                 list_for_each(pos, &adapter->vf_macs.l) {
7428                         entry = list_entry(pos, struct vf_mac_filter, l);
7429                         if (entry->vf == vf) {
7430                                 entry->vf = -1;
7431                                 entry->free = true;
7432                                 igb_del_mac_filter(adapter, entry->vf_mac, vf);
7433                         }
7434                 }
7435                 break;
7436         case E1000_VF_MAC_FILTER_ADD:
7437                 /* try to find empty slot in the list */
7438                 list_for_each(pos, &adapter->vf_macs.l) {
7439                         entry = list_entry(pos, struct vf_mac_filter, l);
7440                         if (entry->free)
7441                                 break;
7442                 }
7443
7444                 if (entry && entry->free) {
7445                         entry->free = false;
7446                         entry->vf = vf;
7447                         ether_addr_copy(entry->vf_mac, addr);
7448
7449                         ret = igb_add_mac_filter(adapter, addr, vf);
7450                         ret = min_t(int, ret, 0);
7451                 } else {
7452                         ret = -ENOSPC;
7453                 }
7454
7455                 if (ret == -ENOSPC)
7456                         dev_warn(&pdev->dev,
7457                                  "VF %d has requested MAC filter but there is no space for it\n",
7458                                  vf);
7459                 break;
7460         default:
7461                 ret = -EINVAL;
7462                 break;
7463         }
7464
7465         return ret;
7466 }
7467
7468 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
7469 {
7470         struct pci_dev *pdev = adapter->pdev;
7471         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7472         u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
7473
7474         /* The VF MAC Address is stored in a packed array of bytes
7475          * starting at the second 32 bit word of the msg array
7476          */
7477         unsigned char *addr = (unsigned char *)&msg[1];
7478         int ret = 0;
7479
7480         if (!info) {
7481                 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7482                     !vf_data->trusted) {
7483                         dev_warn(&pdev->dev,
7484                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
7485                                  vf);
7486                         return -EINVAL;
7487                 }
7488
7489                 if (!is_valid_ether_addr(addr)) {
7490                         dev_warn(&pdev->dev,
7491                                  "VF %d attempted to set invalid MAC\n",
7492                                  vf);
7493                         return -EINVAL;
7494                 }
7495
7496                 ret = igb_set_vf_mac(adapter, vf, addr);
7497         } else {
7498                 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
7499         }
7500
7501         return ret;
7502 }
7503
7504 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
7505 {
7506         struct e1000_hw *hw = &adapter->hw;
7507         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7508         u32 msg = E1000_VT_MSGTYPE_NACK;
7509
7510         /* if device isn't clear to send it shouldn't be reading either */
7511         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
7512             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
7513                 igb_write_mbx(hw, &msg, 1, vf);
7514                 vf_data->last_nack = jiffies;
7515         }
7516 }
7517
7518 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
7519 {
7520         struct pci_dev *pdev = adapter->pdev;
7521         u32 msgbuf[E1000_VFMAILBOX_SIZE];
7522         struct e1000_hw *hw = &adapter->hw;
7523         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7524         s32 retval;
7525
7526         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
7527
7528         if (retval) {
7529                 /* if receive failed revoke VF CTS stats and restart init */
7530                 dev_err(&pdev->dev, "Error receiving message from VF\n");
7531                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
7532                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7533                         goto unlock;
7534                 goto out;
7535         }
7536
7537         /* this is a message we already processed, do nothing */
7538         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
7539                 goto unlock;
7540
7541         /* until the vf completes a reset it should not be
7542          * allowed to start any configuration.
7543          */
7544         if (msgbuf[0] == E1000_VF_RESET) {
7545                 /* unlocks mailbox */
7546                 igb_vf_reset_msg(adapter, vf);
7547                 return;
7548         }
7549
7550         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
7551                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7552                         goto unlock;
7553                 retval = -1;
7554                 goto out;
7555         }
7556
7557         switch ((msgbuf[0] & 0xFFFF)) {
7558         case E1000_VF_SET_MAC_ADDR:
7559                 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
7560                 break;
7561         case E1000_VF_SET_PROMISC:
7562                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
7563                 break;
7564         case E1000_VF_SET_MULTICAST:
7565                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
7566                 break;
7567         case E1000_VF_SET_LPE:
7568                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
7569                 break;
7570         case E1000_VF_SET_VLAN:
7571                 retval = -1;
7572                 if (vf_data->pf_vlan)
7573                         dev_warn(&pdev->dev,
7574                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
7575                                  vf);
7576                 else
7577                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
7578                 break;
7579         default:
7580                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
7581                 retval = -1;
7582                 break;
7583         }
7584
7585         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
7586 out:
7587         /* notify the VF of the results of what it sent us */
7588         if (retval)
7589                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
7590         else
7591                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
7592
7593         /* unlocks mailbox */
7594         igb_write_mbx(hw, msgbuf, 1, vf);
7595         return;
7596
7597 unlock:
7598         igb_unlock_mbx(hw, vf);
7599 }
7600
7601 static void igb_msg_task(struct igb_adapter *adapter)
7602 {
7603         struct e1000_hw *hw = &adapter->hw;
7604         u32 vf;
7605
7606         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
7607                 /* process any reset requests */
7608                 if (!igb_check_for_rst(hw, vf))
7609                         igb_vf_reset_event(adapter, vf);
7610
7611                 /* process any messages pending */
7612                 if (!igb_check_for_msg(hw, vf))
7613                         igb_rcv_msg_from_vf(adapter, vf);
7614
7615                 /* process any acks */
7616                 if (!igb_check_for_ack(hw, vf))
7617                         igb_rcv_ack_from_vf(adapter, vf);
7618         }
7619 }
7620
7621 /**
7622  *  igb_set_uta - Set unicast filter table address
7623  *  @adapter: board private structure
7624  *  @set: boolean indicating if we are setting or clearing bits
7625  *
7626  *  The unicast table address is a register array of 32-bit registers.
7627  *  The table is meant to be used in a way similar to how the MTA is used
7628  *  however due to certain limitations in the hardware it is necessary to
7629  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
7630  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
7631  **/
7632 static void igb_set_uta(struct igb_adapter *adapter, bool set)
7633 {
7634         struct e1000_hw *hw = &adapter->hw;
7635         u32 uta = set ? ~0 : 0;
7636         int i;
7637
7638         /* we only need to do this if VMDq is enabled */
7639         if (!adapter->vfs_allocated_count)
7640                 return;
7641
7642         for (i = hw->mac.uta_reg_count; i--;)
7643                 array_wr32(E1000_UTA, i, uta);
7644 }
7645
7646 /**
7647  *  igb_intr_msi - Interrupt Handler
7648  *  @irq: interrupt number
7649  *  @data: pointer to a network interface device structure
7650  **/
7651 static irqreturn_t igb_intr_msi(int irq, void *data)
7652 {
7653         struct igb_adapter *adapter = data;
7654         struct igb_q_vector *q_vector = adapter->q_vector[0];
7655         struct e1000_hw *hw = &adapter->hw;
7656         /* read ICR disables interrupts using IAM */
7657         u32 icr = rd32(E1000_ICR);
7658
7659         igb_write_itr(q_vector);
7660
7661         if (icr & E1000_ICR_DRSTA)
7662                 schedule_work(&adapter->reset_task);
7663
7664         if (icr & E1000_ICR_DOUTSYNC) {
7665                 /* HW is reporting DMA is out of sync */
7666                 adapter->stats.doosync++;
7667         }
7668
7669         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7670                 hw->mac.get_link_status = 1;
7671                 if (!test_bit(__IGB_DOWN, &adapter->state))
7672                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7673         }
7674
7675         if (icr & E1000_ICR_TS)
7676                 igb_tsync_interrupt(adapter);
7677
7678         napi_schedule(&q_vector->napi);
7679
7680         return IRQ_HANDLED;
7681 }
7682
7683 /**
7684  *  igb_intr - Legacy Interrupt Handler
7685  *  @irq: interrupt number
7686  *  @data: pointer to a network interface device structure
7687  **/
7688 static irqreturn_t igb_intr(int irq, void *data)
7689 {
7690         struct igb_adapter *adapter = data;
7691         struct igb_q_vector *q_vector = adapter->q_vector[0];
7692         struct e1000_hw *hw = &adapter->hw;
7693         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
7694          * need for the IMC write
7695          */
7696         u32 icr = rd32(E1000_ICR);
7697
7698         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
7699          * not set, then the adapter didn't send an interrupt
7700          */
7701         if (!(icr & E1000_ICR_INT_ASSERTED))
7702                 return IRQ_NONE;
7703
7704         igb_write_itr(q_vector);
7705
7706         if (icr & E1000_ICR_DRSTA)
7707                 schedule_work(&adapter->reset_task);
7708
7709         if (icr & E1000_ICR_DOUTSYNC) {
7710                 /* HW is reporting DMA is out of sync */
7711                 adapter->stats.doosync++;
7712         }
7713
7714         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7715                 hw->mac.get_link_status = 1;
7716                 /* guard against interrupt when we're going down */
7717                 if (!test_bit(__IGB_DOWN, &adapter->state))
7718                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7719         }
7720
7721         if (icr & E1000_ICR_TS)
7722                 igb_tsync_interrupt(adapter);
7723
7724         napi_schedule(&q_vector->napi);
7725
7726         return IRQ_HANDLED;
7727 }
7728
7729 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
7730 {
7731         struct igb_adapter *adapter = q_vector->adapter;
7732         struct e1000_hw *hw = &adapter->hw;
7733
7734         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
7735             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
7736                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
7737                         igb_set_itr(q_vector);
7738                 else
7739                         igb_update_ring_itr(q_vector);
7740         }
7741
7742         if (!test_bit(__IGB_DOWN, &adapter->state)) {
7743                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7744                         wr32(E1000_EIMS, q_vector->eims_value);
7745                 else
7746                         igb_irq_enable(adapter);
7747         }
7748 }
7749
7750 /**
7751  *  igb_poll - NAPI Rx polling callback
7752  *  @napi: napi polling structure
7753  *  @budget: count of how many packets we should handle
7754  **/
7755 static int igb_poll(struct napi_struct *napi, int budget)
7756 {
7757         struct igb_q_vector *q_vector = container_of(napi,
7758                                                      struct igb_q_vector,
7759                                                      napi);
7760         bool clean_complete = true;
7761         int work_done = 0;
7762
7763 #ifdef CONFIG_IGB_DCA
7764         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
7765                 igb_update_dca(q_vector);
7766 #endif
7767         if (q_vector->tx.ring)
7768                 clean_complete = igb_clean_tx_irq(q_vector, budget);
7769
7770         if (q_vector->rx.ring) {
7771                 int cleaned = igb_clean_rx_irq(q_vector, budget);
7772
7773                 work_done += cleaned;
7774                 if (cleaned >= budget)
7775                         clean_complete = false;
7776         }
7777
7778         /* If all work not completed, return budget and keep polling */
7779         if (!clean_complete)
7780                 return budget;
7781
7782         /* If not enough Rx work done, exit the polling mode */
7783         napi_complete_done(napi, work_done);
7784         igb_ring_irq_enable(q_vector);
7785
7786         return 0;
7787 }
7788
7789 /**
7790  *  igb_clean_tx_irq - Reclaim resources after transmit completes
7791  *  @q_vector: pointer to q_vector containing needed info
7792  *  @napi_budget: Used to determine if we are in netpoll
7793  *
7794  *  returns true if ring is completely cleaned
7795  **/
7796 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
7797 {
7798         struct igb_adapter *adapter = q_vector->adapter;
7799         struct igb_ring *tx_ring = q_vector->tx.ring;
7800         struct igb_tx_buffer *tx_buffer;
7801         union e1000_adv_tx_desc *tx_desc;
7802         unsigned int total_bytes = 0, total_packets = 0;
7803         unsigned int budget = q_vector->tx.work_limit;
7804         unsigned int i = tx_ring->next_to_clean;
7805
7806         if (test_bit(__IGB_DOWN, &adapter->state))
7807                 return true;
7808
7809         tx_buffer = &tx_ring->tx_buffer_info[i];
7810         tx_desc = IGB_TX_DESC(tx_ring, i);
7811         i -= tx_ring->count;
7812
7813         do {
7814                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
7815
7816                 /* if next_to_watch is not set then there is no work pending */
7817                 if (!eop_desc)
7818                         break;
7819
7820                 /* prevent any other reads prior to eop_desc */
7821                 smp_rmb();
7822
7823                 /* if DD is not set pending work has not been completed */
7824                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7825                         break;
7826
7827                 /* clear next_to_watch to prevent false hangs */
7828                 tx_buffer->next_to_watch = NULL;
7829
7830                 /* update the statistics for this packet */
7831                 total_bytes += tx_buffer->bytecount;
7832                 total_packets += tx_buffer->gso_segs;
7833
7834                 /* free the skb */
7835                 napi_consume_skb(tx_buffer->skb, napi_budget);
7836
7837                 /* unmap skb header data */
7838                 dma_unmap_single(tx_ring->dev,
7839                                  dma_unmap_addr(tx_buffer, dma),
7840                                  dma_unmap_len(tx_buffer, len),
7841                                  DMA_TO_DEVICE);
7842
7843                 /* clear tx_buffer data */
7844                 dma_unmap_len_set(tx_buffer, len, 0);
7845
7846                 /* clear last DMA location and unmap remaining buffers */
7847                 while (tx_desc != eop_desc) {
7848                         tx_buffer++;
7849                         tx_desc++;
7850                         i++;
7851                         if (unlikely(!i)) {
7852                                 i -= tx_ring->count;
7853                                 tx_buffer = tx_ring->tx_buffer_info;
7854                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7855                         }
7856
7857                         /* unmap any remaining paged data */
7858                         if (dma_unmap_len(tx_buffer, len)) {
7859                                 dma_unmap_page(tx_ring->dev,
7860                                                dma_unmap_addr(tx_buffer, dma),
7861                                                dma_unmap_len(tx_buffer, len),
7862                                                DMA_TO_DEVICE);
7863                                 dma_unmap_len_set(tx_buffer, len, 0);
7864                         }
7865                 }
7866
7867                 /* move us one more past the eop_desc for start of next pkt */
7868                 tx_buffer++;
7869                 tx_desc++;
7870                 i++;
7871                 if (unlikely(!i)) {
7872                         i -= tx_ring->count;
7873                         tx_buffer = tx_ring->tx_buffer_info;
7874                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7875                 }
7876
7877                 /* issue prefetch for next Tx descriptor */
7878                 prefetch(tx_desc);
7879
7880                 /* update budget accounting */
7881                 budget--;
7882         } while (likely(budget));
7883
7884         netdev_tx_completed_queue(txring_txq(tx_ring),
7885                                   total_packets, total_bytes);
7886         i += tx_ring->count;
7887         tx_ring->next_to_clean = i;
7888         u64_stats_update_begin(&tx_ring->tx_syncp);
7889         tx_ring->tx_stats.bytes += total_bytes;
7890         tx_ring->tx_stats.packets += total_packets;
7891         u64_stats_update_end(&tx_ring->tx_syncp);
7892         q_vector->tx.total_bytes += total_bytes;
7893         q_vector->tx.total_packets += total_packets;
7894
7895         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7896                 struct e1000_hw *hw = &adapter->hw;
7897
7898                 /* Detect a transmit hang in hardware, this serializes the
7899                  * check with the clearing of time_stamp and movement of i
7900                  */
7901                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7902                 if (tx_buffer->next_to_watch &&
7903                     time_after(jiffies, tx_buffer->time_stamp +
7904                                (adapter->tx_timeout_factor * HZ)) &&
7905                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
7906
7907                         /* detected Tx unit hang */
7908                         dev_err(tx_ring->dev,
7909                                 "Detected Tx Unit Hang\n"
7910                                 "  Tx Queue             <%d>\n"
7911                                 "  TDH                  <%x>\n"
7912                                 "  TDT                  <%x>\n"
7913                                 "  next_to_use          <%x>\n"
7914                                 "  next_to_clean        <%x>\n"
7915                                 "buffer_info[next_to_clean]\n"
7916                                 "  time_stamp           <%lx>\n"
7917                                 "  next_to_watch        <%p>\n"
7918                                 "  jiffies              <%lx>\n"
7919                                 "  desc.status          <%x>\n",
7920                                 tx_ring->queue_index,
7921                                 rd32(E1000_TDH(tx_ring->reg_idx)),
7922                                 readl(tx_ring->tail),
7923                                 tx_ring->next_to_use,
7924                                 tx_ring->next_to_clean,
7925                                 tx_buffer->time_stamp,
7926                                 tx_buffer->next_to_watch,
7927                                 jiffies,
7928                                 tx_buffer->next_to_watch->wb.status);
7929                         netif_stop_subqueue(tx_ring->netdev,
7930                                             tx_ring->queue_index);
7931
7932                         /* we are about to reset, no point in enabling stuff */
7933                         return true;
7934                 }
7935         }
7936
7937 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7938         if (unlikely(total_packets &&
7939             netif_carrier_ok(tx_ring->netdev) &&
7940             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7941                 /* Make sure that anybody stopping the queue after this
7942                  * sees the new next_to_clean.
7943                  */
7944                 smp_mb();
7945                 if (__netif_subqueue_stopped(tx_ring->netdev,
7946                                              tx_ring->queue_index) &&
7947                     !(test_bit(__IGB_DOWN, &adapter->state))) {
7948                         netif_wake_subqueue(tx_ring->netdev,
7949                                             tx_ring->queue_index);
7950
7951                         u64_stats_update_begin(&tx_ring->tx_syncp);
7952                         tx_ring->tx_stats.restart_queue++;
7953                         u64_stats_update_end(&tx_ring->tx_syncp);
7954                 }
7955         }
7956
7957         return !!budget;
7958 }
7959
7960 /**
7961  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
7962  *  @rx_ring: rx descriptor ring to store buffers on
7963  *  @old_buff: donor buffer to have page reused
7964  *
7965  *  Synchronizes page for reuse by the adapter
7966  **/
7967 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7968                               struct igb_rx_buffer *old_buff)
7969 {
7970         struct igb_rx_buffer *new_buff;
7971         u16 nta = rx_ring->next_to_alloc;
7972
7973         new_buff = &rx_ring->rx_buffer_info[nta];
7974
7975         /* update, and store next to alloc */
7976         nta++;
7977         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7978
7979         /* Transfer page from old buffer to new buffer.
7980          * Move each member individually to avoid possible store
7981          * forwarding stalls.
7982          */
7983         new_buff->dma           = old_buff->dma;
7984         new_buff->page          = old_buff->page;
7985         new_buff->page_offset   = old_buff->page_offset;
7986         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
7987 }
7988
7989 static inline bool igb_page_is_reserved(struct page *page)
7990 {
7991         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
7992 }
7993
7994 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer)
7995 {
7996         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
7997         struct page *page = rx_buffer->page;
7998
7999         /* avoid re-using remote pages */
8000         if (unlikely(igb_page_is_reserved(page)))
8001                 return false;
8002
8003 #if (PAGE_SIZE < 8192)
8004         /* if we are only owner of page we can reuse it */
8005         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
8006                 return false;
8007 #else
8008 #define IGB_LAST_OFFSET \
8009         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
8010
8011         if (rx_buffer->page_offset > IGB_LAST_OFFSET)
8012                 return false;
8013 #endif
8014
8015         /* If we have drained the page fragment pool we need to update
8016          * the pagecnt_bias and page count so that we fully restock the
8017          * number of references the driver holds.
8018          */
8019         if (unlikely(!pagecnt_bias)) {
8020                 page_ref_add(page, USHRT_MAX);
8021                 rx_buffer->pagecnt_bias = USHRT_MAX;
8022         }
8023
8024         return true;
8025 }
8026
8027 /**
8028  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
8029  *  @rx_ring: rx descriptor ring to transact packets on
8030  *  @rx_buffer: buffer containing page to add
8031  *  @skb: sk_buff to place the data into
8032  *  @size: size of buffer to be added
8033  *
8034  *  This function will add the data contained in rx_buffer->page to the skb.
8035  **/
8036 static void igb_add_rx_frag(struct igb_ring *rx_ring,
8037                             struct igb_rx_buffer *rx_buffer,
8038                             struct sk_buff *skb,
8039                             unsigned int size)
8040 {
8041 #if (PAGE_SIZE < 8192)
8042         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8043 #else
8044         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
8045                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
8046                                 SKB_DATA_ALIGN(size);
8047 #endif
8048         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
8049                         rx_buffer->page_offset, size, truesize);
8050 #if (PAGE_SIZE < 8192)
8051         rx_buffer->page_offset ^= truesize;
8052 #else
8053         rx_buffer->page_offset += truesize;
8054 #endif
8055 }
8056
8057 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
8058                                          struct igb_rx_buffer *rx_buffer,
8059                                          union e1000_adv_rx_desc *rx_desc,
8060                                          unsigned int size)
8061 {
8062         void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
8063 #if (PAGE_SIZE < 8192)
8064         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8065 #else
8066         unsigned int truesize = SKB_DATA_ALIGN(size);
8067 #endif
8068         unsigned int headlen;
8069         struct sk_buff *skb;
8070
8071         /* prefetch first cache line of first page */
8072         prefetch(va);
8073 #if L1_CACHE_BYTES < 128
8074         prefetch(va + L1_CACHE_BYTES);
8075 #endif
8076
8077         /* allocate a skb to store the frags */
8078         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
8079         if (unlikely(!skb))
8080                 return NULL;
8081
8082         if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
8083                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8084                 va += IGB_TS_HDR_LEN;
8085                 size -= IGB_TS_HDR_LEN;
8086         }
8087
8088         /* Determine available headroom for copy */
8089         headlen = size;
8090         if (headlen > IGB_RX_HDR_LEN)
8091                 headlen = eth_get_headlen(va, IGB_RX_HDR_LEN);
8092
8093         /* align pull length to size of long to optimize memcpy performance */
8094         memcpy(__skb_put(skb, headlen), va, ALIGN(headlen, sizeof(long)));
8095
8096         /* update all of the pointers */
8097         size -= headlen;
8098         if (size) {
8099                 skb_add_rx_frag(skb, 0, rx_buffer->page,
8100                                 (va + headlen) - page_address(rx_buffer->page),
8101                                 size, truesize);
8102 #if (PAGE_SIZE < 8192)
8103                 rx_buffer->page_offset ^= truesize;
8104 #else
8105                 rx_buffer->page_offset += truesize;
8106 #endif
8107         } else {
8108                 rx_buffer->pagecnt_bias++;
8109         }
8110
8111         return skb;
8112 }
8113
8114 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
8115                                      struct igb_rx_buffer *rx_buffer,
8116                                      union e1000_adv_rx_desc *rx_desc,
8117                                      unsigned int size)
8118 {
8119         void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
8120 #if (PAGE_SIZE < 8192)
8121         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8122 #else
8123         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
8124                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size);
8125 #endif
8126         struct sk_buff *skb;
8127
8128         /* prefetch first cache line of first page */
8129         prefetch(va);
8130 #if L1_CACHE_BYTES < 128
8131         prefetch(va + L1_CACHE_BYTES);
8132 #endif
8133
8134         /* build an skb around the page buffer */
8135         skb = build_skb(va - IGB_SKB_PAD, truesize);
8136         if (unlikely(!skb))
8137                 return NULL;
8138
8139         /* update pointers within the skb to store the data */
8140         skb_reserve(skb, IGB_SKB_PAD);
8141         __skb_put(skb, size);
8142
8143         /* pull timestamp out of packet data */
8144         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8145                 igb_ptp_rx_pktstamp(rx_ring->q_vector, skb->data, skb);
8146                 __skb_pull(skb, IGB_TS_HDR_LEN);
8147         }
8148
8149         /* update buffer offset */
8150 #if (PAGE_SIZE < 8192)
8151         rx_buffer->page_offset ^= truesize;
8152 #else
8153         rx_buffer->page_offset += truesize;
8154 #endif
8155
8156         return skb;
8157 }
8158
8159 static inline void igb_rx_checksum(struct igb_ring *ring,
8160                                    union e1000_adv_rx_desc *rx_desc,
8161                                    struct sk_buff *skb)
8162 {
8163         skb_checksum_none_assert(skb);
8164
8165         /* Ignore Checksum bit is set */
8166         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
8167                 return;
8168
8169         /* Rx checksum disabled via ethtool */
8170         if (!(ring->netdev->features & NETIF_F_RXCSUM))
8171                 return;
8172
8173         /* TCP/UDP checksum error bit is set */
8174         if (igb_test_staterr(rx_desc,
8175                              E1000_RXDEXT_STATERR_TCPE |
8176                              E1000_RXDEXT_STATERR_IPE)) {
8177                 /* work around errata with sctp packets where the TCPE aka
8178                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
8179                  * packets, (aka let the stack check the crc32c)
8180                  */
8181                 if (!((skb->len == 60) &&
8182                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
8183                         u64_stats_update_begin(&ring->rx_syncp);
8184                         ring->rx_stats.csum_err++;
8185                         u64_stats_update_end(&ring->rx_syncp);
8186                 }
8187                 /* let the stack verify checksum errors */
8188                 return;
8189         }
8190         /* It must be a TCP or UDP packet with a valid checksum */
8191         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
8192                                       E1000_RXD_STAT_UDPCS))
8193                 skb->ip_summed = CHECKSUM_UNNECESSARY;
8194
8195         dev_dbg(ring->dev, "cksum success: bits %08X\n",
8196                 le32_to_cpu(rx_desc->wb.upper.status_error));
8197 }
8198
8199 static inline void igb_rx_hash(struct igb_ring *ring,
8200                                union e1000_adv_rx_desc *rx_desc,
8201                                struct sk_buff *skb)
8202 {
8203         if (ring->netdev->features & NETIF_F_RXHASH)
8204                 skb_set_hash(skb,
8205                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
8206                              PKT_HASH_TYPE_L3);
8207 }
8208
8209 /**
8210  *  igb_is_non_eop - process handling of non-EOP buffers
8211  *  @rx_ring: Rx ring being processed
8212  *  @rx_desc: Rx descriptor for current buffer
8213  *  @skb: current socket buffer containing buffer in progress
8214  *
8215  *  This function updates next to clean.  If the buffer is an EOP buffer
8216  *  this function exits returning false, otherwise it will place the
8217  *  sk_buff in the next buffer to be chained and return true indicating
8218  *  that this is in fact a non-EOP buffer.
8219  **/
8220 static bool igb_is_non_eop(struct igb_ring *rx_ring,
8221                            union e1000_adv_rx_desc *rx_desc)
8222 {
8223         u32 ntc = rx_ring->next_to_clean + 1;
8224
8225         /* fetch, update, and store next to clean */
8226         ntc = (ntc < rx_ring->count) ? ntc : 0;
8227         rx_ring->next_to_clean = ntc;
8228
8229         prefetch(IGB_RX_DESC(rx_ring, ntc));
8230
8231         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
8232                 return false;
8233
8234         return true;
8235 }
8236
8237 /**
8238  *  igb_cleanup_headers - Correct corrupted or empty headers
8239  *  @rx_ring: rx descriptor ring packet is being transacted on
8240  *  @rx_desc: pointer to the EOP Rx descriptor
8241  *  @skb: pointer to current skb being fixed
8242  *
8243  *  Address the case where we are pulling data in on pages only
8244  *  and as such no data is present in the skb header.
8245  *
8246  *  In addition if skb is not at least 60 bytes we need to pad it so that
8247  *  it is large enough to qualify as a valid Ethernet frame.
8248  *
8249  *  Returns true if an error was encountered and skb was freed.
8250  **/
8251 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8252                                 union e1000_adv_rx_desc *rx_desc,
8253                                 struct sk_buff *skb)
8254 {
8255         if (unlikely((igb_test_staterr(rx_desc,
8256                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8257                 struct net_device *netdev = rx_ring->netdev;
8258                 if (!(netdev->features & NETIF_F_RXALL)) {
8259                         dev_kfree_skb_any(skb);
8260                         return true;
8261                 }
8262         }
8263
8264         /* if eth_skb_pad returns an error the skb was freed */
8265         if (eth_skb_pad(skb))
8266                 return true;
8267
8268         return false;
8269 }
8270
8271 /**
8272  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
8273  *  @rx_ring: rx descriptor ring packet is being transacted on
8274  *  @rx_desc: pointer to the EOP Rx descriptor
8275  *  @skb: pointer to current skb being populated
8276  *
8277  *  This function checks the ring, descriptor, and packet information in
8278  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
8279  *  other fields within the skb.
8280  **/
8281 static void igb_process_skb_fields(struct igb_ring *rx_ring,
8282                                    union e1000_adv_rx_desc *rx_desc,
8283                                    struct sk_buff *skb)
8284 {
8285         struct net_device *dev = rx_ring->netdev;
8286
8287         igb_rx_hash(rx_ring, rx_desc, skb);
8288
8289         igb_rx_checksum(rx_ring, rx_desc, skb);
8290
8291         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
8292             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
8293                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
8294
8295         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
8296             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
8297                 u16 vid;
8298
8299                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
8300                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
8301                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
8302                 else
8303                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
8304
8305                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
8306         }
8307
8308         skb_record_rx_queue(skb, rx_ring->queue_index);
8309
8310         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
8311 }
8312
8313 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
8314                                                const unsigned int size)
8315 {
8316         struct igb_rx_buffer *rx_buffer;
8317
8318         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
8319         prefetchw(rx_buffer->page);
8320
8321         /* we are reusing so sync this buffer for CPU use */
8322         dma_sync_single_range_for_cpu(rx_ring->dev,
8323                                       rx_buffer->dma,
8324                                       rx_buffer->page_offset,
8325                                       size,
8326                                       DMA_FROM_DEVICE);
8327
8328         rx_buffer->pagecnt_bias--;
8329
8330         return rx_buffer;
8331 }
8332
8333 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
8334                               struct igb_rx_buffer *rx_buffer)
8335 {
8336         if (igb_can_reuse_rx_page(rx_buffer)) {
8337                 /* hand second half of page back to the ring */
8338                 igb_reuse_rx_page(rx_ring, rx_buffer);
8339         } else {
8340                 /* We are not reusing the buffer so unmap it and free
8341                  * any references we are holding to it
8342                  */
8343                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
8344                                      igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
8345                                      IGB_RX_DMA_ATTR);
8346                 __page_frag_cache_drain(rx_buffer->page,
8347                                         rx_buffer->pagecnt_bias);
8348         }
8349
8350         /* clear contents of rx_buffer */
8351         rx_buffer->page = NULL;
8352 }
8353
8354 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
8355 {
8356         struct igb_ring *rx_ring = q_vector->rx.ring;
8357         struct sk_buff *skb = rx_ring->skb;
8358         unsigned int total_bytes = 0, total_packets = 0;
8359         u16 cleaned_count = igb_desc_unused(rx_ring);
8360
8361         while (likely(total_packets < budget)) {
8362                 union e1000_adv_rx_desc *rx_desc;
8363                 struct igb_rx_buffer *rx_buffer;
8364                 unsigned int size;
8365
8366                 /* return some buffers to hardware, one at a time is too slow */
8367                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8368                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8369                         cleaned_count = 0;
8370                 }
8371
8372                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8373                 size = le16_to_cpu(rx_desc->wb.upper.length);
8374                 if (!size)
8375                         break;
8376
8377                 /* This memory barrier is needed to keep us from reading
8378                  * any other fields out of the rx_desc until we know the
8379                  * descriptor has been written back
8380                  */
8381                 dma_rmb();
8382
8383                 rx_buffer = igb_get_rx_buffer(rx_ring, size);
8384
8385                 /* retrieve a buffer from the ring */
8386                 if (skb)
8387                         igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
8388                 else if (ring_uses_build_skb(rx_ring))
8389                         skb = igb_build_skb(rx_ring, rx_buffer, rx_desc, size);
8390                 else
8391                         skb = igb_construct_skb(rx_ring, rx_buffer,
8392                                                 rx_desc, size);
8393
8394                 /* exit if we failed to retrieve a buffer */
8395                 if (!skb) {
8396                         rx_ring->rx_stats.alloc_failed++;
8397                         rx_buffer->pagecnt_bias++;
8398                         break;
8399                 }
8400
8401                 igb_put_rx_buffer(rx_ring, rx_buffer);
8402                 cleaned_count++;
8403
8404                 /* fetch next buffer in frame if non-eop */
8405                 if (igb_is_non_eop(rx_ring, rx_desc))
8406                         continue;
8407
8408                 /* verify the packet layout is correct */
8409                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8410                         skb = NULL;
8411                         continue;
8412                 }
8413
8414                 /* probably a little skewed due to removing CRC */
8415                 total_bytes += skb->len;
8416
8417                 /* populate checksum, timestamp, VLAN, and protocol */
8418                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8419
8420                 napi_gro_receive(&q_vector->napi, skb);
8421
8422                 /* reset skb pointer */
8423                 skb = NULL;
8424
8425                 /* update budget accounting */
8426                 total_packets++;
8427         }
8428
8429         /* place incomplete frames back on ring for completion */
8430         rx_ring->skb = skb;
8431
8432         u64_stats_update_begin(&rx_ring->rx_syncp);
8433         rx_ring->rx_stats.packets += total_packets;
8434         rx_ring->rx_stats.bytes += total_bytes;
8435         u64_stats_update_end(&rx_ring->rx_syncp);
8436         q_vector->rx.total_packets += total_packets;
8437         q_vector->rx.total_bytes += total_bytes;
8438
8439         if (cleaned_count)
8440                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8441
8442         return total_packets;
8443 }
8444
8445 static inline unsigned int igb_rx_offset(struct igb_ring *rx_ring)
8446 {
8447         return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
8448 }
8449
8450 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8451                                   struct igb_rx_buffer *bi)
8452 {
8453         struct page *page = bi->page;
8454         dma_addr_t dma;
8455
8456         /* since we are recycling buffers we should seldom need to alloc */
8457         if (likely(page))
8458                 return true;
8459
8460         /* alloc new page for storage */
8461         page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
8462         if (unlikely(!page)) {
8463                 rx_ring->rx_stats.alloc_failed++;
8464                 return false;
8465         }
8466
8467         /* map page for use */
8468         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
8469                                  igb_rx_pg_size(rx_ring),
8470                                  DMA_FROM_DEVICE,
8471                                  IGB_RX_DMA_ATTR);
8472
8473         /* if mapping failed free memory back to system since
8474          * there isn't much point in holding memory we can't use
8475          */
8476         if (dma_mapping_error(rx_ring->dev, dma)) {
8477                 __free_pages(page, igb_rx_pg_order(rx_ring));
8478
8479                 rx_ring->rx_stats.alloc_failed++;
8480                 return false;
8481         }
8482
8483         bi->dma = dma;
8484         bi->page = page;
8485         bi->page_offset = igb_rx_offset(rx_ring);
8486         bi->pagecnt_bias = 1;
8487
8488         return true;
8489 }
8490
8491 /**
8492  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
8493  *  @adapter: address of board private structure
8494  **/
8495 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8496 {
8497         union e1000_adv_rx_desc *rx_desc;
8498         struct igb_rx_buffer *bi;
8499         u16 i = rx_ring->next_to_use;
8500         u16 bufsz;
8501
8502         /* nothing to do */
8503         if (!cleaned_count)
8504                 return;
8505
8506         rx_desc = IGB_RX_DESC(rx_ring, i);
8507         bi = &rx_ring->rx_buffer_info[i];
8508         i -= rx_ring->count;
8509
8510         bufsz = igb_rx_bufsz(rx_ring);
8511
8512         do {
8513                 if (!igb_alloc_mapped_page(rx_ring, bi))
8514                         break;
8515
8516                 /* sync the buffer for use by the device */
8517                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
8518                                                  bi->page_offset, bufsz,
8519                                                  DMA_FROM_DEVICE);
8520
8521                 /* Refresh the desc even if buffer_addrs didn't change
8522                  * because each write-back erases this info.
8523                  */
8524                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8525
8526                 rx_desc++;
8527                 bi++;
8528                 i++;
8529                 if (unlikely(!i)) {
8530                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8531                         bi = rx_ring->rx_buffer_info;
8532                         i -= rx_ring->count;
8533                 }
8534
8535                 /* clear the length for the next_to_use descriptor */
8536                 rx_desc->wb.upper.length = 0;
8537
8538                 cleaned_count--;
8539         } while (cleaned_count);
8540
8541         i += rx_ring->count;
8542
8543         if (rx_ring->next_to_use != i) {
8544                 /* record the next descriptor to use */
8545                 rx_ring->next_to_use = i;
8546
8547                 /* update next to alloc since we have filled the ring */
8548                 rx_ring->next_to_alloc = i;
8549
8550                 /* Force memory writes to complete before letting h/w
8551                  * know there are new descriptors to fetch.  (Only
8552                  * applicable for weak-ordered memory model archs,
8553                  * such as IA-64).
8554                  */
8555                 dma_wmb();
8556                 writel(i, rx_ring->tail);
8557         }
8558 }
8559
8560 /**
8561  * igb_mii_ioctl -
8562  * @netdev:
8563  * @ifreq:
8564  * @cmd:
8565  **/
8566 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8567 {
8568         struct igb_adapter *adapter = netdev_priv(netdev);
8569         struct mii_ioctl_data *data = if_mii(ifr);
8570
8571         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8572                 return -EOPNOTSUPP;
8573
8574         switch (cmd) {
8575         case SIOCGMIIPHY:
8576                 data->phy_id = adapter->hw.phy.addr;
8577                 break;
8578         case SIOCGMIIREG:
8579                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8580                                      &data->val_out))
8581                         return -EIO;
8582                 break;
8583         case SIOCSMIIREG:
8584         default:
8585                 return -EOPNOTSUPP;
8586         }
8587         return 0;
8588 }
8589
8590 /**
8591  * igb_ioctl -
8592  * @netdev:
8593  * @ifreq:
8594  * @cmd:
8595  **/
8596 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8597 {
8598         switch (cmd) {
8599         case SIOCGMIIPHY:
8600         case SIOCGMIIREG:
8601         case SIOCSMIIREG:
8602                 return igb_mii_ioctl(netdev, ifr, cmd);
8603         case SIOCGHWTSTAMP:
8604                 return igb_ptp_get_ts_config(netdev, ifr);
8605         case SIOCSHWTSTAMP:
8606                 return igb_ptp_set_ts_config(netdev, ifr);
8607         default:
8608                 return -EOPNOTSUPP;
8609         }
8610 }
8611
8612 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
8613 {
8614         struct igb_adapter *adapter = hw->back;
8615
8616         pci_read_config_word(adapter->pdev, reg, value);
8617 }
8618
8619 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
8620 {
8621         struct igb_adapter *adapter = hw->back;
8622
8623         pci_write_config_word(adapter->pdev, reg, *value);
8624 }
8625
8626 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8627 {
8628         struct igb_adapter *adapter = hw->back;
8629
8630         if (pcie_capability_read_word(adapter->pdev, reg, value))
8631                 return -E1000_ERR_CONFIG;
8632
8633         return 0;
8634 }
8635
8636 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8637 {
8638         struct igb_adapter *adapter = hw->back;
8639
8640         if (pcie_capability_write_word(adapter->pdev, reg, *value))
8641                 return -E1000_ERR_CONFIG;
8642
8643         return 0;
8644 }
8645
8646 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
8647 {
8648         struct igb_adapter *adapter = netdev_priv(netdev);
8649         struct e1000_hw *hw = &adapter->hw;
8650         u32 ctrl, rctl;
8651         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8652
8653         if (enable) {
8654                 /* enable VLAN tag insert/strip */
8655                 ctrl = rd32(E1000_CTRL);
8656                 ctrl |= E1000_CTRL_VME;
8657                 wr32(E1000_CTRL, ctrl);
8658
8659                 /* Disable CFI check */
8660                 rctl = rd32(E1000_RCTL);
8661                 rctl &= ~E1000_RCTL_CFIEN;
8662                 wr32(E1000_RCTL, rctl);
8663         } else {
8664                 /* disable VLAN tag insert/strip */
8665                 ctrl = rd32(E1000_CTRL);
8666                 ctrl &= ~E1000_CTRL_VME;
8667                 wr32(E1000_CTRL, ctrl);
8668         }
8669
8670         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
8671 }
8672
8673 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8674                                __be16 proto, u16 vid)
8675 {
8676         struct igb_adapter *adapter = netdev_priv(netdev);
8677         struct e1000_hw *hw = &adapter->hw;
8678         int pf_id = adapter->vfs_allocated_count;
8679
8680         /* add the filter since PF can receive vlans w/o entry in vlvf */
8681         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
8682                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
8683
8684         set_bit(vid, adapter->active_vlans);
8685
8686         return 0;
8687 }
8688
8689 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8690                                 __be16 proto, u16 vid)
8691 {
8692         struct igb_adapter *adapter = netdev_priv(netdev);
8693         int pf_id = adapter->vfs_allocated_count;
8694         struct e1000_hw *hw = &adapter->hw;
8695
8696         /* remove VID from filter table */
8697         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
8698                 igb_vfta_set(hw, vid, pf_id, false, true);
8699
8700         clear_bit(vid, adapter->active_vlans);
8701
8702         return 0;
8703 }
8704
8705 static void igb_restore_vlan(struct igb_adapter *adapter)
8706 {
8707         u16 vid = 1;
8708
8709         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8710         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
8711
8712         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
8713                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
8714 }
8715
8716 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
8717 {
8718         struct pci_dev *pdev = adapter->pdev;
8719         struct e1000_mac_info *mac = &adapter->hw.mac;
8720
8721         mac->autoneg = 0;
8722
8723         /* Make sure dplx is at most 1 bit and lsb of speed is not set
8724          * for the switch() below to work
8725          */
8726         if ((spd & 1) || (dplx & ~1))
8727                 goto err_inval;
8728
8729         /* Fiber NIC's only allow 1000 gbps Full duplex
8730          * and 100Mbps Full duplex for 100baseFx sfp
8731          */
8732         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8733                 switch (spd + dplx) {
8734                 case SPEED_10 + DUPLEX_HALF:
8735                 case SPEED_10 + DUPLEX_FULL:
8736                 case SPEED_100 + DUPLEX_HALF:
8737                         goto err_inval;
8738                 default:
8739                         break;
8740                 }
8741         }
8742
8743         switch (spd + dplx) {
8744         case SPEED_10 + DUPLEX_HALF:
8745                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8746                 break;
8747         case SPEED_10 + DUPLEX_FULL:
8748                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8749                 break;
8750         case SPEED_100 + DUPLEX_HALF:
8751                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8752                 break;
8753         case SPEED_100 + DUPLEX_FULL:
8754                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8755                 break;
8756         case SPEED_1000 + DUPLEX_FULL:
8757                 mac->autoneg = 1;
8758                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8759                 break;
8760         case SPEED_1000 + DUPLEX_HALF: /* not supported */
8761         default:
8762                 goto err_inval;
8763         }
8764
8765         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8766         adapter->hw.phy.mdix = AUTO_ALL_MODES;
8767
8768         return 0;
8769
8770 err_inval:
8771         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
8772         return -EINVAL;
8773 }
8774
8775 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8776                           bool runtime)
8777 {
8778         struct net_device *netdev = pci_get_drvdata(pdev);
8779         struct igb_adapter *adapter = netdev_priv(netdev);
8780         struct e1000_hw *hw = &adapter->hw;
8781         u32 ctrl, rctl, status;
8782         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8783         bool wake;
8784
8785         rtnl_lock();
8786         netif_device_detach(netdev);
8787
8788         if (netif_running(netdev))
8789                 __igb_close(netdev, true);
8790
8791         igb_ptp_suspend(adapter);
8792
8793         igb_clear_interrupt_scheme(adapter);
8794         rtnl_unlock();
8795
8796         status = rd32(E1000_STATUS);
8797         if (status & E1000_STATUS_LU)
8798                 wufc &= ~E1000_WUFC_LNKC;
8799
8800         if (wufc) {
8801                 igb_setup_rctl(adapter);
8802                 igb_set_rx_mode(netdev);
8803
8804                 /* turn on all-multi mode if wake on multicast is enabled */
8805                 if (wufc & E1000_WUFC_MC) {
8806                         rctl = rd32(E1000_RCTL);
8807                         rctl |= E1000_RCTL_MPE;
8808                         wr32(E1000_RCTL, rctl);
8809                 }
8810
8811                 ctrl = rd32(E1000_CTRL);
8812                 ctrl |= E1000_CTRL_ADVD3WUC;
8813                 wr32(E1000_CTRL, ctrl);
8814
8815                 /* Allow time for pending master requests to run */
8816                 igb_disable_pcie_master(hw);
8817
8818                 wr32(E1000_WUC, E1000_WUC_PME_EN);
8819                 wr32(E1000_WUFC, wufc);
8820         } else {
8821                 wr32(E1000_WUC, 0);
8822                 wr32(E1000_WUFC, 0);
8823         }
8824
8825         wake = wufc || adapter->en_mng_pt;
8826         if (!wake)
8827                 igb_power_down_link(adapter);
8828         else
8829                 igb_power_up_link(adapter);
8830
8831         if (enable_wake)
8832                 *enable_wake = wake;
8833
8834         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8835          * would have already happened in close and is redundant.
8836          */
8837         igb_release_hw_control(adapter);
8838
8839         pci_disable_device(pdev);
8840
8841         return 0;
8842 }
8843
8844 static void igb_deliver_wake_packet(struct net_device *netdev)
8845 {
8846         struct igb_adapter *adapter = netdev_priv(netdev);
8847         struct e1000_hw *hw = &adapter->hw;
8848         struct sk_buff *skb;
8849         u32 wupl;
8850
8851         wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
8852
8853         /* WUPM stores only the first 128 bytes of the wake packet.
8854          * Read the packet only if we have the whole thing.
8855          */
8856         if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
8857                 return;
8858
8859         skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
8860         if (!skb)
8861                 return;
8862
8863         skb_put(skb, wupl);
8864
8865         /* Ensure reads are 32-bit aligned */
8866         wupl = roundup(wupl, 4);
8867
8868         memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
8869
8870         skb->protocol = eth_type_trans(skb, netdev);
8871         netif_rx(skb);
8872 }
8873
8874 static int __maybe_unused igb_suspend(struct device *dev)
8875 {
8876         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
8877 }
8878
8879 static int __maybe_unused igb_resume(struct device *dev)
8880 {
8881         struct pci_dev *pdev = to_pci_dev(dev);
8882         struct net_device *netdev = pci_get_drvdata(pdev);
8883         struct igb_adapter *adapter = netdev_priv(netdev);
8884         struct e1000_hw *hw = &adapter->hw;
8885         u32 err, val;
8886
8887         pci_set_power_state(pdev, PCI_D0);
8888         pci_restore_state(pdev);
8889         pci_save_state(pdev);
8890
8891         if (!pci_device_is_present(pdev))
8892                 return -ENODEV;
8893         err = pci_enable_device_mem(pdev);
8894         if (err) {
8895                 dev_err(&pdev->dev,
8896                         "igb: Cannot enable PCI device from suspend\n");
8897                 return err;
8898         }
8899         pci_set_master(pdev);
8900
8901         pci_enable_wake(pdev, PCI_D3hot, 0);
8902         pci_enable_wake(pdev, PCI_D3cold, 0);
8903
8904         if (igb_init_interrupt_scheme(adapter, true)) {
8905                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8906                 return -ENOMEM;
8907         }
8908
8909         igb_reset(adapter);
8910
8911         /* let the f/w know that the h/w is now under the control of the
8912          * driver.
8913          */
8914         igb_get_hw_control(adapter);
8915
8916         val = rd32(E1000_WUS);
8917         if (val & WAKE_PKT_WUS)
8918                 igb_deliver_wake_packet(netdev);
8919
8920         wr32(E1000_WUS, ~0);
8921
8922         rtnl_lock();
8923         if (!err && netif_running(netdev))
8924                 err = __igb_open(netdev, true);
8925
8926         if (!err)
8927                 netif_device_attach(netdev);
8928         rtnl_unlock();
8929
8930         return err;
8931 }
8932
8933 static int __maybe_unused igb_runtime_idle(struct device *dev)
8934 {
8935         struct pci_dev *pdev = to_pci_dev(dev);
8936         struct net_device *netdev = pci_get_drvdata(pdev);
8937         struct igb_adapter *adapter = netdev_priv(netdev);
8938
8939         if (!igb_has_link(adapter))
8940                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
8941
8942         return -EBUSY;
8943 }
8944
8945 static int __maybe_unused igb_runtime_suspend(struct device *dev)
8946 {
8947         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
8948 }
8949
8950 static int __maybe_unused igb_runtime_resume(struct device *dev)
8951 {
8952         return igb_resume(dev);
8953 }
8954
8955 static void igb_shutdown(struct pci_dev *pdev)
8956 {
8957         bool wake;
8958
8959         __igb_shutdown(pdev, &wake, 0);
8960
8961         if (system_state == SYSTEM_POWER_OFF) {
8962                 pci_wake_from_d3(pdev, wake);
8963                 pci_set_power_state(pdev, PCI_D3hot);
8964         }
8965 }
8966
8967 #ifdef CONFIG_PCI_IOV
8968 static int igb_sriov_reinit(struct pci_dev *dev)
8969 {
8970         struct net_device *netdev = pci_get_drvdata(dev);
8971         struct igb_adapter *adapter = netdev_priv(netdev);
8972         struct pci_dev *pdev = adapter->pdev;
8973
8974         rtnl_lock();
8975
8976         if (netif_running(netdev))
8977                 igb_close(netdev);
8978         else
8979                 igb_reset(adapter);
8980
8981         igb_clear_interrupt_scheme(adapter);
8982
8983         igb_init_queue_configuration(adapter);
8984
8985         if (igb_init_interrupt_scheme(adapter, true)) {
8986                 rtnl_unlock();
8987                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8988                 return -ENOMEM;
8989         }
8990
8991         if (netif_running(netdev))
8992                 igb_open(netdev);
8993
8994         rtnl_unlock();
8995
8996         return 0;
8997 }
8998
8999 static int igb_pci_disable_sriov(struct pci_dev *dev)
9000 {
9001         int err = igb_disable_sriov(dev);
9002
9003         if (!err)
9004                 err = igb_sriov_reinit(dev);
9005
9006         return err;
9007 }
9008
9009 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
9010 {
9011         int err = igb_enable_sriov(dev, num_vfs);
9012
9013         if (err)
9014                 goto out;
9015
9016         err = igb_sriov_reinit(dev);
9017         if (!err)
9018                 return num_vfs;
9019
9020 out:
9021         return err;
9022 }
9023
9024 #endif
9025 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
9026 {
9027 #ifdef CONFIG_PCI_IOV
9028         if (num_vfs == 0)
9029                 return igb_pci_disable_sriov(dev);
9030         else
9031                 return igb_pci_enable_sriov(dev, num_vfs);
9032 #endif
9033         return 0;
9034 }
9035
9036 /**
9037  *  igb_io_error_detected - called when PCI error is detected
9038  *  @pdev: Pointer to PCI device
9039  *  @state: The current pci connection state
9040  *
9041  *  This function is called after a PCI bus error affecting
9042  *  this device has been detected.
9043  **/
9044 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9045                                               pci_channel_state_t state)
9046 {
9047         struct net_device *netdev = pci_get_drvdata(pdev);
9048         struct igb_adapter *adapter = netdev_priv(netdev);
9049
9050         netif_device_detach(netdev);
9051
9052         if (state == pci_channel_io_perm_failure)
9053                 return PCI_ERS_RESULT_DISCONNECT;
9054
9055         if (netif_running(netdev))
9056                 igb_down(adapter);
9057         pci_disable_device(pdev);
9058
9059         /* Request a slot slot reset. */
9060         return PCI_ERS_RESULT_NEED_RESET;
9061 }
9062
9063 /**
9064  *  igb_io_slot_reset - called after the pci bus has been reset.
9065  *  @pdev: Pointer to PCI device
9066  *
9067  *  Restart the card from scratch, as if from a cold-boot. Implementation
9068  *  resembles the first-half of the igb_resume routine.
9069  **/
9070 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9071 {
9072         struct net_device *netdev = pci_get_drvdata(pdev);
9073         struct igb_adapter *adapter = netdev_priv(netdev);
9074         struct e1000_hw *hw = &adapter->hw;
9075         pci_ers_result_t result;
9076         int err;
9077
9078         if (pci_enable_device_mem(pdev)) {
9079                 dev_err(&pdev->dev,
9080                         "Cannot re-enable PCI device after reset.\n");
9081                 result = PCI_ERS_RESULT_DISCONNECT;
9082         } else {
9083                 pci_set_master(pdev);
9084                 pci_restore_state(pdev);
9085                 pci_save_state(pdev);
9086
9087                 pci_enable_wake(pdev, PCI_D3hot, 0);
9088                 pci_enable_wake(pdev, PCI_D3cold, 0);
9089
9090                 /* In case of PCI error, adapter lose its HW address
9091                  * so we should re-assign it here.
9092                  */
9093                 hw->hw_addr = adapter->io_addr;
9094
9095                 igb_reset(adapter);
9096                 wr32(E1000_WUS, ~0);
9097                 result = PCI_ERS_RESULT_RECOVERED;
9098         }
9099
9100         err = pci_cleanup_aer_uncorrect_error_status(pdev);
9101         if (err) {
9102                 dev_err(&pdev->dev,
9103                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
9104                         err);
9105                 /* non-fatal, continue */
9106         }
9107
9108         return result;
9109 }
9110
9111 /**
9112  *  igb_io_resume - called when traffic can start flowing again.
9113  *  @pdev: Pointer to PCI device
9114  *
9115  *  This callback is called when the error recovery driver tells us that
9116  *  its OK to resume normal operation. Implementation resembles the
9117  *  second-half of the igb_resume routine.
9118  */
9119 static void igb_io_resume(struct pci_dev *pdev)
9120 {
9121         struct net_device *netdev = pci_get_drvdata(pdev);
9122         struct igb_adapter *adapter = netdev_priv(netdev);
9123
9124         if (netif_running(netdev)) {
9125                 if (igb_up(adapter)) {
9126                         dev_err(&pdev->dev, "igb_up failed after reset\n");
9127                         return;
9128                 }
9129         }
9130
9131         netif_device_attach(netdev);
9132
9133         /* let the f/w know that the h/w is now under the control of the
9134          * driver.
9135          */
9136         igb_get_hw_control(adapter);
9137 }
9138
9139 /**
9140  *  igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
9141  *  @adapter: Pointer to adapter structure
9142  *  @index: Index of the RAR entry which need to be synced with MAC table
9143  **/
9144 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
9145 {
9146         struct e1000_hw *hw = &adapter->hw;
9147         u32 rar_low, rar_high;
9148         u8 *addr = adapter->mac_table[index].addr;
9149
9150         /* HW expects these to be in network order when they are plugged
9151          * into the registers which are little endian.  In order to guarantee
9152          * that ordering we need to do an leXX_to_cpup here in order to be
9153          * ready for the byteswap that occurs with writel
9154          */
9155         rar_low = le32_to_cpup((__le32 *)(addr));
9156         rar_high = le16_to_cpup((__le16 *)(addr + 4));
9157
9158         /* Indicate to hardware the Address is Valid. */
9159         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
9160                 if (is_valid_ether_addr(addr))
9161                         rar_high |= E1000_RAH_AV;
9162
9163                 if (adapter->mac_table[index].state & IGB_MAC_STATE_SRC_ADDR)
9164                         rar_high |= E1000_RAH_ASEL_SRC_ADDR;
9165
9166                 switch (hw->mac.type) {
9167                 case e1000_82575:
9168                 case e1000_i210:
9169                         if (adapter->mac_table[index].state &
9170                             IGB_MAC_STATE_QUEUE_STEERING)
9171                                 rar_high |= E1000_RAH_QSEL_ENABLE;
9172
9173                         rar_high |= E1000_RAH_POOL_1 *
9174                                     adapter->mac_table[index].queue;
9175                         break;
9176                 default:
9177                         rar_high |= E1000_RAH_POOL_1 <<
9178                                     adapter->mac_table[index].queue;
9179                         break;
9180                 }
9181         }
9182
9183         wr32(E1000_RAL(index), rar_low);
9184         wrfl();
9185         wr32(E1000_RAH(index), rar_high);
9186         wrfl();
9187 }
9188
9189 static int igb_set_vf_mac(struct igb_adapter *adapter,
9190                           int vf, unsigned char *mac_addr)
9191 {
9192         struct e1000_hw *hw = &adapter->hw;
9193         /* VF MAC addresses start at end of receive addresses and moves
9194          * towards the first, as a result a collision should not be possible
9195          */
9196         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
9197         unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
9198
9199         ether_addr_copy(vf_mac_addr, mac_addr);
9200         ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
9201         adapter->mac_table[rar_entry].queue = vf;
9202         adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
9203         igb_rar_set_index(adapter, rar_entry);
9204
9205         return 0;
9206 }
9207
9208 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9209 {
9210         struct igb_adapter *adapter = netdev_priv(netdev);
9211
9212         if (vf >= adapter->vfs_allocated_count)
9213                 return -EINVAL;
9214
9215         /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
9216          * flag and allows to overwrite the MAC via VF netdev.  This
9217          * is necessary to allow libvirt a way to restore the original
9218          * MAC after unbinding vfio-pci and reloading igbvf after shutting
9219          * down a VM.
9220          */
9221         if (is_zero_ether_addr(mac)) {
9222                 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
9223                 dev_info(&adapter->pdev->dev,
9224                          "remove administratively set MAC on VF %d\n",
9225                          vf);
9226         } else if (is_valid_ether_addr(mac)) {
9227                 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9228                 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
9229                          mac, vf);
9230                 dev_info(&adapter->pdev->dev,
9231                          "Reload the VF driver to make this change effective.");
9232                 /* Generate additional warning if PF is down */
9233                 if (test_bit(__IGB_DOWN, &adapter->state)) {
9234                         dev_warn(&adapter->pdev->dev,
9235                                  "The VF MAC address has been set, but the PF device is not up.\n");
9236                         dev_warn(&adapter->pdev->dev,
9237                                  "Bring the PF device up before attempting to use the VF device.\n");
9238                 }
9239         } else {
9240                 return -EINVAL;
9241         }
9242         return igb_set_vf_mac(adapter, vf, mac);
9243 }
9244
9245 static int igb_link_mbps(int internal_link_speed)
9246 {
9247         switch (internal_link_speed) {
9248         case SPEED_100:
9249                 return 100;
9250         case SPEED_1000:
9251                 return 1000;
9252         default:
9253                 return 0;
9254         }
9255 }
9256
9257 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9258                                   int link_speed)
9259 {
9260         int rf_dec, rf_int;
9261         u32 bcnrc_val;
9262
9263         if (tx_rate != 0) {
9264                 /* Calculate the rate factor values to set */
9265                 rf_int = link_speed / tx_rate;
9266                 rf_dec = (link_speed - (rf_int * tx_rate));
9267                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
9268                          tx_rate;
9269
9270                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9271                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
9272                               E1000_RTTBCNRC_RF_INT_MASK);
9273                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9274         } else {
9275                 bcnrc_val = 0;
9276         }
9277
9278         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
9279         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9280          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9281          */
9282         wr32(E1000_RTTBCNRM, 0x14);
9283         wr32(E1000_RTTBCNRC, bcnrc_val);
9284 }
9285
9286 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9287 {
9288         int actual_link_speed, i;
9289         bool reset_rate = false;
9290
9291         /* VF TX rate limit was not set or not supported */
9292         if ((adapter->vf_rate_link_speed == 0) ||
9293             (adapter->hw.mac.type != e1000_82576))
9294                 return;
9295
9296         actual_link_speed = igb_link_mbps(adapter->link_speed);
9297         if (actual_link_speed != adapter->vf_rate_link_speed) {
9298                 reset_rate = true;
9299                 adapter->vf_rate_link_speed = 0;
9300                 dev_info(&adapter->pdev->dev,
9301                          "Link speed has been changed. VF Transmit rate is disabled\n");
9302         }
9303
9304         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9305                 if (reset_rate)
9306                         adapter->vf_data[i].tx_rate = 0;
9307
9308                 igb_set_vf_rate_limit(&adapter->hw, i,
9309                                       adapter->vf_data[i].tx_rate,
9310                                       actual_link_speed);
9311         }
9312 }
9313
9314 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
9315                              int min_tx_rate, int max_tx_rate)
9316 {
9317         struct igb_adapter *adapter = netdev_priv(netdev);
9318         struct e1000_hw *hw = &adapter->hw;
9319         int actual_link_speed;
9320
9321         if (hw->mac.type != e1000_82576)
9322                 return -EOPNOTSUPP;
9323
9324         if (min_tx_rate)
9325                 return -EINVAL;
9326
9327         actual_link_speed = igb_link_mbps(adapter->link_speed);
9328         if ((vf >= adapter->vfs_allocated_count) ||
9329             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
9330             (max_tx_rate < 0) ||
9331             (max_tx_rate > actual_link_speed))
9332                 return -EINVAL;
9333
9334         adapter->vf_rate_link_speed = actual_link_speed;
9335         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
9336         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
9337
9338         return 0;
9339 }
9340
9341 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
9342                                    bool setting)
9343 {
9344         struct igb_adapter *adapter = netdev_priv(netdev);
9345         struct e1000_hw *hw = &adapter->hw;
9346         u32 reg_val, reg_offset;
9347
9348         if (!adapter->vfs_allocated_count)
9349                 return -EOPNOTSUPP;
9350
9351         if (vf >= adapter->vfs_allocated_count)
9352                 return -EINVAL;
9353
9354         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
9355         reg_val = rd32(reg_offset);
9356         if (setting)
9357                 reg_val |= (BIT(vf) |
9358                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9359         else
9360                 reg_val &= ~(BIT(vf) |
9361                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9362         wr32(reg_offset, reg_val);
9363
9364         adapter->vf_data[vf].spoofchk_enabled = setting;
9365         return 0;
9366 }
9367
9368 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)
9369 {
9370         struct igb_adapter *adapter = netdev_priv(netdev);
9371
9372         if (vf >= adapter->vfs_allocated_count)
9373                 return -EINVAL;
9374         if (adapter->vf_data[vf].trusted == setting)
9375                 return 0;
9376
9377         adapter->vf_data[vf].trusted = setting;
9378
9379         dev_info(&adapter->pdev->dev, "VF %u is %strusted\n",
9380                  vf, setting ? "" : "not ");
9381         return 0;
9382 }
9383
9384 static int igb_ndo_get_vf_config(struct net_device *netdev,
9385                                  int vf, struct ifla_vf_info *ivi)
9386 {
9387         struct igb_adapter *adapter = netdev_priv(netdev);
9388         if (vf >= adapter->vfs_allocated_count)
9389                 return -EINVAL;
9390         ivi->vf = vf;
9391         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9392         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9393         ivi->min_tx_rate = 0;
9394         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9395         ivi->qos = adapter->vf_data[vf].pf_qos;
9396         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9397         ivi->trusted = adapter->vf_data[vf].trusted;
9398         return 0;
9399 }
9400
9401 static void igb_vmm_control(struct igb_adapter *adapter)
9402 {
9403         struct e1000_hw *hw = &adapter->hw;
9404         u32 reg;
9405
9406         switch (hw->mac.type) {
9407         case e1000_82575:
9408         case e1000_i210:
9409         case e1000_i211:
9410         case e1000_i354:
9411         default:
9412                 /* replication is not supported for 82575 */
9413                 return;
9414         case e1000_82576:
9415                 /* notify HW that the MAC is adding vlan tags */
9416                 reg = rd32(E1000_DTXCTL);
9417                 reg |= E1000_DTXCTL_VLAN_ADDED;
9418                 wr32(E1000_DTXCTL, reg);
9419                 /* Fall through */
9420         case e1000_82580:
9421                 /* enable replication vlan tag stripping */
9422                 reg = rd32(E1000_RPLOLR);
9423                 reg |= E1000_RPLOLR_STRVLAN;
9424                 wr32(E1000_RPLOLR, reg);
9425                 /* Fall through */
9426         case e1000_i350:
9427                 /* none of the above registers are supported by i350 */
9428                 break;
9429         }
9430
9431         if (adapter->vfs_allocated_count) {
9432                 igb_vmdq_set_loopback_pf(hw, true);
9433                 igb_vmdq_set_replication_pf(hw, true);
9434                 igb_vmdq_set_anti_spoofing_pf(hw, true,
9435                                               adapter->vfs_allocated_count);
9436         } else {
9437                 igb_vmdq_set_loopback_pf(hw, false);
9438                 igb_vmdq_set_replication_pf(hw, false);
9439         }
9440 }
9441
9442 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9443 {
9444         struct e1000_hw *hw = &adapter->hw;
9445         u32 dmac_thr;
9446         u16 hwm;
9447
9448         if (hw->mac.type > e1000_82580) {
9449                 if (adapter->flags & IGB_FLAG_DMAC) {
9450                         u32 reg;
9451
9452                         /* force threshold to 0. */
9453                         wr32(E1000_DMCTXTH, 0);
9454
9455                         /* DMA Coalescing high water mark needs to be greater
9456                          * than the Rx threshold. Set hwm to PBA - max frame
9457                          * size in 16B units, capping it at PBA - 6KB.
9458                          */
9459                         hwm = 64 * (pba - 6);
9460                         reg = rd32(E1000_FCRTC);
9461                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9462                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9463                                 & E1000_FCRTC_RTH_COAL_MASK);
9464                         wr32(E1000_FCRTC, reg);
9465
9466                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
9467                          * frame size, capping it at PBA - 10KB.
9468                          */
9469                         dmac_thr = pba - 10;
9470                         reg = rd32(E1000_DMACR);
9471                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9472                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9473                                 & E1000_DMACR_DMACTHR_MASK);
9474
9475                         /* transition to L0x or L1 if available..*/
9476                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9477
9478                         /* watchdog timer= +-1000 usec in 32usec intervals */
9479                         reg |= (1000 >> 5);
9480
9481                         /* Disable BMC-to-OS Watchdog Enable */
9482                         if (hw->mac.type != e1000_i354)
9483                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9484
9485                         wr32(E1000_DMACR, reg);
9486
9487                         /* no lower threshold to disable
9488                          * coalescing(smart fifb)-UTRESH=0
9489                          */
9490                         wr32(E1000_DMCRTRH, 0);
9491
9492                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
9493
9494                         wr32(E1000_DMCTLX, reg);
9495
9496                         /* free space in tx packet buffer to wake from
9497                          * DMA coal
9498                          */
9499                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9500                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9501
9502                         /* make low power state decision controlled
9503                          * by DMA coal
9504                          */
9505                         reg = rd32(E1000_PCIEMISC);
9506                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9507                         wr32(E1000_PCIEMISC, reg);
9508                 } /* endif adapter->dmac is not disabled */
9509         } else if (hw->mac.type == e1000_82580) {
9510                 u32 reg = rd32(E1000_PCIEMISC);
9511
9512                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
9513                 wr32(E1000_DMACR, 0);
9514         }
9515 }
9516
9517 /**
9518  *  igb_read_i2c_byte - Reads 8 bit word over I2C
9519  *  @hw: pointer to hardware structure
9520  *  @byte_offset: byte offset to read
9521  *  @dev_addr: device address
9522  *  @data: value read
9523  *
9524  *  Performs byte read operation over I2C interface at
9525  *  a specified device address.
9526  **/
9527 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9528                       u8 dev_addr, u8 *data)
9529 {
9530         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9531         struct i2c_client *this_client = adapter->i2c_client;
9532         s32 status;
9533         u16 swfw_mask = 0;
9534
9535         if (!this_client)
9536                 return E1000_ERR_I2C;
9537
9538         swfw_mask = E1000_SWFW_PHY0_SM;
9539
9540         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9541                 return E1000_ERR_SWFW_SYNC;
9542
9543         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9544         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9545
9546         if (status < 0)
9547                 return E1000_ERR_I2C;
9548         else {
9549                 *data = status;
9550                 return 0;
9551         }
9552 }
9553
9554 /**
9555  *  igb_write_i2c_byte - Writes 8 bit word over I2C
9556  *  @hw: pointer to hardware structure
9557  *  @byte_offset: byte offset to write
9558  *  @dev_addr: device address
9559  *  @data: value to write
9560  *
9561  *  Performs byte write operation over I2C interface at
9562  *  a specified device address.
9563  **/
9564 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9565                        u8 dev_addr, u8 data)
9566 {
9567         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9568         struct i2c_client *this_client = adapter->i2c_client;
9569         s32 status;
9570         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9571
9572         if (!this_client)
9573                 return E1000_ERR_I2C;
9574
9575         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9576                 return E1000_ERR_SWFW_SYNC;
9577         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9578         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9579
9580         if (status)
9581                 return E1000_ERR_I2C;
9582         else
9583                 return 0;
9584
9585 }
9586
9587 int igb_reinit_queues(struct igb_adapter *adapter)
9588 {
9589         struct net_device *netdev = adapter->netdev;
9590         struct pci_dev *pdev = adapter->pdev;
9591         int err = 0;
9592
9593         if (netif_running(netdev))
9594                 igb_close(netdev);
9595
9596         igb_reset_interrupt_capability(adapter);
9597
9598         if (igb_init_interrupt_scheme(adapter, true)) {
9599                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9600                 return -ENOMEM;
9601         }
9602
9603         if (netif_running(netdev))
9604                 err = igb_open(netdev);
9605
9606         return err;
9607 }
9608
9609 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
9610 {
9611         struct igb_nfc_filter *rule;
9612
9613         spin_lock(&adapter->nfc_lock);
9614
9615         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
9616                 igb_erase_filter(adapter, rule);
9617
9618         hlist_for_each_entry(rule, &adapter->cls_flower_list, nfc_node)
9619                 igb_erase_filter(adapter, rule);
9620
9621         spin_unlock(&adapter->nfc_lock);
9622 }
9623
9624 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
9625 {
9626         struct igb_nfc_filter *rule;
9627
9628         spin_lock(&adapter->nfc_lock);
9629
9630         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
9631                 igb_add_filter(adapter, rule);
9632
9633         spin_unlock(&adapter->nfc_lock);
9634 }
9635 /* igb_main.c */