drivers/net/ethernet/intel/igb/igb_main.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/bitops.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/pagemap.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/ipv6.h>
  34 #include <linux/slab.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/net_tstamp.h>
  38 #include <linux/mii.h>
  39 #include <linux/ethtool.h>
  40 #include <linux/if.h>
  41 #include <linux/if_vlan.h>
  42 #include <linux/pci.h>
  43 #include <linux/pci-aspm.h>
  44 #include <linux/delay.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/ip.h>
  47 #include <linux/tcp.h>
  48 #include <linux/sctp.h>
  49 #include <linux/if_ether.h>
  50 #include <linux/aer.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/pm_runtime.h>
  53 #ifdef CONFIG_IGB_DCA
  54 #include <linux/dca.h>
  55 #endif
  56 #include <linux/i2c.h>
  57 #include "igb.h"
  58
  59 #define MAJ 5
  60 #define MIN 3
  61 #define BUILD 0
  62 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  63 __stringify(BUILD) "-k"
  64 char igb_driver_name[] = "igb";
  65 char igb_driver_version[] = DRV_VERSION;
  66 static const char igb_driver_string[] =
  67                                 "Intel(R) Gigabit Ethernet Network Driver";
  68 static const char igb_copyright[] =
  69                                 "Copyright (c) 2007-2014 Intel Corporation.";
  70
  71 static const struct e1000_info *igb_info_tbl[] = {
  72         [board_82575] = &e1000_82575_info,
  73 };
  74
  75 static const struct pci_device_id igb_pci_tbl[] = {
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 111         /* required last entry */
 112         {0, }
 113 };
 114
 115 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 116
 117 static int igb_setup_all_tx_resources(struct igb_adapter *);
 118 static int igb_setup_all_rx_resources(struct igb_adapter *);
 119 static void igb_free_all_tx_resources(struct igb_adapter *);
 120 static void igb_free_all_rx_resources(struct igb_adapter *);
 121 static void igb_setup_mrqc(struct igb_adapter *);
 122 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 123 static void igb_remove(struct pci_dev *pdev);
 124 static int igb_sw_init(struct igb_adapter *);
 125 static int igb_open(struct net_device *);
 126 static int igb_close(struct net_device *);
 127 static void igb_configure(struct igb_adapter *);
 128 static void igb_configure_tx(struct igb_adapter *);
 129 static void igb_configure_rx(struct igb_adapter *);
 130 static void igb_clean_all_tx_rings(struct igb_adapter *);
 131 static void igb_clean_all_rx_rings(struct igb_adapter *);
 132 static void igb_clean_tx_ring(struct igb_ring *);
 133 static void igb_clean_rx_ring(struct igb_ring *);
 134 static void igb_set_rx_mode(struct net_device *);
 135 static void igb_update_phy_info(unsigned long);
 136 static void igb_watchdog(unsigned long);
 137 static void igb_watchdog_task(struct work_struct *);
 138 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 139 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 140                                           struct rtnl_link_stats64 *stats);
 141 static int igb_change_mtu(struct net_device *, int);
 142 static int igb_set_mac(struct net_device *, void *);
 143 static void igb_set_uta(struct igb_adapter *adapter);
 144 static irqreturn_t igb_intr(int irq, void *);
 145 static irqreturn_t igb_intr_msi(int irq, void *);
 146 static irqreturn_t igb_msix_other(int irq, void *);
 147 static irqreturn_t igb_msix_ring(int irq, void *);
 148 #ifdef CONFIG_IGB_DCA
 149 static void igb_update_dca(struct igb_q_vector *);
 150 static void igb_setup_dca(struct igb_adapter *);
 151 #endif /* CONFIG_IGB_DCA */
 152 static int igb_poll(struct napi_struct *, int);
 153 static bool igb_clean_tx_irq(struct igb_q_vector *);
 154 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 155 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 156 static void igb_tx_timeout(struct net_device *);
 157 static void igb_reset_task(struct work_struct *);
 158 static void igb_vlan_mode(struct net_device *netdev,
 159                           netdev_features_t features);
 160 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 161 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 162 static void igb_restore_vlan(struct igb_adapter *);
 163 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 164 static void igb_ping_all_vfs(struct igb_adapter *);
 165 static void igb_msg_task(struct igb_adapter *);
 166 static void igb_vmm_control(struct igb_adapter *);
 167 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 168 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 169 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 170 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 171                                int vf, u16 vlan, u8 qos);
 172 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 173 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 174                                    bool setting);
 175 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 176                                  struct ifla_vf_info *ivi);
 177 static void igb_check_vf_rate_limit(struct igb_adapter *);
 178
 179 #ifdef CONFIG_PCI_IOV
 180 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 181 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 182 static int igb_disable_sriov(struct pci_dev *dev);
 183 static int igb_pci_disable_sriov(struct pci_dev *dev);
 184 #endif
 185
 186 #ifdef CONFIG_PM
 187 #ifdef CONFIG_PM_SLEEP
 188 static int igb_suspend(struct device *);
 189 #endif
 190 static int igb_resume(struct device *);
 191 static int igb_runtime_suspend(struct device *dev);
 192 static int igb_runtime_resume(struct device *dev);
 193 static int igb_runtime_idle(struct device *dev);
 194 static const struct dev_pm_ops igb_pm_ops = {
 195         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 196         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 197                         igb_runtime_idle)
 198 };
 199 #endif
 200 static void igb_shutdown(struct pci_dev *);
 201 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 202 #ifdef CONFIG_IGB_DCA
 203 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 204 static struct notifier_block dca_notifier = {
 205         .notifier_call  = igb_notify_dca,
 206         .next           = NULL,
 207         .priority       = 0
 208 };
 209 #endif
 210 #ifdef CONFIG_NET_POLL_CONTROLLER
 211 /* for netdump / net console */
 212 static void igb_netpoll(struct net_device *);
 213 #endif
 214 #ifdef CONFIG_PCI_IOV
 215 static unsigned int max_vfs;
 216 module_param(max_vfs, uint, 0);
 217 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 218 #endif /* CONFIG_PCI_IOV */
 219
 220 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 221                      pci_channel_state_t);
 222 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 223 static void igb_io_resume(struct pci_dev *);
 224
 225 static const struct pci_error_handlers igb_err_handler = {
 226         .error_detected = igb_io_error_detected,
 227         .slot_reset = igb_io_slot_reset,
 228         .resume = igb_io_resume,
 229 };
 230
 231 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 232
 233 static struct pci_driver igb_driver = {
 234         .name     = igb_driver_name,
 235         .id_table = igb_pci_tbl,
 236         .probe    = igb_probe,
 237         .remove   = igb_remove,
 238 #ifdef CONFIG_PM
 239         .driver.pm = &igb_pm_ops,
 240 #endif
 241         .shutdown = igb_shutdown,
 242         .sriov_configure = igb_pci_sriov_configure,
 243         .err_handler = &igb_err_handler
 244 };
 245
 246 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 247 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 248 MODULE_LICENSE("GPL");
 249 MODULE_VERSION(DRV_VERSION);
 250
 251 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 252 static int debug = -1;
 253 module_param(debug, int, 0);
 254 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 255
 256 struct igb_reg_info {
 257         u32 ofs;
 258         char *name;
 259 };
 260
 261 static const struct igb_reg_info igb_reg_info_tbl[] = {
 262
 263         /* General Registers */
 264         {E1000_CTRL, "CTRL"},
 265         {E1000_STATUS, "STATUS"},
 266         {E1000_CTRL_EXT, "CTRL_EXT"},
 267
 268         /* Interrupt Registers */
 269         {E1000_ICR, "ICR"},
 270
 271         /* RX Registers */
 272         {E1000_RCTL, "RCTL"},
 273         {E1000_RDLEN(0), "RDLEN"},
 274         {E1000_RDH(0), "RDH"},
 275         {E1000_RDT(0), "RDT"},
 276         {E1000_RXDCTL(0), "RXDCTL"},
 277         {E1000_RDBAL(0), "RDBAL"},
 278         {E1000_RDBAH(0), "RDBAH"},
 279
 280         /* TX Registers */
 281         {E1000_TCTL, "TCTL"},
 282         {E1000_TDBAL(0), "TDBAL"},
 283         {E1000_TDBAH(0), "TDBAH"},
 284         {E1000_TDLEN(0), "TDLEN"},
 285         {E1000_TDH(0), "TDH"},
 286         {E1000_TDT(0), "TDT"},
 287         {E1000_TXDCTL(0), "TXDCTL"},
 288         {E1000_TDFH, "TDFH"},
 289         {E1000_TDFT, "TDFT"},
 290         {E1000_TDFHS, "TDFHS"},
 291         {E1000_TDFPC, "TDFPC"},
 292
 293         /* List Terminator */
 294         {}
 295 };
 296
 297 /* igb_regdump - register printout routine */
 298 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 299 {
 300         int n = 0;
 301         char rname[16];
 302         u32 regs[8];
 303
 304         switch (reginfo->ofs) {
 305         case E1000_RDLEN(0):
 306                 for (n = 0; n < 4; n++)
 307                         regs[n] = rd32(E1000_RDLEN(n));
 308                 break;
 309         case E1000_RDH(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDH(n));
 312                 break;
 313         case E1000_RDT(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDT(n));
 316                 break;
 317         case E1000_RXDCTL(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_RXDCTL(n));
 320                 break;
 321         case E1000_RDBAL(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_RDBAL(n));
 324                 break;
 325         case E1000_RDBAH(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_RDBAH(n));
 328                 break;
 329         case E1000_TDBAL(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_RDBAL(n));
 332                 break;
 333         case E1000_TDBAH(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_TDBAH(n));
 336                 break;
 337         case E1000_TDLEN(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TDLEN(n));
 340                 break;
 341         case E1000_TDH(0):
 342                 for (n = 0; n < 4; n++)
 343                         regs[n] = rd32(E1000_TDH(n));
 344                 break;
 345         case E1000_TDT(0):
 346                 for (n = 0; n < 4; n++)
 347                         regs[n] = rd32(E1000_TDT(n));
 348                 break;
 349         case E1000_TXDCTL(0):
 350                 for (n = 0; n < 4; n++)
 351                         regs[n] = rd32(E1000_TXDCTL(n));
 352                 break;
 353         default:
 354                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 355                 return;
 356         }
 357
 358         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 359         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 360                 regs[2], regs[3]);
 361 }
 362
 363 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 364 static void igb_dump(struct igb_adapter *adapter)
 365 {
 366         struct net_device *netdev = adapter->netdev;
 367         struct e1000_hw *hw = &adapter->hw;
 368         struct igb_reg_info *reginfo;
 369         struct igb_ring *tx_ring;
 370         union e1000_adv_tx_desc *tx_desc;
 371         struct my_u0 { u64 a; u64 b; } *u0;
 372         struct igb_ring *rx_ring;
 373         union e1000_adv_rx_desc *rx_desc;
 374         u32 staterr;
 375         u16 i, n;
 376
 377         if (!netif_msg_hw(adapter))
 378                 return;
 379
 380         /* Print netdevice Info */
 381         if (netdev) {
 382                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 383                 pr_info("Device Name     state            trans_start      last_rx\n");
 384                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 385                         netdev->state, netdev->trans_start, netdev->last_rx);
 386         }
 387
 388         /* Print Registers */
 389         dev_info(&adapter->pdev->dev, "Register Dump\n");
 390         pr_info(" Register Name   Value\n");
 391         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 392              reginfo->name; reginfo++) {
 393                 igb_regdump(hw, reginfo);
 394         }
 395
 396         /* Print TX Ring Summary */
 397         if (!netdev || !netif_running(netdev))
 398                 goto exit;
 399
 400         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 401         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 402         for (n = 0; n < adapter->num_tx_queues; n++) {
 403                 struct igb_tx_buffer *buffer_info;
 404                 tx_ring = adapter->tx_ring[n];
 405                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 406                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 407                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 408                         (u64)dma_unmap_addr(buffer_info, dma),
 409                         dma_unmap_len(buffer_info, len),
 410                         buffer_info->next_to_watch,
 411                         (u64)buffer_info->time_stamp);
 412         }
 413
 414         /* Print TX Rings */
 415         if (!netif_msg_tx_done(adapter))
 416                 goto rx_ring_summary;
 417
 418         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 419
 420         /* Transmit Descriptor Formats
 421          *
 422          * Advanced Transmit Descriptor
 423          *   +--------------------------------------------------------------+
 424          * 0 |         Buffer Address [63:0]                                |
 425          *   +--------------------------------------------------------------+
 426          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 427          *   +--------------------------------------------------------------+
 428          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 429          */
 430
 431         for (n = 0; n < adapter->num_tx_queues; n++) {
 432                 tx_ring = adapter->tx_ring[n];
 433                 pr_info("------------------------------------\n");
 434                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 435                 pr_info("------------------------------------\n");
 436                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 437
 438                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 439                         const char *next_desc;
 440                         struct igb_tx_buffer *buffer_info;
 441                         tx_desc = IGB_TX_DESC(tx_ring, i);
 442                         buffer_info = &tx_ring->tx_buffer_info[i];
 443                         u0 = (struct my_u0 *)tx_desc;
 444                         if (i == tx_ring->next_to_use &&
 445                             i == tx_ring->next_to_clean)
 446                                 next_desc = " NTC/U";
 447                         else if (i == tx_ring->next_to_use)
 448                                 next_desc = " NTU";
 449                         else if (i == tx_ring->next_to_clean)
 450                                 next_desc = " NTC";
 451                         else
 452                                 next_desc = "";
 453
 454                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 455                                 i, le64_to_cpu(u0->a),
 456                                 le64_to_cpu(u0->b),
 457                                 (u64)dma_unmap_addr(buffer_info, dma),
 458                                 dma_unmap_len(buffer_info, len),
 459                                 buffer_info->next_to_watch,
 460                                 (u64)buffer_info->time_stamp,
 461                                 buffer_info->skb, next_desc);
 462
 463                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 464                                 print_hex_dump(KERN_INFO, "",
 465                                         DUMP_PREFIX_ADDRESS,
 466                                         16, 1, buffer_info->skb->data,
 467                                         dma_unmap_len(buffer_info, len),
 468                                         true);
 469                 }
 470         }
 471
 472         /* Print RX Rings Summary */
 473 rx_ring_summary:
 474         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 475         pr_info("Queue [NTU] [NTC]\n");
 476         for (n = 0; n < adapter->num_rx_queues; n++) {
 477                 rx_ring = adapter->rx_ring[n];
 478                 pr_info(" %5d %5X %5X\n",
 479                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 480         }
 481
 482         /* Print RX Rings */
 483         if (!netif_msg_rx_status(adapter))
 484                 goto exit;
 485
 486         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 487
 488         /* Advanced Receive Descriptor (Read) Format
 489          *    63                                           1        0
 490          *    +-----------------------------------------------------+
 491          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 492          *    +----------------------------------------------+------+
 493          *  8 |       Header Buffer Address [63:1]           |  DD  |
 494          *    +-----------------------------------------------------+
 495          *
 496          *
 497          * Advanced Receive Descriptor (Write-Back) Format
 498          *
 499          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 500          *   +------------------------------------------------------+
 501          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 502          *   | Checksum   Ident  |   |           |    | Type | Type |
 503          *   +------------------------------------------------------+
 504          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 505          *   +------------------------------------------------------+
 506          *   63       48 47    32 31            20 19               0
 507          */
 508
 509         for (n = 0; n < adapter->num_rx_queues; n++) {
 510                 rx_ring = adapter->rx_ring[n];
 511                 pr_info("------------------------------------\n");
 512                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 513                 pr_info("------------------------------------\n");
 514                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 515                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 516
 517                 for (i = 0; i < rx_ring->count; i++) {
 518                         const char *next_desc;
 519                         struct igb_rx_buffer *buffer_info;
 520                         buffer_info = &rx_ring->rx_buffer_info[i];
 521                         rx_desc = IGB_RX_DESC(rx_ring, i);
 522                         u0 = (struct my_u0 *)rx_desc;
 523                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 524
 525                         if (i == rx_ring->next_to_use)
 526                                 next_desc = " NTU";
 527                         else if (i == rx_ring->next_to_clean)
 528                                 next_desc = " NTC";
 529                         else
 530                                 next_desc = "";
 531
 532                         if (staterr & E1000_RXD_STAT_DD) {
 533                                 /* Descriptor Done */
 534                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 535                                         "RWB", i,
 536                                         le64_to_cpu(u0->a),
 537                                         le64_to_cpu(u0->b),
 538                                         next_desc);
 539                         } else {
 540                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 541                                         "R  ", i,
 542                                         le64_to_cpu(u0->a),
 543                                         le64_to_cpu(u0->b),
 544                                         (u64)buffer_info->dma,
 545                                         next_desc);
 546
 547                                 if (netif_msg_pktdata(adapter) &&
 548                                     buffer_info->dma && buffer_info->page) {
 549                                         print_hex_dump(KERN_INFO, "",
 550                                           DUMP_PREFIX_ADDRESS,
 551                                           16, 1,
 552                                           page_address(buffer_info->page) +
 553                                                       buffer_info->page_offset,
 554                                           IGB_RX_BUFSZ, true);
 555                                 }
 556                         }
 557                 }
 558         }
 559
 560 exit:
 561         return;
 562 }
 563
 564 /**
 565  *  igb_get_i2c_data - Reads the I2C SDA data bit
 566  *  @hw: pointer to hardware structure
 567  *  @i2cctl: Current value of I2CCTL register
 568  *
 569  *  Returns the I2C data bit value
 570  **/
 571 static int igb_get_i2c_data(void *data)
 572 {
 573         struct igb_adapter *adapter = (struct igb_adapter *)data;
 574         struct e1000_hw *hw = &adapter->hw;
 575         s32 i2cctl = rd32(E1000_I2CPARAMS);
 576
 577         return !!(i2cctl & E1000_I2C_DATA_IN);
 578 }
 579
 580 /**
 581  *  igb_set_i2c_data - Sets the I2C data bit
 582  *  @data: pointer to hardware structure
 583  *  @state: I2C data value (0 or 1) to set
 584  *
 585  *  Sets the I2C data bit
 586  **/
 587 static void igb_set_i2c_data(void *data, int state)
 588 {
 589         struct igb_adapter *adapter = (struct igb_adapter *)data;
 590         struct e1000_hw *hw = &adapter->hw;
 591         s32 i2cctl = rd32(E1000_I2CPARAMS);
 592
 593         if (state)
 594                 i2cctl |= E1000_I2C_DATA_OUT;
 595         else
 596                 i2cctl &= ~E1000_I2C_DATA_OUT;
 597
 598         i2cctl &= ~E1000_I2C_DATA_OE_N;
 599         i2cctl |= E1000_I2C_CLK_OE_N;
 600         wr32(E1000_I2CPARAMS, i2cctl);
 601         wrfl();
 602
 603 }
 604
 605 /**
 606  *  igb_set_i2c_clk - Sets the I2C SCL clock
 607  *  @data: pointer to hardware structure
 608  *  @state: state to set clock
 609  *
 610  *  Sets the I2C clock line to state
 611  **/
 612 static void igb_set_i2c_clk(void *data, int state)
 613 {
 614         struct igb_adapter *adapter = (struct igb_adapter *)data;
 615         struct e1000_hw *hw = &adapter->hw;
 616         s32 i2cctl = rd32(E1000_I2CPARAMS);
 617
 618         if (state) {
 619                 i2cctl |= E1000_I2C_CLK_OUT;
 620                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 621         } else {
 622                 i2cctl &= ~E1000_I2C_CLK_OUT;
 623                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 624         }
 625         wr32(E1000_I2CPARAMS, i2cctl);
 626         wrfl();
 627 }
 628
 629 /**
 630  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 631  *  @data: pointer to hardware structure
 632  *
 633  *  Gets the I2C clock state
 634  **/
 635 static int igb_get_i2c_clk(void *data)
 636 {
 637         struct igb_adapter *adapter = (struct igb_adapter *)data;
 638         struct e1000_hw *hw = &adapter->hw;
 639         s32 i2cctl = rd32(E1000_I2CPARAMS);
 640
 641         return !!(i2cctl & E1000_I2C_CLK_IN);
 642 }
 643
 644 static const struct i2c_algo_bit_data igb_i2c_algo = {
 645         .setsda         = igb_set_i2c_data,
 646         .setscl         = igb_set_i2c_clk,
 647         .getsda         = igb_get_i2c_data,
 648         .getscl         = igb_get_i2c_clk,
 649         .udelay         = 5,
 650         .timeout        = 20,
 651 };
 652
 653 /**
 654  *  igb_get_hw_dev - return device
 655  *  @hw: pointer to hardware structure
 656  *
 657  *  used by hardware layer to print debugging information
 658  **/
 659 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 660 {
 661         struct igb_adapter *adapter = hw->back;
 662         return adapter->netdev;
 663 }
 664
 665 /**
 666  *  igb_init_module - Driver Registration Routine
 667  *
 668  *  igb_init_module is the first routine called when the driver is
 669  *  loaded. All it does is register with the PCI subsystem.
 670  **/
 671 static int __init igb_init_module(void)
 672 {
 673         int ret;
 674
 675         pr_info("%s - version %s\n",
 676                igb_driver_string, igb_driver_version);
 677         pr_info("%s\n", igb_copyright);
 678
 679 #ifdef CONFIG_IGB_DCA
 680         dca_register_notify(&dca_notifier);
 681 #endif
 682         ret = pci_register_driver(&igb_driver);
 683         return ret;
 684 }
 685
 686 module_init(igb_init_module);
 687
 688 /**
 689  *  igb_exit_module - Driver Exit Cleanup Routine
 690  *
 691  *  igb_exit_module is called just before the driver is removed
 692  *  from memory.
 693  **/
 694 static void __exit igb_exit_module(void)
 695 {
 696 #ifdef CONFIG_IGB_DCA
 697         dca_unregister_notify(&dca_notifier);
 698 #endif
 699         pci_unregister_driver(&igb_driver);
 700 }
 701
 702 module_exit(igb_exit_module);
 703
 704 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 705 /**
 706  *  igb_cache_ring_register - Descriptor ring to register mapping
 707  *  @adapter: board private structure to initialize
 708  *
 709  *  Once we know the feature-set enabled for the device, we'll cache
 710  *  the register offset the descriptor ring is assigned to.
 711  **/
 712 static void igb_cache_ring_register(struct igb_adapter *adapter)
 713 {
 714         int i = 0, j = 0;
 715         u32 rbase_offset = adapter->vfs_allocated_count;
 716
 717         switch (adapter->hw.mac.type) {
 718         case e1000_82576:
 719                 /* The queues are allocated for virtualization such that VF 0
 720                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 721                  * In order to avoid collision we start at the first free queue
 722                  * and continue consuming queues in the same sequence
 723                  */
 724                 if (adapter->vfs_allocated_count) {
 725                         for (; i < adapter->rss_queues; i++)
 726                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 727                                                                Q_IDX_82576(i);
 728                 }
 729                 /* Fall through */
 730         case e1000_82575:
 731         case e1000_82580:
 732         case e1000_i350:
 733         case e1000_i354:
 734         case e1000_i210:
 735         case e1000_i211:
 736                 /* Fall through */
 737         default:
 738                 for (; i < adapter->num_rx_queues; i++)
 739                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 740                 for (; j < adapter->num_tx_queues; j++)
 741                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 742                 break;
 743         }
 744 }
 745
 746 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 747 {
 748         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 749         u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
 750         u32 value = 0;
 751
 752         if (E1000_REMOVED(hw_addr))
 753                 return ~value;
 754
 755         value = readl(&hw_addr[reg]);
 756
 757         /* reads should not return all F's */
 758         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 759                 struct net_device *netdev = igb->netdev;
 760                 hw->hw_addr = NULL;
 761                 netif_device_detach(netdev);
 762                 netdev_err(netdev, "PCIe link lost, device now detached\n");
 763         }
 764
 765         return value;
 766 }
 767
 768 /**
 769  *  igb_write_ivar - configure ivar for given MSI-X vector
 770  *  @hw: pointer to the HW structure
 771  *  @msix_vector: vector number we are allocating to a given ring
 772  *  @index: row index of IVAR register to write within IVAR table
 773  *  @offset: column offset of in IVAR, should be multiple of 8
 774  *
 775  *  This function is intended to handle the writing of the IVAR register
 776  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 777  *  each containing an cause allocation for an Rx and Tx ring, and a
 778  *  variable number of rows depending on the number of queues supported.
 779  **/
 780 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 781                            int index, int offset)
 782 {
 783         u32 ivar = array_rd32(E1000_IVAR0, index);
 784
 785         /* clear any bits that are currently set */
 786         ivar &= ~((u32)0xFF << offset);
 787
 788         /* write vector and valid bit */
 789         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 790
 791         array_wr32(E1000_IVAR0, index, ivar);
 792 }
 793
 794 #define IGB_N0_QUEUE -1
 795 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 796 {
 797         struct igb_adapter *adapter = q_vector->adapter;
 798         struct e1000_hw *hw = &adapter->hw;
 799         int rx_queue = IGB_N0_QUEUE;
 800         int tx_queue = IGB_N0_QUEUE;
 801         u32 msixbm = 0;
 802
 803         if (q_vector->rx.ring)
 804                 rx_queue = q_vector->rx.ring->reg_idx;
 805         if (q_vector->tx.ring)
 806                 tx_queue = q_vector->tx.ring->reg_idx;
 807
 808         switch (hw->mac.type) {
 809         case e1000_82575:
 810                 /* The 82575 assigns vectors using a bitmask, which matches the
 811                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 812                  * or more queues to a vector, we write the appropriate bits
 813                  * into the MSIXBM register for that vector.
 814                  */
 815                 if (rx_queue > IGB_N0_QUEUE)
 816                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 817                 if (tx_queue > IGB_N0_QUEUE)
 818                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 819                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 820                         msixbm |= E1000_EIMS_OTHER;
 821                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 822                 q_vector->eims_value = msixbm;
 823                 break;
 824         case e1000_82576:
 825                 /* 82576 uses a table that essentially consists of 2 columns
 826                  * with 8 rows.  The ordering is column-major so we use the
 827                  * lower 3 bits as the row index, and the 4th bit as the
 828                  * column offset.
 829                  */
 830                 if (rx_queue > IGB_N0_QUEUE)
 831                         igb_write_ivar(hw, msix_vector,
 832                                        rx_queue & 0x7,
 833                                        (rx_queue & 0x8) << 1);
 834                 if (tx_queue > IGB_N0_QUEUE)
 835                         igb_write_ivar(hw, msix_vector,
 836                                        tx_queue & 0x7,
 837                                        ((tx_queue & 0x8) << 1) + 8);
 838                 q_vector->eims_value = 1 << msix_vector;
 839                 break;
 840         case e1000_82580:
 841         case e1000_i350:
 842         case e1000_i354:
 843         case e1000_i210:
 844         case e1000_i211:
 845                 /* On 82580 and newer adapters the scheme is similar to 82576
 846                  * however instead of ordering column-major we have things
 847                  * ordered row-major.  So we traverse the table by using
 848                  * bit 0 as the column offset, and the remaining bits as the
 849                  * row index.
 850                  */
 851                 if (rx_queue > IGB_N0_QUEUE)
 852                         igb_write_ivar(hw, msix_vector,
 853                                        rx_queue >> 1,
 854                                        (rx_queue & 0x1) << 4);
 855                 if (tx_queue > IGB_N0_QUEUE)
 856                         igb_write_ivar(hw, msix_vector,
 857                                        tx_queue >> 1,
 858                                        ((tx_queue & 0x1) << 4) + 8);
 859                 q_vector->eims_value = 1 << msix_vector;
 860                 break;
 861         default:
 862                 BUG();
 863                 break;
 864         }
 865
 866         /* add q_vector eims value to global eims_enable_mask */
 867         adapter->eims_enable_mask |= q_vector->eims_value;
 868
 869         /* configure q_vector to set itr on first interrupt */
 870         q_vector->set_itr = 1;
 871 }
 872
 873 /**
 874  *  igb_configure_msix - Configure MSI-X hardware
 875  *  @adapter: board private structure to initialize
 876  *
 877  *  igb_configure_msix sets up the hardware to properly
 878  *  generate MSI-X interrupts.
 879  **/
 880 static void igb_configure_msix(struct igb_adapter *adapter)
 881 {
 882         u32 tmp;
 883         int i, vector = 0;
 884         struct e1000_hw *hw = &adapter->hw;
 885
 886         adapter->eims_enable_mask = 0;
 887
 888         /* set vector for other causes, i.e. link changes */
 889         switch (hw->mac.type) {
 890         case e1000_82575:
 891                 tmp = rd32(E1000_CTRL_EXT);
 892                 /* enable MSI-X PBA support*/
 893                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 894
 895                 /* Auto-Mask interrupts upon ICR read. */
 896                 tmp |= E1000_CTRL_EXT_EIAME;
 897                 tmp |= E1000_CTRL_EXT_IRCA;
 898
 899                 wr32(E1000_CTRL_EXT, tmp);
 900
 901                 /* enable msix_other interrupt */
 902                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 903                 adapter->eims_other = E1000_EIMS_OTHER;
 904
 905                 break;
 906
 907         case e1000_82576:
 908         case e1000_82580:
 909         case e1000_i350:
 910         case e1000_i354:
 911         case e1000_i210:
 912         case e1000_i211:
 913                 /* Turn on MSI-X capability first, or our settings
 914                  * won't stick.  And it will take days to debug.
 915                  */
 916                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 917                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 918                      E1000_GPIE_NSICR);
 919
 920                 /* enable msix_other interrupt */
 921                 adapter->eims_other = 1 << vector;
 922                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 923
 924                 wr32(E1000_IVAR_MISC, tmp);
 925                 break;
 926         default:
 927                 /* do nothing, since nothing else supports MSI-X */
 928                 break;
 929         } /* switch (hw->mac.type) */
 930
 931         adapter->eims_enable_mask |= adapter->eims_other;
 932
 933         for (i = 0; i < adapter->num_q_vectors; i++)
 934                 igb_assign_vector(adapter->q_vector[i], vector++);
 935
 936         wrfl();
 937 }
 938
 939 /**
 940  *  igb_request_msix - Initialize MSI-X interrupts
 941  *  @adapter: board private structure to initialize
 942  *
 943  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 944  *  kernel.
 945  **/
 946 static int igb_request_msix(struct igb_adapter *adapter)
 947 {
 948         unsigned int num_q_vectors = adapter->num_q_vectors;
 949         struct net_device *netdev = adapter->netdev;
 950         int i, err = 0, vector = 0, free_vector = 0;
 951
 952         err = request_irq(adapter->msix_entries[vector].vector,
 953                           igb_msix_other, 0, netdev->name, adapter);
 954         if (err)
 955                 goto err_out;
 956
 957         if (num_q_vectors > MAX_Q_VECTORS) {
 958                 num_q_vectors = MAX_Q_VECTORS;
 959                 dev_warn(&adapter->pdev->dev,
 960                          "The number of queue vectors (%d) is higher than max allowed (%d)\n",
 961                          adapter->num_q_vectors, MAX_Q_VECTORS);
 962         }
 963         for (i = 0; i < num_q_vectors; i++) {
 964                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 965
 966                 vector++;
 967
 968                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 969
 970                 if (q_vector->rx.ring && q_vector->tx.ring)
 971                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 972                                 q_vector->rx.ring->queue_index);
 973                 else if (q_vector->tx.ring)
 974                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 975                                 q_vector->tx.ring->queue_index);
 976                 else if (q_vector->rx.ring)
 977                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 978                                 q_vector->rx.ring->queue_index);
 979                 else
 980                         sprintf(q_vector->name, "%s-unused", netdev->name);
 981
 982                 err = request_irq(adapter->msix_entries[vector].vector,
 983                                   igb_msix_ring, 0, q_vector->name,
 984                                   q_vector);
 985                 if (err)
 986                         goto err_free;
 987         }
 988
 989         igb_configure_msix(adapter);
 990         return 0;
 991
 992 err_free:
 993         /* free already assigned IRQs */
 994         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 995
 996         vector--;
 997         for (i = 0; i < vector; i++) {
 998                 free_irq(adapter->msix_entries[free_vector++].vector,
 999                          adapter->q_vector[i]);
1000         }
1001 err_out:
1002         return err;
1003 }
1004
1005 /**
1006  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1007  *  @adapter: board private structure to initialize
1008  *  @v_idx: Index of vector to be freed
1009  *
1010  *  This function frees the memory allocated to the q_vector.
1011  **/
1012 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1013 {
1014         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1015
1016         adapter->q_vector[v_idx] = NULL;
1017
1018         /* igb_get_stats64() might access the rings on this vector,
1019          * we must wait a grace period before freeing it.
1020          */
1021         if (q_vector)
1022                 kfree_rcu(q_vector, rcu);
1023 }
1024
1025 /**
1026  *  igb_reset_q_vector - Reset config for interrupt vector
1027  *  @adapter: board private structure to initialize
1028  *  @v_idx: Index of vector to be reset
1029  *
1030  *  If NAPI is enabled it will delete any references to the
1031  *  NAPI struct. This is preparation for igb_free_q_vector.
1032  **/
1033 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1034 {
1035         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1036
1037         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1038          * allocated. So, q_vector is NULL so we should stop here.
1039          */
1040         if (!q_vector)
1041                 return;
1042
1043         if (q_vector->tx.ring)
1044                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1045
1046         if (q_vector->rx.ring)
1047                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1048
1049         netif_napi_del(&q_vector->napi);
1050
1051 }
1052
1053 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1054 {
1055         int v_idx = adapter->num_q_vectors;
1056
1057         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1058                 pci_disable_msix(adapter->pdev);
1059         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1060                 pci_disable_msi(adapter->pdev);
1061
1062         while (v_idx--)
1063                 igb_reset_q_vector(adapter, v_idx);
1064 }
1065
1066 /**
1067  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1068  *  @adapter: board private structure to initialize
1069  *
1070  *  This function frees the memory allocated to the q_vectors.  In addition if
1071  *  NAPI is enabled it will delete any references to the NAPI struct prior
1072  *  to freeing the q_vector.
1073  **/
1074 static void igb_free_q_vectors(struct igb_adapter *adapter)
1075 {
1076         int v_idx = adapter->num_q_vectors;
1077
1078         adapter->num_tx_queues = 0;
1079         adapter->num_rx_queues = 0;
1080         adapter->num_q_vectors = 0;
1081
1082         while (v_idx--) {
1083                 igb_reset_q_vector(adapter, v_idx);
1084                 igb_free_q_vector(adapter, v_idx);
1085         }
1086 }
1087
1088 /**
1089  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1090  *  @adapter: board private structure to initialize
1091  *
1092  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1093  *  MSI-X interrupts allocated.
1094  */
1095 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1096 {
1097         igb_free_q_vectors(adapter);
1098         igb_reset_interrupt_capability(adapter);
1099 }
1100
1101 /**
1102  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1103  *  @adapter: board private structure to initialize
1104  *  @msix: boolean value of MSIX capability
1105  *
1106  *  Attempt to configure interrupts using the best available
1107  *  capabilities of the hardware and kernel.
1108  **/
1109 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1110 {
1111         int err;
1112         int numvecs, i;
1113
1114         if (!msix)
1115                 goto msi_only;
1116         adapter->flags |= IGB_FLAG_HAS_MSIX;
1117
1118         /* Number of supported queues. */
1119         adapter->num_rx_queues = adapter->rss_queues;
1120         if (adapter->vfs_allocated_count)
1121                 adapter->num_tx_queues = 1;
1122         else
1123                 adapter->num_tx_queues = adapter->rss_queues;
1124
1125         /* start with one vector for every Rx queue */
1126         numvecs = adapter->num_rx_queues;
1127
1128         /* if Tx handler is separate add 1 for every Tx queue */
1129         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1130                 numvecs += adapter->num_tx_queues;
1131
1132         /* store the number of vectors reserved for queues */
1133         adapter->num_q_vectors = numvecs;
1134
1135         /* add 1 vector for link status interrupts */
1136         numvecs++;
1137         for (i = 0; i < numvecs; i++)
1138                 adapter->msix_entries[i].entry = i;
1139
1140         err = pci_enable_msix_range(adapter->pdev,
1141                                     adapter->msix_entries,
1142                                     numvecs,
1143                                     numvecs);
1144         if (err > 0)
1145                 return;
1146
1147         igb_reset_interrupt_capability(adapter);
1148
1149         /* If we can't do MSI-X, try MSI */
1150 msi_only:
1151         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1152 #ifdef CONFIG_PCI_IOV
1153         /* disable SR-IOV for non MSI-X configurations */
1154         if (adapter->vf_data) {
1155                 struct e1000_hw *hw = &adapter->hw;
1156                 /* disable iov and allow time for transactions to clear */
1157                 pci_disable_sriov(adapter->pdev);
1158                 msleep(500);
1159
1160                 kfree(adapter->vf_data);
1161                 adapter->vf_data = NULL;
1162                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1163                 wrfl();
1164                 msleep(100);
1165                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1166         }
1167 #endif
1168         adapter->vfs_allocated_count = 0;
1169         adapter->rss_queues = 1;
1170         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1171         adapter->num_rx_queues = 1;
1172         adapter->num_tx_queues = 1;
1173         adapter->num_q_vectors = 1;
1174         if (!pci_enable_msi(adapter->pdev))
1175                 adapter->flags |= IGB_FLAG_HAS_MSI;
1176 }
1177
1178 static void igb_add_ring(struct igb_ring *ring,
1179                          struct igb_ring_container *head)
1180 {
1181         head->ring = ring;
1182         head->count++;
1183 }
1184
1185 /**
1186  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1187  *  @adapter: board private structure to initialize
1188  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1189  *  @v_idx: index of vector in adapter struct
1190  *  @txr_count: total number of Tx rings to allocate
1191  *  @txr_idx: index of first Tx ring to allocate
1192  *  @rxr_count: total number of Rx rings to allocate
1193  *  @rxr_idx: index of first Rx ring to allocate
1194  *
1195  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1196  **/
1197 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1198                               int v_count, int v_idx,
1199                               int txr_count, int txr_idx,
1200                               int rxr_count, int rxr_idx)
1201 {
1202         struct igb_q_vector *q_vector;
1203         struct igb_ring *ring;
1204         int ring_count, size;
1205
1206         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1207         if (txr_count > 1 || rxr_count > 1)
1208                 return -ENOMEM;
1209
1210         ring_count = txr_count + rxr_count;
1211         size = sizeof(struct igb_q_vector) +
1212                (sizeof(struct igb_ring) * ring_count);
1213
1214         /* allocate q_vector and rings */
1215         q_vector = adapter->q_vector[v_idx];
1216         if (!q_vector) {
1217                 q_vector = kzalloc(size, GFP_KERNEL);
1218         } else if (size > ksize(q_vector)) {
1219                 kfree_rcu(q_vector, rcu);
1220                 q_vector = kzalloc(size, GFP_KERNEL);
1221         } else {
1222                 memset(q_vector, 0, size);
1223         }
1224         if (!q_vector)
1225                 return -ENOMEM;
1226
1227         /* initialize NAPI */
1228         netif_napi_add(adapter->netdev, &q_vector->napi,
1229                        igb_poll, 64);
1230
1231         /* tie q_vector and adapter together */
1232         adapter->q_vector[v_idx] = q_vector;
1233         q_vector->adapter = adapter;
1234
1235         /* initialize work limits */
1236         q_vector->tx.work_limit = adapter->tx_work_limit;
1237
1238         /* initialize ITR configuration */
1239         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1240         q_vector->itr_val = IGB_START_ITR;
1241
1242         /* initialize pointer to rings */
1243         ring = q_vector->ring;
1244
1245         /* intialize ITR */
1246         if (rxr_count) {
1247                 /* rx or rx/tx vector */
1248                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1249                         q_vector->itr_val = adapter->rx_itr_setting;
1250         } else {
1251                 /* tx only vector */
1252                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1253                         q_vector->itr_val = adapter->tx_itr_setting;
1254         }
1255
1256         if (txr_count) {
1257                 /* assign generic ring traits */
1258                 ring->dev = &adapter->pdev->dev;
1259                 ring->netdev = adapter->netdev;
1260
1261                 /* configure backlink on ring */
1262                 ring->q_vector = q_vector;
1263
1264                 /* update q_vector Tx values */
1265                 igb_add_ring(ring, &q_vector->tx);
1266
1267                 /* For 82575, context index must be unique per ring. */
1268                 if (adapter->hw.mac.type == e1000_82575)
1269                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1270
1271                 /* apply Tx specific ring traits */
1272                 ring->count = adapter->tx_ring_count;
1273                 ring->queue_index = txr_idx;
1274
1275                 u64_stats_init(&ring->tx_syncp);
1276                 u64_stats_init(&ring->tx_syncp2);
1277
1278                 /* assign ring to adapter */
1279                 adapter->tx_ring[txr_idx] = ring;
1280
1281                 /* push pointer to next ring */
1282                 ring++;
1283         }
1284
1285         if (rxr_count) {
1286                 /* assign generic ring traits */
1287                 ring->dev = &adapter->pdev->dev;
1288                 ring->netdev = adapter->netdev;
1289
1290                 /* configure backlink on ring */
1291                 ring->q_vector = q_vector;
1292
1293                 /* update q_vector Rx values */
1294                 igb_add_ring(ring, &q_vector->rx);
1295
1296                 /* set flag indicating ring supports SCTP checksum offload */
1297                 if (adapter->hw.mac.type >= e1000_82576)
1298                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1299
1300                 /* On i350, i354, i210, and i211, loopback VLAN packets
1301                  * have the tag byte-swapped.
1302                  */
1303                 if (adapter->hw.mac.type >= e1000_i350)
1304                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1305
1306                 /* apply Rx specific ring traits */
1307                 ring->count = adapter->rx_ring_count;
1308                 ring->queue_index = rxr_idx;
1309
1310                 u64_stats_init(&ring->rx_syncp);
1311
1312                 /* assign ring to adapter */
1313                 adapter->rx_ring[rxr_idx] = ring;
1314         }
1315
1316         return 0;
1317 }
1318
1319
1320 /**
1321  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1322  *  @adapter: board private structure to initialize
1323  *
1324  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1325  *  return -ENOMEM.
1326  **/
1327 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1328 {
1329         int q_vectors = adapter->num_q_vectors;
1330         int rxr_remaining = adapter->num_rx_queues;
1331         int txr_remaining = adapter->num_tx_queues;
1332         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1333         int err;
1334
1335         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1336                 for (; rxr_remaining; v_idx++) {
1337                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1338                                                  0, 0, 1, rxr_idx);
1339
1340                         if (err)
1341                                 goto err_out;
1342
1343                         /* update counts and index */
1344                         rxr_remaining--;
1345                         rxr_idx++;
1346                 }
1347         }
1348
1349         for (; v_idx < q_vectors; v_idx++) {
1350                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1351                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1352
1353                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1354                                          tqpv, txr_idx, rqpv, rxr_idx);
1355
1356                 if (err)
1357                         goto err_out;
1358
1359                 /* update counts and index */
1360                 rxr_remaining -= rqpv;
1361                 txr_remaining -= tqpv;
1362                 rxr_idx++;
1363                 txr_idx++;
1364         }
1365
1366         return 0;
1367
1368 err_out:
1369         adapter->num_tx_queues = 0;
1370         adapter->num_rx_queues = 0;
1371         adapter->num_q_vectors = 0;
1372
1373         while (v_idx--)
1374                 igb_free_q_vector(adapter, v_idx);
1375
1376         return -ENOMEM;
1377 }
1378
1379 /**
1380  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1381  *  @adapter: board private structure to initialize
1382  *  @msix: boolean value of MSIX capability
1383  *
1384  *  This function initializes the interrupts and allocates all of the queues.
1385  **/
1386 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1387 {
1388         struct pci_dev *pdev = adapter->pdev;
1389         int err;
1390
1391         igb_set_interrupt_capability(adapter, msix);
1392
1393         err = igb_alloc_q_vectors(adapter);
1394         if (err) {
1395                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1396                 goto err_alloc_q_vectors;
1397         }
1398
1399         igb_cache_ring_register(adapter);
1400
1401         return 0;
1402
1403 err_alloc_q_vectors:
1404         igb_reset_interrupt_capability(adapter);
1405         return err;
1406 }
1407
1408 /**
1409  *  igb_request_irq - initialize interrupts
1410  *  @adapter: board private structure to initialize
1411  *
1412  *  Attempts to configure interrupts using the best available
1413  *  capabilities of the hardware and kernel.
1414  **/
1415 static int igb_request_irq(struct igb_adapter *adapter)
1416 {
1417         struct net_device *netdev = adapter->netdev;
1418         struct pci_dev *pdev = adapter->pdev;
1419         int err = 0;
1420
1421         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1422                 err = igb_request_msix(adapter);
1423                 if (!err)
1424                         goto request_done;
1425                 /* fall back to MSI */
1426                 igb_free_all_tx_resources(adapter);
1427                 igb_free_all_rx_resources(adapter);
1428
1429                 igb_clear_interrupt_scheme(adapter);
1430                 err = igb_init_interrupt_scheme(adapter, false);
1431                 if (err)
1432                         goto request_done;
1433
1434                 igb_setup_all_tx_resources(adapter);
1435                 igb_setup_all_rx_resources(adapter);
1436                 igb_configure(adapter);
1437         }
1438
1439         igb_assign_vector(adapter->q_vector[0], 0);
1440
1441         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1442                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1443                                   netdev->name, adapter);
1444                 if (!err)
1445                         goto request_done;
1446
1447                 /* fall back to legacy interrupts */
1448                 igb_reset_interrupt_capability(adapter);
1449                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1450         }
1451
1452         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1453                           netdev->name, adapter);
1454
1455         if (err)
1456                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1457                         err);
1458
1459 request_done:
1460         return err;
1461 }
1462
1463 static void igb_free_irq(struct igb_adapter *adapter)
1464 {
1465         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1466                 int vector = 0, i;
1467
1468                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1469
1470                 for (i = 0; i < adapter->num_q_vectors; i++)
1471                         free_irq(adapter->msix_entries[vector++].vector,
1472                                  adapter->q_vector[i]);
1473         } else {
1474                 free_irq(adapter->pdev->irq, adapter);
1475         }
1476 }
1477
1478 /**
1479  *  igb_irq_disable - Mask off interrupt generation on the NIC
1480  *  @adapter: board private structure
1481  **/
1482 static void igb_irq_disable(struct igb_adapter *adapter)
1483 {
1484         struct e1000_hw *hw = &adapter->hw;
1485
1486         /* we need to be careful when disabling interrupts.  The VFs are also
1487          * mapped into these registers and so clearing the bits can cause
1488          * issues on the VF drivers so we only need to clear what we set
1489          */
1490         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1491                 u32 regval = rd32(E1000_EIAM);
1492
1493                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1494                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1495                 regval = rd32(E1000_EIAC);
1496                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1497         }
1498
1499         wr32(E1000_IAM, 0);
1500         wr32(E1000_IMC, ~0);
1501         wrfl();
1502         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1503                 int i;
1504
1505                 for (i = 0; i < adapter->num_q_vectors; i++)
1506                         synchronize_irq(adapter->msix_entries[i].vector);
1507         } else {
1508                 synchronize_irq(adapter->pdev->irq);
1509         }
1510 }
1511
1512 /**
1513  *  igb_irq_enable - Enable default interrupt generation settings
1514  *  @adapter: board private structure
1515  **/
1516 static void igb_irq_enable(struct igb_adapter *adapter)
1517 {
1518         struct e1000_hw *hw = &adapter->hw;
1519
1520         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1521                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1522                 u32 regval = rd32(E1000_EIAC);
1523
1524                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1525                 regval = rd32(E1000_EIAM);
1526                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1527                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1528                 if (adapter->vfs_allocated_count) {
1529                         wr32(E1000_MBVFIMR, 0xFF);
1530                         ims |= E1000_IMS_VMMB;
1531                 }
1532                 wr32(E1000_IMS, ims);
1533         } else {
1534                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1535                                 E1000_IMS_DRSTA);
1536                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1537                                 E1000_IMS_DRSTA);
1538         }
1539 }
1540
1541 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1542 {
1543         struct e1000_hw *hw = &adapter->hw;
1544         u16 vid = adapter->hw.mng_cookie.vlan_id;
1545         u16 old_vid = adapter->mng_vlan_id;
1546
1547         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1548                 /* add VID to filter table */
1549                 igb_vfta_set(hw, vid, true);
1550                 adapter->mng_vlan_id = vid;
1551         } else {
1552                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1553         }
1554
1555         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1556             (vid != old_vid) &&
1557             !test_bit(old_vid, adapter->active_vlans)) {
1558                 /* remove VID from filter table */
1559                 igb_vfta_set(hw, old_vid, false);
1560         }
1561 }
1562
1563 /**
1564  *  igb_release_hw_control - release control of the h/w to f/w
1565  *  @adapter: address of board private structure
1566  *
1567  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1568  *  For ASF and Pass Through versions of f/w this means that the
1569  *  driver is no longer loaded.
1570  **/
1571 static void igb_release_hw_control(struct igb_adapter *adapter)
1572 {
1573         struct e1000_hw *hw = &adapter->hw;
1574         u32 ctrl_ext;
1575
1576         /* Let firmware take over control of h/w */
1577         ctrl_ext = rd32(E1000_CTRL_EXT);
1578         wr32(E1000_CTRL_EXT,
1579                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1580 }
1581
1582 /**
1583  *  igb_get_hw_control - get control of the h/w from f/w
1584  *  @adapter: address of board private structure
1585  *
1586  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1587  *  For ASF and Pass Through versions of f/w this means that
1588  *  the driver is loaded.
1589  **/
1590 static void igb_get_hw_control(struct igb_adapter *adapter)
1591 {
1592         struct e1000_hw *hw = &adapter->hw;
1593         u32 ctrl_ext;
1594
1595         /* Let firmware know the driver has taken over */
1596         ctrl_ext = rd32(E1000_CTRL_EXT);
1597         wr32(E1000_CTRL_EXT,
1598                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1599 }
1600
1601 /**
1602  *  igb_configure - configure the hardware for RX and TX
1603  *  @adapter: private board structure
1604  **/
1605 static void igb_configure(struct igb_adapter *adapter)
1606 {
1607         struct net_device *netdev = adapter->netdev;
1608         int i;
1609
1610         igb_get_hw_control(adapter);
1611         igb_set_rx_mode(netdev);
1612
1613         igb_restore_vlan(adapter);
1614
1615         igb_setup_tctl(adapter);
1616         igb_setup_mrqc(adapter);
1617         igb_setup_rctl(adapter);
1618
1619         igb_configure_tx(adapter);
1620         igb_configure_rx(adapter);
1621
1622         igb_rx_fifo_flush_82575(&adapter->hw);
1623
1624         /* call igb_desc_unused which always leaves
1625          * at least 1 descriptor unused to make sure
1626          * next_to_use != next_to_clean
1627          */
1628         for (i = 0; i < adapter->num_rx_queues; i++) {
1629                 struct igb_ring *ring = adapter->rx_ring[i];
1630                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1631         }
1632 }
1633
1634 /**
1635  *  igb_power_up_link - Power up the phy/serdes link
1636  *  @adapter: address of board private structure
1637  **/
1638 void igb_power_up_link(struct igb_adapter *adapter)
1639 {
1640         igb_reset_phy(&adapter->hw);
1641
1642         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1643                 igb_power_up_phy_copper(&adapter->hw);
1644         else
1645                 igb_power_up_serdes_link_82575(&adapter->hw);
1646
1647         igb_setup_link(&adapter->hw);
1648 }
1649
1650 /**
1651  *  igb_power_down_link - Power down the phy/serdes link
1652  *  @adapter: address of board private structure
1653  */
1654 static void igb_power_down_link(struct igb_adapter *adapter)
1655 {
1656         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1657                 igb_power_down_phy_copper_82575(&adapter->hw);
1658         else
1659                 igb_shutdown_serdes_link_82575(&adapter->hw);
1660 }
1661
1662 /**
1663  * Detect and switch function for Media Auto Sense
1664  * @adapter: address of the board private structure
1665  **/
1666 static void igb_check_swap_media(struct igb_adapter *adapter)
1667 {
1668         struct e1000_hw *hw = &adapter->hw;
1669         u32 ctrl_ext, connsw;
1670         bool swap_now = false;
1671
1672         ctrl_ext = rd32(E1000_CTRL_EXT);
1673         connsw = rd32(E1000_CONNSW);
1674
1675         /* need to live swap if current media is copper and we have fiber/serdes
1676          * to go to.
1677          */
1678
1679         if ((hw->phy.media_type == e1000_media_type_copper) &&
1680             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1681                 swap_now = true;
1682         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
1683                    !(connsw & E1000_CONNSW_SERDESD)) {
1684                 /* copper signal takes time to appear */
1685                 if (adapter->copper_tries < 4) {
1686                         adapter->copper_tries++;
1687                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1688                         wr32(E1000_CONNSW, connsw);
1689                         return;
1690                 } else {
1691                         adapter->copper_tries = 0;
1692                         if ((connsw & E1000_CONNSW_PHYSD) &&
1693                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1694                                 swap_now = true;
1695                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1696                                 wr32(E1000_CONNSW, connsw);
1697                         }
1698                 }
1699         }
1700
1701         if (!swap_now)
1702                 return;
1703
1704         switch (hw->phy.media_type) {
1705         case e1000_media_type_copper:
1706                 netdev_info(adapter->netdev,
1707                         "MAS: changing media to fiber/serdes\n");
1708                 ctrl_ext |=
1709                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1710                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1711                 adapter->copper_tries = 0;
1712                 break;
1713         case e1000_media_type_internal_serdes:
1714         case e1000_media_type_fiber:
1715                 netdev_info(adapter->netdev,
1716                         "MAS: changing media to copper\n");
1717                 ctrl_ext &=
1718                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1719                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1720                 break;
1721         default:
1722                 /* shouldn't get here during regular operation */
1723                 netdev_err(adapter->netdev,
1724                         "AMS: Invalid media type found, returning\n");
1725                 break;
1726         }
1727         wr32(E1000_CTRL_EXT, ctrl_ext);
1728 }
1729
1730 /**
1731  *  igb_up - Open the interface and prepare it to handle traffic
1732  *  @adapter: board private structure
1733  **/
1734 int igb_up(struct igb_adapter *adapter)
1735 {
1736         struct e1000_hw *hw = &adapter->hw;
1737         int i;
1738
1739         /* hardware has been reset, we need to reload some things */
1740         igb_configure(adapter);
1741
1742         clear_bit(__IGB_DOWN, &adapter->state);
1743
1744         for (i = 0; i < adapter->num_q_vectors; i++)
1745                 napi_enable(&(adapter->q_vector[i]->napi));
1746
1747         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1748                 igb_configure_msix(adapter);
1749         else
1750                 igb_assign_vector(adapter->q_vector[0], 0);
1751
1752         /* Clear any pending interrupts. */
1753         rd32(E1000_ICR);
1754         igb_irq_enable(adapter);
1755
1756         /* notify VFs that reset has been completed */
1757         if (adapter->vfs_allocated_count) {
1758                 u32 reg_data = rd32(E1000_CTRL_EXT);
1759
1760                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1761                 wr32(E1000_CTRL_EXT, reg_data);
1762         }
1763
1764         netif_tx_start_all_queues(adapter->netdev);
1765
1766         /* start the watchdog. */
1767         hw->mac.get_link_status = 1;
1768         schedule_work(&adapter->watchdog_task);
1769
1770         if ((adapter->flags & IGB_FLAG_EEE) &&
1771             (!hw->dev_spec._82575.eee_disable))
1772                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1773
1774         return 0;
1775 }
1776
1777 void igb_down(struct igb_adapter *adapter)
1778 {
1779         struct net_device *netdev = adapter->netdev;
1780         struct e1000_hw *hw = &adapter->hw;
1781         u32 tctl, rctl;
1782         int i;
1783
1784         /* signal that we're down so the interrupt handler does not
1785          * reschedule our watchdog timer
1786          */
1787         set_bit(__IGB_DOWN, &adapter->state);
1788
1789         /* disable receives in the hardware */
1790         rctl = rd32(E1000_RCTL);
1791         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1792         /* flush and sleep below */
1793
1794         netif_carrier_off(netdev);
1795         netif_tx_stop_all_queues(netdev);
1796
1797         /* disable transmits in the hardware */
1798         tctl = rd32(E1000_TCTL);
1799         tctl &= ~E1000_TCTL_EN;
1800         wr32(E1000_TCTL, tctl);
1801         /* flush both disables and wait for them to finish */
1802         wrfl();
1803         usleep_range(10000, 11000);
1804
1805         igb_irq_disable(adapter);
1806
1807         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1808
1809         for (i = 0; i < adapter->num_q_vectors; i++) {
1810                 if (adapter->q_vector[i]) {
1811                         napi_synchronize(&adapter->q_vector[i]->napi);
1812                         napi_disable(&adapter->q_vector[i]->napi);
1813                 }
1814         }
1815
1816         del_timer_sync(&adapter->watchdog_timer);
1817         del_timer_sync(&adapter->phy_info_timer);
1818
1819         /* record the stats before reset*/
1820         spin_lock(&adapter->stats64_lock);
1821         igb_update_stats(adapter, &adapter->stats64);
1822         spin_unlock(&adapter->stats64_lock);
1823
1824         adapter->link_speed = 0;
1825         adapter->link_duplex = 0;
1826
1827         if (!pci_channel_offline(adapter->pdev))
1828                 igb_reset(adapter);
1829         igb_clean_all_tx_rings(adapter);
1830         igb_clean_all_rx_rings(adapter);
1831 #ifdef CONFIG_IGB_DCA
1832
1833         /* since we reset the hardware DCA settings were cleared */
1834         igb_setup_dca(adapter);
1835 #endif
1836 }
1837
1838 void igb_reinit_locked(struct igb_adapter *adapter)
1839 {
1840         WARN_ON(in_interrupt());
1841         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1842                 usleep_range(1000, 2000);
1843         igb_down(adapter);
1844         igb_up(adapter);
1845         clear_bit(__IGB_RESETTING, &adapter->state);
1846 }
1847
1848 /** igb_enable_mas - Media Autosense re-enable after swap
1849  *
1850  * @adapter: adapter struct
1851  **/
1852 static void igb_enable_mas(struct igb_adapter *adapter)
1853 {
1854         struct e1000_hw *hw = &adapter->hw;
1855         u32 connsw = rd32(E1000_CONNSW);
1856
1857         /* configure for SerDes media detect */
1858         if ((hw->phy.media_type == e1000_media_type_copper) &&
1859             (!(connsw & E1000_CONNSW_SERDESD))) {
1860                 connsw |= E1000_CONNSW_ENRGSRC;
1861                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1862                 wr32(E1000_CONNSW, connsw);
1863                 wrfl();
1864         }
1865 }
1866
1867 void igb_reset(struct igb_adapter *adapter)
1868 {
1869         struct pci_dev *pdev = adapter->pdev;
1870         struct e1000_hw *hw = &adapter->hw;
1871         struct e1000_mac_info *mac = &hw->mac;
1872         struct e1000_fc_info *fc = &hw->fc;
1873         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1874
1875         /* Repartition Pba for greater than 9k mtu
1876          * To take effect CTRL.RST is required.
1877          */
1878         switch (mac->type) {
1879         case e1000_i350:
1880         case e1000_i354:
1881         case e1000_82580:
1882                 pba = rd32(E1000_RXPBS);
1883                 pba = igb_rxpbs_adjust_82580(pba);
1884                 break;
1885         case e1000_82576:
1886                 pba = rd32(E1000_RXPBS);
1887                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1888                 break;
1889         case e1000_82575:
1890         case e1000_i210:
1891         case e1000_i211:
1892         default:
1893                 pba = E1000_PBA_34K;
1894                 break;
1895         }
1896
1897         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1898             (mac->type < e1000_82576)) {
1899                 /* adjust PBA for jumbo frames */
1900                 wr32(E1000_PBA, pba);
1901
1902                 /* To maintain wire speed transmits, the Tx FIFO should be
1903                  * large enough to accommodate two full transmit packets,
1904                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1905                  * the Rx FIFO should be large enough to accommodate at least
1906                  * one full receive packet and is similarly rounded up and
1907                  * expressed in KB.
1908                  */
1909                 pba = rd32(E1000_PBA);
1910                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1911                 tx_space = pba >> 16;
1912                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1913                 pba &= 0xffff;
1914                 /* the Tx fifo also stores 16 bytes of information about the Tx
1915                  * but don't include ethernet FCS because hardware appends it
1916                  */
1917                 min_tx_space = (adapter->max_frame_size +
1918                                 sizeof(union e1000_adv_tx_desc) -
1919                                 ETH_FCS_LEN) * 2;
1920                 min_tx_space = ALIGN(min_tx_space, 1024);
1921                 min_tx_space >>= 10;
1922                 /* software strips receive CRC, so leave room for it */
1923                 min_rx_space = adapter->max_frame_size;
1924                 min_rx_space = ALIGN(min_rx_space, 1024);
1925                 min_rx_space >>= 10;
1926
1927                 /* If current Tx allocation is less than the min Tx FIFO size,
1928                  * and the min Tx FIFO size is less than the current Rx FIFO
1929                  * allocation, take space away from current Rx allocation
1930                  */
1931                 if (tx_space < min_tx_space &&
1932                     ((min_tx_space - tx_space) < pba)) {
1933                         pba = pba - (min_tx_space - tx_space);
1934
1935                         /* if short on Rx space, Rx wins and must trump Tx
1936                          * adjustment
1937                          */
1938                         if (pba < min_rx_space)
1939                                 pba = min_rx_space;
1940                 }
1941                 wr32(E1000_PBA, pba);
1942         }
1943
1944         /* flow control settings */
1945         /* The high water mark must be low enough to fit one full frame
1946          * (or the size used for early receive) above it in the Rx FIFO.
1947          * Set it to the lower of:
1948          * - 90% of the Rx FIFO size, or
1949          * - the full Rx FIFO size minus one full frame
1950          */
1951         hwm = min(((pba << 10) * 9 / 10),
1952                         ((pba << 10) - 2 * adapter->max_frame_size));
1953
1954         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1955         fc->low_water = fc->high_water - 16;
1956         fc->pause_time = 0xFFFF;
1957         fc->send_xon = 1;
1958         fc->current_mode = fc->requested_mode;
1959
1960         /* disable receive for all VFs and wait one second */
1961         if (adapter->vfs_allocated_count) {
1962                 int i;
1963
1964                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1965                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1966
1967                 /* ping all the active vfs to let them know we are going down */
1968                 igb_ping_all_vfs(adapter);
1969
1970                 /* disable transmits and receives */
1971                 wr32(E1000_VFRE, 0);
1972                 wr32(E1000_VFTE, 0);
1973         }
1974
1975         /* Allow time for pending master requests to run */
1976         hw->mac.ops.reset_hw(hw);
1977         wr32(E1000_WUC, 0);
1978
1979         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1980                 /* need to resetup here after media swap */
1981                 adapter->ei.get_invariants(hw);
1982                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1983         }
1984         if ((mac->type == e1000_82575) &&
1985             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
1986                 igb_enable_mas(adapter);
1987         }
1988         if (hw->mac.ops.init_hw(hw))
1989                 dev_err(&pdev->dev, "Hardware Error\n");
1990
1991         /* Flow control settings reset on hardware reset, so guarantee flow
1992          * control is off when forcing speed.
1993          */
1994         if (!hw->mac.autoneg)
1995                 igb_force_mac_fc(hw);
1996
1997         igb_init_dmac(adapter, pba);
1998 #ifdef CONFIG_IGB_HWMON
1999         /* Re-initialize the thermal sensor on i350 devices. */
2000         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2001                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2002                         /* If present, re-initialize the external thermal sensor
2003                          * interface.
2004                          */
2005                         if (adapter->ets)
2006                                 mac->ops.init_thermal_sensor_thresh(hw);
2007                 }
2008         }
2009 #endif
2010         /* Re-establish EEE setting */
2011         if (hw->phy.media_type == e1000_media_type_copper) {
2012                 switch (mac->type) {
2013                 case e1000_i350:
2014                 case e1000_i210:
2015                 case e1000_i211:
2016                         igb_set_eee_i350(hw, true, true);
2017                         break;
2018                 case e1000_i354:
2019                         igb_set_eee_i354(hw, true, true);
2020                         break;
2021                 default:
2022                         break;
2023                 }
2024         }
2025         if (!netif_running(adapter->netdev))
2026                 igb_power_down_link(adapter);
2027
2028         igb_update_mng_vlan(adapter);
2029
2030         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2031         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2032
2033         /* Re-enable PTP, where applicable. */
2034         igb_ptp_reset(adapter);
2035
2036         igb_get_phy_info(hw);
2037 }
2038
2039 static netdev_features_t igb_fix_features(struct net_device *netdev,
2040         netdev_features_t features)
2041 {
2042         /* Since there is no support for separate Rx/Tx vlan accel
2043          * enable/disable make sure Tx flag is always in same state as Rx.
2044          */
2045         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2046                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2047         else
2048                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2049
2050         return features;
2051 }
2052
2053 static int igb_set_features(struct net_device *netdev,
2054         netdev_features_t features)
2055 {
2056         netdev_features_t changed = netdev->features ^ features;
2057         struct igb_adapter *adapter = netdev_priv(netdev);
2058
2059         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2060                 igb_vlan_mode(netdev, features);
2061
2062         if (!(changed & NETIF_F_RXALL))
2063                 return 0;
2064
2065         netdev->features = features;
2066
2067         if (netif_running(netdev))
2068                 igb_reinit_locked(adapter);
2069         else
2070                 igb_reset(adapter);
2071
2072         return 0;
2073 }
2074
2075 static const struct net_device_ops igb_netdev_ops = {
2076         .ndo_open               = igb_open,
2077         .ndo_stop               = igb_close,
2078         .ndo_start_xmit         = igb_xmit_frame,
2079         .ndo_get_stats64        = igb_get_stats64,
2080         .ndo_set_rx_mode        = igb_set_rx_mode,
2081         .ndo_set_mac_address    = igb_set_mac,
2082         .ndo_change_mtu         = igb_change_mtu,
2083         .ndo_do_ioctl           = igb_ioctl,
2084         .ndo_tx_timeout         = igb_tx_timeout,
2085         .ndo_validate_addr      = eth_validate_addr,
2086         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2087         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2088         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2089         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2090         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2091         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2092         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2093 #ifdef CONFIG_NET_POLL_CONTROLLER
2094         .ndo_poll_controller    = igb_netpoll,
2095 #endif
2096         .ndo_fix_features       = igb_fix_features,
2097         .ndo_set_features       = igb_set_features,
2098         .ndo_features_check     = passthru_features_check,
2099 };
2100
2101 /**
2102  * igb_set_fw_version - Configure version string for ethtool
2103  * @adapter: adapter struct
2104  **/
2105 void igb_set_fw_version(struct igb_adapter *adapter)
2106 {
2107         struct e1000_hw *hw = &adapter->hw;
2108         struct e1000_fw_version fw;
2109
2110         igb_get_fw_version(hw, &fw);
2111
2112         switch (hw->mac.type) {
2113         case e1000_i210:
2114         case e1000_i211:
2115                 if (!(igb_get_flash_presence_i210(hw))) {
2116                         snprintf(adapter->fw_version,
2117                                  sizeof(adapter->fw_version),
2118                                  "%2d.%2d-%d",
2119                                  fw.invm_major, fw.invm_minor,
2120                                  fw.invm_img_type);
2121                         break;
2122                 }
2123                 /* fall through */
2124         default:
2125                 /* if option is rom valid, display its version too */
2126                 if (fw.or_valid) {
2127                         snprintf(adapter->fw_version,
2128                                  sizeof(adapter->fw_version),
2129                                  "%d.%d, 0x%08x, %d.%d.%d",
2130                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2131                                  fw.or_major, fw.or_build, fw.or_patch);
2132                 /* no option rom */
2133                 } else if (fw.etrack_id != 0X0000) {
2134                         snprintf(adapter->fw_version,
2135                             sizeof(adapter->fw_version),
2136                             "%d.%d, 0x%08x",
2137                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2138                 } else {
2139                 snprintf(adapter->fw_version,
2140                     sizeof(adapter->fw_version),
2141                     "%d.%d.%d",
2142                     fw.eep_major, fw.eep_minor, fw.eep_build);
2143                 }
2144                 break;
2145         }
2146 }
2147
2148 /**
2149  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2150  *
2151  * @adapter: adapter struct
2152  **/
2153 static void igb_init_mas(struct igb_adapter *adapter)
2154 {
2155         struct e1000_hw *hw = &adapter->hw;
2156         u16 eeprom_data;
2157
2158         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2159         switch (hw->bus.func) {
2160         case E1000_FUNC_0:
2161                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2162                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2163                         netdev_info(adapter->netdev,
2164                                 "MAS: Enabling Media Autosense for port %d\n",
2165                                 hw->bus.func);
2166                 }
2167                 break;
2168         case E1000_FUNC_1:
2169                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2170                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2171                         netdev_info(adapter->netdev,
2172                                 "MAS: Enabling Media Autosense for port %d\n",
2173                                 hw->bus.func);
2174                 }
2175                 break;
2176         case E1000_FUNC_2:
2177                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2178                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2179                         netdev_info(adapter->netdev,
2180                                 "MAS: Enabling Media Autosense for port %d\n",
2181                                 hw->bus.func);
2182                 }
2183                 break;
2184         case E1000_FUNC_3:
2185                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2186                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2187                         netdev_info(adapter->netdev,
2188                                 "MAS: Enabling Media Autosense for port %d\n",
2189                                 hw->bus.func);
2190                 }
2191                 break;
2192         default:
2193                 /* Shouldn't get here */
2194                 netdev_err(adapter->netdev,
2195                         "MAS: Invalid port configuration, returning\n");
2196                 break;
2197         }
2198 }
2199
2200 /**
2201  *  igb_init_i2c - Init I2C interface
2202  *  @adapter: pointer to adapter structure
2203  **/
2204 static s32 igb_init_i2c(struct igb_adapter *adapter)
2205 {
2206         s32 status = 0;
2207
2208         /* I2C interface supported on i350 devices */
2209         if (adapter->hw.mac.type != e1000_i350)
2210                 return 0;
2211
2212         /* Initialize the i2c bus which is controlled by the registers.
2213          * This bus will use the i2c_algo_bit structue that implements
2214          * the protocol through toggling of the 4 bits in the register.
2215          */
2216         adapter->i2c_adap.owner = THIS_MODULE;
2217         adapter->i2c_algo = igb_i2c_algo;
2218         adapter->i2c_algo.data = adapter;
2219         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2220         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2221         strlcpy(adapter->i2c_adap.name, "igb BB",
2222                 sizeof(adapter->i2c_adap.name));
2223         status = i2c_bit_add_bus(&adapter->i2c_adap);
2224         return status;
2225 }
2226
2227 /**
2228  *  igb_probe - Device Initialization Routine
2229  *  @pdev: PCI device information struct
2230  *  @ent: entry in igb_pci_tbl
2231  *
2232  *  Returns 0 on success, negative on failure
2233  *
2234  *  igb_probe initializes an adapter identified by a pci_dev structure.
2235  *  The OS initialization, configuring of the adapter private structure,
2236  *  and a hardware reset occur.
2237  **/
2238 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2239 {
2240         struct net_device *netdev;
2241         struct igb_adapter *adapter;
2242         struct e1000_hw *hw;
2243         u16 eeprom_data = 0;
2244         s32 ret_val;
2245         static int global_quad_port_a; /* global quad port a indication */
2246         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2247         int err, pci_using_dac;
2248         u8 part_str[E1000_PBANUM_LENGTH];
2249
2250         /* Catch broken hardware that put the wrong VF device ID in
2251          * the PCIe SR-IOV capability.
2252          */
2253         if (pdev->is_virtfn) {
2254                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2255                         pci_name(pdev), pdev->vendor, pdev->device);
2256                 return -EINVAL;
2257         }
2258
2259         err = pci_enable_device_mem(pdev);
2260         if (err)
2261                 return err;
2262
2263         pci_using_dac = 0;
2264         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2265         if (!err) {
2266                 pci_using_dac = 1;
2267         } else {
2268                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2269                 if (err) {
2270                         dev_err(&pdev->dev,
2271                                 "No usable DMA configuration, aborting\n");
2272                         goto err_dma;
2273                 }
2274         }
2275
2276         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2277                                            IORESOURCE_MEM),
2278                                            igb_driver_name);
2279         if (err)
2280                 goto err_pci_reg;
2281
2282         pci_enable_pcie_error_reporting(pdev);
2283
2284         pci_set_master(pdev);
2285         pci_save_state(pdev);
2286
2287         err = -ENOMEM;
2288         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2289                                    IGB_MAX_TX_QUEUES);
2290         if (!netdev)
2291                 goto err_alloc_etherdev;
2292
2293         SET_NETDEV_DEV(netdev, &pdev->dev);
2294
2295         pci_set_drvdata(pdev, netdev);
2296         adapter = netdev_priv(netdev);
2297         adapter->netdev = netdev;
2298         adapter->pdev = pdev;
2299         hw = &adapter->hw;
2300         hw->back = adapter;
2301         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2302
2303         err = -EIO;
2304         adapter->io_addr = pci_iomap(pdev, 0, 0);
2305         if (!adapter->io_addr)
2306                 goto err_ioremap;
2307         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
2308         hw->hw_addr = adapter->io_addr;
2309
2310         netdev->netdev_ops = &igb_netdev_ops;
2311         igb_set_ethtool_ops(netdev);
2312         netdev->watchdog_timeo = 5 * HZ;
2313
2314         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2315
2316         netdev->mem_start = pci_resource_start(pdev, 0);
2317         netdev->mem_end = pci_resource_end(pdev, 0);
2318
2319         /* PCI config space info */
2320         hw->vendor_id = pdev->vendor;
2321         hw->device_id = pdev->device;
2322         hw->revision_id = pdev->revision;
2323         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2324         hw->subsystem_device_id = pdev->subsystem_device;
2325
2326         /* Copy the default MAC, PHY and NVM function pointers */
2327         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2328         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2329         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2330         /* Initialize skew-specific constants */
2331         err = ei->get_invariants(hw);
2332         if (err)
2333                 goto err_sw_init;
2334
2335         /* setup the private structure */
2336         err = igb_sw_init(adapter);
2337         if (err)
2338                 goto err_sw_init;
2339
2340         igb_get_bus_info_pcie(hw);
2341
2342         hw->phy.autoneg_wait_to_complete = false;
2343
2344         /* Copper options */
2345         if (hw->phy.media_type == e1000_media_type_copper) {
2346                 hw->phy.mdix = AUTO_ALL_MODES;
2347                 hw->phy.disable_polarity_correction = false;
2348                 hw->phy.ms_type = e1000_ms_hw_default;
2349         }
2350
2351         if (igb_check_reset_block(hw))
2352                 dev_info(&pdev->dev,
2353                         "PHY reset is blocked due to SOL/IDER session.\n");
2354
2355         /* features is initialized to 0 in allocation, it might have bits
2356          * set by igb_sw_init so we should use an or instead of an
2357          * assignment.
2358          */
2359         netdev->features |= NETIF_F_SG |
2360                             NETIF_F_IP_CSUM |
2361                             NETIF_F_IPV6_CSUM |
2362                             NETIF_F_TSO |
2363                             NETIF_F_TSO6 |
2364                             NETIF_F_RXHASH |
2365                             NETIF_F_RXCSUM |
2366                             NETIF_F_HW_VLAN_CTAG_RX |
2367                             NETIF_F_HW_VLAN_CTAG_TX;
2368
2369         /* copy netdev features into list of user selectable features */
2370         netdev->hw_features |= netdev->features;
2371         netdev->hw_features |= NETIF_F_RXALL;
2372
2373         /* set this bit last since it cannot be part of hw_features */
2374         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2375
2376         netdev->vlan_features |= NETIF_F_TSO |
2377                                  NETIF_F_TSO6 |
2378                                  NETIF_F_IP_CSUM |
2379                                  NETIF_F_IPV6_CSUM |
2380                                  NETIF_F_SG;
2381
2382         netdev->priv_flags |= IFF_SUPP_NOFCS;
2383
2384         if (pci_using_dac) {
2385                 netdev->features |= NETIF_F_HIGHDMA;
2386                 netdev->vlan_features |= NETIF_F_HIGHDMA;
2387         }
2388
2389         if (hw->mac.type >= e1000_82576) {
2390                 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2391                 netdev->features |= NETIF_F_SCTP_CSUM;
2392         }
2393
2394         netdev->priv_flags |= IFF_UNICAST_FLT;
2395
2396         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2397
2398         /* before reading the NVM, reset the controller to put the device in a
2399          * known good starting state
2400          */
2401         hw->mac.ops.reset_hw(hw);
2402
2403         /* make sure the NVM is good , i211/i210 parts can have special NVM
2404          * that doesn't contain a checksum
2405          */
2406         switch (hw->mac.type) {
2407         case e1000_i210:
2408         case e1000_i211:
2409                 if (igb_get_flash_presence_i210(hw)) {
2410                         if (hw->nvm.ops.validate(hw) < 0) {
2411                                 dev_err(&pdev->dev,
2412                                         "The NVM Checksum Is Not Valid\n");
2413                                 err = -EIO;
2414                                 goto err_eeprom;
2415                         }
2416                 }
2417                 break;
2418         default:
2419                 if (hw->nvm.ops.validate(hw) < 0) {
2420                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2421                         err = -EIO;
2422                         goto err_eeprom;
2423                 }
2424                 break;
2425         }
2426
2427         /* copy the MAC address out of the NVM */
2428         if (hw->mac.ops.read_mac_addr(hw))
2429                 dev_err(&pdev->dev, "NVM Read Error\n");
2430
2431         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2432
2433         if (!is_valid_ether_addr(netdev->dev_addr)) {
2434                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2435                 err = -EIO;
2436                 goto err_eeprom;
2437         }
2438
2439         /* get firmware version for ethtool -i */
2440         igb_set_fw_version(adapter);
2441
2442         /* configure RXPBSIZE and TXPBSIZE */
2443         if (hw->mac.type == e1000_i210) {
2444                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
2445                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
2446         }
2447
2448         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2449                     (unsigned long) adapter);
2450         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2451                     (unsigned long) adapter);
2452
2453         INIT_WORK(&adapter->reset_task, igb_reset_task);
2454         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2455
2456         /* Initialize link properties that are user-changeable */
2457         adapter->fc_autoneg = true;
2458         hw->mac.autoneg = true;
2459         hw->phy.autoneg_advertised = 0x2f;
2460
2461         hw->fc.requested_mode = e1000_fc_default;
2462         hw->fc.current_mode = e1000_fc_default;
2463
2464         igb_validate_mdi_setting(hw);
2465
2466         /* By default, support wake on port A */
2467         if (hw->bus.func == 0)
2468                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2469
2470         /* Check the NVM for wake support on non-port A ports */
2471         if (hw->mac.type >= e1000_82580)
2472                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2473                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2474                                  &eeprom_data);
2475         else if (hw->bus.func == 1)
2476                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2477
2478         if (eeprom_data & IGB_EEPROM_APME)
2479                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2480
2481         /* now that we have the eeprom settings, apply the special cases where
2482          * the eeprom may be wrong or the board simply won't support wake on
2483          * lan on a particular port
2484          */
2485         switch (pdev->device) {
2486         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2487                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2488                 break;
2489         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2490         case E1000_DEV_ID_82576_FIBER:
2491         case E1000_DEV_ID_82576_SERDES:
2492                 /* Wake events only supported on port A for dual fiber
2493                  * regardless of eeprom setting
2494                  */
2495                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2496                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2497                 break;
2498         case E1000_DEV_ID_82576_QUAD_COPPER:
2499         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2500                 /* if quad port adapter, disable WoL on all but port A */
2501                 if (global_quad_port_a != 0)
2502                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2503                 else
2504                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2505                 /* Reset for multiple quad port adapters */
2506                 if (++global_quad_port_a == 4)
2507                         global_quad_port_a = 0;
2508                 break;
2509         default:
2510                 /* If the device can't wake, don't set software support */
2511                 if (!device_can_wakeup(&adapter->pdev->dev))
2512                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2513         }
2514
2515         /* initialize the wol settings based on the eeprom settings */
2516         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2517                 adapter->wol |= E1000_WUFC_MAG;
2518
2519         /* Some vendors want WoL disabled by default, but still supported */
2520         if ((hw->mac.type == e1000_i350) &&
2521             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2522                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2523                 adapter->wol = 0;
2524         }
2525
2526         device_set_wakeup_enable(&adapter->pdev->dev,
2527                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2528
2529         /* reset the hardware with the new settings */
2530         igb_reset(adapter);
2531
2532         /* Init the I2C interface */
2533         err = igb_init_i2c(adapter);
2534         if (err) {
2535                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2536                 goto err_eeprom;
2537         }
2538
2539         /* let the f/w know that the h/w is now under the control of the
2540          * driver.
2541          */
2542         igb_get_hw_control(adapter);
2543
2544         strcpy(netdev->name, "eth%d");
2545         err = register_netdev(netdev);
2546         if (err)
2547                 goto err_register;
2548
2549         /* carrier off reporting is important to ethtool even BEFORE open */
2550         netif_carrier_off(netdev);
2551
2552 #ifdef CONFIG_IGB_DCA
2553         if (dca_add_requester(&pdev->dev) == 0) {
2554                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2555                 dev_info(&pdev->dev, "DCA enabled\n");
2556                 igb_setup_dca(adapter);
2557         }
2558
2559 #endif
2560 #ifdef CONFIG_IGB_HWMON
2561         /* Initialize the thermal sensor on i350 devices. */
2562         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2563                 u16 ets_word;
2564
2565                 /* Read the NVM to determine if this i350 device supports an
2566                  * external thermal sensor.
2567                  */
2568                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2569                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2570                         adapter->ets = true;
2571                 else
2572                         adapter->ets = false;
2573                 if (igb_sysfs_init(adapter))
2574                         dev_err(&pdev->dev,
2575                                 "failed to allocate sysfs resources\n");
2576         } else {
2577                 adapter->ets = false;
2578         }
2579 #endif
2580         /* Check if Media Autosense is enabled */
2581         adapter->ei = *ei;
2582         if (hw->dev_spec._82575.mas_capable)
2583                 igb_init_mas(adapter);
2584
2585         /* do hw tstamp init after resetting */
2586         igb_ptp_init(adapter);
2587
2588         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2589         /* print bus type/speed/width info, not applicable to i354 */
2590         if (hw->mac.type != e1000_i354) {
2591                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2592                          netdev->name,
2593                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2594                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2595                            "unknown"),
2596                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2597                           "Width x4" :
2598                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2599                           "Width x2" :
2600                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2601                           "Width x1" : "unknown"), netdev->dev_addr);
2602         }
2603
2604         if ((hw->mac.type >= e1000_i210 ||
2605              igb_get_flash_presence_i210(hw))) {
2606                 ret_val = igb_read_part_string(hw, part_str,
2607                                                E1000_PBANUM_LENGTH);
2608         } else {
2609                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2610         }
2611
2612         if (ret_val)
2613                 strcpy(part_str, "Unknown");
2614         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2615         dev_info(&pdev->dev,
2616                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2617                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2618                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2619                 adapter->num_rx_queues, adapter->num_tx_queues);
2620         if (hw->phy.media_type == e1000_media_type_copper) {
2621                 switch (hw->mac.type) {
2622                 case e1000_i350:
2623                 case e1000_i210:
2624                 case e1000_i211:
2625                         /* Enable EEE for internal copper PHY devices */
2626                         err = igb_set_eee_i350(hw, true, true);
2627                         if ((!err) &&
2628                             (!hw->dev_spec._82575.eee_disable)) {
2629                                 adapter->eee_advert =
2630                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2631                                 adapter->flags |= IGB_FLAG_EEE;
2632                         }
2633                         break;
2634                 case e1000_i354:
2635                         if ((rd32(E1000_CTRL_EXT) &
2636                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2637                                 err = igb_set_eee_i354(hw, true, true);
2638                                 if ((!err) &&
2639                                         (!hw->dev_spec._82575.eee_disable)) {
2640                                         adapter->eee_advert =
2641                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2642                                         adapter->flags |= IGB_FLAG_EEE;
2643                                 }
2644                         }
2645                         break;
2646                 default:
2647                         break;
2648                 }
2649         }
2650         pm_runtime_put_noidle(&pdev->dev);
2651         return 0;
2652
2653 err_register:
2654         igb_release_hw_control(adapter);
2655         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2656 err_eeprom:
2657         if (!igb_check_reset_block(hw))
2658                 igb_reset_phy(hw);
2659
2660         if (hw->flash_address)
2661                 iounmap(hw->flash_address);
2662 err_sw_init:
2663         kfree(adapter->shadow_vfta);
2664         igb_clear_interrupt_scheme(adapter);
2665 #ifdef CONFIG_PCI_IOV
2666         igb_disable_sriov(pdev);
2667 #endif
2668         pci_iounmap(pdev, adapter->io_addr);
2669 err_ioremap:
2670         free_netdev(netdev);
2671 err_alloc_etherdev:
2672         pci_release_selected_regions(pdev,
2673                                      pci_select_bars(pdev, IORESOURCE_MEM));
2674 err_pci_reg:
2675 err_dma:
2676         pci_disable_device(pdev);
2677         return err;
2678 }
2679
2680 #ifdef CONFIG_PCI_IOV
2681 static int igb_disable_sriov(struct pci_dev *pdev)
2682 {
2683         struct net_device *netdev = pci_get_drvdata(pdev);
2684         struct igb_adapter *adapter = netdev_priv(netdev);
2685         struct e1000_hw *hw = &adapter->hw;
2686
2687         /* reclaim resources allocated to VFs */
2688         if (adapter->vf_data) {
2689                 /* disable iov and allow time for transactions to clear */
2690                 if (pci_vfs_assigned(pdev)) {
2691                         dev_warn(&pdev->dev,
2692                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2693                         return -EPERM;
2694                 } else {
2695                         pci_disable_sriov(pdev);
2696                         msleep(500);
2697                 }
2698
2699                 kfree(adapter->vf_data);
2700                 adapter->vf_data = NULL;
2701                 adapter->vfs_allocated_count = 0;
2702                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2703                 wrfl();
2704                 msleep(100);
2705                 dev_info(&pdev->dev, "IOV Disabled\n");
2706
2707                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2708                 adapter->flags |= IGB_FLAG_DMAC;
2709         }
2710
2711         return 0;
2712 }
2713
2714 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2715 {
2716         struct net_device *netdev = pci_get_drvdata(pdev);
2717         struct igb_adapter *adapter = netdev_priv(netdev);
2718         int old_vfs = pci_num_vf(pdev);
2719         int err = 0;
2720         int i;
2721
2722         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2723                 err = -EPERM;
2724                 goto out;
2725         }
2726         if (!num_vfs)
2727                 goto out;
2728
2729         if (old_vfs) {
2730                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2731                          old_vfs, max_vfs);
2732                 adapter->vfs_allocated_count = old_vfs;
2733         } else
2734                 adapter->vfs_allocated_count = num_vfs;
2735
2736         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2737                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2738
2739         /* if allocation failed then we do not support SR-IOV */
2740         if (!adapter->vf_data) {
2741                 adapter->vfs_allocated_count = 0;
2742                 dev_err(&pdev->dev,
2743                         "Unable to allocate memory for VF Data Storage\n");
2744                 err = -ENOMEM;
2745                 goto out;
2746         }
2747
2748         /* only call pci_enable_sriov() if no VFs are allocated already */
2749         if (!old_vfs) {
2750                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2751                 if (err)
2752                         goto err_out;
2753         }
2754         dev_info(&pdev->dev, "%d VFs allocated\n",
2755                  adapter->vfs_allocated_count);
2756         for (i = 0; i < adapter->vfs_allocated_count; i++)
2757                 igb_vf_configure(adapter, i);
2758
2759         /* DMA Coalescing is not supported in IOV mode. */
2760         adapter->flags &= ~IGB_FLAG_DMAC;
2761         goto out;
2762
2763 err_out:
2764         kfree(adapter->vf_data);
2765         adapter->vf_data = NULL;
2766         adapter->vfs_allocated_count = 0;
2767 out:
2768         return err;
2769 }
2770
2771 #endif
2772 /**
2773  *  igb_remove_i2c - Cleanup  I2C interface
2774  *  @adapter: pointer to adapter structure
2775  **/
2776 static void igb_remove_i2c(struct igb_adapter *adapter)
2777 {
2778         /* free the adapter bus structure */
2779         i2c_del_adapter(&adapter->i2c_adap);
2780 }
2781
2782 /**
2783  *  igb_remove - Device Removal Routine
2784  *  @pdev: PCI device information struct
2785  *
2786  *  igb_remove is called by the PCI subsystem to alert the driver
2787  *  that it should release a PCI device.  The could be caused by a
2788  *  Hot-Plug event, or because the driver is going to be removed from
2789  *  memory.
2790  **/
2791 static void igb_remove(struct pci_dev *pdev)
2792 {
2793         struct net_device *netdev = pci_get_drvdata(pdev);
2794         struct igb_adapter *adapter = netdev_priv(netdev);
2795         struct e1000_hw *hw = &adapter->hw;
2796
2797         pm_runtime_get_noresume(&pdev->dev);
2798 #ifdef CONFIG_IGB_HWMON
2799         igb_sysfs_exit(adapter);
2800 #endif
2801         igb_remove_i2c(adapter);
2802         igb_ptp_stop(adapter);
2803         /* The watchdog timer may be rescheduled, so explicitly
2804          * disable watchdog from being rescheduled.
2805          */
2806         set_bit(__IGB_DOWN, &adapter->state);
2807         del_timer_sync(&adapter->watchdog_timer);
2808         del_timer_sync(&adapter->phy_info_timer);
2809
2810         cancel_work_sync(&adapter->reset_task);
2811         cancel_work_sync(&adapter->watchdog_task);
2812
2813 #ifdef CONFIG_IGB_DCA
2814         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2815                 dev_info(&pdev->dev, "DCA disabled\n");
2816                 dca_remove_requester(&pdev->dev);
2817                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2818                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2819         }
2820 #endif
2821
2822         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2823          * would have already happened in close and is redundant.
2824          */
2825         igb_release_hw_control(adapter);
2826
2827 #ifdef CONFIG_PCI_IOV
2828         igb_disable_sriov(pdev);
2829 #endif
2830
2831         unregister_netdev(netdev);
2832
2833         igb_clear_interrupt_scheme(adapter);
2834
2835         pci_iounmap(pdev, adapter->io_addr);
2836         if (hw->flash_address)
2837                 iounmap(hw->flash_address);
2838         pci_release_selected_regions(pdev,
2839                                      pci_select_bars(pdev, IORESOURCE_MEM));
2840
2841         kfree(adapter->shadow_vfta);
2842         free_netdev(netdev);
2843
2844         pci_disable_pcie_error_reporting(pdev);
2845
2846         pci_disable_device(pdev);
2847 }
2848
2849 /**
2850  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2851  *  @adapter: board private structure to initialize
2852  *
2853  *  This function initializes the vf specific data storage and then attempts to
2854  *  allocate the VFs.  The reason for ordering it this way is because it is much
2855  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2856  *  the memory for the VFs.
2857  **/
2858 static void igb_probe_vfs(struct igb_adapter *adapter)
2859 {
2860 #ifdef CONFIG_PCI_IOV
2861         struct pci_dev *pdev = adapter->pdev;
2862         struct e1000_hw *hw = &adapter->hw;
2863
2864         /* Virtualization features not supported on i210 family. */
2865         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2866                 return;
2867
2868         /* Of the below we really only want the effect of getting
2869          * IGB_FLAG_HAS_MSIX set (if available), without which
2870          * igb_enable_sriov() has no effect.
2871          */
2872         igb_set_interrupt_capability(adapter, true);
2873         igb_reset_interrupt_capability(adapter);
2874
2875         pci_sriov_set_totalvfs(pdev, 7);
2876         igb_enable_sriov(pdev, max_vfs);
2877
2878 #endif /* CONFIG_PCI_IOV */
2879 }
2880
2881 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2882 {
2883         struct e1000_hw *hw = &adapter->hw;
2884         u32 max_rss_queues;
2885
2886         /* Determine the maximum number of RSS queues supported. */
2887         switch (hw->mac.type) {
2888         case e1000_i211:
2889                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2890                 break;
2891         case e1000_82575:
2892         case e1000_i210:
2893                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2894                 break;
2895         case e1000_i350:
2896                 /* I350 cannot do RSS and SR-IOV at the same time */
2897                 if (!!adapter->vfs_allocated_count) {
2898                         max_rss_queues = 1;
2899                         break;
2900                 }
2901                 /* fall through */
2902         case e1000_82576:
2903                 if (!!adapter->vfs_allocated_count) {
2904                         max_rss_queues = 2;
2905                         break;
2906                 }
2907                 /* fall through */
2908         case e1000_82580:
2909         case e1000_i354:
2910         default:
2911                 max_rss_queues = IGB_MAX_RX_QUEUES;
2912                 break;
2913         }
2914
2915         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2916
2917         igb_set_flag_queue_pairs(adapter, max_rss_queues);
2918 }
2919
2920 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
2921                               const u32 max_rss_queues)
2922 {
2923         struct e1000_hw *hw = &adapter->hw;
2924
2925         /* Determine if we need to pair queues. */
2926         switch (hw->mac.type) {
2927         case e1000_82575:
2928         case e1000_i211:
2929                 /* Device supports enough interrupts without queue pairing. */
2930                 break;
2931         case e1000_82576:
2932                 /* If VFs are going to be allocated with RSS queues then we
2933                  * should pair the queues in order to conserve interrupts due
2934                  * to limited supply.
2935                  */
2936                 if ((adapter->rss_queues > 1) &&
2937                     (adapter->vfs_allocated_count > 6))
2938                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2939                 /* fall through */
2940         case e1000_82580:
2941         case e1000_i350:
2942         case e1000_i354:
2943         case e1000_i210:
2944         default:
2945                 /* If rss_queues > half of max_rss_queues, pair the queues in
2946                  * order to conserve interrupts due to limited supply.
2947                  */
2948                 if (adapter->rss_queues > (max_rss_queues / 2))
2949                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2950                 break;
2951         }
2952 }
2953
2954 /**
2955  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
2956  *  @adapter: board private structure to initialize
2957  *
2958  *  igb_sw_init initializes the Adapter private data structure.
2959  *  Fields are initialized based on PCI device information and
2960  *  OS network device settings (MTU size).
2961  **/
2962 static int igb_sw_init(struct igb_adapter *adapter)
2963 {
2964         struct e1000_hw *hw = &adapter->hw;
2965         struct net_device *netdev = adapter->netdev;
2966         struct pci_dev *pdev = adapter->pdev;
2967
2968         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2969
2970         /* set default ring sizes */
2971         adapter->tx_ring_count = IGB_DEFAULT_TXD;
2972         adapter->rx_ring_count = IGB_DEFAULT_RXD;
2973
2974         /* set default ITR values */
2975         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2976         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2977
2978         /* set default work limits */
2979         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2980
2981         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2982                                   VLAN_HLEN;
2983         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2984
2985         spin_lock_init(&adapter->stats64_lock);
2986 #ifdef CONFIG_PCI_IOV
2987         switch (hw->mac.type) {
2988         case e1000_82576:
2989         case e1000_i350:
2990                 if (max_vfs > 7) {
2991                         dev_warn(&pdev->dev,
2992                                  "Maximum of 7 VFs per PF, using max\n");
2993                         max_vfs = adapter->vfs_allocated_count = 7;
2994                 } else
2995                         adapter->vfs_allocated_count = max_vfs;
2996                 if (adapter->vfs_allocated_count)
2997                         dev_warn(&pdev->dev,
2998                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2999                 break;
3000         default:
3001                 break;
3002         }
3003 #endif /* CONFIG_PCI_IOV */
3004
3005         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3006         adapter->flags |= IGB_FLAG_HAS_MSIX;
3007
3008         igb_probe_vfs(adapter);
3009
3010         igb_init_queue_configuration(adapter);
3011
3012         /* Setup and initialize a copy of the hw vlan table array */
3013         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
3014                                        GFP_ATOMIC);
3015         if (!adapter->shadow_vfta)
3016                 return -ENOMEM;
3017
3018         /* This call may decrease the number of queues */
3019         if (igb_init_interrupt_scheme(adapter, true)) {
3020                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3021                 return -ENOMEM;
3022         }
3023
3024         /* Explicitly disable IRQ since the NIC can be in any state. */
3025         igb_irq_disable(adapter);
3026
3027         if (hw->mac.type >= e1000_i350)
3028                 adapter->flags &= ~IGB_FLAG_DMAC;
3029
3030         set_bit(__IGB_DOWN, &adapter->state);
3031         return 0;
3032 }
3033
3034 /**
3035  *  igb_open - Called when a network interface is made active
3036  *  @netdev: network interface device structure
3037  *
3038  *  Returns 0 on success, negative value on failure
3039  *
3040  *  The open entry point is called when a network interface is made
3041  *  active by the system (IFF_UP).  At this point all resources needed
3042  *  for transmit and receive operations are allocated, the interrupt
3043  *  handler is registered with the OS, the watchdog timer is started,
3044  *  and the stack is notified that the interface is ready.
3045  **/
3046 static int __igb_open(struct net_device *netdev, bool resuming)
3047 {
3048         struct igb_adapter *adapter = netdev_priv(netdev);
3049         struct e1000_hw *hw = &adapter->hw;
3050         struct pci_dev *pdev = adapter->pdev;
3051         int err;
3052         int i;
3053
3054         /* disallow open during test */
3055         if (test_bit(__IGB_TESTING, &adapter->state)) {
3056                 WARN_ON(resuming);
3057                 return -EBUSY;
3058         }
3059
3060         if (!resuming)
3061                 pm_runtime_get_sync(&pdev->dev);
3062
3063         netif_carrier_off(netdev);
3064
3065         /* allocate transmit descriptors */
3066         err = igb_setup_all_tx_resources(adapter);
3067         if (err)
3068                 goto err_setup_tx;
3069
3070         /* allocate receive descriptors */
3071         err = igb_setup_all_rx_resources(adapter);
3072         if (err)
3073                 goto err_setup_rx;
3074
3075         igb_power_up_link(adapter);
3076
3077         /* before we allocate an interrupt, we must be ready to handle it.
3078          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3079          * as soon as we call pci_request_irq, so we have to setup our
3080          * clean_rx handler before we do so.
3081          */
3082         igb_configure(adapter);
3083
3084         err = igb_request_irq(adapter);
3085         if (err)
3086                 goto err_req_irq;
3087
3088         /* Notify the stack of the actual queue counts. */
3089         err = netif_set_real_num_tx_queues(adapter->netdev,
3090                                            adapter->num_tx_queues);
3091         if (err)
3092                 goto err_set_queues;
3093
3094         err = netif_set_real_num_rx_queues(adapter->netdev,
3095                                            adapter->num_rx_queues);
3096         if (err)
3097                 goto err_set_queues;
3098
3099         /* From here on the code is the same as igb_up() */
3100         clear_bit(__IGB_DOWN, &adapter->state);
3101
3102         for (i = 0; i < adapter->num_q_vectors; i++)
3103                 napi_enable(&(adapter->q_vector[i]->napi));
3104
3105         /* Clear any pending interrupts. */
3106         rd32(E1000_ICR);
3107
3108         igb_irq_enable(adapter);
3109
3110         /* notify VFs that reset has been completed */
3111         if (adapter->vfs_allocated_count) {
3112                 u32 reg_data = rd32(E1000_CTRL_EXT);
3113
3114                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3115                 wr32(E1000_CTRL_EXT, reg_data);
3116         }
3117
3118         netif_tx_start_all_queues(netdev);
3119
3120         if (!resuming)
3121                 pm_runtime_put(&pdev->dev);
3122
3123         /* start the watchdog. */
3124         hw->mac.get_link_status = 1;
3125         schedule_work(&adapter->watchdog_task);
3126
3127         return 0;
3128
3129 err_set_queues:
3130         igb_free_irq(adapter);
3131 err_req_irq:
3132         igb_release_hw_control(adapter);
3133         igb_power_down_link(adapter);
3134         igb_free_all_rx_resources(adapter);
3135 err_setup_rx:
3136         igb_free_all_tx_resources(adapter);
3137 err_setup_tx:
3138         igb_reset(adapter);
3139         if (!resuming)
3140                 pm_runtime_put(&pdev->dev);
3141
3142         return err;
3143 }
3144
3145 static int igb_open(struct net_device *netdev)
3146 {
3147         return __igb_open(netdev, false);
3148 }
3149
3150 /**
3151  *  igb_close - Disables a network interface
3152  *  @netdev: network interface device structure
3153  *
3154  *  Returns 0, this is not allowed to fail
3155  *
3156  *  The close entry point is called when an interface is de-activated
3157  *  by the OS.  The hardware is still under the driver's control, but
3158  *  needs to be disabled.  A global MAC reset is issued to stop the
3159  *  hardware, and all transmit and receive resources are freed.
3160  **/
3161 static int __igb_close(struct net_device *netdev, bool suspending)
3162 {
3163         struct igb_adapter *adapter = netdev_priv(netdev);
3164         struct pci_dev *pdev = adapter->pdev;
3165
3166         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3167
3168         if (!suspending)
3169                 pm_runtime_get_sync(&pdev->dev);
3170
3171         igb_down(adapter);
3172         igb_free_irq(adapter);
3173
3174         igb_free_all_tx_resources(adapter);
3175         igb_free_all_rx_resources(adapter);
3176
3177         if (!suspending)
3178                 pm_runtime_put_sync(&pdev->dev);
3179         return 0;
3180 }
3181
3182 static int igb_close(struct net_device *netdev)
3183 {
3184         if (netif_device_present(netdev) || netdev->dismantle)
3185                 return __igb_close(netdev, false);
3186         return 0;
3187 }
3188
3189 /**
3190  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3191  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3192  *
3193  *  Return 0 on success, negative on failure
3194  **/
3195 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3196 {
3197         struct device *dev = tx_ring->dev;
3198         int size;
3199
3200         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3201
3202         tx_ring->tx_buffer_info = vzalloc(size);
3203         if (!tx_ring->tx_buffer_info)
3204                 goto err;
3205
3206         /* round up to nearest 4K */
3207         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3208         tx_ring->size = ALIGN(tx_ring->size, 4096);
3209
3210         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3211                                            &tx_ring->dma, GFP_KERNEL);
3212         if (!tx_ring->desc)
3213                 goto err;
3214
3215         tx_ring->next_to_use = 0;
3216         tx_ring->next_to_clean = 0;
3217
3218         return 0;
3219
3220 err:
3221         vfree(tx_ring->tx_buffer_info);
3222         tx_ring->tx_buffer_info = NULL;
3223         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3224         return -ENOMEM;
3225 }
3226
3227 /**
3228  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3229  *                               (Descriptors) for all queues
3230  *  @adapter: board private structure
3231  *
3232  *  Return 0 on success, negative on failure
3233  **/
3234 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3235 {
3236         struct pci_dev *pdev = adapter->pdev;
3237         int i, err = 0;
3238
3239         for (i = 0; i < adapter->num_tx_queues; i++) {
3240                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3241                 if (err) {
3242                         dev_err(&pdev->dev,
3243                                 "Allocation for Tx Queue %u failed\n", i);
3244                         for (i--; i >= 0; i--)
3245                                 igb_free_tx_resources(adapter->tx_ring[i]);
3246                         break;
3247                 }
3248         }
3249
3250         return err;
3251 }
3252
3253 /**
3254  *  igb_setup_tctl - configure the transmit control registers
3255  *  @adapter: Board private structure
3256  **/
3257 void igb_setup_tctl(struct igb_adapter *adapter)
3258 {
3259         struct e1000_hw *hw = &adapter->hw;
3260         u32 tctl;
3261
3262         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3263         wr32(E1000_TXDCTL(0), 0);
3264
3265         /* Program the Transmit Control Register */
3266         tctl = rd32(E1000_TCTL);
3267         tctl &= ~E1000_TCTL_CT;
3268         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3269                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3270
3271         igb_config_collision_dist(hw);
3272
3273         /* Enable transmits */
3274         tctl |= E1000_TCTL_EN;
3275
3276         wr32(E1000_TCTL, tctl);
3277 }
3278
3279 /**
3280  *  igb_configure_tx_ring - Configure transmit ring after Reset
3281  *  @adapter: board private structure
3282  *  @ring: tx ring to configure
3283  *
3284  *  Configure a transmit ring after a reset.
3285  **/
3286 void igb_configure_tx_ring(struct igb_adapter *adapter,
3287                            struct igb_ring *ring)
3288 {
3289         struct e1000_hw *hw = &adapter->hw;
3290         u32 txdctl = 0;
3291         u64 tdba = ring->dma;
3292         int reg_idx = ring->reg_idx;
3293
3294         /* disable the queue */
3295         wr32(E1000_TXDCTL(reg_idx), 0);
3296         wrfl();
3297         mdelay(10);
3298
3299         wr32(E1000_TDLEN(reg_idx),
3300              ring->count * sizeof(union e1000_adv_tx_desc));
3301         wr32(E1000_TDBAL(reg_idx),
3302              tdba & 0x00000000ffffffffULL);
3303         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3304
3305         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
3306         wr32(E1000_TDH(reg_idx), 0);
3307         writel(0, ring->tail);
3308
3309         txdctl |= IGB_TX_PTHRESH;
3310         txdctl |= IGB_TX_HTHRESH << 8;
3311         txdctl |= IGB_TX_WTHRESH << 16;
3312
3313         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3314         wr32(E1000_TXDCTL(reg_idx), txdctl);
3315 }
3316
3317 /**
3318  *  igb_configure_tx - Configure transmit Unit after Reset
3319  *  @adapter: board private structure
3320  *
3321  *  Configure the Tx unit of the MAC after a reset.
3322  **/
3323 static void igb_configure_tx(struct igb_adapter *adapter)
3324 {
3325         int i;
3326
3327         for (i = 0; i < adapter->num_tx_queues; i++)
3328                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3329 }
3330
3331 /**
3332  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3333  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3334  *
3335  *  Returns 0 on success, negative on failure
3336  **/
3337 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3338 {
3339         struct device *dev = rx_ring->dev;
3340         int size;
3341
3342         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3343
3344         rx_ring->rx_buffer_info = vzalloc(size);
3345         if (!rx_ring->rx_buffer_info)
3346                 goto err;
3347
3348         /* Round up to nearest 4K */
3349         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3350         rx_ring->size = ALIGN(rx_ring->size, 4096);
3351
3352         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3353                                            &rx_ring->dma, GFP_KERNEL);
3354         if (!rx_ring->desc)
3355                 goto err;
3356
3357         rx_ring->next_to_alloc = 0;
3358         rx_ring->next_to_clean = 0;
3359         rx_ring->next_to_use = 0;
3360
3361         return 0;
3362
3363 err:
3364         vfree(rx_ring->rx_buffer_info);
3365         rx_ring->rx_buffer_info = NULL;
3366         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3367         return -ENOMEM;
3368 }
3369
3370 /**
3371  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3372  *                               (Descriptors) for all queues
3373  *  @adapter: board private structure
3374  *
3375  *  Return 0 on success, negative on failure
3376  **/
3377 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3378 {
3379         struct pci_dev *pdev = adapter->pdev;
3380         int i, err = 0;
3381
3382         for (i = 0; i < adapter->num_rx_queues; i++) {
3383                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3384                 if (err) {
3385                         dev_err(&pdev->dev,
3386                                 "Allocation for Rx Queue %u failed\n", i);
3387                         for (i--; i >= 0; i--)
3388                                 igb_free_rx_resources(adapter->rx_ring[i]);
3389                         break;
3390                 }
3391         }
3392
3393         return err;
3394 }
3395
3396 /**
3397  *  igb_setup_mrqc - configure the multiple receive queue control registers
3398  *  @adapter: Board private structure
3399  **/
3400 static void igb_setup_mrqc(struct igb_adapter *adapter)
3401 {
3402         struct e1000_hw *hw = &adapter->hw;
3403         u32 mrqc, rxcsum;
3404         u32 j, num_rx_queues;
3405         u32 rss_key[10];
3406
3407         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3408         for (j = 0; j < 10; j++)
3409                 wr32(E1000_RSSRK(j), rss_key[j]);
3410
3411         num_rx_queues = adapter->rss_queues;
3412
3413         switch (hw->mac.type) {
3414         case e1000_82576:
3415                 /* 82576 supports 2 RSS queues for SR-IOV */
3416                 if (adapter->vfs_allocated_count)
3417                         num_rx_queues = 2;
3418                 break;
3419         default:
3420                 break;
3421         }
3422
3423         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3424                 for (j = 0; j < IGB_RETA_SIZE; j++)
3425                         adapter->rss_indir_tbl[j] =
3426                         (j * num_rx_queues) / IGB_RETA_SIZE;
3427                 adapter->rss_indir_tbl_init = num_rx_queues;
3428         }
3429         igb_write_rss_indir_tbl(adapter);
3430
3431         /* Disable raw packet checksumming so that RSS hash is placed in
3432          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3433          * offloads as they are enabled by default
3434          */
3435         rxcsum = rd32(E1000_RXCSUM);
3436         rxcsum |= E1000_RXCSUM_PCSD;
3437
3438         if (adapter->hw.mac.type >= e1000_82576)
3439                 /* Enable Receive Checksum Offload for SCTP */
3440                 rxcsum |= E1000_RXCSUM_CRCOFL;
3441
3442         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3443         wr32(E1000_RXCSUM, rxcsum);
3444
3445         /* Generate RSS hash based on packet types, TCP/UDP
3446          * port numbers and/or IPv4/v6 src and dst addresses
3447          */
3448         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3449                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3450                E1000_MRQC_RSS_FIELD_IPV6 |
3451                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3452                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3453
3454         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3455                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3456         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3457                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3458
3459         /* If VMDq is enabled then we set the appropriate mode for that, else
3460          * we default to RSS so that an RSS hash is calculated per packet even
3461          * if we are only using one queue
3462          */
3463         if (adapter->vfs_allocated_count) {
3464                 if (hw->mac.type > e1000_82575) {
3465                         /* Set the default pool for the PF's first queue */
3466                         u32 vtctl = rd32(E1000_VT_CTL);
3467
3468                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3469                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3470                         vtctl |= adapter->vfs_allocated_count <<
3471                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3472                         wr32(E1000_VT_CTL, vtctl);
3473                 }
3474                 if (adapter->rss_queues > 1)
3475                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3476                 else
3477                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3478         } else {
3479                 if (hw->mac.type != e1000_i211)
3480                         mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3481         }
3482         igb_vmm_control(adapter);
3483
3484         wr32(E1000_MRQC, mrqc);
3485 }
3486
3487 /**
3488  *  igb_setup_rctl - configure the receive control registers
3489  *  @adapter: Board private structure
3490  **/
3491 void igb_setup_rctl(struct igb_adapter *adapter)
3492 {
3493         struct e1000_hw *hw = &adapter->hw;
3494         u32 rctl;
3495
3496         rctl = rd32(E1000_RCTL);
3497
3498         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3499         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3500
3501         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3502                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3503
3504         /* enable stripping of CRC. It's unlikely this will break BMC
3505          * redirection as it did with e1000. Newer features require
3506          * that the HW strips the CRC.
3507          */
3508         rctl |= E1000_RCTL_SECRC;
3509
3510         /* disable store bad packets and clear size bits. */
3511         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3512
3513         /* enable LPE to prevent packets larger than max_frame_size */
3514         rctl |= E1000_RCTL_LPE;
3515
3516         /* disable queue 0 to prevent tail write w/o re-config */
3517         wr32(E1000_RXDCTL(0), 0);
3518
3519         /* Attention!!!  For SR-IOV PF driver operations you must enable
3520          * queue drop for all VF and PF queues to prevent head of line blocking
3521          * if an un-trusted VF does not provide descriptors to hardware.
3522          */
3523         if (adapter->vfs_allocated_count) {
3524                 /* set all queue drop enable bits */
3525                 wr32(E1000_QDE, ALL_QUEUES);
3526         }
3527
3528         /* This is useful for sniffing bad packets. */
3529         if (adapter->netdev->features & NETIF_F_RXALL) {
3530                 /* UPE and MPE will be handled by normal PROMISC logic
3531                  * in e1000e_set_rx_mode
3532                  */
3533                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3534                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3535                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3536
3537                 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3538                           E1000_RCTL_DPF | /* Allow filtered pause */
3539                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3540                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3541                  * and that breaks VLANs.
3542                  */
3543         }
3544
3545         wr32(E1000_RCTL, rctl);
3546 }
3547
3548 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3549                                    int vfn)
3550 {
3551         struct e1000_hw *hw = &adapter->hw;
3552         u32 vmolr;
3553
3554         /* if it isn't the PF check to see if VFs are enabled and
3555          * increase the size to support vlan tags
3556          */
3557         if (vfn < adapter->vfs_allocated_count &&
3558             adapter->vf_data[vfn].vlans_enabled)
3559                 size += VLAN_TAG_SIZE;
3560
3561         vmolr = rd32(E1000_VMOLR(vfn));
3562         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3563         vmolr |= size | E1000_VMOLR_LPE;
3564         wr32(E1000_VMOLR(vfn), vmolr);
3565
3566         return 0;
3567 }
3568
3569 /**
3570  *  igb_rlpml_set - set maximum receive packet size
3571  *  @adapter: board private structure
3572  *
3573  *  Configure maximum receivable packet size.
3574  **/
3575 static void igb_rlpml_set(struct igb_adapter *adapter)
3576 {
3577         u32 max_frame_size = adapter->max_frame_size;
3578         struct e1000_hw *hw = &adapter->hw;
3579         u16 pf_id = adapter->vfs_allocated_count;
3580
3581         if (pf_id) {
3582                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3583                 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3584                  * to our max jumbo frame size, in case we need to enable
3585                  * jumbo frames on one of the rings later.
3586                  * This will not pass over-length frames into the default
3587                  * queue because it's gated by the VMOLR.RLPML.
3588                  */
3589                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3590         }
3591
3592         wr32(E1000_RLPML, max_frame_size);
3593 }
3594
3595 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3596                                  int vfn, bool aupe)
3597 {
3598         struct e1000_hw *hw = &adapter->hw;
3599         u32 vmolr;
3600
3601         /* This register exists only on 82576 and newer so if we are older then
3602          * we should exit and do nothing
3603          */
3604         if (hw->mac.type < e1000_82576)
3605                 return;
3606
3607         vmolr = rd32(E1000_VMOLR(vfn));
3608         vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3609         if (hw->mac.type == e1000_i350) {
3610                 u32 dvmolr;
3611
3612                 dvmolr = rd32(E1000_DVMOLR(vfn));
3613                 dvmolr |= E1000_DVMOLR_STRVLAN;
3614                 wr32(E1000_DVMOLR(vfn), dvmolr);
3615         }
3616         if (aupe)
3617                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3618         else
3619                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3620
3621         /* clear all bits that might not be set */
3622         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3623
3624         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3625                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3626         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3627          * multicast packets
3628          */
3629         if (vfn <= adapter->vfs_allocated_count)
3630                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3631
3632         wr32(E1000_VMOLR(vfn), vmolr);
3633 }
3634
3635 /**
3636  *  igb_configure_rx_ring - Configure a receive ring after Reset
3637  *  @adapter: board private structure
3638  *  @ring: receive ring to be configured
3639  *
3640  *  Configure the Rx unit of the MAC after a reset.
3641  **/
3642 void igb_configure_rx_ring(struct igb_adapter *adapter,
3643                            struct igb_ring *ring)
3644 {
3645         struct e1000_hw *hw = &adapter->hw;
3646         u64 rdba = ring->dma;
3647         int reg_idx = ring->reg_idx;
3648         u32 srrctl = 0, rxdctl = 0;
3649
3650         /* disable the queue */
3651         wr32(E1000_RXDCTL(reg_idx), 0);
3652
3653         /* Set DMA base address registers */
3654         wr32(E1000_RDBAL(reg_idx),
3655              rdba & 0x00000000ffffffffULL);
3656         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3657         wr32(E1000_RDLEN(reg_idx),
3658              ring->count * sizeof(union e1000_adv_rx_desc));
3659
3660         /* initialize head and tail */
3661         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
3662         wr32(E1000_RDH(reg_idx), 0);
3663         writel(0, ring->tail);
3664
3665         /* set descriptor configuration */
3666         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3667         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3668         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3669         if (hw->mac.type >= e1000_82580)
3670                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3671         /* Only set Drop Enable if we are supporting multiple queues */
3672         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3673                 srrctl |= E1000_SRRCTL_DROP_EN;
3674
3675         wr32(E1000_SRRCTL(reg_idx), srrctl);
3676
3677         /* set filtering for VMDQ pools */
3678         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3679
3680         rxdctl |= IGB_RX_PTHRESH;
3681         rxdctl |= IGB_RX_HTHRESH << 8;
3682         rxdctl |= IGB_RX_WTHRESH << 16;
3683
3684         /* enable receive descriptor fetching */
3685         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3686         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3687 }
3688
3689 /**
3690  *  igb_configure_rx - Configure receive Unit after Reset
3691  *  @adapter: board private structure
3692  *
3693  *  Configure the Rx unit of the MAC after a reset.
3694  **/
3695 static void igb_configure_rx(struct igb_adapter *adapter)
3696 {
3697         int i;
3698
3699         /* set UTA to appropriate mode */
3700         igb_set_uta(adapter);
3701
3702         /* set the correct pool for the PF default MAC address in entry 0 */
3703         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3704                          adapter->vfs_allocated_count);
3705
3706         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3707          * the Base and Length of the Rx Descriptor Ring
3708          */
3709         for (i = 0; i < adapter->num_rx_queues; i++)
3710                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3711 }
3712
3713 /**
3714  *  igb_free_tx_resources - Free Tx Resources per Queue
3715  *  @tx_ring: Tx descriptor ring for a specific queue
3716  *
3717  *  Free all transmit software resources
3718  **/
3719 void igb_free_tx_resources(struct igb_ring *tx_ring)
3720 {
3721         igb_clean_tx_ring(tx_ring);
3722
3723         vfree(tx_ring->tx_buffer_info);
3724         tx_ring->tx_buffer_info = NULL;
3725
3726         /* if not set, then don't free */
3727         if (!tx_ring->desc)
3728                 return;
3729
3730         dma_free_coherent(tx_ring->dev, tx_ring->size,
3731                           tx_ring->desc, tx_ring->dma);
3732
3733         tx_ring->desc = NULL;
3734 }
3735
3736 /**
3737  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3738  *  @adapter: board private structure
3739  *
3740  *  Free all transmit software resources
3741  **/
3742 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3743 {
3744         int i;
3745
3746         for (i = 0; i < adapter->num_tx_queues; i++)
3747                 if (adapter->tx_ring[i])
3748                         igb_free_tx_resources(adapter->tx_ring[i]);
3749 }
3750
3751 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3752                                     struct igb_tx_buffer *tx_buffer)
3753 {
3754         if (tx_buffer->skb) {
3755                 dev_kfree_skb_any(tx_buffer->skb);
3756                 if (dma_unmap_len(tx_buffer, len))
3757                         dma_unmap_single(ring->dev,
3758                                          dma_unmap_addr(tx_buffer, dma),
3759                                          dma_unmap_len(tx_buffer, len),
3760                                          DMA_TO_DEVICE);
3761         } else if (dma_unmap_len(tx_buffer, len)) {
3762                 dma_unmap_page(ring->dev,
3763                                dma_unmap_addr(tx_buffer, dma),
3764                                dma_unmap_len(tx_buffer, len),
3765                                DMA_TO_DEVICE);
3766         }
3767         tx_buffer->next_to_watch = NULL;
3768         tx_buffer->skb = NULL;
3769         dma_unmap_len_set(tx_buffer, len, 0);
3770         /* buffer_info must be completely set up in the transmit path */
3771 }
3772
3773 /**
3774  *  igb_clean_tx_ring - Free Tx Buffers
3775  *  @tx_ring: ring to be cleaned
3776  **/
3777 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3778 {
3779         struct igb_tx_buffer *buffer_info;
3780         unsigned long size;
3781         u16 i;
3782
3783         if (!tx_ring->tx_buffer_info)
3784                 return;
3785         /* Free all the Tx ring sk_buffs */
3786
3787         for (i = 0; i < tx_ring->count; i++) {
3788                 buffer_info = &tx_ring->tx_buffer_info[i];
3789                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3790         }
3791
3792         netdev_tx_reset_queue(txring_txq(tx_ring));
3793
3794         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3795         memset(tx_ring->tx_buffer_info, 0, size);
3796
3797         /* Zero out the descriptor ring */
3798         memset(tx_ring->desc, 0, tx_ring->size);
3799
3800         tx_ring->next_to_use = 0;
3801         tx_ring->next_to_clean = 0;
3802 }
3803
3804 /**
3805  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3806  *  @adapter: board private structure
3807  **/
3808 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3809 {
3810         int i;
3811
3812         for (i = 0; i < adapter->num_tx_queues; i++)
3813                 if (adapter->tx_ring[i])
3814                         igb_clean_tx_ring(adapter->tx_ring[i]);
3815 }
3816
3817 /**
3818  *  igb_free_rx_resources - Free Rx Resources
3819  *  @rx_ring: ring to clean the resources from
3820  *
3821  *  Free all receive software resources
3822  **/
3823 void igb_free_rx_resources(struct igb_ring *rx_ring)
3824 {
3825         igb_clean_rx_ring(rx_ring);
3826
3827         vfree(rx_ring->rx_buffer_info);
3828         rx_ring->rx_buffer_info = NULL;
3829
3830         /* if not set, then don't free */
3831         if (!rx_ring->desc)
3832                 return;
3833
3834         dma_free_coherent(rx_ring->dev, rx_ring->size,
3835                           rx_ring->desc, rx_ring->dma);
3836
3837         rx_ring->desc = NULL;
3838 }
3839
3840 /**
3841  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3842  *  @adapter: board private structure
3843  *
3844  *  Free all receive software resources
3845  **/
3846 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3847 {
3848         int i;
3849
3850         for (i = 0; i < adapter->num_rx_queues; i++)
3851                 if (adapter->rx_ring[i])
3852                         igb_free_rx_resources(adapter->rx_ring[i]);
3853 }
3854
3855 /**
3856  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3857  *  @rx_ring: ring to free buffers from
3858  **/
3859 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3860 {
3861         unsigned long size;
3862         u16 i;
3863
3864         if (rx_ring->skb)
3865                 dev_kfree_skb(rx_ring->skb);
3866         rx_ring->skb = NULL;
3867
3868         if (!rx_ring->rx_buffer_info)
3869                 return;
3870
3871         /* Free all the Rx ring sk_buffs */
3872         for (i = 0; i < rx_ring->count; i++) {
3873                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3874
3875                 if (!buffer_info->page)
3876                         continue;
3877
3878                 dma_unmap_page(rx_ring->dev,
3879                                buffer_info->dma,
3880                                PAGE_SIZE,
3881                                DMA_FROM_DEVICE);
3882                 __free_page(buffer_info->page);
3883
3884                 buffer_info->page = NULL;
3885         }
3886
3887         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3888         memset(rx_ring->rx_buffer_info, 0, size);
3889
3890         /* Zero out the descriptor ring */
3891         memset(rx_ring->desc, 0, rx_ring->size);
3892
3893         rx_ring->next_to_alloc = 0;
3894         rx_ring->next_to_clean = 0;
3895         rx_ring->next_to_use = 0;
3896 }
3897
3898 /**
3899  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3900  *  @adapter: board private structure
3901  **/
3902 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3903 {
3904         int i;
3905
3906         for (i = 0; i < adapter->num_rx_queues; i++)
3907                 if (adapter->rx_ring[i])
3908                         igb_clean_rx_ring(adapter->rx_ring[i]);
3909 }
3910
3911 /**
3912  *  igb_set_mac - Change the Ethernet Address of the NIC
3913  *  @netdev: network interface device structure
3914  *  @p: pointer to an address structure
3915  *
3916  *  Returns 0 on success, negative on failure
3917  **/
3918 static int igb_set_mac(struct net_device *netdev, void *p)
3919 {
3920         struct igb_adapter *adapter = netdev_priv(netdev);
3921         struct e1000_hw *hw = &adapter->hw;
3922         struct sockaddr *addr = p;
3923
3924         if (!is_valid_ether_addr(addr->sa_data))
3925                 return -EADDRNOTAVAIL;
3926
3927         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3928         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3929
3930         /* set the correct pool for the new PF MAC address in entry 0 */
3931         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3932                          adapter->vfs_allocated_count);
3933
3934         return 0;
3935 }
3936
3937 /**
3938  *  igb_write_mc_addr_list - write multicast addresses to MTA
3939  *  @netdev: network interface device structure
3940  *
3941  *  Writes multicast address list to the MTA hash table.
3942  *  Returns: -ENOMEM on failure
3943  *           0 on no addresses written
3944  *           X on writing X addresses to MTA
3945  **/
3946 static int igb_write_mc_addr_list(struct net_device *netdev)
3947 {
3948         struct igb_adapter *adapter = netdev_priv(netdev);
3949         struct e1000_hw *hw = &adapter->hw;
3950         struct netdev_hw_addr *ha;
3951         u8  *mta_list;
3952         int i;
3953
3954         if (netdev_mc_empty(netdev)) {
3955                 /* nothing to program, so clear mc list */
3956                 igb_update_mc_addr_list(hw, NULL, 0);
3957                 igb_restore_vf_multicasts(adapter);
3958                 return 0;
3959         }
3960
3961         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3962         if (!mta_list)
3963                 return -ENOMEM;
3964
3965         /* The shared function expects a packed array of only addresses. */
3966         i = 0;
3967         netdev_for_each_mc_addr(ha, netdev)
3968                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3969
3970         igb_update_mc_addr_list(hw, mta_list, i);
3971         kfree(mta_list);
3972
3973         return netdev_mc_count(netdev);
3974 }
3975
3976 /**
3977  *  igb_write_uc_addr_list - write unicast addresses to RAR table
3978  *  @netdev: network interface device structure
3979  *
3980  *  Writes unicast address list to the RAR table.
3981  *  Returns: -ENOMEM on failure/insufficient address space
3982  *           0 on no addresses written
3983  *           X on writing X addresses to the RAR table
3984  **/
3985 static int igb_write_uc_addr_list(struct net_device *netdev)
3986 {
3987         struct igb_adapter *adapter = netdev_priv(netdev);
3988         struct e1000_hw *hw = &adapter->hw;
3989         unsigned int vfn = adapter->vfs_allocated_count;
3990         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3991         int count = 0;
3992
3993         /* return ENOMEM indicating insufficient memory for addresses */
3994         if (netdev_uc_count(netdev) > rar_entries)
3995                 return -ENOMEM;
3996
3997         if (!netdev_uc_empty(netdev) && rar_entries) {
3998                 struct netdev_hw_addr *ha;
3999
4000                 netdev_for_each_uc_addr(ha, netdev) {
4001                         if (!rar_entries)
4002                                 break;
4003                         igb_rar_set_qsel(adapter, ha->addr,
4004                                          rar_entries--,
4005                                          vfn);
4006                         count++;
4007                 }
4008         }
4009         /* write the addresses in reverse order to avoid write combining */
4010         for (; rar_entries > 0 ; rar_entries--) {
4011                 wr32(E1000_RAH(rar_entries), 0);
4012                 wr32(E1000_RAL(rar_entries), 0);
4013         }
4014         wrfl();
4015
4016         return count;
4017 }
4018
4019 /**
4020  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4021  *  @netdev: network interface device structure
4022  *
4023  *  The set_rx_mode entry point is called whenever the unicast or multicast
4024  *  address lists or the network interface flags are updated.  This routine is
4025  *  responsible for configuring the hardware for proper unicast, multicast,
4026  *  promiscuous mode, and all-multi behavior.
4027  **/
4028 static void igb_set_rx_mode(struct net_device *netdev)
4029 {
4030         struct igb_adapter *adapter = netdev_priv(netdev);
4031         struct e1000_hw *hw = &adapter->hw;
4032         unsigned int vfn = adapter->vfs_allocated_count;
4033         u32 rctl, vmolr = 0;
4034         int count;
4035
4036         /* Check for Promiscuous and All Multicast modes */
4037         rctl = rd32(E1000_RCTL);
4038
4039         /* clear the effected bits */
4040         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4041
4042         if (netdev->flags & IFF_PROMISC) {
4043                 /* retain VLAN HW filtering if in VT mode */
4044                 if (adapter->vfs_allocated_count)
4045                         rctl |= E1000_RCTL_VFE;
4046                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4047                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4048         } else {
4049                 if (netdev->flags & IFF_ALLMULTI) {
4050                         rctl |= E1000_RCTL_MPE;
4051                         vmolr |= E1000_VMOLR_MPME;
4052                 } else {
4053                         /* Write addresses to the MTA, if the attempt fails
4054                          * then we should just turn on promiscuous mode so
4055                          * that we can at least receive multicast traffic
4056                          */
4057                         count = igb_write_mc_addr_list(netdev);
4058                         if (count < 0) {
4059                                 rctl |= E1000_RCTL_MPE;
4060                                 vmolr |= E1000_VMOLR_MPME;
4061                         } else if (count) {
4062                                 vmolr |= E1000_VMOLR_ROMPE;
4063                         }
4064                 }
4065                 /* Write addresses to available RAR registers, if there is not
4066                  * sufficient space to store all the addresses then enable
4067                  * unicast promiscuous mode
4068                  */
4069                 count = igb_write_uc_addr_list(netdev);
4070                 if (count < 0) {
4071                         rctl |= E1000_RCTL_UPE;
4072                         vmolr |= E1000_VMOLR_ROPE;
4073                 }
4074                 rctl |= E1000_RCTL_VFE;
4075         }
4076         wr32(E1000_RCTL, rctl);
4077
4078         /* In order to support SR-IOV and eventually VMDq it is necessary to set
4079          * the VMOLR to enable the appropriate modes.  Without this workaround
4080          * we will have issues with VLAN tag stripping not being done for frames
4081          * that are only arriving because we are the default pool
4082          */
4083         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4084                 return;
4085
4086         vmolr |= rd32(E1000_VMOLR(vfn)) &
4087                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4088         wr32(E1000_VMOLR(vfn), vmolr);
4089         igb_restore_vf_multicasts(adapter);
4090 }
4091
4092 static void igb_check_wvbr(struct igb_adapter *adapter)
4093 {
4094         struct e1000_hw *hw = &adapter->hw;
4095         u32 wvbr = 0;
4096
4097         switch (hw->mac.type) {
4098         case e1000_82576:
4099         case e1000_i350:
4100                 wvbr = rd32(E1000_WVBR);
4101                 if (!wvbr)
4102                         return;
4103                 break;
4104         default:
4105                 break;
4106         }
4107
4108         adapter->wvbr |= wvbr;
4109 }
4110
4111 #define IGB_STAGGERED_QUEUE_OFFSET 8
4112
4113 static void igb_spoof_check(struct igb_adapter *adapter)
4114 {
4115         int j;
4116
4117         if (!adapter->wvbr)
4118                 return;
4119
4120         for (j = 0; j < adapter->vfs_allocated_count; j++) {
4121                 if (adapter->wvbr & (1 << j) ||
4122                     adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4123                         dev_warn(&adapter->pdev->dev,
4124                                 "Spoof event(s) detected on VF %d\n", j);
4125                         adapter->wvbr &=
4126                                 ~((1 << j) |
4127                                   (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4128                 }
4129         }
4130 }
4131
4132 /* Need to wait a few seconds after link up to get diagnostic information from
4133  * the phy
4134  */
4135 static void igb_update_phy_info(unsigned long data)
4136 {
4137         struct igb_adapter *adapter = (struct igb_adapter *) data;
4138         igb_get_phy_info(&adapter->hw);
4139 }
4140
4141 /**
4142  *  igb_has_link - check shared code for link and determine up/down
4143  *  @adapter: pointer to driver private info
4144  **/
4145 bool igb_has_link(struct igb_adapter *adapter)
4146 {
4147         struct e1000_hw *hw = &adapter->hw;
4148         bool link_active = false;
4149
4150         /* get_link_status is set on LSC (link status) interrupt or
4151          * rx sequence error interrupt.  get_link_status will stay
4152          * false until the e1000_check_for_link establishes link
4153          * for copper adapters ONLY
4154          */
4155         switch (hw->phy.media_type) {
4156         case e1000_media_type_copper:
4157                 if (!hw->mac.get_link_status)
4158                         return true;
4159         case e1000_media_type_internal_serdes:
4160                 hw->mac.ops.check_for_link(hw);
4161                 link_active = !hw->mac.get_link_status;
4162                 break;
4163         default:
4164         case e1000_media_type_unknown:
4165                 break;
4166         }
4167
4168         if (((hw->mac.type == e1000_i210) ||
4169              (hw->mac.type == e1000_i211)) &&
4170              (hw->phy.id == I210_I_PHY_ID)) {
4171                 if (!netif_carrier_ok(adapter->netdev)) {
4172                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4173                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4174                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4175                         adapter->link_check_timeout = jiffies;
4176                 }
4177         }
4178
4179         return link_active;
4180 }
4181
4182 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4183 {
4184         bool ret = false;
4185         u32 ctrl_ext, thstat;
4186
4187         /* check for thermal sensor event on i350 copper only */
4188         if (hw->mac.type == e1000_i350) {
4189                 thstat = rd32(E1000_THSTAT);
4190                 ctrl_ext = rd32(E1000_CTRL_EXT);
4191
4192                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4193                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4194                         ret = !!(thstat & event);
4195         }
4196
4197         return ret;
4198 }
4199
4200 /**
4201  *  igb_check_lvmmc - check for malformed packets received
4202  *  and indicated in LVMMC register
4203  *  @adapter: pointer to adapter
4204  **/
4205 static void igb_check_lvmmc(struct igb_adapter *adapter)
4206 {
4207         struct e1000_hw *hw = &adapter->hw;
4208         u32 lvmmc;
4209
4210         lvmmc = rd32(E1000_LVMMC);
4211         if (lvmmc) {
4212                 if (unlikely(net_ratelimit())) {
4213                         netdev_warn(adapter->netdev,
4214                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4215                                     lvmmc);
4216                 }
4217         }
4218 }
4219
4220 /**
4221  *  igb_watchdog - Timer Call-back
4222  *  @data: pointer to adapter cast into an unsigned long
4223  **/
4224 static void igb_watchdog(unsigned long data)
4225 {
4226         struct igb_adapter *adapter = (struct igb_adapter *)data;
4227         /* Do the rest outside of interrupt context */
4228         schedule_work(&adapter->watchdog_task);
4229 }
4230
4231 static void igb_watchdog_task(struct work_struct *work)
4232 {
4233         struct igb_adapter *adapter = container_of(work,
4234                                                    struct igb_adapter,
4235                                                    watchdog_task);
4236         struct e1000_hw *hw = &adapter->hw;
4237         struct e1000_phy_info *phy = &hw->phy;
4238         struct net_device *netdev = adapter->netdev;
4239         u32 link;
4240         int i;
4241         u32 connsw;
4242
4243         link = igb_has_link(adapter);
4244
4245         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4246                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4247                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4248                 else
4249                         link = false;
4250         }
4251
4252         /* Force link down if we have fiber to swap to */
4253         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4254                 if (hw->phy.media_type == e1000_media_type_copper) {
4255                         connsw = rd32(E1000_CONNSW);
4256                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4257                                 link = 0;
4258                 }
4259         }
4260         if (link) {
4261                 /* Perform a reset if the media type changed. */
4262                 if (hw->dev_spec._82575.media_changed) {
4263                         hw->dev_spec._82575.media_changed = false;
4264                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4265                         igb_reset(adapter);
4266                 }
4267                 /* Cancel scheduled suspend requests. */
4268                 pm_runtime_resume(netdev->dev.parent);
4269
4270                 if (!netif_carrier_ok(netdev)) {
4271                         u32 ctrl;
4272
4273                         hw->mac.ops.get_speed_and_duplex(hw,
4274                                                          &adapter->link_speed,
4275                                                          &adapter->link_duplex);
4276
4277                         ctrl = rd32(E1000_CTRL);
4278                         /* Links status message must follow this format */
4279                         netdev_info(netdev,
4280                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4281                                netdev->name,
4282                                adapter->link_speed,
4283                                adapter->link_duplex == FULL_DUPLEX ?
4284                                "Full" : "Half",
4285                                (ctrl & E1000_CTRL_TFCE) &&
4286                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4287                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4288                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4289
4290                         /* disable EEE if enabled */
4291                         if ((adapter->flags & IGB_FLAG_EEE) &&
4292                                 (adapter->link_duplex == HALF_DUPLEX)) {
4293                                 dev_info(&adapter->pdev->dev,
4294                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4295                                 adapter->hw.dev_spec._82575.eee_disable = true;
4296                                 adapter->flags &= ~IGB_FLAG_EEE;
4297                         }
4298
4299                         /* check if SmartSpeed worked */
4300                         igb_check_downshift(hw);
4301                         if (phy->speed_downgraded)
4302                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4303
4304                         /* check for thermal sensor event */
4305                         if (igb_thermal_sensor_event(hw,
4306                             E1000_THSTAT_LINK_THROTTLE))
4307                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
4308
4309                         /* adjust timeout factor according to speed/duplex */
4310                         adapter->tx_timeout_factor = 1;
4311                         switch (adapter->link_speed) {
4312                         case SPEED_10:
4313                                 adapter->tx_timeout_factor = 14;
4314                                 break;
4315                         case SPEED_100:
4316                                 /* maybe add some timeout factor ? */
4317                                 break;
4318                         }
4319
4320                         netif_carrier_on(netdev);
4321
4322                         igb_ping_all_vfs(adapter);
4323                         igb_check_vf_rate_limit(adapter);
4324
4325                         /* link state has changed, schedule phy info update */
4326                         if (!test_bit(__IGB_DOWN, &adapter->state))
4327                                 mod_timer(&adapter->phy_info_timer,
4328                                           round_jiffies(jiffies + 2 * HZ));
4329                 }
4330         } else {
4331                 if (netif_carrier_ok(netdev)) {
4332                         adapter->link_speed = 0;
4333                         adapter->link_duplex = 0;
4334
4335                         /* check for thermal sensor event */
4336                         if (igb_thermal_sensor_event(hw,
4337                             E1000_THSTAT_PWR_DOWN)) {
4338                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
4339                         }
4340
4341                         /* Links status message must follow this format */
4342                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
4343                                netdev->name);
4344                         netif_carrier_off(netdev);
4345
4346                         igb_ping_all_vfs(adapter);
4347
4348                         /* link state has changed, schedule phy info update */
4349                         if (!test_bit(__IGB_DOWN, &adapter->state))
4350                                 mod_timer(&adapter->phy_info_timer,
4351                                           round_jiffies(jiffies + 2 * HZ));
4352
4353                         /* link is down, time to check for alternate media */
4354                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4355                                 igb_check_swap_media(adapter);
4356                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4357                                         schedule_work(&adapter->reset_task);
4358                                         /* return immediately */
4359                                         return;
4360                                 }
4361                         }
4362                         pm_schedule_suspend(netdev->dev.parent,
4363                                             MSEC_PER_SEC * 5);
4364
4365                 /* also check for alternate media here */
4366                 } else if (!netif_carrier_ok(netdev) &&
4367                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4368                         igb_check_swap_media(adapter);
4369                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4370                                 schedule_work(&adapter->reset_task);
4371                                 /* return immediately */
4372                                 return;
4373                         }
4374                 }
4375         }
4376
4377         spin_lock(&adapter->stats64_lock);
4378         igb_update_stats(adapter, &adapter->stats64);
4379         spin_unlock(&adapter->stats64_lock);
4380
4381         for (i = 0; i < adapter->num_tx_queues; i++) {
4382                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4383                 if (!netif_carrier_ok(netdev)) {
4384                         /* We've lost link, so the controller stops DMA,
4385                          * but we've got queued Tx work that's never going
4386                          * to get done, so reset controller to flush Tx.
4387                          * (Do the reset outside of interrupt context).
4388                          */
4389                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4390                                 adapter->tx_timeout_count++;
4391                                 schedule_work(&adapter->reset_task);
4392                                 /* return immediately since reset is imminent */
4393                                 return;
4394                         }
4395                 }
4396
4397                 /* Force detection of hung controller every watchdog period */
4398                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4399         }
4400
4401         /* Cause software interrupt to ensure Rx ring is cleaned */
4402         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4403                 u32 eics = 0;
4404
4405                 for (i = 0; i < adapter->num_q_vectors; i++)
4406                         eics |= adapter->q_vector[i]->eims_value;
4407                 wr32(E1000_EICS, eics);
4408         } else {
4409                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4410         }
4411
4412         igb_spoof_check(adapter);
4413         igb_ptp_rx_hang(adapter);
4414
4415         /* Check LVMMC register on i350/i354 only */
4416         if ((adapter->hw.mac.type == e1000_i350) ||
4417             (adapter->hw.mac.type == e1000_i354))
4418                 igb_check_lvmmc(adapter);
4419
4420         /* Reset the timer */
4421         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4422                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4423                         mod_timer(&adapter->watchdog_timer,
4424                                   round_jiffies(jiffies +  HZ));
4425                 else
4426                         mod_timer(&adapter->watchdog_timer,
4427                                   round_jiffies(jiffies + 2 * HZ));
4428         }
4429 }
4430
4431 enum latency_range {
4432         lowest_latency = 0,
4433         low_latency = 1,
4434         bulk_latency = 2,
4435         latency_invalid = 255
4436 };
4437
4438 /**
4439  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4440  *  @q_vector: pointer to q_vector
4441  *
4442  *  Stores a new ITR value based on strictly on packet size.  This
4443  *  algorithm is less sophisticated than that used in igb_update_itr,
4444  *  due to the difficulty of synchronizing statistics across multiple
4445  *  receive rings.  The divisors and thresholds used by this function
4446  *  were determined based on theoretical maximum wire speed and testing
4447  *  data, in order to minimize response time while increasing bulk
4448  *  throughput.
4449  *  This functionality is controlled by ethtool's coalescing settings.
4450  *  NOTE:  This function is called only when operating in a multiqueue
4451  *         receive environment.
4452  **/
4453 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4454 {
4455         int new_val = q_vector->itr_val;
4456         int avg_wire_size = 0;
4457         struct igb_adapter *adapter = q_vector->adapter;
4458         unsigned int packets;
4459
4460         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4461          * ints/sec - ITR timer value of 120 ticks.
4462          */
4463         if (adapter->link_speed != SPEED_1000) {
4464                 new_val = IGB_4K_ITR;
4465                 goto set_itr_val;
4466         }
4467
4468         packets = q_vector->rx.total_packets;
4469         if (packets)
4470                 avg_wire_size = q_vector->rx.total_bytes / packets;
4471
4472         packets = q_vector->tx.total_packets;
4473         if (packets)
4474                 avg_wire_size = max_t(u32, avg_wire_size,
4475                                       q_vector->tx.total_bytes / packets);
4476
4477         /* if avg_wire_size isn't set no work was done */
4478         if (!avg_wire_size)
4479                 goto clear_counts;
4480
4481         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4482         avg_wire_size += 24;
4483
4484         /* Don't starve jumbo frames */
4485         avg_wire_size = min(avg_wire_size, 3000);
4486
4487         /* Give a little boost to mid-size frames */
4488         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4489                 new_val = avg_wire_size / 3;
4490         else
4491                 new_val = avg_wire_size / 2;
4492
4493         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4494         if (new_val < IGB_20K_ITR &&
4495             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4496              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4497                 new_val = IGB_20K_ITR;
4498
4499 set_itr_val:
4500         if (new_val != q_vector->itr_val) {
4501                 q_vector->itr_val = new_val;
4502                 q_vector->set_itr = 1;
4503         }
4504 clear_counts:
4505         q_vector->rx.total_bytes = 0;
4506         q_vector->rx.total_packets = 0;
4507         q_vector->tx.total_bytes = 0;
4508         q_vector->tx.total_packets = 0;
4509 }
4510
4511 /**
4512  *  igb_update_itr - update the dynamic ITR value based on statistics
4513  *  @q_vector: pointer to q_vector
4514  *  @ring_container: ring info to update the itr for
4515  *
4516  *  Stores a new ITR value based on packets and byte
4517  *  counts during the last interrupt.  The advantage of per interrupt
4518  *  computation is faster updates and more accurate ITR for the current
4519  *  traffic pattern.  Constants in this function were computed
4520  *  based on theoretical maximum wire speed and thresholds were set based
4521  *  on testing data as well as attempting to minimize response time
4522  *  while increasing bulk throughput.
4523  *  This functionality is controlled by ethtool's coalescing settings.
4524  *  NOTE:  These calculations are only valid when operating in a single-
4525  *         queue environment.
4526  **/
4527 static void igb_update_itr(struct igb_q_vector *q_vector,
4528                            struct igb_ring_container *ring_container)
4529 {
4530         unsigned int packets = ring_container->total_packets;
4531         unsigned int bytes = ring_container->total_bytes;
4532         u8 itrval = ring_container->itr;
4533
4534         /* no packets, exit with status unchanged */
4535         if (packets == 0)
4536                 return;
4537
4538         switch (itrval) {
4539         case lowest_latency:
4540                 /* handle TSO and jumbo frames */
4541                 if (bytes/packets > 8000)
4542                         itrval = bulk_latency;
4543                 else if ((packets < 5) && (bytes > 512))
4544                         itrval = low_latency;
4545                 break;
4546         case low_latency:  /* 50 usec aka 20000 ints/s */
4547                 if (bytes > 10000) {
4548                         /* this if handles the TSO accounting */
4549                         if (bytes/packets > 8000)
4550                                 itrval = bulk_latency;
4551                         else if ((packets < 10) || ((bytes/packets) > 1200))
4552                                 itrval = bulk_latency;
4553                         else if ((packets > 35))
4554                                 itrval = lowest_latency;
4555                 } else if (bytes/packets > 2000) {
4556                         itrval = bulk_latency;
4557                 } else if (packets <= 2 && bytes < 512) {
4558                         itrval = lowest_latency;
4559                 }
4560                 break;
4561         case bulk_latency: /* 250 usec aka 4000 ints/s */
4562                 if (bytes > 25000) {
4563                         if (packets > 35)
4564                                 itrval = low_latency;
4565                 } else if (bytes < 1500) {
4566                         itrval = low_latency;
4567                 }
4568                 break;
4569         }
4570
4571         /* clear work counters since we have the values we need */
4572         ring_container->total_bytes = 0;
4573         ring_container->total_packets = 0;
4574
4575         /* write updated itr to ring container */
4576         ring_container->itr = itrval;
4577 }
4578
4579 static void igb_set_itr(struct igb_q_vector *q_vector)
4580 {
4581         struct igb_adapter *adapter = q_vector->adapter;
4582         u32 new_itr = q_vector->itr_val;
4583         u8 current_itr = 0;
4584
4585         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4586         if (adapter->link_speed != SPEED_1000) {
4587                 current_itr = 0;
4588                 new_itr = IGB_4K_ITR;
4589                 goto set_itr_now;
4590         }
4591
4592         igb_update_itr(q_vector, &q_vector->tx);
4593         igb_update_itr(q_vector, &q_vector->rx);
4594
4595         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4596
4597         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4598         if (current_itr == lowest_latency &&
4599             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4600              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4601                 current_itr = low_latency;
4602
4603         switch (current_itr) {
4604         /* counts and packets in update_itr are dependent on these numbers */
4605         case lowest_latency:
4606                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4607                 break;
4608         case low_latency:
4609                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4610                 break;
4611         case bulk_latency:
4612                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4613                 break;
4614         default:
4615                 break;
4616         }
4617
4618 set_itr_now:
4619         if (new_itr != q_vector->itr_val) {
4620                 /* this attempts to bias the interrupt rate towards Bulk
4621                  * by adding intermediate steps when interrupt rate is
4622                  * increasing
4623                  */
4624                 new_itr = new_itr > q_vector->itr_val ?
4625                           max((new_itr * q_vector->itr_val) /
4626                           (new_itr + (q_vector->itr_val >> 2)),
4627                           new_itr) : new_itr;
4628                 /* Don't write the value here; it resets the adapter's
4629                  * internal timer, and causes us to delay far longer than
4630                  * we should between interrupts.  Instead, we write the ITR
4631                  * value at the beginning of the next interrupt so the timing
4632                  * ends up being correct.
4633                  */
4634                 q_vector->itr_val = new_itr;
4635                 q_vector->set_itr = 1;
4636         }
4637 }
4638
4639 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4640                             u32 type_tucmd, u32 mss_l4len_idx)
4641 {
4642         struct e1000_adv_tx_context_desc *context_desc;
4643         u16 i = tx_ring->next_to_use;
4644
4645         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4646
4647         i++;
4648         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4649
4650         /* set bits to identify this as an advanced context descriptor */
4651         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4652
4653         /* For 82575, context index must be unique per ring. */
4654         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4655                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4656
4657         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4658         context_desc->seqnum_seed       = 0;
4659         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4660         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4661 }
4662
4663 static int igb_tso(struct igb_ring *tx_ring,
4664                    struct igb_tx_buffer *first,
4665                    u8 *hdr_len)
4666 {
4667         struct sk_buff *skb = first->skb;
4668         u32 vlan_macip_lens, type_tucmd;
4669         u32 mss_l4len_idx, l4len;
4670         int err;
4671
4672         if (skb->ip_summed != CHECKSUM_PARTIAL)
4673                 return 0;
4674
4675         if (!skb_is_gso(skb))
4676                 return 0;
4677
4678         err = skb_cow_head(skb, 0);
4679         if (err < 0)
4680                 return err;
4681
4682         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4683         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4684
4685         if (first->protocol == htons(ETH_P_IP)) {
4686                 struct iphdr *iph = ip_hdr(skb);
4687                 iph->tot_len = 0;
4688                 iph->check = 0;
4689                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4690                                                          iph->daddr, 0,
4691                                                          IPPROTO_TCP,
4692                                                          0);
4693                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4694                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4695                                    IGB_TX_FLAGS_CSUM |
4696                                    IGB_TX_FLAGS_IPV4;
4697         } else if (skb_is_gso_v6(skb)) {
4698                 ipv6_hdr(skb)->payload_len = 0;
4699                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4700                                                        &ipv6_hdr(skb)->daddr,
4701                                                        0, IPPROTO_TCP, 0);
4702                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4703                                    IGB_TX_FLAGS_CSUM;
4704         }
4705
4706         /* compute header lengths */
4707         l4len = tcp_hdrlen(skb);
4708         *hdr_len = skb_transport_offset(skb) + l4len;
4709
4710         /* update gso size and bytecount with header size */
4711         first->gso_segs = skb_shinfo(skb)->gso_segs;
4712         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4713
4714         /* MSS L4LEN IDX */
4715         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4716         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4717
4718         /* VLAN MACLEN IPLEN */
4719         vlan_macip_lens = skb_network_header_len(skb);
4720         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4721         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4722
4723         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4724
4725         return 1;
4726 }
4727
4728 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4729 {
4730         struct sk_buff *skb = first->skb;
4731         u32 vlan_macip_lens = 0;
4732         u32 mss_l4len_idx = 0;
4733         u32 type_tucmd = 0;
4734
4735         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4736                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4737                         return;
4738         } else {
4739                 u8 l4_hdr = 0;
4740
4741                 switch (first->protocol) {
4742                 case htons(ETH_P_IP):
4743                         vlan_macip_lens |= skb_network_header_len(skb);
4744                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4745                         l4_hdr = ip_hdr(skb)->protocol;
4746                         break;
4747                 case htons(ETH_P_IPV6):
4748                         vlan_macip_lens |= skb_network_header_len(skb);
4749                         l4_hdr = ipv6_hdr(skb)->nexthdr;
4750                         break;
4751                 default:
4752                         if (unlikely(net_ratelimit())) {
4753                                 dev_warn(tx_ring->dev,
4754                                          "partial checksum but proto=%x!\n",
4755                                          first->protocol);
4756                         }
4757                         break;
4758                 }
4759
4760                 switch (l4_hdr) {
4761                 case IPPROTO_TCP:
4762                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4763                         mss_l4len_idx = tcp_hdrlen(skb) <<
4764                                         E1000_ADVTXD_L4LEN_SHIFT;
4765                         break;
4766                 case IPPROTO_SCTP:
4767                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4768                         mss_l4len_idx = sizeof(struct sctphdr) <<
4769                                         E1000_ADVTXD_L4LEN_SHIFT;
4770                         break;
4771                 case IPPROTO_UDP:
4772                         mss_l4len_idx = sizeof(struct udphdr) <<
4773                                         E1000_ADVTXD_L4LEN_SHIFT;
4774                         break;
4775                 default:
4776                         if (unlikely(net_ratelimit())) {
4777                                 dev_warn(tx_ring->dev,
4778                                          "partial checksum but l4 proto=%x!\n",
4779                                          l4_hdr);
4780                         }
4781                         break;
4782                 }
4783
4784                 /* update TX checksum flag */
4785                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4786         }
4787
4788         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4789         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4790
4791         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4792 }
4793
4794 #define IGB_SET_FLAG(_input, _flag, _result) \
4795         ((_flag <= _result) ? \
4796          ((u32)(_input & _flag) * (_result / _flag)) : \
4797          ((u32)(_input & _flag) / (_flag / _result)))
4798
4799 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4800 {
4801         /* set type for advanced descriptor with frame checksum insertion */
4802         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4803                        E1000_ADVTXD_DCMD_DEXT |
4804                        E1000_ADVTXD_DCMD_IFCS;
4805
4806         /* set HW vlan bit if vlan is present */
4807         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4808                                  (E1000_ADVTXD_DCMD_VLE));
4809
4810         /* set segmentation bits for TSO */
4811         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4812                                  (E1000_ADVTXD_DCMD_TSE));
4813
4814         /* set timestamp bit if present */
4815         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4816                                  (E1000_ADVTXD_MAC_TSTAMP));
4817
4818         /* insert frame checksum */
4819         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4820
4821         return cmd_type;
4822 }
4823
4824 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4825                                  union e1000_adv_tx_desc *tx_desc,
4826                                  u32 tx_flags, unsigned int paylen)
4827 {
4828         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4829
4830         /* 82575 requires a unique index per ring */
4831         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4832                 olinfo_status |= tx_ring->reg_idx << 4;
4833
4834         /* insert L4 checksum */
4835         olinfo_status |= IGB_SET_FLAG(tx_flags,
4836                                       IGB_TX_FLAGS_CSUM,
4837                                       (E1000_TXD_POPTS_TXSM << 8));
4838
4839         /* insert IPv4 checksum */
4840         olinfo_status |= IGB_SET_FLAG(tx_flags,
4841                                       IGB_TX_FLAGS_IPV4,
4842                                       (E1000_TXD_POPTS_IXSM << 8));
4843
4844         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4845 }
4846
4847 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4848 {
4849         struct net_device *netdev = tx_ring->netdev;
4850
4851         netif_stop_subqueue(netdev, tx_ring->queue_index);
4852
4853         /* Herbert's original patch had:
4854          *  smp_mb__after_netif_stop_queue();
4855          * but since that doesn't exist yet, just open code it.
4856          */
4857         smp_mb();
4858
4859         /* We need to check again in a case another CPU has just
4860          * made room available.
4861          */
4862         if (igb_desc_unused(tx_ring) < size)
4863                 return -EBUSY;
4864
4865         /* A reprieve! */
4866         netif_wake_subqueue(netdev, tx_ring->queue_index);
4867
4868         u64_stats_update_begin(&tx_ring->tx_syncp2);
4869         tx_ring->tx_stats.restart_queue2++;
4870         u64_stats_update_end(&tx_ring->tx_syncp2);
4871
4872         return 0;
4873 }
4874
4875 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4876 {
4877         if (igb_desc_unused(tx_ring) >= size)
4878                 return 0;
4879         return __igb_maybe_stop_tx(tx_ring, size);
4880 }
4881
4882 static void igb_tx_map(struct igb_ring *tx_ring,
4883                        struct igb_tx_buffer *first,
4884                        const u8 hdr_len)
4885 {
4886         struct sk_buff *skb = first->skb;
4887         struct igb_tx_buffer *tx_buffer;
4888         union e1000_adv_tx_desc *tx_desc;
4889         struct skb_frag_struct *frag;
4890         dma_addr_t dma;
4891         unsigned int data_len, size;
4892         u32 tx_flags = first->tx_flags;
4893         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4894         u16 i = tx_ring->next_to_use;
4895
4896         tx_desc = IGB_TX_DESC(tx_ring, i);
4897
4898         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4899
4900         size = skb_headlen(skb);
4901         data_len = skb->data_len;
4902
4903         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4904
4905         tx_buffer = first;
4906
4907         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4908                 if (dma_mapping_error(tx_ring->dev, dma))
4909                         goto dma_error;
4910
4911                 /* record length, and DMA address */
4912                 dma_unmap_len_set(tx_buffer, len, size);
4913                 dma_unmap_addr_set(tx_buffer, dma, dma);
4914
4915                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4916
4917                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4918                         tx_desc->read.cmd_type_len =
4919                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4920
4921                         i++;
4922                         tx_desc++;
4923                         if (i == tx_ring->count) {
4924                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4925                                 i = 0;
4926                         }
4927                         tx_desc->read.olinfo_status = 0;
4928
4929                         dma += IGB_MAX_DATA_PER_TXD;
4930                         size -= IGB_MAX_DATA_PER_TXD;
4931
4932                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4933                 }
4934
4935                 if (likely(!data_len))
4936                         break;
4937
4938                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4939
4940                 i++;
4941                 tx_desc++;
4942                 if (i == tx_ring->count) {
4943                         tx_desc = IGB_TX_DESC(tx_ring, 0);
4944                         i = 0;
4945                 }
4946                 tx_desc->read.olinfo_status = 0;
4947
4948                 size = skb_frag_size(frag);
4949                 data_len -= size;
4950
4951                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4952                                        size, DMA_TO_DEVICE);
4953
4954                 tx_buffer = &tx_ring->tx_buffer_info[i];
4955         }
4956
4957         /* write last descriptor with RS and EOP bits */
4958         cmd_type |= size | IGB_TXD_DCMD;
4959         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4960
4961         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4962
4963         /* set the timestamp */
4964         first->time_stamp = jiffies;
4965
4966         /* Force memory writes to complete before letting h/w know there
4967          * are new descriptors to fetch.  (Only applicable for weak-ordered
4968          * memory model archs, such as IA-64).
4969          *
4970          * We also need this memory barrier to make certain all of the
4971          * status bits have been updated before next_to_watch is written.
4972          */
4973         wmb();
4974
4975         /* set next_to_watch value indicating a packet is present */
4976         first->next_to_watch = tx_desc;
4977
4978         i++;
4979         if (i == tx_ring->count)
4980                 i = 0;
4981
4982         tx_ring->next_to_use = i;
4983
4984         /* Make sure there is space in the ring for the next send. */
4985         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
4986
4987         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
4988                 writel(i, tx_ring->tail);
4989
4990                 /* we need this if more than one processor can write to our tail
4991                  * at a time, it synchronizes IO on IA64/Altix systems
4992                  */
4993                 mmiowb();
4994         }
4995         return;
4996
4997 dma_error:
4998         dev_err(tx_ring->dev, "TX DMA map failed\n");
4999
5000         /* clear dma mappings for failed tx_buffer_info map */
5001         for (;;) {
5002                 tx_buffer = &tx_ring->tx_buffer_info[i];
5003                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5004                 if (tx_buffer == first)
5005                         break;
5006                 if (i == 0)
5007                         i = tx_ring->count;
5008                 i--;
5009         }
5010
5011         tx_ring->next_to_use = i;
5012 }
5013
5014 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5015                                 struct igb_ring *tx_ring)
5016 {
5017         struct igb_tx_buffer *first;
5018         int tso;
5019         u32 tx_flags = 0;
5020         unsigned short f;
5021         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5022         __be16 protocol = vlan_get_protocol(skb);
5023         u8 hdr_len = 0;
5024
5025         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5026          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5027          *       + 2 desc gap to keep tail from touching head,
5028          *       + 1 desc for context descriptor,
5029          * otherwise try next time
5030          */
5031         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5032                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5033
5034         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5035                 /* this is a hard error */
5036                 return NETDEV_TX_BUSY;
5037         }
5038
5039         /* record the location of the first descriptor for this packet */
5040         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5041         first->skb = skb;
5042         first->bytecount = skb->len;
5043         first->gso_segs = 1;
5044
5045         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5046                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5047
5048                 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
5049                                            &adapter->state)) {
5050                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5051                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5052
5053                         adapter->ptp_tx_skb = skb_get(skb);
5054                         adapter->ptp_tx_start = jiffies;
5055                         if (adapter->hw.mac.type == e1000_82576)
5056                                 schedule_work(&adapter->ptp_tx_work);
5057                 }
5058         }
5059
5060         skb_tx_timestamp(skb);
5061
5062         if (skb_vlan_tag_present(skb)) {
5063                 tx_flags |= IGB_TX_FLAGS_VLAN;
5064                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5065         }
5066
5067         /* record initial flags and protocol */
5068         first->tx_flags = tx_flags;
5069         first->protocol = protocol;
5070
5071         tso = igb_tso(tx_ring, first, &hdr_len);
5072         if (tso < 0)
5073                 goto out_drop;
5074         else if (!tso)
5075                 igb_tx_csum(tx_ring, first);
5076
5077         igb_tx_map(tx_ring, first, hdr_len);
5078
5079         return NETDEV_TX_OK;
5080
5081 out_drop:
5082         igb_unmap_and_free_tx_resource(tx_ring, first);
5083
5084         return NETDEV_TX_OK;
5085 }
5086
5087 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5088                                                     struct sk_buff *skb)
5089 {
5090         unsigned int r_idx = skb->queue_mapping;
5091
5092         if (r_idx >= adapter->num_tx_queues)
5093                 r_idx = r_idx % adapter->num_tx_queues;
5094
5095         return adapter->tx_ring[r_idx];
5096 }
5097
5098 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5099                                   struct net_device *netdev)
5100 {
5101         struct igb_adapter *adapter = netdev_priv(netdev);
5102
5103         if (test_bit(__IGB_DOWN, &adapter->state)) {
5104                 dev_kfree_skb_any(skb);
5105                 return NETDEV_TX_OK;
5106         }
5107
5108         if (skb->len <= 0) {
5109                 dev_kfree_skb_any(skb);
5110                 return NETDEV_TX_OK;
5111         }
5112
5113         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5114          * in order to meet this minimum size requirement.
5115          */
5116         if (skb_put_padto(skb, 17))
5117                 return NETDEV_TX_OK;
5118
5119         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5120 }
5121
5122 /**
5123  *  igb_tx_timeout - Respond to a Tx Hang
5124  *  @netdev: network interface device structure
5125  **/
5126 static void igb_tx_timeout(struct net_device *netdev)
5127 {
5128         struct igb_adapter *adapter = netdev_priv(netdev);
5129         struct e1000_hw *hw = &adapter->hw;
5130
5131         /* Do the reset outside of interrupt context */
5132         adapter->tx_timeout_count++;
5133
5134         if (hw->mac.type >= e1000_82580)
5135                 hw->dev_spec._82575.global_device_reset = true;
5136
5137         schedule_work(&adapter->reset_task);
5138         wr32(E1000_EICS,
5139              (adapter->eims_enable_mask & ~adapter->eims_other));
5140 }
5141
5142 static void igb_reset_task(struct work_struct *work)
5143 {
5144         struct igb_adapter *adapter;
5145         adapter = container_of(work, struct igb_adapter, reset_task);
5146
5147         rtnl_lock();
5148         /* If we're already down or resetting, just bail */
5149         if (test_bit(__IGB_DOWN, &adapter->state) ||
5150             test_bit(__IGB_RESETTING, &adapter->state)) {
5151                 rtnl_unlock();
5152                 return;
5153         }
5154
5155         igb_dump(adapter);
5156         netdev_err(adapter->netdev, "Reset adapter\n");
5157         igb_reinit_locked(adapter);
5158         rtnl_unlock();
5159 }
5160
5161 /**
5162  *  igb_get_stats64 - Get System Network Statistics
5163  *  @netdev: network interface device structure
5164  *  @stats: rtnl_link_stats64 pointer
5165  **/
5166 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
5167                                                 struct rtnl_link_stats64 *stats)
5168 {
5169         struct igb_adapter *adapter = netdev_priv(netdev);
5170
5171         spin_lock(&adapter->stats64_lock);
5172         igb_update_stats(adapter, &adapter->stats64);
5173         memcpy(stats, &adapter->stats64, sizeof(*stats));
5174         spin_unlock(&adapter->stats64_lock);
5175
5176         return stats;
5177 }
5178
5179 /**
5180  *  igb_change_mtu - Change the Maximum Transfer Unit
5181  *  @netdev: network interface device structure
5182  *  @new_mtu: new value for maximum frame size
5183  *
5184  *  Returns 0 on success, negative on failure
5185  **/
5186 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5187 {
5188         struct igb_adapter *adapter = netdev_priv(netdev);
5189         struct pci_dev *pdev = adapter->pdev;
5190         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5191
5192         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5193                 dev_err(&pdev->dev, "Invalid MTU setting\n");
5194                 return -EINVAL;
5195         }
5196
5197 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5198         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5199                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
5200                 return -EINVAL;
5201         }
5202
5203         /* adjust max frame to be at least the size of a standard frame */
5204         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5205                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5206
5207         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5208                 usleep_range(1000, 2000);
5209
5210         /* igb_down has a dependency on max_frame_size */
5211         adapter->max_frame_size = max_frame;
5212
5213         if (netif_running(netdev))
5214                 igb_down(adapter);
5215
5216         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5217                  netdev->mtu, new_mtu);
5218         netdev->mtu = new_mtu;
5219
5220         if (netif_running(netdev))
5221                 igb_up(adapter);
5222         else
5223                 igb_reset(adapter);
5224
5225         clear_bit(__IGB_RESETTING, &adapter->state);
5226
5227         return 0;
5228 }
5229
5230 /**
5231  *  igb_update_stats - Update the board statistics counters
5232  *  @adapter: board private structure
5233  **/
5234 void igb_update_stats(struct igb_adapter *adapter,
5235                       struct rtnl_link_stats64 *net_stats)
5236 {
5237         struct e1000_hw *hw = &adapter->hw;
5238         struct pci_dev *pdev = adapter->pdev;
5239         u32 reg, mpc;
5240         int i;
5241         u64 bytes, packets;
5242         unsigned int start;
5243         u64 _bytes, _packets;
5244
5245         /* Prevent stats update while adapter is being reset, or if the pci
5246          * connection is down.
5247          */
5248         if (adapter->link_speed == 0)
5249                 return;
5250         if (pci_channel_offline(pdev))
5251                 return;
5252
5253         bytes = 0;
5254         packets = 0;
5255
5256         rcu_read_lock();
5257         for (i = 0; i < adapter->num_rx_queues; i++) {
5258                 struct igb_ring *ring = adapter->rx_ring[i];
5259                 u32 rqdpc = rd32(E1000_RQDPC(i));
5260                 if (hw->mac.type >= e1000_i210)
5261                         wr32(E1000_RQDPC(i), 0);
5262
5263                 if (rqdpc) {
5264                         ring->rx_stats.drops += rqdpc;
5265                         net_stats->rx_fifo_errors += rqdpc;
5266                 }
5267
5268                 do {
5269                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5270                         _bytes = ring->rx_stats.bytes;
5271                         _packets = ring->rx_stats.packets;
5272                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5273                 bytes += _bytes;
5274                 packets += _packets;
5275         }
5276
5277         net_stats->rx_bytes = bytes;
5278         net_stats->rx_packets = packets;
5279
5280         bytes = 0;
5281         packets = 0;
5282         for (i = 0; i < adapter->num_tx_queues; i++) {
5283                 struct igb_ring *ring = adapter->tx_ring[i];
5284                 do {
5285                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5286                         _bytes = ring->tx_stats.bytes;
5287                         _packets = ring->tx_stats.packets;
5288                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5289                 bytes += _bytes;
5290                 packets += _packets;
5291         }
5292         net_stats->tx_bytes = bytes;
5293         net_stats->tx_packets = packets;
5294         rcu_read_unlock();
5295
5296         /* read stats registers */
5297         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5298         adapter->stats.gprc += rd32(E1000_GPRC);
5299         adapter->stats.gorc += rd32(E1000_GORCL);
5300         rd32(E1000_GORCH); /* clear GORCL */
5301         adapter->stats.bprc += rd32(E1000_BPRC);
5302         adapter->stats.mprc += rd32(E1000_MPRC);
5303         adapter->stats.roc += rd32(E1000_ROC);
5304
5305         adapter->stats.prc64 += rd32(E1000_PRC64);
5306         adapter->stats.prc127 += rd32(E1000_PRC127);
5307         adapter->stats.prc255 += rd32(E1000_PRC255);
5308         adapter->stats.prc511 += rd32(E1000_PRC511);
5309         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5310         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5311         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5312         adapter->stats.sec += rd32(E1000_SEC);
5313
5314         mpc = rd32(E1000_MPC);
5315         adapter->stats.mpc += mpc;
5316         net_stats->rx_fifo_errors += mpc;
5317         adapter->stats.scc += rd32(E1000_SCC);
5318         adapter->stats.ecol += rd32(E1000_ECOL);
5319         adapter->stats.mcc += rd32(E1000_MCC);
5320         adapter->stats.latecol += rd32(E1000_LATECOL);
5321         adapter->stats.dc += rd32(E1000_DC);
5322         adapter->stats.rlec += rd32(E1000_RLEC);
5323         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5324         adapter->stats.xontxc += rd32(E1000_XONTXC);
5325         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5326         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5327         adapter->stats.fcruc += rd32(E1000_FCRUC);
5328         adapter->stats.gptc += rd32(E1000_GPTC);
5329         adapter->stats.gotc += rd32(E1000_GOTCL);
5330         rd32(E1000_GOTCH); /* clear GOTCL */
5331         adapter->stats.rnbc += rd32(E1000_RNBC);
5332         adapter->stats.ruc += rd32(E1000_RUC);
5333         adapter->stats.rfc += rd32(E1000_RFC);
5334         adapter->stats.rjc += rd32(E1000_RJC);
5335         adapter->stats.tor += rd32(E1000_TORH);
5336         adapter->stats.tot += rd32(E1000_TOTH);
5337         adapter->stats.tpr += rd32(E1000_TPR);
5338
5339         adapter->stats.ptc64 += rd32(E1000_PTC64);
5340         adapter->stats.ptc127 += rd32(E1000_PTC127);
5341         adapter->stats.ptc255 += rd32(E1000_PTC255);
5342         adapter->stats.ptc511 += rd32(E1000_PTC511);
5343         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5344         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5345
5346         adapter->stats.mptc += rd32(E1000_MPTC);
5347         adapter->stats.bptc += rd32(E1000_BPTC);
5348
5349         adapter->stats.tpt += rd32(E1000_TPT);
5350         adapter->stats.colc += rd32(E1000_COLC);
5351
5352         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5353         /* read internal phy specific stats */
5354         reg = rd32(E1000_CTRL_EXT);
5355         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5356                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5357
5358                 /* this stat has invalid values on i210/i211 */
5359                 if ((hw->mac.type != e1000_i210) &&
5360                     (hw->mac.type != e1000_i211))
5361                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5362         }
5363
5364         adapter->stats.tsctc += rd32(E1000_TSCTC);
5365         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5366
5367         adapter->stats.iac += rd32(E1000_IAC);
5368         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5369         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5370         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5371         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5372         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5373         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5374         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5375         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5376
5377         /* Fill out the OS statistics structure */
5378         net_stats->multicast = adapter->stats.mprc;
5379         net_stats->collisions = adapter->stats.colc;
5380
5381         /* Rx Errors */
5382
5383         /* RLEC on some newer hardware can be incorrect so build
5384          * our own version based on RUC and ROC
5385          */
5386         net_stats->rx_errors = adapter->stats.rxerrc +
5387                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5388                 adapter->stats.ruc + adapter->stats.roc +
5389                 adapter->stats.cexterr;
5390         net_stats->rx_length_errors = adapter->stats.ruc +
5391                                       adapter->stats.roc;
5392         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5393         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5394         net_stats->rx_missed_errors = adapter->stats.mpc;
5395
5396         /* Tx Errors */
5397         net_stats->tx_errors = adapter->stats.ecol +
5398                                adapter->stats.latecol;
5399         net_stats->tx_aborted_errors = adapter->stats.ecol;
5400         net_stats->tx_window_errors = adapter->stats.latecol;
5401         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5402
5403         /* Tx Dropped needs to be maintained elsewhere */
5404
5405         /* Management Stats */
5406         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5407         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5408         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5409
5410         /* OS2BMC Stats */
5411         reg = rd32(E1000_MANC);
5412         if (reg & E1000_MANC_EN_BMC2OS) {
5413                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5414                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5415                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5416                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5417         }
5418 }
5419
5420 static void igb_tsync_interrupt(struct igb_adapter *adapter)
5421 {
5422         struct e1000_hw *hw = &adapter->hw;
5423         struct ptp_clock_event event;
5424         struct timespec64 ts;
5425         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
5426
5427         if (tsicr & TSINTR_SYS_WRAP) {
5428                 event.type = PTP_CLOCK_PPS;
5429                 if (adapter->ptp_caps.pps)
5430                         ptp_clock_event(adapter->ptp_clock, &event);
5431                 ack |= TSINTR_SYS_WRAP;
5432         }
5433
5434         if (tsicr & E1000_TSICR_TXTS) {
5435                 /* retrieve hardware timestamp */
5436                 schedule_work(&adapter->ptp_tx_work);
5437                 ack |= E1000_TSICR_TXTS;
5438         }
5439
5440         if (tsicr & TSINTR_TT0) {
5441                 spin_lock(&adapter->tmreg_lock);
5442                 ts = timespec64_add(adapter->perout[0].start,
5443                                     adapter->perout[0].period);
5444                 /* u32 conversion of tv_sec is safe until y2106 */
5445                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
5446                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
5447                 tsauxc = rd32(E1000_TSAUXC);
5448                 tsauxc |= TSAUXC_EN_TT0;
5449                 wr32(E1000_TSAUXC, tsauxc);
5450                 adapter->perout[0].start = ts;
5451                 spin_unlock(&adapter->tmreg_lock);
5452                 ack |= TSINTR_TT0;
5453         }
5454
5455         if (tsicr & TSINTR_TT1) {
5456                 spin_lock(&adapter->tmreg_lock);
5457                 ts = timespec64_add(adapter->perout[1].start,
5458                                     adapter->perout[1].period);
5459                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
5460                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
5461                 tsauxc = rd32(E1000_TSAUXC);
5462                 tsauxc |= TSAUXC_EN_TT1;
5463                 wr32(E1000_TSAUXC, tsauxc);
5464                 adapter->perout[1].start = ts;
5465                 spin_unlock(&adapter->tmreg_lock);
5466                 ack |= TSINTR_TT1;
5467         }
5468
5469         if (tsicr & TSINTR_AUTT0) {
5470                 nsec = rd32(E1000_AUXSTMPL0);
5471                 sec  = rd32(E1000_AUXSTMPH0);
5472                 event.type = PTP_CLOCK_EXTTS;
5473                 event.index = 0;
5474                 event.timestamp = sec * 1000000000ULL + nsec;
5475                 ptp_clock_event(adapter->ptp_clock, &event);
5476                 ack |= TSINTR_AUTT0;
5477         }
5478
5479         if (tsicr & TSINTR_AUTT1) {
5480                 nsec = rd32(E1000_AUXSTMPL1);
5481                 sec  = rd32(E1000_AUXSTMPH1);
5482                 event.type = PTP_CLOCK_EXTTS;
5483                 event.index = 1;
5484                 event.timestamp = sec * 1000000000ULL + nsec;
5485                 ptp_clock_event(adapter->ptp_clock, &event);
5486                 ack |= TSINTR_AUTT1;
5487         }
5488
5489         /* acknowledge the interrupts */
5490         wr32(E1000_TSICR, ack);
5491 }
5492
5493 static irqreturn_t igb_msix_other(int irq, void *data)
5494 {
5495         struct igb_adapter *adapter = data;
5496         struct e1000_hw *hw = &adapter->hw;
5497         u32 icr = rd32(E1000_ICR);
5498         /* reading ICR causes bit 31 of EICR to be cleared */
5499
5500         if (icr & E1000_ICR_DRSTA)
5501                 schedule_work(&adapter->reset_task);
5502
5503         if (icr & E1000_ICR_DOUTSYNC) {
5504                 /* HW is reporting DMA is out of sync */
5505                 adapter->stats.doosync++;
5506                 /* The DMA Out of Sync is also indication of a spoof event
5507                  * in IOV mode. Check the Wrong VM Behavior register to
5508                  * see if it is really a spoof event.
5509                  */
5510                 igb_check_wvbr(adapter);
5511         }
5512
5513         /* Check for a mailbox event */
5514         if (icr & E1000_ICR_VMMB)
5515                 igb_msg_task(adapter);
5516
5517         if (icr & E1000_ICR_LSC) {
5518                 hw->mac.get_link_status = 1;
5519                 /* guard against interrupt when we're going down */
5520                 if (!test_bit(__IGB_DOWN, &adapter->state))
5521                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5522         }
5523
5524         if (icr & E1000_ICR_TS)
5525                 igb_tsync_interrupt(adapter);
5526
5527         wr32(E1000_EIMS, adapter->eims_other);
5528
5529         return IRQ_HANDLED;
5530 }
5531
5532 static void igb_write_itr(struct igb_q_vector *q_vector)
5533 {
5534         struct igb_adapter *adapter = q_vector->adapter;
5535         u32 itr_val = q_vector->itr_val & 0x7FFC;
5536
5537         if (!q_vector->set_itr)
5538                 return;
5539
5540         if (!itr_val)
5541                 itr_val = 0x4;
5542
5543         if (adapter->hw.mac.type == e1000_82575)
5544                 itr_val |= itr_val << 16;
5545         else
5546                 itr_val |= E1000_EITR_CNT_IGNR;
5547
5548         writel(itr_val, q_vector->itr_register);
5549         q_vector->set_itr = 0;
5550 }
5551
5552 static irqreturn_t igb_msix_ring(int irq, void *data)
5553 {
5554         struct igb_q_vector *q_vector = data;
5555
5556         /* Write the ITR value calculated from the previous interrupt. */
5557         igb_write_itr(q_vector);
5558
5559         napi_schedule(&q_vector->napi);
5560
5561         return IRQ_HANDLED;
5562 }
5563
5564 #ifdef CONFIG_IGB_DCA
5565 static void igb_update_tx_dca(struct igb_adapter *adapter,
5566                               struct igb_ring *tx_ring,
5567                               int cpu)
5568 {
5569         struct e1000_hw *hw = &adapter->hw;
5570         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5571
5572         if (hw->mac.type != e1000_82575)
5573                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5574
5575         /* We can enable relaxed ordering for reads, but not writes when
5576          * DCA is enabled.  This is due to a known issue in some chipsets
5577          * which will cause the DCA tag to be cleared.
5578          */
5579         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5580                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5581                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5582
5583         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5584 }
5585
5586 static void igb_update_rx_dca(struct igb_adapter *adapter,
5587                               struct igb_ring *rx_ring,
5588                               int cpu)
5589 {
5590         struct e1000_hw *hw = &adapter->hw;
5591         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5592
5593         if (hw->mac.type != e1000_82575)
5594                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5595
5596         /* We can enable relaxed ordering for reads, but not writes when
5597          * DCA is enabled.  This is due to a known issue in some chipsets
5598          * which will cause the DCA tag to be cleared.
5599          */
5600         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5601                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5602
5603         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5604 }
5605
5606 static void igb_update_dca(struct igb_q_vector *q_vector)
5607 {
5608         struct igb_adapter *adapter = q_vector->adapter;
5609         int cpu = get_cpu();
5610
5611         if (q_vector->cpu == cpu)
5612                 goto out_no_update;
5613
5614         if (q_vector->tx.ring)
5615                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5616
5617         if (q_vector->rx.ring)
5618                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5619
5620         q_vector->cpu = cpu;
5621 out_no_update:
5622         put_cpu();
5623 }
5624
5625 static void igb_setup_dca(struct igb_adapter *adapter)
5626 {
5627         struct e1000_hw *hw = &adapter->hw;
5628         int i;
5629
5630         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5631                 return;
5632
5633         /* Always use CB2 mode, difference is masked in the CB driver. */
5634         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5635
5636         for (i = 0; i < adapter->num_q_vectors; i++) {
5637                 adapter->q_vector[i]->cpu = -1;
5638                 igb_update_dca(adapter->q_vector[i]);
5639         }
5640 }
5641
5642 static int __igb_notify_dca(struct device *dev, void *data)
5643 {
5644         struct net_device *netdev = dev_get_drvdata(dev);
5645         struct igb_adapter *adapter = netdev_priv(netdev);
5646         struct pci_dev *pdev = adapter->pdev;
5647         struct e1000_hw *hw = &adapter->hw;
5648         unsigned long event = *(unsigned long *)data;
5649
5650         switch (event) {
5651         case DCA_PROVIDER_ADD:
5652                 /* if already enabled, don't do it again */
5653                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5654                         break;
5655                 if (dca_add_requester(dev) == 0) {
5656                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5657                         dev_info(&pdev->dev, "DCA enabled\n");
5658                         igb_setup_dca(adapter);
5659                         break;
5660                 }
5661                 /* Fall Through since DCA is disabled. */
5662         case DCA_PROVIDER_REMOVE:
5663                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5664                         /* without this a class_device is left
5665                          * hanging around in the sysfs model
5666                          */
5667                         dca_remove_requester(dev);
5668                         dev_info(&pdev->dev, "DCA disabled\n");
5669                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5670                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5671                 }
5672                 break;
5673         }
5674
5675         return 0;
5676 }
5677
5678 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5679                           void *p)
5680 {
5681         int ret_val;
5682
5683         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5684                                          __igb_notify_dca);
5685
5686         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5687 }
5688 #endif /* CONFIG_IGB_DCA */
5689
5690 #ifdef CONFIG_PCI_IOV
5691 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5692 {
5693         unsigned char mac_addr[ETH_ALEN];
5694
5695         eth_zero_addr(mac_addr);
5696         igb_set_vf_mac(adapter, vf, mac_addr);
5697
5698         /* By default spoof check is enabled for all VFs */
5699         adapter->vf_data[vf].spoofchk_enabled = true;
5700
5701         return 0;
5702 }
5703
5704 #endif
5705 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5706 {
5707         struct e1000_hw *hw = &adapter->hw;
5708         u32 ping;
5709         int i;
5710
5711         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5712                 ping = E1000_PF_CONTROL_MSG;
5713                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5714                         ping |= E1000_VT_MSGTYPE_CTS;
5715                 igb_write_mbx(hw, &ping, 1, i);
5716         }
5717 }
5718
5719 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5720 {
5721         struct e1000_hw *hw = &adapter->hw;
5722         u32 vmolr = rd32(E1000_VMOLR(vf));
5723         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5724
5725         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5726                             IGB_VF_FLAG_MULTI_PROMISC);
5727         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5728
5729         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5730                 vmolr |= E1000_VMOLR_MPME;
5731                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5732                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5733         } else {
5734                 /* if we have hashes and we are clearing a multicast promisc
5735                  * flag we need to write the hashes to the MTA as this step
5736                  * was previously skipped
5737                  */
5738                 if (vf_data->num_vf_mc_hashes > 30) {
5739                         vmolr |= E1000_VMOLR_MPME;
5740                 } else if (vf_data->num_vf_mc_hashes) {
5741                         int j;
5742
5743                         vmolr |= E1000_VMOLR_ROMPE;
5744                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5745                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5746                 }
5747         }
5748
5749         wr32(E1000_VMOLR(vf), vmolr);
5750
5751         /* there are flags left unprocessed, likely not supported */
5752         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5753                 return -EINVAL;
5754
5755         return 0;
5756 }
5757
5758 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5759                                   u32 *msgbuf, u32 vf)
5760 {
5761         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5762         u16 *hash_list = (u16 *)&msgbuf[1];
5763         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5764         int i;
5765
5766         /* salt away the number of multicast addresses assigned
5767          * to this VF for later use to restore when the PF multi cast
5768          * list changes
5769          */
5770         vf_data->num_vf_mc_hashes = n;
5771
5772         /* only up to 30 hash values supported */
5773         if (n > 30)
5774                 n = 30;
5775
5776         /* store the hashes for later use */
5777         for (i = 0; i < n; i++)
5778                 vf_data->vf_mc_hashes[i] = hash_list[i];
5779
5780         /* Flush and reset the mta with the new values */
5781         igb_set_rx_mode(adapter->netdev);
5782
5783         return 0;
5784 }
5785
5786 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5787 {
5788         struct e1000_hw *hw = &adapter->hw;
5789         struct vf_data_storage *vf_data;
5790         int i, j;
5791
5792         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5793                 u32 vmolr = rd32(E1000_VMOLR(i));
5794
5795                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5796
5797                 vf_data = &adapter->vf_data[i];
5798
5799                 if ((vf_data->num_vf_mc_hashes > 30) ||
5800                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5801                         vmolr |= E1000_VMOLR_MPME;
5802                 } else if (vf_data->num_vf_mc_hashes) {
5803                         vmolr |= E1000_VMOLR_ROMPE;
5804                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5805                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5806                 }
5807                 wr32(E1000_VMOLR(i), vmolr);
5808         }
5809 }
5810
5811 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5812 {
5813         struct e1000_hw *hw = &adapter->hw;
5814         u32 pool_mask, reg, vid;
5815         int i;
5816
5817         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5818
5819         /* Find the vlan filter for this id */
5820         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5821                 reg = rd32(E1000_VLVF(i));
5822
5823                 /* remove the vf from the pool */
5824                 reg &= ~pool_mask;
5825
5826                 /* if pool is empty then remove entry from vfta */
5827                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5828                     (reg & E1000_VLVF_VLANID_ENABLE)) {
5829                         reg = 0;
5830                         vid = reg & E1000_VLVF_VLANID_MASK;
5831                         igb_vfta_set(hw, vid, false);
5832                 }
5833
5834                 wr32(E1000_VLVF(i), reg);
5835         }
5836
5837         adapter->vf_data[vf].vlans_enabled = 0;
5838 }
5839
5840 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5841 {
5842         struct e1000_hw *hw = &adapter->hw;
5843         u32 reg, i;
5844
5845         /* The vlvf table only exists on 82576 hardware and newer */
5846         if (hw->mac.type < e1000_82576)
5847                 return -1;
5848
5849         /* we only need to do this if VMDq is enabled */
5850         if (!adapter->vfs_allocated_count)
5851                 return -1;
5852
5853         /* Find the vlan filter for this id */
5854         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5855                 reg = rd32(E1000_VLVF(i));
5856                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5857                     vid == (reg & E1000_VLVF_VLANID_MASK))
5858                         break;
5859         }
5860
5861         if (add) {
5862                 if (i == E1000_VLVF_ARRAY_SIZE) {
5863                         /* Did not find a matching VLAN ID entry that was
5864                          * enabled.  Search for a free filter entry, i.e.
5865                          * one without the enable bit set
5866                          */
5867                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5868                                 reg = rd32(E1000_VLVF(i));
5869                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5870                                         break;
5871                         }
5872                 }
5873                 if (i < E1000_VLVF_ARRAY_SIZE) {
5874                         /* Found an enabled/available entry */
5875                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5876
5877                         /* if !enabled we need to set this up in vfta */
5878                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5879                                 /* add VID to filter table */
5880                                 igb_vfta_set(hw, vid, true);
5881                                 reg |= E1000_VLVF_VLANID_ENABLE;
5882                         }
5883                         reg &= ~E1000_VLVF_VLANID_MASK;
5884                         reg |= vid;
5885                         wr32(E1000_VLVF(i), reg);
5886
5887                         /* do not modify RLPML for PF devices */
5888                         if (vf >= adapter->vfs_allocated_count)
5889                                 return 0;
5890
5891                         if (!adapter->vf_data[vf].vlans_enabled) {
5892                                 u32 size;
5893
5894                                 reg = rd32(E1000_VMOLR(vf));
5895                                 size = reg & E1000_VMOLR_RLPML_MASK;
5896                                 size += 4;
5897                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5898                                 reg |= size;
5899                                 wr32(E1000_VMOLR(vf), reg);
5900                         }
5901
5902                         adapter->vf_data[vf].vlans_enabled++;
5903                 }
5904         } else {
5905                 if (i < E1000_VLVF_ARRAY_SIZE) {
5906                         /* remove vf from the pool */
5907                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5908                         /* if pool is empty then remove entry from vfta */
5909                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5910                                 reg = 0;
5911                                 igb_vfta_set(hw, vid, false);
5912                         }
5913                         wr32(E1000_VLVF(i), reg);
5914
5915                         /* do not modify RLPML for PF devices */
5916                         if (vf >= adapter->vfs_allocated_count)
5917                                 return 0;
5918
5919                         adapter->vf_data[vf].vlans_enabled--;
5920                         if (!adapter->vf_data[vf].vlans_enabled) {
5921                                 u32 size;
5922
5923                                 reg = rd32(E1000_VMOLR(vf));
5924                                 size = reg & E1000_VMOLR_RLPML_MASK;
5925                                 size -= 4;
5926                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5927                                 reg |= size;
5928                                 wr32(E1000_VMOLR(vf), reg);
5929                         }
5930                 }
5931         }
5932         return 0;
5933 }
5934
5935 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5936 {
5937         struct e1000_hw *hw = &adapter->hw;
5938
5939         if (vid)
5940                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5941         else
5942                 wr32(E1000_VMVIR(vf), 0);
5943 }
5944
5945 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5946                                int vf, u16 vlan, u8 qos)
5947 {
5948         int err = 0;
5949         struct igb_adapter *adapter = netdev_priv(netdev);
5950
5951         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5952                 return -EINVAL;
5953         if (vlan || qos) {
5954                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5955                 if (err)
5956                         goto out;
5957                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5958                 igb_set_vmolr(adapter, vf, !vlan);
5959                 adapter->vf_data[vf].pf_vlan = vlan;
5960                 adapter->vf_data[vf].pf_qos = qos;
5961                 dev_info(&adapter->pdev->dev,
5962                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5963                 if (test_bit(__IGB_DOWN, &adapter->state)) {
5964                         dev_warn(&adapter->pdev->dev,
5965                                  "The VF VLAN has been set, but the PF device is not up.\n");
5966                         dev_warn(&adapter->pdev->dev,
5967                                  "Bring the PF device up before attempting to use the VF device.\n");
5968                 }
5969         } else {
5970                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5971                              false, vf);
5972                 igb_set_vmvir(adapter, vlan, vf);
5973                 igb_set_vmolr(adapter, vf, true);
5974                 adapter->vf_data[vf].pf_vlan = 0;
5975                 adapter->vf_data[vf].pf_qos = 0;
5976         }
5977 out:
5978         return err;
5979 }
5980
5981 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
5982 {
5983         struct e1000_hw *hw = &adapter->hw;
5984         int i;
5985         u32 reg;
5986
5987         /* Find the vlan filter for this id */
5988         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5989                 reg = rd32(E1000_VLVF(i));
5990                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5991                     vid == (reg & E1000_VLVF_VLANID_MASK))
5992                         break;
5993         }
5994
5995         if (i >= E1000_VLVF_ARRAY_SIZE)
5996                 i = -1;
5997
5998         return i;
5999 }
6000
6001 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6002 {
6003         struct e1000_hw *hw = &adapter->hw;
6004         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6005         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6006         int err = 0;
6007
6008         /* If in promiscuous mode we need to make sure the PF also has
6009          * the VLAN filter set.
6010          */
6011         if (add && (adapter->netdev->flags & IFF_PROMISC))
6012                 err = igb_vlvf_set(adapter, vid, add,
6013                                    adapter->vfs_allocated_count);
6014         if (err)
6015                 goto out;
6016
6017         err = igb_vlvf_set(adapter, vid, add, vf);
6018
6019         if (err)
6020                 goto out;
6021
6022         /* Go through all the checks to see if the VLAN filter should
6023          * be wiped completely.
6024          */
6025         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6026                 u32 vlvf, bits;
6027                 int regndx = igb_find_vlvf_entry(adapter, vid);
6028
6029                 if (regndx < 0)
6030                         goto out;
6031                 /* See if any other pools are set for this VLAN filter
6032                  * entry other than the PF.
6033                  */
6034                 vlvf = bits = rd32(E1000_VLVF(regndx));
6035                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6036                               adapter->vfs_allocated_count);
6037                 /* If the filter was removed then ensure PF pool bit
6038                  * is cleared if the PF only added itself to the pool
6039                  * because the PF is in promiscuous mode.
6040                  */
6041                 if ((vlvf & VLAN_VID_MASK) == vid &&
6042                     !test_bit(vid, adapter->active_vlans) &&
6043                     !bits)
6044                         igb_vlvf_set(adapter, vid, add,
6045                                      adapter->vfs_allocated_count);
6046         }
6047
6048 out:
6049         return err;
6050 }
6051
6052 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6053 {
6054         /* clear flags - except flag that indicates PF has set the MAC */
6055         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6056         adapter->vf_data[vf].last_nack = jiffies;
6057
6058         /* reset offloads to defaults */
6059         igb_set_vmolr(adapter, vf, true);
6060
6061         /* reset vlans for device */
6062         igb_clear_vf_vfta(adapter, vf);
6063         if (adapter->vf_data[vf].pf_vlan)
6064                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6065                                     adapter->vf_data[vf].pf_vlan,
6066                                     adapter->vf_data[vf].pf_qos);
6067         else
6068                 igb_clear_vf_vfta(adapter, vf);
6069
6070         /* reset multicast table array for vf */
6071         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6072
6073         /* Flush and reset the mta with the new values */
6074         igb_set_rx_mode(adapter->netdev);
6075 }
6076
6077 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6078 {
6079         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6080
6081         /* clear mac address as we were hotplug removed/added */
6082         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6083                 eth_zero_addr(vf_mac);
6084
6085         /* process remaining reset events */
6086         igb_vf_reset(adapter, vf);
6087 }
6088
6089 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6090 {
6091         struct e1000_hw *hw = &adapter->hw;
6092         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6093         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
6094         u32 reg, msgbuf[3];
6095         u8 *addr = (u8 *)(&msgbuf[1]);
6096
6097         /* process all the same items cleared in a function level reset */
6098         igb_vf_reset(adapter, vf);
6099
6100         /* set vf mac address */
6101         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
6102
6103         /* enable transmit and receive for vf */
6104         reg = rd32(E1000_VFTE);
6105         wr32(E1000_VFTE, reg | (1 << vf));
6106         reg = rd32(E1000_VFRE);
6107         wr32(E1000_VFRE, reg | (1 << vf));
6108
6109         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6110
6111         /* reply to reset with ack and vf mac address */
6112         if (!is_zero_ether_addr(vf_mac)) {
6113                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6114                 memcpy(addr, vf_mac, ETH_ALEN);
6115         } else {
6116                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
6117         }
6118         igb_write_mbx(hw, msgbuf, 3, vf);
6119 }
6120
6121 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6122 {
6123         /* The VF MAC Address is stored in a packed array of bytes
6124          * starting at the second 32 bit word of the msg array
6125          */
6126         unsigned char *addr = (char *)&msg[1];
6127         int err = -1;
6128
6129         if (is_valid_ether_addr(addr))
6130                 err = igb_set_vf_mac(adapter, vf, addr);
6131
6132         return err;
6133 }
6134
6135 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6136 {
6137         struct e1000_hw *hw = &adapter->hw;
6138         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6139         u32 msg = E1000_VT_MSGTYPE_NACK;
6140
6141         /* if device isn't clear to send it shouldn't be reading either */
6142         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6143             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6144                 igb_write_mbx(hw, &msg, 1, vf);
6145                 vf_data->last_nack = jiffies;
6146         }
6147 }
6148
6149 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6150 {
6151         struct pci_dev *pdev = adapter->pdev;
6152         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6153         struct e1000_hw *hw = &adapter->hw;
6154         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6155         s32 retval;
6156
6157         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6158
6159         if (retval) {
6160                 /* if receive failed revoke VF CTS stats and restart init */
6161                 dev_err(&pdev->dev, "Error receiving message from VF\n");
6162                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
6163                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6164                         return;
6165                 goto out;
6166         }
6167
6168         /* this is a message we already processed, do nothing */
6169         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6170                 return;
6171
6172         /* until the vf completes a reset it should not be
6173          * allowed to start any configuration.
6174          */
6175         if (msgbuf[0] == E1000_VF_RESET) {
6176                 igb_vf_reset_msg(adapter, vf);
6177                 return;
6178         }
6179
6180         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6181                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6182                         return;
6183                 retval = -1;
6184                 goto out;
6185         }
6186
6187         switch ((msgbuf[0] & 0xFFFF)) {
6188         case E1000_VF_SET_MAC_ADDR:
6189                 retval = -EINVAL;
6190                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6191                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6192                 else
6193                         dev_warn(&pdev->dev,
6194                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6195                                  vf);
6196                 break;
6197         case E1000_VF_SET_PROMISC:
6198                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6199                 break;
6200         case E1000_VF_SET_MULTICAST:
6201                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6202                 break;
6203         case E1000_VF_SET_LPE:
6204                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6205                 break;
6206         case E1000_VF_SET_VLAN:
6207                 retval = -1;
6208                 if (vf_data->pf_vlan)
6209                         dev_warn(&pdev->dev,
6210                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6211                                  vf);
6212                 else
6213                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6214                 break;
6215         default:
6216                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6217                 retval = -1;
6218                 break;
6219         }
6220
6221         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6222 out:
6223         /* notify the VF of the results of what it sent us */
6224         if (retval)
6225                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6226         else
6227                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6228
6229         igb_write_mbx(hw, msgbuf, 1, vf);
6230 }
6231
6232 static void igb_msg_task(struct igb_adapter *adapter)
6233 {
6234         struct e1000_hw *hw = &adapter->hw;
6235         u32 vf;
6236
6237         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6238                 /* process any reset requests */
6239                 if (!igb_check_for_rst(hw, vf))
6240                         igb_vf_reset_event(adapter, vf);
6241
6242                 /* process any messages pending */
6243                 if (!igb_check_for_msg(hw, vf))
6244                         igb_rcv_msg_from_vf(adapter, vf);
6245
6246                 /* process any acks */
6247                 if (!igb_check_for_ack(hw, vf))
6248                         igb_rcv_ack_from_vf(adapter, vf);
6249         }
6250 }
6251
6252 /**
6253  *  igb_set_uta - Set unicast filter table address
6254  *  @adapter: board private structure
6255  *
6256  *  The unicast table address is a register array of 32-bit registers.
6257  *  The table is meant to be used in a way similar to how the MTA is used
6258  *  however due to certain limitations in the hardware it is necessary to
6259  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6260  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6261  **/
6262 static void igb_set_uta(struct igb_adapter *adapter)
6263 {
6264         struct e1000_hw *hw = &adapter->hw;
6265         int i;
6266
6267         /* The UTA table only exists on 82576 hardware and newer */
6268         if (hw->mac.type < e1000_82576)
6269                 return;
6270
6271         /* we only need to do this if VMDq is enabled */
6272         if (!adapter->vfs_allocated_count)
6273                 return;
6274
6275         for (i = 0; i < hw->mac.uta_reg_count; i++)
6276                 array_wr32(E1000_UTA, i, ~0);
6277 }
6278
6279 /**
6280  *  igb_intr_msi - Interrupt Handler
6281  *  @irq: interrupt number
6282  *  @data: pointer to a network interface device structure
6283  **/
6284 static irqreturn_t igb_intr_msi(int irq, void *data)
6285 {
6286         struct igb_adapter *adapter = data;
6287         struct igb_q_vector *q_vector = adapter->q_vector[0];
6288         struct e1000_hw *hw = &adapter->hw;
6289         /* read ICR disables interrupts using IAM */
6290         u32 icr = rd32(E1000_ICR);
6291
6292         igb_write_itr(q_vector);
6293
6294         if (icr & E1000_ICR_DRSTA)
6295                 schedule_work(&adapter->reset_task);
6296
6297         if (icr & E1000_ICR_DOUTSYNC) {
6298                 /* HW is reporting DMA is out of sync */
6299                 adapter->stats.doosync++;
6300         }
6301
6302         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6303                 hw->mac.get_link_status = 1;
6304                 if (!test_bit(__IGB_DOWN, &adapter->state))
6305                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6306         }
6307
6308         if (icr & E1000_ICR_TS)
6309                 igb_tsync_interrupt(adapter);
6310
6311         napi_schedule(&q_vector->napi);
6312
6313         return IRQ_HANDLED;
6314 }
6315
6316 /**
6317  *  igb_intr - Legacy Interrupt Handler
6318  *  @irq: interrupt number
6319  *  @data: pointer to a network interface device structure
6320  **/
6321 static irqreturn_t igb_intr(int irq, void *data)
6322 {
6323         struct igb_adapter *adapter = data;
6324         struct igb_q_vector *q_vector = adapter->q_vector[0];
6325         struct e1000_hw *hw = &adapter->hw;
6326         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6327          * need for the IMC write
6328          */
6329         u32 icr = rd32(E1000_ICR);
6330
6331         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6332          * not set, then the adapter didn't send an interrupt
6333          */
6334         if (!(icr & E1000_ICR_INT_ASSERTED))
6335                 return IRQ_NONE;
6336
6337         igb_write_itr(q_vector);
6338
6339         if (icr & E1000_ICR_DRSTA)
6340                 schedule_work(&adapter->reset_task);
6341
6342         if (icr & E1000_ICR_DOUTSYNC) {
6343                 /* HW is reporting DMA is out of sync */
6344                 adapter->stats.doosync++;
6345         }
6346
6347         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6348                 hw->mac.get_link_status = 1;
6349                 /* guard against interrupt when we're going down */
6350                 if (!test_bit(__IGB_DOWN, &adapter->state))
6351                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6352         }
6353
6354         if (icr & E1000_ICR_TS)
6355                 igb_tsync_interrupt(adapter);
6356
6357         napi_schedule(&q_vector->napi);
6358
6359         return IRQ_HANDLED;
6360 }
6361
6362 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6363 {
6364         struct igb_adapter *adapter = q_vector->adapter;
6365         struct e1000_hw *hw = &adapter->hw;
6366
6367         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6368             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6369                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6370                         igb_set_itr(q_vector);
6371                 else
6372                         igb_update_ring_itr(q_vector);
6373         }
6374
6375         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6376                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6377                         wr32(E1000_EIMS, q_vector->eims_value);
6378                 else
6379                         igb_irq_enable(adapter);
6380         }
6381 }
6382
6383 /**
6384  *  igb_poll - NAPI Rx polling callback
6385  *  @napi: napi polling structure
6386  *  @budget: count of how many packets we should handle
6387  **/
6388 static int igb_poll(struct napi_struct *napi, int budget)
6389 {
6390         struct igb_q_vector *q_vector = container_of(napi,
6391                                                      struct igb_q_vector,
6392                                                      napi);
6393         bool clean_complete = true;
6394         int work_done = 0;
6395
6396 #ifdef CONFIG_IGB_DCA
6397         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6398                 igb_update_dca(q_vector);
6399 #endif
6400         if (q_vector->tx.ring)
6401                 clean_complete = igb_clean_tx_irq(q_vector);
6402
6403         if (q_vector->rx.ring) {
6404                 int cleaned = igb_clean_rx_irq(q_vector, budget);
6405
6406                 work_done += cleaned;
6407                 clean_complete &= (cleaned < budget);
6408         }
6409
6410         /* If all work not completed, return budget and keep polling */
6411         if (!clean_complete)
6412                 return budget;
6413
6414         /* If not enough Rx work done, exit the polling mode */
6415         napi_complete_done(napi, work_done);
6416         igb_ring_irq_enable(q_vector);
6417
6418         return 0;
6419 }
6420
6421 /**
6422  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6423  *  @q_vector: pointer to q_vector containing needed info
6424  *
6425  *  returns true if ring is completely cleaned
6426  **/
6427 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6428 {
6429         struct igb_adapter *adapter = q_vector->adapter;
6430         struct igb_ring *tx_ring = q_vector->tx.ring;
6431         struct igb_tx_buffer *tx_buffer;
6432         union e1000_adv_tx_desc *tx_desc;
6433         unsigned int total_bytes = 0, total_packets = 0;
6434         unsigned int budget = q_vector->tx.work_limit;
6435         unsigned int i = tx_ring->next_to_clean;
6436
6437         if (test_bit(__IGB_DOWN, &adapter->state))
6438                 return true;
6439
6440         tx_buffer = &tx_ring->tx_buffer_info[i];
6441         tx_desc = IGB_TX_DESC(tx_ring, i);
6442         i -= tx_ring->count;
6443
6444         do {
6445                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6446
6447                 /* if next_to_watch is not set then there is no work pending */
6448                 if (!eop_desc)
6449                         break;
6450
6451                 /* prevent any other reads prior to eop_desc */
6452                 smp_rmb();
6453
6454                 /* if DD is not set pending work has not been completed */
6455                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6456                         break;
6457
6458                 /* clear next_to_watch to prevent false hangs */
6459                 tx_buffer->next_to_watch = NULL;
6460
6461                 /* update the statistics for this packet */
6462                 total_bytes += tx_buffer->bytecount;
6463                 total_packets += tx_buffer->gso_segs;
6464
6465                 /* free the skb */
6466                 dev_consume_skb_any(tx_buffer->skb);
6467
6468                 /* unmap skb header data */
6469                 dma_unmap_single(tx_ring->dev,
6470                                  dma_unmap_addr(tx_buffer, dma),
6471                                  dma_unmap_len(tx_buffer, len),
6472                                  DMA_TO_DEVICE);
6473
6474                 /* clear tx_buffer data */
6475                 tx_buffer->skb = NULL;
6476                 dma_unmap_len_set(tx_buffer, len, 0);
6477
6478                 /* clear last DMA location and unmap remaining buffers */
6479                 while (tx_desc != eop_desc) {
6480                         tx_buffer++;
6481                         tx_desc++;
6482                         i++;
6483                         if (unlikely(!i)) {
6484                                 i -= tx_ring->count;
6485                                 tx_buffer = tx_ring->tx_buffer_info;
6486                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6487                         }
6488
6489                         /* unmap any remaining paged data */
6490                         if (dma_unmap_len(tx_buffer, len)) {
6491                                 dma_unmap_page(tx_ring->dev,
6492                                                dma_unmap_addr(tx_buffer, dma),
6493                                                dma_unmap_len(tx_buffer, len),
6494                                                DMA_TO_DEVICE);
6495                                 dma_unmap_len_set(tx_buffer, len, 0);
6496                         }
6497                 }
6498
6499                 /* move us one more past the eop_desc for start of next pkt */
6500                 tx_buffer++;
6501                 tx_desc++;
6502                 i++;
6503                 if (unlikely(!i)) {
6504                         i -= tx_ring->count;
6505                         tx_buffer = tx_ring->tx_buffer_info;
6506                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6507                 }
6508
6509                 /* issue prefetch for next Tx descriptor */
6510                 prefetch(tx_desc);
6511
6512                 /* update budget accounting */
6513                 budget--;
6514         } while (likely(budget));
6515
6516         netdev_tx_completed_queue(txring_txq(tx_ring),
6517                                   total_packets, total_bytes);
6518         i += tx_ring->count;
6519         tx_ring->next_to_clean = i;
6520         u64_stats_update_begin(&tx_ring->tx_syncp);
6521         tx_ring->tx_stats.bytes += total_bytes;
6522         tx_ring->tx_stats.packets += total_packets;
6523         u64_stats_update_end(&tx_ring->tx_syncp);
6524         q_vector->tx.total_bytes += total_bytes;
6525         q_vector->tx.total_packets += total_packets;
6526
6527         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6528                 struct e1000_hw *hw = &adapter->hw;
6529
6530                 /* Detect a transmit hang in hardware, this serializes the
6531                  * check with the clearing of time_stamp and movement of i
6532                  */
6533                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6534                 if (tx_buffer->next_to_watch &&
6535                     time_after(jiffies, tx_buffer->time_stamp +
6536                                (adapter->tx_timeout_factor * HZ)) &&
6537                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6538
6539                         /* detected Tx unit hang */
6540                         dev_err(tx_ring->dev,
6541                                 "Detected Tx Unit Hang\n"
6542                                 "  Tx Queue             <%d>\n"
6543                                 "  TDH                  <%x>\n"
6544                                 "  TDT                  <%x>\n"
6545                                 "  next_to_use          <%x>\n"
6546                                 "  next_to_clean        <%x>\n"
6547                                 "buffer_info[next_to_clean]\n"
6548                                 "  time_stamp           <%lx>\n"
6549                                 "  next_to_watch        <%p>\n"
6550                                 "  jiffies              <%lx>\n"
6551                                 "  desc.status          <%x>\n",
6552                                 tx_ring->queue_index,
6553                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6554                                 readl(tx_ring->tail),
6555                                 tx_ring->next_to_use,
6556                                 tx_ring->next_to_clean,
6557                                 tx_buffer->time_stamp,
6558                                 tx_buffer->next_to_watch,
6559                                 jiffies,
6560                                 tx_buffer->next_to_watch->wb.status);
6561                         netif_stop_subqueue(tx_ring->netdev,
6562                                             tx_ring->queue_index);
6563
6564                         /* we are about to reset, no point in enabling stuff */
6565                         return true;
6566                 }
6567         }
6568
6569 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6570         if (unlikely(total_packets &&
6571             netif_carrier_ok(tx_ring->netdev) &&
6572             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6573                 /* Make sure that anybody stopping the queue after this
6574                  * sees the new next_to_clean.
6575                  */
6576                 smp_mb();
6577                 if (__netif_subqueue_stopped(tx_ring->netdev,
6578                                              tx_ring->queue_index) &&
6579                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6580                         netif_wake_subqueue(tx_ring->netdev,
6581                                             tx_ring->queue_index);
6582
6583                         u64_stats_update_begin(&tx_ring->tx_syncp);
6584                         tx_ring->tx_stats.restart_queue++;
6585                         u64_stats_update_end(&tx_ring->tx_syncp);
6586                 }
6587         }
6588
6589         return !!budget;
6590 }
6591
6592 /**
6593  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6594  *  @rx_ring: rx descriptor ring to store buffers on
6595  *  @old_buff: donor buffer to have page reused
6596  *
6597  *  Synchronizes page for reuse by the adapter
6598  **/
6599 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6600                               struct igb_rx_buffer *old_buff)
6601 {
6602         struct igb_rx_buffer *new_buff;
6603         u16 nta = rx_ring->next_to_alloc;
6604
6605         new_buff = &rx_ring->rx_buffer_info[nta];
6606
6607         /* update, and store next to alloc */
6608         nta++;
6609         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6610
6611         /* transfer page from old buffer to new buffer */
6612         *new_buff = *old_buff;
6613
6614         /* sync the buffer for use by the device */
6615         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6616                                          old_buff->page_offset,
6617                                          IGB_RX_BUFSZ,
6618                                          DMA_FROM_DEVICE);
6619 }
6620
6621 static inline bool igb_page_is_reserved(struct page *page)
6622 {
6623         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
6624 }
6625
6626 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6627                                   struct page *page,
6628                                   unsigned int truesize)
6629 {
6630         /* avoid re-using remote pages */
6631         if (unlikely(igb_page_is_reserved(page)))
6632                 return false;
6633
6634 #if (PAGE_SIZE < 8192)
6635         /* if we are only owner of page we can reuse it */
6636         if (unlikely(page_count(page) != 1))
6637                 return false;
6638
6639         /* flip page offset to other buffer */
6640         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6641 #else
6642         /* move offset up to the next cache line */
6643         rx_buffer->page_offset += truesize;
6644
6645         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6646                 return false;
6647 #endif
6648
6649         /* Even if we own the page, we are not allowed to use atomic_set()
6650          * This would break get_page_unless_zero() users.
6651          */
6652         atomic_inc(&page->_count);
6653
6654         return true;
6655 }
6656
6657 /**
6658  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6659  *  @rx_ring: rx descriptor ring to transact packets on
6660  *  @rx_buffer: buffer containing page to add
6661  *  @rx_desc: descriptor containing length of buffer written by hardware
6662  *  @skb: sk_buff to place the data into
6663  *
6664  *  This function will add the data contained in rx_buffer->page to the skb.
6665  *  This is done either through a direct copy if the data in the buffer is
6666  *  less than the skb header size, otherwise it will just attach the page as
6667  *  a frag to the skb.
6668  *
6669  *  The function will then update the page offset if necessary and return
6670  *  true if the buffer can be reused by the adapter.
6671  **/
6672 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6673                             struct igb_rx_buffer *rx_buffer,
6674                             union e1000_adv_rx_desc *rx_desc,
6675                             struct sk_buff *skb)
6676 {
6677         struct page *page = rx_buffer->page;
6678         unsigned char *va = page_address(page) + rx_buffer->page_offset;
6679         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6680 #if (PAGE_SIZE < 8192)
6681         unsigned int truesize = IGB_RX_BUFSZ;
6682 #else
6683         unsigned int truesize = SKB_DATA_ALIGN(size);
6684 #endif
6685         unsigned int pull_len;
6686
6687         if (unlikely(skb_is_nonlinear(skb)))
6688                 goto add_tail_frag;
6689
6690         if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
6691                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6692                 va += IGB_TS_HDR_LEN;
6693                 size -= IGB_TS_HDR_LEN;
6694         }
6695
6696         if (likely(size <= IGB_RX_HDR_LEN)) {
6697                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6698
6699                 /* page is not reserved, we can reuse buffer as-is */
6700                 if (likely(!igb_page_is_reserved(page)))
6701                         return true;
6702
6703                 /* this page cannot be reused so discard it */
6704                 __free_page(page);
6705                 return false;
6706         }
6707
6708         /* we need the header to contain the greater of either ETH_HLEN or
6709          * 60 bytes if the skb->len is less than 60 for skb_pad.
6710          */
6711         pull_len = eth_get_headlen(va, IGB_RX_HDR_LEN);
6712
6713         /* align pull length to size of long to optimize memcpy performance */
6714         memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
6715
6716         /* update all of the pointers */
6717         va += pull_len;
6718         size -= pull_len;
6719
6720 add_tail_frag:
6721         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6722                         (unsigned long)va & ~PAGE_MASK, size, truesize);
6723
6724         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6725 }
6726
6727 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6728                                            union e1000_adv_rx_desc *rx_desc,
6729                                            struct sk_buff *skb)
6730 {
6731         struct igb_rx_buffer *rx_buffer;
6732         struct page *page;
6733
6734         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6735         page = rx_buffer->page;
6736         prefetchw(page);
6737
6738         if (likely(!skb)) {
6739                 void *page_addr = page_address(page) +
6740                                   rx_buffer->page_offset;
6741
6742                 /* prefetch first cache line of first page */
6743                 prefetch(page_addr);
6744 #if L1_CACHE_BYTES < 128
6745                 prefetch(page_addr + L1_CACHE_BYTES);
6746 #endif
6747
6748                 /* allocate a skb to store the frags */
6749                 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
6750                 if (unlikely(!skb)) {
6751                         rx_ring->rx_stats.alloc_failed++;
6752                         return NULL;
6753                 }
6754
6755                 /* we will be copying header into skb->data in
6756                  * pskb_may_pull so it is in our interest to prefetch
6757                  * it now to avoid a possible cache miss
6758                  */
6759                 prefetchw(skb->data);
6760         }
6761
6762         /* we are reusing so sync this buffer for CPU use */
6763         dma_sync_single_range_for_cpu(rx_ring->dev,
6764                                       rx_buffer->dma,
6765                                       rx_buffer->page_offset,
6766                                       IGB_RX_BUFSZ,
6767                                       DMA_FROM_DEVICE);
6768
6769         /* pull page into skb */
6770         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6771                 /* hand second half of page back to the ring */
6772                 igb_reuse_rx_page(rx_ring, rx_buffer);
6773         } else {
6774                 /* we are not reusing the buffer so unmap it */
6775                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6776                                PAGE_SIZE, DMA_FROM_DEVICE);
6777         }
6778
6779         /* clear contents of rx_buffer */
6780         rx_buffer->page = NULL;
6781
6782         return skb;
6783 }
6784
6785 static inline void igb_rx_checksum(struct igb_ring *ring,
6786                                    union e1000_adv_rx_desc *rx_desc,
6787                                    struct sk_buff *skb)
6788 {
6789         skb_checksum_none_assert(skb);
6790
6791         /* Ignore Checksum bit is set */
6792         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6793                 return;
6794
6795         /* Rx checksum disabled via ethtool */
6796         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6797                 return;
6798
6799         /* TCP/UDP checksum error bit is set */
6800         if (igb_test_staterr(rx_desc,
6801                              E1000_RXDEXT_STATERR_TCPE |
6802                              E1000_RXDEXT_STATERR_IPE)) {
6803                 /* work around errata with sctp packets where the TCPE aka
6804                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6805                  * packets, (aka let the stack check the crc32c)
6806                  */
6807                 if (!((skb->len == 60) &&
6808                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6809                         u64_stats_update_begin(&ring->rx_syncp);
6810                         ring->rx_stats.csum_err++;
6811                         u64_stats_update_end(&ring->rx_syncp);
6812                 }
6813                 /* let the stack verify checksum errors */
6814                 return;
6815         }
6816         /* It must be a TCP or UDP packet with a valid checksum */
6817         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6818                                       E1000_RXD_STAT_UDPCS))
6819                 skb->ip_summed = CHECKSUM_UNNECESSARY;
6820
6821         dev_dbg(ring->dev, "cksum success: bits %08X\n",
6822                 le32_to_cpu(rx_desc->wb.upper.status_error));
6823 }
6824
6825 static inline void igb_rx_hash(struct igb_ring *ring,
6826                                union e1000_adv_rx_desc *rx_desc,
6827                                struct sk_buff *skb)
6828 {
6829         if (ring->netdev->features & NETIF_F_RXHASH)
6830                 skb_set_hash(skb,
6831                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
6832                              PKT_HASH_TYPE_L3);
6833 }
6834
6835 /**
6836  *  igb_is_non_eop - process handling of non-EOP buffers
6837  *  @rx_ring: Rx ring being processed
6838  *  @rx_desc: Rx descriptor for current buffer
6839  *  @skb: current socket buffer containing buffer in progress
6840  *
6841  *  This function updates next to clean.  If the buffer is an EOP buffer
6842  *  this function exits returning false, otherwise it will place the
6843  *  sk_buff in the next buffer to be chained and return true indicating
6844  *  that this is in fact a non-EOP buffer.
6845  **/
6846 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6847                            union e1000_adv_rx_desc *rx_desc)
6848 {
6849         u32 ntc = rx_ring->next_to_clean + 1;
6850
6851         /* fetch, update, and store next to clean */
6852         ntc = (ntc < rx_ring->count) ? ntc : 0;
6853         rx_ring->next_to_clean = ntc;
6854
6855         prefetch(IGB_RX_DESC(rx_ring, ntc));
6856
6857         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6858                 return false;
6859
6860         return true;
6861 }
6862
6863 /**
6864  *  igb_cleanup_headers - Correct corrupted or empty headers
6865  *  @rx_ring: rx descriptor ring packet is being transacted on
6866  *  @rx_desc: pointer to the EOP Rx descriptor
6867  *  @skb: pointer to current skb being fixed
6868  *
6869  *  Address the case where we are pulling data in on pages only
6870  *  and as such no data is present in the skb header.
6871  *
6872  *  In addition if skb is not at least 60 bytes we need to pad it so that
6873  *  it is large enough to qualify as a valid Ethernet frame.
6874  *
6875  *  Returns true if an error was encountered and skb was freed.
6876  **/
6877 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6878                                 union e1000_adv_rx_desc *rx_desc,
6879                                 struct sk_buff *skb)
6880 {
6881         if (unlikely((igb_test_staterr(rx_desc,
6882                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6883                 struct net_device *netdev = rx_ring->netdev;
6884                 if (!(netdev->features & NETIF_F_RXALL)) {
6885                         dev_kfree_skb_any(skb);
6886                         return true;
6887                 }
6888         }
6889
6890         /* if eth_skb_pad returns an error the skb was freed */
6891         if (eth_skb_pad(skb))
6892                 return true;
6893
6894         return false;
6895 }
6896
6897 /**
6898  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
6899  *  @rx_ring: rx descriptor ring packet is being transacted on
6900  *  @rx_desc: pointer to the EOP Rx descriptor
6901  *  @skb: pointer to current skb being populated
6902  *
6903  *  This function checks the ring, descriptor, and packet information in
6904  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
6905  *  other fields within the skb.
6906  **/
6907 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6908                                    union e1000_adv_rx_desc *rx_desc,
6909                                    struct sk_buff *skb)
6910 {
6911         struct net_device *dev = rx_ring->netdev;
6912
6913         igb_rx_hash(rx_ring, rx_desc, skb);
6914
6915         igb_rx_checksum(rx_ring, rx_desc, skb);
6916
6917         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
6918             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
6919                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
6920
6921         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
6922             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6923                 u16 vid;
6924
6925                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6926                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6927                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6928                 else
6929                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6930
6931                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
6932         }
6933
6934         skb_record_rx_queue(skb, rx_ring->queue_index);
6935
6936         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6937 }
6938
6939 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6940 {
6941         struct igb_ring *rx_ring = q_vector->rx.ring;
6942         struct sk_buff *skb = rx_ring->skb;
6943         unsigned int total_bytes = 0, total_packets = 0;
6944         u16 cleaned_count = igb_desc_unused(rx_ring);
6945
6946         while (likely(total_packets < budget)) {
6947                 union e1000_adv_rx_desc *rx_desc;
6948
6949                 /* return some buffers to hardware, one at a time is too slow */
6950                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6951                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
6952                         cleaned_count = 0;
6953                 }
6954
6955                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6956
6957                 if (!rx_desc->wb.upper.status_error)
6958                         break;
6959
6960                 /* This memory barrier is needed to keep us from reading
6961                  * any other fields out of the rx_desc until we know the
6962                  * descriptor has been written back
6963                  */
6964                 dma_rmb();
6965
6966                 /* retrieve a buffer from the ring */
6967                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6968
6969                 /* exit if we failed to retrieve a buffer */
6970                 if (!skb)
6971                         break;
6972
6973                 cleaned_count++;
6974
6975                 /* fetch next buffer in frame if non-eop */
6976                 if (igb_is_non_eop(rx_ring, rx_desc))
6977                         continue;
6978
6979                 /* verify the packet layout is correct */
6980                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6981                         skb = NULL;
6982                         continue;
6983                 }
6984
6985                 /* probably a little skewed due to removing CRC */
6986                 total_bytes += skb->len;
6987
6988                 /* populate checksum, timestamp, VLAN, and protocol */
6989                 igb_process_skb_fields(rx_ring, rx_desc, skb);
6990
6991                 napi_gro_receive(&q_vector->napi, skb);
6992
6993                 /* reset skb pointer */
6994                 skb = NULL;
6995
6996                 /* update budget accounting */
6997                 total_packets++;
6998         }
6999
7000         /* place incomplete frames back on ring for completion */
7001         rx_ring->skb = skb;
7002
7003         u64_stats_update_begin(&rx_ring->rx_syncp);
7004         rx_ring->rx_stats.packets += total_packets;
7005         rx_ring->rx_stats.bytes += total_bytes;
7006         u64_stats_update_end(&rx_ring->rx_syncp);
7007         q_vector->rx.total_packets += total_packets;
7008         q_vector->rx.total_bytes += total_bytes;
7009
7010         if (cleaned_count)
7011                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7012
7013         return total_packets;
7014 }
7015
7016 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
7017                                   struct igb_rx_buffer *bi)
7018 {
7019         struct page *page = bi->page;
7020         dma_addr_t dma;
7021
7022         /* since we are recycling buffers we should seldom need to alloc */
7023         if (likely(page))
7024                 return true;
7025
7026         /* alloc new page for storage */
7027         page = dev_alloc_page();
7028         if (unlikely(!page)) {
7029                 rx_ring->rx_stats.alloc_failed++;
7030                 return false;
7031         }
7032
7033         /* map page for use */
7034         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
7035
7036         /* if mapping failed free memory back to system since
7037          * there isn't much point in holding memory we can't use
7038          */
7039         if (dma_mapping_error(rx_ring->dev, dma)) {
7040                 __free_page(page);
7041
7042                 rx_ring->rx_stats.alloc_failed++;
7043                 return false;
7044         }
7045
7046         bi->dma = dma;
7047         bi->page = page;
7048         bi->page_offset = 0;
7049
7050         return true;
7051 }
7052
7053 /**
7054  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7055  *  @adapter: address of board private structure
7056  **/
7057 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7058 {
7059         union e1000_adv_rx_desc *rx_desc;
7060         struct igb_rx_buffer *bi;
7061         u16 i = rx_ring->next_to_use;
7062
7063         /* nothing to do */
7064         if (!cleaned_count)
7065                 return;
7066
7067         rx_desc = IGB_RX_DESC(rx_ring, i);
7068         bi = &rx_ring->rx_buffer_info[i];
7069         i -= rx_ring->count;
7070
7071         do {
7072                 if (!igb_alloc_mapped_page(rx_ring, bi))
7073                         break;
7074
7075                 /* Refresh the desc even if buffer_addrs didn't change
7076                  * because each write-back erases this info.
7077                  */
7078                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7079
7080                 rx_desc++;
7081                 bi++;
7082                 i++;
7083                 if (unlikely(!i)) {
7084                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7085                         bi = rx_ring->rx_buffer_info;
7086                         i -= rx_ring->count;
7087                 }
7088
7089                 /* clear the status bits for the next_to_use descriptor */
7090                 rx_desc->wb.upper.status_error = 0;
7091
7092                 cleaned_count--;
7093         } while (cleaned_count);
7094
7095         i += rx_ring->count;
7096
7097         if (rx_ring->next_to_use != i) {
7098                 /* record the next descriptor to use */
7099                 rx_ring->next_to_use = i;
7100
7101                 /* update next to alloc since we have filled the ring */
7102                 rx_ring->next_to_alloc = i;
7103
7104                 /* Force memory writes to complete before letting h/w
7105                  * know there are new descriptors to fetch.  (Only
7106                  * applicable for weak-ordered memory model archs,
7107                  * such as IA-64).
7108                  */
7109                 wmb();
7110                 writel(i, rx_ring->tail);
7111         }
7112 }
7113
7114 /**
7115  * igb_mii_ioctl -
7116  * @netdev:
7117  * @ifreq:
7118  * @cmd:
7119  **/
7120 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7121 {
7122         struct igb_adapter *adapter = netdev_priv(netdev);
7123         struct mii_ioctl_data *data = if_mii(ifr);
7124
7125         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7126                 return -EOPNOTSUPP;
7127
7128         switch (cmd) {
7129         case SIOCGMIIPHY:
7130                 data->phy_id = adapter->hw.phy.addr;
7131                 break;
7132         case SIOCGMIIREG:
7133                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7134                                      &data->val_out))
7135                         return -EIO;
7136                 break;
7137         case SIOCSMIIREG:
7138         default:
7139                 return -EOPNOTSUPP;
7140         }
7141         return 0;
7142 }
7143
7144 /**
7145  * igb_ioctl -
7146  * @netdev:
7147  * @ifreq:
7148  * @cmd:
7149  **/
7150 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7151 {
7152         switch (cmd) {
7153         case SIOCGMIIPHY:
7154         case SIOCGMIIREG:
7155         case SIOCSMIIREG:
7156                 return igb_mii_ioctl(netdev, ifr, cmd);
7157         case SIOCGHWTSTAMP:
7158                 return igb_ptp_get_ts_config(netdev, ifr);
7159         case SIOCSHWTSTAMP:
7160                 return igb_ptp_set_ts_config(netdev, ifr);
7161         default:
7162                 return -EOPNOTSUPP;
7163         }
7164 }
7165
7166 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7167 {
7168         struct igb_adapter *adapter = hw->back;
7169
7170         pci_read_config_word(adapter->pdev, reg, value);
7171 }
7172
7173 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7174 {
7175         struct igb_adapter *adapter = hw->back;
7176
7177         pci_write_config_word(adapter->pdev, reg, *value);
7178 }
7179
7180 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7181 {
7182         struct igb_adapter *adapter = hw->back;
7183
7184         if (pcie_capability_read_word(adapter->pdev, reg, value))
7185                 return -E1000_ERR_CONFIG;
7186
7187         return 0;
7188 }
7189
7190 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7191 {
7192         struct igb_adapter *adapter = hw->back;
7193
7194         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7195                 return -E1000_ERR_CONFIG;
7196
7197         return 0;
7198 }
7199
7200 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7201 {
7202         struct igb_adapter *adapter = netdev_priv(netdev);
7203         struct e1000_hw *hw = &adapter->hw;
7204         u32 ctrl, rctl;
7205         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7206
7207         if (enable) {
7208                 /* enable VLAN tag insert/strip */
7209                 ctrl = rd32(E1000_CTRL);
7210                 ctrl |= E1000_CTRL_VME;
7211                 wr32(E1000_CTRL, ctrl);
7212
7213                 /* Disable CFI check */
7214                 rctl = rd32(E1000_RCTL);
7215                 rctl &= ~E1000_RCTL_CFIEN;
7216                 wr32(E1000_RCTL, rctl);
7217         } else {
7218                 /* disable VLAN tag insert/strip */
7219                 ctrl = rd32(E1000_CTRL);
7220                 ctrl &= ~E1000_CTRL_VME;
7221                 wr32(E1000_CTRL, ctrl);
7222         }
7223
7224         igb_rlpml_set(adapter);
7225 }
7226
7227 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7228                                __be16 proto, u16 vid)
7229 {
7230         struct igb_adapter *adapter = netdev_priv(netdev);
7231         struct e1000_hw *hw = &adapter->hw;
7232         int pf_id = adapter->vfs_allocated_count;
7233
7234         /* attempt to add filter to vlvf array */
7235         igb_vlvf_set(adapter, vid, true, pf_id);
7236
7237         /* add the filter since PF can receive vlans w/o entry in vlvf */
7238         igb_vfta_set(hw, vid, true);
7239
7240         set_bit(vid, adapter->active_vlans);
7241
7242         return 0;
7243 }
7244
7245 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7246                                 __be16 proto, u16 vid)
7247 {
7248         struct igb_adapter *adapter = netdev_priv(netdev);
7249         struct e1000_hw *hw = &adapter->hw;
7250         int pf_id = adapter->vfs_allocated_count;
7251         s32 err;
7252
7253         /* remove vlan from VLVF table array */
7254         err = igb_vlvf_set(adapter, vid, false, pf_id);
7255
7256         /* if vid was not present in VLVF just remove it from table */
7257         if (err)
7258                 igb_vfta_set(hw, vid, false);
7259
7260         clear_bit(vid, adapter->active_vlans);
7261
7262         return 0;
7263 }
7264
7265 static void igb_restore_vlan(struct igb_adapter *adapter)
7266 {
7267         u16 vid;
7268
7269         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7270
7271         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
7272                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7273 }
7274
7275 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7276 {
7277         struct pci_dev *pdev = adapter->pdev;
7278         struct e1000_mac_info *mac = &adapter->hw.mac;
7279
7280         mac->autoneg = 0;
7281
7282         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7283          * for the switch() below to work
7284          */
7285         if ((spd & 1) || (dplx & ~1))
7286                 goto err_inval;
7287
7288         /* Fiber NIC's only allow 1000 gbps Full duplex
7289          * and 100Mbps Full duplex for 100baseFx sfp
7290          */
7291         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7292                 switch (spd + dplx) {
7293                 case SPEED_10 + DUPLEX_HALF:
7294                 case SPEED_10 + DUPLEX_FULL:
7295                 case SPEED_100 + DUPLEX_HALF:
7296                         goto err_inval;
7297                 default:
7298                         break;
7299                 }
7300         }
7301
7302         switch (spd + dplx) {
7303         case SPEED_10 + DUPLEX_HALF:
7304                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7305                 break;
7306         case SPEED_10 + DUPLEX_FULL:
7307                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7308                 break;
7309         case SPEED_100 + DUPLEX_HALF:
7310                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7311                 break;
7312         case SPEED_100 + DUPLEX_FULL:
7313                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7314                 break;
7315         case SPEED_1000 + DUPLEX_FULL:
7316                 mac->autoneg = 1;
7317                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7318                 break;
7319         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7320         default:
7321                 goto err_inval;
7322         }
7323
7324         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7325         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7326
7327         return 0;
7328
7329 err_inval:
7330         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7331         return -EINVAL;
7332 }
7333
7334 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7335                           bool runtime)
7336 {
7337         struct net_device *netdev = pci_get_drvdata(pdev);
7338         struct igb_adapter *adapter = netdev_priv(netdev);
7339         struct e1000_hw *hw = &adapter->hw;
7340         u32 ctrl, rctl, status;
7341         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7342         bool wake;
7343
7344         rtnl_lock();
7345         netif_device_detach(netdev);
7346
7347         if (netif_running(netdev))
7348                 __igb_close(netdev, true);
7349
7350         igb_clear_interrupt_scheme(adapter);
7351         rtnl_unlock();
7352
7353         status = rd32(E1000_STATUS);
7354         if (status & E1000_STATUS_LU)
7355                 wufc &= ~E1000_WUFC_LNKC;
7356
7357         if (wufc) {
7358                 igb_setup_rctl(adapter);
7359                 igb_set_rx_mode(netdev);
7360
7361                 /* turn on all-multi mode if wake on multicast is enabled */
7362                 if (wufc & E1000_WUFC_MC) {
7363                         rctl = rd32(E1000_RCTL);
7364                         rctl |= E1000_RCTL_MPE;
7365                         wr32(E1000_RCTL, rctl);
7366                 }
7367
7368                 ctrl = rd32(E1000_CTRL);
7369                 ctrl |= E1000_CTRL_ADVD3WUC;
7370                 wr32(E1000_CTRL, ctrl);
7371
7372                 /* Allow time for pending master requests to run */
7373                 igb_disable_pcie_master(hw);
7374
7375                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7376                 wr32(E1000_WUFC, wufc);
7377         } else {
7378                 wr32(E1000_WUC, 0);
7379                 wr32(E1000_WUFC, 0);
7380         }
7381
7382         wake = wufc || adapter->en_mng_pt;
7383         if (!wake)
7384                 igb_power_down_link(adapter);
7385         else
7386                 igb_power_up_link(adapter);
7387
7388         if (enable_wake)
7389                 *enable_wake = wake;
7390
7391         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7392          * would have already happened in close and is redundant.
7393          */
7394         igb_release_hw_control(adapter);
7395
7396         pci_disable_device(pdev);
7397
7398         return 0;
7399 }
7400
7401 #ifdef CONFIG_PM
7402 #ifdef CONFIG_PM_SLEEP
7403 static int igb_suspend(struct device *dev)
7404 {
7405         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
7406 }
7407 #endif /* CONFIG_PM_SLEEP */
7408
7409 static int igb_resume(struct device *dev)
7410 {
7411         struct pci_dev *pdev = to_pci_dev(dev);
7412         struct net_device *netdev = pci_get_drvdata(pdev);
7413         struct igb_adapter *adapter = netdev_priv(netdev);
7414         struct e1000_hw *hw = &adapter->hw;
7415         u32 err;
7416
7417         pci_set_power_state(pdev, PCI_D0);
7418         pci_restore_state(pdev);
7419         pci_save_state(pdev);
7420
7421         if (!pci_device_is_present(pdev))
7422                 return -ENODEV;
7423         err = pci_enable_device_mem(pdev);
7424         if (err) {
7425                 dev_err(&pdev->dev,
7426                         "igb: Cannot enable PCI device from suspend\n");
7427                 return err;
7428         }
7429         pci_set_master(pdev);
7430
7431         pci_enable_wake(pdev, PCI_D3hot, 0);
7432         pci_enable_wake(pdev, PCI_D3cold, 0);
7433
7434         if (igb_init_interrupt_scheme(adapter, true)) {
7435                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7436                 rtnl_unlock();
7437                 return -ENOMEM;
7438         }
7439
7440         igb_reset(adapter);
7441
7442         /* let the f/w know that the h/w is now under the control of the
7443          * driver.
7444          */
7445         igb_get_hw_control(adapter);
7446
7447         wr32(E1000_WUS, ~0);
7448
7449         rtnl_lock();
7450         if (!err && netif_running(netdev))
7451                 err = __igb_open(netdev, true);
7452
7453         if (!err)
7454                 netif_device_attach(netdev);
7455         rtnl_unlock();
7456
7457         return err;
7458 }
7459
7460 static int igb_runtime_idle(struct device *dev)
7461 {
7462         struct pci_dev *pdev = to_pci_dev(dev);
7463         struct net_device *netdev = pci_get_drvdata(pdev);
7464         struct igb_adapter *adapter = netdev_priv(netdev);
7465
7466         if (!igb_has_link(adapter))
7467                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7468
7469         return -EBUSY;
7470 }
7471
7472 static int igb_runtime_suspend(struct device *dev)
7473 {
7474         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
7475 }
7476
7477 static int igb_runtime_resume(struct device *dev)
7478 {
7479         return igb_resume(dev);
7480 }
7481 #endif /* CONFIG_PM */
7482
7483 static void igb_shutdown(struct pci_dev *pdev)
7484 {
7485         bool wake;
7486
7487         __igb_shutdown(pdev, &wake, 0);
7488
7489         if (system_state == SYSTEM_POWER_OFF) {
7490                 pci_wake_from_d3(pdev, wake);
7491                 pci_set_power_state(pdev, PCI_D3hot);
7492         }
7493 }
7494
7495 #ifdef CONFIG_PCI_IOV
7496 static int igb_sriov_reinit(struct pci_dev *dev)
7497 {
7498         struct net_device *netdev = pci_get_drvdata(dev);
7499         struct igb_adapter *adapter = netdev_priv(netdev);
7500         struct pci_dev *pdev = adapter->pdev;
7501
7502         rtnl_lock();
7503
7504         if (netif_running(netdev))
7505                 igb_close(netdev);
7506         else
7507                 igb_reset(adapter);
7508
7509         igb_clear_interrupt_scheme(adapter);
7510
7511         igb_init_queue_configuration(adapter);
7512
7513         if (igb_init_interrupt_scheme(adapter, true)) {
7514                 rtnl_unlock();
7515                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7516                 return -ENOMEM;
7517         }
7518
7519         if (netif_running(netdev))
7520                 igb_open(netdev);
7521
7522         rtnl_unlock();
7523
7524         return 0;
7525 }
7526
7527 static int igb_pci_disable_sriov(struct pci_dev *dev)
7528 {
7529         int err = igb_disable_sriov(dev);
7530
7531         if (!err)
7532                 err = igb_sriov_reinit(dev);
7533
7534         return err;
7535 }
7536
7537 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7538 {
7539         int err = igb_enable_sriov(dev, num_vfs);
7540
7541         if (err)
7542                 goto out;
7543
7544         err = igb_sriov_reinit(dev);
7545         if (!err)
7546                 return num_vfs;
7547
7548 out:
7549         return err;
7550 }
7551
7552 #endif
7553 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7554 {
7555 #ifdef CONFIG_PCI_IOV
7556         if (num_vfs == 0)
7557                 return igb_pci_disable_sriov(dev);
7558         else
7559                 return igb_pci_enable_sriov(dev, num_vfs);
7560 #endif
7561         return 0;
7562 }
7563
7564 #ifdef CONFIG_NET_POLL_CONTROLLER
7565 /* Polling 'interrupt' - used by things like netconsole to send skbs
7566  * without having to re-enable interrupts. It's not called while
7567  * the interrupt routine is executing.
7568  */
7569 static void igb_netpoll(struct net_device *netdev)
7570 {
7571         struct igb_adapter *adapter = netdev_priv(netdev);
7572         struct e1000_hw *hw = &adapter->hw;
7573         struct igb_q_vector *q_vector;
7574         int i;
7575
7576         for (i = 0; i < adapter->num_q_vectors; i++) {
7577                 q_vector = adapter->q_vector[i];
7578                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7579                         wr32(E1000_EIMC, q_vector->eims_value);
7580                 else
7581                         igb_irq_disable(adapter);
7582                 napi_schedule(&q_vector->napi);
7583         }
7584 }
7585 #endif /* CONFIG_NET_POLL_CONTROLLER */
7586
7587 /**
7588  *  igb_io_error_detected - called when PCI error is detected
7589  *  @pdev: Pointer to PCI device
7590  *  @state: The current pci connection state
7591  *
7592  *  This function is called after a PCI bus error affecting
7593  *  this device has been detected.
7594  **/
7595 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7596                                               pci_channel_state_t state)
7597 {
7598         struct net_device *netdev = pci_get_drvdata(pdev);
7599         struct igb_adapter *adapter = netdev_priv(netdev);
7600
7601         netif_device_detach(netdev);
7602
7603         if (state == pci_channel_io_perm_failure)
7604                 return PCI_ERS_RESULT_DISCONNECT;
7605
7606         if (netif_running(netdev))
7607                 igb_down(adapter);
7608         pci_disable_device(pdev);
7609
7610         /* Request a slot slot reset. */
7611         return PCI_ERS_RESULT_NEED_RESET;
7612 }
7613
7614 /**
7615  *  igb_io_slot_reset - called after the pci bus has been reset.
7616  *  @pdev: Pointer to PCI device
7617  *
7618  *  Restart the card from scratch, as if from a cold-boot. Implementation
7619  *  resembles the first-half of the igb_resume routine.
7620  **/
7621 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7622 {
7623         struct net_device *netdev = pci_get_drvdata(pdev);
7624         struct igb_adapter *adapter = netdev_priv(netdev);
7625         struct e1000_hw *hw = &adapter->hw;
7626         pci_ers_result_t result;
7627         int err;
7628
7629         if (pci_enable_device_mem(pdev)) {
7630                 dev_err(&pdev->dev,
7631                         "Cannot re-enable PCI device after reset.\n");
7632                 result = PCI_ERS_RESULT_DISCONNECT;
7633         } else {
7634                 pci_set_master(pdev);
7635                 pci_restore_state(pdev);
7636                 pci_save_state(pdev);
7637
7638                 pci_enable_wake(pdev, PCI_D3hot, 0);
7639                 pci_enable_wake(pdev, PCI_D3cold, 0);
7640
7641                 /* In case of PCI error, adapter lose its HW address
7642                  * so we should re-assign it here.
7643                  */
7644                 hw->hw_addr = adapter->io_addr;
7645
7646                 igb_reset(adapter);
7647                 wr32(E1000_WUS, ~0);
7648                 result = PCI_ERS_RESULT_RECOVERED;
7649         }
7650
7651         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7652         if (err) {
7653                 dev_err(&pdev->dev,
7654                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7655                         err);
7656                 /* non-fatal, continue */
7657         }
7658
7659         return result;
7660 }
7661
7662 /**
7663  *  igb_io_resume - called when traffic can start flowing again.
7664  *  @pdev: Pointer to PCI device
7665  *
7666  *  This callback is called when the error recovery driver tells us that
7667  *  its OK to resume normal operation. Implementation resembles the
7668  *  second-half of the igb_resume routine.
7669  */
7670 static void igb_io_resume(struct pci_dev *pdev)
7671 {
7672         struct net_device *netdev = pci_get_drvdata(pdev);
7673         struct igb_adapter *adapter = netdev_priv(netdev);
7674
7675         if (netif_running(netdev)) {
7676                 if (igb_up(adapter)) {
7677                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7678                         return;
7679                 }
7680         }
7681
7682         netif_device_attach(netdev);
7683
7684         /* let the f/w know that the h/w is now under the control of the
7685          * driver.
7686          */
7687         igb_get_hw_control(adapter);
7688 }
7689
7690 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7691                              u8 qsel)
7692 {
7693         u32 rar_low, rar_high;
7694         struct e1000_hw *hw = &adapter->hw;
7695
7696         /* HW expects these in little endian so we reverse the byte order
7697          * from network order (big endian) to little endian
7698          */
7699         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7700                    ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7701         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7702
7703         /* Indicate to hardware the Address is Valid. */
7704         rar_high |= E1000_RAH_AV;
7705
7706         if (hw->mac.type == e1000_82575)
7707                 rar_high |= E1000_RAH_POOL_1 * qsel;
7708         else
7709                 rar_high |= E1000_RAH_POOL_1 << qsel;
7710
7711         wr32(E1000_RAL(index), rar_low);
7712         wrfl();
7713         wr32(E1000_RAH(index), rar_high);
7714         wrfl();
7715 }
7716
7717 static int igb_set_vf_mac(struct igb_adapter *adapter,
7718                           int vf, unsigned char *mac_addr)
7719 {
7720         struct e1000_hw *hw = &adapter->hw;
7721         /* VF MAC addresses start at end of receive addresses and moves
7722          * towards the first, as a result a collision should not be possible
7723          */
7724         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7725
7726         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7727
7728         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7729
7730         return 0;
7731 }
7732
7733 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7734 {
7735         struct igb_adapter *adapter = netdev_priv(netdev);
7736         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7737                 return -EINVAL;
7738         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7739         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7740         dev_info(&adapter->pdev->dev,
7741                  "Reload the VF driver to make this change effective.");
7742         if (test_bit(__IGB_DOWN, &adapter->state)) {
7743                 dev_warn(&adapter->pdev->dev,
7744                          "The VF MAC address has been set, but the PF device is not up.\n");
7745                 dev_warn(&adapter->pdev->dev,
7746                          "Bring the PF device up before attempting to use the VF device.\n");
7747         }
7748         return igb_set_vf_mac(adapter, vf, mac);
7749 }
7750
7751 static int igb_link_mbps(int internal_link_speed)
7752 {
7753         switch (internal_link_speed) {
7754         case SPEED_100:
7755                 return 100;
7756         case SPEED_1000:
7757                 return 1000;
7758         default:
7759                 return 0;
7760         }
7761 }
7762
7763 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7764                                   int link_speed)
7765 {
7766         int rf_dec, rf_int;
7767         u32 bcnrc_val;
7768
7769         if (tx_rate != 0) {
7770                 /* Calculate the rate factor values to set */
7771                 rf_int = link_speed / tx_rate;
7772                 rf_dec = (link_speed - (rf_int * tx_rate));
7773                 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7774                          tx_rate;
7775
7776                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7777                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7778                               E1000_RTTBCNRC_RF_INT_MASK);
7779                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7780         } else {
7781                 bcnrc_val = 0;
7782         }
7783
7784         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7785         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7786          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7787          */
7788         wr32(E1000_RTTBCNRM, 0x14);
7789         wr32(E1000_RTTBCNRC, bcnrc_val);
7790 }
7791
7792 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7793 {
7794         int actual_link_speed, i;
7795         bool reset_rate = false;
7796
7797         /* VF TX rate limit was not set or not supported */
7798         if ((adapter->vf_rate_link_speed == 0) ||
7799             (adapter->hw.mac.type != e1000_82576))
7800                 return;
7801
7802         actual_link_speed = igb_link_mbps(adapter->link_speed);
7803         if (actual_link_speed != adapter->vf_rate_link_speed) {
7804                 reset_rate = true;
7805                 adapter->vf_rate_link_speed = 0;
7806                 dev_info(&adapter->pdev->dev,
7807                          "Link speed has been changed. VF Transmit rate is disabled\n");
7808         }
7809
7810         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7811                 if (reset_rate)
7812                         adapter->vf_data[i].tx_rate = 0;
7813
7814                 igb_set_vf_rate_limit(&adapter->hw, i,
7815                                       adapter->vf_data[i].tx_rate,
7816                                       actual_link_speed);
7817         }
7818 }
7819
7820 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
7821                              int min_tx_rate, int max_tx_rate)
7822 {
7823         struct igb_adapter *adapter = netdev_priv(netdev);
7824         struct e1000_hw *hw = &adapter->hw;
7825         int actual_link_speed;
7826
7827         if (hw->mac.type != e1000_82576)
7828                 return -EOPNOTSUPP;
7829
7830         if (min_tx_rate)
7831                 return -EINVAL;
7832
7833         actual_link_speed = igb_link_mbps(adapter->link_speed);
7834         if ((vf >= adapter->vfs_allocated_count) ||
7835             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7836             (max_tx_rate < 0) ||
7837             (max_tx_rate > actual_link_speed))
7838                 return -EINVAL;
7839
7840         adapter->vf_rate_link_speed = actual_link_speed;
7841         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
7842         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
7843
7844         return 0;
7845 }
7846
7847 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7848                                    bool setting)
7849 {
7850         struct igb_adapter *adapter = netdev_priv(netdev);
7851         struct e1000_hw *hw = &adapter->hw;
7852         u32 reg_val, reg_offset;
7853
7854         if (!adapter->vfs_allocated_count)
7855                 return -EOPNOTSUPP;
7856
7857         if (vf >= adapter->vfs_allocated_count)
7858                 return -EINVAL;
7859
7860         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7861         reg_val = rd32(reg_offset);
7862         if (setting)
7863                 reg_val |= ((1 << vf) |
7864                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7865         else
7866                 reg_val &= ~((1 << vf) |
7867                              (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7868         wr32(reg_offset, reg_val);
7869
7870         adapter->vf_data[vf].spoofchk_enabled = setting;
7871         return 0;
7872 }
7873
7874 static int igb_ndo_get_vf_config(struct net_device *netdev,
7875                                  int vf, struct ifla_vf_info *ivi)
7876 {
7877         struct igb_adapter *adapter = netdev_priv(netdev);
7878         if (vf >= adapter->vfs_allocated_count)
7879                 return -EINVAL;
7880         ivi->vf = vf;
7881         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7882         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
7883         ivi->min_tx_rate = 0;
7884         ivi->vlan = adapter->vf_data[vf].pf_vlan;
7885         ivi->qos = adapter->vf_data[vf].pf_qos;
7886         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7887         return 0;
7888 }
7889
7890 static void igb_vmm_control(struct igb_adapter *adapter)
7891 {
7892         struct e1000_hw *hw = &adapter->hw;
7893         u32 reg;
7894
7895         switch (hw->mac.type) {
7896         case e1000_82575:
7897         case e1000_i210:
7898         case e1000_i211:
7899         case e1000_i354:
7900         default:
7901                 /* replication is not supported for 82575 */
7902                 return;
7903         case e1000_82576:
7904                 /* notify HW that the MAC is adding vlan tags */
7905                 reg = rd32(E1000_DTXCTL);
7906                 reg |= E1000_DTXCTL_VLAN_ADDED;
7907                 wr32(E1000_DTXCTL, reg);
7908                 /* Fall through */
7909         case e1000_82580:
7910                 /* enable replication vlan tag stripping */
7911                 reg = rd32(E1000_RPLOLR);
7912                 reg |= E1000_RPLOLR_STRVLAN;
7913                 wr32(E1000_RPLOLR, reg);
7914                 /* Fall through */
7915         case e1000_i350:
7916                 /* none of the above registers are supported by i350 */
7917                 break;
7918         }
7919
7920         if (adapter->vfs_allocated_count) {
7921                 igb_vmdq_set_loopback_pf(hw, true);
7922                 igb_vmdq_set_replication_pf(hw, true);
7923                 igb_vmdq_set_anti_spoofing_pf(hw, true,
7924                                               adapter->vfs_allocated_count);
7925         } else {
7926                 igb_vmdq_set_loopback_pf(hw, false);
7927                 igb_vmdq_set_replication_pf(hw, false);
7928         }
7929 }
7930
7931 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7932 {
7933         struct e1000_hw *hw = &adapter->hw;
7934         u32 dmac_thr;
7935         u16 hwm;
7936
7937         if (hw->mac.type > e1000_82580) {
7938                 if (adapter->flags & IGB_FLAG_DMAC) {
7939                         u32 reg;
7940
7941                         /* force threshold to 0. */
7942                         wr32(E1000_DMCTXTH, 0);
7943
7944                         /* DMA Coalescing high water mark needs to be greater
7945                          * than the Rx threshold. Set hwm to PBA - max frame
7946                          * size in 16B units, capping it at PBA - 6KB.
7947                          */
7948                         hwm = 64 * pba - adapter->max_frame_size / 16;
7949                         if (hwm < 64 * (pba - 6))
7950                                 hwm = 64 * (pba - 6);
7951                         reg = rd32(E1000_FCRTC);
7952                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7953                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7954                                 & E1000_FCRTC_RTH_COAL_MASK);
7955                         wr32(E1000_FCRTC, reg);
7956
7957                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7958                          * frame size, capping it at PBA - 10KB.
7959                          */
7960                         dmac_thr = pba - adapter->max_frame_size / 512;
7961                         if (dmac_thr < pba - 10)
7962                                 dmac_thr = pba - 10;
7963                         reg = rd32(E1000_DMACR);
7964                         reg &= ~E1000_DMACR_DMACTHR_MASK;
7965                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7966                                 & E1000_DMACR_DMACTHR_MASK);
7967
7968                         /* transition to L0x or L1 if available..*/
7969                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7970
7971                         /* watchdog timer= +-1000 usec in 32usec intervals */
7972                         reg |= (1000 >> 5);
7973
7974                         /* Disable BMC-to-OS Watchdog Enable */
7975                         if (hw->mac.type != e1000_i354)
7976                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7977
7978                         wr32(E1000_DMACR, reg);
7979
7980                         /* no lower threshold to disable
7981                          * coalescing(smart fifb)-UTRESH=0
7982                          */
7983                         wr32(E1000_DMCRTRH, 0);
7984
7985                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7986
7987                         wr32(E1000_DMCTLX, reg);
7988
7989                         /* free space in tx packet buffer to wake from
7990                          * DMA coal
7991                          */
7992                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7993                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7994
7995                         /* make low power state decision controlled
7996                          * by DMA coal
7997                          */
7998                         reg = rd32(E1000_PCIEMISC);
7999                         reg &= ~E1000_PCIEMISC_LX_DECISION;
8000                         wr32(E1000_PCIEMISC, reg);
8001                 } /* endif adapter->dmac is not disabled */
8002         } else if (hw->mac.type == e1000_82580) {
8003                 u32 reg = rd32(E1000_PCIEMISC);
8004
8005                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
8006                 wr32(E1000_DMACR, 0);
8007         }
8008 }
8009
8010 /**
8011  *  igb_read_i2c_byte - Reads 8 bit word over I2C
8012  *  @hw: pointer to hardware structure
8013  *  @byte_offset: byte offset to read
8014  *  @dev_addr: device address
8015  *  @data: value read
8016  *
8017  *  Performs byte read operation over I2C interface at
8018  *  a specified device address.
8019  **/
8020 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8021                       u8 dev_addr, u8 *data)
8022 {
8023         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8024         struct i2c_client *this_client = adapter->i2c_client;
8025         s32 status;
8026         u16 swfw_mask = 0;
8027
8028         if (!this_client)
8029                 return E1000_ERR_I2C;
8030
8031         swfw_mask = E1000_SWFW_PHY0_SM;
8032
8033         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8034                 return E1000_ERR_SWFW_SYNC;
8035
8036         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8037         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8038
8039         if (status < 0)
8040                 return E1000_ERR_I2C;
8041         else {
8042                 *data = status;
8043                 return 0;
8044         }
8045 }
8046
8047 /**
8048  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8049  *  @hw: pointer to hardware structure
8050  *  @byte_offset: byte offset to write
8051  *  @dev_addr: device address
8052  *  @data: value to write
8053  *
8054  *  Performs byte write operation over I2C interface at
8055  *  a specified device address.
8056  **/
8057 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8058                        u8 dev_addr, u8 data)
8059 {
8060         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8061         struct i2c_client *this_client = adapter->i2c_client;
8062         s32 status;
8063         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8064
8065         if (!this_client)
8066                 return E1000_ERR_I2C;
8067
8068         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8069                 return E1000_ERR_SWFW_SYNC;
8070         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8071         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8072
8073         if (status)
8074                 return E1000_ERR_I2C;
8075         else
8076                 return 0;
8077
8078 }
8079
8080 int igb_reinit_queues(struct igb_adapter *adapter)
8081 {
8082         struct net_device *netdev = adapter->netdev;
8083         struct pci_dev *pdev = adapter->pdev;
8084         int err = 0;
8085
8086         if (netif_running(netdev))
8087                 igb_close(netdev);
8088
8089         igb_reset_interrupt_capability(adapter);
8090
8091         if (igb_init_interrupt_scheme(adapter, true)) {
8092                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8093                 return -ENOMEM;
8094         }
8095
8096         if (netif_running(netdev))
8097                 err = igb_open(netdev);
8098
8099         return err;
8100 }
8101 /* igb_main.c */