drivers/net/ethernet/intel/igb/igb_ethtool.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 /* ethtool support for igb */
  25
  26 #include <linux/vmalloc.h>
  27 #include <linux/netdevice.h>
  28 #include <linux/pci.h>
  29 #include <linux/delay.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/if_ether.h>
  32 #include <linux/ethtool.h>
  33 #include <linux/sched.h>
  34 #include <linux/slab.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/highmem.h>
  37 #include <linux/mdio.h>
  38
  39 #include "igb.h"
  40
  41 struct igb_stats {
  42         char stat_string[ETH_GSTRING_LEN];
  43         int sizeof_stat;
  44         int stat_offset;
  45 };
  46
  47 #define IGB_STAT(_name, _stat) { \
  48         .stat_string = _name, \
  49         .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
  50         .stat_offset = offsetof(struct igb_adapter, _stat) \
  51 }
  52 static const struct igb_stats igb_gstrings_stats[] = {
  53         IGB_STAT("rx_packets", stats.gprc),
  54         IGB_STAT("tx_packets", stats.gptc),
  55         IGB_STAT("rx_bytes", stats.gorc),
  56         IGB_STAT("tx_bytes", stats.gotc),
  57         IGB_STAT("rx_broadcast", stats.bprc),
  58         IGB_STAT("tx_broadcast", stats.bptc),
  59         IGB_STAT("rx_multicast", stats.mprc),
  60         IGB_STAT("tx_multicast", stats.mptc),
  61         IGB_STAT("multicast", stats.mprc),
  62         IGB_STAT("collisions", stats.colc),
  63         IGB_STAT("rx_crc_errors", stats.crcerrs),
  64         IGB_STAT("rx_no_buffer_count", stats.rnbc),
  65         IGB_STAT("rx_missed_errors", stats.mpc),
  66         IGB_STAT("tx_aborted_errors", stats.ecol),
  67         IGB_STAT("tx_carrier_errors", stats.tncrs),
  68         IGB_STAT("tx_window_errors", stats.latecol),
  69         IGB_STAT("tx_abort_late_coll", stats.latecol),
  70         IGB_STAT("tx_deferred_ok", stats.dc),
  71         IGB_STAT("tx_single_coll_ok", stats.scc),
  72         IGB_STAT("tx_multi_coll_ok", stats.mcc),
  73         IGB_STAT("tx_timeout_count", tx_timeout_count),
  74         IGB_STAT("rx_long_length_errors", stats.roc),
  75         IGB_STAT("rx_short_length_errors", stats.ruc),
  76         IGB_STAT("rx_align_errors", stats.algnerrc),
  77         IGB_STAT("tx_tcp_seg_good", stats.tsctc),
  78         IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
  79         IGB_STAT("rx_flow_control_xon", stats.xonrxc),
  80         IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
  81         IGB_STAT("tx_flow_control_xon", stats.xontxc),
  82         IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
  83         IGB_STAT("rx_long_byte_count", stats.gorc),
  84         IGB_STAT("tx_dma_out_of_sync", stats.doosync),
  85         IGB_STAT("tx_smbus", stats.mgptc),
  86         IGB_STAT("rx_smbus", stats.mgprc),
  87         IGB_STAT("dropped_smbus", stats.mgpdc),
  88         IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
  89         IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
  90         IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
  91         IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
  92         IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
  93         IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
  94 };
  95
  96 #define IGB_NETDEV_STAT(_net_stat) { \
  97         .stat_string = __stringify(_net_stat), \
  98         .sizeof_stat = FIELD_SIZEOF(struct rtnl_link_stats64, _net_stat), \
  99         .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \
 100 }
 101 static const struct igb_stats igb_gstrings_net_stats[] = {
 102         IGB_NETDEV_STAT(rx_errors),
 103         IGB_NETDEV_STAT(tx_errors),
 104         IGB_NETDEV_STAT(tx_dropped),
 105         IGB_NETDEV_STAT(rx_length_errors),
 106         IGB_NETDEV_STAT(rx_over_errors),
 107         IGB_NETDEV_STAT(rx_frame_errors),
 108         IGB_NETDEV_STAT(rx_fifo_errors),
 109         IGB_NETDEV_STAT(tx_fifo_errors),
 110         IGB_NETDEV_STAT(tx_heartbeat_errors)
 111 };
 112
 113 #define IGB_GLOBAL_STATS_LEN    \
 114         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
 115 #define IGB_NETDEV_STATS_LEN    \
 116         (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
 117 #define IGB_RX_QUEUE_STATS_LEN \
 118         (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
 119
 120 #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */
 121
 122 #define IGB_QUEUE_STATS_LEN \
 123         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
 124           IGB_RX_QUEUE_STATS_LEN) + \
 125          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
 126           IGB_TX_QUEUE_STATS_LEN))
 127 #define IGB_STATS_LEN \
 128         (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
 129
 130 enum igb_diagnostics_results {
 131         TEST_REG = 0,
 132         TEST_EEP,
 133         TEST_IRQ,
 134         TEST_LOOP,
 135         TEST_LINK
 136 };
 137
 138 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 139         [TEST_REG]  = "Register test  (offline)",
 140         [TEST_EEP]  = "Eeprom test    (offline)",
 141         [TEST_IRQ]  = "Interrupt test (offline)",
 142         [TEST_LOOP] = "Loopback test  (offline)",
 143         [TEST_LINK] = "Link test   (on/offline)"
 144 };
 145 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 146
 147 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 148 {
 149         struct igb_adapter *adapter = netdev_priv(netdev);
 150         struct e1000_hw *hw = &adapter->hw;
 151         struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;
 152         struct e1000_sfp_flags *eth_flags = &dev_spec->eth_flags;
 153         u32 status;
 154         u32 speed;
 155
 156         status = pm_runtime_suspended(&adapter->pdev->dev) ?
 157                  0 : rd32(E1000_STATUS);
 158         if (hw->phy.media_type == e1000_media_type_copper) {
 159
 160                 ecmd->supported = (SUPPORTED_10baseT_Half |
 161                                    SUPPORTED_10baseT_Full |
 162                                    SUPPORTED_100baseT_Half |
 163                                    SUPPORTED_100baseT_Full |
 164                                    SUPPORTED_1000baseT_Full|
 165                                    SUPPORTED_Autoneg |
 166                                    SUPPORTED_TP |
 167                                    SUPPORTED_Pause);
 168                 ecmd->advertising = ADVERTISED_TP;
 169
 170                 if (hw->mac.autoneg == 1) {
 171                         ecmd->advertising |= ADVERTISED_Autoneg;
 172                         /* the e1000 autoneg seems to match ethtool nicely */
 173                         ecmd->advertising |= hw->phy.autoneg_advertised;
 174                 }
 175
 176                 ecmd->port = PORT_TP;
 177                 ecmd->phy_address = hw->phy.addr;
 178                 ecmd->transceiver = XCVR_INTERNAL;
 179         } else {
 180                 ecmd->supported = (SUPPORTED_FIBRE |
 181                                    SUPPORTED_1000baseKX_Full |
 182                                    SUPPORTED_Autoneg |
 183                                    SUPPORTED_Pause);
 184                 ecmd->advertising = (ADVERTISED_FIBRE |
 185                                      ADVERTISED_1000baseKX_Full);
 186                 if (hw->mac.type == e1000_i354) {
 187                         if ((hw->device_id ==
 188                              E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) &&
 189                             !(status & E1000_STATUS_2P5_SKU_OVER)) {
 190                                 ecmd->supported |= SUPPORTED_2500baseX_Full;
 191                                 ecmd->supported &=
 192                                         ~SUPPORTED_1000baseKX_Full;
 193                                 ecmd->advertising |= ADVERTISED_2500baseX_Full;
 194                                 ecmd->advertising &=
 195                                         ~ADVERTISED_1000baseKX_Full;
 196                         }
 197                 }
 198                 if (eth_flags->e100_base_fx) {
 199                         ecmd->supported |= SUPPORTED_100baseT_Full;
 200                         ecmd->advertising |= ADVERTISED_100baseT_Full;
 201                 }
 202                 if (hw->mac.autoneg == 1)
 203                         ecmd->advertising |= ADVERTISED_Autoneg;
 204
 205                 ecmd->port = PORT_FIBRE;
 206                 ecmd->transceiver = XCVR_EXTERNAL;
 207         }
 208         if (hw->mac.autoneg != 1)
 209                 ecmd->advertising &= ~(ADVERTISED_Pause |
 210                                        ADVERTISED_Asym_Pause);
 211
 212         switch (hw->fc.requested_mode) {
 213         case e1000_fc_full:
 214                 ecmd->advertising |= ADVERTISED_Pause;
 215                 break;
 216         case e1000_fc_rx_pause:
 217                 ecmd->advertising |= (ADVERTISED_Pause |
 218                                       ADVERTISED_Asym_Pause);
 219                 break;
 220         case e1000_fc_tx_pause:
 221                 ecmd->advertising |=  ADVERTISED_Asym_Pause;
 222                 break;
 223         default:
 224                 ecmd->advertising &= ~(ADVERTISED_Pause |
 225                                        ADVERTISED_Asym_Pause);
 226         }
 227         if (status & E1000_STATUS_LU) {
 228                 if ((status & E1000_STATUS_2P5_SKU) &&
 229                     !(status & E1000_STATUS_2P5_SKU_OVER)) {
 230                         speed = SPEED_2500;
 231                 } else if (status & E1000_STATUS_SPEED_1000) {
 232                         speed = SPEED_1000;
 233                 } else if (status & E1000_STATUS_SPEED_100) {
 234                         speed = SPEED_100;
 235                 } else {
 236                         speed = SPEED_10;
 237                 }
 238                 if ((status & E1000_STATUS_FD) ||
 239                     hw->phy.media_type != e1000_media_type_copper)
 240                         ecmd->duplex = DUPLEX_FULL;
 241                 else
 242                         ecmd->duplex = DUPLEX_HALF;
 243         } else {
 244                 speed = SPEED_UNKNOWN;
 245                 ecmd->duplex = DUPLEX_UNKNOWN;
 246         }
 247         ethtool_cmd_speed_set(ecmd, speed);
 248         if ((hw->phy.media_type == e1000_media_type_fiber) ||
 249             hw->mac.autoneg)
 250                 ecmd->autoneg = AUTONEG_ENABLE;
 251         else
 252                 ecmd->autoneg = AUTONEG_DISABLE;
 253
 254         /* MDI-X => 2; MDI =>1; Invalid =>0 */
 255         if (hw->phy.media_type == e1000_media_type_copper)
 256                 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
 257                                                       ETH_TP_MDI;
 258         else
 259                 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
 260
 261         if (hw->phy.mdix == AUTO_ALL_MODES)
 262                 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
 263         else
 264                 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
 265
 266         return 0;
 267 }
 268
 269 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 270 {
 271         struct igb_adapter *adapter = netdev_priv(netdev);
 272         struct e1000_hw *hw = &adapter->hw;
 273
 274         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 275          * cannot be changed
 276          */
 277         if (igb_check_reset_block(hw)) {
 278                 dev_err(&adapter->pdev->dev,
 279                         "Cannot change link characteristics when SoL/IDER is active.\n");
 280                 return -EINVAL;
 281         }
 282
 283         /* MDI setting is only allowed when autoneg enabled because
 284          * some hardware doesn't allow MDI setting when speed or
 285          * duplex is forced.
 286          */
 287         if (ecmd->eth_tp_mdix_ctrl) {
 288                 if (hw->phy.media_type != e1000_media_type_copper)
 289                         return -EOPNOTSUPP;
 290
 291                 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
 292                     (ecmd->autoneg != AUTONEG_ENABLE)) {
 293                         dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
 294                         return -EINVAL;
 295                 }
 296         }
 297
 298         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 299                 usleep_range(1000, 2000);
 300
 301         if (ecmd->autoneg == AUTONEG_ENABLE) {
 302                 hw->mac.autoneg = 1;
 303                 if (hw->phy.media_type == e1000_media_type_fiber) {
 304                         hw->phy.autoneg_advertised = ecmd->advertising |
 305                                                      ADVERTISED_FIBRE |
 306                                                      ADVERTISED_Autoneg;
 307                         switch (adapter->link_speed) {
 308                         case SPEED_2500:
 309                                 hw->phy.autoneg_advertised =
 310                                         ADVERTISED_2500baseX_Full;
 311                                 break;
 312                         case SPEED_1000:
 313                                 hw->phy.autoneg_advertised =
 314                                         ADVERTISED_1000baseT_Full;
 315                                 break;
 316                         case SPEED_100:
 317                                 hw->phy.autoneg_advertised =
 318                                         ADVERTISED_100baseT_Full;
 319                                 break;
 320                         default:
 321                                 break;
 322                         }
 323                 } else {
 324                         hw->phy.autoneg_advertised = ecmd->advertising |
 325                                                      ADVERTISED_TP |
 326                                                      ADVERTISED_Autoneg;
 327                 }
 328                 ecmd->advertising = hw->phy.autoneg_advertised;
 329                 if (adapter->fc_autoneg)
 330                         hw->fc.requested_mode = e1000_fc_default;
 331         } else {
 332                 u32 speed = ethtool_cmd_speed(ecmd);
 333                 /* calling this overrides forced MDI setting */
 334                 if (igb_set_spd_dplx(adapter, speed, ecmd->duplex)) {
 335                         clear_bit(__IGB_RESETTING, &adapter->state);
 336                         return -EINVAL;
 337                 }
 338         }
 339
 340         /* MDI-X => 2; MDI => 1; Auto => 3 */
 341         if (ecmd->eth_tp_mdix_ctrl) {
 342                 /* fix up the value for auto (3 => 0) as zero is mapped
 343                  * internally to auto
 344                  */
 345                 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
 346                         hw->phy.mdix = AUTO_ALL_MODES;
 347                 else
 348                         hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
 349         }
 350
 351         /* reset the link */
 352         if (netif_running(adapter->netdev)) {
 353                 igb_down(adapter);
 354                 igb_up(adapter);
 355         } else
 356                 igb_reset(adapter);
 357
 358         clear_bit(__IGB_RESETTING, &adapter->state);
 359         return 0;
 360 }
 361
 362 static u32 igb_get_link(struct net_device *netdev)
 363 {
 364         struct igb_adapter *adapter = netdev_priv(netdev);
 365         struct e1000_mac_info *mac = &adapter->hw.mac;
 366
 367         /* If the link is not reported up to netdev, interrupts are disabled,
 368          * and so the physical link state may have changed since we last
 369          * looked. Set get_link_status to make sure that the true link
 370          * state is interrogated, rather than pulling a cached and possibly
 371          * stale link state from the driver.
 372          */
 373         if (!netif_carrier_ok(netdev))
 374                 mac->get_link_status = 1;
 375
 376         return igb_has_link(adapter);
 377 }
 378
 379 static void igb_get_pauseparam(struct net_device *netdev,
 380                                struct ethtool_pauseparam *pause)
 381 {
 382         struct igb_adapter *adapter = netdev_priv(netdev);
 383         struct e1000_hw *hw = &adapter->hw;
 384
 385         pause->autoneg =
 386                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 387
 388         if (hw->fc.current_mode == e1000_fc_rx_pause)
 389                 pause->rx_pause = 1;
 390         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 391                 pause->tx_pause = 1;
 392         else if (hw->fc.current_mode == e1000_fc_full) {
 393                 pause->rx_pause = 1;
 394                 pause->tx_pause = 1;
 395         }
 396 }
 397
 398 static int igb_set_pauseparam(struct net_device *netdev,
 399                               struct ethtool_pauseparam *pause)
 400 {
 401         struct igb_adapter *adapter = netdev_priv(netdev);
 402         struct e1000_hw *hw = &adapter->hw;
 403         int retval = 0;
 404
 405         /* 100basefx does not support setting link flow control */
 406         if (hw->dev_spec._82575.eth_flags.e100_base_fx)
 407                 return -EINVAL;
 408
 409         adapter->fc_autoneg = pause->autoneg;
 410
 411         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 412                 usleep_range(1000, 2000);
 413
 414         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 415                 hw->fc.requested_mode = e1000_fc_default;
 416                 if (netif_running(adapter->netdev)) {
 417                         igb_down(adapter);
 418                         igb_up(adapter);
 419                 } else {
 420                         igb_reset(adapter);
 421                 }
 422         } else {
 423                 if (pause->rx_pause && pause->tx_pause)
 424                         hw->fc.requested_mode = e1000_fc_full;
 425                 else if (pause->rx_pause && !pause->tx_pause)
 426                         hw->fc.requested_mode = e1000_fc_rx_pause;
 427                 else if (!pause->rx_pause && pause->tx_pause)
 428                         hw->fc.requested_mode = e1000_fc_tx_pause;
 429                 else if (!pause->rx_pause && !pause->tx_pause)
 430                         hw->fc.requested_mode = e1000_fc_none;
 431
 432                 hw->fc.current_mode = hw->fc.requested_mode;
 433
 434                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 435                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 436         }
 437
 438         clear_bit(__IGB_RESETTING, &adapter->state);
 439         return retval;
 440 }
 441
 442 static u32 igb_get_msglevel(struct net_device *netdev)
 443 {
 444         struct igb_adapter *adapter = netdev_priv(netdev);
 445         return adapter->msg_enable;
 446 }
 447
 448 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 449 {
 450         struct igb_adapter *adapter = netdev_priv(netdev);
 451         adapter->msg_enable = data;
 452 }
 453
 454 static int igb_get_regs_len(struct net_device *netdev)
 455 {
 456 #define IGB_REGS_LEN 739
 457         return IGB_REGS_LEN * sizeof(u32);
 458 }
 459
 460 static void igb_get_regs(struct net_device *netdev,
 461                          struct ethtool_regs *regs, void *p)
 462 {
 463         struct igb_adapter *adapter = netdev_priv(netdev);
 464         struct e1000_hw *hw = &adapter->hw;
 465         u32 *regs_buff = p;
 466         u8 i;
 467
 468         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 469
 470         regs->version = (1u << 24) | (hw->revision_id << 16) | hw->device_id;
 471
 472         /* General Registers */
 473         regs_buff[0] = rd32(E1000_CTRL);
 474         regs_buff[1] = rd32(E1000_STATUS);
 475         regs_buff[2] = rd32(E1000_CTRL_EXT);
 476         regs_buff[3] = rd32(E1000_MDIC);
 477         regs_buff[4] = rd32(E1000_SCTL);
 478         regs_buff[5] = rd32(E1000_CONNSW);
 479         regs_buff[6] = rd32(E1000_VET);
 480         regs_buff[7] = rd32(E1000_LEDCTL);
 481         regs_buff[8] = rd32(E1000_PBA);
 482         regs_buff[9] = rd32(E1000_PBS);
 483         regs_buff[10] = rd32(E1000_FRTIMER);
 484         regs_buff[11] = rd32(E1000_TCPTIMER);
 485
 486         /* NVM Register */
 487         regs_buff[12] = rd32(E1000_EECD);
 488
 489         /* Interrupt */
 490         /* Reading EICS for EICR because they read the
 491          * same but EICS does not clear on read
 492          */
 493         regs_buff[13] = rd32(E1000_EICS);
 494         regs_buff[14] = rd32(E1000_EICS);
 495         regs_buff[15] = rd32(E1000_EIMS);
 496         regs_buff[16] = rd32(E1000_EIMC);
 497         regs_buff[17] = rd32(E1000_EIAC);
 498         regs_buff[18] = rd32(E1000_EIAM);
 499         /* Reading ICS for ICR because they read the
 500          * same but ICS does not clear on read
 501          */
 502         regs_buff[19] = rd32(E1000_ICS);
 503         regs_buff[20] = rd32(E1000_ICS);
 504         regs_buff[21] = rd32(E1000_IMS);
 505         regs_buff[22] = rd32(E1000_IMC);
 506         regs_buff[23] = rd32(E1000_IAC);
 507         regs_buff[24] = rd32(E1000_IAM);
 508         regs_buff[25] = rd32(E1000_IMIRVP);
 509
 510         /* Flow Control */
 511         regs_buff[26] = rd32(E1000_FCAL);
 512         regs_buff[27] = rd32(E1000_FCAH);
 513         regs_buff[28] = rd32(E1000_FCTTV);
 514         regs_buff[29] = rd32(E1000_FCRTL);
 515         regs_buff[30] = rd32(E1000_FCRTH);
 516         regs_buff[31] = rd32(E1000_FCRTV);
 517
 518         /* Receive */
 519         regs_buff[32] = rd32(E1000_RCTL);
 520         regs_buff[33] = rd32(E1000_RXCSUM);
 521         regs_buff[34] = rd32(E1000_RLPML);
 522         regs_buff[35] = rd32(E1000_RFCTL);
 523         regs_buff[36] = rd32(E1000_MRQC);
 524         regs_buff[37] = rd32(E1000_VT_CTL);
 525
 526         /* Transmit */
 527         regs_buff[38] = rd32(E1000_TCTL);
 528         regs_buff[39] = rd32(E1000_TCTL_EXT);
 529         regs_buff[40] = rd32(E1000_TIPG);
 530         regs_buff[41] = rd32(E1000_DTXCTL);
 531
 532         /* Wake Up */
 533         regs_buff[42] = rd32(E1000_WUC);
 534         regs_buff[43] = rd32(E1000_WUFC);
 535         regs_buff[44] = rd32(E1000_WUS);
 536         regs_buff[45] = rd32(E1000_IPAV);
 537         regs_buff[46] = rd32(E1000_WUPL);
 538
 539         /* MAC */
 540         regs_buff[47] = rd32(E1000_PCS_CFG0);
 541         regs_buff[48] = rd32(E1000_PCS_LCTL);
 542         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 543         regs_buff[50] = rd32(E1000_PCS_ANADV);
 544         regs_buff[51] = rd32(E1000_PCS_LPAB);
 545         regs_buff[52] = rd32(E1000_PCS_NPTX);
 546         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 547
 548         /* Statistics */
 549         regs_buff[54] = adapter->stats.crcerrs;
 550         regs_buff[55] = adapter->stats.algnerrc;
 551         regs_buff[56] = adapter->stats.symerrs;
 552         regs_buff[57] = adapter->stats.rxerrc;
 553         regs_buff[58] = adapter->stats.mpc;
 554         regs_buff[59] = adapter->stats.scc;
 555         regs_buff[60] = adapter->stats.ecol;
 556         regs_buff[61] = adapter->stats.mcc;
 557         regs_buff[62] = adapter->stats.latecol;
 558         regs_buff[63] = adapter->stats.colc;
 559         regs_buff[64] = adapter->stats.dc;
 560         regs_buff[65] = adapter->stats.tncrs;
 561         regs_buff[66] = adapter->stats.sec;
 562         regs_buff[67] = adapter->stats.htdpmc;
 563         regs_buff[68] = adapter->stats.rlec;
 564         regs_buff[69] = adapter->stats.xonrxc;
 565         regs_buff[70] = adapter->stats.xontxc;
 566         regs_buff[71] = adapter->stats.xoffrxc;
 567         regs_buff[72] = adapter->stats.xofftxc;
 568         regs_buff[73] = adapter->stats.fcruc;
 569         regs_buff[74] = adapter->stats.prc64;
 570         regs_buff[75] = adapter->stats.prc127;
 571         regs_buff[76] = adapter->stats.prc255;
 572         regs_buff[77] = adapter->stats.prc511;
 573         regs_buff[78] = adapter->stats.prc1023;
 574         regs_buff[79] = adapter->stats.prc1522;
 575         regs_buff[80] = adapter->stats.gprc;
 576         regs_buff[81] = adapter->stats.bprc;
 577         regs_buff[82] = adapter->stats.mprc;
 578         regs_buff[83] = adapter->stats.gptc;
 579         regs_buff[84] = adapter->stats.gorc;
 580         regs_buff[86] = adapter->stats.gotc;
 581         regs_buff[88] = adapter->stats.rnbc;
 582         regs_buff[89] = adapter->stats.ruc;
 583         regs_buff[90] = adapter->stats.rfc;
 584         regs_buff[91] = adapter->stats.roc;
 585         regs_buff[92] = adapter->stats.rjc;
 586         regs_buff[93] = adapter->stats.mgprc;
 587         regs_buff[94] = adapter->stats.mgpdc;
 588         regs_buff[95] = adapter->stats.mgptc;
 589         regs_buff[96] = adapter->stats.tor;
 590         regs_buff[98] = adapter->stats.tot;
 591         regs_buff[100] = adapter->stats.tpr;
 592         regs_buff[101] = adapter->stats.tpt;
 593         regs_buff[102] = adapter->stats.ptc64;
 594         regs_buff[103] = adapter->stats.ptc127;
 595         regs_buff[104] = adapter->stats.ptc255;
 596         regs_buff[105] = adapter->stats.ptc511;
 597         regs_buff[106] = adapter->stats.ptc1023;
 598         regs_buff[107] = adapter->stats.ptc1522;
 599         regs_buff[108] = adapter->stats.mptc;
 600         regs_buff[109] = adapter->stats.bptc;
 601         regs_buff[110] = adapter->stats.tsctc;
 602         regs_buff[111] = adapter->stats.iac;
 603         regs_buff[112] = adapter->stats.rpthc;
 604         regs_buff[113] = adapter->stats.hgptc;
 605         regs_buff[114] = adapter->stats.hgorc;
 606         regs_buff[116] = adapter->stats.hgotc;
 607         regs_buff[118] = adapter->stats.lenerrs;
 608         regs_buff[119] = adapter->stats.scvpc;
 609         regs_buff[120] = adapter->stats.hrmpc;
 610
 611         for (i = 0; i < 4; i++)
 612                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 613         for (i = 0; i < 4; i++)
 614                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 615         for (i = 0; i < 4; i++)
 616                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 617         for (i = 0; i < 4; i++)
 618                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 619         for (i = 0; i < 4; i++)
 620                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 621         for (i = 0; i < 4; i++)
 622                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 623         for (i = 0; i < 4; i++)
 624                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 625         for (i = 0; i < 4; i++)
 626                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 627
 628         for (i = 0; i < 10; i++)
 629                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 630         for (i = 0; i < 8; i++)
 631                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 632         for (i = 0; i < 8; i++)
 633                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 634         for (i = 0; i < 16; i++)
 635                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 636         for (i = 0; i < 16; i++)
 637                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 638
 639         for (i = 0; i < 4; i++)
 640                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 641         for (i = 0; i < 4; i++)
 642                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 643         for (i = 0; i < 4; i++)
 644                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 645         for (i = 0; i < 4; i++)
 646                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 647         for (i = 0; i < 4; i++)
 648                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 649         for (i = 0; i < 4; i++)
 650                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 651         for (i = 0; i < 4; i++)
 652                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 653         for (i = 0; i < 4; i++)
 654                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 655         for (i = 0; i < 4; i++)
 656                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 657
 658         for (i = 0; i < 4; i++)
 659                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 660         for (i = 0; i < 4; i++)
 661                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 662         for (i = 0; i < 32; i++)
 663                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 664         for (i = 0; i < 128; i++)
 665                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 666         for (i = 0; i < 128; i++)
 667                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 668         for (i = 0; i < 4; i++)
 669                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 670
 671         regs_buff[547] = rd32(E1000_TDFH);
 672         regs_buff[548] = rd32(E1000_TDFT);
 673         regs_buff[549] = rd32(E1000_TDFHS);
 674         regs_buff[550] = rd32(E1000_TDFPC);
 675
 676         if (hw->mac.type > e1000_82580) {
 677                 regs_buff[551] = adapter->stats.o2bgptc;
 678                 regs_buff[552] = adapter->stats.b2ospc;
 679                 regs_buff[553] = adapter->stats.o2bspc;
 680                 regs_buff[554] = adapter->stats.b2ogprc;
 681         }
 682
 683         if (hw->mac.type != e1000_82576)
 684                 return;
 685         for (i = 0; i < 12; i++)
 686                 regs_buff[555 + i] = rd32(E1000_SRRCTL(i + 4));
 687         for (i = 0; i < 4; i++)
 688                 regs_buff[567 + i] = rd32(E1000_PSRTYPE(i + 4));
 689         for (i = 0; i < 12; i++)
 690                 regs_buff[571 + i] = rd32(E1000_RDBAL(i + 4));
 691         for (i = 0; i < 12; i++)
 692                 regs_buff[583 + i] = rd32(E1000_RDBAH(i + 4));
 693         for (i = 0; i < 12; i++)
 694                 regs_buff[595 + i] = rd32(E1000_RDLEN(i + 4));
 695         for (i = 0; i < 12; i++)
 696                 regs_buff[607 + i] = rd32(E1000_RDH(i + 4));
 697         for (i = 0; i < 12; i++)
 698                 regs_buff[619 + i] = rd32(E1000_RDT(i + 4));
 699         for (i = 0; i < 12; i++)
 700                 regs_buff[631 + i] = rd32(E1000_RXDCTL(i + 4));
 701
 702         for (i = 0; i < 12; i++)
 703                 regs_buff[643 + i] = rd32(E1000_TDBAL(i + 4));
 704         for (i = 0; i < 12; i++)
 705                 regs_buff[655 + i] = rd32(E1000_TDBAH(i + 4));
 706         for (i = 0; i < 12; i++)
 707                 regs_buff[667 + i] = rd32(E1000_TDLEN(i + 4));
 708         for (i = 0; i < 12; i++)
 709                 regs_buff[679 + i] = rd32(E1000_TDH(i + 4));
 710         for (i = 0; i < 12; i++)
 711                 regs_buff[691 + i] = rd32(E1000_TDT(i + 4));
 712         for (i = 0; i < 12; i++)
 713                 regs_buff[703 + i] = rd32(E1000_TXDCTL(i + 4));
 714         for (i = 0; i < 12; i++)
 715                 regs_buff[715 + i] = rd32(E1000_TDWBAL(i + 4));
 716         for (i = 0; i < 12; i++)
 717                 regs_buff[727 + i] = rd32(E1000_TDWBAH(i + 4));
 718 }
 719
 720 static int igb_get_eeprom_len(struct net_device *netdev)
 721 {
 722         struct igb_adapter *adapter = netdev_priv(netdev);
 723         return adapter->hw.nvm.word_size * 2;
 724 }
 725
 726 static int igb_get_eeprom(struct net_device *netdev,
 727                           struct ethtool_eeprom *eeprom, u8 *bytes)
 728 {
 729         struct igb_adapter *adapter = netdev_priv(netdev);
 730         struct e1000_hw *hw = &adapter->hw;
 731         u16 *eeprom_buff;
 732         int first_word, last_word;
 733         int ret_val = 0;
 734         u16 i;
 735
 736         if (eeprom->len == 0)
 737                 return -EINVAL;
 738
 739         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 740
 741         first_word = eeprom->offset >> 1;
 742         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 743
 744         eeprom_buff = kmalloc(sizeof(u16) *
 745                         (last_word - first_word + 1), GFP_KERNEL);
 746         if (!eeprom_buff)
 747                 return -ENOMEM;
 748
 749         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 750                 ret_val = hw->nvm.ops.read(hw, first_word,
 751                                            last_word - first_word + 1,
 752                                            eeprom_buff);
 753         else {
 754                 for (i = 0; i < last_word - first_word + 1; i++) {
 755                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 756                                                    &eeprom_buff[i]);
 757                         if (ret_val)
 758                                 break;
 759                 }
 760         }
 761
 762         /* Device's eeprom is always little-endian, word addressable */
 763         for (i = 0; i < last_word - first_word + 1; i++)
 764                 le16_to_cpus(&eeprom_buff[i]);
 765
 766         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 767                         eeprom->len);
 768         kfree(eeprom_buff);
 769
 770         return ret_val;
 771 }
 772
 773 static int igb_set_eeprom(struct net_device *netdev,
 774                           struct ethtool_eeprom *eeprom, u8 *bytes)
 775 {
 776         struct igb_adapter *adapter = netdev_priv(netdev);
 777         struct e1000_hw *hw = &adapter->hw;
 778         u16 *eeprom_buff;
 779         void *ptr;
 780         int max_len, first_word, last_word, ret_val = 0;
 781         u16 i;
 782
 783         if (eeprom->len == 0)
 784                 return -EOPNOTSUPP;
 785
 786         if ((hw->mac.type >= e1000_i210) &&
 787             !igb_get_flash_presence_i210(hw)) {
 788                 return -EOPNOTSUPP;
 789         }
 790
 791         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 792                 return -EFAULT;
 793
 794         max_len = hw->nvm.word_size * 2;
 795
 796         first_word = eeprom->offset >> 1;
 797         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 798         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 799         if (!eeprom_buff)
 800                 return -ENOMEM;
 801
 802         ptr = (void *)eeprom_buff;
 803
 804         if (eeprom->offset & 1) {
 805                 /* need read/modify/write of first changed EEPROM word
 806                  * only the second byte of the word is being modified
 807                  */
 808                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 809                                             &eeprom_buff[0]);
 810                 ptr++;
 811         }
 812         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 813                 /* need read/modify/write of last changed EEPROM word
 814                  * only the first byte of the word is being modified
 815                  */
 816                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 817                                    &eeprom_buff[last_word - first_word]);
 818         }
 819
 820         /* Device's eeprom is always little-endian, word addressable */
 821         for (i = 0; i < last_word - first_word + 1; i++)
 822                 le16_to_cpus(&eeprom_buff[i]);
 823
 824         memcpy(ptr, bytes, eeprom->len);
 825
 826         for (i = 0; i < last_word - first_word + 1; i++)
 827                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 828
 829         ret_val = hw->nvm.ops.write(hw, first_word,
 830                                     last_word - first_word + 1, eeprom_buff);
 831
 832         /* Update the checksum if nvm write succeeded */
 833         if (ret_val == 0)
 834                 hw->nvm.ops.update(hw);
 835
 836         igb_set_fw_version(adapter);
 837         kfree(eeprom_buff);
 838         return ret_val;
 839 }
 840
 841 static void igb_get_drvinfo(struct net_device *netdev,
 842                             struct ethtool_drvinfo *drvinfo)
 843 {
 844         struct igb_adapter *adapter = netdev_priv(netdev);
 845
 846         strlcpy(drvinfo->driver,  igb_driver_name, sizeof(drvinfo->driver));
 847         strlcpy(drvinfo->version, igb_driver_version, sizeof(drvinfo->version));
 848
 849         /* EEPROM image version # is reported as firmware version # for
 850          * 82575 controllers
 851          */
 852         strlcpy(drvinfo->fw_version, adapter->fw_version,
 853                 sizeof(drvinfo->fw_version));
 854         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
 855                 sizeof(drvinfo->bus_info));
 856 }
 857
 858 static void igb_get_ringparam(struct net_device *netdev,
 859                               struct ethtool_ringparam *ring)
 860 {
 861         struct igb_adapter *adapter = netdev_priv(netdev);
 862
 863         ring->rx_max_pending = IGB_MAX_RXD;
 864         ring->tx_max_pending = IGB_MAX_TXD;
 865         ring->rx_pending = adapter->rx_ring_count;
 866         ring->tx_pending = adapter->tx_ring_count;
 867 }
 868
 869 static int igb_set_ringparam(struct net_device *netdev,
 870                              struct ethtool_ringparam *ring)
 871 {
 872         struct igb_adapter *adapter = netdev_priv(netdev);
 873         struct igb_ring *temp_ring;
 874         int i, err = 0;
 875         u16 new_rx_count, new_tx_count;
 876
 877         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 878                 return -EINVAL;
 879
 880         new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
 881         new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
 882         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 883
 884         new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
 885         new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
 886         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 887
 888         if ((new_tx_count == adapter->tx_ring_count) &&
 889             (new_rx_count == adapter->rx_ring_count)) {
 890                 /* nothing to do */
 891                 return 0;
 892         }
 893
 894         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 895                 usleep_range(1000, 2000);
 896
 897         if (!netif_running(adapter->netdev)) {
 898                 for (i = 0; i < adapter->num_tx_queues; i++)
 899                         adapter->tx_ring[i]->count = new_tx_count;
 900                 for (i = 0; i < adapter->num_rx_queues; i++)
 901                         adapter->rx_ring[i]->count = new_rx_count;
 902                 adapter->tx_ring_count = new_tx_count;
 903                 adapter->rx_ring_count = new_rx_count;
 904                 goto clear_reset;
 905         }
 906
 907         if (adapter->num_tx_queues > adapter->num_rx_queues)
 908                 temp_ring = vmalloc(adapter->num_tx_queues *
 909                                     sizeof(struct igb_ring));
 910         else
 911                 temp_ring = vmalloc(adapter->num_rx_queues *
 912                                     sizeof(struct igb_ring));
 913
 914         if (!temp_ring) {
 915                 err = -ENOMEM;
 916                 goto clear_reset;
 917         }
 918
 919         igb_down(adapter);
 920
 921         /* We can't just free everything and then setup again,
 922          * because the ISRs in MSI-X mode get passed pointers
 923          * to the Tx and Rx ring structs.
 924          */
 925         if (new_tx_count != adapter->tx_ring_count) {
 926                 for (i = 0; i < adapter->num_tx_queues; i++) {
 927                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 928                                sizeof(struct igb_ring));
 929
 930                         temp_ring[i].count = new_tx_count;
 931                         err = igb_setup_tx_resources(&temp_ring[i]);
 932                         if (err) {
 933                                 while (i) {
 934                                         i--;
 935                                         igb_free_tx_resources(&temp_ring[i]);
 936                                 }
 937                                 goto err_setup;
 938                         }
 939                 }
 940
 941                 for (i = 0; i < adapter->num_tx_queues; i++) {
 942                         igb_free_tx_resources(adapter->tx_ring[i]);
 943
 944                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 945                                sizeof(struct igb_ring));
 946                 }
 947
 948                 adapter->tx_ring_count = new_tx_count;
 949         }
 950
 951         if (new_rx_count != adapter->rx_ring_count) {
 952                 for (i = 0; i < adapter->num_rx_queues; i++) {
 953                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 954                                sizeof(struct igb_ring));
 955
 956                         temp_ring[i].count = new_rx_count;
 957                         err = igb_setup_rx_resources(&temp_ring[i]);
 958                         if (err) {
 959                                 while (i) {
 960                                         i--;
 961                                         igb_free_rx_resources(&temp_ring[i]);
 962                                 }
 963                                 goto err_setup;
 964                         }
 965
 966                 }
 967
 968                 for (i = 0; i < adapter->num_rx_queues; i++) {
 969                         igb_free_rx_resources(adapter->rx_ring[i]);
 970
 971                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 972                                sizeof(struct igb_ring));
 973                 }
 974
 975                 adapter->rx_ring_count = new_rx_count;
 976         }
 977 err_setup:
 978         igb_up(adapter);
 979         vfree(temp_ring);
 980 clear_reset:
 981         clear_bit(__IGB_RESETTING, &adapter->state);
 982         return err;
 983 }
 984
 985 /* ethtool register test data */
 986 struct igb_reg_test {
 987         u16 reg;
 988         u16 reg_offset;
 989         u16 array_len;
 990         u16 test_type;
 991         u32 mask;
 992         u32 write;
 993 };
 994
 995 /* In the hardware, registers are laid out either singly, in arrays
 996  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
 997  * most tests take place on arrays or single registers (handled
 998  * as a single-element array) and special-case the tables.
 999  * Table tests are always pattern tests.
1000  *
1001  * We also make provision for some required setup steps by specifying
1002  * registers to be written without any read-back testing.
1003  */
1004
1005 #define PATTERN_TEST    1
1006 #define SET_READ_TEST   2
1007 #define WRITE_NO_TEST   3
1008 #define TABLE32_TEST    4
1009 #define TABLE64_TEST_LO 5
1010 #define TABLE64_TEST_HI 6
1011
1012 /* i210 reg test */
1013 static struct igb_reg_test reg_test_i210[] = {
1014         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1015         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1016         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1017         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1018         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1019         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1020         /* RDH is read-only for i210, only test RDT. */
1021         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1022         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1023         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1024         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1025         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1026         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1027         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1028         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1029         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1030         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1031         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1032         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1033         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1034                                                 0xFFFFFFFF, 0xFFFFFFFF },
1035         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1036                                                 0x900FFFFF, 0xFFFFFFFF },
1037         { E1000_MTA,       0, 128, TABLE32_TEST,
1038                                                 0xFFFFFFFF, 0xFFFFFFFF },
1039         { 0, 0, 0, 0, 0 }
1040 };
1041
1042 /* i350 reg test */
1043 static struct igb_reg_test reg_test_i350[] = {
1044         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1045         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1046         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1047         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFF0000, 0xFFFF0000 },
1048         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1049         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1050         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1051         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1052         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1053         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1054         /* RDH is read-only for i350, only test RDT. */
1055         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1056         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1057         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1058         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1059         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1060         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1061         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1062         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1063         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1064         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1065         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1066         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1067         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1068         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1069         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1070         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1071         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1072         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1073                                                 0xFFFFFFFF, 0xFFFFFFFF },
1074         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1075                                                 0xC3FFFFFF, 0xFFFFFFFF },
1076         { E1000_RA2,       0, 16, TABLE64_TEST_LO,
1077                                                 0xFFFFFFFF, 0xFFFFFFFF },
1078         { E1000_RA2,       0, 16, TABLE64_TEST_HI,
1079                                                 0xC3FFFFFF, 0xFFFFFFFF },
1080         { E1000_MTA,       0, 128, TABLE32_TEST,
1081                                                 0xFFFFFFFF, 0xFFFFFFFF },
1082         { 0, 0, 0, 0 }
1083 };
1084
1085 /* 82580 reg test */
1086 static struct igb_reg_test reg_test_82580[] = {
1087         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1088         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1089         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1090         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1091         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1092         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1093         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1094         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1095         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1096         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1097         /* RDH is read-only for 82580, only test RDT. */
1098         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1099         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1100         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1101         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1102         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1103         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1104         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1105         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1106         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1107         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1108         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1109         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1110         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1111         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1112         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1113         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1114         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1115         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1116                                                 0xFFFFFFFF, 0xFFFFFFFF },
1117         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1118                                                 0x83FFFFFF, 0xFFFFFFFF },
1119         { E1000_RA2,       0, 8, TABLE64_TEST_LO,
1120                                                 0xFFFFFFFF, 0xFFFFFFFF },
1121         { E1000_RA2,       0, 8, TABLE64_TEST_HI,
1122                                                 0x83FFFFFF, 0xFFFFFFFF },
1123         { E1000_MTA,       0, 128, TABLE32_TEST,
1124                                                 0xFFFFFFFF, 0xFFFFFFFF },
1125         { 0, 0, 0, 0 }
1126 };
1127
1128 /* 82576 reg test */
1129 static struct igb_reg_test reg_test_82576[] = {
1130         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1131         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1132         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1133         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1134         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1135         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1136         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1137         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1138         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1139         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1140         /* Enable all RX queues before testing. */
1141         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0,
1142           E1000_RXDCTL_QUEUE_ENABLE },
1143         { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST, 0,
1144           E1000_RXDCTL_QUEUE_ENABLE },
1145         /* RDH is read-only for 82576, only test RDT. */
1146         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1147         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1148         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
1149         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
1150         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1151         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1152         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1153         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1154         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1155         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1156         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1157         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1158         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1159         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1160         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1161         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1162         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1163         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1164         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1165         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1166         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1167         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1168         { 0, 0, 0, 0 }
1169 };
1170
1171 /* 82575 register test */
1172 static struct igb_reg_test reg_test_82575[] = {
1173         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1174         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1175         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1176         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1177         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1178         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1179         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1180         /* Enable all four RX queues before testing. */
1181         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0,
1182           E1000_RXDCTL_QUEUE_ENABLE },
1183         /* RDH is read-only for 82575, only test RDT. */
1184         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1185         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
1186         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1187         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1188         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1189         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1190         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1191         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1192         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1193         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
1194         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
1195         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1196         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
1197         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1198         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
1199         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1200         { 0, 0, 0, 0 }
1201 };
1202
1203 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
1204                              int reg, u32 mask, u32 write)
1205 {
1206         struct e1000_hw *hw = &adapter->hw;
1207         u32 pat, val;
1208         static const u32 _test[] = {
1209                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1210         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
1211                 wr32(reg, (_test[pat] & write));
1212                 val = rd32(reg) & mask;
1213                 if (val != (_test[pat] & write & mask)) {
1214                         dev_err(&adapter->pdev->dev,
1215                                 "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1216                                 reg, val, (_test[pat] & write & mask));
1217                         *data = reg;
1218                         return true;
1219                 }
1220         }
1221
1222         return false;
1223 }
1224
1225 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
1226                               int reg, u32 mask, u32 write)
1227 {
1228         struct e1000_hw *hw = &adapter->hw;
1229         u32 val;
1230
1231         wr32(reg, write & mask);
1232         val = rd32(reg);
1233         if ((write & mask) != (val & mask)) {
1234                 dev_err(&adapter->pdev->dev,
1235                         "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1236                         reg, (val & mask), (write & mask));
1237                 *data = reg;
1238                 return true;
1239         }
1240
1241         return false;
1242 }
1243
1244 #define REG_PATTERN_TEST(reg, mask, write) \
1245         do { \
1246                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1247                         return 1; \
1248         } while (0)
1249
1250 #define REG_SET_AND_CHECK(reg, mask, write) \
1251         do { \
1252                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1253                         return 1; \
1254         } while (0)
1255
1256 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1257 {
1258         struct e1000_hw *hw = &adapter->hw;
1259         struct igb_reg_test *test;
1260         u32 value, before, after;
1261         u32 i, toggle;
1262
1263         switch (adapter->hw.mac.type) {
1264         case e1000_i350:
1265         case e1000_i354:
1266                 test = reg_test_i350;
1267                 toggle = 0x7FEFF3FF;
1268                 break;
1269         case e1000_i210:
1270         case e1000_i211:
1271                 test = reg_test_i210;
1272                 toggle = 0x7FEFF3FF;
1273                 break;
1274         case e1000_82580:
1275                 test = reg_test_82580;
1276                 toggle = 0x7FEFF3FF;
1277                 break;
1278         case e1000_82576:
1279                 test = reg_test_82576;
1280                 toggle = 0x7FFFF3FF;
1281                 break;
1282         default:
1283                 test = reg_test_82575;
1284                 toggle = 0x7FFFF3FF;
1285                 break;
1286         }
1287
1288         /* Because the status register is such a special case,
1289          * we handle it separately from the rest of the register
1290          * tests.  Some bits are read-only, some toggle, and some
1291          * are writable on newer MACs.
1292          */
1293         before = rd32(E1000_STATUS);
1294         value = (rd32(E1000_STATUS) & toggle);
1295         wr32(E1000_STATUS, toggle);
1296         after = rd32(E1000_STATUS) & toggle;
1297         if (value != after) {
1298                 dev_err(&adapter->pdev->dev,
1299                         "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1300                         after, value);
1301                 *data = 1;
1302                 return 1;
1303         }
1304         /* restore previous status */
1305         wr32(E1000_STATUS, before);
1306
1307         /* Perform the remainder of the register test, looping through
1308          * the test table until we either fail or reach the null entry.
1309          */
1310         while (test->reg) {
1311                 for (i = 0; i < test->array_len; i++) {
1312                         switch (test->test_type) {
1313                         case PATTERN_TEST:
1314                                 REG_PATTERN_TEST(test->reg +
1315                                                 (i * test->reg_offset),
1316                                                 test->mask,
1317                                                 test->write);
1318                                 break;
1319                         case SET_READ_TEST:
1320                                 REG_SET_AND_CHECK(test->reg +
1321                                                 (i * test->reg_offset),
1322                                                 test->mask,
1323                                                 test->write);
1324                                 break;
1325                         case WRITE_NO_TEST:
1326                                 writel(test->write,
1327                                     (adapter->hw.hw_addr + test->reg)
1328                                         + (i * test->reg_offset));
1329                                 break;
1330                         case TABLE32_TEST:
1331                                 REG_PATTERN_TEST(test->reg + (i * 4),
1332                                                 test->mask,
1333                                                 test->write);
1334                                 break;
1335                         case TABLE64_TEST_LO:
1336                                 REG_PATTERN_TEST(test->reg + (i * 8),
1337                                                 test->mask,
1338                                                 test->write);
1339                                 break;
1340                         case TABLE64_TEST_HI:
1341                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1342                                                 test->mask,
1343                                                 test->write);
1344                                 break;
1345                         }
1346                 }
1347                 test++;
1348         }
1349
1350         *data = 0;
1351         return 0;
1352 }
1353
1354 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1355 {
1356         struct e1000_hw *hw = &adapter->hw;
1357
1358         *data = 0;
1359
1360         /* Validate eeprom on all parts but flashless */
1361         switch (hw->mac.type) {
1362         case e1000_i210:
1363         case e1000_i211:
1364                 if (igb_get_flash_presence_i210(hw)) {
1365                         if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1366                                 *data = 2;
1367                 }
1368                 break;
1369         default:
1370                 if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1371                         *data = 2;
1372                 break;
1373         }
1374
1375         return *data;
1376 }
1377
1378 static irqreturn_t igb_test_intr(int irq, void *data)
1379 {
1380         struct igb_adapter *adapter = (struct igb_adapter *) data;
1381         struct e1000_hw *hw = &adapter->hw;
1382
1383         adapter->test_icr |= rd32(E1000_ICR);
1384
1385         return IRQ_HANDLED;
1386 }
1387
1388 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1389 {
1390         struct e1000_hw *hw = &adapter->hw;
1391         struct net_device *netdev = adapter->netdev;
1392         u32 mask, ics_mask, i = 0, shared_int = true;
1393         u32 irq = adapter->pdev->irq;
1394
1395         *data = 0;
1396
1397         /* Hook up test interrupt handler just for this test */
1398         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1399                 if (request_irq(adapter->msix_entries[0].vector,
1400                                 igb_test_intr, 0, netdev->name, adapter)) {
1401                         *data = 1;
1402                         return -1;
1403                 }
1404         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1405                 shared_int = false;
1406                 if (request_irq(irq,
1407                                 igb_test_intr, 0, netdev->name, adapter)) {
1408                         *data = 1;
1409                         return -1;
1410                 }
1411         } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1412                                 netdev->name, adapter)) {
1413                 shared_int = false;
1414         } else if (request_irq(irq, igb_test_intr, IRQF_SHARED,
1415                  netdev->name, adapter)) {
1416                 *data = 1;
1417                 return -1;
1418         }
1419         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1420                 (shared_int ? "shared" : "unshared"));
1421
1422         /* Disable all the interrupts */
1423         wr32(E1000_IMC, ~0);
1424         wrfl();
1425         usleep_range(10000, 11000);
1426
1427         /* Define all writable bits for ICS */
1428         switch (hw->mac.type) {
1429         case e1000_82575:
1430                 ics_mask = 0x37F47EDD;
1431                 break;
1432         case e1000_82576:
1433                 ics_mask = 0x77D4FBFD;
1434                 break;
1435         case e1000_82580:
1436                 ics_mask = 0x77DCFED5;
1437                 break;
1438         case e1000_i350:
1439         case e1000_i354:
1440         case e1000_i210:
1441         case e1000_i211:
1442                 ics_mask = 0x77DCFED5;
1443                 break;
1444         default:
1445                 ics_mask = 0x7FFFFFFF;
1446                 break;
1447         }
1448
1449         /* Test each interrupt */
1450         for (; i < 31; i++) {
1451                 /* Interrupt to test */
1452                 mask = BIT(i);
1453
1454                 if (!(mask & ics_mask))
1455                         continue;
1456
1457                 if (!shared_int) {
1458                         /* Disable the interrupt to be reported in
1459                          * the cause register and then force the same
1460                          * interrupt and see if one gets posted.  If
1461                          * an interrupt was posted to the bus, the
1462                          * test failed.
1463                          */
1464                         adapter->test_icr = 0;
1465
1466                         /* Flush any pending interrupts */
1467                         wr32(E1000_ICR, ~0);
1468
1469                         wr32(E1000_IMC, mask);
1470                         wr32(E1000_ICS, mask);
1471                         wrfl();
1472                         usleep_range(10000, 11000);
1473
1474                         if (adapter->test_icr & mask) {
1475                                 *data = 3;
1476                                 break;
1477                         }
1478                 }
1479
1480                 /* Enable the interrupt to be reported in
1481                  * the cause register and then force the same
1482                  * interrupt and see if one gets posted.  If
1483                  * an interrupt was not posted to the bus, the
1484                  * test failed.
1485                  */
1486                 adapter->test_icr = 0;
1487
1488                 /* Flush any pending interrupts */
1489                 wr32(E1000_ICR, ~0);
1490
1491                 wr32(E1000_IMS, mask);
1492                 wr32(E1000_ICS, mask);
1493                 wrfl();
1494                 usleep_range(10000, 11000);
1495
1496                 if (!(adapter->test_icr & mask)) {
1497                         *data = 4;
1498                         break;
1499                 }
1500
1501                 if (!shared_int) {
1502                         /* Disable the other interrupts to be reported in
1503                          * the cause register and then force the other
1504                          * interrupts and see if any get posted.  If
1505                          * an interrupt was posted to the bus, the
1506                          * test failed.
1507                          */
1508                         adapter->test_icr = 0;
1509
1510                         /* Flush any pending interrupts */
1511                         wr32(E1000_ICR, ~0);
1512
1513                         wr32(E1000_IMC, ~mask);
1514                         wr32(E1000_ICS, ~mask);
1515                         wrfl();
1516                         usleep_range(10000, 11000);
1517
1518                         if (adapter->test_icr & mask) {
1519                                 *data = 5;
1520                                 break;
1521                         }
1522                 }
1523         }
1524
1525         /* Disable all the interrupts */
1526         wr32(E1000_IMC, ~0);
1527         wrfl();
1528         usleep_range(10000, 11000);
1529
1530         /* Unhook test interrupt handler */
1531         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1532                 free_irq(adapter->msix_entries[0].vector, adapter);
1533         else
1534                 free_irq(irq, adapter);
1535
1536         return *data;
1537 }
1538
1539 static void igb_free_desc_rings(struct igb_adapter *adapter)
1540 {
1541         igb_free_tx_resources(&adapter->test_tx_ring);
1542         igb_free_rx_resources(&adapter->test_rx_ring);
1543 }
1544
1545 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1546 {
1547         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1548         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1549         struct e1000_hw *hw = &adapter->hw;
1550         int ret_val;
1551
1552         /* Setup Tx descriptor ring and Tx buffers */
1553         tx_ring->count = IGB_DEFAULT_TXD;
1554         tx_ring->dev = &adapter->pdev->dev;
1555         tx_ring->netdev = adapter->netdev;
1556         tx_ring->reg_idx = adapter->vfs_allocated_count;
1557
1558         if (igb_setup_tx_resources(tx_ring)) {
1559                 ret_val = 1;
1560                 goto err_nomem;
1561         }
1562
1563         igb_setup_tctl(adapter);
1564         igb_configure_tx_ring(adapter, tx_ring);
1565
1566         /* Setup Rx descriptor ring and Rx buffers */
1567         rx_ring->count = IGB_DEFAULT_RXD;
1568         rx_ring->dev = &adapter->pdev->dev;
1569         rx_ring->netdev = adapter->netdev;
1570         rx_ring->reg_idx = adapter->vfs_allocated_count;
1571
1572         if (igb_setup_rx_resources(rx_ring)) {
1573                 ret_val = 3;
1574                 goto err_nomem;
1575         }
1576
1577         /* set the default queue to queue 0 of PF */
1578         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1579
1580         /* enable receive ring */
1581         igb_setup_rctl(adapter);
1582         igb_configure_rx_ring(adapter, rx_ring);
1583
1584         igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));
1585
1586         return 0;
1587
1588 err_nomem:
1589         igb_free_desc_rings(adapter);
1590         return ret_val;
1591 }
1592
1593 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1594 {
1595         struct e1000_hw *hw = &adapter->hw;
1596
1597         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1598         igb_write_phy_reg(hw, 29, 0x001F);
1599         igb_write_phy_reg(hw, 30, 0x8FFC);
1600         igb_write_phy_reg(hw, 29, 0x001A);
1601         igb_write_phy_reg(hw, 30, 0x8FF0);
1602 }
1603
1604 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1605 {
1606         struct e1000_hw *hw = &adapter->hw;
1607         u32 ctrl_reg = 0;
1608
1609         hw->mac.autoneg = false;
1610
1611         if (hw->phy.type == e1000_phy_m88) {
1612                 if (hw->phy.id != I210_I_PHY_ID) {
1613                         /* Auto-MDI/MDIX Off */
1614                         igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1615                         /* reset to update Auto-MDI/MDIX */
1616                         igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1617                         /* autoneg off */
1618                         igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1619                 } else {
1620                         /* force 1000, set loopback  */
1621                         igb_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1622                         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1623                 }
1624         } else if (hw->phy.type == e1000_phy_82580) {
1625                 /* enable MII loopback */
1626                 igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041);
1627         }
1628
1629         /* add small delay to avoid loopback test failure */
1630         msleep(50);
1631
1632         /* force 1000, set loopback */
1633         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1634
1635         /* Now set up the MAC to the same speed/duplex as the PHY. */
1636         ctrl_reg = rd32(E1000_CTRL);
1637         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1638         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1639                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1640                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1641                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1642                      E1000_CTRL_SLU);    /* Set link up enable bit */
1643
1644         if (hw->phy.type == e1000_phy_m88)
1645                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1646
1647         wr32(E1000_CTRL, ctrl_reg);
1648
1649         /* Disable the receiver on the PHY so when a cable is plugged in, the
1650          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1651          */
1652         if (hw->phy.type == e1000_phy_m88)
1653                 igb_phy_disable_receiver(adapter);
1654
1655         mdelay(500);
1656         return 0;
1657 }
1658
1659 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1660 {
1661         return igb_integrated_phy_loopback(adapter);
1662 }
1663
1664 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1665 {
1666         struct e1000_hw *hw = &adapter->hw;
1667         u32 reg;
1668
1669         reg = rd32(E1000_CTRL_EXT);
1670
1671         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1672         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1673                 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1674                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1675                 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1676                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) ||
1677                 (hw->device_id == E1000_DEV_ID_I354_SGMII) ||
1678                 (hw->device_id == E1000_DEV_ID_I354_BACKPLANE_2_5GBPS)) {
1679                         /* Enable DH89xxCC MPHY for near end loopback */
1680                         reg = rd32(E1000_MPHY_ADDR_CTL);
1681                         reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1682                         E1000_MPHY_PCS_CLK_REG_OFFSET;
1683                         wr32(E1000_MPHY_ADDR_CTL, reg);
1684
1685                         reg = rd32(E1000_MPHY_DATA);
1686                         reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1687                         wr32(E1000_MPHY_DATA, reg);
1688                 }
1689
1690                 reg = rd32(E1000_RCTL);
1691                 reg |= E1000_RCTL_LBM_TCVR;
1692                 wr32(E1000_RCTL, reg);
1693
1694                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1695
1696                 reg = rd32(E1000_CTRL);
1697                 reg &= ~(E1000_CTRL_RFCE |
1698                          E1000_CTRL_TFCE |
1699                          E1000_CTRL_LRST);
1700                 reg |= E1000_CTRL_SLU |
1701                        E1000_CTRL_FD;
1702                 wr32(E1000_CTRL, reg);
1703
1704                 /* Unset switch control to serdes energy detect */
1705                 reg = rd32(E1000_CONNSW);
1706                 reg &= ~E1000_CONNSW_ENRGSRC;
1707                 wr32(E1000_CONNSW, reg);
1708
1709                 /* Unset sigdetect for SERDES loopback on
1710                  * 82580 and newer devices.
1711                  */
1712                 if (hw->mac.type >= e1000_82580) {
1713                         reg = rd32(E1000_PCS_CFG0);
1714                         reg |= E1000_PCS_CFG_IGN_SD;
1715                         wr32(E1000_PCS_CFG0, reg);
1716                 }
1717
1718                 /* Set PCS register for forced speed */
1719                 reg = rd32(E1000_PCS_LCTL);
1720                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1721                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1722                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1723                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1724                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1725                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1726                 wr32(E1000_PCS_LCTL, reg);
1727
1728                 return 0;
1729         }
1730
1731         return igb_set_phy_loopback(adapter);
1732 }
1733
1734 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1735 {
1736         struct e1000_hw *hw = &adapter->hw;
1737         u32 rctl;
1738         u16 phy_reg;
1739
1740         if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1741         (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1742         (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1743         (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) ||
1744         (hw->device_id == E1000_DEV_ID_I354_SGMII)) {
1745                 u32 reg;
1746
1747                 /* Disable near end loopback on DH89xxCC */
1748                 reg = rd32(E1000_MPHY_ADDR_CTL);
1749                 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1750                 E1000_MPHY_PCS_CLK_REG_OFFSET;
1751                 wr32(E1000_MPHY_ADDR_CTL, reg);
1752
1753                 reg = rd32(E1000_MPHY_DATA);
1754                 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1755                 wr32(E1000_MPHY_DATA, reg);
1756         }
1757
1758         rctl = rd32(E1000_RCTL);
1759         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1760         wr32(E1000_RCTL, rctl);
1761
1762         hw->mac.autoneg = true;
1763         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1764         if (phy_reg & MII_CR_LOOPBACK) {
1765                 phy_reg &= ~MII_CR_LOOPBACK;
1766                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1767                 igb_phy_sw_reset(hw);
1768         }
1769 }
1770
1771 static void igb_create_lbtest_frame(struct sk_buff *skb,
1772                                     unsigned int frame_size)
1773 {
1774         memset(skb->data, 0xFF, frame_size);
1775         frame_size /= 2;
1776         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1777         memset(&skb->data[frame_size + 10], 0xBE, 1);
1778         memset(&skb->data[frame_size + 12], 0xAF, 1);
1779 }
1780
1781 static int igb_check_lbtest_frame(struct igb_rx_buffer *rx_buffer,
1782                                   unsigned int frame_size)
1783 {
1784         unsigned char *data;
1785         bool match = true;
1786
1787         frame_size >>= 1;
1788
1789         data = kmap(rx_buffer->page);
1790
1791         if (data[3] != 0xFF ||
1792             data[frame_size + 10] != 0xBE ||
1793             data[frame_size + 12] != 0xAF)
1794                 match = false;
1795
1796         kunmap(rx_buffer->page);
1797
1798         return match;
1799 }
1800
1801 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1802                                 struct igb_ring *tx_ring,
1803                                 unsigned int size)
1804 {
1805         union e1000_adv_rx_desc *rx_desc;
1806         struct igb_rx_buffer *rx_buffer_info;
1807         struct igb_tx_buffer *tx_buffer_info;
1808         u16 rx_ntc, tx_ntc, count = 0;
1809
1810         /* initialize next to clean and descriptor values */
1811         rx_ntc = rx_ring->next_to_clean;
1812         tx_ntc = tx_ring->next_to_clean;
1813         rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1814
1815         while (igb_test_staterr(rx_desc, E1000_RXD_STAT_DD)) {
1816                 /* check Rx buffer */
1817                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1818
1819                 /* sync Rx buffer for CPU read */
1820                 dma_sync_single_for_cpu(rx_ring->dev,
1821                                         rx_buffer_info->dma,
1822                                         IGB_RX_BUFSZ,
1823                                         DMA_FROM_DEVICE);
1824
1825                 /* verify contents of skb */
1826                 if (igb_check_lbtest_frame(rx_buffer_info, size))
1827                         count++;
1828
1829                 /* sync Rx buffer for device write */
1830                 dma_sync_single_for_device(rx_ring->dev,
1831                                            rx_buffer_info->dma,
1832                                            IGB_RX_BUFSZ,
1833                                            DMA_FROM_DEVICE);
1834
1835                 /* unmap buffer on Tx side */
1836                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1837                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1838
1839                 /* increment Rx/Tx next to clean counters */
1840                 rx_ntc++;
1841                 if (rx_ntc == rx_ring->count)
1842                         rx_ntc = 0;
1843                 tx_ntc++;
1844                 if (tx_ntc == tx_ring->count)
1845                         tx_ntc = 0;
1846
1847                 /* fetch next descriptor */
1848                 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1849         }
1850
1851         netdev_tx_reset_queue(txring_txq(tx_ring));
1852
1853         /* re-map buffers to ring, store next to clean values */
1854         igb_alloc_rx_buffers(rx_ring, count);
1855         rx_ring->next_to_clean = rx_ntc;
1856         tx_ring->next_to_clean = tx_ntc;
1857
1858         return count;
1859 }
1860
1861 static int igb_run_loopback_test(struct igb_adapter *adapter)
1862 {
1863         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1864         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1865         u16 i, j, lc, good_cnt;
1866         int ret_val = 0;
1867         unsigned int size = IGB_RX_HDR_LEN;
1868         netdev_tx_t tx_ret_val;
1869         struct sk_buff *skb;
1870
1871         /* allocate test skb */
1872         skb = alloc_skb(size, GFP_KERNEL);
1873         if (!skb)
1874                 return 11;
1875
1876         /* place data into test skb */
1877         igb_create_lbtest_frame(skb, size);
1878         skb_put(skb, size);
1879
1880         /* Calculate the loop count based on the largest descriptor ring
1881          * The idea is to wrap the largest ring a number of times using 64
1882          * send/receive pairs during each loop
1883          */
1884
1885         if (rx_ring->count <= tx_ring->count)
1886                 lc = ((tx_ring->count / 64) * 2) + 1;
1887         else
1888                 lc = ((rx_ring->count / 64) * 2) + 1;
1889
1890         for (j = 0; j <= lc; j++) { /* loop count loop */
1891                 /* reset count of good packets */
1892                 good_cnt = 0;
1893
1894                 /* place 64 packets on the transmit queue*/
1895                 for (i = 0; i < 64; i++) {
1896                         skb_get(skb);
1897                         tx_ret_val = igb_xmit_frame_ring(skb, tx_ring);
1898                         if (tx_ret_val == NETDEV_TX_OK)
1899                                 good_cnt++;
1900                 }
1901
1902                 if (good_cnt != 64) {
1903                         ret_val = 12;
1904                         break;
1905                 }
1906
1907                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1908                 msleep(200);
1909
1910                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1911                 if (good_cnt != 64) {
1912                         ret_val = 13;
1913                         break;
1914                 }
1915         } /* end loop count loop */
1916
1917         /* free the original skb */
1918         kfree_skb(skb);
1919
1920         return ret_val;
1921 }
1922
1923 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1924 {
1925         /* PHY loopback cannot be performed if SoL/IDER
1926          * sessions are active
1927          */
1928         if (igb_check_reset_block(&adapter->hw)) {
1929                 dev_err(&adapter->pdev->dev,
1930                         "Cannot do PHY loopback test when SoL/IDER is active.\n");
1931                 *data = 0;
1932                 goto out;
1933         }
1934
1935         if (adapter->hw.mac.type == e1000_i354) {
1936                 dev_info(&adapter->pdev->dev,
1937                         "Loopback test not supported on i354.\n");
1938                 *data = 0;
1939                 goto out;
1940         }
1941         *data = igb_setup_desc_rings(adapter);
1942         if (*data)
1943                 goto out;
1944         *data = igb_setup_loopback_test(adapter);
1945         if (*data)
1946                 goto err_loopback;
1947         *data = igb_run_loopback_test(adapter);
1948         igb_loopback_cleanup(adapter);
1949
1950 err_loopback:
1951         igb_free_desc_rings(adapter);
1952 out:
1953         return *data;
1954 }
1955
1956 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1957 {
1958         struct e1000_hw *hw = &adapter->hw;
1959         *data = 0;
1960         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1961                 int i = 0;
1962
1963                 hw->mac.serdes_has_link = false;
1964
1965                 /* On some blade server designs, link establishment
1966                  * could take as long as 2-3 minutes
1967                  */
1968                 do {
1969                         hw->mac.ops.check_for_link(&adapter->hw);
1970                         if (hw->mac.serdes_has_link)
1971                                 return *data;
1972                         msleep(20);
1973                 } while (i++ < 3750);
1974
1975                 *data = 1;
1976         } else {
1977                 hw->mac.ops.check_for_link(&adapter->hw);
1978                 if (hw->mac.autoneg)
1979                         msleep(5000);
1980
1981                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
1982                         *data = 1;
1983         }
1984         return *data;
1985 }
1986
1987 static void igb_diag_test(struct net_device *netdev,
1988                           struct ethtool_test *eth_test, u64 *data)
1989 {
1990         struct igb_adapter *adapter = netdev_priv(netdev);
1991         u16 autoneg_advertised;
1992         u8 forced_speed_duplex, autoneg;
1993         bool if_running = netif_running(netdev);
1994
1995         set_bit(__IGB_TESTING, &adapter->state);
1996
1997         /* can't do offline tests on media switching devices */
1998         if (adapter->hw.dev_spec._82575.mas_capable)
1999                 eth_test->flags &= ~ETH_TEST_FL_OFFLINE;
2000         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2001                 /* Offline tests */
2002
2003                 /* save speed, duplex, autoneg settings */
2004                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
2005                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
2006                 autoneg = adapter->hw.mac.autoneg;
2007
2008                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
2009
2010                 /* power up link for link test */
2011                 igb_power_up_link(adapter);
2012
2013                 /* Link test performed before hardware reset so autoneg doesn't
2014                  * interfere with test result
2015                  */
2016                 if (igb_link_test(adapter, &data[TEST_LINK]))
2017                         eth_test->flags |= ETH_TEST_FL_FAILED;
2018
2019                 if (if_running)
2020                         /* indicate we're in test mode */
2021                         igb_close(netdev);
2022                 else
2023                         igb_reset(adapter);
2024
2025                 if (igb_reg_test(adapter, &data[TEST_REG]))
2026                         eth_test->flags |= ETH_TEST_FL_FAILED;
2027
2028                 igb_reset(adapter);
2029                 if (igb_eeprom_test(adapter, &data[TEST_EEP]))
2030                         eth_test->flags |= ETH_TEST_FL_FAILED;
2031
2032                 igb_reset(adapter);
2033                 if (igb_intr_test(adapter, &data[TEST_IRQ]))
2034                         eth_test->flags |= ETH_TEST_FL_FAILED;
2035
2036                 igb_reset(adapter);
2037                 /* power up link for loopback test */
2038                 igb_power_up_link(adapter);
2039                 if (igb_loopback_test(adapter, &data[TEST_LOOP]))
2040                         eth_test->flags |= ETH_TEST_FL_FAILED;
2041
2042                 /* restore speed, duplex, autoneg settings */
2043                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
2044                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
2045                 adapter->hw.mac.autoneg = autoneg;
2046
2047                 /* force this routine to wait until autoneg complete/timeout */
2048                 adapter->hw.phy.autoneg_wait_to_complete = true;
2049                 igb_reset(adapter);
2050                 adapter->hw.phy.autoneg_wait_to_complete = false;
2051
2052                 clear_bit(__IGB_TESTING, &adapter->state);
2053                 if (if_running)
2054                         igb_open(netdev);
2055         } else {
2056                 dev_info(&adapter->pdev->dev, "online testing starting\n");
2057
2058                 /* PHY is powered down when interface is down */
2059                 if (if_running && igb_link_test(adapter, &data[TEST_LINK]))
2060                         eth_test->flags |= ETH_TEST_FL_FAILED;
2061                 else
2062                         data[TEST_LINK] = 0;
2063
2064                 /* Online tests aren't run; pass by default */
2065                 data[TEST_REG] = 0;
2066                 data[TEST_EEP] = 0;
2067                 data[TEST_IRQ] = 0;
2068                 data[TEST_LOOP] = 0;
2069
2070                 clear_bit(__IGB_TESTING, &adapter->state);
2071         }
2072         msleep_interruptible(4 * 1000);
2073 }
2074
2075 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2076 {
2077         struct igb_adapter *adapter = netdev_priv(netdev);
2078
2079         wol->wolopts = 0;
2080
2081         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2082                 return;
2083
2084         wol->supported = WAKE_UCAST | WAKE_MCAST |
2085                          WAKE_BCAST | WAKE_MAGIC |
2086                          WAKE_PHY;
2087
2088         /* apply any specific unsupported masks here */
2089         switch (adapter->hw.device_id) {
2090         default:
2091                 break;
2092         }
2093
2094         if (adapter->wol & E1000_WUFC_EX)
2095                 wol->wolopts |= WAKE_UCAST;
2096         if (adapter->wol & E1000_WUFC_MC)
2097                 wol->wolopts |= WAKE_MCAST;
2098         if (adapter->wol & E1000_WUFC_BC)
2099                 wol->wolopts |= WAKE_BCAST;
2100         if (adapter->wol & E1000_WUFC_MAG)
2101                 wol->wolopts |= WAKE_MAGIC;
2102         if (adapter->wol & E1000_WUFC_LNKC)
2103                 wol->wolopts |= WAKE_PHY;
2104 }
2105
2106 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2107 {
2108         struct igb_adapter *adapter = netdev_priv(netdev);
2109
2110         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
2111                 return -EOPNOTSUPP;
2112
2113         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2114                 return wol->wolopts ? -EOPNOTSUPP : 0;
2115
2116         /* these settings will always override what we currently have */
2117         adapter->wol = 0;
2118
2119         if (wol->wolopts & WAKE_UCAST)
2120                 adapter->wol |= E1000_WUFC_EX;
2121         if (wol->wolopts & WAKE_MCAST)
2122                 adapter->wol |= E1000_WUFC_MC;
2123         if (wol->wolopts & WAKE_BCAST)
2124                 adapter->wol |= E1000_WUFC_BC;
2125         if (wol->wolopts & WAKE_MAGIC)
2126                 adapter->wol |= E1000_WUFC_MAG;
2127         if (wol->wolopts & WAKE_PHY)
2128                 adapter->wol |= E1000_WUFC_LNKC;
2129         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2130
2131         return 0;
2132 }
2133
2134 /* bit defines for adapter->led_status */
2135 #define IGB_LED_ON              0
2136
2137 static int igb_set_phys_id(struct net_device *netdev,
2138                            enum ethtool_phys_id_state state)
2139 {
2140         struct igb_adapter *adapter = netdev_priv(netdev);
2141         struct e1000_hw *hw = &adapter->hw;
2142
2143         switch (state) {
2144         case ETHTOOL_ID_ACTIVE:
2145                 igb_blink_led(hw);
2146                 return 2;
2147         case ETHTOOL_ID_ON:
2148                 igb_blink_led(hw);
2149                 break;
2150         case ETHTOOL_ID_OFF:
2151                 igb_led_off(hw);
2152                 break;
2153         case ETHTOOL_ID_INACTIVE:
2154                 igb_led_off(hw);
2155                 clear_bit(IGB_LED_ON, &adapter->led_status);
2156                 igb_cleanup_led(hw);
2157                 break;
2158         }
2159
2160         return 0;
2161 }
2162
2163 static int igb_set_coalesce(struct net_device *netdev,
2164                             struct ethtool_coalesce *ec)
2165 {
2166         struct igb_adapter *adapter = netdev_priv(netdev);
2167         int i;
2168
2169         if (ec->rx_max_coalesced_frames ||
2170             ec->rx_coalesce_usecs_irq ||
2171             ec->rx_max_coalesced_frames_irq ||
2172             ec->tx_max_coalesced_frames ||
2173             ec->tx_coalesce_usecs_irq ||
2174             ec->stats_block_coalesce_usecs ||
2175             ec->use_adaptive_rx_coalesce ||
2176             ec->use_adaptive_tx_coalesce ||
2177             ec->pkt_rate_low ||
2178             ec->rx_coalesce_usecs_low ||
2179             ec->rx_max_coalesced_frames_low ||
2180             ec->tx_coalesce_usecs_low ||
2181             ec->tx_max_coalesced_frames_low ||
2182             ec->pkt_rate_high ||
2183             ec->rx_coalesce_usecs_high ||
2184             ec->rx_max_coalesced_frames_high ||
2185             ec->tx_coalesce_usecs_high ||
2186             ec->tx_max_coalesced_frames_high ||
2187             ec->rate_sample_interval)
2188                 return -ENOTSUPP;
2189
2190         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2191             ((ec->rx_coalesce_usecs > 3) &&
2192              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2193             (ec->rx_coalesce_usecs == 2))
2194                 return -EINVAL;
2195
2196         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2197             ((ec->tx_coalesce_usecs > 3) &&
2198              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2199             (ec->tx_coalesce_usecs == 2))
2200                 return -EINVAL;
2201
2202         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
2203                 return -EINVAL;
2204
2205         /* If ITR is disabled, disable DMAC */
2206         if (ec->rx_coalesce_usecs == 0) {
2207                 if (adapter->flags & IGB_FLAG_DMAC)
2208                         adapter->flags &= ~IGB_FLAG_DMAC;
2209         }
2210
2211         /* convert to rate of irq's per second */
2212         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
2213                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2214         else
2215                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2216
2217         /* convert to rate of irq's per second */
2218         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
2219                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2220         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
2221                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2222         else
2223                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2224
2225         for (i = 0; i < adapter->num_q_vectors; i++) {
2226                 struct igb_q_vector *q_vector = adapter->q_vector[i];
2227                 q_vector->tx.work_limit = adapter->tx_work_limit;
2228                 if (q_vector->rx.ring)
2229                         q_vector->itr_val = adapter->rx_itr_setting;
2230                 else
2231                         q_vector->itr_val = adapter->tx_itr_setting;
2232                 if (q_vector->itr_val && q_vector->itr_val <= 3)
2233                         q_vector->itr_val = IGB_START_ITR;
2234                 q_vector->set_itr = 1;
2235         }
2236
2237         return 0;
2238 }
2239
2240 static int igb_get_coalesce(struct net_device *netdev,
2241                             struct ethtool_coalesce *ec)
2242 {
2243         struct igb_adapter *adapter = netdev_priv(netdev);
2244
2245         if (adapter->rx_itr_setting <= 3)
2246                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2247         else
2248                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2249
2250         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2251                 if (adapter->tx_itr_setting <= 3)
2252                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2253                 else
2254                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2255         }
2256
2257         return 0;
2258 }
2259
2260 static int igb_nway_reset(struct net_device *netdev)
2261 {
2262         struct igb_adapter *adapter = netdev_priv(netdev);
2263         if (netif_running(netdev))
2264                 igb_reinit_locked(adapter);
2265         return 0;
2266 }
2267
2268 static int igb_get_sset_count(struct net_device *netdev, int sset)
2269 {
2270         switch (sset) {
2271         case ETH_SS_STATS:
2272                 return IGB_STATS_LEN;
2273         case ETH_SS_TEST:
2274                 return IGB_TEST_LEN;
2275         default:
2276                 return -ENOTSUPP;
2277         }
2278 }
2279
2280 static void igb_get_ethtool_stats(struct net_device *netdev,
2281                                   struct ethtool_stats *stats, u64 *data)
2282 {
2283         struct igb_adapter *adapter = netdev_priv(netdev);
2284         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
2285         unsigned int start;
2286         struct igb_ring *ring;
2287         int i, j;
2288         char *p;
2289
2290         spin_lock(&adapter->stats64_lock);
2291         igb_update_stats(adapter, net_stats);
2292
2293         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2294                 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2295                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2296                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2297         }
2298         for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2299                 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2300                 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2301                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2302         }
2303         for (j = 0; j < adapter->num_tx_queues; j++) {
2304                 u64     restart2;
2305
2306                 ring = adapter->tx_ring[j];
2307                 do {
2308                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
2309                         data[i]   = ring->tx_stats.packets;
2310                         data[i+1] = ring->tx_stats.bytes;
2311                         data[i+2] = ring->tx_stats.restart_queue;
2312                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
2313                 do {
2314                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp2);
2315                         restart2  = ring->tx_stats.restart_queue2;
2316                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp2, start));
2317                 data[i+2] += restart2;
2318
2319                 i += IGB_TX_QUEUE_STATS_LEN;
2320         }
2321         for (j = 0; j < adapter->num_rx_queues; j++) {
2322                 ring = adapter->rx_ring[j];
2323                 do {
2324                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
2325                         data[i]   = ring->rx_stats.packets;
2326                         data[i+1] = ring->rx_stats.bytes;
2327                         data[i+2] = ring->rx_stats.drops;
2328                         data[i+3] = ring->rx_stats.csum_err;
2329                         data[i+4] = ring->rx_stats.alloc_failed;
2330                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
2331                 i += IGB_RX_QUEUE_STATS_LEN;
2332         }
2333         spin_unlock(&adapter->stats64_lock);
2334 }
2335
2336 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2337 {
2338         struct igb_adapter *adapter = netdev_priv(netdev);
2339         u8 *p = data;
2340         int i;
2341
2342         switch (stringset) {
2343         case ETH_SS_TEST:
2344                 memcpy(data, *igb_gstrings_test,
2345                         IGB_TEST_LEN*ETH_GSTRING_LEN);
2346                 break;
2347         case ETH_SS_STATS:
2348                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2349                         memcpy(p, igb_gstrings_stats[i].stat_string,
2350                                ETH_GSTRING_LEN);
2351                         p += ETH_GSTRING_LEN;
2352                 }
2353                 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2354                         memcpy(p, igb_gstrings_net_stats[i].stat_string,
2355                                ETH_GSTRING_LEN);
2356                         p += ETH_GSTRING_LEN;
2357                 }
2358                 for (i = 0; i < adapter->num_tx_queues; i++) {
2359                         sprintf(p, "tx_queue_%u_packets", i);
2360                         p += ETH_GSTRING_LEN;
2361                         sprintf(p, "tx_queue_%u_bytes", i);
2362                         p += ETH_GSTRING_LEN;
2363                         sprintf(p, "tx_queue_%u_restart", i);
2364                         p += ETH_GSTRING_LEN;
2365                 }
2366                 for (i = 0; i < adapter->num_rx_queues; i++) {
2367                         sprintf(p, "rx_queue_%u_packets", i);
2368                         p += ETH_GSTRING_LEN;
2369                         sprintf(p, "rx_queue_%u_bytes", i);
2370                         p += ETH_GSTRING_LEN;
2371                         sprintf(p, "rx_queue_%u_drops", i);
2372                         p += ETH_GSTRING_LEN;
2373                         sprintf(p, "rx_queue_%u_csum_err", i);
2374                         p += ETH_GSTRING_LEN;
2375                         sprintf(p, "rx_queue_%u_alloc_failed", i);
2376                         p += ETH_GSTRING_LEN;
2377                 }
2378                 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2379                 break;
2380         }
2381 }
2382
2383 static int igb_get_ts_info(struct net_device *dev,
2384                            struct ethtool_ts_info *info)
2385 {
2386         struct igb_adapter *adapter = netdev_priv(dev);
2387
2388         if (adapter->ptp_clock)
2389                 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2390         else
2391                 info->phc_index = -1;
2392
2393         switch (adapter->hw.mac.type) {
2394         case e1000_82575:
2395                 info->so_timestamping =
2396                         SOF_TIMESTAMPING_TX_SOFTWARE |
2397                         SOF_TIMESTAMPING_RX_SOFTWARE |
2398                         SOF_TIMESTAMPING_SOFTWARE;
2399                 return 0;
2400         case e1000_82576:
2401         case e1000_82580:
2402         case e1000_i350:
2403         case e1000_i354:
2404         case e1000_i210:
2405         case e1000_i211:
2406                 info->so_timestamping =
2407                         SOF_TIMESTAMPING_TX_SOFTWARE |
2408                         SOF_TIMESTAMPING_RX_SOFTWARE |
2409                         SOF_TIMESTAMPING_SOFTWARE |
2410                         SOF_TIMESTAMPING_TX_HARDWARE |
2411                         SOF_TIMESTAMPING_RX_HARDWARE |
2412                         SOF_TIMESTAMPING_RAW_HARDWARE;
2413
2414                 info->tx_types =
2415                         BIT(HWTSTAMP_TX_OFF) |
2416                         BIT(HWTSTAMP_TX_ON);
2417
2418                 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
2419
2420                 /* 82576 does not support timestamping all packets. */
2421                 if (adapter->hw.mac.type >= e1000_82580)
2422                         info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL);
2423                 else
2424                         info->rx_filters |=
2425                                 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2426                                 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2427                                 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
2428
2429                 return 0;
2430         default:
2431                 return -EOPNOTSUPP;
2432         }
2433 }
2434
2435 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2436 static int igb_get_ethtool_nfc_entry(struct igb_adapter *adapter,
2437                                      struct ethtool_rxnfc *cmd)
2438 {
2439         struct ethtool_rx_flow_spec *fsp = &cmd->fs;
2440         struct igb_nfc_filter *rule = NULL;
2441
2442         /* report total rule count */
2443         cmd->data = IGB_MAX_RXNFC_FILTERS;
2444
2445         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2446                 if (fsp->location <= rule->sw_idx)
2447                         break;
2448         }
2449
2450         if (!rule || fsp->location != rule->sw_idx)
2451                 return -EINVAL;
2452
2453         if (rule->filter.match_flags) {
2454                 fsp->flow_type = ETHER_FLOW;
2455                 fsp->ring_cookie = rule->action;
2456                 if (rule->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE) {
2457                         fsp->h_u.ether_spec.h_proto = rule->filter.etype;
2458                         fsp->m_u.ether_spec.h_proto = ETHER_TYPE_FULL_MASK;
2459                 }
2460                 if (rule->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI) {
2461                         fsp->flow_type |= FLOW_EXT;
2462                         fsp->h_ext.vlan_tci = rule->filter.vlan_tci;
2463                         fsp->m_ext.vlan_tci = htons(VLAN_PRIO_MASK);
2464                 }
2465                 return 0;
2466         }
2467         return -EINVAL;
2468 }
2469
2470 static int igb_get_ethtool_nfc_all(struct igb_adapter *adapter,
2471                                    struct ethtool_rxnfc *cmd,
2472                                    u32 *rule_locs)
2473 {
2474         struct igb_nfc_filter *rule;
2475         int cnt = 0;
2476
2477         /* report total rule count */
2478         cmd->data = IGB_MAX_RXNFC_FILTERS;
2479
2480         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2481                 if (cnt == cmd->rule_cnt)
2482                         return -EMSGSIZE;
2483                 rule_locs[cnt] = rule->sw_idx;
2484                 cnt++;
2485         }
2486
2487         cmd->rule_cnt = cnt;
2488
2489         return 0;
2490 }
2491
2492 static int igb_get_rss_hash_opts(struct igb_adapter *adapter,
2493                                  struct ethtool_rxnfc *cmd)
2494 {
2495         cmd->data = 0;
2496
2497         /* Report default options for RSS on igb */
2498         switch (cmd->flow_type) {
2499         case TCP_V4_FLOW:
2500                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2501                 /* Fall through */
2502         case UDP_V4_FLOW:
2503                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2504                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2505                 /* Fall through */
2506         case SCTP_V4_FLOW:
2507         case AH_ESP_V4_FLOW:
2508         case AH_V4_FLOW:
2509         case ESP_V4_FLOW:
2510         case IPV4_FLOW:
2511                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2512                 break;
2513         case TCP_V6_FLOW:
2514                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2515                 /* Fall through */
2516         case UDP_V6_FLOW:
2517                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2518                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2519                 /* Fall through */
2520         case SCTP_V6_FLOW:
2521         case AH_ESP_V6_FLOW:
2522         case AH_V6_FLOW:
2523         case ESP_V6_FLOW:
2524         case IPV6_FLOW:
2525                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2526                 break;
2527         default:
2528                 return -EINVAL;
2529         }
2530
2531         return 0;
2532 }
2533
2534 static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2535                          u32 *rule_locs)
2536 {
2537         struct igb_adapter *adapter = netdev_priv(dev);
2538         int ret = -EOPNOTSUPP;
2539
2540         switch (cmd->cmd) {
2541         case ETHTOOL_GRXRINGS:
2542                 cmd->data = adapter->num_rx_queues;
2543                 ret = 0;
2544                 break;
2545         case ETHTOOL_GRXCLSRLCNT:
2546                 cmd->rule_cnt = adapter->nfc_filter_count;
2547                 ret = 0;
2548                 break;
2549         case ETHTOOL_GRXCLSRULE:
2550                 ret = igb_get_ethtool_nfc_entry(adapter, cmd);
2551                 break;
2552         case ETHTOOL_GRXCLSRLALL:
2553                 ret = igb_get_ethtool_nfc_all(adapter, cmd, rule_locs);
2554                 break;
2555         case ETHTOOL_GRXFH:
2556                 ret = igb_get_rss_hash_opts(adapter, cmd);
2557                 break;
2558         default:
2559                 break;
2560         }
2561
2562         return ret;
2563 }
2564
2565 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2566                        IGB_FLAG_RSS_FIELD_IPV6_UDP)
2567 static int igb_set_rss_hash_opt(struct igb_adapter *adapter,
2568                                 struct ethtool_rxnfc *nfc)
2569 {
2570         u32 flags = adapter->flags;
2571
2572         /* RSS does not support anything other than hashing
2573          * to queues on src and dst IPs and ports
2574          */
2575         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2576                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2577                 return -EINVAL;
2578
2579         switch (nfc->flow_type) {
2580         case TCP_V4_FLOW:
2581         case TCP_V6_FLOW:
2582                 if (!(nfc->data & RXH_IP_SRC) ||
2583                     !(nfc->data & RXH_IP_DST) ||
2584                     !(nfc->data & RXH_L4_B_0_1) ||
2585                     !(nfc->data & RXH_L4_B_2_3))
2586                         return -EINVAL;
2587                 break;
2588         case UDP_V4_FLOW:
2589                 if (!(nfc->data & RXH_IP_SRC) ||
2590                     !(nfc->data & RXH_IP_DST))
2591                         return -EINVAL;
2592                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2593                 case 0:
2594                         flags &= ~IGB_FLAG_RSS_FIELD_IPV4_UDP;
2595                         break;
2596                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2597                         flags |= IGB_FLAG_RSS_FIELD_IPV4_UDP;
2598                         break;
2599                 default:
2600                         return -EINVAL;
2601                 }
2602                 break;
2603         case UDP_V6_FLOW:
2604                 if (!(nfc->data & RXH_IP_SRC) ||
2605                     !(nfc->data & RXH_IP_DST))
2606                         return -EINVAL;
2607                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2608                 case 0:
2609                         flags &= ~IGB_FLAG_RSS_FIELD_IPV6_UDP;
2610                         break;
2611                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2612                         flags |= IGB_FLAG_RSS_FIELD_IPV6_UDP;
2613                         break;
2614                 default:
2615                         return -EINVAL;
2616                 }
2617                 break;
2618         case AH_ESP_V4_FLOW:
2619         case AH_V4_FLOW:
2620         case ESP_V4_FLOW:
2621         case SCTP_V4_FLOW:
2622         case AH_ESP_V6_FLOW:
2623         case AH_V6_FLOW:
2624         case ESP_V6_FLOW:
2625         case SCTP_V6_FLOW:
2626                 if (!(nfc->data & RXH_IP_SRC) ||
2627                     !(nfc->data & RXH_IP_DST) ||
2628                     (nfc->data & RXH_L4_B_0_1) ||
2629                     (nfc->data & RXH_L4_B_2_3))
2630                         return -EINVAL;
2631                 break;
2632         default:
2633                 return -EINVAL;
2634         }
2635
2636         /* if we changed something we need to update flags */
2637         if (flags != adapter->flags) {
2638                 struct e1000_hw *hw = &adapter->hw;
2639                 u32 mrqc = rd32(E1000_MRQC);
2640
2641                 if ((flags & UDP_RSS_FLAGS) &&
2642                     !(adapter->flags & UDP_RSS_FLAGS))
2643                         dev_err(&adapter->pdev->dev,
2644                                 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2645
2646                 adapter->flags = flags;
2647
2648                 /* Perform hash on these packet types */
2649                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2650                         E1000_MRQC_RSS_FIELD_IPV4_TCP |
2651                         E1000_MRQC_RSS_FIELD_IPV6 |
2652                         E1000_MRQC_RSS_FIELD_IPV6_TCP;
2653
2654                 mrqc &= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP |
2655                           E1000_MRQC_RSS_FIELD_IPV6_UDP);
2656
2657                 if (flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2658                         mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
2659
2660                 if (flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2661                         mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
2662
2663                 wr32(E1000_MRQC, mrqc);
2664         }
2665
2666         return 0;
2667 }
2668
2669 static int igb_rxnfc_write_etype_filter(struct igb_adapter *adapter,
2670                                         struct igb_nfc_filter *input)
2671 {
2672         struct e1000_hw *hw = &adapter->hw;
2673         u8 i;
2674         u32 etqf;
2675         u16 etype;
2676
2677         /* find an empty etype filter register */
2678         for (i = 0; i < MAX_ETYPE_FILTER; ++i) {
2679                 if (!adapter->etype_bitmap[i])
2680                         break;
2681         }
2682         if (i == MAX_ETYPE_FILTER) {
2683                 dev_err(&adapter->pdev->dev, "ethtool -N: etype filters are all used.\n");
2684                 return -EINVAL;
2685         }
2686
2687         adapter->etype_bitmap[i] = true;
2688
2689         etqf = rd32(E1000_ETQF(i));
2690         etype = ntohs(input->filter.etype & ETHER_TYPE_FULL_MASK);
2691
2692         etqf |= E1000_ETQF_FILTER_ENABLE;
2693         etqf &= ~E1000_ETQF_ETYPE_MASK;
2694         etqf |= (etype & E1000_ETQF_ETYPE_MASK);
2695
2696         etqf &= ~E1000_ETQF_QUEUE_MASK;
2697         etqf |= ((input->action << E1000_ETQF_QUEUE_SHIFT)
2698                 & E1000_ETQF_QUEUE_MASK);
2699         etqf |= E1000_ETQF_QUEUE_ENABLE;
2700
2701         wr32(E1000_ETQF(i), etqf);
2702
2703         input->etype_reg_index = i;
2704
2705         return 0;
2706 }
2707
2708 static int igb_rxnfc_write_vlan_prio_filter(struct igb_adapter *adapter,
2709                                             struct igb_nfc_filter *input)
2710 {
2711         struct e1000_hw *hw = &adapter->hw;
2712         u8 vlan_priority;
2713         u16 queue_index;
2714         u32 vlapqf;
2715
2716         vlapqf = rd32(E1000_VLAPQF);
2717         vlan_priority = (ntohs(input->filter.vlan_tci) & VLAN_PRIO_MASK)
2718                                 >> VLAN_PRIO_SHIFT;
2719         queue_index = (vlapqf >> (vlan_priority * 4)) & E1000_VLAPQF_QUEUE_MASK;
2720
2721         /* check whether this vlan prio is already set */
2722         if ((vlapqf & E1000_VLAPQF_P_VALID(vlan_priority)) &&
2723             (queue_index != input->action)) {
2724                 dev_err(&adapter->pdev->dev, "ethtool rxnfc set vlan prio filter failed.\n");
2725                 return -EEXIST;
2726         }
2727
2728         vlapqf |= E1000_VLAPQF_P_VALID(vlan_priority);
2729         vlapqf |= E1000_VLAPQF_QUEUE_SEL(vlan_priority, input->action);
2730
2731         wr32(E1000_VLAPQF, vlapqf);
2732
2733         return 0;
2734 }
2735
2736 int igb_add_filter(struct igb_adapter *adapter, struct igb_nfc_filter *input)
2737 {
2738         int err = -EINVAL;
2739
2740         if (input->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE) {
2741                 err = igb_rxnfc_write_etype_filter(adapter, input);
2742                 if (err)
2743                         return err;
2744         }
2745
2746         if (input->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI)
2747                 err = igb_rxnfc_write_vlan_prio_filter(adapter, input);
2748
2749         return err;
2750 }
2751
2752 static void igb_clear_etype_filter_regs(struct igb_adapter *adapter,
2753                                         u16 reg_index)
2754 {
2755         struct e1000_hw *hw = &adapter->hw;
2756         u32 etqf = rd32(E1000_ETQF(reg_index));
2757
2758         etqf &= ~E1000_ETQF_QUEUE_ENABLE;
2759         etqf &= ~E1000_ETQF_QUEUE_MASK;
2760         etqf &= ~E1000_ETQF_FILTER_ENABLE;
2761
2762         wr32(E1000_ETQF(reg_index), etqf);
2763
2764         adapter->etype_bitmap[reg_index] = false;
2765 }
2766
2767 static void igb_clear_vlan_prio_filter(struct igb_adapter *adapter,
2768                                        u16 vlan_tci)
2769 {
2770         struct e1000_hw *hw = &adapter->hw;
2771         u8 vlan_priority;
2772         u32 vlapqf;
2773
2774         vlan_priority = (vlan_tci & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
2775
2776         vlapqf = rd32(E1000_VLAPQF);
2777         vlapqf &= ~E1000_VLAPQF_P_VALID(vlan_priority);
2778         vlapqf &= ~E1000_VLAPQF_QUEUE_SEL(vlan_priority,
2779                                                 E1000_VLAPQF_QUEUE_MASK);
2780
2781         wr32(E1000_VLAPQF, vlapqf);
2782 }
2783
2784 int igb_erase_filter(struct igb_adapter *adapter, struct igb_nfc_filter *input)
2785 {
2786         if (input->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE)
2787                 igb_clear_etype_filter_regs(adapter,
2788                                             input->etype_reg_index);
2789
2790         if (input->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI)
2791                 igb_clear_vlan_prio_filter(adapter,
2792                                            ntohs(input->filter.vlan_tci));
2793
2794         return 0;
2795 }
2796
2797 static int igb_update_ethtool_nfc_entry(struct igb_adapter *adapter,
2798                                         struct igb_nfc_filter *input,
2799                                         u16 sw_idx)
2800 {
2801         struct igb_nfc_filter *rule, *parent;
2802         int err = -EINVAL;
2803
2804         parent = NULL;
2805         rule = NULL;
2806
2807         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2808                 /* hash found, or no matching entry */
2809                 if (rule->sw_idx >= sw_idx)
2810                         break;
2811                 parent = rule;
2812         }
2813
2814         /* if there is an old rule occupying our place remove it */
2815         if (rule && (rule->sw_idx == sw_idx)) {
2816                 if (!input)
2817                         err = igb_erase_filter(adapter, rule);
2818
2819                 hlist_del(&rule->nfc_node);
2820                 kfree(rule);
2821                 adapter->nfc_filter_count--;
2822         }
2823
2824         /* If no input this was a delete, err should be 0 if a rule was
2825          * successfully found and removed from the list else -EINVAL
2826          */
2827         if (!input)
2828                 return err;
2829
2830         /* initialize node */
2831         INIT_HLIST_NODE(&input->nfc_node);
2832
2833         /* add filter to the list */
2834         if (parent)
2835                 hlist_add_behind(&parent->nfc_node, &input->nfc_node);
2836         else
2837                 hlist_add_head(&input->nfc_node, &adapter->nfc_filter_list);
2838
2839         /* update counts */
2840         adapter->nfc_filter_count++;
2841
2842         return 0;
2843 }
2844
2845 static int igb_add_ethtool_nfc_entry(struct igb_adapter *adapter,
2846                                      struct ethtool_rxnfc *cmd)
2847 {
2848         struct net_device *netdev = adapter->netdev;
2849         struct ethtool_rx_flow_spec *fsp =
2850                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2851         struct igb_nfc_filter *input, *rule;
2852         int err = 0;
2853
2854         if (!(netdev->hw_features & NETIF_F_NTUPLE))
2855                 return -EOPNOTSUPP;
2856
2857         /* Don't allow programming if the action is a queue greater than
2858          * the number of online Rx queues.
2859          */
2860         if ((fsp->ring_cookie == RX_CLS_FLOW_DISC) ||
2861             (fsp->ring_cookie >= adapter->num_rx_queues)) {
2862                 dev_err(&adapter->pdev->dev, "ethtool -N: The specified action is invalid\n");
2863                 return -EINVAL;
2864         }
2865
2866         /* Don't allow indexes to exist outside of available space */
2867         if (fsp->location >= IGB_MAX_RXNFC_FILTERS) {
2868                 dev_err(&adapter->pdev->dev, "Location out of range\n");
2869                 return -EINVAL;
2870         }
2871
2872         if ((fsp->flow_type & ~FLOW_EXT) != ETHER_FLOW)
2873                 return -EINVAL;
2874
2875         if (fsp->m_u.ether_spec.h_proto != ETHER_TYPE_FULL_MASK &&
2876             fsp->m_ext.vlan_tci != htons(VLAN_PRIO_MASK))
2877                 return -EINVAL;
2878
2879         input = kzalloc(sizeof(*input), GFP_KERNEL);
2880         if (!input)
2881                 return -ENOMEM;
2882
2883         if (fsp->m_u.ether_spec.h_proto == ETHER_TYPE_FULL_MASK) {
2884                 input->filter.etype = fsp->h_u.ether_spec.h_proto;
2885                 input->filter.match_flags = IGB_FILTER_FLAG_ETHER_TYPE;
2886         }
2887
2888         if ((fsp->flow_type & FLOW_EXT) && fsp->m_ext.vlan_tci) {
2889                 if (fsp->m_ext.vlan_tci != htons(VLAN_PRIO_MASK)) {
2890                         err = -EINVAL;
2891                         goto err_out;
2892                 }
2893                 input->filter.vlan_tci = fsp->h_ext.vlan_tci;
2894                 input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2895         }
2896
2897         input->action = fsp->ring_cookie;
2898         input->sw_idx = fsp->location;
2899
2900         spin_lock(&adapter->nfc_lock);
2901
2902         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2903                 if (!memcmp(&input->filter, &rule->filter,
2904                             sizeof(input->filter))) {
2905                         err = -EEXIST;
2906                         dev_err(&adapter->pdev->dev,
2907                                 "ethtool: this filter is already set\n");
2908                         goto err_out_w_lock;
2909                 }
2910         }
2911
2912         err = igb_add_filter(adapter, input);
2913         if (err)
2914                 goto err_out_w_lock;
2915
2916         igb_update_ethtool_nfc_entry(adapter, input, input->sw_idx);
2917
2918         spin_unlock(&adapter->nfc_lock);
2919         return 0;
2920
2921 err_out_w_lock:
2922         spin_unlock(&adapter->nfc_lock);
2923 err_out:
2924         kfree(input);
2925         return err;
2926 }
2927
2928 static int igb_del_ethtool_nfc_entry(struct igb_adapter *adapter,
2929                                      struct ethtool_rxnfc *cmd)
2930 {
2931         struct ethtool_rx_flow_spec *fsp =
2932                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2933         int err;
2934
2935         spin_lock(&adapter->nfc_lock);
2936         err = igb_update_ethtool_nfc_entry(adapter, NULL, fsp->location);
2937         spin_unlock(&adapter->nfc_lock);
2938
2939         return err;
2940 }
2941
2942 static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2943 {
2944         struct igb_adapter *adapter = netdev_priv(dev);
2945         int ret = -EOPNOTSUPP;
2946
2947         switch (cmd->cmd) {
2948         case ETHTOOL_SRXFH:
2949                 ret = igb_set_rss_hash_opt(adapter, cmd);
2950                 break;
2951         case ETHTOOL_SRXCLSRLINS:
2952                 ret = igb_add_ethtool_nfc_entry(adapter, cmd);
2953                 break;
2954         case ETHTOOL_SRXCLSRLDEL:
2955                 ret = igb_del_ethtool_nfc_entry(adapter, cmd);
2956         default:
2957                 break;
2958         }
2959
2960         return ret;
2961 }
2962
2963 static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2964 {
2965         struct igb_adapter *adapter = netdev_priv(netdev);
2966         struct e1000_hw *hw = &adapter->hw;
2967         u32 ret_val;
2968         u16 phy_data;
2969
2970         if ((hw->mac.type < e1000_i350) ||
2971             (hw->phy.media_type != e1000_media_type_copper))
2972                 return -EOPNOTSUPP;
2973
2974         edata->supported = (SUPPORTED_1000baseT_Full |
2975                             SUPPORTED_100baseT_Full);
2976         if (!hw->dev_spec._82575.eee_disable)
2977                 edata->advertised =
2978                         mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
2979
2980         /* The IPCNFG and EEER registers are not supported on I354. */
2981         if (hw->mac.type == e1000_i354) {
2982                 igb_get_eee_status_i354(hw, (bool *)&edata->eee_active);
2983         } else {
2984                 u32 eeer;
2985
2986                 eeer = rd32(E1000_EEER);
2987
2988                 /* EEE status on negotiated link */
2989                 if (eeer & E1000_EEER_EEE_NEG)
2990                         edata->eee_active = true;
2991
2992                 if (eeer & E1000_EEER_TX_LPI_EN)
2993                         edata->tx_lpi_enabled = true;
2994         }
2995
2996         /* EEE Link Partner Advertised */
2997         switch (hw->mac.type) {
2998         case e1000_i350:
2999                 ret_val = igb_read_emi_reg(hw, E1000_EEE_LP_ADV_ADDR_I350,
3000                                            &phy_data);
3001                 if (ret_val)
3002                         return -ENODATA;
3003
3004                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
3005                 break;
3006         case e1000_i354:
3007         case e1000_i210:
3008         case e1000_i211:
3009                 ret_val = igb_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210,
3010                                              E1000_EEE_LP_ADV_DEV_I210,
3011                                              &phy_data);
3012                 if (ret_val)
3013                         return -ENODATA;
3014
3015                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
3016
3017                 break;
3018         default:
3019                 break;
3020         }
3021
3022         edata->eee_enabled = !hw->dev_spec._82575.eee_disable;
3023
3024         if ((hw->mac.type == e1000_i354) &&
3025             (edata->eee_enabled))
3026                 edata->tx_lpi_enabled = true;
3027
3028         /* Report correct negotiated EEE status for devices that
3029          * wrongly report EEE at half-duplex
3030          */
3031         if (adapter->link_duplex == HALF_DUPLEX) {
3032                 edata->eee_enabled = false;
3033                 edata->eee_active = false;
3034                 edata->tx_lpi_enabled = false;
3035                 edata->advertised &= ~edata->advertised;
3036         }
3037
3038         return 0;
3039 }
3040
3041 static int igb_set_eee(struct net_device *netdev,
3042                        struct ethtool_eee *edata)
3043 {
3044         struct igb_adapter *adapter = netdev_priv(netdev);
3045         struct e1000_hw *hw = &adapter->hw;
3046         struct ethtool_eee eee_curr;
3047         bool adv1g_eee = true, adv100m_eee = true;
3048         s32 ret_val;
3049
3050         if ((hw->mac.type < e1000_i350) ||
3051             (hw->phy.media_type != e1000_media_type_copper))
3052                 return -EOPNOTSUPP;
3053
3054         memset(&eee_curr, 0, sizeof(struct ethtool_eee));
3055
3056         ret_val = igb_get_eee(netdev, &eee_curr);
3057         if (ret_val)
3058                 return ret_val;
3059
3060         if (eee_curr.eee_enabled) {
3061                 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
3062                         dev_err(&adapter->pdev->dev,
3063                                 "Setting EEE tx-lpi is not supported\n");
3064                         return -EINVAL;
3065                 }
3066
3067                 /* Tx LPI timer is not implemented currently */
3068                 if (edata->tx_lpi_timer) {
3069                         dev_err(&adapter->pdev->dev,
3070                                 "Setting EEE Tx LPI timer is not supported\n");
3071                         return -EINVAL;
3072                 }
3073
3074                 if (!edata->advertised || (edata->advertised &
3075                     ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL))) {
3076                         dev_err(&adapter->pdev->dev,
3077                                 "EEE Advertisement supports only 100Tx and/or 100T full duplex\n");
3078                         return -EINVAL;
3079                 }
3080                 adv100m_eee = !!(edata->advertised & ADVERTISE_100_FULL);
3081                 adv1g_eee = !!(edata->advertised & ADVERTISE_1000_FULL);
3082
3083         } else if (!edata->eee_enabled) {
3084                 dev_err(&adapter->pdev->dev,
3085                         "Setting EEE options are not supported with EEE disabled\n");
3086                         return -EINVAL;
3087                 }
3088
3089         adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
3090         if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {
3091                 hw->dev_spec._82575.eee_disable = !edata->eee_enabled;
3092                 adapter->flags |= IGB_FLAG_EEE;
3093
3094                 /* reset link */
3095                 if (netif_running(netdev))
3096                         igb_reinit_locked(adapter);
3097                 else
3098                         igb_reset(adapter);
3099         }
3100
3101         if (hw->mac.type == e1000_i354)
3102                 ret_val = igb_set_eee_i354(hw, adv1g_eee, adv100m_eee);
3103         else
3104                 ret_val = igb_set_eee_i350(hw, adv1g_eee, adv100m_eee);
3105
3106         if (ret_val) {
3107                 dev_err(&adapter->pdev->dev,
3108                         "Problem setting EEE advertisement options\n");
3109                 return -EINVAL;
3110         }
3111
3112         return 0;
3113 }
3114
3115 static int igb_get_module_info(struct net_device *netdev,
3116                                struct ethtool_modinfo *modinfo)
3117 {
3118         struct igb_adapter *adapter = netdev_priv(netdev);
3119         struct e1000_hw *hw = &adapter->hw;
3120         u32 status = 0;
3121         u16 sff8472_rev, addr_mode;
3122         bool page_swap = false;
3123
3124         if ((hw->phy.media_type == e1000_media_type_copper) ||
3125             (hw->phy.media_type == e1000_media_type_unknown))
3126                 return -EOPNOTSUPP;
3127
3128         /* Check whether we support SFF-8472 or not */
3129         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev);
3130         if (status)
3131                 return -EIO;
3132
3133         /* addressing mode is not supported */
3134         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode);
3135         if (status)
3136                 return -EIO;
3137
3138         /* addressing mode is not supported */
3139         if ((addr_mode & 0xFF) & IGB_SFF_ADDRESSING_MODE) {
3140                 hw_dbg("Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3141                 page_swap = true;
3142         }
3143
3144         if ((sff8472_rev & 0xFF) == IGB_SFF_8472_UNSUP || page_swap) {
3145                 /* We have an SFP, but it does not support SFF-8472 */
3146                 modinfo->type = ETH_MODULE_SFF_8079;
3147                 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3148         } else {
3149                 /* We have an SFP which supports a revision of SFF-8472 */
3150                 modinfo->type = ETH_MODULE_SFF_8472;
3151                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3152         }
3153
3154         return 0;
3155 }
3156
3157 static int igb_get_module_eeprom(struct net_device *netdev,
3158                                  struct ethtool_eeprom *ee, u8 *data)
3159 {
3160         struct igb_adapter *adapter = netdev_priv(netdev);
3161         struct e1000_hw *hw = &adapter->hw;
3162         u32 status = 0;
3163         u16 *dataword;
3164         u16 first_word, last_word;
3165         int i = 0;
3166
3167         if (ee->len == 0)
3168                 return -EINVAL;
3169
3170         first_word = ee->offset >> 1;
3171         last_word = (ee->offset + ee->len - 1) >> 1;
3172
3173         dataword = kmalloc(sizeof(u16) * (last_word - first_word + 1),
3174                            GFP_KERNEL);
3175         if (!dataword)
3176                 return -ENOMEM;
3177
3178         /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */
3179         for (i = 0; i < last_word - first_word + 1; i++) {
3180                 status = igb_read_phy_reg_i2c(hw, (first_word + i) * 2,
3181                                               &dataword[i]);
3182                 if (status) {
3183                         /* Error occurred while reading module */
3184                         kfree(dataword);
3185                         return -EIO;
3186                 }
3187
3188                 be16_to_cpus(&dataword[i]);
3189         }
3190
3191         memcpy(data, (u8 *)dataword + (ee->offset & 1), ee->len);
3192         kfree(dataword);
3193
3194         return 0;
3195 }
3196
3197 static int igb_ethtool_begin(struct net_device *netdev)
3198 {
3199         struct igb_adapter *adapter = netdev_priv(netdev);
3200         pm_runtime_get_sync(&adapter->pdev->dev);
3201         return 0;
3202 }
3203
3204 static void igb_ethtool_complete(struct net_device *netdev)
3205 {
3206         struct igb_adapter *adapter = netdev_priv(netdev);
3207         pm_runtime_put(&adapter->pdev->dev);
3208 }
3209
3210 static u32 igb_get_rxfh_indir_size(struct net_device *netdev)
3211 {
3212         return IGB_RETA_SIZE;
3213 }
3214
3215 static int igb_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
3216                         u8 *hfunc)
3217 {
3218         struct igb_adapter *adapter = netdev_priv(netdev);
3219         int i;
3220
3221         if (hfunc)
3222                 *hfunc = ETH_RSS_HASH_TOP;
3223         if (!indir)
3224                 return 0;
3225         for (i = 0; i < IGB_RETA_SIZE; i++)
3226                 indir[i] = adapter->rss_indir_tbl[i];
3227
3228         return 0;
3229 }
3230
3231 void igb_write_rss_indir_tbl(struct igb_adapter *adapter)
3232 {
3233         struct e1000_hw *hw = &adapter->hw;
3234         u32 reg = E1000_RETA(0);
3235         u32 shift = 0;
3236         int i = 0;
3237
3238         switch (hw->mac.type) {
3239         case e1000_82575:
3240                 shift = 6;
3241                 break;
3242         case e1000_82576:
3243                 /* 82576 supports 2 RSS queues for SR-IOV */
3244                 if (adapter->vfs_allocated_count)
3245                         shift = 3;
3246                 break;
3247         default:
3248                 break;
3249         }
3250
3251         while (i < IGB_RETA_SIZE) {
3252                 u32 val = 0;
3253                 int j;
3254
3255                 for (j = 3; j >= 0; j--) {
3256                         val <<= 8;
3257                         val |= adapter->rss_indir_tbl[i + j];
3258                 }
3259
3260                 wr32(reg, val << shift);
3261                 reg += 4;
3262                 i += 4;
3263         }
3264 }
3265
3266 static int igb_set_rxfh(struct net_device *netdev, const u32 *indir,
3267                         const u8 *key, const u8 hfunc)
3268 {
3269         struct igb_adapter *adapter = netdev_priv(netdev);
3270         struct e1000_hw *hw = &adapter->hw;
3271         int i;
3272         u32 num_queues;
3273
3274         /* We do not allow change in unsupported parameters */
3275         if (key ||
3276             (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP))
3277                 return -EOPNOTSUPP;
3278         if (!indir)
3279                 return 0;
3280
3281         num_queues = adapter->rss_queues;
3282
3283         switch (hw->mac.type) {
3284         case e1000_82576:
3285                 /* 82576 supports 2 RSS queues for SR-IOV */
3286                 if (adapter->vfs_allocated_count)
3287                         num_queues = 2;
3288                 break;
3289         default:
3290                 break;
3291         }
3292
3293         /* Verify user input. */
3294         for (i = 0; i < IGB_RETA_SIZE; i++)
3295                 if (indir[i] >= num_queues)
3296                         return -EINVAL;
3297
3298
3299         for (i = 0; i < IGB_RETA_SIZE; i++)
3300                 adapter->rss_indir_tbl[i] = indir[i];
3301
3302         igb_write_rss_indir_tbl(adapter);
3303
3304         return 0;
3305 }
3306
3307 static unsigned int igb_max_channels(struct igb_adapter *adapter)
3308 {
3309         struct e1000_hw *hw = &adapter->hw;
3310         unsigned int max_combined = 0;
3311
3312         switch (hw->mac.type) {
3313         case e1000_i211:
3314                 max_combined = IGB_MAX_RX_QUEUES_I211;
3315                 break;
3316         case e1000_82575:
3317         case e1000_i210:
3318                 max_combined = IGB_MAX_RX_QUEUES_82575;
3319                 break;
3320         case e1000_i350:
3321                 if (!!adapter->vfs_allocated_count) {
3322                         max_combined = 1;
3323                         break;
3324                 }
3325                 /* fall through */
3326         case e1000_82576:
3327                 if (!!adapter->vfs_allocated_count) {
3328                         max_combined = 2;
3329                         break;
3330                 }
3331                 /* fall through */
3332         case e1000_82580:
3333         case e1000_i354:
3334         default:
3335                 max_combined = IGB_MAX_RX_QUEUES;
3336                 break;
3337         }
3338
3339         return max_combined;
3340 }
3341
3342 static void igb_get_channels(struct net_device *netdev,
3343                              struct ethtool_channels *ch)
3344 {
3345         struct igb_adapter *adapter = netdev_priv(netdev);
3346
3347         /* Report maximum channels */
3348         ch->max_combined = igb_max_channels(adapter);
3349
3350         /* Report info for other vector */
3351         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
3352                 ch->max_other = NON_Q_VECTORS;
3353                 ch->other_count = NON_Q_VECTORS;
3354         }
3355
3356         ch->combined_count = adapter->rss_queues;
3357 }
3358
3359 static int igb_set_channels(struct net_device *netdev,
3360                             struct ethtool_channels *ch)
3361 {
3362         struct igb_adapter *adapter = netdev_priv(netdev);
3363         unsigned int count = ch->combined_count;
3364         unsigned int max_combined = 0;
3365
3366         /* Verify they are not requesting separate vectors */
3367         if (!count || ch->rx_count || ch->tx_count)
3368                 return -EINVAL;
3369
3370         /* Verify other_count is valid and has not been changed */
3371         if (ch->other_count != NON_Q_VECTORS)
3372                 return -EINVAL;
3373
3374         /* Verify the number of channels doesn't exceed hw limits */
3375         max_combined = igb_max_channels(adapter);
3376         if (count > max_combined)
3377                 return -EINVAL;
3378
3379         if (count != adapter->rss_queues) {
3380                 adapter->rss_queues = count;
3381                 igb_set_flag_queue_pairs(adapter, max_combined);
3382
3383                 /* Hardware has to reinitialize queues and interrupts to
3384                  * match the new configuration.
3385                  */
3386                 return igb_reinit_queues(adapter);
3387         }
3388
3389         return 0;
3390 }
3391
3392 static const struct ethtool_ops igb_ethtool_ops = {
3393         .get_settings           = igb_get_settings,
3394         .set_settings           = igb_set_settings,
3395         .get_drvinfo            = igb_get_drvinfo,
3396         .get_regs_len           = igb_get_regs_len,
3397         .get_regs               = igb_get_regs,
3398         .get_wol                = igb_get_wol,
3399         .set_wol                = igb_set_wol,
3400         .get_msglevel           = igb_get_msglevel,
3401         .set_msglevel           = igb_set_msglevel,
3402         .nway_reset             = igb_nway_reset,
3403         .get_link               = igb_get_link,
3404         .get_eeprom_len         = igb_get_eeprom_len,
3405         .get_eeprom             = igb_get_eeprom,
3406         .set_eeprom             = igb_set_eeprom,
3407         .get_ringparam          = igb_get_ringparam,
3408         .set_ringparam          = igb_set_ringparam,
3409         .get_pauseparam         = igb_get_pauseparam,
3410         .set_pauseparam         = igb_set_pauseparam,
3411         .self_test              = igb_diag_test,
3412         .get_strings            = igb_get_strings,
3413         .set_phys_id            = igb_set_phys_id,
3414         .get_sset_count         = igb_get_sset_count,
3415         .get_ethtool_stats      = igb_get_ethtool_stats,
3416         .get_coalesce           = igb_get_coalesce,
3417         .set_coalesce           = igb_set_coalesce,
3418         .get_ts_info            = igb_get_ts_info,
3419         .get_rxnfc              = igb_get_rxnfc,
3420         .set_rxnfc              = igb_set_rxnfc,
3421         .get_eee                = igb_get_eee,
3422         .set_eee                = igb_set_eee,
3423         .get_module_info        = igb_get_module_info,
3424         .get_module_eeprom      = igb_get_module_eeprom,
3425         .get_rxfh_indir_size    = igb_get_rxfh_indir_size,
3426         .get_rxfh               = igb_get_rxfh,
3427         .set_rxfh               = igb_set_rxfh,
3428         .get_channels           = igb_get_channels,
3429         .set_channels           = igb_set_channels,
3430         .begin                  = igb_ethtool_begin,
3431         .complete               = igb_ethtool_complete,
3432 };
3433
3434 void igb_set_ethtool_ops(struct net_device *netdev)
3435 {
3436         netdev->ethtool_ops = &igb_ethtool_ops;
3437 }