drivers/net/ethernet/intel/ice/ice_flow.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* Copyright (c) 2019, Intel Corporation. */
   3
   4 #ifndef _ICE_FLOW_H_
   5 #define _ICE_FLOW_H_
   6
   7 #define ICE_FLOW_ENTRY_HANDLE_INVAL     0
   8 #define ICE_FLOW_FLD_OFF_INVAL          0xffff
   9
  10 /* Generate flow hash field from flow field type(s) */
  11 #define ICE_FLOW_HASH_IPV4      \
  12         (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) | \
  13          BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA))
  14 #define ICE_FLOW_HASH_IPV6      \
  15         (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | \
  16          BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA))
  17 #define ICE_FLOW_HASH_TCP_PORT  \
  18         (BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) | \
  19          BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT))
  20 #define ICE_FLOW_HASH_UDP_PORT  \
  21         (BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT) | \
  22          BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT))
  23 #define ICE_FLOW_HASH_SCTP_PORT \
  24         (BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT) | \
  25          BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT))
  26
  27 #define ICE_HASH_INVALID        0
  28 #define ICE_HASH_TCP_IPV4       (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_TCP_PORT)
  29 #define ICE_HASH_TCP_IPV6       (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_TCP_PORT)
  30 #define ICE_HASH_UDP_IPV4       (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_UDP_PORT)
  31 #define ICE_HASH_UDP_IPV6       (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_UDP_PORT)
  32
  33 /* Protocol header fields within a packet segment. A segment consists of one or
  34  * more protocol headers that make up a logical group of protocol headers. Each
  35  * logical group of protocol headers encapsulates or is encapsulated using/by
  36  * tunneling or encapsulation protocols for network virtualization such as GRE,
  37  * VxLAN, etc.
  38  */
  39 enum ice_flow_seg_hdr {
  40         ICE_FLOW_SEG_HDR_NONE           = 0x00000000,
  41         ICE_FLOW_SEG_HDR_IPV4           = 0x00000004,
  42         ICE_FLOW_SEG_HDR_IPV6           = 0x00000008,
  43         ICE_FLOW_SEG_HDR_TCP            = 0x00000040,
  44         ICE_FLOW_SEG_HDR_UDP            = 0x00000080,
  45         ICE_FLOW_SEG_HDR_SCTP           = 0x00000100,
  46         ICE_FLOW_SEG_HDR_GRE            = 0x00000200,
  47 };
  48
  49 enum ice_flow_field {
  50         /* L3 */
  51         ICE_FLOW_FIELD_IDX_IPV4_SA,
  52         ICE_FLOW_FIELD_IDX_IPV4_DA,
  53         ICE_FLOW_FIELD_IDX_IPV6_SA,
  54         ICE_FLOW_FIELD_IDX_IPV6_DA,
  55         /* L4 */
  56         ICE_FLOW_FIELD_IDX_TCP_SRC_PORT,
  57         ICE_FLOW_FIELD_IDX_TCP_DST_PORT,
  58         ICE_FLOW_FIELD_IDX_UDP_SRC_PORT,
  59         ICE_FLOW_FIELD_IDX_UDP_DST_PORT,
  60         ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT,
  61         ICE_FLOW_FIELD_IDX_SCTP_DST_PORT,
  62         /* GRE */
  63         ICE_FLOW_FIELD_IDX_GRE_KEYID,
  64         /* The total number of enums must not exceed 64 */
  65         ICE_FLOW_FIELD_IDX_MAX
  66 };
  67
  68 /* Flow headers and fields for AVF support */
  69 enum ice_flow_avf_hdr_field {
  70         /* Values 0 - 28 are reserved for future use */
  71         ICE_AVF_FLOW_FIELD_INVALID              = 0,
  72         ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP     = 29,
  73         ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP,
  74         ICE_AVF_FLOW_FIELD_IPV4_UDP,
  75         ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK,
  76         ICE_AVF_FLOW_FIELD_IPV4_TCP,
  77         ICE_AVF_FLOW_FIELD_IPV4_SCTP,
  78         ICE_AVF_FLOW_FIELD_IPV4_OTHER,
  79         ICE_AVF_FLOW_FIELD_FRAG_IPV4,
  80         /* Values 37-38 are reserved */
  81         ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP     = 39,
  82         ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP,
  83         ICE_AVF_FLOW_FIELD_IPV6_UDP,
  84         ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK,
  85         ICE_AVF_FLOW_FIELD_IPV6_TCP,
  86         ICE_AVF_FLOW_FIELD_IPV6_SCTP,
  87         ICE_AVF_FLOW_FIELD_IPV6_OTHER,
  88         ICE_AVF_FLOW_FIELD_FRAG_IPV6,
  89         ICE_AVF_FLOW_FIELD_RSVD47,
  90         ICE_AVF_FLOW_FIELD_FCOE_OX,
  91         ICE_AVF_FLOW_FIELD_FCOE_RX,
  92         ICE_AVF_FLOW_FIELD_FCOE_OTHER,
  93         /* Values 51-62 are reserved */
  94         ICE_AVF_FLOW_FIELD_L2_PAYLOAD           = 63,
  95         ICE_AVF_FLOW_FIELD_MAX
  96 };
  97
  98 /* Supported RSS offloads  This macro is defined to support
  99  * VIRTCHNL_OP_GET_RSS_HENA_CAPS ops. PF driver sends the RSS hardware
 100  * capabilities to the caller of this ops.
 101  */
 102 #define ICE_DEFAULT_RSS_HENA ( \
 103         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP) | \
 104         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP) | \
 105         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP) | \
 106         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \
 107         BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4) | \
 108         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP) | \
 109         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP) | \
 110         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP) | \
 111         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \
 112         BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6) | \
 113         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \
 114         BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \
 115         BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \
 116         BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \
 117         BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \
 118         BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP))
 119
 120 enum ice_flow_dir {
 121         ICE_FLOW_RX             = 0x02,
 122 };
 123
 124 enum ice_flow_priority {
 125         ICE_FLOW_PRIO_LOW,
 126         ICE_FLOW_PRIO_NORMAL,
 127         ICE_FLOW_PRIO_HIGH
 128 };
 129
 130 #define ICE_FLOW_SEG_MAX                2
 131 #define ICE_FLOW_SEG_RAW_FLD_MAX        2
 132 #define ICE_FLOW_FV_EXTRACT_SZ          2
 133
 134 #define ICE_FLOW_SET_HDRS(seg, val)     ((seg)->hdrs |= (u32)(val))
 135
 136 struct ice_flow_seg_xtrct {
 137         u8 prot_id;     /* Protocol ID of extracted header field */
 138         u16 off;        /* Starting offset of the field in header in bytes */
 139         u8 idx;         /* Index of FV entry used */
 140         u8 disp;        /* Displacement of field in bits fr. FV entry's start */
 141 };
 142
 143 enum ice_flow_fld_match_type {
 144         ICE_FLOW_FLD_TYPE_REG,          /* Value, mask */
 145         ICE_FLOW_FLD_TYPE_RANGE,        /* Value, mask, last (upper bound) */
 146         ICE_FLOW_FLD_TYPE_PREFIX,       /* IP address, prefix, size of prefix */
 147         ICE_FLOW_FLD_TYPE_SIZE,         /* Value, mask, size of match */
 148 };
 149
 150 struct ice_flow_fld_loc {
 151         /* Describe offsets of field information relative to the beginning of
 152          * input buffer provided when adding flow entries.
 153          */
 154         u16 val;        /* Offset where the value is located */
 155         u16 mask;       /* Offset where the mask/prefix value is located */
 156         u16 last;       /* Length or offset where the upper value is located */
 157 };
 158
 159 struct ice_flow_fld_info {
 160         enum ice_flow_fld_match_type type;
 161         /* Location where to retrieve data from an input buffer */
 162         struct ice_flow_fld_loc src;
 163         /* Location where to put the data into the final entry buffer */
 164         struct ice_flow_fld_loc entry;
 165         struct ice_flow_seg_xtrct xtrct;
 166 };
 167
 168 struct ice_flow_seg_fld_raw {
 169         struct ice_flow_fld_info info;
 170         u16 off;        /* Offset from the start of the segment */
 171 };
 172
 173 struct ice_flow_seg_info {
 174         u32 hdrs;       /* Bitmask indicating protocol headers present */
 175         u64 match;      /* Bitmask indicating header fields to be matched */
 176         u64 range;      /* Bitmask indicating header fields matched as ranges */
 177
 178         struct ice_flow_fld_info fields[ICE_FLOW_FIELD_IDX_MAX];
 179
 180         u8 raws_cnt;    /* Number of raw fields to be matched */
 181         struct ice_flow_seg_fld_raw raws[ICE_FLOW_SEG_RAW_FLD_MAX];
 182 };
 183
 184 /* This structure describes a flow entry, and is tracked only in this file */
 185 struct ice_flow_entry {
 186         struct list_head l_entry;
 187
 188         u64 id;
 189         struct ice_flow_prof *prof;
 190         /* Flow entry's content */
 191         void *entry;
 192         enum ice_flow_priority priority;
 193         u16 vsi_handle;
 194         u16 entry_sz;
 195 };
 196
 197 #define ICE_FLOW_ENTRY_HNDL(e)  ((u64)(uintptr_t)e)
 198 #define ICE_FLOW_ENTRY_PTR(h)   ((struct ice_flow_entry *)(uintptr_t)(h))
 199
 200 struct ice_flow_prof {
 201         struct list_head l_entry;
 202
 203         u64 id;
 204         enum ice_flow_dir dir;
 205         u8 segs_cnt;
 206
 207         /* Keep track of flow entries associated with this flow profile */
 208         struct mutex entries_lock;
 209         struct list_head entries;
 210
 211         struct ice_flow_seg_info segs[ICE_FLOW_SEG_MAX];
 212
 213         /* software VSI handles referenced by this flow profile */
 214         DECLARE_BITMAP(vsis, ICE_MAX_VSI);
 215 };
 216
 217 struct ice_rss_cfg {
 218         struct list_head l_entry;
 219         /* bitmap of VSIs added to the RSS entry */
 220         DECLARE_BITMAP(vsis, ICE_MAX_VSI);
 221         u64 hashed_flds;
 222         u32 packet_hdr;
 223 };
 224
 225 enum ice_status
 226 ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
 227                   u64 prof_id, struct ice_flow_seg_info *segs, u8 segs_cnt,
 228                   struct ice_flow_prof **prof);
 229 enum ice_status
 230 ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id);
 231 enum ice_status
 232 ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
 233                    u64 entry_id, u16 vsi, enum ice_flow_priority prio,
 234                    void *data, u64 *entry_h);
 235 enum ice_status
 236 ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_h);
 237 void
 238 ice_flow_set_fld(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
 239                  u16 val_loc, u16 mask_loc, u16 last_loc, bool range);
 240 void
 241 ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len,
 242                      u16 val_loc, u16 mask_loc);
 243 void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle);
 244 enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
 245 enum ice_status
 246 ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds);
 247 enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
 248 enum ice_status
 249 ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
 250                 u32 addl_hdrs);
 251 u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs);
 252 #endif /* _ICE_FLOW_H_ */