1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
28 #include <linux/ptp_classify.h>
30 /* The XL710 timesync is very much like Intel's 82599 design when it comes to
31 * the fundamental clock design. However, the clock operations are much simpler
32 * in the XL710 because the device supports a full 64 bits of nanoseconds.
33 * Because the field is so wide, we can forgo the cycle counter and just
34 * operate with the nanosecond field directly without fear of overflow.
36 * Much like the 82599, the update period is dependent upon the link speed:
37 * At 40Gb link or no link, the period is 1.6ns.
38 * At 10Gb link, the period is multiplied by 2. (3.2ns)
39 * At 1Gb link, the period is multiplied by 20. (32ns)
40 * 1588 functionality is not supported at 100Mbps.
42 #define I40E_PTP_40GB_INCVAL 0x0199999999ULL
43 #define I40E_PTP_10GB_INCVAL 0x0333333333ULL
44 #define I40E_PTP_1GB_INCVAL 0x2000000000ULL
46 #define I40E_PRTTSYN_CTL1_TSYNTYPE_V1 BIT(I40E_PRTTSYN_CTL1_TSYNTYPE_SHIFT)
47 #define I40E_PRTTSYN_CTL1_TSYNTYPE_V2 (2 << \
48 I40E_PRTTSYN_CTL1_TSYNTYPE_SHIFT)
51 * i40e_ptp_read - Read the PHC time from the device
52 * @pf: Board private structure
53 * @ts: timespec structure to hold the current time value
55 * This function reads the PRTTSYN_TIME registers and stores them in a
56 * timespec. However, since the registers are 64 bits of nanoseconds, we must
57 * convert the result to a timespec before we can return.
59 static void i40e_ptp_read(struct i40e_pf *pf, struct timespec64 *ts)
61 struct i40e_hw *hw = &pf->hw;
65 /* The timer latches on the lowest register read. */
66 lo = rd32(hw, I40E_PRTTSYN_TIME_L);
67 hi = rd32(hw, I40E_PRTTSYN_TIME_H);
69 ns = (((u64)hi) << 32) | lo;
71 *ts = ns_to_timespec64(ns);
75 * i40e_ptp_write - Write the PHC time to the device
76 * @pf: Board private structure
77 * @ts: timespec structure that holds the new time value
79 * This function writes the PRTTSYN_TIME registers with the user value. Since
80 * we receive a timespec from the stack, we must convert that timespec into
81 * nanoseconds before programming the registers.
83 static void i40e_ptp_write(struct i40e_pf *pf, const struct timespec64 *ts)
85 struct i40e_hw *hw = &pf->hw;
86 u64 ns = timespec64_to_ns(ts);
88 /* The timer will not update until the high register is written, so
89 * write the low register first.
91 wr32(hw, I40E_PRTTSYN_TIME_L, ns & 0xFFFFFFFF);
92 wr32(hw, I40E_PRTTSYN_TIME_H, ns >> 32);
96 * i40e_ptp_convert_to_hwtstamp - Convert device clock to system time
97 * @hwtstamps: Timestamp structure to update
98 * @timestamp: Timestamp from the hardware
100 * We need to convert the NIC clock value into a hwtstamp which can be used by
101 * the upper level timestamping functions. Since the timestamp is simply a 64-
102 * bit nanosecond value, we can call ns_to_ktime directly to handle this.
104 static void i40e_ptp_convert_to_hwtstamp(struct skb_shared_hwtstamps *hwtstamps,
107 memset(hwtstamps, 0, sizeof(*hwtstamps));
109 hwtstamps->hwtstamp = ns_to_ktime(timestamp);
113 * i40e_ptp_adjfreq - Adjust the PHC frequency
114 * @ptp: The PTP clock structure
115 * @ppb: Parts per billion adjustment from the base
117 * Adjust the frequency of the PHC by the indicated parts per billion from the
120 static int i40e_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
122 struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
123 struct i40e_hw *hw = &pf->hw;
132 smp_mb(); /* Force any pending update before accessing. */
133 adj = ACCESS_ONCE(pf->ptp_base_adj);
137 diff = div_u64(freq, 1000000000ULL);
144 wr32(hw, I40E_PRTTSYN_INC_L, adj & 0xFFFFFFFF);
145 wr32(hw, I40E_PRTTSYN_INC_H, adj >> 32);
151 * i40e_ptp_adjtime - Adjust the PHC time
152 * @ptp: The PTP clock structure
153 * @delta: Offset in nanoseconds to adjust the PHC time by
155 * Adjust the frequency of the PHC by the indicated parts per billion from the
158 static int i40e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
160 struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
161 struct timespec64 now;
163 mutex_lock(&pf->tmreg_lock);
165 i40e_ptp_read(pf, &now);
166 timespec64_add_ns(&now, delta);
167 i40e_ptp_write(pf, (const struct timespec64 *)&now);
169 mutex_unlock(&pf->tmreg_lock);
175 * i40e_ptp_gettime - Get the time of the PHC
176 * @ptp: The PTP clock structure
177 * @ts: timespec structure to hold the current time value
179 * Read the device clock and return the correct value on ns, after converting it
180 * into a timespec struct.
182 static int i40e_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
184 struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
186 mutex_lock(&pf->tmreg_lock);
187 i40e_ptp_read(pf, ts);
188 mutex_unlock(&pf->tmreg_lock);
194 * i40e_ptp_settime - Set the time of the PHC
195 * @ptp: The PTP clock structure
196 * @ts: timespec structure that holds the new time value
198 * Set the device clock to the user input value. The conversion from timespec
199 * to ns happens in the write function.
201 static int i40e_ptp_settime(struct ptp_clock_info *ptp,
202 const struct timespec64 *ts)
204 struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
206 mutex_lock(&pf->tmreg_lock);
207 i40e_ptp_write(pf, ts);
208 mutex_unlock(&pf->tmreg_lock);
214 * i40e_ptp_feature_enable - Enable/disable ancillary features of the PHC subsystem
215 * @ptp: The PTP clock structure
216 * @rq: The requested feature to change
217 * @on: Enable/disable flag
219 * The XL710 does not support any of the ancillary features of the PHC
220 * subsystem, so this function may just return.
222 static int i40e_ptp_feature_enable(struct ptp_clock_info *ptp,
223 struct ptp_clock_request *rq, int on)
229 * i40e_ptp_update_latch_events - Read I40E_PRTTSYN_STAT_1 and latch events
230 * @pf: the PF data structure
232 * This function reads I40E_PRTTSYN_STAT_1 and updates the corresponding timers
233 * for noticed latch events. This allows the driver to keep track of the first
234 * time a latch event was noticed which will be used to help clear out Rx
235 * timestamps for packets that got dropped or lost.
237 * This function will return the current value of I40E_PRTTSYN_STAT_1 and is
238 * expected to be called only while under the ptp_rx_lock.
240 static u32 i40e_ptp_get_rx_events(struct i40e_pf *pf)
242 struct i40e_hw *hw = &pf->hw;
243 u32 prttsyn_stat, new_latch_events;
246 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_1);
247 new_latch_events = prttsyn_stat & ~pf->latch_event_flags;
249 /* Update the jiffies time for any newly latched timestamp. This
250 * ensures that we store the time that we first discovered a timestamp
251 * was latched by the hardware. The service task will later determine
252 * if we should free the latch and drop that timestamp should too much
253 * time pass. This flow ensures that we only update jiffies for new
254 * events latched since the last time we checked, and not all events
255 * currently latched, so that the service task accounting remains
258 for (i = 0; i < 4; i++) {
259 if (new_latch_events & BIT(i))
260 pf->latch_events[i] = jiffies;
263 /* Finally, we store the current status of the Rx timestamp latches */
264 pf->latch_event_flags = prttsyn_stat;
270 * i40e_ptp_rx_hang - Detect error case when Rx timestamp registers are hung
271 * @pf: The PF private data structure
272 * @vsi: The VSI with the rings relevant to 1588
274 * This watchdog task is scheduled to detect error case where hardware has
275 * dropped an Rx packet that was timestamped when the ring is full. The
276 * particular error is rare but leaves the device in a state unable to timestamp
277 * any future packets.
279 void i40e_ptp_rx_hang(struct i40e_pf *pf)
281 struct i40e_hw *hw = &pf->hw;
282 unsigned int i, cleared = 0;
284 /* Since we cannot turn off the Rx timestamp logic if the device is
285 * configured for Tx timestamping, we check if Rx timestamping is
286 * configured. We don't want to spuriously warn about Rx timestamp
287 * hangs if we don't care about the timestamps.
289 if (!(pf->flags & I40E_FLAG_PTP) || !pf->ptp_rx)
292 spin_lock_bh(&pf->ptp_rx_lock);
294 /* Update current latch times for Rx events */
295 i40e_ptp_get_rx_events(pf);
297 /* Check all the currently latched Rx events and see whether they have
298 * been latched for over a second. It is assumed that any timestamp
299 * should have been cleared within this time, or else it was captured
300 * for a dropped frame that the driver never received. Thus, we will
301 * clear any timestamp that has been latched for over 1 second.
303 for (i = 0; i < 4; i++) {
304 if ((pf->latch_event_flags & BIT(i)) &&
305 time_is_before_jiffies(pf->latch_events[i] + HZ)) {
306 rd32(hw, I40E_PRTTSYN_RXTIME_H(i));
307 pf->latch_event_flags &= ~BIT(i);
312 spin_unlock_bh(&pf->ptp_rx_lock);
314 /* Log a warning if more than 2 timestamps got dropped in the same
315 * check. We don't want to warn about all drops because it can occur
316 * in normal scenarios such as PTP frames on multicast addresses we
317 * aren't listening to. However, administrator should know if this is
318 * the reason packets aren't receiving timestamps.
321 dev_dbg(&pf->pdev->dev,
322 "Dropped %d missed RXTIME timestamp events\n",
325 /* Finally, update the rx_hwtstamp_cleared counter */
326 pf->rx_hwtstamp_cleared += cleared;
330 * i40e_ptp_tx_hang - Detect error case when Tx timestamp register is hung
331 * @pf: The PF private data structure
333 * This watchdog task is run periodically to make sure that we clear the Tx
334 * timestamp logic if we don't obtain a timestamp in a reasonable amount of
335 * time. It is unexpected in the normal case but if it occurs it results in
336 * permanently prevent timestamps of future packets
338 void i40e_ptp_tx_hang(struct i40e_pf *pf)
342 if (!(pf->flags & I40E_FLAG_PTP) || !pf->ptp_tx)
345 /* Nothing to do if we're not already waiting for a timestamp */
346 if (!test_bit(__I40E_PTP_TX_IN_PROGRESS, pf->state))
349 /* We already have a handler routine which is run when we are notified
350 * of a Tx timestamp in the hardware. If we don't get an interrupt
351 * within a second it is reasonable to assume that we never will.
353 if (time_is_before_jiffies(pf->ptp_tx_start + HZ)) {
354 skb = pf->ptp_tx_skb;
355 pf->ptp_tx_skb = NULL;
356 clear_bit_unlock(__I40E_PTP_TX_IN_PROGRESS, pf->state);
358 /* Free the skb after we clear the bitlock */
359 dev_kfree_skb_any(skb);
360 pf->tx_hwtstamp_timeouts++;
365 * i40e_ptp_tx_hwtstamp - Utility function which returns the Tx timestamp
366 * @pf: Board private structure
368 * Read the value of the Tx timestamp from the registers, convert it into a
369 * value consumable by the stack, and store that result into the shhwtstamps
370 * struct before returning it up the stack.
372 void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf)
374 struct skb_shared_hwtstamps shhwtstamps;
375 struct sk_buff *skb = pf->ptp_tx_skb;
376 struct i40e_hw *hw = &pf->hw;
380 if (!(pf->flags & I40E_FLAG_PTP) || !pf->ptp_tx)
383 /* don't attempt to timestamp if we don't have an skb */
387 lo = rd32(hw, I40E_PRTTSYN_TXTIME_L);
388 hi = rd32(hw, I40E_PRTTSYN_TXTIME_H);
390 ns = (((u64)hi) << 32) | lo;
391 i40e_ptp_convert_to_hwtstamp(&shhwtstamps, ns);
393 /* Clear the bit lock as soon as possible after reading the register,
394 * and prior to notifying the stack via skb_tstamp_tx(). Otherwise
395 * applications might wake up and attempt to request another transmit
396 * timestamp prior to the bit lock being cleared.
398 pf->ptp_tx_skb = NULL;
399 clear_bit_unlock(__I40E_PTP_TX_IN_PROGRESS, pf->state);
401 /* Notify the stack and free the skb after we've unlocked */
402 skb_tstamp_tx(skb, &shhwtstamps);
403 dev_kfree_skb_any(skb);
407 * i40e_ptp_rx_hwtstamp - Utility function which checks for an Rx timestamp
408 * @pf: Board private structure
409 * @skb: Particular skb to send timestamp with
410 * @index: Index into the receive timestamp registers for the timestamp
412 * The XL710 receives a notification in the receive descriptor with an offset
413 * into the set of RXTIME registers where the timestamp is for that skb. This
414 * function goes and fetches the receive timestamp from that offset, if a valid
415 * one exists. The RXTIME registers are in ns, so we must convert the result
418 void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index)
420 u32 prttsyn_stat, hi, lo;
424 /* Since we cannot turn off the Rx timestamp logic if the device is
425 * doing Tx timestamping, check if Rx timestamping is configured.
427 if (!(pf->flags & I40E_FLAG_PTP) || !pf->ptp_rx)
432 spin_lock_bh(&pf->ptp_rx_lock);
434 /* Get current Rx events and update latch times */
435 prttsyn_stat = i40e_ptp_get_rx_events(pf);
437 /* TODO: Should we warn about missing Rx timestamp event? */
438 if (!(prttsyn_stat & BIT(index))) {
439 spin_unlock_bh(&pf->ptp_rx_lock);
443 /* Clear the latched event since we're about to read its register */
444 pf->latch_event_flags &= ~BIT(index);
446 lo = rd32(hw, I40E_PRTTSYN_RXTIME_L(index));
447 hi = rd32(hw, I40E_PRTTSYN_RXTIME_H(index));
449 spin_unlock_bh(&pf->ptp_rx_lock);
451 ns = (((u64)hi) << 32) | lo;
453 i40e_ptp_convert_to_hwtstamp(skb_hwtstamps(skb), ns);
457 * i40e_ptp_set_increment - Utility function to update clock increment rate
458 * @pf: Board private structure
460 * During a link change, the DMA frequency that drives the 1588 logic will
461 * change. In order to keep the PRTTSYN_TIME registers in units of nanoseconds,
462 * we must update the increment value per clock tick.
464 void i40e_ptp_set_increment(struct i40e_pf *pf)
466 struct i40e_link_status *hw_link_info;
467 struct i40e_hw *hw = &pf->hw;
470 hw_link_info = &hw->phy.link_info;
472 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
474 switch (hw_link_info->link_speed) {
475 case I40E_LINK_SPEED_10GB:
476 incval = I40E_PTP_10GB_INCVAL;
478 case I40E_LINK_SPEED_1GB:
479 incval = I40E_PTP_1GB_INCVAL;
481 case I40E_LINK_SPEED_100MB:
483 static int warn_once;
486 dev_warn(&pf->pdev->dev,
487 "1588 functionality is not supported at 100 Mbps. Stopping the PHC.\n");
493 case I40E_LINK_SPEED_40GB:
495 incval = I40E_PTP_40GB_INCVAL;
499 /* Write the new increment value into the increment register. The
500 * hardware will not update the clock until both registers have been
503 wr32(hw, I40E_PRTTSYN_INC_L, incval & 0xFFFFFFFF);
504 wr32(hw, I40E_PRTTSYN_INC_H, incval >> 32);
506 /* Update the base adjustement value. */
507 ACCESS_ONCE(pf->ptp_base_adj) = incval;
508 smp_mb(); /* Force the above update. */
512 * i40e_ptp_get_ts_config - ioctl interface to read the HW timestamping
513 * @pf: Board private structure
516 * Obtain the current hardware timestamping settigs as requested. To do this,
517 * keep a shadow copy of the timestamp settings rather than attempting to
518 * deconstruct it from the registers.
520 int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr)
522 struct hwtstamp_config *config = &pf->tstamp_config;
524 if (!(pf->flags & I40E_FLAG_PTP))
527 return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
532 * i40e_ptp_set_timestamp_mode - setup hardware for requested timestamp mode
533 * @pf: Board private structure
534 * @config: hwtstamp settings requested or saved
536 * Control hardware registers to enter the specific mode requested by the
537 * user. Also used during reset path to ensure that timestamp settings are
540 * Note: modifies config in place, and may update the requested mode to be
541 * more broad if the specific filter is not directly supported.
543 static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,
544 struct hwtstamp_config *config)
546 struct i40e_hw *hw = &pf->hw;
547 u32 tsyntype, regval;
549 /* Reserved for future extensions. */
553 switch (config->tx_type) {
554 case HWTSTAMP_TX_OFF:
564 switch (config->rx_filter) {
565 case HWTSTAMP_FILTER_NONE:
567 /* We set the type to V1, but do not enable UDP packet
568 * recognition. In this way, we should be as close to
569 * disabling PTP Rx timestamps as possible since V1 packets
570 * are always UDP, since L2 packets are a V2 feature.
572 tsyntype = I40E_PRTTSYN_CTL1_TSYNTYPE_V1;
574 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
575 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
576 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
577 if (!(pf->hw_features & I40E_HW_PTP_L4_CAPABLE))
580 tsyntype = I40E_PRTTSYN_CTL1_V1MESSTYPE0_MASK |
581 I40E_PRTTSYN_CTL1_TSYNTYPE_V1 |
582 I40E_PRTTSYN_CTL1_UDP_ENA_MASK;
583 config->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
585 case HWTSTAMP_FILTER_PTP_V2_EVENT:
586 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
587 case HWTSTAMP_FILTER_PTP_V2_SYNC:
588 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
589 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
590 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
591 if (!(pf->hw_features & I40E_HW_PTP_L4_CAPABLE))
594 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
595 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
596 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
598 tsyntype = I40E_PRTTSYN_CTL1_V2MESSTYPE0_MASK |
599 I40E_PRTTSYN_CTL1_TSYNTYPE_V2;
600 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) {
601 tsyntype |= I40E_PRTTSYN_CTL1_UDP_ENA_MASK;
602 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
604 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
607 case HWTSTAMP_FILTER_NTP_ALL:
608 case HWTSTAMP_FILTER_ALL:
613 /* Clear out all 1588-related registers to clear and unlatch them. */
614 spin_lock_bh(&pf->ptp_rx_lock);
615 rd32(hw, I40E_PRTTSYN_STAT_0);
616 rd32(hw, I40E_PRTTSYN_TXTIME_H);
617 rd32(hw, I40E_PRTTSYN_RXTIME_H(0));
618 rd32(hw, I40E_PRTTSYN_RXTIME_H(1));
619 rd32(hw, I40E_PRTTSYN_RXTIME_H(2));
620 rd32(hw, I40E_PRTTSYN_RXTIME_H(3));
621 pf->latch_event_flags = 0;
622 spin_unlock_bh(&pf->ptp_rx_lock);
624 /* Enable/disable the Tx timestamp interrupt based on user input. */
625 regval = rd32(hw, I40E_PRTTSYN_CTL0);
627 regval |= I40E_PRTTSYN_CTL0_TXTIME_INT_ENA_MASK;
629 regval &= ~I40E_PRTTSYN_CTL0_TXTIME_INT_ENA_MASK;
630 wr32(hw, I40E_PRTTSYN_CTL0, regval);
632 regval = rd32(hw, I40E_PFINT_ICR0_ENA);
634 regval |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
636 regval &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
637 wr32(hw, I40E_PFINT_ICR0_ENA, regval);
639 /* Although there is no simple on/off switch for Rx, we "disable" Rx
640 * timestamps by setting to V1 only mode and clear the UDP
641 * recognition. This ought to disable all PTP Rx timestamps as V1
642 * packets are always over UDP. Note that software is configured to
643 * ignore Rx timestamps via the pf->ptp_rx flag.
645 regval = rd32(hw, I40E_PRTTSYN_CTL1);
646 /* clear everything but the enable bit */
647 regval &= I40E_PRTTSYN_CTL1_TSYNENA_MASK;
648 /* now enable bits for desired Rx timestamps */
650 wr32(hw, I40E_PRTTSYN_CTL1, regval);
656 * i40e_ptp_set_ts_config - ioctl interface to control the HW timestamping
657 * @pf: Board private structure
660 * Respond to the user filter requests and make the appropriate hardware
661 * changes here. The XL710 cannot support splitting of the Tx/Rx timestamping
662 * logic, so keep track in software of whether to indicate these timestamps
665 * It is permissible to "upgrade" the user request to a broader filter, as long
666 * as the user receives the timestamps they care about and the user is notified
667 * the filter has been broadened.
669 int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr)
671 struct hwtstamp_config config;
674 if (!(pf->flags & I40E_FLAG_PTP))
677 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
680 err = i40e_ptp_set_timestamp_mode(pf, &config);
684 /* save these settings for future reference */
685 pf->tstamp_config = config;
687 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
692 * i40e_ptp_create_clock - Create PTP clock device for userspace
693 * @pf: Board private structure
695 * This function creates a new PTP clock device. It only creates one if we
696 * don't already have one, so it is safe to call. Will return error if it
697 * can't create one, but success if we already have a device. Should be used
698 * by i40e_ptp_init to create clock initially, and prevent global resets from
699 * creating new clock devices.
701 static long i40e_ptp_create_clock(struct i40e_pf *pf)
703 /* no need to create a clock device if we already have one */
704 if (!IS_ERR_OR_NULL(pf->ptp_clock))
707 strncpy(pf->ptp_caps.name, i40e_driver_name,
708 sizeof(pf->ptp_caps.name) - 1);
709 pf->ptp_caps.owner = THIS_MODULE;
710 pf->ptp_caps.max_adj = 999999999;
711 pf->ptp_caps.n_ext_ts = 0;
712 pf->ptp_caps.pps = 0;
713 pf->ptp_caps.adjfreq = i40e_ptp_adjfreq;
714 pf->ptp_caps.adjtime = i40e_ptp_adjtime;
715 pf->ptp_caps.gettime64 = i40e_ptp_gettime;
716 pf->ptp_caps.settime64 = i40e_ptp_settime;
717 pf->ptp_caps.enable = i40e_ptp_feature_enable;
719 /* Attempt to register the clock before enabling the hardware. */
720 pf->ptp_clock = ptp_clock_register(&pf->ptp_caps, &pf->pdev->dev);
721 if (IS_ERR(pf->ptp_clock))
722 return PTR_ERR(pf->ptp_clock);
724 /* clear the hwtstamp settings here during clock create, instead of
725 * during regular init, so that we can maintain settings across a
728 pf->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
729 pf->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
735 * i40e_ptp_init - Initialize the 1588 support after device probe or reset
736 * @pf: Board private structure
738 * This function sets device up for 1588 support. The first time it is run, it
739 * will create a PHC clock device. It does not create a clock device if one
740 * already exists. It also reconfigures the device after a reset.
742 void i40e_ptp_init(struct i40e_pf *pf)
744 struct net_device *netdev = pf->vsi[pf->lan_vsi]->netdev;
745 struct i40e_hw *hw = &pf->hw;
749 /* Only one PF is assigned to control 1588 logic per port. Do not
750 * enable any support for PFs not assigned via PRTTSYN_CTL0.PF_ID
752 pf_id = (rd32(hw, I40E_PRTTSYN_CTL0) & I40E_PRTTSYN_CTL0_PF_ID_MASK) >>
753 I40E_PRTTSYN_CTL0_PF_ID_SHIFT;
754 if (hw->pf_id != pf_id) {
755 pf->flags &= ~I40E_FLAG_PTP;
756 dev_info(&pf->pdev->dev, "%s: PTP not supported on %s\n",
762 mutex_init(&pf->tmreg_lock);
763 spin_lock_init(&pf->ptp_rx_lock);
765 /* ensure we have a clock device */
766 err = i40e_ptp_create_clock(pf);
768 pf->ptp_clock = NULL;
769 dev_err(&pf->pdev->dev, "%s: ptp_clock_register failed\n",
771 } else if (pf->ptp_clock) {
772 struct timespec64 ts;
775 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
776 dev_info(&pf->pdev->dev, "PHC enabled\n");
777 pf->flags |= I40E_FLAG_PTP;
779 /* Ensure the clocks are running. */
780 regval = rd32(hw, I40E_PRTTSYN_CTL0);
781 regval |= I40E_PRTTSYN_CTL0_TSYNENA_MASK;
782 wr32(hw, I40E_PRTTSYN_CTL0, regval);
783 regval = rd32(hw, I40E_PRTTSYN_CTL1);
784 regval |= I40E_PRTTSYN_CTL1_TSYNENA_MASK;
785 wr32(hw, I40E_PRTTSYN_CTL1, regval);
787 /* Set the increment value per clock tick. */
788 i40e_ptp_set_increment(pf);
790 /* reset timestamping mode */
791 i40e_ptp_set_timestamp_mode(pf, &pf->tstamp_config);
793 /* Set the clock value. */
794 ts = ktime_to_timespec64(ktime_get_real());
795 i40e_ptp_settime(&pf->ptp_caps, &ts);
800 * i40e_ptp_stop - Disable the driver/hardware support and unregister the PHC
801 * @pf: Board private structure
803 * This function handles the cleanup work required from the initialization by
804 * clearing out the important information and unregistering the PHC.
806 void i40e_ptp_stop(struct i40e_pf *pf)
808 pf->flags &= ~I40E_FLAG_PTP;
812 if (pf->ptp_tx_skb) {
813 dev_kfree_skb_any(pf->ptp_tx_skb);
814 pf->ptp_tx_skb = NULL;
815 clear_bit_unlock(__I40E_PTP_TX_IN_PROGRESS, pf->state);
819 ptp_clock_unregister(pf->ptp_clock);
820 pf->ptp_clock = NULL;
821 dev_info(&pf->pdev->dev, "%s: removed PHC on %s\n", __func__,
822 pf->vsi[pf->lan_vsi]->netdev->name);