1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
33 #include "i40e_diag.h"
34 #include <net/udp_tunnel.h>
36 const char i40e_driver_name[] = "i40e";
37 static const char i40e_driver_string[] =
38 "Intel(R) Ethernet Connection XL710 Network Driver";
42 #define DRV_VERSION_MAJOR 1
43 #define DRV_VERSION_MINOR 6
44 #define DRV_VERSION_BUILD 16
45 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
46 __stringify(DRV_VERSION_MINOR) "." \
47 __stringify(DRV_VERSION_BUILD) DRV_KERN
48 const char i40e_driver_version_str[] = DRV_VERSION;
49 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
51 /* a bit of forward declarations */
52 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
53 static void i40e_handle_reset_warning(struct i40e_pf *pf);
54 static int i40e_add_vsi(struct i40e_vsi *vsi);
55 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
56 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
57 static int i40e_setup_misc_vector(struct i40e_pf *pf);
58 static void i40e_determine_queue_usage(struct i40e_pf *pf);
59 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
60 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
61 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
63 /* i40e_pci_tbl - PCI Device ID Table
65 * Last entry must be all 0s
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
70 static const struct pci_device_id i40e_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
89 /* required last entry */
92 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
94 #define I40E_MAX_VF_COUNT 128
95 static int debug = -1;
96 module_param(debug, int, 0);
97 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
99 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
100 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
101 MODULE_LICENSE("GPL");
102 MODULE_VERSION(DRV_VERSION);
104 static struct workqueue_struct *i40e_wq;
107 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
108 * @hw: pointer to the HW structure
109 * @mem: ptr to mem struct to fill out
110 * @size: size of memory requested
111 * @alignment: what to align the allocation to
113 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
114 u64 size, u32 alignment)
116 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
118 mem->size = ALIGN(size, alignment);
119 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
120 &mem->pa, GFP_KERNEL);
128 * i40e_free_dma_mem_d - OS specific memory free for shared code
129 * @hw: pointer to the HW structure
130 * @mem: ptr to mem struct to free
132 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
134 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
136 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
145 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
146 * @hw: pointer to the HW structure
147 * @mem: ptr to mem struct to fill out
148 * @size: size of memory requested
150 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
154 mem->va = kzalloc(size, GFP_KERNEL);
163 * i40e_free_virt_mem_d - OS specific memory free for shared code
164 * @hw: pointer to the HW structure
165 * @mem: ptr to mem struct to free
167 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
169 /* it's ok to kfree a NULL pointer */
178 * i40e_get_lump - find a lump of free generic resource
179 * @pf: board private structure
180 * @pile: the pile of resource to search
181 * @needed: the number of items needed
182 * @id: an owner id to stick on the items assigned
184 * Returns the base item index of the lump, or negative for error
186 * The search_hint trick and lack of advanced fit-finding only work
187 * because we're highly likely to have all the same size lump requests.
188 * Linear search time and any fragmentation should be minimal.
190 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
196 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
197 dev_info(&pf->pdev->dev,
198 "param err: pile=%p needed=%d id=0x%04x\n",
203 /* start the linear search with an imperfect hint */
204 i = pile->search_hint;
205 while (i < pile->num_entries) {
206 /* skip already allocated entries */
207 if (pile->list[i] & I40E_PILE_VALID_BIT) {
212 /* do we have enough in this lump? */
213 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
214 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
219 /* there was enough, so assign it to the requestor */
220 for (j = 0; j < needed; j++)
221 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
223 pile->search_hint = i + j;
227 /* not enough, so skip over it and continue looking */
235 * i40e_put_lump - return a lump of generic resource
236 * @pile: the pile of resource to search
237 * @index: the base item index
238 * @id: the owner id of the items assigned
240 * Returns the count of items in the lump
242 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
244 int valid_id = (id | I40E_PILE_VALID_BIT);
248 if (!pile || index >= pile->num_entries)
252 i < pile->num_entries && pile->list[i] == valid_id;
258 if (count && index < pile->search_hint)
259 pile->search_hint = index;
265 * i40e_find_vsi_from_id - searches for the vsi with the given id
266 * @pf - the pf structure to search for the vsi
267 * @id - id of the vsi it is searching for
269 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
273 for (i = 0; i < pf->num_alloc_vsi; i++)
274 if (pf->vsi[i] && (pf->vsi[i]->id == id))
281 * i40e_service_event_schedule - Schedule the service task to wake up
282 * @pf: board private structure
284 * If not already scheduled, this puts the task into the work queue
286 void i40e_service_event_schedule(struct i40e_pf *pf)
288 if (!test_bit(__I40E_DOWN, &pf->state) &&
289 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
290 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
291 queue_work(i40e_wq, &pf->service_task);
295 * i40e_tx_timeout - Respond to a Tx Hang
296 * @netdev: network interface device structure
298 * If any port has noticed a Tx timeout, it is likely that the whole
299 * device is munged, not just the one netdev port, so go for the full
303 void i40e_tx_timeout(struct net_device *netdev)
305 static void i40e_tx_timeout(struct net_device *netdev)
308 struct i40e_netdev_priv *np = netdev_priv(netdev);
309 struct i40e_vsi *vsi = np->vsi;
310 struct i40e_pf *pf = vsi->back;
311 struct i40e_ring *tx_ring = NULL;
312 unsigned int i, hung_queue = 0;
315 pf->tx_timeout_count++;
317 /* find the stopped queue the same way the stack does */
318 for (i = 0; i < netdev->num_tx_queues; i++) {
319 struct netdev_queue *q;
320 unsigned long trans_start;
322 q = netdev_get_tx_queue(netdev, i);
323 trans_start = q->trans_start;
324 if (netif_xmit_stopped(q) &&
326 (trans_start + netdev->watchdog_timeo))) {
332 if (i == netdev->num_tx_queues) {
333 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
335 /* now that we have an index, find the tx_ring struct */
336 for (i = 0; i < vsi->num_queue_pairs; i++) {
337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
339 vsi->tx_rings[i]->queue_index) {
340 tx_ring = vsi->tx_rings[i];
347 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
348 pf->tx_timeout_recovery_level = 1; /* reset after some time */
349 else if (time_before(jiffies,
350 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
351 return; /* don't do any new action before the next timeout */
354 head = i40e_get_head(tx_ring);
355 /* Read interrupt register */
356 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
358 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
359 tx_ring->vsi->base_vector - 1));
361 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
363 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
364 vsi->seid, hung_queue, tx_ring->next_to_clean,
365 head, tx_ring->next_to_use,
366 readl(tx_ring->tail), val);
369 pf->tx_timeout_last_recovery = jiffies;
370 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
371 pf->tx_timeout_recovery_level, hung_queue);
373 switch (pf->tx_timeout_recovery_level) {
375 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
378 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
381 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
384 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
388 i40e_service_event_schedule(pf);
389 pf->tx_timeout_recovery_level++;
393 * i40e_get_vsi_stats_struct - Get System Network Statistics
394 * @vsi: the VSI we care about
396 * Returns the address of the device statistics structure.
397 * The statistics are actually updated from the service task.
399 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
401 return &vsi->net_stats;
405 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
406 * @netdev: network interface device structure
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
412 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
413 struct net_device *netdev,
414 struct rtnl_link_stats64 *stats)
416 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
417 struct net_device *netdev,
418 struct rtnl_link_stats64 *stats)
421 struct i40e_netdev_priv *np = netdev_priv(netdev);
422 struct i40e_ring *tx_ring, *rx_ring;
423 struct i40e_vsi *vsi = np->vsi;
424 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
427 if (test_bit(__I40E_DOWN, &vsi->state))
434 for (i = 0; i < vsi->num_queue_pairs; i++) {
438 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
443 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
444 packets = tx_ring->stats.packets;
445 bytes = tx_ring->stats.bytes;
446 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
448 stats->tx_packets += packets;
449 stats->tx_bytes += bytes;
450 rx_ring = &tx_ring[1];
453 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
454 packets = rx_ring->stats.packets;
455 bytes = rx_ring->stats.bytes;
456 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
458 stats->rx_packets += packets;
459 stats->rx_bytes += bytes;
463 /* following stats updated by i40e_watchdog_subtask() */
464 stats->multicast = vsi_stats->multicast;
465 stats->tx_errors = vsi_stats->tx_errors;
466 stats->tx_dropped = vsi_stats->tx_dropped;
467 stats->rx_errors = vsi_stats->rx_errors;
468 stats->rx_dropped = vsi_stats->rx_dropped;
469 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
470 stats->rx_length_errors = vsi_stats->rx_length_errors;
476 * i40e_vsi_reset_stats - Resets all stats of the given vsi
477 * @vsi: the VSI to have its stats reset
479 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
481 struct rtnl_link_stats64 *ns;
487 ns = i40e_get_vsi_stats_struct(vsi);
488 memset(ns, 0, sizeof(*ns));
489 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
490 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
491 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
492 if (vsi->rx_rings && vsi->rx_rings[0]) {
493 for (i = 0; i < vsi->num_queue_pairs; i++) {
494 memset(&vsi->rx_rings[i]->stats, 0,
495 sizeof(vsi->rx_rings[i]->stats));
496 memset(&vsi->rx_rings[i]->rx_stats, 0,
497 sizeof(vsi->rx_rings[i]->rx_stats));
498 memset(&vsi->tx_rings[i]->stats, 0,
499 sizeof(vsi->tx_rings[i]->stats));
500 memset(&vsi->tx_rings[i]->tx_stats, 0,
501 sizeof(vsi->tx_rings[i]->tx_stats));
504 vsi->stat_offsets_loaded = false;
508 * i40e_pf_reset_stats - Reset all of the stats for the given PF
509 * @pf: the PF to be reset
511 void i40e_pf_reset_stats(struct i40e_pf *pf)
515 memset(&pf->stats, 0, sizeof(pf->stats));
516 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
517 pf->stat_offsets_loaded = false;
519 for (i = 0; i < I40E_MAX_VEB; i++) {
521 memset(&pf->veb[i]->stats, 0,
522 sizeof(pf->veb[i]->stats));
523 memset(&pf->veb[i]->stats_offsets, 0,
524 sizeof(pf->veb[i]->stats_offsets));
525 pf->veb[i]->stat_offsets_loaded = false;
528 pf->hw_csum_rx_error = 0;
532 * i40e_stat_update48 - read and update a 48 bit stat from the chip
533 * @hw: ptr to the hardware info
534 * @hireg: the high 32 bit reg to read
535 * @loreg: the low 32 bit reg to read
536 * @offset_loaded: has the initial offset been loaded yet
537 * @offset: ptr to current offset value
538 * @stat: ptr to the stat
540 * Since the device stats are not reset at PFReset, they likely will not
541 * be zeroed when the driver starts. We'll save the first values read
542 * and use them as offsets to be subtracted from the raw values in order
543 * to report stats that count from zero. In the process, we also manage
544 * the potential roll-over.
546 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
547 bool offset_loaded, u64 *offset, u64 *stat)
551 if (hw->device_id == I40E_DEV_ID_QEMU) {
552 new_data = rd32(hw, loreg);
553 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
555 new_data = rd64(hw, loreg);
559 if (likely(new_data >= *offset))
560 *stat = new_data - *offset;
562 *stat = (new_data + BIT_ULL(48)) - *offset;
563 *stat &= 0xFFFFFFFFFFFFULL;
567 * i40e_stat_update32 - read and update a 32 bit stat from the chip
568 * @hw: ptr to the hardware info
569 * @reg: the hw reg to read
570 * @offset_loaded: has the initial offset been loaded yet
571 * @offset: ptr to current offset value
572 * @stat: ptr to the stat
574 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
575 bool offset_loaded, u64 *offset, u64 *stat)
579 new_data = rd32(hw, reg);
582 if (likely(new_data >= *offset))
583 *stat = (u32)(new_data - *offset);
585 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
589 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
590 * @vsi: the VSI to be updated
592 void i40e_update_eth_stats(struct i40e_vsi *vsi)
594 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
595 struct i40e_pf *pf = vsi->back;
596 struct i40e_hw *hw = &pf->hw;
597 struct i40e_eth_stats *oes;
598 struct i40e_eth_stats *es; /* device's eth stats */
600 es = &vsi->eth_stats;
601 oes = &vsi->eth_stats_offsets;
603 /* Gather up the stats that the hw collects */
604 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
605 vsi->stat_offsets_loaded,
606 &oes->tx_errors, &es->tx_errors);
607 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
608 vsi->stat_offsets_loaded,
609 &oes->rx_discards, &es->rx_discards);
610 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
611 vsi->stat_offsets_loaded,
612 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
613 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
614 vsi->stat_offsets_loaded,
615 &oes->tx_errors, &es->tx_errors);
617 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
618 I40E_GLV_GORCL(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_bytes, &es->rx_bytes);
621 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
622 I40E_GLV_UPRCL(stat_idx),
623 vsi->stat_offsets_loaded,
624 &oes->rx_unicast, &es->rx_unicast);
625 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
626 I40E_GLV_MPRCL(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->rx_multicast, &es->rx_multicast);
629 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
630 I40E_GLV_BPRCL(stat_idx),
631 vsi->stat_offsets_loaded,
632 &oes->rx_broadcast, &es->rx_broadcast);
634 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
635 I40E_GLV_GOTCL(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->tx_bytes, &es->tx_bytes);
638 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
639 I40E_GLV_UPTCL(stat_idx),
640 vsi->stat_offsets_loaded,
641 &oes->tx_unicast, &es->tx_unicast);
642 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
643 I40E_GLV_MPTCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->tx_multicast, &es->tx_multicast);
646 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
647 I40E_GLV_BPTCL(stat_idx),
648 vsi->stat_offsets_loaded,
649 &oes->tx_broadcast, &es->tx_broadcast);
650 vsi->stat_offsets_loaded = true;
654 * i40e_update_veb_stats - Update Switch component statistics
655 * @veb: the VEB being updated
657 static void i40e_update_veb_stats(struct i40e_veb *veb)
659 struct i40e_pf *pf = veb->pf;
660 struct i40e_hw *hw = &pf->hw;
661 struct i40e_eth_stats *oes;
662 struct i40e_eth_stats *es; /* device's eth stats */
663 struct i40e_veb_tc_stats *veb_oes;
664 struct i40e_veb_tc_stats *veb_es;
667 idx = veb->stats_idx;
669 oes = &veb->stats_offsets;
670 veb_es = &veb->tc_stats;
671 veb_oes = &veb->tc_stats_offsets;
673 /* Gather up the stats that the hw collects */
674 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
675 veb->stat_offsets_loaded,
676 &oes->tx_discards, &es->tx_discards);
677 if (hw->revision_id > 0)
678 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
679 veb->stat_offsets_loaded,
680 &oes->rx_unknown_protocol,
681 &es->rx_unknown_protocol);
682 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
683 veb->stat_offsets_loaded,
684 &oes->rx_bytes, &es->rx_bytes);
685 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
686 veb->stat_offsets_loaded,
687 &oes->rx_unicast, &es->rx_unicast);
688 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
689 veb->stat_offsets_loaded,
690 &oes->rx_multicast, &es->rx_multicast);
691 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
692 veb->stat_offsets_loaded,
693 &oes->rx_broadcast, &es->rx_broadcast);
695 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->tx_bytes, &es->tx_bytes);
698 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->tx_unicast, &es->tx_unicast);
701 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
702 veb->stat_offsets_loaded,
703 &oes->tx_multicast, &es->tx_multicast);
704 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
705 veb->stat_offsets_loaded,
706 &oes->tx_broadcast, &es->tx_broadcast);
707 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
708 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
709 I40E_GLVEBTC_RPCL(i, idx),
710 veb->stat_offsets_loaded,
711 &veb_oes->tc_rx_packets[i],
712 &veb_es->tc_rx_packets[i]);
713 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
714 I40E_GLVEBTC_RBCL(i, idx),
715 veb->stat_offsets_loaded,
716 &veb_oes->tc_rx_bytes[i],
717 &veb_es->tc_rx_bytes[i]);
718 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
719 I40E_GLVEBTC_TPCL(i, idx),
720 veb->stat_offsets_loaded,
721 &veb_oes->tc_tx_packets[i],
722 &veb_es->tc_tx_packets[i]);
723 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
724 I40E_GLVEBTC_TBCL(i, idx),
725 veb->stat_offsets_loaded,
726 &veb_oes->tc_tx_bytes[i],
727 &veb_es->tc_tx_bytes[i]);
729 veb->stat_offsets_loaded = true;
734 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
735 * @vsi: the VSI that is capable of doing FCoE
737 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
739 struct i40e_pf *pf = vsi->back;
740 struct i40e_hw *hw = &pf->hw;
741 struct i40e_fcoe_stats *ofs;
742 struct i40e_fcoe_stats *fs; /* device's eth stats */
745 if (vsi->type != I40E_VSI_FCOE)
748 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET;
749 fs = &vsi->fcoe_stats;
750 ofs = &vsi->fcoe_stats_offsets;
752 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
753 vsi->fcoe_stat_offsets_loaded,
754 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
755 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
756 vsi->fcoe_stat_offsets_loaded,
757 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
758 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
759 vsi->fcoe_stat_offsets_loaded,
760 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
761 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
762 vsi->fcoe_stat_offsets_loaded,
763 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
764 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
765 vsi->fcoe_stat_offsets_loaded,
766 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
767 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
768 vsi->fcoe_stat_offsets_loaded,
769 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
770 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
771 vsi->fcoe_stat_offsets_loaded,
772 &ofs->fcoe_last_error, &fs->fcoe_last_error);
773 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
774 vsi->fcoe_stat_offsets_loaded,
775 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
777 vsi->fcoe_stat_offsets_loaded = true;
782 * i40e_update_vsi_stats - Update the vsi statistics counters.
783 * @vsi: the VSI to be updated
785 * There are a few instances where we store the same stat in a
786 * couple of different structs. This is partly because we have
787 * the netdev stats that need to be filled out, which is slightly
788 * different from the "eth_stats" defined by the chip and used in
789 * VF communications. We sort it out here.
791 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
793 struct i40e_pf *pf = vsi->back;
794 struct rtnl_link_stats64 *ons;
795 struct rtnl_link_stats64 *ns; /* netdev stats */
796 struct i40e_eth_stats *oes;
797 struct i40e_eth_stats *es; /* device's eth stats */
798 u32 tx_restart, tx_busy;
799 u64 tx_lost_interrupt;
810 if (test_bit(__I40E_DOWN, &vsi->state) ||
811 test_bit(__I40E_CONFIG_BUSY, &pf->state))
814 ns = i40e_get_vsi_stats_struct(vsi);
815 ons = &vsi->net_stats_offsets;
816 es = &vsi->eth_stats;
817 oes = &vsi->eth_stats_offsets;
819 /* Gather up the netdev and vsi stats that the driver collects
820 * on the fly during packet processing
824 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
825 tx_lost_interrupt = 0;
829 for (q = 0; q < vsi->num_queue_pairs; q++) {
831 p = ACCESS_ONCE(vsi->tx_rings[q]);
834 start = u64_stats_fetch_begin_irq(&p->syncp);
835 packets = p->stats.packets;
836 bytes = p->stats.bytes;
837 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
840 tx_restart += p->tx_stats.restart_queue;
841 tx_busy += p->tx_stats.tx_busy;
842 tx_linearize += p->tx_stats.tx_linearize;
843 tx_force_wb += p->tx_stats.tx_force_wb;
844 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt;
846 /* Rx queue is part of the same block as Tx queue */
849 start = u64_stats_fetch_begin_irq(&p->syncp);
850 packets = p->stats.packets;
851 bytes = p->stats.bytes;
852 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
855 rx_buf += p->rx_stats.alloc_buff_failed;
856 rx_page += p->rx_stats.alloc_page_failed;
859 vsi->tx_restart = tx_restart;
860 vsi->tx_busy = tx_busy;
861 vsi->tx_linearize = tx_linearize;
862 vsi->tx_force_wb = tx_force_wb;
863 vsi->tx_lost_interrupt = tx_lost_interrupt;
864 vsi->rx_page_failed = rx_page;
865 vsi->rx_buf_failed = rx_buf;
867 ns->rx_packets = rx_p;
869 ns->tx_packets = tx_p;
872 /* update netdev stats from eth stats */
873 i40e_update_eth_stats(vsi);
874 ons->tx_errors = oes->tx_errors;
875 ns->tx_errors = es->tx_errors;
876 ons->multicast = oes->rx_multicast;
877 ns->multicast = es->rx_multicast;
878 ons->rx_dropped = oes->rx_discards;
879 ns->rx_dropped = es->rx_discards;
880 ons->tx_dropped = oes->tx_discards;
881 ns->tx_dropped = es->tx_discards;
883 /* pull in a couple PF stats if this is the main vsi */
884 if (vsi == pf->vsi[pf->lan_vsi]) {
885 ns->rx_crc_errors = pf->stats.crc_errors;
886 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
887 ns->rx_length_errors = pf->stats.rx_length_errors;
892 * i40e_update_pf_stats - Update the PF statistics counters.
893 * @pf: the PF to be updated
895 static void i40e_update_pf_stats(struct i40e_pf *pf)
897 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
898 struct i40e_hw_port_stats *nsd = &pf->stats;
899 struct i40e_hw *hw = &pf->hw;
903 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
904 I40E_GLPRT_GORCL(hw->port),
905 pf->stat_offsets_loaded,
906 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
907 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
908 I40E_GLPRT_GOTCL(hw->port),
909 pf->stat_offsets_loaded,
910 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
911 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.rx_discards,
914 &nsd->eth.rx_discards);
915 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
916 I40E_GLPRT_UPRCL(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->eth.rx_unicast,
919 &nsd->eth.rx_unicast);
920 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
921 I40E_GLPRT_MPRCL(hw->port),
922 pf->stat_offsets_loaded,
923 &osd->eth.rx_multicast,
924 &nsd->eth.rx_multicast);
925 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
926 I40E_GLPRT_BPRCL(hw->port),
927 pf->stat_offsets_loaded,
928 &osd->eth.rx_broadcast,
929 &nsd->eth.rx_broadcast);
930 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
931 I40E_GLPRT_UPTCL(hw->port),
932 pf->stat_offsets_loaded,
933 &osd->eth.tx_unicast,
934 &nsd->eth.tx_unicast);
935 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
936 I40E_GLPRT_MPTCL(hw->port),
937 pf->stat_offsets_loaded,
938 &osd->eth.tx_multicast,
939 &nsd->eth.tx_multicast);
940 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
941 I40E_GLPRT_BPTCL(hw->port),
942 pf->stat_offsets_loaded,
943 &osd->eth.tx_broadcast,
944 &nsd->eth.tx_broadcast);
946 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
947 pf->stat_offsets_loaded,
948 &osd->tx_dropped_link_down,
949 &nsd->tx_dropped_link_down);
951 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
952 pf->stat_offsets_loaded,
953 &osd->crc_errors, &nsd->crc_errors);
955 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
956 pf->stat_offsets_loaded,
957 &osd->illegal_bytes, &nsd->illegal_bytes);
959 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
960 pf->stat_offsets_loaded,
961 &osd->mac_local_faults,
962 &nsd->mac_local_faults);
963 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->mac_remote_faults,
966 &nsd->mac_remote_faults);
968 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
969 pf->stat_offsets_loaded,
970 &osd->rx_length_errors,
971 &nsd->rx_length_errors);
973 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->link_xon_rx, &nsd->link_xon_rx);
976 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->link_xon_tx, &nsd->link_xon_tx);
979 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
980 pf->stat_offsets_loaded,
981 &osd->link_xoff_rx, &nsd->link_xoff_rx);
982 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->link_xoff_tx, &nsd->link_xoff_tx);
986 for (i = 0; i < 8; i++) {
987 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
988 pf->stat_offsets_loaded,
989 &osd->priority_xoff_rx[i],
990 &nsd->priority_xoff_rx[i]);
991 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
992 pf->stat_offsets_loaded,
993 &osd->priority_xon_rx[i],
994 &nsd->priority_xon_rx[i]);
995 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
996 pf->stat_offsets_loaded,
997 &osd->priority_xon_tx[i],
998 &nsd->priority_xon_tx[i]);
999 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1000 pf->stat_offsets_loaded,
1001 &osd->priority_xoff_tx[i],
1002 &nsd->priority_xoff_tx[i]);
1003 i40e_stat_update32(hw,
1004 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1005 pf->stat_offsets_loaded,
1006 &osd->priority_xon_2_xoff[i],
1007 &nsd->priority_xon_2_xoff[i]);
1010 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1011 I40E_GLPRT_PRC64L(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->rx_size_64, &nsd->rx_size_64);
1014 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1015 I40E_GLPRT_PRC127L(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->rx_size_127, &nsd->rx_size_127);
1018 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1019 I40E_GLPRT_PRC255L(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->rx_size_255, &nsd->rx_size_255);
1022 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1023 I40E_GLPRT_PRC511L(hw->port),
1024 pf->stat_offsets_loaded,
1025 &osd->rx_size_511, &nsd->rx_size_511);
1026 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1027 I40E_GLPRT_PRC1023L(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->rx_size_1023, &nsd->rx_size_1023);
1030 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1031 I40E_GLPRT_PRC1522L(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->rx_size_1522, &nsd->rx_size_1522);
1034 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1035 I40E_GLPRT_PRC9522L(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->rx_size_big, &nsd->rx_size_big);
1039 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1040 I40E_GLPRT_PTC64L(hw->port),
1041 pf->stat_offsets_loaded,
1042 &osd->tx_size_64, &nsd->tx_size_64);
1043 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1044 I40E_GLPRT_PTC127L(hw->port),
1045 pf->stat_offsets_loaded,
1046 &osd->tx_size_127, &nsd->tx_size_127);
1047 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1048 I40E_GLPRT_PTC255L(hw->port),
1049 pf->stat_offsets_loaded,
1050 &osd->tx_size_255, &nsd->tx_size_255);
1051 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1052 I40E_GLPRT_PTC511L(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->tx_size_511, &nsd->tx_size_511);
1055 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1056 I40E_GLPRT_PTC1023L(hw->port),
1057 pf->stat_offsets_loaded,
1058 &osd->tx_size_1023, &nsd->tx_size_1023);
1059 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1060 I40E_GLPRT_PTC1522L(hw->port),
1061 pf->stat_offsets_loaded,
1062 &osd->tx_size_1522, &nsd->tx_size_1522);
1063 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1064 I40E_GLPRT_PTC9522L(hw->port),
1065 pf->stat_offsets_loaded,
1066 &osd->tx_size_big, &nsd->tx_size_big);
1068 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->rx_undersize, &nsd->rx_undersize);
1071 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1072 pf->stat_offsets_loaded,
1073 &osd->rx_fragments, &nsd->rx_fragments);
1074 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_oversize, &nsd->rx_oversize);
1077 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_jabber, &nsd->rx_jabber);
1082 i40e_stat_update32(hw,
1083 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1084 pf->stat_offsets_loaded,
1085 &osd->fd_atr_match, &nsd->fd_atr_match);
1086 i40e_stat_update32(hw,
1087 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1088 pf->stat_offsets_loaded,
1089 &osd->fd_sb_match, &nsd->fd_sb_match);
1090 i40e_stat_update32(hw,
1091 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1092 pf->stat_offsets_loaded,
1093 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1095 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1096 nsd->tx_lpi_status =
1097 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1098 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1099 nsd->rx_lpi_status =
1100 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1101 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1102 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1103 pf->stat_offsets_loaded,
1104 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1105 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1106 pf->stat_offsets_loaded,
1107 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1109 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1110 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1111 nsd->fd_sb_status = true;
1113 nsd->fd_sb_status = false;
1115 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1116 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1117 nsd->fd_atr_status = true;
1119 nsd->fd_atr_status = false;
1121 pf->stat_offsets_loaded = true;
1125 * i40e_update_stats - Update the various statistics counters.
1126 * @vsi: the VSI to be updated
1128 * Update the various stats for this VSI and its related entities.
1130 void i40e_update_stats(struct i40e_vsi *vsi)
1132 struct i40e_pf *pf = vsi->back;
1134 if (vsi == pf->vsi[pf->lan_vsi])
1135 i40e_update_pf_stats(pf);
1137 i40e_update_vsi_stats(vsi);
1139 i40e_update_fcoe_stats(vsi);
1144 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1145 * @vsi: the VSI to be searched
1146 * @macaddr: the MAC address
1148 * @is_vf: make sure its a VF filter, else doesn't matter
1149 * @is_netdev: make sure its a netdev filter, else doesn't matter
1151 * Returns ptr to the filter object or NULL
1153 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1154 u8 *macaddr, s16 vlan,
1155 bool is_vf, bool is_netdev)
1157 struct i40e_mac_filter *f;
1159 if (!vsi || !macaddr)
1162 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1163 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1164 (vlan == f->vlan) &&
1165 (!is_vf || f->is_vf) &&
1166 (!is_netdev || f->is_netdev))
1173 * i40e_find_mac - Find a mac addr in the macvlan filters list
1174 * @vsi: the VSI to be searched
1175 * @macaddr: the MAC address we are searching for
1176 * @is_vf: make sure its a VF filter, else doesn't matter
1177 * @is_netdev: make sure its a netdev filter, else doesn't matter
1179 * Returns the first filter with the provided MAC address or NULL if
1180 * MAC address was not found
1182 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1183 bool is_vf, bool is_netdev)
1185 struct i40e_mac_filter *f;
1187 if (!vsi || !macaddr)
1190 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1191 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1192 (!is_vf || f->is_vf) &&
1193 (!is_netdev || f->is_netdev))
1200 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1201 * @vsi: the VSI to be searched
1203 * Returns true if VSI is in vlan mode or false otherwise
1205 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1207 struct i40e_mac_filter *f;
1209 /* Only -1 for all the filters denotes not in vlan mode
1210 * so we have to go through all the list in order to make sure
1212 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1213 if (f->vlan >= 0 || vsi->info.pvid)
1221 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1222 * @vsi: the VSI to be searched
1223 * @macaddr: the mac address to be filtered
1224 * @is_vf: true if it is a VF
1225 * @is_netdev: true if it is a netdev
1227 * Goes through all the macvlan filters and adds a
1228 * macvlan filter for each unique vlan that already exists
1230 * Returns first filter found on success, else NULL
1232 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1233 bool is_vf, bool is_netdev)
1235 struct i40e_mac_filter *f;
1237 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1239 f->vlan = le16_to_cpu(vsi->info.pvid);
1240 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1241 is_vf, is_netdev)) {
1242 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1248 return list_first_entry_or_null(&vsi->mac_filter_list,
1249 struct i40e_mac_filter, list);
1253 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1254 * @vsi: the VSI to be searched
1255 * @macaddr: the mac address to be removed
1256 * @is_vf: true if it is a VF
1257 * @is_netdev: true if it is a netdev
1259 * Removes a given MAC address from a VSI, regardless of VLAN
1261 * Returns 0 for success, or error
1263 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1264 bool is_vf, bool is_netdev)
1266 struct i40e_mac_filter *f = NULL;
1269 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1270 "Missing mac_filter_list_lock\n");
1271 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1272 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1273 (is_vf == f->is_vf) &&
1274 (is_netdev == f->is_netdev)) {
1277 if (f->counter == 0)
1278 f->state = I40E_FILTER_REMOVE;
1282 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1283 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1290 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1291 * @vsi: the PF Main VSI - inappropriate for any other VSI
1292 * @macaddr: the MAC address
1294 * Remove whatever filter the firmware set up so the driver can manage
1295 * its own filtering intelligently.
1297 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1299 struct i40e_aqc_remove_macvlan_element_data element;
1300 struct i40e_pf *pf = vsi->back;
1302 /* Only appropriate for the PF main VSI */
1303 if (vsi->type != I40E_VSI_MAIN)
1306 memset(&element, 0, sizeof(element));
1307 ether_addr_copy(element.mac_addr, macaddr);
1308 element.vlan_tag = 0;
1309 /* Ignore error returns, some firmware does it this way... */
1310 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1311 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1313 memset(&element, 0, sizeof(element));
1314 ether_addr_copy(element.mac_addr, macaddr);
1315 element.vlan_tag = 0;
1316 /* ...and some firmware does it this way. */
1317 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1318 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1319 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1323 * i40e_add_filter - Add a mac/vlan filter to the VSI
1324 * @vsi: the VSI to be searched
1325 * @macaddr: the MAC address
1327 * @is_vf: make sure its a VF filter, else doesn't matter
1328 * @is_netdev: make sure its a netdev filter, else doesn't matter
1330 * Returns ptr to the filter object or NULL when no memory available.
1332 * NOTE: This function is expected to be called with mac_filter_list_lock
1335 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1336 u8 *macaddr, s16 vlan,
1337 bool is_vf, bool is_netdev)
1339 struct i40e_mac_filter *f;
1340 int changed = false;
1342 if (!vsi || !macaddr)
1345 /* Do not allow broadcast filter to be added since broadcast filter
1346 * is added as part of add VSI for any newly created VSI except
1349 if (is_broadcast_ether_addr(macaddr))
1352 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1354 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1356 goto add_filter_out;
1358 ether_addr_copy(f->macaddr, macaddr);
1360 /* If we're in overflow promisc mode, set the state directly
1361 * to failed, so we don't bother to try sending the filter
1364 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))
1365 f->state = I40E_FILTER_FAILED;
1367 f->state = I40E_FILTER_NEW;
1369 INIT_LIST_HEAD(&f->list);
1370 list_add_tail(&f->list, &vsi->mac_filter_list);
1373 /* increment counter and add a new flag if needed */
1379 } else if (is_netdev) {
1380 if (!f->is_netdev) {
1381 f->is_netdev = true;
1389 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1390 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1398 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1399 * @vsi: the VSI to be searched
1400 * @macaddr: the MAC address
1402 * @is_vf: make sure it's a VF filter, else doesn't matter
1403 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1405 * NOTE: This function is expected to be called with mac_filter_list_lock
1407 * ANOTHER NOTE: This function MUST be called from within the context of
1408 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1409 * instead of list_for_each_entry().
1411 void i40e_del_filter(struct i40e_vsi *vsi,
1412 u8 *macaddr, s16 vlan,
1413 bool is_vf, bool is_netdev)
1415 struct i40e_mac_filter *f;
1417 if (!vsi || !macaddr)
1420 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1421 if (!f || f->counter == 0)
1429 } else if (is_netdev) {
1431 f->is_netdev = false;
1435 /* make sure we don't remove a filter in use by VF or netdev */
1438 min_f += (f->is_vf ? 1 : 0);
1439 min_f += (f->is_netdev ? 1 : 0);
1441 if (f->counter > min_f)
1445 /* counter == 0 tells sync_filters_subtask to
1446 * remove the filter from the firmware's list
1448 if (f->counter == 0) {
1449 if ((f->state == I40E_FILTER_FAILED) ||
1450 (f->state == I40E_FILTER_NEW)) {
1451 /* this one never got added by the FW. Just remove it,
1452 * no need to sync anything.
1457 f->state = I40E_FILTER_REMOVE;
1458 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1459 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1465 * i40e_set_mac - NDO callback to set mac address
1466 * @netdev: network interface device structure
1467 * @p: pointer to an address structure
1469 * Returns 0 on success, negative on failure
1472 int i40e_set_mac(struct net_device *netdev, void *p)
1474 static int i40e_set_mac(struct net_device *netdev, void *p)
1477 struct i40e_netdev_priv *np = netdev_priv(netdev);
1478 struct i40e_vsi *vsi = np->vsi;
1479 struct i40e_pf *pf = vsi->back;
1480 struct i40e_hw *hw = &pf->hw;
1481 struct sockaddr *addr = p;
1483 if (!is_valid_ether_addr(addr->sa_data))
1484 return -EADDRNOTAVAIL;
1486 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1487 netdev_info(netdev, "already using mac address %pM\n",
1492 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1493 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1494 return -EADDRNOTAVAIL;
1496 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1497 netdev_info(netdev, "returning to hw mac address %pM\n",
1500 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1502 spin_lock_bh(&vsi->mac_filter_list_lock);
1503 i40e_del_mac_all_vlan(vsi, netdev->dev_addr, false, true);
1504 i40e_put_mac_in_vlan(vsi, addr->sa_data, false, true);
1505 spin_unlock_bh(&vsi->mac_filter_list_lock);
1506 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1507 if (vsi->type == I40E_VSI_MAIN) {
1510 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1511 I40E_AQC_WRITE_TYPE_LAA_WOL,
1512 addr->sa_data, NULL);
1514 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1515 i40e_stat_str(hw, ret),
1516 i40e_aq_str(hw, hw->aq.asq_last_status));
1519 /* schedule our worker thread which will take care of
1520 * applying the new filter changes
1522 i40e_service_event_schedule(vsi->back);
1527 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1528 * @vsi: the VSI being setup
1529 * @ctxt: VSI context structure
1530 * @enabled_tc: Enabled TCs bitmap
1531 * @is_add: True if called before Add VSI
1533 * Setup VSI queue mapping for enabled traffic classes.
1536 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1537 struct i40e_vsi_context *ctxt,
1541 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1542 struct i40e_vsi_context *ctxt,
1547 struct i40e_pf *pf = vsi->back;
1557 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1560 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1561 /* Find numtc from enabled TC bitmap */
1562 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1563 if (enabled_tc & BIT(i)) /* TC is enabled */
1567 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1571 /* At least TC0 is enabled in case of non-DCB case */
1575 vsi->tc_config.numtc = numtc;
1576 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1577 /* Number of queues per enabled TC */
1578 qcount = vsi->alloc_queue_pairs;
1580 num_tc_qps = qcount / numtc;
1581 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1583 /* Setup queue offset/count for all TCs for given VSI */
1584 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1585 /* See if the given TC is enabled for the given VSI */
1586 if (vsi->tc_config.enabled_tc & BIT(i)) {
1590 switch (vsi->type) {
1592 qcount = min_t(int, pf->alloc_rss_size,
1597 qcount = num_tc_qps;
1601 case I40E_VSI_SRIOV:
1602 case I40E_VSI_VMDQ2:
1604 qcount = num_tc_qps;
1608 vsi->tc_config.tc_info[i].qoffset = offset;
1609 vsi->tc_config.tc_info[i].qcount = qcount;
1611 /* find the next higher power-of-2 of num queue pairs */
1614 while (num_qps && (BIT_ULL(pow) < qcount)) {
1619 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1621 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1622 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1626 /* TC is not enabled so set the offset to
1627 * default queue and allocate one queue
1630 vsi->tc_config.tc_info[i].qoffset = 0;
1631 vsi->tc_config.tc_info[i].qcount = 1;
1632 vsi->tc_config.tc_info[i].netdev_tc = 0;
1636 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1639 /* Set actual Tx/Rx queue pairs */
1640 vsi->num_queue_pairs = offset;
1641 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1642 if (vsi->req_queue_pairs > 0)
1643 vsi->num_queue_pairs = vsi->req_queue_pairs;
1644 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1645 vsi->num_queue_pairs = pf->num_lan_msix;
1648 /* Scheduler section valid can only be set for ADD VSI */
1650 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1652 ctxt->info.up_enable_bits = enabled_tc;
1654 if (vsi->type == I40E_VSI_SRIOV) {
1655 ctxt->info.mapping_flags |=
1656 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1657 for (i = 0; i < vsi->num_queue_pairs; i++)
1658 ctxt->info.queue_mapping[i] =
1659 cpu_to_le16(vsi->base_queue + i);
1661 ctxt->info.mapping_flags |=
1662 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1663 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1665 ctxt->info.valid_sections |= cpu_to_le16(sections);
1669 * i40e_set_rx_mode - NDO callback to set the netdev filters
1670 * @netdev: network interface device structure
1673 void i40e_set_rx_mode(struct net_device *netdev)
1675 static void i40e_set_rx_mode(struct net_device *netdev)
1678 struct i40e_netdev_priv *np = netdev_priv(netdev);
1679 struct i40e_mac_filter *f, *ftmp;
1680 struct i40e_vsi *vsi = np->vsi;
1681 struct netdev_hw_addr *uca;
1682 struct netdev_hw_addr *mca;
1683 struct netdev_hw_addr *ha;
1685 spin_lock_bh(&vsi->mac_filter_list_lock);
1687 /* add addr if not already in the filter list */
1688 netdev_for_each_uc_addr(uca, netdev) {
1689 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1690 if (i40e_is_vsi_in_vlan(vsi))
1691 i40e_put_mac_in_vlan(vsi, uca->addr,
1694 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1699 netdev_for_each_mc_addr(mca, netdev) {
1700 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1701 if (i40e_is_vsi_in_vlan(vsi))
1702 i40e_put_mac_in_vlan(vsi, mca->addr,
1705 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1710 /* remove filter if not in netdev list */
1711 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1716 netdev_for_each_mc_addr(mca, netdev)
1717 if (ether_addr_equal(mca->addr, f->macaddr))
1718 goto bottom_of_search_loop;
1720 netdev_for_each_uc_addr(uca, netdev)
1721 if (ether_addr_equal(uca->addr, f->macaddr))
1722 goto bottom_of_search_loop;
1724 for_each_dev_addr(netdev, ha)
1725 if (ether_addr_equal(ha->addr, f->macaddr))
1726 goto bottom_of_search_loop;
1728 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1729 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1731 bottom_of_search_loop:
1734 spin_unlock_bh(&vsi->mac_filter_list_lock);
1736 /* check for other flag changes */
1737 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1738 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1739 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1742 /* schedule our worker thread which will take care of
1743 * applying the new filter changes
1745 i40e_service_event_schedule(vsi->back);
1749 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1750 * @vsi: pointer to vsi struct
1751 * @from: Pointer to list which contains MAC filter entries - changes to
1752 * those entries needs to be undone.
1754 * MAC filter entries from list were slated to be removed from device.
1756 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1757 struct list_head *from)
1759 struct i40e_mac_filter *f, *ftmp;
1761 list_for_each_entry_safe(f, ftmp, from, list) {
1762 /* Move the element back into MAC filter list*/
1763 list_move_tail(&f->list, &vsi->mac_filter_list);
1768 * i40e_update_filter_state - Update filter state based on return data
1770 * @count: Number of filters added
1771 * @add_list: return data from fw
1772 * @head: pointer to first filter in current batch
1773 * @aq_err: status from fw
1775 * MAC filter entries from list were slated to be added to device. Returns
1776 * number of successful filters. Note that 0 does NOT mean success!
1779 i40e_update_filter_state(int count,
1780 struct i40e_aqc_add_macvlan_element_data *add_list,
1781 struct i40e_mac_filter *add_head, int aq_err)
1789 /* Everything's good, mark all filters active. */
1790 for (i = 0; i < count ; i++) {
1791 add_head->state = I40E_FILTER_ACTIVE;
1792 add_head = list_next_entry(add_head, list);
1794 } else if (aq_err == I40E_AQ_RC_ENOSPC) {
1795 /* Device ran out of filter space. Check the return value
1796 * for each filter to see which ones are active.
1798 for (i = 0; i < count ; i++) {
1799 if (add_list[i].match_method ==
1800 I40E_AQC_MM_ERR_NO_RES) {
1801 add_head->state = I40E_FILTER_FAILED;
1803 add_head->state = I40E_FILTER_ACTIVE;
1806 add_head = list_next_entry(add_head, list);
1809 /* Some other horrible thing happened, fail all filters */
1811 for (i = 0; i < count ; i++) {
1812 add_head->state = I40E_FILTER_FAILED;
1813 add_head = list_next_entry(add_head, list);
1820 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1821 * @vsi: ptr to the VSI
1823 * Push any outstanding VSI filter changes through the AdminQ.
1825 * Returns 0 or error value
1827 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1829 struct i40e_mac_filter *f, *ftmp, *add_head = NULL;
1830 struct list_head tmp_add_list, tmp_del_list;
1831 struct i40e_hw *hw = &vsi->back->hw;
1832 bool promisc_changed = false;
1833 char vsi_name[16] = "PF";
1834 int filter_list_len = 0;
1835 u32 changed_flags = 0;
1836 i40e_status aq_ret = 0;
1846 /* empty array typed pointers, kcalloc later */
1847 struct i40e_aqc_add_macvlan_element_data *add_list;
1848 struct i40e_aqc_remove_macvlan_element_data *del_list;
1850 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1851 usleep_range(1000, 2000);
1855 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1856 vsi->current_netdev_flags = vsi->netdev->flags;
1859 INIT_LIST_HEAD(&tmp_add_list);
1860 INIT_LIST_HEAD(&tmp_del_list);
1862 if (vsi->type == I40E_VSI_SRIOV)
1863 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
1864 else if (vsi->type != I40E_VSI_MAIN)
1865 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
1867 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1868 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1870 spin_lock_bh(&vsi->mac_filter_list_lock);
1871 /* Create a list of filters to delete. */
1872 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1873 if (f->state == I40E_FILTER_REMOVE) {
1874 WARN_ON(f->counter != 0);
1875 /* Move the element into temporary del_list */
1876 list_move_tail(&f->list, &tmp_del_list);
1877 vsi->active_filters--;
1879 if (f->state == I40E_FILTER_NEW) {
1880 WARN_ON(f->counter == 0);
1881 /* Move the element into temporary add_list */
1882 list_move_tail(&f->list, &tmp_add_list);
1885 spin_unlock_bh(&vsi->mac_filter_list_lock);
1888 /* Now process 'del_list' outside the lock */
1889 if (!list_empty(&tmp_del_list)) {
1890 filter_list_len = hw->aq.asq_buf_size /
1891 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1892 list_size = filter_list_len *
1893 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1894 del_list = kzalloc(list_size, GFP_ATOMIC);
1896 /* Undo VSI's MAC filter entry element updates */
1897 spin_lock_bh(&vsi->mac_filter_list_lock);
1898 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1899 spin_unlock_bh(&vsi->mac_filter_list_lock);
1904 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1907 /* add to delete list */
1908 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1909 if (f->vlan == I40E_VLAN_ANY) {
1910 del_list[num_del].vlan_tag = 0;
1911 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1913 del_list[num_del].vlan_tag =
1914 cpu_to_le16((u16)(f->vlan));
1917 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1918 del_list[num_del].flags = cmd_flags;
1921 /* flush a full buffer */
1922 if (num_del == filter_list_len) {
1923 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid,
1926 aq_err = hw->aq.asq_last_status;
1928 memset(del_list, 0, list_size);
1930 /* Explicitly ignore and do not report when
1931 * firmware returns ENOENT.
1933 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1935 dev_info(&pf->pdev->dev,
1936 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
1938 i40e_stat_str(hw, aq_ret),
1939 i40e_aq_str(hw, aq_err));
1942 /* Release memory for MAC filter entries which were
1943 * synced up with HW.
1950 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, del_list,
1952 aq_err = hw->aq.asq_last_status;
1955 /* Explicitly ignore and do not report when firmware
1958 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1960 dev_info(&pf->pdev->dev,
1961 "ignoring delete macvlan error on %s, err %s aq_err %s\n",
1963 i40e_stat_str(hw, aq_ret),
1964 i40e_aq_str(hw, aq_err));
1972 if (!list_empty(&tmp_add_list)) {
1973 /* Do all the adds now. */
1974 filter_list_len = hw->aq.asq_buf_size /
1975 sizeof(struct i40e_aqc_add_macvlan_element_data);
1976 list_size = filter_list_len *
1977 sizeof(struct i40e_aqc_add_macvlan_element_data);
1978 add_list = kzalloc(list_size, GFP_ATOMIC);
1984 list_for_each_entry(f, &tmp_add_list, list) {
1985 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1987 f->state = I40E_FILTER_FAILED;
1990 /* add to add array */
1994 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1995 if (f->vlan == I40E_VLAN_ANY) {
1996 add_list[num_add].vlan_tag = 0;
1997 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
1999 add_list[num_add].vlan_tag =
2000 cpu_to_le16((u16)(f->vlan));
2002 add_list[num_add].queue_number = 0;
2003 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2004 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2007 /* flush a full buffer */
2008 if (num_add == filter_list_len) {
2009 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2012 aq_err = hw->aq.asq_last_status;
2013 fcnt = i40e_update_filter_state(num_add,
2017 vsi->active_filters += fcnt;
2019 if (fcnt != num_add) {
2020 promisc_changed = true;
2021 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2023 vsi->promisc_threshold =
2024 (vsi->active_filters * 3) / 4;
2025 dev_warn(&pf->pdev->dev,
2026 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2027 i40e_aq_str(hw, aq_err),
2030 memset(add_list, 0, list_size);
2035 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2036 add_list, num_add, NULL);
2037 aq_err = hw->aq.asq_last_status;
2038 fcnt = i40e_update_filter_state(num_add, add_list,
2040 vsi->active_filters += fcnt;
2041 if (fcnt != num_add) {
2042 promisc_changed = true;
2043 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2045 vsi->promisc_threshold =
2046 (vsi->active_filters * 3) / 4;
2047 dev_warn(&pf->pdev->dev,
2048 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2049 i40e_aq_str(hw, aq_err), vsi_name);
2052 /* Now move all of the filters from the temp add list back to
2055 spin_lock_bh(&vsi->mac_filter_list_lock);
2056 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2057 list_move_tail(&f->list, &vsi->mac_filter_list);
2059 spin_unlock_bh(&vsi->mac_filter_list_lock);
2064 /* Check to see if we can drop out of overflow promiscuous mode. */
2065 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state) &&
2066 (vsi->active_filters < vsi->promisc_threshold)) {
2067 int failed_count = 0;
2068 /* See if we have any failed filters. We can't drop out of
2069 * promiscuous until these have all been deleted.
2071 spin_lock_bh(&vsi->mac_filter_list_lock);
2072 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2073 if (f->state == I40E_FILTER_FAILED)
2076 spin_unlock_bh(&vsi->mac_filter_list_lock);
2077 if (!failed_count) {
2078 dev_info(&pf->pdev->dev,
2079 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2081 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2082 promisc_changed = true;
2083 vsi->promisc_threshold = 0;
2087 /* if the VF is not trusted do not do promisc */
2088 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2089 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2093 /* check for changes in promiscuous modes */
2094 if (changed_flags & IFF_ALLMULTI) {
2095 bool cur_multipromisc;
2097 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2098 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2103 retval = i40e_aq_rc_to_posix(aq_ret,
2104 hw->aq.asq_last_status);
2105 dev_info(&pf->pdev->dev,
2106 "set multi promisc failed on %s, err %s aq_err %s\n",
2108 i40e_stat_str(hw, aq_ret),
2109 i40e_aq_str(hw, hw->aq.asq_last_status));
2112 if ((changed_flags & IFF_PROMISC) ||
2114 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))) {
2117 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2118 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2120 if ((vsi->type == I40E_VSI_MAIN) &&
2121 (pf->lan_veb != I40E_NO_VEB) &&
2122 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2123 /* set defport ON for Main VSI instead of true promisc
2124 * this way we will get all unicast/multicast and VLAN
2125 * promisc behavior but will not get VF or VMDq traffic
2126 * replicated on the Main VSI.
2128 if (pf->cur_promisc != cur_promisc) {
2129 pf->cur_promisc = cur_promisc;
2132 i40e_aq_set_default_vsi(hw,
2137 i40e_aq_clear_default_vsi(hw,
2141 retval = i40e_aq_rc_to_posix(aq_ret,
2142 hw->aq.asq_last_status);
2143 dev_info(&pf->pdev->dev,
2144 "Set default VSI failed on %s, err %s, aq_err %s\n",
2146 i40e_stat_str(hw, aq_ret),
2148 hw->aq.asq_last_status));
2152 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2159 i40e_aq_rc_to_posix(aq_ret,
2160 hw->aq.asq_last_status);
2161 dev_info(&pf->pdev->dev,
2162 "set unicast promisc failed on %s, err %s, aq_err %s\n",
2164 i40e_stat_str(hw, aq_ret),
2166 hw->aq.asq_last_status));
2168 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2174 i40e_aq_rc_to_posix(aq_ret,
2175 hw->aq.asq_last_status);
2176 dev_info(&pf->pdev->dev,
2177 "set multicast promisc failed on %s, err %s, aq_err %s\n",
2179 i40e_stat_str(hw, aq_ret),
2181 hw->aq.asq_last_status));
2184 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2188 retval = i40e_aq_rc_to_posix(aq_ret,
2189 pf->hw.aq.asq_last_status);
2190 dev_info(&pf->pdev->dev,
2191 "set brdcast promisc failed, err %s, aq_err %s\n",
2192 i40e_stat_str(hw, aq_ret),
2194 hw->aq.asq_last_status));
2198 /* if something went wrong then set the changed flag so we try again */
2200 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2202 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2207 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2208 * @pf: board private structure
2210 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2214 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2216 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2218 for (v = 0; v < pf->num_alloc_vsi; v++) {
2220 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2221 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2224 /* come back and try again later */
2225 pf->flags |= I40E_FLAG_FILTER_SYNC;
2233 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2234 * @netdev: network interface device structure
2235 * @new_mtu: new value for maximum frame size
2237 * Returns 0 on success, negative on failure
2239 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2241 struct i40e_netdev_priv *np = netdev_priv(netdev);
2242 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2243 struct i40e_vsi *vsi = np->vsi;
2245 /* MTU < 68 is an error and causes problems on some kernels */
2246 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2249 netdev_info(netdev, "changing MTU from %d to %d\n",
2250 netdev->mtu, new_mtu);
2251 netdev->mtu = new_mtu;
2252 if (netif_running(netdev))
2253 i40e_vsi_reinit_locked(vsi);
2254 i40e_notify_client_of_l2_param_changes(vsi);
2259 * i40e_ioctl - Access the hwtstamp interface
2260 * @netdev: network interface device structure
2261 * @ifr: interface request data
2262 * @cmd: ioctl command
2264 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2266 struct i40e_netdev_priv *np = netdev_priv(netdev);
2267 struct i40e_pf *pf = np->vsi->back;
2271 return i40e_ptp_get_ts_config(pf, ifr);
2273 return i40e_ptp_set_ts_config(pf, ifr);
2280 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2281 * @vsi: the vsi being adjusted
2283 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2285 struct i40e_vsi_context ctxt;
2288 /* Don't modify stripping options if a port VLAN is active */
2292 if ((vsi->info.valid_sections &
2293 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2294 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2295 return; /* already enabled */
2297 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2298 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2299 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2301 ctxt.seid = vsi->seid;
2302 ctxt.info = vsi->info;
2303 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2305 dev_info(&vsi->back->pdev->dev,
2306 "update vlan stripping failed, err %s aq_err %s\n",
2307 i40e_stat_str(&vsi->back->hw, ret),
2308 i40e_aq_str(&vsi->back->hw,
2309 vsi->back->hw.aq.asq_last_status));
2314 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2315 * @vsi: the vsi being adjusted
2317 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2319 struct i40e_vsi_context ctxt;
2322 /* Don't modify stripping options if a port VLAN is active */
2326 if ((vsi->info.valid_sections &
2327 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2328 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2329 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2330 return; /* already disabled */
2332 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2333 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2334 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2336 ctxt.seid = vsi->seid;
2337 ctxt.info = vsi->info;
2338 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2340 dev_info(&vsi->back->pdev->dev,
2341 "update vlan stripping failed, err %s aq_err %s\n",
2342 i40e_stat_str(&vsi->back->hw, ret),
2343 i40e_aq_str(&vsi->back->hw,
2344 vsi->back->hw.aq.asq_last_status));
2349 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2350 * @netdev: network interface to be adjusted
2351 * @features: netdev features to test if VLAN offload is enabled or not
2353 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2355 struct i40e_netdev_priv *np = netdev_priv(netdev);
2356 struct i40e_vsi *vsi = np->vsi;
2358 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2359 i40e_vlan_stripping_enable(vsi);
2361 i40e_vlan_stripping_disable(vsi);
2365 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2366 * @vsi: the vsi being configured
2367 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2369 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2371 struct i40e_mac_filter *f, *ftmp, *add_f;
2372 bool is_netdev, is_vf;
2374 is_vf = (vsi->type == I40E_VSI_SRIOV);
2375 is_netdev = !!(vsi->netdev);
2377 /* Locked once because all functions invoked below iterates list*/
2378 spin_lock_bh(&vsi->mac_filter_list_lock);
2381 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2384 dev_info(&vsi->back->pdev->dev,
2385 "Could not add vlan filter %d for %pM\n",
2386 vid, vsi->netdev->dev_addr);
2387 spin_unlock_bh(&vsi->mac_filter_list_lock);
2392 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2393 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2395 dev_info(&vsi->back->pdev->dev,
2396 "Could not add vlan filter %d for %pM\n",
2398 spin_unlock_bh(&vsi->mac_filter_list_lock);
2403 /* Now if we add a vlan tag, make sure to check if it is the first
2404 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2405 * with 0, so we now accept untagged and specified tagged traffic
2406 * (and not all tags along with untagged)
2409 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2411 is_vf, is_netdev)) {
2412 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2413 I40E_VLAN_ANY, is_vf, is_netdev);
2414 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2417 dev_info(&vsi->back->pdev->dev,
2418 "Could not add filter 0 for %pM\n",
2419 vsi->netdev->dev_addr);
2420 spin_unlock_bh(&vsi->mac_filter_list_lock);
2426 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2427 if (vid > 0 && !vsi->info.pvid) {
2428 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2429 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2432 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2434 add_f = i40e_add_filter(vsi, f->macaddr,
2435 0, is_vf, is_netdev);
2437 dev_info(&vsi->back->pdev->dev,
2438 "Could not add filter 0 for %pM\n",
2440 spin_unlock_bh(&vsi->mac_filter_list_lock);
2446 spin_unlock_bh(&vsi->mac_filter_list_lock);
2448 /* schedule our worker thread which will take care of
2449 * applying the new filter changes
2451 i40e_service_event_schedule(vsi->back);
2456 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2457 * @vsi: the vsi being configured
2458 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2460 * Return: 0 on success or negative otherwise
2462 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2464 struct net_device *netdev = vsi->netdev;
2465 struct i40e_mac_filter *f, *ftmp, *add_f;
2466 bool is_vf, is_netdev;
2467 int filter_count = 0;
2469 is_vf = (vsi->type == I40E_VSI_SRIOV);
2470 is_netdev = !!(netdev);
2472 /* Locked once because all functions invoked below iterates list */
2473 spin_lock_bh(&vsi->mac_filter_list_lock);
2476 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2478 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
2479 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2481 /* go through all the filters for this VSI and if there is only
2482 * vid == 0 it means there are no other filters, so vid 0 must
2483 * be replaced with -1. This signifies that we should from now
2484 * on accept any traffic (with any tag present, or untagged)
2486 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2489 ether_addr_equal(netdev->dev_addr, f->macaddr))
2497 if (!filter_count && is_netdev) {
2498 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2499 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2502 dev_info(&vsi->back->pdev->dev,
2503 "Could not add filter %d for %pM\n",
2504 I40E_VLAN_ANY, netdev->dev_addr);
2505 spin_unlock_bh(&vsi->mac_filter_list_lock);
2510 if (!filter_count) {
2511 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2512 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2513 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2516 dev_info(&vsi->back->pdev->dev,
2517 "Could not add filter %d for %pM\n",
2518 I40E_VLAN_ANY, f->macaddr);
2519 spin_unlock_bh(&vsi->mac_filter_list_lock);
2525 spin_unlock_bh(&vsi->mac_filter_list_lock);
2527 /* schedule our worker thread which will take care of
2528 * applying the new filter changes
2530 i40e_service_event_schedule(vsi->back);
2535 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2536 * @netdev: network interface to be adjusted
2537 * @vid: vlan id to be added
2539 * net_device_ops implementation for adding vlan ids
2542 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2543 __always_unused __be16 proto, u16 vid)
2545 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2546 __always_unused __be16 proto, u16 vid)
2549 struct i40e_netdev_priv *np = netdev_priv(netdev);
2550 struct i40e_vsi *vsi = np->vsi;
2556 /* If the network stack called us with vid = 0 then
2557 * it is asking to receive priority tagged packets with
2558 * vlan id 0. Our HW receives them by default when configured
2559 * to receive untagged packets so there is no need to add an
2560 * extra filter for vlan 0 tagged packets.
2563 ret = i40e_vsi_add_vlan(vsi, vid);
2565 if (!ret && (vid < VLAN_N_VID))
2566 set_bit(vid, vsi->active_vlans);
2572 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2573 * @netdev: network interface to be adjusted
2574 * @vid: vlan id to be removed
2576 * net_device_ops implementation for removing vlan ids
2579 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2580 __always_unused __be16 proto, u16 vid)
2582 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2583 __always_unused __be16 proto, u16 vid)
2586 struct i40e_netdev_priv *np = netdev_priv(netdev);
2587 struct i40e_vsi *vsi = np->vsi;
2589 /* return code is ignored as there is nothing a user
2590 * can do about failure to remove and a log message was
2591 * already printed from the other function
2593 i40e_vsi_kill_vlan(vsi, vid);
2595 clear_bit(vid, vsi->active_vlans);
2601 * i40e_macaddr_init - explicitly write the mac address filters
2603 * @vsi: pointer to the vsi
2604 * @macaddr: the MAC address
2606 * This is needed when the macaddr has been obtained by other
2607 * means than the default, e.g., from Open Firmware or IDPROM.
2608 * Returns 0 on success, negative on failure
2610 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
2613 struct i40e_aqc_add_macvlan_element_data element;
2615 ret = i40e_aq_mac_address_write(&vsi->back->hw,
2616 I40E_AQC_WRITE_TYPE_LAA_WOL,
2619 dev_info(&vsi->back->pdev->dev,
2620 "Addr change for VSI failed: %d\n", ret);
2621 return -EADDRNOTAVAIL;
2624 memset(&element, 0, sizeof(element));
2625 ether_addr_copy(element.mac_addr, macaddr);
2626 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
2627 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
2629 dev_info(&vsi->back->pdev->dev,
2630 "add filter failed err %s aq_err %s\n",
2631 i40e_stat_str(&vsi->back->hw, ret),
2632 i40e_aq_str(&vsi->back->hw,
2633 vsi->back->hw.aq.asq_last_status));
2639 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2640 * @vsi: the vsi being brought back up
2642 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2649 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2651 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2652 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2657 * i40e_vsi_add_pvid - Add pvid for the VSI
2658 * @vsi: the vsi being adjusted
2659 * @vid: the vlan id to set as a PVID
2661 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2663 struct i40e_vsi_context ctxt;
2666 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2667 vsi->info.pvid = cpu_to_le16(vid);
2668 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2669 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2670 I40E_AQ_VSI_PVLAN_EMOD_STR;
2672 ctxt.seid = vsi->seid;
2673 ctxt.info = vsi->info;
2674 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2676 dev_info(&vsi->back->pdev->dev,
2677 "add pvid failed, err %s aq_err %s\n",
2678 i40e_stat_str(&vsi->back->hw, ret),
2679 i40e_aq_str(&vsi->back->hw,
2680 vsi->back->hw.aq.asq_last_status));
2688 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2689 * @vsi: the vsi being adjusted
2691 * Just use the vlan_rx_register() service to put it back to normal
2693 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2695 i40e_vlan_stripping_disable(vsi);
2701 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2702 * @vsi: ptr to the VSI
2704 * If this function returns with an error, then it's possible one or
2705 * more of the rings is populated (while the rest are not). It is the
2706 * callers duty to clean those orphaned rings.
2708 * Return 0 on success, negative on failure
2710 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2714 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2715 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2721 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2722 * @vsi: ptr to the VSI
2724 * Free VSI's transmit software resources
2726 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2733 for (i = 0; i < vsi->num_queue_pairs; i++)
2734 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2735 i40e_free_tx_resources(vsi->tx_rings[i]);
2739 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2740 * @vsi: ptr to the VSI
2742 * If this function returns with an error, then it's possible one or
2743 * more of the rings is populated (while the rest are not). It is the
2744 * callers duty to clean those orphaned rings.
2746 * Return 0 on success, negative on failure
2748 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2752 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2753 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2755 i40e_fcoe_setup_ddp_resources(vsi);
2761 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2762 * @vsi: ptr to the VSI
2764 * Free all receive software resources
2766 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2773 for (i = 0; i < vsi->num_queue_pairs; i++)
2774 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2775 i40e_free_rx_resources(vsi->rx_rings[i]);
2777 i40e_fcoe_free_ddp_resources(vsi);
2782 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2783 * @ring: The Tx ring to configure
2785 * This enables/disables XPS for a given Tx descriptor ring
2786 * based on the TCs enabled for the VSI that ring belongs to.
2788 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2790 struct i40e_vsi *vsi = ring->vsi;
2793 if (!ring->q_vector || !ring->netdev)
2796 /* Single TC mode enable XPS */
2797 if (vsi->tc_config.numtc <= 1) {
2798 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2799 netif_set_xps_queue(ring->netdev,
2800 &ring->q_vector->affinity_mask,
2802 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2803 /* Disable XPS to allow selection based on TC */
2804 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2805 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2806 free_cpumask_var(mask);
2809 /* schedule our worker thread which will take care of
2810 * applying the new filter changes
2812 i40e_service_event_schedule(vsi->back);
2816 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2817 * @ring: The Tx ring to configure
2819 * Configure the Tx descriptor ring in the HMC context.
2821 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2823 struct i40e_vsi *vsi = ring->vsi;
2824 u16 pf_q = vsi->base_queue + ring->queue_index;
2825 struct i40e_hw *hw = &vsi->back->hw;
2826 struct i40e_hmc_obj_txq tx_ctx;
2827 i40e_status err = 0;
2830 /* some ATR related tx ring init */
2831 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2832 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2833 ring->atr_count = 0;
2835 ring->atr_sample_rate = 0;
2839 i40e_config_xps_tx_ring(ring);
2841 /* clear the context structure first */
2842 memset(&tx_ctx, 0, sizeof(tx_ctx));
2844 tx_ctx.new_context = 1;
2845 tx_ctx.base = (ring->dma / 128);
2846 tx_ctx.qlen = ring->count;
2847 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2848 I40E_FLAG_FD_ATR_ENABLED));
2850 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2852 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2853 /* FDIR VSI tx ring can still use RS bit and writebacks */
2854 if (vsi->type != I40E_VSI_FDIR)
2855 tx_ctx.head_wb_ena = 1;
2856 tx_ctx.head_wb_addr = ring->dma +
2857 (ring->count * sizeof(struct i40e_tx_desc));
2859 /* As part of VSI creation/update, FW allocates certain
2860 * Tx arbitration queue sets for each TC enabled for
2861 * the VSI. The FW returns the handles to these queue
2862 * sets as part of the response buffer to Add VSI,
2863 * Update VSI, etc. AQ commands. It is expected that
2864 * these queue set handles be associated with the Tx
2865 * queues by the driver as part of the TX queue context
2866 * initialization. This has to be done regardless of
2867 * DCB as by default everything is mapped to TC0.
2869 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2870 tx_ctx.rdylist_act = 0;
2872 /* clear the context in the HMC */
2873 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2875 dev_info(&vsi->back->pdev->dev,
2876 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2877 ring->queue_index, pf_q, err);
2881 /* set the context in the HMC */
2882 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2884 dev_info(&vsi->back->pdev->dev,
2885 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2886 ring->queue_index, pf_q, err);
2890 /* Now associate this queue with this PCI function */
2891 if (vsi->type == I40E_VSI_VMDQ2) {
2892 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2893 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2894 I40E_QTX_CTL_VFVM_INDX_MASK;
2896 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2899 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2900 I40E_QTX_CTL_PF_INDX_MASK);
2901 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2904 /* cache tail off for easier writes later */
2905 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2911 * i40e_configure_rx_ring - Configure a receive ring context
2912 * @ring: The Rx ring to configure
2914 * Configure the Rx descriptor ring in the HMC context.
2916 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2918 struct i40e_vsi *vsi = ring->vsi;
2919 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2920 u16 pf_q = vsi->base_queue + ring->queue_index;
2921 struct i40e_hw *hw = &vsi->back->hw;
2922 struct i40e_hmc_obj_rxq rx_ctx;
2923 i40e_status err = 0;
2927 /* clear the context structure first */
2928 memset(&rx_ctx, 0, sizeof(rx_ctx));
2930 ring->rx_buf_len = vsi->rx_buf_len;
2932 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2934 rx_ctx.base = (ring->dma / 128);
2935 rx_ctx.qlen = ring->count;
2937 /* use 32 byte descriptors */
2940 /* descriptor type is always zero
2943 rx_ctx.hsplit_0 = 0;
2945 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
2946 if (hw->revision_id == 0)
2947 rx_ctx.lrxqthresh = 0;
2949 rx_ctx.lrxqthresh = 2;
2950 rx_ctx.crcstrip = 1;
2952 /* this controls whether VLAN is stripped from inner headers */
2955 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2957 /* set the prefena field to 1 because the manual says to */
2960 /* clear the context in the HMC */
2961 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2963 dev_info(&vsi->back->pdev->dev,
2964 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2965 ring->queue_index, pf_q, err);
2969 /* set the context in the HMC */
2970 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2972 dev_info(&vsi->back->pdev->dev,
2973 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2974 ring->queue_index, pf_q, err);
2978 /* cache tail for quicker writes, and clear the reg before use */
2979 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2980 writel(0, ring->tail);
2982 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2988 * i40e_vsi_configure_tx - Configure the VSI for Tx
2989 * @vsi: VSI structure describing this set of rings and resources
2991 * Configure the Tx VSI for operation.
2993 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2998 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2999 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3005 * i40e_vsi_configure_rx - Configure the VSI for Rx
3006 * @vsi: the VSI being configured
3008 * Configure the Rx VSI for operation.
3010 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3015 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
3016 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
3017 + ETH_FCS_LEN + VLAN_HLEN;
3019 vsi->max_frame = I40E_RXBUFFER_2048;
3021 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3024 /* setup rx buffer for FCoE */
3025 if ((vsi->type == I40E_VSI_FCOE) &&
3026 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
3027 vsi->rx_buf_len = I40E_RXBUFFER_3072;
3028 vsi->max_frame = I40E_RXBUFFER_3072;
3031 #endif /* I40E_FCOE */
3032 /* round up for the chip's needs */
3033 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
3034 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3036 /* set up individual rings */
3037 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3038 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3044 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3045 * @vsi: ptr to the VSI
3047 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3049 struct i40e_ring *tx_ring, *rx_ring;
3050 u16 qoffset, qcount;
3053 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3054 /* Reset the TC information */
3055 for (i = 0; i < vsi->num_queue_pairs; i++) {
3056 rx_ring = vsi->rx_rings[i];
3057 tx_ring = vsi->tx_rings[i];
3058 rx_ring->dcb_tc = 0;
3059 tx_ring->dcb_tc = 0;
3063 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3064 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3067 qoffset = vsi->tc_config.tc_info[n].qoffset;
3068 qcount = vsi->tc_config.tc_info[n].qcount;
3069 for (i = qoffset; i < (qoffset + qcount); i++) {
3070 rx_ring = vsi->rx_rings[i];
3071 tx_ring = vsi->tx_rings[i];
3072 rx_ring->dcb_tc = n;
3073 tx_ring->dcb_tc = n;
3079 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3080 * @vsi: ptr to the VSI
3082 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3084 struct i40e_pf *pf = vsi->back;
3088 i40e_set_rx_mode(vsi->netdev);
3090 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
3091 err = i40e_macaddr_init(vsi, pf->hw.mac.addr);
3093 dev_warn(&pf->pdev->dev,
3094 "could not set up macaddr; err %d\n", err);
3100 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3101 * @vsi: Pointer to the targeted VSI
3103 * This function replays the hlist on the hw where all the SB Flow Director
3104 * filters were saved.
3106 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3108 struct i40e_fdir_filter *filter;
3109 struct i40e_pf *pf = vsi->back;
3110 struct hlist_node *node;
3112 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3115 hlist_for_each_entry_safe(filter, node,
3116 &pf->fdir_filter_list, fdir_node) {
3117 i40e_add_del_fdir(vsi, filter, true);
3122 * i40e_vsi_configure - Set up the VSI for action
3123 * @vsi: the VSI being configured
3125 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3129 i40e_set_vsi_rx_mode(vsi);
3130 i40e_restore_vlan(vsi);
3131 i40e_vsi_config_dcb_rings(vsi);
3132 err = i40e_vsi_configure_tx(vsi);
3134 err = i40e_vsi_configure_rx(vsi);
3140 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3141 * @vsi: the VSI being configured
3143 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3145 struct i40e_pf *pf = vsi->back;
3146 struct i40e_hw *hw = &pf->hw;
3151 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3152 * and PFINT_LNKLSTn registers, e.g.:
3153 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3155 qp = vsi->base_queue;
3156 vector = vsi->base_vector;
3157 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3158 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3160 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3161 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3162 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3163 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3165 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3166 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3167 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3169 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3170 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3172 /* Linked list for the queuepairs assigned to this vector */
3173 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3174 for (q = 0; q < q_vector->num_ringpairs; q++) {
3177 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3178 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3179 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3180 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3182 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3184 wr32(hw, I40E_QINT_RQCTL(qp), val);
3186 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3187 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3188 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3189 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3191 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3193 /* Terminate the linked list */
3194 if (q == (q_vector->num_ringpairs - 1))
3195 val |= (I40E_QUEUE_END_OF_LIST
3196 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3198 wr32(hw, I40E_QINT_TQCTL(qp), val);
3207 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3208 * @hw: ptr to the hardware info
3210 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3212 struct i40e_hw *hw = &pf->hw;
3215 /* clear things first */
3216 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3217 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3219 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3220 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3221 I40E_PFINT_ICR0_ENA_GRST_MASK |
3222 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3223 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3224 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3225 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3226 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3228 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3229 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3231 if (pf->flags & I40E_FLAG_PTP)
3232 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3234 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3236 /* SW_ITR_IDX = 0, but don't change INTENA */
3237 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3238 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3240 /* OTHER_ITR_IDX = 0 */
3241 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3245 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3246 * @vsi: the VSI being configured
3248 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3250 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3251 struct i40e_pf *pf = vsi->back;
3252 struct i40e_hw *hw = &pf->hw;
3255 /* set the ITR configuration */
3256 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3257 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3258 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3259 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3260 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3261 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3262 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3264 i40e_enable_misc_int_causes(pf);
3266 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3267 wr32(hw, I40E_PFINT_LNKLST0, 0);
3269 /* Associate the queue pair to the vector and enable the queue int */
3270 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3271 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3272 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3274 wr32(hw, I40E_QINT_RQCTL(0), val);
3276 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3277 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3278 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3280 wr32(hw, I40E_QINT_TQCTL(0), val);
3285 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3286 * @pf: board private structure
3288 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3290 struct i40e_hw *hw = &pf->hw;
3292 wr32(hw, I40E_PFINT_DYN_CTL0,
3293 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3298 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3299 * @pf: board private structure
3300 * @clearpba: true when all pending interrupt events should be cleared
3302 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3304 struct i40e_hw *hw = &pf->hw;
3307 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3308 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3309 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3311 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3316 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3317 * @irq: interrupt number
3318 * @data: pointer to a q_vector
3320 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3322 struct i40e_q_vector *q_vector = data;
3324 if (!q_vector->tx.ring && !q_vector->rx.ring)
3327 napi_schedule_irqoff(&q_vector->napi);
3333 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3334 * @vsi: the VSI being configured
3335 * @basename: name for the vector
3337 * Allocates MSI-X vectors and requests interrupts from the kernel.
3339 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3341 int q_vectors = vsi->num_q_vectors;
3342 struct i40e_pf *pf = vsi->back;
3343 int base = vsi->base_vector;
3348 for (vector = 0; vector < q_vectors; vector++) {
3349 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3351 if (q_vector->tx.ring && q_vector->rx.ring) {
3352 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3353 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3355 } else if (q_vector->rx.ring) {
3356 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3357 "%s-%s-%d", basename, "rx", rx_int_idx++);
3358 } else if (q_vector->tx.ring) {
3359 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3360 "%s-%s-%d", basename, "tx", tx_int_idx++);
3362 /* skip this unused q_vector */
3365 err = request_irq(pf->msix_entries[base + vector].vector,
3371 dev_info(&pf->pdev->dev,
3372 "MSIX request_irq failed, error: %d\n", err);
3373 goto free_queue_irqs;
3375 /* assign the mask for this irq */
3376 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3377 &q_vector->affinity_mask);
3380 vsi->irqs_ready = true;
3386 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3388 free_irq(pf->msix_entries[base + vector].vector,
3389 &(vsi->q_vectors[vector]));
3395 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3396 * @vsi: the VSI being un-configured
3398 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3400 struct i40e_pf *pf = vsi->back;
3401 struct i40e_hw *hw = &pf->hw;
3402 int base = vsi->base_vector;
3405 for (i = 0; i < vsi->num_queue_pairs; i++) {
3406 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3407 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3410 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3411 for (i = vsi->base_vector;
3412 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3413 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3416 for (i = 0; i < vsi->num_q_vectors; i++)
3417 synchronize_irq(pf->msix_entries[i + base].vector);
3419 /* Legacy and MSI mode - this stops all interrupt handling */
3420 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3421 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3423 synchronize_irq(pf->pdev->irq);
3428 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3429 * @vsi: the VSI being configured
3431 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3433 struct i40e_pf *pf = vsi->back;
3436 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3437 for (i = 0; i < vsi->num_q_vectors; i++)
3438 i40e_irq_dynamic_enable(vsi, i);
3440 i40e_irq_dynamic_enable_icr0(pf, true);
3443 i40e_flush(&pf->hw);
3448 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3449 * @pf: board private structure
3451 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3454 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3455 i40e_flush(&pf->hw);
3459 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3460 * @irq: interrupt number
3461 * @data: pointer to a q_vector
3463 * This is the handler used for all MSI/Legacy interrupts, and deals
3464 * with both queue and non-queue interrupts. This is also used in
3465 * MSIX mode to handle the non-queue interrupts.
3467 static irqreturn_t i40e_intr(int irq, void *data)
3469 struct i40e_pf *pf = (struct i40e_pf *)data;
3470 struct i40e_hw *hw = &pf->hw;
3471 irqreturn_t ret = IRQ_NONE;
3472 u32 icr0, icr0_remaining;
3475 icr0 = rd32(hw, I40E_PFINT_ICR0);
3476 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3478 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3479 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3482 /* if interrupt but no bits showing, must be SWINT */
3483 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3484 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3487 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3488 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3489 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3490 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3491 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3494 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3495 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3496 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3497 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3499 /* We do not have a way to disarm Queue causes while leaving
3500 * interrupt enabled for all other causes, ideally
3501 * interrupt should be disabled while we are in NAPI but
3502 * this is not a performance path and napi_schedule()
3503 * can deal with rescheduling.
3505 if (!test_bit(__I40E_DOWN, &pf->state))
3506 napi_schedule_irqoff(&q_vector->napi);
3509 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3510 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3511 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3512 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3515 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3516 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3517 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3520 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3521 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3522 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3525 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3526 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3527 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3528 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3529 val = rd32(hw, I40E_GLGEN_RSTAT);
3530 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3531 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3532 if (val == I40E_RESET_CORER) {
3534 } else if (val == I40E_RESET_GLOBR) {
3536 } else if (val == I40E_RESET_EMPR) {
3538 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3542 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3543 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3544 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3545 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3546 rd32(hw, I40E_PFHMC_ERRORINFO),
3547 rd32(hw, I40E_PFHMC_ERRORDATA));
3550 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3551 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3553 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3554 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3555 i40e_ptp_tx_hwtstamp(pf);
3559 /* If a critical error is pending we have no choice but to reset the
3561 * Report and mask out any remaining unexpected interrupts.
3563 icr0_remaining = icr0 & ena_mask;
3564 if (icr0_remaining) {
3565 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3567 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3568 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3569 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3570 dev_info(&pf->pdev->dev, "device will be reset\n");
3571 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3572 i40e_service_event_schedule(pf);
3574 ena_mask &= ~icr0_remaining;
3579 /* re-enable interrupt causes */
3580 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3581 if (!test_bit(__I40E_DOWN, &pf->state)) {
3582 i40e_service_event_schedule(pf);
3583 i40e_irq_dynamic_enable_icr0(pf, false);
3590 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3591 * @tx_ring: tx ring to clean
3592 * @budget: how many cleans we're allowed
3594 * Returns true if there's any budget left (e.g. the clean is finished)
3596 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3598 struct i40e_vsi *vsi = tx_ring->vsi;
3599 u16 i = tx_ring->next_to_clean;
3600 struct i40e_tx_buffer *tx_buf;
3601 struct i40e_tx_desc *tx_desc;
3603 tx_buf = &tx_ring->tx_bi[i];
3604 tx_desc = I40E_TX_DESC(tx_ring, i);
3605 i -= tx_ring->count;
3608 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3610 /* if next_to_watch is not set then there is no work pending */
3614 /* prevent any other reads prior to eop_desc */
3617 /* if the descriptor isn't done, no work yet to do */
3618 if (!(eop_desc->cmd_type_offset_bsz &
3619 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3622 /* clear next_to_watch to prevent false hangs */
3623 tx_buf->next_to_watch = NULL;
3625 tx_desc->buffer_addr = 0;
3626 tx_desc->cmd_type_offset_bsz = 0;
3627 /* move past filter desc */
3632 i -= tx_ring->count;
3633 tx_buf = tx_ring->tx_bi;
3634 tx_desc = I40E_TX_DESC(tx_ring, 0);
3636 /* unmap skb header data */
3637 dma_unmap_single(tx_ring->dev,
3638 dma_unmap_addr(tx_buf, dma),
3639 dma_unmap_len(tx_buf, len),
3641 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3642 kfree(tx_buf->raw_buf);
3644 tx_buf->raw_buf = NULL;
3645 tx_buf->tx_flags = 0;
3646 tx_buf->next_to_watch = NULL;
3647 dma_unmap_len_set(tx_buf, len, 0);
3648 tx_desc->buffer_addr = 0;
3649 tx_desc->cmd_type_offset_bsz = 0;
3651 /* move us past the eop_desc for start of next FD desc */
3656 i -= tx_ring->count;
3657 tx_buf = tx_ring->tx_bi;
3658 tx_desc = I40E_TX_DESC(tx_ring, 0);
3661 /* update budget accounting */
3663 } while (likely(budget));
3665 i += tx_ring->count;
3666 tx_ring->next_to_clean = i;
3668 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3669 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3675 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3676 * @irq: interrupt number
3677 * @data: pointer to a q_vector
3679 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3681 struct i40e_q_vector *q_vector = data;
3682 struct i40e_vsi *vsi;
3684 if (!q_vector->tx.ring)
3687 vsi = q_vector->tx.ring->vsi;
3688 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3694 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3695 * @vsi: the VSI being configured
3696 * @v_idx: vector index
3697 * @qp_idx: queue pair index
3699 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3701 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3702 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3703 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3705 tx_ring->q_vector = q_vector;
3706 tx_ring->next = q_vector->tx.ring;
3707 q_vector->tx.ring = tx_ring;
3708 q_vector->tx.count++;
3710 rx_ring->q_vector = q_vector;
3711 rx_ring->next = q_vector->rx.ring;
3712 q_vector->rx.ring = rx_ring;
3713 q_vector->rx.count++;
3717 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3718 * @vsi: the VSI being configured
3720 * This function maps descriptor rings to the queue-specific vectors
3721 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3722 * one vector per queue pair, but on a constrained vector budget, we
3723 * group the queue pairs as "efficiently" as possible.
3725 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3727 int qp_remaining = vsi->num_queue_pairs;
3728 int q_vectors = vsi->num_q_vectors;
3733 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3734 * group them so there are multiple queues per vector.
3735 * It is also important to go through all the vectors available to be
3736 * sure that if we don't use all the vectors, that the remaining vectors
3737 * are cleared. This is especially important when decreasing the
3738 * number of queues in use.
3740 for (; v_start < q_vectors; v_start++) {
3741 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3743 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3745 q_vector->num_ringpairs = num_ringpairs;
3747 q_vector->rx.count = 0;
3748 q_vector->tx.count = 0;
3749 q_vector->rx.ring = NULL;
3750 q_vector->tx.ring = NULL;
3752 while (num_ringpairs--) {
3753 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3761 * i40e_vsi_request_irq - Request IRQ from the OS
3762 * @vsi: the VSI being configured
3763 * @basename: name for the vector
3765 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3767 struct i40e_pf *pf = vsi->back;
3770 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3771 err = i40e_vsi_request_irq_msix(vsi, basename);
3772 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3773 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3776 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3780 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3785 #ifdef CONFIG_NET_POLL_CONTROLLER
3787 * i40e_netpoll - A Polling 'interrupt' handler
3788 * @netdev: network interface device structure
3790 * This is used by netconsole to send skbs without having to re-enable
3791 * interrupts. It's not called while the normal interrupt routine is executing.
3794 void i40e_netpoll(struct net_device *netdev)
3796 static void i40e_netpoll(struct net_device *netdev)
3799 struct i40e_netdev_priv *np = netdev_priv(netdev);
3800 struct i40e_vsi *vsi = np->vsi;
3801 struct i40e_pf *pf = vsi->back;
3804 /* if interface is down do nothing */
3805 if (test_bit(__I40E_DOWN, &vsi->state))
3808 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3809 for (i = 0; i < vsi->num_q_vectors; i++)
3810 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3812 i40e_intr(pf->pdev->irq, netdev);
3818 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3819 * @pf: the PF being configured
3820 * @pf_q: the PF queue
3821 * @enable: enable or disable state of the queue
3823 * This routine will wait for the given Tx queue of the PF to reach the
3824 * enabled or disabled state.
3825 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3826 * multiple retries; else will return 0 in case of success.
3828 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3833 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3834 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3835 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3838 usleep_range(10, 20);
3840 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3847 * i40e_vsi_control_tx - Start or stop a VSI's rings
3848 * @vsi: the VSI being configured
3849 * @enable: start or stop the rings
3851 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3853 struct i40e_pf *pf = vsi->back;
3854 struct i40e_hw *hw = &pf->hw;
3855 int i, j, pf_q, ret = 0;
3858 pf_q = vsi->base_queue;
3859 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3861 /* warn the TX unit of coming changes */
3862 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3864 usleep_range(10, 20);
3866 for (j = 0; j < 50; j++) {
3867 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3868 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3869 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3871 usleep_range(1000, 2000);
3873 /* Skip if the queue is already in the requested state */
3874 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3877 /* turn on/off the queue */
3879 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3880 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3882 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3885 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3886 /* No waiting for the Tx queue to disable */
3887 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3890 /* wait for the change to finish */
3891 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3893 dev_info(&pf->pdev->dev,
3894 "VSI seid %d Tx ring %d %sable timeout\n",
3895 vsi->seid, pf_q, (enable ? "en" : "dis"));
3900 if (hw->revision_id == 0)
3906 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3907 * @pf: the PF being configured
3908 * @pf_q: the PF queue
3909 * @enable: enable or disable state of the queue
3911 * This routine will wait for the given Rx queue of the PF to reach the
3912 * enabled or disabled state.
3913 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3914 * multiple retries; else will return 0 in case of success.
3916 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3921 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3922 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3923 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3926 usleep_range(10, 20);
3928 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3935 * i40e_vsi_control_rx - Start or stop a VSI's rings
3936 * @vsi: the VSI being configured
3937 * @enable: start or stop the rings
3939 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3941 struct i40e_pf *pf = vsi->back;
3942 struct i40e_hw *hw = &pf->hw;
3943 int i, j, pf_q, ret = 0;
3946 pf_q = vsi->base_queue;
3947 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3948 for (j = 0; j < 50; j++) {
3949 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3950 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3951 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3953 usleep_range(1000, 2000);
3956 /* Skip if the queue is already in the requested state */
3957 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3960 /* turn on/off the queue */
3962 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3964 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3965 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3966 /* No waiting for the Tx queue to disable */
3967 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3970 /* wait for the change to finish */
3971 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3973 dev_info(&pf->pdev->dev,
3974 "VSI seid %d Rx ring %d %sable timeout\n",
3975 vsi->seid, pf_q, (enable ? "en" : "dis"));
3984 * i40e_vsi_control_rings - Start or stop a VSI's rings
3985 * @vsi: the VSI being configured
3986 * @enable: start or stop the rings
3988 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3992 /* do rx first for enable and last for disable */
3994 ret = i40e_vsi_control_rx(vsi, request);
3997 ret = i40e_vsi_control_tx(vsi, request);
3999 /* Ignore return value, we need to shutdown whatever we can */
4000 i40e_vsi_control_tx(vsi, request);
4001 i40e_vsi_control_rx(vsi, request);
4008 * i40e_vsi_free_irq - Free the irq association with the OS
4009 * @vsi: the VSI being configured
4011 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4013 struct i40e_pf *pf = vsi->back;
4014 struct i40e_hw *hw = &pf->hw;
4015 int base = vsi->base_vector;
4019 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4020 if (!vsi->q_vectors)
4023 if (!vsi->irqs_ready)
4026 vsi->irqs_ready = false;
4027 for (i = 0; i < vsi->num_q_vectors; i++) {
4028 u16 vector = i + base;
4030 /* free only the irqs that were actually requested */
4031 if (!vsi->q_vectors[i] ||
4032 !vsi->q_vectors[i]->num_ringpairs)
4035 /* clear the affinity_mask in the IRQ descriptor */
4036 irq_set_affinity_hint(pf->msix_entries[vector].vector,
4038 synchronize_irq(pf->msix_entries[vector].vector);
4039 free_irq(pf->msix_entries[vector].vector,
4042 /* Tear down the interrupt queue link list
4044 * We know that they come in pairs and always
4045 * the Rx first, then the Tx. To clear the
4046 * link list, stick the EOL value into the
4047 * next_q field of the registers.
4049 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4050 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4051 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4052 val |= I40E_QUEUE_END_OF_LIST
4053 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4054 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4056 while (qp != I40E_QUEUE_END_OF_LIST) {
4059 val = rd32(hw, I40E_QINT_RQCTL(qp));
4061 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4062 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4063 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4064 I40E_QINT_RQCTL_INTEVENT_MASK);
4066 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4067 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4069 wr32(hw, I40E_QINT_RQCTL(qp), val);
4071 val = rd32(hw, I40E_QINT_TQCTL(qp));
4073 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4074 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4076 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4077 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4078 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4079 I40E_QINT_TQCTL_INTEVENT_MASK);
4081 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4082 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4084 wr32(hw, I40E_QINT_TQCTL(qp), val);
4089 free_irq(pf->pdev->irq, pf);
4091 val = rd32(hw, I40E_PFINT_LNKLST0);
4092 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4093 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4094 val |= I40E_QUEUE_END_OF_LIST
4095 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4096 wr32(hw, I40E_PFINT_LNKLST0, val);
4098 val = rd32(hw, I40E_QINT_RQCTL(qp));
4099 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4100 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4101 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4102 I40E_QINT_RQCTL_INTEVENT_MASK);
4104 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4105 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4107 wr32(hw, I40E_QINT_RQCTL(qp), val);
4109 val = rd32(hw, I40E_QINT_TQCTL(qp));
4111 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4112 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4113 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4114 I40E_QINT_TQCTL_INTEVENT_MASK);
4116 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4117 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4119 wr32(hw, I40E_QINT_TQCTL(qp), val);
4124 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4125 * @vsi: the VSI being configured
4126 * @v_idx: Index of vector to be freed
4128 * This function frees the memory allocated to the q_vector. In addition if
4129 * NAPI is enabled it will delete any references to the NAPI struct prior
4130 * to freeing the q_vector.
4132 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4134 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4135 struct i40e_ring *ring;
4140 /* disassociate q_vector from rings */
4141 i40e_for_each_ring(ring, q_vector->tx)
4142 ring->q_vector = NULL;
4144 i40e_for_each_ring(ring, q_vector->rx)
4145 ring->q_vector = NULL;
4147 /* only VSI w/ an associated netdev is set up w/ NAPI */
4149 netif_napi_del(&q_vector->napi);
4151 vsi->q_vectors[v_idx] = NULL;
4153 kfree_rcu(q_vector, rcu);
4157 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4158 * @vsi: the VSI being un-configured
4160 * This frees the memory allocated to the q_vectors and
4161 * deletes references to the NAPI struct.
4163 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4167 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4168 i40e_free_q_vector(vsi, v_idx);
4172 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4173 * @pf: board private structure
4175 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4177 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4178 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4179 pci_disable_msix(pf->pdev);
4180 kfree(pf->msix_entries);
4181 pf->msix_entries = NULL;
4182 kfree(pf->irq_pile);
4183 pf->irq_pile = NULL;
4184 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4185 pci_disable_msi(pf->pdev);
4187 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4191 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4192 * @pf: board private structure
4194 * We go through and clear interrupt specific resources and reset the structure
4195 * to pre-load conditions
4197 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4201 i40e_stop_misc_vector(pf);
4202 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4203 synchronize_irq(pf->msix_entries[0].vector);
4204 free_irq(pf->msix_entries[0].vector, pf);
4207 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4208 I40E_IWARP_IRQ_PILE_ID);
4210 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4211 for (i = 0; i < pf->num_alloc_vsi; i++)
4213 i40e_vsi_free_q_vectors(pf->vsi[i]);
4214 i40e_reset_interrupt_capability(pf);
4218 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4219 * @vsi: the VSI being configured
4221 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4228 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4229 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4231 if (q_vector->rx.ring || q_vector->tx.ring)
4232 napi_enable(&q_vector->napi);
4237 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4238 * @vsi: the VSI being configured
4240 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4247 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4248 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4250 if (q_vector->rx.ring || q_vector->tx.ring)
4251 napi_disable(&q_vector->napi);
4256 * i40e_vsi_close - Shut down a VSI
4257 * @vsi: the vsi to be quelled
4259 static void i40e_vsi_close(struct i40e_vsi *vsi)
4263 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4265 i40e_vsi_free_irq(vsi);
4266 i40e_vsi_free_tx_resources(vsi);
4267 i40e_vsi_free_rx_resources(vsi);
4268 vsi->current_netdev_flags = 0;
4269 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4271 i40e_notify_client_of_netdev_close(vsi, reset);
4275 * i40e_quiesce_vsi - Pause a given VSI
4276 * @vsi: the VSI being paused
4278 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4280 if (test_bit(__I40E_DOWN, &vsi->state))
4283 /* No need to disable FCoE VSI when Tx suspended */
4284 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4285 vsi->type == I40E_VSI_FCOE) {
4286 dev_dbg(&vsi->back->pdev->dev,
4287 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4291 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4292 if (vsi->netdev && netif_running(vsi->netdev))
4293 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4295 i40e_vsi_close(vsi);
4299 * i40e_unquiesce_vsi - Resume a given VSI
4300 * @vsi: the VSI being resumed
4302 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4304 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4307 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4308 if (vsi->netdev && netif_running(vsi->netdev))
4309 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4311 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4315 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4318 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4322 for (v = 0; v < pf->num_alloc_vsi; v++) {
4324 i40e_quiesce_vsi(pf->vsi[v]);
4329 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4332 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4336 for (v = 0; v < pf->num_alloc_vsi; v++) {
4338 i40e_unquiesce_vsi(pf->vsi[v]);
4342 #ifdef CONFIG_I40E_DCB
4344 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4345 * @vsi: the VSI being configured
4347 * This function waits for the given VSI's queues to be disabled.
4349 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4351 struct i40e_pf *pf = vsi->back;
4354 pf_q = vsi->base_queue;
4355 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4356 /* Check and wait for the disable status of the queue */
4357 ret = i40e_pf_txq_wait(pf, pf_q, false);
4359 dev_info(&pf->pdev->dev,
4360 "VSI seid %d Tx ring %d disable timeout\n",
4366 pf_q = vsi->base_queue;
4367 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4368 /* Check and wait for the disable status of the queue */
4369 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4371 dev_info(&pf->pdev->dev,
4372 "VSI seid %d Rx ring %d disable timeout\n",
4382 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4385 * This function waits for the queues to be in disabled state for all the
4386 * VSIs that are managed by this PF.
4388 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4392 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4393 /* No need to wait for FCoE VSI queues */
4394 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4395 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4407 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4408 * @q_idx: TX queue number
4409 * @vsi: Pointer to VSI struct
4411 * This function checks specified queue for given VSI. Detects hung condition.
4412 * Sets hung bit since it is two step process. Before next run of service task
4413 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4414 * hung condition remain unchanged and during subsequent run, this function
4415 * issues SW interrupt to recover from hung condition.
4417 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4419 struct i40e_ring *tx_ring = NULL;
4421 u32 head, val, tx_pending_hw;
4426 /* now that we have an index, find the tx_ring struct */
4427 for (i = 0; i < vsi->num_queue_pairs; i++) {
4428 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4429 if (q_idx == vsi->tx_rings[i]->queue_index) {
4430 tx_ring = vsi->tx_rings[i];
4439 /* Read interrupt register */
4440 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4442 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4443 tx_ring->vsi->base_vector - 1));
4445 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4447 head = i40e_get_head(tx_ring);
4449 tx_pending_hw = i40e_get_tx_pending(tx_ring, false);
4451 /* HW is done executing descriptors, updated HEAD write back,
4452 * but SW hasn't processed those descriptors. If interrupt is
4453 * not generated from this point ON, it could result into
4454 * dev_watchdog detecting timeout on those netdev_queue,
4455 * hence proactively trigger SW interrupt.
4457 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4458 /* NAPI Poll didn't run and clear since it was set */
4459 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4460 &tx_ring->q_vector->hung_detected)) {
4461 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4462 vsi->seid, q_idx, tx_pending_hw,
4463 tx_ring->next_to_clean, head,
4464 tx_ring->next_to_use,
4465 readl(tx_ring->tail));
4466 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4467 vsi->seid, q_idx, val);
4468 i40e_force_wb(vsi, tx_ring->q_vector);
4470 /* First Chance - detected possible hung */
4471 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4472 &tx_ring->q_vector->hung_detected);
4476 /* This is the case where we have interrupts missing,
4477 * so the tx_pending in HW will most likely be 0, but we
4478 * will have tx_pending in SW since the WB happened but the
4479 * interrupt got lost.
4481 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) &&
4482 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4483 if (napi_reschedule(&tx_ring->q_vector->napi))
4484 tx_ring->tx_stats.tx_lost_interrupt++;
4489 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4490 * @pf: pointer to PF struct
4492 * LAN VSI has netdev and netdev has TX queues. This function is to check
4493 * each of those TX queues if they are hung, trigger recovery by issuing
4496 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4498 struct net_device *netdev;
4499 struct i40e_vsi *vsi;
4502 /* Only for LAN VSI */
4503 vsi = pf->vsi[pf->lan_vsi];
4508 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4509 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4510 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4513 /* Make sure type is MAIN VSI */
4514 if (vsi->type != I40E_VSI_MAIN)
4517 netdev = vsi->netdev;
4521 /* Bail out if netif_carrier is not OK */
4522 if (!netif_carrier_ok(netdev))
4525 /* Go thru' TX queues for netdev */
4526 for (i = 0; i < netdev->num_tx_queues; i++) {
4527 struct netdev_queue *q;
4529 q = netdev_get_tx_queue(netdev, i);
4531 i40e_detect_recover_hung_queue(i, vsi);
4536 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4537 * @pf: pointer to PF
4539 * Get TC map for ISCSI PF type that will include iSCSI TC
4542 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4544 struct i40e_dcb_app_priority_table app;
4545 struct i40e_hw *hw = &pf->hw;
4546 u8 enabled_tc = 1; /* TC0 is always enabled */
4548 /* Get the iSCSI APP TLV */
4549 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4551 for (i = 0; i < dcbcfg->numapps; i++) {
4552 app = dcbcfg->app[i];
4553 if (app.selector == I40E_APP_SEL_TCPIP &&
4554 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4555 tc = dcbcfg->etscfg.prioritytable[app.priority];
4556 enabled_tc |= BIT(tc);
4565 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4566 * @dcbcfg: the corresponding DCBx configuration structure
4568 * Return the number of TCs from given DCBx configuration
4570 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4572 int i, tc_unused = 0;
4576 /* Scan the ETS Config Priority Table to find
4577 * traffic class enabled for a given priority
4578 * and create a bitmask of enabled TCs
4580 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4581 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
4583 /* Now scan the bitmask to check for
4584 * contiguous TCs starting with TC0
4586 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4587 if (num_tc & BIT(i)) {
4591 pr_err("Non-contiguous TC - Disabling DCB\n");
4599 /* There is always at least TC0 */
4607 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4608 * @dcbcfg: the corresponding DCBx configuration structure
4610 * Query the current DCB configuration and return the number of
4611 * traffic classes enabled from the given DCBX config
4613 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4615 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4619 for (i = 0; i < num_tc; i++)
4620 enabled_tc |= BIT(i);
4626 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4627 * @pf: PF being queried
4629 * Return number of traffic classes enabled for the given PF
4631 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4633 struct i40e_hw *hw = &pf->hw;
4634 u8 i, enabled_tc = 1;
4636 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4638 /* If DCB is not enabled then always in single TC */
4639 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4642 /* SFP mode will be enabled for all TCs on port */
4643 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4644 return i40e_dcb_get_num_tc(dcbcfg);
4646 /* MFP mode return count of enabled TCs for this PF */
4647 if (pf->hw.func_caps.iscsi)
4648 enabled_tc = i40e_get_iscsi_tc_map(pf);
4650 return 1; /* Only TC0 */
4652 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4653 if (enabled_tc & BIT(i))
4660 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4661 * @pf: PF being queried
4663 * Return a bitmap for enabled traffic classes for this PF.
4665 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4667 /* If DCB is not enabled for this PF then just return default TC */
4668 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4669 return I40E_DEFAULT_TRAFFIC_CLASS;
4671 /* SFP mode we want PF to be enabled for all TCs */
4672 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4673 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4675 /* MFP enabled and iSCSI PF type */
4676 if (pf->hw.func_caps.iscsi)
4677 return i40e_get_iscsi_tc_map(pf);
4679 return I40E_DEFAULT_TRAFFIC_CLASS;
4683 * i40e_vsi_get_bw_info - Query VSI BW Information
4684 * @vsi: the VSI being queried
4686 * Returns 0 on success, negative value on failure
4688 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4690 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4691 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4692 struct i40e_pf *pf = vsi->back;
4693 struct i40e_hw *hw = &pf->hw;
4698 /* Get the VSI level BW configuration */
4699 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4701 dev_info(&pf->pdev->dev,
4702 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4703 i40e_stat_str(&pf->hw, ret),
4704 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4708 /* Get the VSI level BW configuration per TC */
4709 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4712 dev_info(&pf->pdev->dev,
4713 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4714 i40e_stat_str(&pf->hw, ret),
4715 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4719 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4720 dev_info(&pf->pdev->dev,
4721 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4722 bw_config.tc_valid_bits,
4723 bw_ets_config.tc_valid_bits);
4724 /* Still continuing */
4727 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4728 vsi->bw_max_quanta = bw_config.max_bw;
4729 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4730 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4731 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4732 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4733 vsi->bw_ets_limit_credits[i] =
4734 le16_to_cpu(bw_ets_config.credits[i]);
4735 /* 3 bits out of 4 for each TC */
4736 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4743 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4744 * @vsi: the VSI being configured
4745 * @enabled_tc: TC bitmap
4746 * @bw_credits: BW shared credits per TC
4748 * Returns 0 on success, negative value on failure
4750 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4753 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4757 bw_data.tc_valid_bits = enabled_tc;
4758 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4759 bw_data.tc_bw_credits[i] = bw_share[i];
4761 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4764 dev_info(&vsi->back->pdev->dev,
4765 "AQ command Config VSI BW allocation per TC failed = %d\n",
4766 vsi->back->hw.aq.asq_last_status);
4770 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4771 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4777 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4778 * @vsi: the VSI being configured
4779 * @enabled_tc: TC map to be enabled
4782 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4784 struct net_device *netdev = vsi->netdev;
4785 struct i40e_pf *pf = vsi->back;
4786 struct i40e_hw *hw = &pf->hw;
4789 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4795 netdev_reset_tc(netdev);
4799 /* Set up actual enabled TCs on the VSI */
4800 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4803 /* set per TC queues for the VSI */
4804 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4805 /* Only set TC queues for enabled tcs
4807 * e.g. For a VSI that has TC0 and TC3 enabled the
4808 * enabled_tc bitmap would be 0x00001001; the driver
4809 * will set the numtc for netdev as 2 that will be
4810 * referenced by the netdev layer as TC 0 and 1.
4812 if (vsi->tc_config.enabled_tc & BIT(i))
4813 netdev_set_tc_queue(netdev,
4814 vsi->tc_config.tc_info[i].netdev_tc,
4815 vsi->tc_config.tc_info[i].qcount,
4816 vsi->tc_config.tc_info[i].qoffset);
4819 /* Assign UP2TC map for the VSI */
4820 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4821 /* Get the actual TC# for the UP */
4822 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4823 /* Get the mapped netdev TC# for the UP */
4824 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4825 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4830 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4831 * @vsi: the VSI being configured
4832 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4834 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4835 struct i40e_vsi_context *ctxt)
4837 /* copy just the sections touched not the entire info
4838 * since not all sections are valid as returned by
4841 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4842 memcpy(&vsi->info.queue_mapping,
4843 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4844 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4845 sizeof(vsi->info.tc_mapping));
4849 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4850 * @vsi: VSI to be configured
4851 * @enabled_tc: TC bitmap
4853 * This configures a particular VSI for TCs that are mapped to the
4854 * given TC bitmap. It uses default bandwidth share for TCs across
4855 * VSIs to configure TC for a particular VSI.
4858 * It is expected that the VSI queues have been quisced before calling
4861 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4863 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4864 struct i40e_vsi_context ctxt;
4868 /* Check if enabled_tc is same as existing or new TCs */
4869 if (vsi->tc_config.enabled_tc == enabled_tc)
4872 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4873 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4874 if (enabled_tc & BIT(i))
4878 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4880 dev_info(&vsi->back->pdev->dev,
4881 "Failed configuring TC map %d for VSI %d\n",
4882 enabled_tc, vsi->seid);
4886 /* Update Queue Pairs Mapping for currently enabled UPs */
4887 ctxt.seid = vsi->seid;
4888 ctxt.pf_num = vsi->back->hw.pf_id;
4890 ctxt.uplink_seid = vsi->uplink_seid;
4891 ctxt.info = vsi->info;
4892 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4894 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
4895 ctxt.info.valid_sections |=
4896 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
4897 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
4900 /* Update the VSI after updating the VSI queue-mapping information */
4901 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4903 dev_info(&vsi->back->pdev->dev,
4904 "Update vsi tc config failed, err %s aq_err %s\n",
4905 i40e_stat_str(&vsi->back->hw, ret),
4906 i40e_aq_str(&vsi->back->hw,
4907 vsi->back->hw.aq.asq_last_status));
4910 /* update the local VSI info with updated queue map */
4911 i40e_vsi_update_queue_map(vsi, &ctxt);
4912 vsi->info.valid_sections = 0;
4914 /* Update current VSI BW information */
4915 ret = i40e_vsi_get_bw_info(vsi);
4917 dev_info(&vsi->back->pdev->dev,
4918 "Failed updating vsi bw info, err %s aq_err %s\n",
4919 i40e_stat_str(&vsi->back->hw, ret),
4920 i40e_aq_str(&vsi->back->hw,
4921 vsi->back->hw.aq.asq_last_status));
4925 /* Update the netdev TC setup */
4926 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4932 * i40e_veb_config_tc - Configure TCs for given VEB
4934 * @enabled_tc: TC bitmap
4936 * Configures given TC bitmap for VEB (switching) element
4938 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4940 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4941 struct i40e_pf *pf = veb->pf;
4945 /* No TCs or already enabled TCs just return */
4946 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4949 bw_data.tc_valid_bits = enabled_tc;
4950 /* bw_data.absolute_credits is not set (relative) */
4952 /* Enable ETS TCs with equal BW Share for now */
4953 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4954 if (enabled_tc & BIT(i))
4955 bw_data.tc_bw_share_credits[i] = 1;
4958 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4961 dev_info(&pf->pdev->dev,
4962 "VEB bw config failed, err %s aq_err %s\n",
4963 i40e_stat_str(&pf->hw, ret),
4964 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4968 /* Update the BW information */
4969 ret = i40e_veb_get_bw_info(veb);
4971 dev_info(&pf->pdev->dev,
4972 "Failed getting veb bw config, err %s aq_err %s\n",
4973 i40e_stat_str(&pf->hw, ret),
4974 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4981 #ifdef CONFIG_I40E_DCB
4983 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4986 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4987 * the caller would've quiesce all the VSIs before calling
4990 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4996 /* Enable the TCs available on PF to all VEBs */
4997 tc_map = i40e_pf_get_tc_map(pf);
4998 for (v = 0; v < I40E_MAX_VEB; v++) {
5001 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
5003 dev_info(&pf->pdev->dev,
5004 "Failed configuring TC for VEB seid=%d\n",
5006 /* Will try to configure as many components */
5010 /* Update each VSI */
5011 for (v = 0; v < pf->num_alloc_vsi; v++) {
5015 /* - Enable all TCs for the LAN VSI
5017 * - For FCoE VSI only enable the TC configured
5018 * as per the APP TLV
5020 * - For all others keep them at TC0 for now
5022 if (v == pf->lan_vsi)
5023 tc_map = i40e_pf_get_tc_map(pf);
5025 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
5027 if (pf->vsi[v]->type == I40E_VSI_FCOE)
5028 tc_map = i40e_get_fcoe_tc_map(pf);
5029 #endif /* #ifdef I40E_FCOE */
5031 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
5033 dev_info(&pf->pdev->dev,
5034 "Failed configuring TC for VSI seid=%d\n",
5036 /* Will try to configure as many components */
5038 /* Re-configure VSI vectors based on updated TC map */
5039 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
5040 if (pf->vsi[v]->netdev)
5041 i40e_dcbnl_set_all(pf->vsi[v]);
5047 * i40e_resume_port_tx - Resume port Tx
5050 * Resume a port's Tx and issue a PF reset in case of failure to
5053 static int i40e_resume_port_tx(struct i40e_pf *pf)
5055 struct i40e_hw *hw = &pf->hw;
5058 ret = i40e_aq_resume_port_tx(hw, NULL);
5060 dev_info(&pf->pdev->dev,
5061 "Resume Port Tx failed, err %s aq_err %s\n",
5062 i40e_stat_str(&pf->hw, ret),
5063 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5064 /* Schedule PF reset to recover */
5065 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5066 i40e_service_event_schedule(pf);
5073 * i40e_init_pf_dcb - Initialize DCB configuration
5074 * @pf: PF being configured
5076 * Query the current DCB configuration and cache it
5077 * in the hardware structure
5079 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5081 struct i40e_hw *hw = &pf->hw;
5084 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5085 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5088 /* Get the initial DCB configuration */
5089 err = i40e_init_dcb(hw);
5091 /* Device/Function is not DCBX capable */
5092 if ((!hw->func_caps.dcb) ||
5093 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5094 dev_info(&pf->pdev->dev,
5095 "DCBX offload is not supported or is disabled for this PF.\n");
5097 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5101 /* When status is not DISABLED then DCBX in FW */
5102 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5103 DCB_CAP_DCBX_VER_IEEE;
5105 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5106 /* Enable DCB tagging only when more than one TC
5107 * or explicitly disable if only one TC
5109 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5110 pf->flags |= I40E_FLAG_DCB_ENABLED;
5112 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5113 dev_dbg(&pf->pdev->dev,
5114 "DCBX offload is supported for this PF.\n");
5117 dev_info(&pf->pdev->dev,
5118 "Query for DCB configuration failed, err %s aq_err %s\n",
5119 i40e_stat_str(&pf->hw, err),
5120 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5126 #endif /* CONFIG_I40E_DCB */
5127 #define SPEED_SIZE 14
5130 * i40e_print_link_message - print link up or down
5131 * @vsi: the VSI for which link needs a message
5133 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5135 char *speed = "Unknown";
5136 char *fc = "Unknown";
5138 if (vsi->current_isup == isup)
5140 vsi->current_isup = isup;
5142 netdev_info(vsi->netdev, "NIC Link is Down\n");
5146 /* Warn user if link speed on NPAR enabled partition is not at
5149 if (vsi->back->hw.func_caps.npar_enable &&
5150 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5151 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5152 netdev_warn(vsi->netdev,
5153 "The partition detected link speed that is less than 10Gbps\n");
5155 switch (vsi->back->hw.phy.link_info.link_speed) {
5156 case I40E_LINK_SPEED_40GB:
5159 case I40E_LINK_SPEED_20GB:
5162 case I40E_LINK_SPEED_10GB:
5165 case I40E_LINK_SPEED_1GB:
5168 case I40E_LINK_SPEED_100MB:
5175 switch (vsi->back->hw.fc.current_mode) {
5179 case I40E_FC_TX_PAUSE:
5182 case I40E_FC_RX_PAUSE:
5190 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5195 * i40e_up_complete - Finish the last steps of bringing up a connection
5196 * @vsi: the VSI being configured
5198 static int i40e_up_complete(struct i40e_vsi *vsi)
5200 struct i40e_pf *pf = vsi->back;
5203 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5204 i40e_vsi_configure_msix(vsi);
5206 i40e_configure_msi_and_legacy(vsi);
5209 err = i40e_vsi_control_rings(vsi, true);
5213 clear_bit(__I40E_DOWN, &vsi->state);
5214 i40e_napi_enable_all(vsi);
5215 i40e_vsi_enable_irq(vsi);
5217 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5219 i40e_print_link_message(vsi, true);
5220 netif_tx_start_all_queues(vsi->netdev);
5221 netif_carrier_on(vsi->netdev);
5222 } else if (vsi->netdev) {
5223 i40e_print_link_message(vsi, false);
5224 /* need to check for qualified module here*/
5225 if ((pf->hw.phy.link_info.link_info &
5226 I40E_AQ_MEDIA_AVAILABLE) &&
5227 (!(pf->hw.phy.link_info.an_info &
5228 I40E_AQ_QUALIFIED_MODULE)))
5229 netdev_err(vsi->netdev,
5230 "the driver failed to link because an unqualified module was detected.");
5233 /* replay FDIR SB filters */
5234 if (vsi->type == I40E_VSI_FDIR) {
5235 /* reset fd counters */
5236 pf->fd_add_err = pf->fd_atr_cnt = 0;
5237 if (pf->fd_tcp_rule > 0) {
5238 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
5239 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5240 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5241 pf->fd_tcp_rule = 0;
5243 i40e_fdir_filter_restore(vsi);
5246 /* On the next run of the service_task, notify any clients of the new
5249 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5250 i40e_service_event_schedule(pf);
5256 * i40e_vsi_reinit_locked - Reset the VSI
5257 * @vsi: the VSI being configured
5259 * Rebuild the ring structs after some configuration
5260 * has changed, e.g. MTU size.
5262 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5264 struct i40e_pf *pf = vsi->back;
5266 WARN_ON(in_interrupt());
5267 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5268 usleep_range(1000, 2000);
5272 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5276 * i40e_up - Bring the connection back up after being down
5277 * @vsi: the VSI being configured
5279 int i40e_up(struct i40e_vsi *vsi)
5283 err = i40e_vsi_configure(vsi);
5285 err = i40e_up_complete(vsi);
5291 * i40e_down - Shutdown the connection processing
5292 * @vsi: the VSI being stopped
5294 void i40e_down(struct i40e_vsi *vsi)
5298 /* It is assumed that the caller of this function
5299 * sets the vsi->state __I40E_DOWN bit.
5302 netif_carrier_off(vsi->netdev);
5303 netif_tx_disable(vsi->netdev);
5305 i40e_vsi_disable_irq(vsi);
5306 i40e_vsi_control_rings(vsi, false);
5307 i40e_napi_disable_all(vsi);
5309 for (i = 0; i < vsi->num_queue_pairs; i++) {
5310 i40e_clean_tx_ring(vsi->tx_rings[i]);
5311 i40e_clean_rx_ring(vsi->rx_rings[i]);
5314 i40e_notify_client_of_netdev_close(vsi, false);
5319 * i40e_setup_tc - configure multiple traffic classes
5320 * @netdev: net device to configure
5321 * @tc: number of traffic classes to enable
5323 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5325 struct i40e_netdev_priv *np = netdev_priv(netdev);
5326 struct i40e_vsi *vsi = np->vsi;
5327 struct i40e_pf *pf = vsi->back;
5332 /* Check if DCB enabled to continue */
5333 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5334 netdev_info(netdev, "DCB is not enabled for adapter\n");
5338 /* Check if MFP enabled */
5339 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5340 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5344 /* Check whether tc count is within enabled limit */
5345 if (tc > i40e_pf_get_num_tc(pf)) {
5346 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5350 /* Generate TC map for number of tc requested */
5351 for (i = 0; i < tc; i++)
5352 enabled_tc |= BIT(i);
5354 /* Requesting same TC configuration as already enabled */
5355 if (enabled_tc == vsi->tc_config.enabled_tc)
5358 /* Quiesce VSI queues */
5359 i40e_quiesce_vsi(vsi);
5361 /* Configure VSI for enabled TCs */
5362 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5364 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5370 i40e_unquiesce_vsi(vsi);
5377 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5378 struct tc_to_netdev *tc)
5380 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5381 struct tc_to_netdev *tc)
5384 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO)
5386 return i40e_setup_tc(netdev, tc->tc);
5390 * i40e_open - Called when a network interface is made active
5391 * @netdev: network interface device structure
5393 * The open entry point is called when a network interface is made
5394 * active by the system (IFF_UP). At this point all resources needed
5395 * for transmit and receive operations are allocated, the interrupt
5396 * handler is registered with the OS, the netdev watchdog subtask is
5397 * enabled, and the stack is notified that the interface is ready.
5399 * Returns 0 on success, negative value on failure
5401 int i40e_open(struct net_device *netdev)
5403 struct i40e_netdev_priv *np = netdev_priv(netdev);
5404 struct i40e_vsi *vsi = np->vsi;
5405 struct i40e_pf *pf = vsi->back;
5408 /* disallow open during test or if eeprom is broken */
5409 if (test_bit(__I40E_TESTING, &pf->state) ||
5410 test_bit(__I40E_BAD_EEPROM, &pf->state))
5413 netif_carrier_off(netdev);
5415 err = i40e_vsi_open(vsi);
5419 /* configure global TSO hardware offload settings */
5420 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5421 TCP_FLAG_FIN) >> 16);
5422 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5424 TCP_FLAG_CWR) >> 16);
5425 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5427 udp_tunnel_get_rx_info(netdev);
5434 * @vsi: the VSI to open
5436 * Finish initialization of the VSI.
5438 * Returns 0 on success, negative value on failure
5440 int i40e_vsi_open(struct i40e_vsi *vsi)
5442 struct i40e_pf *pf = vsi->back;
5443 char int_name[I40E_INT_NAME_STR_LEN];
5446 /* allocate descriptors */
5447 err = i40e_vsi_setup_tx_resources(vsi);
5450 err = i40e_vsi_setup_rx_resources(vsi);
5454 err = i40e_vsi_configure(vsi);
5459 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5460 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5461 err = i40e_vsi_request_irq(vsi, int_name);
5465 /* Notify the stack of the actual queue counts. */
5466 err = netif_set_real_num_tx_queues(vsi->netdev,
5467 vsi->num_queue_pairs);
5469 goto err_set_queues;
5471 err = netif_set_real_num_rx_queues(vsi->netdev,
5472 vsi->num_queue_pairs);
5474 goto err_set_queues;
5476 } else if (vsi->type == I40E_VSI_FDIR) {
5477 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5478 dev_driver_string(&pf->pdev->dev),
5479 dev_name(&pf->pdev->dev));
5480 err = i40e_vsi_request_irq(vsi, int_name);
5489 err = i40e_up_complete(vsi);
5491 goto err_up_complete;
5498 i40e_vsi_free_irq(vsi);
5500 i40e_vsi_free_rx_resources(vsi);
5502 i40e_vsi_free_tx_resources(vsi);
5503 if (vsi == pf->vsi[pf->lan_vsi])
5504 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5510 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5511 * @pf: Pointer to PF
5513 * This function destroys the hlist where all the Flow Director
5514 * filters were saved.
5516 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5518 struct i40e_fdir_filter *filter;
5519 struct hlist_node *node2;
5521 hlist_for_each_entry_safe(filter, node2,
5522 &pf->fdir_filter_list, fdir_node) {
5523 hlist_del(&filter->fdir_node);
5526 pf->fdir_pf_active_filters = 0;
5530 * i40e_close - Disables a network interface
5531 * @netdev: network interface device structure
5533 * The close entry point is called when an interface is de-activated
5534 * by the OS. The hardware is still under the driver's control, but
5535 * this netdev interface is disabled.
5537 * Returns 0, this is not allowed to fail
5539 int i40e_close(struct net_device *netdev)
5541 struct i40e_netdev_priv *np = netdev_priv(netdev);
5542 struct i40e_vsi *vsi = np->vsi;
5544 i40e_vsi_close(vsi);
5550 * i40e_do_reset - Start a PF or Core Reset sequence
5551 * @pf: board private structure
5552 * @reset_flags: which reset is requested
5554 * The essential difference in resets is that the PF Reset
5555 * doesn't clear the packet buffers, doesn't reset the PE
5556 * firmware, and doesn't bother the other PFs on the chip.
5558 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5562 WARN_ON(in_interrupt());
5565 /* do the biggest reset indicated */
5566 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5568 /* Request a Global Reset
5570 * This will start the chip's countdown to the actual full
5571 * chip reset event, and a warning interrupt to be sent
5572 * to all PFs, including the requestor. Our handler
5573 * for the warning interrupt will deal with the shutdown
5574 * and recovery of the switch setup.
5576 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5577 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5578 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5579 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5581 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5583 /* Request a Core Reset
5585 * Same as Global Reset, except does *not* include the MAC/PHY
5587 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5588 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5589 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5590 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5591 i40e_flush(&pf->hw);
5593 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5595 /* Request a PF Reset
5597 * Resets only the PF-specific registers
5599 * This goes directly to the tear-down and rebuild of
5600 * the switch, since we need to do all the recovery as
5601 * for the Core Reset.
5603 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5604 i40e_handle_reset_warning(pf);
5606 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5609 /* Find the VSI(s) that requested a re-init */
5610 dev_info(&pf->pdev->dev,
5611 "VSI reinit requested\n");
5612 for (v = 0; v < pf->num_alloc_vsi; v++) {
5613 struct i40e_vsi *vsi = pf->vsi[v];
5616 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5617 i40e_vsi_reinit_locked(pf->vsi[v]);
5618 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5621 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5624 /* Find the VSI(s) that needs to be brought down */
5625 dev_info(&pf->pdev->dev, "VSI down requested\n");
5626 for (v = 0; v < pf->num_alloc_vsi; v++) {
5627 struct i40e_vsi *vsi = pf->vsi[v];
5630 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5631 set_bit(__I40E_DOWN, &vsi->state);
5633 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5637 dev_info(&pf->pdev->dev,
5638 "bad reset request 0x%08x\n", reset_flags);
5642 #ifdef CONFIG_I40E_DCB
5644 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5645 * @pf: board private structure
5646 * @old_cfg: current DCB config
5647 * @new_cfg: new DCB config
5649 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5650 struct i40e_dcbx_config *old_cfg,
5651 struct i40e_dcbx_config *new_cfg)
5653 bool need_reconfig = false;
5655 /* Check if ETS configuration has changed */
5656 if (memcmp(&new_cfg->etscfg,
5658 sizeof(new_cfg->etscfg))) {
5659 /* If Priority Table has changed reconfig is needed */
5660 if (memcmp(&new_cfg->etscfg.prioritytable,
5661 &old_cfg->etscfg.prioritytable,
5662 sizeof(new_cfg->etscfg.prioritytable))) {
5663 need_reconfig = true;
5664 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5667 if (memcmp(&new_cfg->etscfg.tcbwtable,
5668 &old_cfg->etscfg.tcbwtable,
5669 sizeof(new_cfg->etscfg.tcbwtable)))
5670 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5672 if (memcmp(&new_cfg->etscfg.tsatable,
5673 &old_cfg->etscfg.tsatable,
5674 sizeof(new_cfg->etscfg.tsatable)))
5675 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5678 /* Check if PFC configuration has changed */
5679 if (memcmp(&new_cfg->pfc,
5681 sizeof(new_cfg->pfc))) {
5682 need_reconfig = true;
5683 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5686 /* Check if APP Table has changed */
5687 if (memcmp(&new_cfg->app,
5689 sizeof(new_cfg->app))) {
5690 need_reconfig = true;
5691 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5694 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5695 return need_reconfig;
5699 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5700 * @pf: board private structure
5701 * @e: event info posted on ARQ
5703 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5704 struct i40e_arq_event_info *e)
5706 struct i40e_aqc_lldp_get_mib *mib =
5707 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5708 struct i40e_hw *hw = &pf->hw;
5709 struct i40e_dcbx_config tmp_dcbx_cfg;
5710 bool need_reconfig = false;
5714 /* Not DCB capable or capability disabled */
5715 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5718 /* Ignore if event is not for Nearest Bridge */
5719 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5720 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5721 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5722 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5725 /* Check MIB Type and return if event for Remote MIB update */
5726 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5727 dev_dbg(&pf->pdev->dev,
5728 "LLDP event mib type %s\n", type ? "remote" : "local");
5729 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5730 /* Update the remote cached instance and return */
5731 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5732 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5733 &hw->remote_dcbx_config);
5737 /* Store the old configuration */
5738 tmp_dcbx_cfg = hw->local_dcbx_config;
5740 /* Reset the old DCBx configuration data */
5741 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5742 /* Get updated DCBX data from firmware */
5743 ret = i40e_get_dcb_config(&pf->hw);
5745 dev_info(&pf->pdev->dev,
5746 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5747 i40e_stat_str(&pf->hw, ret),
5748 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5752 /* No change detected in DCBX configs */
5753 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5754 sizeof(tmp_dcbx_cfg))) {
5755 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5759 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5760 &hw->local_dcbx_config);
5762 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5767 /* Enable DCB tagging only when more than one TC */
5768 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5769 pf->flags |= I40E_FLAG_DCB_ENABLED;
5771 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5773 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5774 /* Reconfiguration needed quiesce all VSIs */
5775 i40e_pf_quiesce_all_vsi(pf);
5777 /* Changes in configuration update VEB/VSI */
5778 i40e_dcb_reconfigure(pf);
5780 ret = i40e_resume_port_tx(pf);
5782 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5783 /* In case of error no point in resuming VSIs */
5787 /* Wait for the PF's queues to be disabled */
5788 ret = i40e_pf_wait_queues_disabled(pf);
5790 /* Schedule PF reset to recover */
5791 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5792 i40e_service_event_schedule(pf);
5794 i40e_pf_unquiesce_all_vsi(pf);
5795 /* Notify the client for the DCB changes */
5796 i40e_notify_client_of_l2_param_changes(pf->vsi[pf->lan_vsi]);
5802 #endif /* CONFIG_I40E_DCB */
5805 * i40e_do_reset_safe - Protected reset path for userland calls.
5806 * @pf: board private structure
5807 * @reset_flags: which reset is requested
5810 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5813 i40e_do_reset(pf, reset_flags);
5818 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5819 * @pf: board private structure
5820 * @e: event info posted on ARQ
5822 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5825 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5826 struct i40e_arq_event_info *e)
5828 struct i40e_aqc_lan_overflow *data =
5829 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5830 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5831 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5832 struct i40e_hw *hw = &pf->hw;
5836 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5839 /* Queue belongs to VF, find the VF and issue VF reset */
5840 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5841 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5842 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5843 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5844 vf_id -= hw->func_caps.vf_base_id;
5845 vf = &pf->vf[vf_id];
5846 i40e_vc_notify_vf_reset(vf);
5847 /* Allow VF to process pending reset notification */
5849 i40e_reset_vf(vf, false);
5854 * i40e_service_event_complete - Finish up the service event
5855 * @pf: board private structure
5857 static void i40e_service_event_complete(struct i40e_pf *pf)
5859 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5861 /* flush memory to make sure state is correct before next watchog */
5862 smp_mb__before_atomic();
5863 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5867 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5868 * @pf: board private structure
5870 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5874 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5875 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5880 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5881 * @pf: board private structure
5883 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5887 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5888 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5889 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5890 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5895 * i40e_get_global_fd_count - Get total FD filters programmed on device
5896 * @pf: board private structure
5898 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5902 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5903 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5904 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5905 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5910 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5911 * @pf: board private structure
5913 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5915 struct i40e_fdir_filter *filter;
5916 u32 fcnt_prog, fcnt_avail;
5917 struct hlist_node *node;
5919 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5922 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5925 fcnt_prog = i40e_get_global_fd_count(pf);
5926 fcnt_avail = pf->fdir_pf_filter_count;
5927 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5928 (pf->fd_add_err == 0) ||
5929 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5930 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5931 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5932 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5933 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5934 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5938 /* Wait for some more space to be available to turn on ATR. We also
5939 * must check that no existing ntuple rules for TCP are in effect
5941 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5942 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5943 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED) &&
5944 (pf->fd_tcp_rule == 0)) {
5945 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5946 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5947 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
5951 /* if hw had a problem adding a filter, delete it */
5952 if (pf->fd_inv > 0) {
5953 hlist_for_each_entry_safe(filter, node,
5954 &pf->fdir_filter_list, fdir_node) {
5955 if (filter->fd_id == pf->fd_inv) {
5956 hlist_del(&filter->fdir_node);
5958 pf->fdir_pf_active_filters--;
5964 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5965 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5967 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5968 * @pf: board private structure
5970 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5972 unsigned long min_flush_time;
5973 int flush_wait_retry = 50;
5974 bool disable_atr = false;
5978 if (!time_after(jiffies, pf->fd_flush_timestamp +
5979 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5982 /* If the flush is happening too quick and we have mostly SB rules we
5983 * should not re-enable ATR for some time.
5985 min_flush_time = pf->fd_flush_timestamp +
5986 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5987 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5989 if (!(time_after(jiffies, min_flush_time)) &&
5990 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5991 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5992 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5996 pf->fd_flush_timestamp = jiffies;
5997 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
5998 /* flush all filters */
5999 wr32(&pf->hw, I40E_PFQF_CTL_1,
6000 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
6001 i40e_flush(&pf->hw);
6005 /* Check FD flush status every 5-6msec */
6006 usleep_range(5000, 6000);
6007 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
6008 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
6010 } while (flush_wait_retry--);
6011 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
6012 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
6014 /* replay sideband filters */
6015 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
6017 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6018 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
6019 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6020 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
6025 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
6026 * @pf: board private structure
6028 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
6030 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
6033 /* We can see up to 256 filter programming desc in transit if the filters are
6034 * being applied really fast; before we see the first
6035 * filter miss error on Rx queue 0. Accumulating enough error messages before
6036 * reacting will make sure we don't cause flush too often.
6038 #define I40E_MAX_FD_PROGRAM_ERROR 256
6041 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
6042 * @pf: board private structure
6044 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
6047 /* if interface is down do nothing */
6048 if (test_bit(__I40E_DOWN, &pf->state))
6051 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6052 i40e_fdir_flush_and_replay(pf);
6054 i40e_fdir_check_and_reenable(pf);
6059 * i40e_vsi_link_event - notify VSI of a link event
6060 * @vsi: vsi to be notified
6061 * @link_up: link up or down
6063 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6065 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6068 switch (vsi->type) {
6073 if (!vsi->netdev || !vsi->netdev_registered)
6077 netif_carrier_on(vsi->netdev);
6078 netif_tx_wake_all_queues(vsi->netdev);
6080 netif_carrier_off(vsi->netdev);
6081 netif_tx_stop_all_queues(vsi->netdev);
6085 case I40E_VSI_SRIOV:
6086 case I40E_VSI_VMDQ2:
6088 case I40E_VSI_IWARP:
6089 case I40E_VSI_MIRROR:
6091 /* there is no notification for other VSIs */
6097 * i40e_veb_link_event - notify elements on the veb of a link event
6098 * @veb: veb to be notified
6099 * @link_up: link up or down
6101 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6106 if (!veb || !veb->pf)
6110 /* depth first... */
6111 for (i = 0; i < I40E_MAX_VEB; i++)
6112 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6113 i40e_veb_link_event(pf->veb[i], link_up);
6115 /* ... now the local VSIs */
6116 for (i = 0; i < pf->num_alloc_vsi; i++)
6117 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6118 i40e_vsi_link_event(pf->vsi[i], link_up);
6122 * i40e_link_event - Update netif_carrier status
6123 * @pf: board private structure
6125 static void i40e_link_event(struct i40e_pf *pf)
6127 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6128 u8 new_link_speed, old_link_speed;
6130 bool new_link, old_link;
6132 /* save off old link status information */
6133 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6135 /* set this to force the get_link_status call to refresh state */
6136 pf->hw.phy.get_link_info = true;
6138 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6140 status = i40e_get_link_status(&pf->hw, &new_link);
6142 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6147 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6148 new_link_speed = pf->hw.phy.link_info.link_speed;
6150 if (new_link == old_link &&
6151 new_link_speed == old_link_speed &&
6152 (test_bit(__I40E_DOWN, &vsi->state) ||
6153 new_link == netif_carrier_ok(vsi->netdev)))
6156 if (!test_bit(__I40E_DOWN, &vsi->state))
6157 i40e_print_link_message(vsi, new_link);
6159 /* Notify the base of the switch tree connected to
6160 * the link. Floating VEBs are not notified.
6162 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6163 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6165 i40e_vsi_link_event(vsi, new_link);
6168 i40e_vc_notify_link_state(pf);
6170 if (pf->flags & I40E_FLAG_PTP)
6171 i40e_ptp_set_increment(pf);
6175 * i40e_watchdog_subtask - periodic checks not using event driven response
6176 * @pf: board private structure
6178 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6182 /* if interface is down do nothing */
6183 if (test_bit(__I40E_DOWN, &pf->state) ||
6184 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6187 /* make sure we don't do these things too often */
6188 if (time_before(jiffies, (pf->service_timer_previous +
6189 pf->service_timer_period)))
6191 pf->service_timer_previous = jiffies;
6193 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6194 i40e_link_event(pf);
6196 /* Update the stats for active netdevs so the network stack
6197 * can look at updated numbers whenever it cares to
6199 for (i = 0; i < pf->num_alloc_vsi; i++)
6200 if (pf->vsi[i] && pf->vsi[i]->netdev)
6201 i40e_update_stats(pf->vsi[i]);
6203 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6204 /* Update the stats for the active switching components */
6205 for (i = 0; i < I40E_MAX_VEB; i++)
6207 i40e_update_veb_stats(pf->veb[i]);
6210 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6214 * i40e_reset_subtask - Set up for resetting the device and driver
6215 * @pf: board private structure
6217 static void i40e_reset_subtask(struct i40e_pf *pf)
6219 u32 reset_flags = 0;
6222 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6223 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6224 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6226 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6227 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6228 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6230 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6231 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6232 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6234 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6235 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6236 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6238 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6239 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6240 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6243 /* If there's a recovery already waiting, it takes
6244 * precedence before starting a new reset sequence.
6246 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6247 i40e_handle_reset_warning(pf);
6251 /* If we're already down or resetting, just bail */
6253 !test_bit(__I40E_DOWN, &pf->state) &&
6254 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6255 i40e_do_reset(pf, reset_flags);
6262 * i40e_handle_link_event - Handle link event
6263 * @pf: board private structure
6264 * @e: event info posted on ARQ
6266 static void i40e_handle_link_event(struct i40e_pf *pf,
6267 struct i40e_arq_event_info *e)
6269 struct i40e_aqc_get_link_status *status =
6270 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6272 /* Do a new status request to re-enable LSE reporting
6273 * and load new status information into the hw struct
6274 * This completely ignores any state information
6275 * in the ARQ event info, instead choosing to always
6276 * issue the AQ update link status command.
6278 i40e_link_event(pf);
6280 /* check for unqualified module, if link is down */
6281 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6282 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6283 (!(status->link_info & I40E_AQ_LINK_UP)))
6284 dev_err(&pf->pdev->dev,
6285 "The driver failed to link because an unqualified module was detected.\n");
6289 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6290 * @pf: board private structure
6292 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6294 struct i40e_arq_event_info event;
6295 struct i40e_hw *hw = &pf->hw;
6302 /* Do not run clean AQ when PF reset fails */
6303 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6306 /* check for error indications */
6307 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6309 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6310 if (hw->debug_mask & I40E_DEBUG_AQ)
6311 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6312 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6314 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6315 if (hw->debug_mask & I40E_DEBUG_AQ)
6316 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6317 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6318 pf->arq_overflows++;
6320 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6321 if (hw->debug_mask & I40E_DEBUG_AQ)
6322 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6323 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6326 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6328 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6330 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6331 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6332 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6333 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6335 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6336 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6337 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6338 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6340 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6341 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6342 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6343 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6346 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6348 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6349 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6354 ret = i40e_clean_arq_element(hw, &event, &pending);
6355 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6358 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6362 opcode = le16_to_cpu(event.desc.opcode);
6365 case i40e_aqc_opc_get_link_status:
6366 i40e_handle_link_event(pf, &event);
6368 case i40e_aqc_opc_send_msg_to_pf:
6369 ret = i40e_vc_process_vf_msg(pf,
6370 le16_to_cpu(event.desc.retval),
6371 le32_to_cpu(event.desc.cookie_high),
6372 le32_to_cpu(event.desc.cookie_low),
6376 case i40e_aqc_opc_lldp_update_mib:
6377 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6378 #ifdef CONFIG_I40E_DCB
6380 ret = i40e_handle_lldp_event(pf, &event);
6382 #endif /* CONFIG_I40E_DCB */
6384 case i40e_aqc_opc_event_lan_overflow:
6385 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6386 i40e_handle_lan_overflow_event(pf, &event);
6388 case i40e_aqc_opc_send_msg_to_peer:
6389 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6391 case i40e_aqc_opc_nvm_erase:
6392 case i40e_aqc_opc_nvm_update:
6393 case i40e_aqc_opc_oem_post_update:
6394 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6395 "ARQ NVM operation 0x%04x completed\n",
6399 dev_info(&pf->pdev->dev,
6400 "ARQ: Unknown event 0x%04x ignored\n",
6404 } while (pending && (i++ < pf->adminq_work_limit));
6406 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6407 /* re-enable Admin queue interrupt cause */
6408 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6409 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6410 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6413 kfree(event.msg_buf);
6417 * i40e_verify_eeprom - make sure eeprom is good to use
6418 * @pf: board private structure
6420 static void i40e_verify_eeprom(struct i40e_pf *pf)
6424 err = i40e_diag_eeprom_test(&pf->hw);
6426 /* retry in case of garbage read */
6427 err = i40e_diag_eeprom_test(&pf->hw);
6429 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6431 set_bit(__I40E_BAD_EEPROM, &pf->state);
6435 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6436 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6437 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6442 * i40e_enable_pf_switch_lb
6443 * @pf: pointer to the PF structure
6445 * enable switch loop back or die - no point in a return value
6447 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6449 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6450 struct i40e_vsi_context ctxt;
6453 ctxt.seid = pf->main_vsi_seid;
6454 ctxt.pf_num = pf->hw.pf_id;
6456 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6458 dev_info(&pf->pdev->dev,
6459 "couldn't get PF vsi config, err %s aq_err %s\n",
6460 i40e_stat_str(&pf->hw, ret),
6461 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6464 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6465 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6466 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6468 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6470 dev_info(&pf->pdev->dev,
6471 "update vsi switch failed, err %s aq_err %s\n",
6472 i40e_stat_str(&pf->hw, ret),
6473 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6478 * i40e_disable_pf_switch_lb
6479 * @pf: pointer to the PF structure
6481 * disable switch loop back or die - no point in a return value
6483 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6485 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6486 struct i40e_vsi_context ctxt;
6489 ctxt.seid = pf->main_vsi_seid;
6490 ctxt.pf_num = pf->hw.pf_id;
6492 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6494 dev_info(&pf->pdev->dev,
6495 "couldn't get PF vsi config, err %s aq_err %s\n",
6496 i40e_stat_str(&pf->hw, ret),
6497 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6500 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6501 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6502 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6504 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6506 dev_info(&pf->pdev->dev,
6507 "update vsi switch failed, err %s aq_err %s\n",
6508 i40e_stat_str(&pf->hw, ret),
6509 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6514 * i40e_config_bridge_mode - Configure the HW bridge mode
6515 * @veb: pointer to the bridge instance
6517 * Configure the loop back mode for the LAN VSI that is downlink to the
6518 * specified HW bridge instance. It is expected this function is called
6519 * when a new HW bridge is instantiated.
6521 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6523 struct i40e_pf *pf = veb->pf;
6525 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6526 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6527 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6528 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6529 i40e_disable_pf_switch_lb(pf);
6531 i40e_enable_pf_switch_lb(pf);
6535 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6536 * @veb: pointer to the VEB instance
6538 * This is a recursive function that first builds the attached VSIs then
6539 * recurses in to build the next layer of VEB. We track the connections
6540 * through our own index numbers because the seid's from the HW could
6541 * change across the reset.
6543 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6545 struct i40e_vsi *ctl_vsi = NULL;
6546 struct i40e_pf *pf = veb->pf;
6550 /* build VSI that owns this VEB, temporarily attached to base VEB */
6551 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6553 pf->vsi[v]->veb_idx == veb->idx &&
6554 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6555 ctl_vsi = pf->vsi[v];
6560 dev_info(&pf->pdev->dev,
6561 "missing owner VSI for veb_idx %d\n", veb->idx);
6563 goto end_reconstitute;
6565 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6566 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6567 ret = i40e_add_vsi(ctl_vsi);
6569 dev_info(&pf->pdev->dev,
6570 "rebuild of veb_idx %d owner VSI failed: %d\n",
6572 goto end_reconstitute;
6574 i40e_vsi_reset_stats(ctl_vsi);
6576 /* create the VEB in the switch and move the VSI onto the VEB */
6577 ret = i40e_add_veb(veb, ctl_vsi);
6579 goto end_reconstitute;
6581 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6582 veb->bridge_mode = BRIDGE_MODE_VEB;
6584 veb->bridge_mode = BRIDGE_MODE_VEPA;
6585 i40e_config_bridge_mode(veb);
6587 /* create the remaining VSIs attached to this VEB */
6588 for (v = 0; v < pf->num_alloc_vsi; v++) {
6589 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6592 if (pf->vsi[v]->veb_idx == veb->idx) {
6593 struct i40e_vsi *vsi = pf->vsi[v];
6595 vsi->uplink_seid = veb->seid;
6596 ret = i40e_add_vsi(vsi);
6598 dev_info(&pf->pdev->dev,
6599 "rebuild of vsi_idx %d failed: %d\n",
6601 goto end_reconstitute;
6603 i40e_vsi_reset_stats(vsi);
6607 /* create any VEBs attached to this VEB - RECURSION */
6608 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6609 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6610 pf->veb[veb_idx]->uplink_seid = veb->seid;
6611 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6622 * i40e_get_capabilities - get info about the HW
6623 * @pf: the PF struct
6625 static int i40e_get_capabilities(struct i40e_pf *pf)
6627 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6632 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6634 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6638 /* this loads the data into the hw struct for us */
6639 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6641 i40e_aqc_opc_list_func_capabilities,
6643 /* data loaded, buffer no longer needed */
6646 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6647 /* retry with a larger buffer */
6648 buf_len = data_size;
6649 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {
6650 dev_info(&pf->pdev->dev,
6651 "capability discovery failed, err %s aq_err %s\n",
6652 i40e_stat_str(&pf->hw, err),
6653 i40e_aq_str(&pf->hw,
6654 pf->hw.aq.asq_last_status));
6659 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6660 dev_info(&pf->pdev->dev,
6661 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6662 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6663 pf->hw.func_caps.num_msix_vectors,
6664 pf->hw.func_caps.num_msix_vectors_vf,
6665 pf->hw.func_caps.fd_filters_guaranteed,
6666 pf->hw.func_caps.fd_filters_best_effort,
6667 pf->hw.func_caps.num_tx_qp,
6668 pf->hw.func_caps.num_vsis);
6670 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6671 + pf->hw.func_caps.num_vfs)
6672 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6673 dev_info(&pf->pdev->dev,
6674 "got num_vsis %d, setting num_vsis to %d\n",
6675 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6676 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6682 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6685 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6686 * @pf: board private structure
6688 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6690 struct i40e_vsi *vsi;
6693 /* quick workaround for an NVM issue that leaves a critical register
6696 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6697 static const u32 hkey[] = {
6698 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6699 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6700 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6703 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6704 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6707 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6710 /* find existing VSI and see if it needs configuring */
6712 for (i = 0; i < pf->num_alloc_vsi; i++) {
6713 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6719 /* create a new VSI if none exists */
6721 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6722 pf->vsi[pf->lan_vsi]->seid, 0);
6724 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6725 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6730 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6734 * i40e_fdir_teardown - release the Flow Director resources
6735 * @pf: board private structure
6737 static void i40e_fdir_teardown(struct i40e_pf *pf)
6741 i40e_fdir_filter_exit(pf);
6742 for (i = 0; i < pf->num_alloc_vsi; i++) {
6743 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6744 i40e_vsi_release(pf->vsi[i]);
6751 * i40e_prep_for_reset - prep for the core to reset
6752 * @pf: board private structure
6754 * Close up the VFs and other things in prep for PF Reset.
6756 static void i40e_prep_for_reset(struct i40e_pf *pf)
6758 struct i40e_hw *hw = &pf->hw;
6759 i40e_status ret = 0;
6762 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6763 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6765 if (i40e_check_asq_alive(&pf->hw))
6766 i40e_vc_notify_reset(pf);
6768 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6770 /* quiesce the VSIs and their queues that are not already DOWN */
6771 i40e_pf_quiesce_all_vsi(pf);
6773 for (v = 0; v < pf->num_alloc_vsi; v++) {
6775 pf->vsi[v]->seid = 0;
6778 i40e_shutdown_adminq(&pf->hw);
6780 /* call shutdown HMC */
6781 if (hw->hmc.hmc_obj) {
6782 ret = i40e_shutdown_lan_hmc(hw);
6784 dev_warn(&pf->pdev->dev,
6785 "shutdown_lan_hmc failed: %d\n", ret);
6790 * i40e_send_version - update firmware with driver version
6793 static void i40e_send_version(struct i40e_pf *pf)
6795 struct i40e_driver_version dv;
6797 dv.major_version = DRV_VERSION_MAJOR;
6798 dv.minor_version = DRV_VERSION_MINOR;
6799 dv.build_version = DRV_VERSION_BUILD;
6800 dv.subbuild_version = 0;
6801 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6802 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6806 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6807 * @pf: board private structure
6808 * @reinit: if the Main VSI needs to re-initialized.
6810 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6812 struct i40e_hw *hw = &pf->hw;
6813 u8 set_fc_aq_fail = 0;
6818 /* Now we wait for GRST to settle out.
6819 * We don't have to delete the VEBs or VSIs from the hw switch
6820 * because the reset will make them disappear.
6822 ret = i40e_pf_reset(hw);
6824 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6825 set_bit(__I40E_RESET_FAILED, &pf->state);
6826 goto clear_recovery;
6830 if (test_bit(__I40E_DOWN, &pf->state))
6831 goto clear_recovery;
6832 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6834 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6835 ret = i40e_init_adminq(&pf->hw);
6837 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6838 i40e_stat_str(&pf->hw, ret),
6839 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6840 goto clear_recovery;
6843 /* re-verify the eeprom if we just had an EMP reset */
6844 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6845 i40e_verify_eeprom(pf);
6847 i40e_clear_pxe_mode(hw);
6848 ret = i40e_get_capabilities(pf);
6850 goto end_core_reset;
6852 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6853 hw->func_caps.num_rx_qp,
6854 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6856 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6857 goto end_core_reset;
6859 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6861 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6862 goto end_core_reset;
6865 #ifdef CONFIG_I40E_DCB
6866 ret = i40e_init_pf_dcb(pf);
6868 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6869 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6870 /* Continue without DCB enabled */
6872 #endif /* CONFIG_I40E_DCB */
6874 i40e_init_pf_fcoe(pf);
6877 /* do basic switch setup */
6878 ret = i40e_setup_pf_switch(pf, reinit);
6880 goto end_core_reset;
6882 /* The driver only wants link up/down and module qualification
6883 * reports from firmware. Note the negative logic.
6885 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6886 ~(I40E_AQ_EVENT_LINK_UPDOWN |
6887 I40E_AQ_EVENT_MEDIA_NA |
6888 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
6890 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6891 i40e_stat_str(&pf->hw, ret),
6892 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6894 /* make sure our flow control settings are restored */
6895 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6897 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6898 i40e_stat_str(&pf->hw, ret),
6899 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6901 /* Rebuild the VSIs and VEBs that existed before reset.
6902 * They are still in our local switch element arrays, so only
6903 * need to rebuild the switch model in the HW.
6905 * If there were VEBs but the reconstitution failed, we'll try
6906 * try to recover minimal use by getting the basic PF VSI working.
6908 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6909 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6910 /* find the one VEB connected to the MAC, and find orphans */
6911 for (v = 0; v < I40E_MAX_VEB; v++) {
6915 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6916 pf->veb[v]->uplink_seid == 0) {
6917 ret = i40e_reconstitute_veb(pf->veb[v]);
6922 /* If Main VEB failed, we're in deep doodoo,
6923 * so give up rebuilding the switch and set up
6924 * for minimal rebuild of PF VSI.
6925 * If orphan failed, we'll report the error
6926 * but try to keep going.
6928 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6929 dev_info(&pf->pdev->dev,
6930 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6932 pf->vsi[pf->lan_vsi]->uplink_seid
6935 } else if (pf->veb[v]->uplink_seid == 0) {
6936 dev_info(&pf->pdev->dev,
6937 "rebuild of orphan VEB failed: %d\n",
6944 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6945 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6946 /* no VEB, so rebuild only the Main VSI */
6947 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6949 dev_info(&pf->pdev->dev,
6950 "rebuild of Main VSI failed: %d\n", ret);
6951 goto end_core_reset;
6955 /* Reconfigure hardware for allowing smaller MSS in the case
6956 * of TSO, so that we avoid the MDD being fired and causing
6957 * a reset in the case of small MSS+TSO.
6959 #define I40E_REG_MSS 0x000E64DC
6960 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6961 #define I40E_64BYTE_MSS 0x400000
6962 val = rd32(hw, I40E_REG_MSS);
6963 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6964 val &= ~I40E_REG_MSS_MIN_MASK;
6965 val |= I40E_64BYTE_MSS;
6966 wr32(hw, I40E_REG_MSS, val);
6969 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
6971 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6973 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6974 i40e_stat_str(&pf->hw, ret),
6975 i40e_aq_str(&pf->hw,
6976 pf->hw.aq.asq_last_status));
6978 /* reinit the misc interrupt */
6979 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6980 ret = i40e_setup_misc_vector(pf);
6982 /* Add a filter to drop all Flow control frames from any VSI from being
6983 * transmitted. By doing so we stop a malicious VF from sending out
6984 * PAUSE or PFC frames and potentially controlling traffic for other
6986 * The FW can still send Flow control frames if enabled.
6988 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6991 /* restart the VSIs that were rebuilt and running before the reset */
6992 i40e_pf_unquiesce_all_vsi(pf);
6994 if (pf->num_alloc_vfs) {
6995 for (v = 0; v < pf->num_alloc_vfs; v++)
6996 i40e_reset_vf(&pf->vf[v], true);
6999 /* tell the firmware that we're starting */
7000 i40e_send_version(pf);
7003 clear_bit(__I40E_RESET_FAILED, &pf->state);
7005 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
7009 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
7010 * @pf: board private structure
7012 * Close up the VFs and other things in prep for a Core Reset,
7013 * then get ready to rebuild the world.
7015 static void i40e_handle_reset_warning(struct i40e_pf *pf)
7017 i40e_prep_for_reset(pf);
7018 i40e_reset_and_rebuild(pf, false);
7022 * i40e_handle_mdd_event
7023 * @pf: pointer to the PF structure
7025 * Called from the MDD irq handler to identify possibly malicious vfs
7027 static void i40e_handle_mdd_event(struct i40e_pf *pf)
7029 struct i40e_hw *hw = &pf->hw;
7030 bool mdd_detected = false;
7031 bool pf_mdd_detected = false;
7036 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
7039 /* find what triggered the MDD event */
7040 reg = rd32(hw, I40E_GL_MDET_TX);
7041 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
7042 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
7043 I40E_GL_MDET_TX_PF_NUM_SHIFT;
7044 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
7045 I40E_GL_MDET_TX_VF_NUM_SHIFT;
7046 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
7047 I40E_GL_MDET_TX_EVENT_SHIFT;
7048 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
7049 I40E_GL_MDET_TX_QUEUE_SHIFT) -
7050 pf->hw.func_caps.base_queue;
7051 if (netif_msg_tx_err(pf))
7052 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
7053 event, queue, pf_num, vf_num);
7054 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7055 mdd_detected = true;
7057 reg = rd32(hw, I40E_GL_MDET_RX);
7058 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7059 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7060 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7061 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7062 I40E_GL_MDET_RX_EVENT_SHIFT;
7063 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7064 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7065 pf->hw.func_caps.base_queue;
7066 if (netif_msg_rx_err(pf))
7067 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7068 event, queue, func);
7069 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7070 mdd_detected = true;
7074 reg = rd32(hw, I40E_PF_MDET_TX);
7075 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7076 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7077 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7078 pf_mdd_detected = true;
7080 reg = rd32(hw, I40E_PF_MDET_RX);
7081 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7082 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7083 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7084 pf_mdd_detected = true;
7086 /* Queue belongs to the PF, initiate a reset */
7087 if (pf_mdd_detected) {
7088 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7089 i40e_service_event_schedule(pf);
7093 /* see if one of the VFs needs its hand slapped */
7094 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7096 reg = rd32(hw, I40E_VP_MDET_TX(i));
7097 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7098 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7099 vf->num_mdd_events++;
7100 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7104 reg = rd32(hw, I40E_VP_MDET_RX(i));
7105 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7106 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7107 vf->num_mdd_events++;
7108 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7112 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7113 dev_info(&pf->pdev->dev,
7114 "Too many MDD events on VF %d, disabled\n", i);
7115 dev_info(&pf->pdev->dev,
7116 "Use PF Control I/F to re-enable the VF\n");
7117 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7121 /* re-enable mdd interrupt cause */
7122 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7123 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7124 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7125 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7130 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7131 * @pf: board private structure
7133 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7135 struct i40e_hw *hw = &pf->hw;
7140 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7143 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7145 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7146 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7147 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7148 port = pf->udp_ports[i].index;
7150 ret = i40e_aq_add_udp_tunnel(hw, port,
7151 pf->udp_ports[i].type,
7154 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7157 dev_dbg(&pf->pdev->dev,
7158 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7159 pf->udp_ports[i].type ? "vxlan" : "geneve",
7160 port ? "add" : "delete",
7162 i40e_stat_str(&pf->hw, ret),
7163 i40e_aq_str(&pf->hw,
7164 pf->hw.aq.asq_last_status));
7165 pf->udp_ports[i].index = 0;
7172 * i40e_service_task - Run the driver's async subtasks
7173 * @work: pointer to work_struct containing our data
7175 static void i40e_service_task(struct work_struct *work)
7177 struct i40e_pf *pf = container_of(work,
7180 unsigned long start_time = jiffies;
7182 /* don't bother with service tasks if a reset is in progress */
7183 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7184 i40e_service_event_complete(pf);
7188 i40e_detect_recover_hung(pf);
7189 i40e_sync_filters_subtask(pf);
7190 i40e_reset_subtask(pf);
7191 i40e_handle_mdd_event(pf);
7192 i40e_vc_process_vflr_event(pf);
7193 i40e_watchdog_subtask(pf);
7194 i40e_fdir_reinit_subtask(pf);
7195 i40e_client_subtask(pf);
7196 i40e_sync_filters_subtask(pf);
7197 i40e_sync_udp_filters_subtask(pf);
7198 i40e_clean_adminq_subtask(pf);
7200 i40e_service_event_complete(pf);
7202 /* If the tasks have taken longer than one timer cycle or there
7203 * is more work to be done, reschedule the service task now
7204 * rather than wait for the timer to tick again.
7206 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7207 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7208 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7209 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7210 i40e_service_event_schedule(pf);
7214 * i40e_service_timer - timer callback
7215 * @data: pointer to PF struct
7217 static void i40e_service_timer(unsigned long data)
7219 struct i40e_pf *pf = (struct i40e_pf *)data;
7221 mod_timer(&pf->service_timer,
7222 round_jiffies(jiffies + pf->service_timer_period));
7223 i40e_service_event_schedule(pf);
7227 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7228 * @vsi: the VSI being configured
7230 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7232 struct i40e_pf *pf = vsi->back;
7234 switch (vsi->type) {
7236 vsi->alloc_queue_pairs = pf->num_lan_qps;
7237 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7238 I40E_REQ_DESCRIPTOR_MULTIPLE);
7239 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7240 vsi->num_q_vectors = pf->num_lan_msix;
7242 vsi->num_q_vectors = 1;
7247 vsi->alloc_queue_pairs = 1;
7248 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7249 I40E_REQ_DESCRIPTOR_MULTIPLE);
7250 vsi->num_q_vectors = pf->num_fdsb_msix;
7253 case I40E_VSI_VMDQ2:
7254 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7255 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7256 I40E_REQ_DESCRIPTOR_MULTIPLE);
7257 vsi->num_q_vectors = pf->num_vmdq_msix;
7260 case I40E_VSI_SRIOV:
7261 vsi->alloc_queue_pairs = pf->num_vf_qps;
7262 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7263 I40E_REQ_DESCRIPTOR_MULTIPLE);
7268 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7269 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7270 I40E_REQ_DESCRIPTOR_MULTIPLE);
7271 vsi->num_q_vectors = pf->num_fcoe_msix;
7274 #endif /* I40E_FCOE */
7284 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7285 * @type: VSI pointer
7286 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7288 * On error: returns error code (negative)
7289 * On success: returns 0
7291 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7296 /* allocate memory for both Tx and Rx ring pointers */
7297 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7298 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7301 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7303 if (alloc_qvectors) {
7304 /* allocate memory for q_vector pointers */
7305 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7306 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7307 if (!vsi->q_vectors) {
7315 kfree(vsi->tx_rings);
7320 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7321 * @pf: board private structure
7322 * @type: type of VSI
7324 * On error: returns error code (negative)
7325 * On success: returns vsi index in PF (positive)
7327 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7330 struct i40e_vsi *vsi;
7334 /* Need to protect the allocation of the VSIs at the PF level */
7335 mutex_lock(&pf->switch_mutex);
7337 /* VSI list may be fragmented if VSI creation/destruction has
7338 * been happening. We can afford to do a quick scan to look
7339 * for any free VSIs in the list.
7341 * find next empty vsi slot, looping back around if necessary
7344 while (i < pf->num_alloc_vsi && pf->vsi[i])
7346 if (i >= pf->num_alloc_vsi) {
7348 while (i < pf->next_vsi && pf->vsi[i])
7352 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7353 vsi_idx = i; /* Found one! */
7356 goto unlock_pf; /* out of VSI slots! */
7360 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7367 set_bit(__I40E_DOWN, &vsi->state);
7370 vsi->int_rate_limit = 0;
7371 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7372 pf->rss_table_size : 64;
7373 vsi->netdev_registered = false;
7374 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7375 INIT_LIST_HEAD(&vsi->mac_filter_list);
7376 vsi->irqs_ready = false;
7378 ret = i40e_set_num_rings_in_vsi(vsi);
7382 ret = i40e_vsi_alloc_arrays(vsi, true);
7386 /* Setup default MSIX irq handler for VSI */
7387 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7389 /* Initialize VSI lock */
7390 spin_lock_init(&vsi->mac_filter_list_lock);
7391 pf->vsi[vsi_idx] = vsi;
7396 pf->next_vsi = i - 1;
7399 mutex_unlock(&pf->switch_mutex);
7404 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7405 * @type: VSI pointer
7406 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7408 * On error: returns error code (negative)
7409 * On success: returns 0
7411 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7413 /* free the ring and vector containers */
7414 if (free_qvectors) {
7415 kfree(vsi->q_vectors);
7416 vsi->q_vectors = NULL;
7418 kfree(vsi->tx_rings);
7419 vsi->tx_rings = NULL;
7420 vsi->rx_rings = NULL;
7424 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7426 * @vsi: Pointer to VSI structure
7428 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7433 kfree(vsi->rss_hkey_user);
7434 vsi->rss_hkey_user = NULL;
7436 kfree(vsi->rss_lut_user);
7437 vsi->rss_lut_user = NULL;
7441 * i40e_vsi_clear - Deallocate the VSI provided
7442 * @vsi: the VSI being un-configured
7444 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7455 mutex_lock(&pf->switch_mutex);
7456 if (!pf->vsi[vsi->idx]) {
7457 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7458 vsi->idx, vsi->idx, vsi, vsi->type);
7462 if (pf->vsi[vsi->idx] != vsi) {
7463 dev_err(&pf->pdev->dev,
7464 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7465 pf->vsi[vsi->idx]->idx,
7467 pf->vsi[vsi->idx]->type,
7468 vsi->idx, vsi, vsi->type);
7472 /* updates the PF for this cleared vsi */
7473 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7474 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7476 i40e_vsi_free_arrays(vsi, true);
7477 i40e_clear_rss_config_user(vsi);
7479 pf->vsi[vsi->idx] = NULL;
7480 if (vsi->idx < pf->next_vsi)
7481 pf->next_vsi = vsi->idx;
7484 mutex_unlock(&pf->switch_mutex);
7492 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7493 * @vsi: the VSI being cleaned
7495 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7499 if (vsi->tx_rings && vsi->tx_rings[0]) {
7500 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7501 kfree_rcu(vsi->tx_rings[i], rcu);
7502 vsi->tx_rings[i] = NULL;
7503 vsi->rx_rings[i] = NULL;
7509 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7510 * @vsi: the VSI being configured
7512 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7514 struct i40e_ring *tx_ring, *rx_ring;
7515 struct i40e_pf *pf = vsi->back;
7518 /* Set basic values in the rings to be used later during open() */
7519 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7520 /* allocate space for both Tx and Rx in one shot */
7521 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7525 tx_ring->queue_index = i;
7526 tx_ring->reg_idx = vsi->base_queue + i;
7527 tx_ring->ring_active = false;
7529 tx_ring->netdev = vsi->netdev;
7530 tx_ring->dev = &pf->pdev->dev;
7531 tx_ring->count = vsi->num_desc;
7533 tx_ring->dcb_tc = 0;
7534 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7535 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7536 tx_ring->tx_itr_setting = pf->tx_itr_default;
7537 vsi->tx_rings[i] = tx_ring;
7539 rx_ring = &tx_ring[1];
7540 rx_ring->queue_index = i;
7541 rx_ring->reg_idx = vsi->base_queue + i;
7542 rx_ring->ring_active = false;
7544 rx_ring->netdev = vsi->netdev;
7545 rx_ring->dev = &pf->pdev->dev;
7546 rx_ring->count = vsi->num_desc;
7548 rx_ring->dcb_tc = 0;
7549 rx_ring->rx_itr_setting = pf->rx_itr_default;
7550 vsi->rx_rings[i] = rx_ring;
7556 i40e_vsi_clear_rings(vsi);
7561 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7562 * @pf: board private structure
7563 * @vectors: the number of MSI-X vectors to request
7565 * Returns the number of vectors reserved, or error
7567 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7569 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7570 I40E_MIN_MSIX, vectors);
7572 dev_info(&pf->pdev->dev,
7573 "MSI-X vector reservation failed: %d\n", vectors);
7581 * i40e_init_msix - Setup the MSIX capability
7582 * @pf: board private structure
7584 * Work with the OS to set up the MSIX vectors needed.
7586 * Returns the number of vectors reserved or negative on failure
7588 static int i40e_init_msix(struct i40e_pf *pf)
7590 struct i40e_hw *hw = &pf->hw;
7594 int iwarp_requested = 0;
7596 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7599 /* The number of vectors we'll request will be comprised of:
7600 * - Add 1 for "other" cause for Admin Queue events, etc.
7601 * - The number of LAN queue pairs
7602 * - Queues being used for RSS.
7603 * We don't need as many as max_rss_size vectors.
7604 * use rss_size instead in the calculation since that
7605 * is governed by number of cpus in the system.
7606 * - assumes symmetric Tx/Rx pairing
7607 * - The number of VMDq pairs
7608 * - The CPU count within the NUMA node if iWARP is enabled
7610 * - The number of FCOE qps.
7612 * Once we count this up, try the request.
7614 * If we can't get what we want, we'll simplify to nearly nothing
7615 * and try again. If that still fails, we punt.
7617 vectors_left = hw->func_caps.num_msix_vectors;
7620 /* reserve one vector for miscellaneous handler */
7626 /* reserve vectors for the main PF traffic queues */
7627 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7628 vectors_left -= pf->num_lan_msix;
7629 v_budget += pf->num_lan_msix;
7631 /* reserve one vector for sideband flow director */
7632 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7634 pf->num_fdsb_msix = 1;
7638 pf->num_fdsb_msix = 0;
7643 /* can we reserve enough for FCoE? */
7644 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7646 pf->num_fcoe_msix = 0;
7647 else if (vectors_left >= pf->num_fcoe_qps)
7648 pf->num_fcoe_msix = pf->num_fcoe_qps;
7650 pf->num_fcoe_msix = 1;
7651 v_budget += pf->num_fcoe_msix;
7652 vectors_left -= pf->num_fcoe_msix;
7656 /* can we reserve enough for iWARP? */
7657 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7658 iwarp_requested = pf->num_iwarp_msix;
7661 pf->num_iwarp_msix = 0;
7662 else if (vectors_left < pf->num_iwarp_msix)
7663 pf->num_iwarp_msix = 1;
7664 v_budget += pf->num_iwarp_msix;
7665 vectors_left -= pf->num_iwarp_msix;
7668 /* any vectors left over go for VMDq support */
7669 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7670 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7671 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7673 if (!vectors_left) {
7674 pf->num_vmdq_msix = 0;
7675 pf->num_vmdq_qps = 0;
7677 /* if we're short on vectors for what's desired, we limit
7678 * the queues per vmdq. If this is still more than are
7679 * available, the user will need to change the number of
7680 * queues/vectors used by the PF later with the ethtool
7683 if (vmdq_vecs < vmdq_vecs_wanted)
7684 pf->num_vmdq_qps = 1;
7685 pf->num_vmdq_msix = pf->num_vmdq_qps;
7687 v_budget += vmdq_vecs;
7688 vectors_left -= vmdq_vecs;
7692 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7694 if (!pf->msix_entries)
7697 for (i = 0; i < v_budget; i++)
7698 pf->msix_entries[i].entry = i;
7699 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7701 if (v_actual < I40E_MIN_MSIX) {
7702 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7703 kfree(pf->msix_entries);
7704 pf->msix_entries = NULL;
7705 pci_disable_msix(pf->pdev);
7708 } else if (v_actual == I40E_MIN_MSIX) {
7709 /* Adjust for minimal MSIX use */
7710 pf->num_vmdq_vsis = 0;
7711 pf->num_vmdq_qps = 0;
7712 pf->num_lan_qps = 1;
7713 pf->num_lan_msix = 1;
7715 } else if (!vectors_left) {
7716 /* If we have limited resources, we will start with no vectors
7717 * for the special features and then allocate vectors to some
7718 * of these features based on the policy and at the end disable
7719 * the features that did not get any vectors.
7723 dev_info(&pf->pdev->dev,
7724 "MSI-X vector limit reached, attempting to redistribute vectors\n");
7725 /* reserve the misc vector */
7728 /* Scale vector usage down */
7729 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7730 pf->num_vmdq_vsis = 1;
7731 pf->num_vmdq_qps = 1;
7733 pf->num_fcoe_qps = 0;
7734 pf->num_fcoe_msix = 0;
7737 /* partition out the remaining vectors */
7740 pf->num_lan_msix = 1;
7743 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7744 pf->num_lan_msix = 1;
7745 pf->num_iwarp_msix = 1;
7747 pf->num_lan_msix = 2;
7750 /* give one vector to FCoE */
7751 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7752 pf->num_lan_msix = 1;
7753 pf->num_fcoe_msix = 1;
7758 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7759 pf->num_iwarp_msix = min_t(int, (vec / 3),
7761 pf->num_vmdq_vsis = min_t(int, (vec / 3),
7762 I40E_DEFAULT_NUM_VMDQ_VSI);
7764 pf->num_vmdq_vsis = min_t(int, (vec / 2),
7765 I40E_DEFAULT_NUM_VMDQ_VSI);
7767 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7768 pf->num_fdsb_msix = 1;
7771 pf->num_lan_msix = min_t(int,
7772 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
7774 pf->num_lan_qps = pf->num_lan_msix;
7776 /* give one vector to FCoE */
7777 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7778 pf->num_fcoe_msix = 1;
7786 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
7787 (pf->num_fdsb_msix == 0)) {
7788 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
7789 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7791 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7792 (pf->num_vmdq_msix == 0)) {
7793 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7794 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7797 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
7798 (pf->num_iwarp_msix == 0)) {
7799 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
7800 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
7804 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7805 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7806 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7809 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
7810 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
7812 pf->num_vmdq_msix * pf->num_vmdq_vsis,
7814 pf->num_iwarp_msix);
7820 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7821 * @vsi: the VSI being configured
7822 * @v_idx: index of the vector in the vsi struct
7823 * @cpu: cpu to be used on affinity_mask
7825 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7827 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
7829 struct i40e_q_vector *q_vector;
7831 /* allocate q_vector */
7832 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7836 q_vector->vsi = vsi;
7837 q_vector->v_idx = v_idx;
7838 cpumask_set_cpu(cpu, &q_vector->affinity_mask);
7841 netif_napi_add(vsi->netdev, &q_vector->napi,
7842 i40e_napi_poll, NAPI_POLL_WEIGHT);
7844 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7845 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7847 /* tie q_vector and vsi together */
7848 vsi->q_vectors[v_idx] = q_vector;
7854 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7855 * @vsi: the VSI being configured
7857 * We allocate one q_vector per queue interrupt. If allocation fails we
7860 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7862 struct i40e_pf *pf = vsi->back;
7863 int err, v_idx, num_q_vectors, current_cpu;
7865 /* if not MSIX, give the one vector only to the LAN VSI */
7866 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7867 num_q_vectors = vsi->num_q_vectors;
7868 else if (vsi == pf->vsi[pf->lan_vsi])
7873 current_cpu = cpumask_first(cpu_online_mask);
7875 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7876 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
7879 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
7880 if (unlikely(current_cpu >= nr_cpu_ids))
7881 current_cpu = cpumask_first(cpu_online_mask);
7888 i40e_free_q_vector(vsi, v_idx);
7894 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7895 * @pf: board private structure to initialize
7897 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7902 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7903 vectors = i40e_init_msix(pf);
7905 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7906 I40E_FLAG_IWARP_ENABLED |
7908 I40E_FLAG_FCOE_ENABLED |
7910 I40E_FLAG_RSS_ENABLED |
7911 I40E_FLAG_DCB_CAPABLE |
7912 I40E_FLAG_DCB_ENABLED |
7913 I40E_FLAG_SRIOV_ENABLED |
7914 I40E_FLAG_FD_SB_ENABLED |
7915 I40E_FLAG_FD_ATR_ENABLED |
7916 I40E_FLAG_VMDQ_ENABLED);
7918 /* rework the queue expectations without MSIX */
7919 i40e_determine_queue_usage(pf);
7923 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7924 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7925 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7926 vectors = pci_enable_msi(pf->pdev);
7928 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7930 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7932 vectors = 1; /* one MSI or Legacy vector */
7935 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7936 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7938 /* set up vector assignment tracking */
7939 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7940 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7941 if (!pf->irq_pile) {
7942 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7945 pf->irq_pile->num_entries = vectors;
7946 pf->irq_pile->search_hint = 0;
7948 /* track first vector for misc interrupts, ignore return */
7949 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7955 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7956 * @pf: board private structure
7958 * This sets up the handler for MSIX 0, which is used to manage the
7959 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7960 * when in MSI or Legacy interrupt mode.
7962 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7964 struct i40e_hw *hw = &pf->hw;
7967 /* Only request the irq if this is the first time through, and
7968 * not when we're rebuilding after a Reset
7970 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7971 err = request_irq(pf->msix_entries[0].vector,
7972 i40e_intr, 0, pf->int_name, pf);
7974 dev_info(&pf->pdev->dev,
7975 "request_irq for %s failed: %d\n",
7981 i40e_enable_misc_int_causes(pf);
7983 /* associate no queues to the misc vector */
7984 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7985 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7989 i40e_irq_dynamic_enable_icr0(pf, true);
7995 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7996 * @vsi: vsi structure
7997 * @seed: RSS hash seed
7999 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8000 u8 *lut, u16 lut_size)
8002 struct i40e_pf *pf = vsi->back;
8003 struct i40e_hw *hw = &pf->hw;
8007 struct i40e_aqc_get_set_rss_key_data *seed_dw =
8008 (struct i40e_aqc_get_set_rss_key_data *)seed;
8009 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
8011 dev_info(&pf->pdev->dev,
8012 "Cannot set RSS key, err %s aq_err %s\n",
8013 i40e_stat_str(hw, ret),
8014 i40e_aq_str(hw, hw->aq.asq_last_status));
8019 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8021 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8023 dev_info(&pf->pdev->dev,
8024 "Cannot set RSS lut, err %s aq_err %s\n",
8025 i40e_stat_str(hw, ret),
8026 i40e_aq_str(hw, hw->aq.asq_last_status));
8034 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
8035 * @vsi: Pointer to vsi structure
8036 * @seed: Buffter to store the hash keys
8037 * @lut: Buffer to store the lookup table entries
8038 * @lut_size: Size of buffer to store the lookup table entries
8040 * Return 0 on success, negative on failure
8042 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8043 u8 *lut, u16 lut_size)
8045 struct i40e_pf *pf = vsi->back;
8046 struct i40e_hw *hw = &pf->hw;
8050 ret = i40e_aq_get_rss_key(hw, vsi->id,
8051 (struct i40e_aqc_get_set_rss_key_data *)seed);
8053 dev_info(&pf->pdev->dev,
8054 "Cannot get RSS key, err %s aq_err %s\n",
8055 i40e_stat_str(&pf->hw, ret),
8056 i40e_aq_str(&pf->hw,
8057 pf->hw.aq.asq_last_status));
8063 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8065 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8067 dev_info(&pf->pdev->dev,
8068 "Cannot get RSS lut, err %s aq_err %s\n",
8069 i40e_stat_str(&pf->hw, ret),
8070 i40e_aq_str(&pf->hw,
8071 pf->hw.aq.asq_last_status));
8080 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
8081 * @vsi: VSI structure
8083 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
8085 u8 seed[I40E_HKEY_ARRAY_SIZE];
8086 struct i40e_pf *pf = vsi->back;
8090 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
8094 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8095 vsi->num_queue_pairs);
8099 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8102 /* Use the user configured hash keys and lookup table if there is one,
8103 * otherwise use default
8105 if (vsi->rss_lut_user)
8106 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8108 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8109 if (vsi->rss_hkey_user)
8110 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8112 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8113 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
8120 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8121 * @vsi: Pointer to vsi structure
8122 * @seed: RSS hash seed
8123 * @lut: Lookup table
8124 * @lut_size: Lookup table size
8126 * Returns 0 on success, negative on failure
8128 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8129 const u8 *lut, u16 lut_size)
8131 struct i40e_pf *pf = vsi->back;
8132 struct i40e_hw *hw = &pf->hw;
8133 u16 vf_id = vsi->vf_id;
8136 /* Fill out hash function seed */
8138 u32 *seed_dw = (u32 *)seed;
8140 if (vsi->type == I40E_VSI_MAIN) {
8141 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8142 i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i),
8144 } else if (vsi->type == I40E_VSI_SRIOV) {
8145 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8146 i40e_write_rx_ctl(hw,
8147 I40E_VFQF_HKEY1(i, vf_id),
8150 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8155 u32 *lut_dw = (u32 *)lut;
8157 if (vsi->type == I40E_VSI_MAIN) {
8158 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8160 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8161 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8162 } else if (vsi->type == I40E_VSI_SRIOV) {
8163 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8165 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8166 i40e_write_rx_ctl(hw,
8167 I40E_VFQF_HLUT1(i, vf_id),
8170 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8179 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8180 * @vsi: Pointer to VSI structure
8181 * @seed: Buffer to store the keys
8182 * @lut: Buffer to store the lookup table entries
8183 * @lut_size: Size of buffer to store the lookup table entries
8185 * Returns 0 on success, negative on failure
8187 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8188 u8 *lut, u16 lut_size)
8190 struct i40e_pf *pf = vsi->back;
8191 struct i40e_hw *hw = &pf->hw;
8195 u32 *seed_dw = (u32 *)seed;
8197 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8198 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8201 u32 *lut_dw = (u32 *)lut;
8203 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8205 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8206 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8213 * i40e_config_rss - Configure RSS keys and lut
8214 * @vsi: Pointer to VSI structure
8215 * @seed: RSS hash seed
8216 * @lut: Lookup table
8217 * @lut_size: Lookup table size
8219 * Returns 0 on success, negative on failure
8221 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8223 struct i40e_pf *pf = vsi->back;
8225 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8226 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8228 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8232 * i40e_get_rss - Get RSS keys and lut
8233 * @vsi: Pointer to VSI structure
8234 * @seed: Buffer to store the keys
8235 * @lut: Buffer to store the lookup table entries
8236 * lut_size: Size of buffer to store the lookup table entries
8238 * Returns 0 on success, negative on failure
8240 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8242 struct i40e_pf *pf = vsi->back;
8244 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8245 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8247 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8251 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8252 * @pf: Pointer to board private structure
8253 * @lut: Lookup table
8254 * @rss_table_size: Lookup table size
8255 * @rss_size: Range of queue number for hashing
8257 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8258 u16 rss_table_size, u16 rss_size)
8262 for (i = 0; i < rss_table_size; i++)
8263 lut[i] = i % rss_size;
8267 * i40e_pf_config_rss - Prepare for RSS if used
8268 * @pf: board private structure
8270 static int i40e_pf_config_rss(struct i40e_pf *pf)
8272 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8273 u8 seed[I40E_HKEY_ARRAY_SIZE];
8275 struct i40e_hw *hw = &pf->hw;
8280 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8281 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8282 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8283 hena |= i40e_pf_get_default_rss_hena(pf);
8285 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8286 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8288 /* Determine the RSS table size based on the hardware capabilities */
8289 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8290 reg_val = (pf->rss_table_size == 512) ?
8291 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8292 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8293 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8295 /* Determine the RSS size of the VSI */
8297 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8298 vsi->num_queue_pairs);
8302 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8306 /* Use user configured lut if there is one, otherwise use default */
8307 if (vsi->rss_lut_user)
8308 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8310 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8312 /* Use user configured hash key if there is one, otherwise
8315 if (vsi->rss_hkey_user)
8316 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8318 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8319 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8326 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8327 * @pf: board private structure
8328 * @queue_count: the requested queue count for rss.
8330 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8331 * count which may be different from the requested queue count.
8333 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8335 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8338 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8341 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8343 if (queue_count != vsi->num_queue_pairs) {
8344 vsi->req_queue_pairs = queue_count;
8345 i40e_prep_for_reset(pf);
8347 pf->alloc_rss_size = new_rss_size;
8349 i40e_reset_and_rebuild(pf, true);
8351 /* Discard the user configured hash keys and lut, if less
8352 * queues are enabled.
8354 if (queue_count < vsi->rss_size) {
8355 i40e_clear_rss_config_user(vsi);
8356 dev_dbg(&pf->pdev->dev,
8357 "discard user configured hash keys and lut\n");
8360 /* Reset vsi->rss_size, as number of enabled queues changed */
8361 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8362 vsi->num_queue_pairs);
8364 i40e_pf_config_rss(pf);
8366 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8367 pf->alloc_rss_size, pf->rss_size_max);
8368 return pf->alloc_rss_size;
8372 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8373 * @pf: board private structure
8375 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8378 bool min_valid, max_valid;
8381 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8382 &min_valid, &max_valid);
8386 pf->npar_min_bw = min_bw;
8388 pf->npar_max_bw = max_bw;
8395 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8396 * @pf: board private structure
8398 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8400 struct i40e_aqc_configure_partition_bw_data bw_data;
8403 /* Set the valid bit for this PF */
8404 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8405 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8406 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8408 /* Set the new bandwidths */
8409 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8415 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8416 * @pf: board private structure
8418 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8420 /* Commit temporary BW setting to permanent NVM image */
8421 enum i40e_admin_queue_err last_aq_status;
8425 if (pf->hw.partition_id != 1) {
8426 dev_info(&pf->pdev->dev,
8427 "Commit BW only works on partition 1! This is partition %d",
8428 pf->hw.partition_id);
8429 ret = I40E_NOT_SUPPORTED;
8433 /* Acquire NVM for read access */
8434 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8435 last_aq_status = pf->hw.aq.asq_last_status;
8437 dev_info(&pf->pdev->dev,
8438 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8439 i40e_stat_str(&pf->hw, ret),
8440 i40e_aq_str(&pf->hw, last_aq_status));
8444 /* Read word 0x10 of NVM - SW compatibility word 1 */
8445 ret = i40e_aq_read_nvm(&pf->hw,
8446 I40E_SR_NVM_CONTROL_WORD,
8447 0x10, sizeof(nvm_word), &nvm_word,
8449 /* Save off last admin queue command status before releasing
8452 last_aq_status = pf->hw.aq.asq_last_status;
8453 i40e_release_nvm(&pf->hw);
8455 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8456 i40e_stat_str(&pf->hw, ret),
8457 i40e_aq_str(&pf->hw, last_aq_status));
8461 /* Wait a bit for NVM release to complete */
8464 /* Acquire NVM for write access */
8465 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8466 last_aq_status = pf->hw.aq.asq_last_status;
8468 dev_info(&pf->pdev->dev,
8469 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8470 i40e_stat_str(&pf->hw, ret),
8471 i40e_aq_str(&pf->hw, last_aq_status));
8474 /* Write it back out unchanged to initiate update NVM,
8475 * which will force a write of the shadow (alt) RAM to
8476 * the NVM - thus storing the bandwidth values permanently.
8478 ret = i40e_aq_update_nvm(&pf->hw,
8479 I40E_SR_NVM_CONTROL_WORD,
8480 0x10, sizeof(nvm_word),
8481 &nvm_word, true, NULL);
8482 /* Save off last admin queue command status before releasing
8485 last_aq_status = pf->hw.aq.asq_last_status;
8486 i40e_release_nvm(&pf->hw);
8488 dev_info(&pf->pdev->dev,
8489 "BW settings NOT SAVED, err %s aq_err %s\n",
8490 i40e_stat_str(&pf->hw, ret),
8491 i40e_aq_str(&pf->hw, last_aq_status));
8498 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8499 * @pf: board private structure to initialize
8501 * i40e_sw_init initializes the Adapter private data structure.
8502 * Fields are initialized based on PCI device information and
8503 * OS network device settings (MTU size).
8505 static int i40e_sw_init(struct i40e_pf *pf)
8511 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8512 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8513 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8514 if (I40E_DEBUG_USER & debug)
8515 pf->hw.debug_mask = debug;
8516 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8517 I40E_DEFAULT_MSG_ENABLE);
8520 /* Set default capability flags */
8521 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8522 I40E_FLAG_MSI_ENABLED |
8523 I40E_FLAG_MSIX_ENABLED;
8525 /* Set default ITR */
8526 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8527 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8529 /* Depending on PF configurations, it is possible that the RSS
8530 * maximum might end up larger than the available queues
8532 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8533 pf->alloc_rss_size = 1;
8534 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8535 pf->rss_size_max = min_t(int, pf->rss_size_max,
8536 pf->hw.func_caps.num_tx_qp);
8538 /* find the next higher power-of-2 of num cpus */
8539 pow = roundup_pow_of_two(num_online_cpus());
8540 pf->rss_size_max = min_t(int, pf->rss_size_max, pow);
8542 if (pf->hw.func_caps.rss) {
8543 pf->flags |= I40E_FLAG_RSS_ENABLED;
8544 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8548 /* MFP mode enabled */
8549 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8550 pf->flags |= I40E_FLAG_MFP_ENABLED;
8551 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8552 if (i40e_get_npar_bw_setting(pf))
8553 dev_warn(&pf->pdev->dev,
8554 "Could not get NPAR bw settings\n");
8556 dev_info(&pf->pdev->dev,
8557 "Min BW = %8.8x, Max BW = %8.8x\n",
8558 pf->npar_min_bw, pf->npar_max_bw);
8561 /* FW/NVM is not yet fixed in this regard */
8562 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8563 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8564 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8565 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8566 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8567 pf->hw.num_partitions > 1)
8568 dev_info(&pf->pdev->dev,
8569 "Flow Director Sideband mode Disabled in MFP mode\n");
8571 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8572 pf->fdir_pf_filter_count =
8573 pf->hw.func_caps.fd_filters_guaranteed;
8574 pf->hw.fdir_shared_filter_count =
8575 pf->hw.func_caps.fd_filters_best_effort;
8578 if (i40e_is_mac_710(&pf->hw) &&
8579 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8580 (pf->hw.aq.fw_maj_ver < 4))) {
8581 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8582 /* No DCB support for FW < v4.33 */
8583 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8586 /* Disable FW LLDP if FW < v4.3 */
8587 if (i40e_is_mac_710(&pf->hw) &&
8588 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8589 (pf->hw.aq.fw_maj_ver < 4)))
8590 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8592 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8593 if (i40e_is_mac_710(&pf->hw) &&
8594 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8595 (pf->hw.aq.fw_maj_ver >= 5)))
8596 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8598 if (pf->hw.func_caps.vmdq) {
8599 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8600 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8601 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8604 if (pf->hw.func_caps.iwarp) {
8605 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8606 /* IWARP needs one extra vector for CQP just like MISC.*/
8607 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8611 i40e_init_pf_fcoe(pf);
8613 #endif /* I40E_FCOE */
8614 #ifdef CONFIG_PCI_IOV
8615 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8616 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8617 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8618 pf->num_req_vfs = min_t(int,
8619 pf->hw.func_caps.num_vfs,
8622 #endif /* CONFIG_PCI_IOV */
8623 if (pf->hw.mac.type == I40E_MAC_X722) {
8624 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8625 I40E_FLAG_128_QP_RSS_CAPABLE |
8626 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8627 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8628 I40E_FLAG_WB_ON_ITR_CAPABLE |
8629 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8630 I40E_FLAG_NO_PCI_LINK_CHECK |
8631 I40E_FLAG_USE_SET_LLDP_MIB |
8632 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8633 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8634 ((pf->hw.aq.api_maj_ver == 1) &&
8635 (pf->hw.aq.api_min_ver > 4))) {
8636 /* Supported in FW API version higher than 1.4 */
8637 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8638 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8640 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8643 pf->eeprom_version = 0xDEAD;
8644 pf->lan_veb = I40E_NO_VEB;
8645 pf->lan_vsi = I40E_NO_VSI;
8647 /* By default FW has this off for performance reasons */
8648 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8650 /* set up queue assignment tracking */
8651 size = sizeof(struct i40e_lump_tracking)
8652 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8653 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8658 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8659 pf->qp_pile->search_hint = 0;
8661 pf->tx_timeout_recovery_level = 1;
8663 mutex_init(&pf->switch_mutex);
8665 /* If NPAR is enabled nudge the Tx scheduler */
8666 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8667 i40e_set_npar_bw_setting(pf);
8674 * i40e_set_ntuple - set the ntuple feature flag and take action
8675 * @pf: board private structure to initialize
8676 * @features: the feature set that the stack is suggesting
8678 * returns a bool to indicate if reset needs to happen
8680 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8682 bool need_reset = false;
8684 /* Check if Flow Director n-tuple support was enabled or disabled. If
8685 * the state changed, we need to reset.
8687 if (features & NETIF_F_NTUPLE) {
8688 /* Enable filters and mark for reset */
8689 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8691 /* enable FD_SB only if there is MSI-X vector */
8692 if (pf->num_fdsb_msix > 0)
8693 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8695 /* turn off filters, mark for reset and clear SW filter list */
8696 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8698 i40e_fdir_filter_exit(pf);
8700 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8701 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8702 /* reset fd counters */
8703 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8704 pf->fdir_pf_active_filters = 0;
8705 /* if ATR was auto disabled it can be re-enabled. */
8706 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8707 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
8708 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8709 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8710 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8717 * i40e_clear_rss_lut - clear the rx hash lookup table
8718 * @vsi: the VSI being configured
8720 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
8722 struct i40e_pf *pf = vsi->back;
8723 struct i40e_hw *hw = &pf->hw;
8724 u16 vf_id = vsi->vf_id;
8727 if (vsi->type == I40E_VSI_MAIN) {
8728 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8729 wr32(hw, I40E_PFQF_HLUT(i), 0);
8730 } else if (vsi->type == I40E_VSI_SRIOV) {
8731 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8732 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
8734 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8739 * i40e_set_features - set the netdev feature flags
8740 * @netdev: ptr to the netdev being adjusted
8741 * @features: the feature set that the stack is suggesting
8743 static int i40e_set_features(struct net_device *netdev,
8744 netdev_features_t features)
8746 struct i40e_netdev_priv *np = netdev_priv(netdev);
8747 struct i40e_vsi *vsi = np->vsi;
8748 struct i40e_pf *pf = vsi->back;
8751 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
8752 i40e_pf_config_rss(pf);
8753 else if (!(features & NETIF_F_RXHASH) &&
8754 netdev->features & NETIF_F_RXHASH)
8755 i40e_clear_rss_lut(vsi);
8757 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8758 i40e_vlan_stripping_enable(vsi);
8760 i40e_vlan_stripping_disable(vsi);
8762 need_reset = i40e_set_ntuple(pf, features);
8765 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8771 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8772 * @pf: board private structure
8773 * @port: The UDP port to look up
8775 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8777 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8781 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8782 if (pf->udp_ports[i].index == port)
8790 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
8791 * @netdev: This physical port's netdev
8792 * @ti: Tunnel endpoint information
8794 static void i40e_udp_tunnel_add(struct net_device *netdev,
8795 struct udp_tunnel_info *ti)
8797 struct i40e_netdev_priv *np = netdev_priv(netdev);
8798 struct i40e_vsi *vsi = np->vsi;
8799 struct i40e_pf *pf = vsi->back;
8800 __be16 port = ti->port;
8804 idx = i40e_get_udp_port_idx(pf, port);
8806 /* Check if port already exists */
8807 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8808 netdev_info(netdev, "port %d already offloaded\n",
8813 /* Now check if there is space to add the new port */
8814 next_idx = i40e_get_udp_port_idx(pf, 0);
8816 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8817 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
8823 case UDP_TUNNEL_TYPE_VXLAN:
8824 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8826 case UDP_TUNNEL_TYPE_GENEVE:
8827 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8829 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8835 /* New port: add it and mark its index in the bitmap */
8836 pf->udp_ports[next_idx].index = port;
8837 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8838 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8842 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
8843 * @netdev: This physical port's netdev
8844 * @ti: Tunnel endpoint information
8846 static void i40e_udp_tunnel_del(struct net_device *netdev,
8847 struct udp_tunnel_info *ti)
8849 struct i40e_netdev_priv *np = netdev_priv(netdev);
8850 struct i40e_vsi *vsi = np->vsi;
8851 struct i40e_pf *pf = vsi->back;
8852 __be16 port = ti->port;
8855 idx = i40e_get_udp_port_idx(pf, port);
8857 /* Check if port already exists */
8858 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
8862 case UDP_TUNNEL_TYPE_VXLAN:
8863 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
8866 case UDP_TUNNEL_TYPE_GENEVE:
8867 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
8874 /* if port exists, set it to 0 (mark for deletion)
8875 * and make it pending
8877 pf->udp_ports[idx].index = 0;
8878 pf->pending_udp_bitmap |= BIT_ULL(idx);
8879 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8883 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
8887 static int i40e_get_phys_port_id(struct net_device *netdev,
8888 struct netdev_phys_item_id *ppid)
8890 struct i40e_netdev_priv *np = netdev_priv(netdev);
8891 struct i40e_pf *pf = np->vsi->back;
8892 struct i40e_hw *hw = &pf->hw;
8894 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8897 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8898 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8904 * i40e_ndo_fdb_add - add an entry to the hardware database
8905 * @ndm: the input from the stack
8906 * @tb: pointer to array of nladdr (unused)
8907 * @dev: the net device pointer
8908 * @addr: the MAC address entry being added
8909 * @flags: instructions from stack about fdb operation
8911 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8912 struct net_device *dev,
8913 const unsigned char *addr, u16 vid,
8916 struct i40e_netdev_priv *np = netdev_priv(dev);
8917 struct i40e_pf *pf = np->vsi->back;
8920 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8924 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8928 /* Hardware does not support aging addresses so if a
8929 * ndm_state is given only allow permanent addresses
8931 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8932 netdev_info(dev, "FDB only supports static addresses\n");
8936 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8937 err = dev_uc_add_excl(dev, addr);
8938 else if (is_multicast_ether_addr(addr))
8939 err = dev_mc_add_excl(dev, addr);
8943 /* Only return duplicate errors if NLM_F_EXCL is set */
8944 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8951 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8952 * @dev: the netdev being configured
8953 * @nlh: RTNL message
8955 * Inserts a new hardware bridge if not already created and
8956 * enables the bridging mode requested (VEB or VEPA). If the
8957 * hardware bridge has already been inserted and the request
8958 * is to change the mode then that requires a PF reset to
8959 * allow rebuild of the components with required hardware
8960 * bridge mode enabled.
8962 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8963 struct nlmsghdr *nlh,
8966 struct i40e_netdev_priv *np = netdev_priv(dev);
8967 struct i40e_vsi *vsi = np->vsi;
8968 struct i40e_pf *pf = vsi->back;
8969 struct i40e_veb *veb = NULL;
8970 struct nlattr *attr, *br_spec;
8973 /* Only for PF VSI for now */
8974 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8977 /* Find the HW bridge for PF VSI */
8978 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8979 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8983 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8985 nla_for_each_nested(attr, br_spec, rem) {
8988 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8991 mode = nla_get_u16(attr);
8992 if ((mode != BRIDGE_MODE_VEPA) &&
8993 (mode != BRIDGE_MODE_VEB))
8996 /* Insert a new HW bridge */
8998 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8999 vsi->tc_config.enabled_tc);
9001 veb->bridge_mode = mode;
9002 i40e_config_bridge_mode(veb);
9004 /* No Bridge HW offload available */
9008 } else if (mode != veb->bridge_mode) {
9009 /* Existing HW bridge but different mode needs reset */
9010 veb->bridge_mode = mode;
9011 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
9012 if (mode == BRIDGE_MODE_VEB)
9013 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
9015 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9016 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9025 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
9028 * @seq: RTNL message seq #
9029 * @dev: the netdev being configured
9030 * @filter_mask: unused
9031 * @nlflags: netlink flags passed in
9033 * Return the mode in which the hardware bridge is operating in
9036 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9037 struct net_device *dev,
9038 u32 __always_unused filter_mask,
9041 struct i40e_netdev_priv *np = netdev_priv(dev);
9042 struct i40e_vsi *vsi = np->vsi;
9043 struct i40e_pf *pf = vsi->back;
9044 struct i40e_veb *veb = NULL;
9047 /* Only for PF VSI for now */
9048 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9051 /* Find the HW bridge for the PF VSI */
9052 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9053 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9060 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
9061 0, 0, nlflags, filter_mask, NULL);
9065 * i40e_features_check - Validate encapsulated packet conforms to limits
9067 * @dev: This physical port's netdev
9068 * @features: Offload features that the stack believes apply
9070 static netdev_features_t i40e_features_check(struct sk_buff *skb,
9071 struct net_device *dev,
9072 netdev_features_t features)
9076 /* No point in doing any of this if neither checksum nor GSO are
9077 * being requested for this frame. We can rule out both by just
9078 * checking for CHECKSUM_PARTIAL
9080 if (skb->ip_summed != CHECKSUM_PARTIAL)
9083 /* We cannot support GSO if the MSS is going to be less than
9084 * 64 bytes. If it is then we need to drop support for GSO.
9086 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
9087 features &= ~NETIF_F_GSO_MASK;
9089 /* MACLEN can support at most 63 words */
9090 len = skb_network_header(skb) - skb->data;
9091 if (len & ~(63 * 2))
9094 /* IPLEN and EIPLEN can support at most 127 dwords */
9095 len = skb_transport_header(skb) - skb_network_header(skb);
9096 if (len & ~(127 * 4))
9099 if (skb->encapsulation) {
9100 /* L4TUNLEN can support 127 words */
9101 len = skb_inner_network_header(skb) - skb_transport_header(skb);
9102 if (len & ~(127 * 2))
9105 /* IPLEN can support at most 127 dwords */
9106 len = skb_inner_transport_header(skb) -
9107 skb_inner_network_header(skb);
9108 if (len & ~(127 * 4))
9112 /* No need to validate L4LEN as TCP is the only protocol with a
9113 * a flexible value and we support all possible values supported
9114 * by TCP, which is at most 15 dwords
9119 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
9122 static const struct net_device_ops i40e_netdev_ops = {
9123 .ndo_open = i40e_open,
9124 .ndo_stop = i40e_close,
9125 .ndo_start_xmit = i40e_lan_xmit_frame,
9126 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
9127 .ndo_set_rx_mode = i40e_set_rx_mode,
9128 .ndo_validate_addr = eth_validate_addr,
9129 .ndo_set_mac_address = i40e_set_mac,
9130 .ndo_change_mtu = i40e_change_mtu,
9131 .ndo_do_ioctl = i40e_ioctl,
9132 .ndo_tx_timeout = i40e_tx_timeout,
9133 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
9134 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
9135 #ifdef CONFIG_NET_POLL_CONTROLLER
9136 .ndo_poll_controller = i40e_netpoll,
9138 .ndo_setup_tc = __i40e_setup_tc,
9140 .ndo_fcoe_enable = i40e_fcoe_enable,
9141 .ndo_fcoe_disable = i40e_fcoe_disable,
9143 .ndo_set_features = i40e_set_features,
9144 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
9145 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
9146 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
9147 .ndo_get_vf_config = i40e_ndo_get_vf_config,
9148 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
9149 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9150 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
9151 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
9152 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
9153 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9154 .ndo_fdb_add = i40e_ndo_fdb_add,
9155 .ndo_features_check = i40e_features_check,
9156 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9157 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9161 * i40e_config_netdev - Setup the netdev flags
9162 * @vsi: the VSI being configured
9164 * Returns 0 on success, negative value on failure
9166 static int i40e_config_netdev(struct i40e_vsi *vsi)
9168 struct i40e_pf *pf = vsi->back;
9169 struct i40e_hw *hw = &pf->hw;
9170 struct i40e_netdev_priv *np;
9171 struct net_device *netdev;
9172 u8 mac_addr[ETH_ALEN];
9175 etherdev_size = sizeof(struct i40e_netdev_priv);
9176 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9180 vsi->netdev = netdev;
9181 np = netdev_priv(netdev);
9184 netdev->hw_enc_features |= NETIF_F_SG |
9188 NETIF_F_SOFT_FEATURES |
9193 NETIF_F_GSO_GRE_CSUM |
9194 NETIF_F_GSO_IPXIP4 |
9195 NETIF_F_GSO_IPXIP6 |
9196 NETIF_F_GSO_UDP_TUNNEL |
9197 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9198 NETIF_F_GSO_PARTIAL |
9204 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9205 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9207 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9209 /* record features VLANs can make use of */
9210 netdev->vlan_features |= netdev->hw_enc_features |
9211 NETIF_F_TSO_MANGLEID;
9213 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9214 netdev->hw_features |= NETIF_F_NTUPLE;
9216 netdev->hw_features |= netdev->hw_enc_features |
9217 NETIF_F_HW_VLAN_CTAG_TX |
9218 NETIF_F_HW_VLAN_CTAG_RX;
9220 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9221 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9223 if (vsi->type == I40E_VSI_MAIN) {
9224 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9225 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9226 /* The following steps are necessary to prevent reception
9227 * of tagged packets - some older NVM configurations load a
9228 * default a MAC-VLAN filter that accepts any tagged packet
9229 * which must be replaced by a normal filter.
9231 i40e_rm_default_mac_filter(vsi, mac_addr);
9232 spin_lock_bh(&vsi->mac_filter_list_lock);
9233 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, true);
9234 spin_unlock_bh(&vsi->mac_filter_list_lock);
9236 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9237 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9238 pf->vsi[pf->lan_vsi]->netdev->name);
9239 random_ether_addr(mac_addr);
9241 spin_lock_bh(&vsi->mac_filter_list_lock);
9242 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9243 spin_unlock_bh(&vsi->mac_filter_list_lock);
9246 ether_addr_copy(netdev->dev_addr, mac_addr);
9247 ether_addr_copy(netdev->perm_addr, mac_addr);
9249 /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
9250 netdev->neigh_priv_len = sizeof(u32) * 4;
9252 netdev->priv_flags |= IFF_UNICAST_FLT;
9253 netdev->priv_flags |= IFF_SUPP_NOFCS;
9254 /* Setup netdev TC information */
9255 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9257 netdev->netdev_ops = &i40e_netdev_ops;
9258 netdev->watchdog_timeo = 5 * HZ;
9259 i40e_set_ethtool_ops(netdev);
9261 i40e_fcoe_config_netdev(netdev, vsi);
9268 * i40e_vsi_delete - Delete a VSI from the switch
9269 * @vsi: the VSI being removed
9271 * Returns 0 on success, negative value on failure
9273 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9275 /* remove default VSI is not allowed */
9276 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9279 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9283 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9284 * @vsi: the VSI being queried
9286 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9288 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9290 struct i40e_veb *veb;
9291 struct i40e_pf *pf = vsi->back;
9293 /* Uplink is not a bridge so default to VEB */
9294 if (vsi->veb_idx == I40E_NO_VEB)
9297 veb = pf->veb[vsi->veb_idx];
9299 dev_info(&pf->pdev->dev,
9300 "There is no veb associated with the bridge\n");
9304 /* Uplink is a bridge in VEPA mode */
9305 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9308 /* Uplink is a bridge in VEB mode */
9312 /* VEPA is now default bridge, so return 0 */
9317 * i40e_add_vsi - Add a VSI to the switch
9318 * @vsi: the VSI being configured
9320 * This initializes a VSI context depending on the VSI type to be added and
9321 * passes it down to the add_vsi aq command.
9323 static int i40e_add_vsi(struct i40e_vsi *vsi)
9326 i40e_status aq_ret = 0;
9327 struct i40e_pf *pf = vsi->back;
9328 struct i40e_hw *hw = &pf->hw;
9329 struct i40e_vsi_context ctxt;
9330 struct i40e_mac_filter *f, *ftmp;
9332 u8 enabled_tc = 0x1; /* TC0 enabled */
9335 memset(&ctxt, 0, sizeof(ctxt));
9336 switch (vsi->type) {
9338 /* The PF's main VSI is already setup as part of the
9339 * device initialization, so we'll not bother with
9340 * the add_vsi call, but we will retrieve the current
9343 ctxt.seid = pf->main_vsi_seid;
9344 ctxt.pf_num = pf->hw.pf_id;
9346 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9347 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9349 dev_info(&pf->pdev->dev,
9350 "couldn't get PF vsi config, err %s aq_err %s\n",
9351 i40e_stat_str(&pf->hw, ret),
9352 i40e_aq_str(&pf->hw,
9353 pf->hw.aq.asq_last_status));
9356 vsi->info = ctxt.info;
9357 vsi->info.valid_sections = 0;
9359 vsi->seid = ctxt.seid;
9360 vsi->id = ctxt.vsi_number;
9362 enabled_tc = i40e_pf_get_tc_map(pf);
9364 /* MFP mode setup queue map and update VSI */
9365 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9366 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9367 memset(&ctxt, 0, sizeof(ctxt));
9368 ctxt.seid = pf->main_vsi_seid;
9369 ctxt.pf_num = pf->hw.pf_id;
9371 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9372 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9374 dev_info(&pf->pdev->dev,
9375 "update vsi failed, err %s aq_err %s\n",
9376 i40e_stat_str(&pf->hw, ret),
9377 i40e_aq_str(&pf->hw,
9378 pf->hw.aq.asq_last_status));
9382 /* update the local VSI info queue map */
9383 i40e_vsi_update_queue_map(vsi, &ctxt);
9384 vsi->info.valid_sections = 0;
9386 /* Default/Main VSI is only enabled for TC0
9387 * reconfigure it to enable all TCs that are
9388 * available on the port in SFP mode.
9389 * For MFP case the iSCSI PF would use this
9390 * flow to enable LAN+iSCSI TC.
9392 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9394 dev_info(&pf->pdev->dev,
9395 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9397 i40e_stat_str(&pf->hw, ret),
9398 i40e_aq_str(&pf->hw,
9399 pf->hw.aq.asq_last_status));
9406 ctxt.pf_num = hw->pf_id;
9408 ctxt.uplink_seid = vsi->uplink_seid;
9409 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9410 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9411 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9412 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9413 ctxt.info.valid_sections |=
9414 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9415 ctxt.info.switch_id =
9416 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9418 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9421 case I40E_VSI_VMDQ2:
9422 ctxt.pf_num = hw->pf_id;
9424 ctxt.uplink_seid = vsi->uplink_seid;
9425 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9426 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9428 /* This VSI is connected to VEB so the switch_id
9429 * should be set to zero by default.
9431 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9432 ctxt.info.valid_sections |=
9433 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9434 ctxt.info.switch_id =
9435 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9438 /* Setup the VSI tx/rx queue map for TC0 only for now */
9439 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9442 case I40E_VSI_SRIOV:
9443 ctxt.pf_num = hw->pf_id;
9444 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9445 ctxt.uplink_seid = vsi->uplink_seid;
9446 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9447 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9449 /* This VSI is connected to VEB so the switch_id
9450 * should be set to zero by default.
9452 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9453 ctxt.info.valid_sections |=
9454 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9455 ctxt.info.switch_id =
9456 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9459 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9460 ctxt.info.valid_sections |=
9461 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9462 ctxt.info.queueing_opt_flags |=
9463 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
9464 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
9467 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9468 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9469 if (pf->vf[vsi->vf_id].spoofchk) {
9470 ctxt.info.valid_sections |=
9471 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9472 ctxt.info.sec_flags |=
9473 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9474 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9476 /* Setup the VSI tx/rx queue map for TC0 only for now */
9477 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9482 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9484 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9489 #endif /* I40E_FCOE */
9490 case I40E_VSI_IWARP:
9491 /* send down message to iWARP */
9498 if (vsi->type != I40E_VSI_MAIN) {
9499 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9501 dev_info(&vsi->back->pdev->dev,
9502 "add vsi failed, err %s aq_err %s\n",
9503 i40e_stat_str(&pf->hw, ret),
9504 i40e_aq_str(&pf->hw,
9505 pf->hw.aq.asq_last_status));
9509 vsi->info = ctxt.info;
9510 vsi->info.valid_sections = 0;
9511 vsi->seid = ctxt.seid;
9512 vsi->id = ctxt.vsi_number;
9514 /* Except FDIR VSI, for all othet VSI set the broadcast filter */
9515 if (vsi->type != I40E_VSI_FDIR) {
9516 aq_ret = i40e_aq_set_vsi_broadcast(hw, vsi->seid, true, NULL);
9518 ret = i40e_aq_rc_to_posix(aq_ret,
9519 hw->aq.asq_last_status);
9520 dev_info(&pf->pdev->dev,
9521 "set brdcast promisc failed, err %s, aq_err %s\n",
9522 i40e_stat_str(hw, aq_ret),
9523 i40e_aq_str(hw, hw->aq.asq_last_status));
9527 vsi->active_filters = 0;
9528 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
9529 spin_lock_bh(&vsi->mac_filter_list_lock);
9530 /* If macvlan filters already exist, force them to get loaded */
9531 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9532 f->state = I40E_FILTER_NEW;
9535 spin_unlock_bh(&vsi->mac_filter_list_lock);
9538 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9539 pf->flags |= I40E_FLAG_FILTER_SYNC;
9542 /* Update VSI BW information */
9543 ret = i40e_vsi_get_bw_info(vsi);
9545 dev_info(&pf->pdev->dev,
9546 "couldn't get vsi bw info, err %s aq_err %s\n",
9547 i40e_stat_str(&pf->hw, ret),
9548 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9549 /* VSI is already added so not tearing that up */
9558 * i40e_vsi_release - Delete a VSI and free its resources
9559 * @vsi: the VSI being removed
9561 * Returns 0 on success or < 0 on error
9563 int i40e_vsi_release(struct i40e_vsi *vsi)
9565 struct i40e_mac_filter *f, *ftmp;
9566 struct i40e_veb *veb = NULL;
9573 /* release of a VEB-owner or last VSI is not allowed */
9574 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9575 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9576 vsi->seid, vsi->uplink_seid);
9579 if (vsi == pf->vsi[pf->lan_vsi] &&
9580 !test_bit(__I40E_DOWN, &pf->state)) {
9581 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9585 uplink_seid = vsi->uplink_seid;
9586 if (vsi->type != I40E_VSI_SRIOV) {
9587 if (vsi->netdev_registered) {
9588 vsi->netdev_registered = false;
9590 /* results in a call to i40e_close() */
9591 unregister_netdev(vsi->netdev);
9594 i40e_vsi_close(vsi);
9596 i40e_vsi_disable_irq(vsi);
9599 spin_lock_bh(&vsi->mac_filter_list_lock);
9600 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9601 i40e_del_filter(vsi, f->macaddr, f->vlan,
9602 f->is_vf, f->is_netdev);
9603 spin_unlock_bh(&vsi->mac_filter_list_lock);
9605 i40e_sync_vsi_filters(vsi);
9607 i40e_vsi_delete(vsi);
9608 i40e_vsi_free_q_vectors(vsi);
9610 free_netdev(vsi->netdev);
9613 i40e_vsi_clear_rings(vsi);
9614 i40e_vsi_clear(vsi);
9616 /* If this was the last thing on the VEB, except for the
9617 * controlling VSI, remove the VEB, which puts the controlling
9618 * VSI onto the next level down in the switch.
9620 * Well, okay, there's one more exception here: don't remove
9621 * the orphan VEBs yet. We'll wait for an explicit remove request
9622 * from up the network stack.
9624 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9626 pf->vsi[i]->uplink_seid == uplink_seid &&
9627 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9628 n++; /* count the VSIs */
9631 for (i = 0; i < I40E_MAX_VEB; i++) {
9634 if (pf->veb[i]->uplink_seid == uplink_seid)
9635 n++; /* count the VEBs */
9636 if (pf->veb[i]->seid == uplink_seid)
9639 if (n == 0 && veb && veb->uplink_seid != 0)
9640 i40e_veb_release(veb);
9646 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9647 * @vsi: ptr to the VSI
9649 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9650 * corresponding SW VSI structure and initializes num_queue_pairs for the
9651 * newly allocated VSI.
9653 * Returns 0 on success or negative on failure
9655 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9658 struct i40e_pf *pf = vsi->back;
9660 if (vsi->q_vectors[0]) {
9661 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9666 if (vsi->base_vector) {
9667 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9668 vsi->seid, vsi->base_vector);
9672 ret = i40e_vsi_alloc_q_vectors(vsi);
9674 dev_info(&pf->pdev->dev,
9675 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9676 vsi->num_q_vectors, vsi->seid, ret);
9677 vsi->num_q_vectors = 0;
9678 goto vector_setup_out;
9681 /* In Legacy mode, we do not have to get any other vector since we
9682 * piggyback on the misc/ICR0 for queue interrupts.
9684 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9686 if (vsi->num_q_vectors)
9687 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9688 vsi->num_q_vectors, vsi->idx);
9689 if (vsi->base_vector < 0) {
9690 dev_info(&pf->pdev->dev,
9691 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9692 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9693 i40e_vsi_free_q_vectors(vsi);
9695 goto vector_setup_out;
9703 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9704 * @vsi: pointer to the vsi.
9706 * This re-allocates a vsi's queue resources.
9708 * Returns pointer to the successfully allocated and configured VSI sw struct
9709 * on success, otherwise returns NULL on failure.
9711 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9722 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9723 i40e_vsi_clear_rings(vsi);
9725 i40e_vsi_free_arrays(vsi, false);
9726 i40e_set_num_rings_in_vsi(vsi);
9727 ret = i40e_vsi_alloc_arrays(vsi, false);
9731 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9733 dev_info(&pf->pdev->dev,
9734 "failed to get tracking for %d queues for VSI %d err %d\n",
9735 vsi->alloc_queue_pairs, vsi->seid, ret);
9738 vsi->base_queue = ret;
9740 /* Update the FW view of the VSI. Force a reset of TC and queue
9741 * layout configurations.
9743 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9744 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9745 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9746 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9747 if (vsi->type == I40E_VSI_MAIN)
9748 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
9750 /* assign it some queues */
9751 ret = i40e_alloc_rings(vsi);
9755 /* map all of the rings to the q_vectors */
9756 i40e_vsi_map_rings_to_vectors(vsi);
9760 i40e_vsi_free_q_vectors(vsi);
9761 if (vsi->netdev_registered) {
9762 vsi->netdev_registered = false;
9763 unregister_netdev(vsi->netdev);
9764 free_netdev(vsi->netdev);
9767 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9769 i40e_vsi_clear(vsi);
9774 * i40e_vsi_setup - Set up a VSI by a given type
9775 * @pf: board private structure
9777 * @uplink_seid: the switch element to link to
9778 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9780 * This allocates the sw VSI structure and its queue resources, then add a VSI
9781 * to the identified VEB.
9783 * Returns pointer to the successfully allocated and configure VSI sw struct on
9784 * success, otherwise returns NULL on failure.
9786 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9787 u16 uplink_seid, u32 param1)
9789 struct i40e_vsi *vsi = NULL;
9790 struct i40e_veb *veb = NULL;
9794 /* The requested uplink_seid must be either
9795 * - the PF's port seid
9796 * no VEB is needed because this is the PF
9797 * or this is a Flow Director special case VSI
9798 * - seid of an existing VEB
9799 * - seid of a VSI that owns an existing VEB
9800 * - seid of a VSI that doesn't own a VEB
9801 * a new VEB is created and the VSI becomes the owner
9802 * - seid of the PF VSI, which is what creates the first VEB
9803 * this is a special case of the previous
9805 * Find which uplink_seid we were given and create a new VEB if needed
9807 for (i = 0; i < I40E_MAX_VEB; i++) {
9808 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9814 if (!veb && uplink_seid != pf->mac_seid) {
9816 for (i = 0; i < pf->num_alloc_vsi; i++) {
9817 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9823 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9828 if (vsi->uplink_seid == pf->mac_seid)
9829 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9830 vsi->tc_config.enabled_tc);
9831 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9832 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9833 vsi->tc_config.enabled_tc);
9835 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9836 dev_info(&vsi->back->pdev->dev,
9837 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9840 /* We come up by default in VEPA mode if SRIOV is not
9841 * already enabled, in which case we can't force VEPA
9844 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9845 veb->bridge_mode = BRIDGE_MODE_VEPA;
9846 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9848 i40e_config_bridge_mode(veb);
9850 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9851 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9855 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9859 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9860 uplink_seid = veb->seid;
9863 /* get vsi sw struct */
9864 v_idx = i40e_vsi_mem_alloc(pf, type);
9867 vsi = pf->vsi[v_idx];
9871 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9873 if (type == I40E_VSI_MAIN)
9874 pf->lan_vsi = v_idx;
9875 else if (type == I40E_VSI_SRIOV)
9876 vsi->vf_id = param1;
9877 /* assign it some queues */
9878 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9881 dev_info(&pf->pdev->dev,
9882 "failed to get tracking for %d queues for VSI %d err=%d\n",
9883 vsi->alloc_queue_pairs, vsi->seid, ret);
9886 vsi->base_queue = ret;
9888 /* get a VSI from the hardware */
9889 vsi->uplink_seid = uplink_seid;
9890 ret = i40e_add_vsi(vsi);
9894 switch (vsi->type) {
9895 /* setup the netdev if needed */
9897 /* Apply relevant filters if a platform-specific mac
9898 * address was selected.
9900 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9901 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9903 dev_warn(&pf->pdev->dev,
9904 "could not set up macaddr; err %d\n",
9908 case I40E_VSI_VMDQ2:
9910 ret = i40e_config_netdev(vsi);
9913 ret = register_netdev(vsi->netdev);
9916 vsi->netdev_registered = true;
9917 netif_carrier_off(vsi->netdev);
9918 #ifdef CONFIG_I40E_DCB
9919 /* Setup DCB netlink interface */
9920 i40e_dcbnl_setup(vsi);
9921 #endif /* CONFIG_I40E_DCB */
9925 /* set up vectors and rings if needed */
9926 ret = i40e_vsi_setup_vectors(vsi);
9930 ret = i40e_alloc_rings(vsi);
9934 /* map all of the rings to the q_vectors */
9935 i40e_vsi_map_rings_to_vectors(vsi);
9937 i40e_vsi_reset_stats(vsi);
9941 /* no netdev or rings for the other VSI types */
9945 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9946 (vsi->type == I40E_VSI_VMDQ2)) {
9947 ret = i40e_vsi_config_rss(vsi);
9952 i40e_vsi_free_q_vectors(vsi);
9954 if (vsi->netdev_registered) {
9955 vsi->netdev_registered = false;
9956 unregister_netdev(vsi->netdev);
9957 free_netdev(vsi->netdev);
9961 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9963 i40e_vsi_clear(vsi);
9969 * i40e_veb_get_bw_info - Query VEB BW information
9970 * @veb: the veb to query
9972 * Query the Tx scheduler BW configuration data for given VEB
9974 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9976 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9977 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9978 struct i40e_pf *pf = veb->pf;
9979 struct i40e_hw *hw = &pf->hw;
9984 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9987 dev_info(&pf->pdev->dev,
9988 "query veb bw config failed, err %s aq_err %s\n",
9989 i40e_stat_str(&pf->hw, ret),
9990 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9994 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9997 dev_info(&pf->pdev->dev,
9998 "query veb bw ets config failed, err %s aq_err %s\n",
9999 i40e_stat_str(&pf->hw, ret),
10000 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
10004 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
10005 veb->bw_max_quanta = ets_data.tc_bw_max;
10006 veb->is_abs_credits = bw_data.absolute_credits_enable;
10007 veb->enabled_tc = ets_data.tc_valid_bits;
10008 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
10009 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
10010 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
10011 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
10012 veb->bw_tc_limit_credits[i] =
10013 le16_to_cpu(bw_data.tc_bw_limits[i]);
10014 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
10022 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
10023 * @pf: board private structure
10025 * On error: returns error code (negative)
10026 * On success: returns vsi index in PF (positive)
10028 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
10031 struct i40e_veb *veb;
10034 /* Need to protect the allocation of switch elements at the PF level */
10035 mutex_lock(&pf->switch_mutex);
10037 /* VEB list may be fragmented if VEB creation/destruction has
10038 * been happening. We can afford to do a quick scan to look
10039 * for any free slots in the list.
10041 * find next empty veb slot, looping back around if necessary
10044 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
10046 if (i >= I40E_MAX_VEB) {
10048 goto err_alloc_veb; /* out of VEB slots! */
10051 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
10054 goto err_alloc_veb;
10058 veb->enabled_tc = 1;
10063 mutex_unlock(&pf->switch_mutex);
10068 * i40e_switch_branch_release - Delete a branch of the switch tree
10069 * @branch: where to start deleting
10071 * This uses recursion to find the tips of the branch to be
10072 * removed, deleting until we get back to and can delete this VEB.
10074 static void i40e_switch_branch_release(struct i40e_veb *branch)
10076 struct i40e_pf *pf = branch->pf;
10077 u16 branch_seid = branch->seid;
10078 u16 veb_idx = branch->idx;
10081 /* release any VEBs on this VEB - RECURSION */
10082 for (i = 0; i < I40E_MAX_VEB; i++) {
10085 if (pf->veb[i]->uplink_seid == branch->seid)
10086 i40e_switch_branch_release(pf->veb[i]);
10089 /* Release the VSIs on this VEB, but not the owner VSI.
10091 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
10092 * the VEB itself, so don't use (*branch) after this loop.
10094 for (i = 0; i < pf->num_alloc_vsi; i++) {
10097 if (pf->vsi[i]->uplink_seid == branch_seid &&
10098 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
10099 i40e_vsi_release(pf->vsi[i]);
10103 /* There's one corner case where the VEB might not have been
10104 * removed, so double check it here and remove it if needed.
10105 * This case happens if the veb was created from the debugfs
10106 * commands and no VSIs were added to it.
10108 if (pf->veb[veb_idx])
10109 i40e_veb_release(pf->veb[veb_idx]);
10113 * i40e_veb_clear - remove veb struct
10114 * @veb: the veb to remove
10116 static void i40e_veb_clear(struct i40e_veb *veb)
10122 struct i40e_pf *pf = veb->pf;
10124 mutex_lock(&pf->switch_mutex);
10125 if (pf->veb[veb->idx] == veb)
10126 pf->veb[veb->idx] = NULL;
10127 mutex_unlock(&pf->switch_mutex);
10134 * i40e_veb_release - Delete a VEB and free its resources
10135 * @veb: the VEB being removed
10137 void i40e_veb_release(struct i40e_veb *veb)
10139 struct i40e_vsi *vsi = NULL;
10140 struct i40e_pf *pf;
10145 /* find the remaining VSI and check for extras */
10146 for (i = 0; i < pf->num_alloc_vsi; i++) {
10147 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10153 dev_info(&pf->pdev->dev,
10154 "can't remove VEB %d with %d VSIs left\n",
10159 /* move the remaining VSI to uplink veb */
10160 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10161 if (veb->uplink_seid) {
10162 vsi->uplink_seid = veb->uplink_seid;
10163 if (veb->uplink_seid == pf->mac_seid)
10164 vsi->veb_idx = I40E_NO_VEB;
10166 vsi->veb_idx = veb->veb_idx;
10169 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10170 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10173 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10174 i40e_veb_clear(veb);
10178 * i40e_add_veb - create the VEB in the switch
10179 * @veb: the VEB to be instantiated
10180 * @vsi: the controlling VSI
10182 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10184 struct i40e_pf *pf = veb->pf;
10185 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10188 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10189 veb->enabled_tc, false,
10190 &veb->seid, enable_stats, NULL);
10192 /* get a VEB from the hardware */
10194 dev_info(&pf->pdev->dev,
10195 "couldn't add VEB, err %s aq_err %s\n",
10196 i40e_stat_str(&pf->hw, ret),
10197 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10201 /* get statistics counter */
10202 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10203 &veb->stats_idx, NULL, NULL, NULL);
10205 dev_info(&pf->pdev->dev,
10206 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10207 i40e_stat_str(&pf->hw, ret),
10208 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10211 ret = i40e_veb_get_bw_info(veb);
10213 dev_info(&pf->pdev->dev,
10214 "couldn't get VEB bw info, err %s aq_err %s\n",
10215 i40e_stat_str(&pf->hw, ret),
10216 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10217 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10221 vsi->uplink_seid = veb->seid;
10222 vsi->veb_idx = veb->idx;
10223 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10229 * i40e_veb_setup - Set up a VEB
10230 * @pf: board private structure
10231 * @flags: VEB setup flags
10232 * @uplink_seid: the switch element to link to
10233 * @vsi_seid: the initial VSI seid
10234 * @enabled_tc: Enabled TC bit-map
10236 * This allocates the sw VEB structure and links it into the switch
10237 * It is possible and legal for this to be a duplicate of an already
10238 * existing VEB. It is also possible for both uplink and vsi seids
10239 * to be zero, in order to create a floating VEB.
10241 * Returns pointer to the successfully allocated VEB sw struct on
10242 * success, otherwise returns NULL on failure.
10244 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10245 u16 uplink_seid, u16 vsi_seid,
10248 struct i40e_veb *veb, *uplink_veb = NULL;
10249 int vsi_idx, veb_idx;
10252 /* if one seid is 0, the other must be 0 to create a floating relay */
10253 if ((uplink_seid == 0 || vsi_seid == 0) &&
10254 (uplink_seid + vsi_seid != 0)) {
10255 dev_info(&pf->pdev->dev,
10256 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10257 uplink_seid, vsi_seid);
10261 /* make sure there is such a vsi and uplink */
10262 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10263 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10265 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10266 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10271 if (uplink_seid && uplink_seid != pf->mac_seid) {
10272 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10273 if (pf->veb[veb_idx] &&
10274 pf->veb[veb_idx]->seid == uplink_seid) {
10275 uplink_veb = pf->veb[veb_idx];
10280 dev_info(&pf->pdev->dev,
10281 "uplink seid %d not found\n", uplink_seid);
10286 /* get veb sw struct */
10287 veb_idx = i40e_veb_mem_alloc(pf);
10290 veb = pf->veb[veb_idx];
10291 veb->flags = flags;
10292 veb->uplink_seid = uplink_seid;
10293 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10294 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10296 /* create the VEB in the switch */
10297 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10300 if (vsi_idx == pf->lan_vsi)
10301 pf->lan_veb = veb->idx;
10306 i40e_veb_clear(veb);
10312 * i40e_setup_pf_switch_element - set PF vars based on switch type
10313 * @pf: board private structure
10314 * @ele: element we are building info from
10315 * @num_reported: total number of elements
10316 * @printconfig: should we print the contents
10318 * helper function to assist in extracting a few useful SEID values.
10320 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10321 struct i40e_aqc_switch_config_element_resp *ele,
10322 u16 num_reported, bool printconfig)
10324 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10325 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10326 u8 element_type = ele->element_type;
10327 u16 seid = le16_to_cpu(ele->seid);
10330 dev_info(&pf->pdev->dev,
10331 "type=%d seid=%d uplink=%d downlink=%d\n",
10332 element_type, seid, uplink_seid, downlink_seid);
10334 switch (element_type) {
10335 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10336 pf->mac_seid = seid;
10338 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10340 if (uplink_seid != pf->mac_seid)
10342 if (pf->lan_veb == I40E_NO_VEB) {
10345 /* find existing or else empty VEB */
10346 for (v = 0; v < I40E_MAX_VEB; v++) {
10347 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10352 if (pf->lan_veb == I40E_NO_VEB) {
10353 v = i40e_veb_mem_alloc(pf);
10360 pf->veb[pf->lan_veb]->seid = seid;
10361 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10362 pf->veb[pf->lan_veb]->pf = pf;
10363 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10365 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10366 if (num_reported != 1)
10368 /* This is immediately after a reset so we can assume this is
10371 pf->mac_seid = uplink_seid;
10372 pf->pf_seid = downlink_seid;
10373 pf->main_vsi_seid = seid;
10375 dev_info(&pf->pdev->dev,
10376 "pf_seid=%d main_vsi_seid=%d\n",
10377 pf->pf_seid, pf->main_vsi_seid);
10379 case I40E_SWITCH_ELEMENT_TYPE_PF:
10380 case I40E_SWITCH_ELEMENT_TYPE_VF:
10381 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10382 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10383 case I40E_SWITCH_ELEMENT_TYPE_PE:
10384 case I40E_SWITCH_ELEMENT_TYPE_PA:
10385 /* ignore these for now */
10388 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10389 element_type, seid);
10395 * i40e_fetch_switch_configuration - Get switch config from firmware
10396 * @pf: board private structure
10397 * @printconfig: should we print the contents
10399 * Get the current switch configuration from the device and
10400 * extract a few useful SEID values.
10402 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10404 struct i40e_aqc_get_switch_config_resp *sw_config;
10410 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10414 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10416 u16 num_reported, num_total;
10418 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10422 dev_info(&pf->pdev->dev,
10423 "get switch config failed err %s aq_err %s\n",
10424 i40e_stat_str(&pf->hw, ret),
10425 i40e_aq_str(&pf->hw,
10426 pf->hw.aq.asq_last_status));
10431 num_reported = le16_to_cpu(sw_config->header.num_reported);
10432 num_total = le16_to_cpu(sw_config->header.num_total);
10435 dev_info(&pf->pdev->dev,
10436 "header: %d reported %d total\n",
10437 num_reported, num_total);
10439 for (i = 0; i < num_reported; i++) {
10440 struct i40e_aqc_switch_config_element_resp *ele =
10441 &sw_config->element[i];
10443 i40e_setup_pf_switch_element(pf, ele, num_reported,
10446 } while (next_seid != 0);
10453 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10454 * @pf: board private structure
10455 * @reinit: if the Main VSI needs to re-initialized.
10457 * Returns 0 on success, negative value on failure
10459 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10464 /* find out what's out there already */
10465 ret = i40e_fetch_switch_configuration(pf, false);
10467 dev_info(&pf->pdev->dev,
10468 "couldn't fetch switch config, err %s aq_err %s\n",
10469 i40e_stat_str(&pf->hw, ret),
10470 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10473 i40e_pf_reset_stats(pf);
10475 /* set the switch config bit for the whole device to
10476 * support limited promisc or true promisc
10477 * when user requests promisc. The default is limited
10481 if ((pf->hw.pf_id == 0) &&
10482 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
10483 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10485 if (pf->hw.pf_id == 0) {
10488 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10489 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags,
10491 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
10492 dev_info(&pf->pdev->dev,
10493 "couldn't set switch config bits, err %s aq_err %s\n",
10494 i40e_stat_str(&pf->hw, ret),
10495 i40e_aq_str(&pf->hw,
10496 pf->hw.aq.asq_last_status));
10497 /* not a fatal problem, just keep going */
10501 /* first time setup */
10502 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10503 struct i40e_vsi *vsi = NULL;
10506 /* Set up the PF VSI associated with the PF's main VSI
10507 * that is already in the HW switch
10509 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10510 uplink_seid = pf->veb[pf->lan_veb]->seid;
10512 uplink_seid = pf->mac_seid;
10513 if (pf->lan_vsi == I40E_NO_VSI)
10514 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10516 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10518 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10519 i40e_fdir_teardown(pf);
10523 /* force a reset of TC and queue layout configurations */
10524 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10526 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10527 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10528 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10530 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10532 i40e_fdir_sb_setup(pf);
10534 /* Setup static PF queue filter control settings */
10535 ret = i40e_setup_pf_filter_control(pf);
10537 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10539 /* Failure here should not stop continuing other steps */
10542 /* enable RSS in the HW, even for only one queue, as the stack can use
10545 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10546 i40e_pf_config_rss(pf);
10548 /* fill in link information and enable LSE reporting */
10549 i40e_update_link_info(&pf->hw);
10550 i40e_link_event(pf);
10552 /* Initialize user-specific link properties */
10553 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10554 I40E_AQ_AN_COMPLETED) ? true : false);
10562 * i40e_determine_queue_usage - Work out queue distribution
10563 * @pf: board private structure
10565 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10569 pf->num_lan_qps = 0;
10571 pf->num_fcoe_qps = 0;
10574 /* Find the max queues to be put into basic use. We'll always be
10575 * using TC0, whether or not DCB is running, and TC0 will get the
10578 queues_left = pf->hw.func_caps.num_tx_qp;
10580 if ((queues_left == 1) ||
10581 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10582 /* one qp for PF, no queues for anything else */
10584 pf->alloc_rss_size = pf->num_lan_qps = 1;
10586 /* make sure all the fancies are disabled */
10587 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10588 I40E_FLAG_IWARP_ENABLED |
10590 I40E_FLAG_FCOE_ENABLED |
10592 I40E_FLAG_FD_SB_ENABLED |
10593 I40E_FLAG_FD_ATR_ENABLED |
10594 I40E_FLAG_DCB_CAPABLE |
10595 I40E_FLAG_DCB_ENABLED |
10596 I40E_FLAG_SRIOV_ENABLED |
10597 I40E_FLAG_VMDQ_ENABLED);
10598 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10599 I40E_FLAG_FD_SB_ENABLED |
10600 I40E_FLAG_FD_ATR_ENABLED |
10601 I40E_FLAG_DCB_CAPABLE))) {
10602 /* one qp for PF */
10603 pf->alloc_rss_size = pf->num_lan_qps = 1;
10604 queues_left -= pf->num_lan_qps;
10606 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10607 I40E_FLAG_IWARP_ENABLED |
10609 I40E_FLAG_FCOE_ENABLED |
10611 I40E_FLAG_FD_SB_ENABLED |
10612 I40E_FLAG_FD_ATR_ENABLED |
10613 I40E_FLAG_DCB_ENABLED |
10614 I40E_FLAG_VMDQ_ENABLED);
10616 /* Not enough queues for all TCs */
10617 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10618 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10619 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
10620 I40E_FLAG_DCB_ENABLED);
10621 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10623 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10624 num_online_cpus());
10625 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10626 pf->hw.func_caps.num_tx_qp);
10628 queues_left -= pf->num_lan_qps;
10632 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10633 if (I40E_DEFAULT_FCOE <= queues_left) {
10634 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10635 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10636 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10638 pf->num_fcoe_qps = 0;
10639 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10640 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10643 queues_left -= pf->num_fcoe_qps;
10647 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10648 if (queues_left > 1) {
10649 queues_left -= 1; /* save 1 queue for FD */
10651 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10652 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10656 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10657 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10658 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10659 (queues_left / pf->num_vf_qps));
10660 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10663 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10664 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10665 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10666 (queues_left / pf->num_vmdq_qps));
10667 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10670 pf->queues_left = queues_left;
10671 dev_dbg(&pf->pdev->dev,
10672 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10673 pf->hw.func_caps.num_tx_qp,
10674 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10675 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10676 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10679 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10684 * i40e_setup_pf_filter_control - Setup PF static filter control
10685 * @pf: PF to be setup
10687 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10688 * settings. If PE/FCoE are enabled then it will also set the per PF
10689 * based filter sizes required for them. It also enables Flow director,
10690 * ethertype and macvlan type filter settings for the pf.
10692 * Returns 0 on success, negative on failure
10694 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10696 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10698 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10700 /* Flow Director is enabled */
10701 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10702 settings->enable_fdir = true;
10704 /* Ethtype and MACVLAN filters enabled for PF */
10705 settings->enable_ethtype = true;
10706 settings->enable_macvlan = true;
10708 if (i40e_set_filter_control(&pf->hw, settings))
10714 #define INFO_STRING_LEN 255
10715 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10716 static void i40e_print_features(struct i40e_pf *pf)
10718 struct i40e_hw *hw = &pf->hw;
10722 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10726 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10727 #ifdef CONFIG_PCI_IOV
10728 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10730 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
10731 pf->hw.func_caps.num_vsis,
10732 pf->vsi[pf->lan_vsi]->num_queue_pairs);
10733 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10734 i += snprintf(&buf[i], REMAIN(i), " RSS");
10735 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10736 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10737 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10738 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10739 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10741 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10742 i += snprintf(&buf[i], REMAIN(i), " DCB");
10743 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10744 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10745 if (pf->flags & I40E_FLAG_PTP)
10746 i += snprintf(&buf[i], REMAIN(i), " PTP");
10748 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10749 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10751 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10752 i += snprintf(&buf[i], REMAIN(i), " VEB");
10754 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10756 dev_info(&pf->pdev->dev, "%s\n", buf);
10758 WARN_ON(i > INFO_STRING_LEN);
10762 * i40e_get_platform_mac_addr - get platform-specific MAC address
10764 * @pdev: PCI device information struct
10765 * @pf: board private structure
10767 * Look up the MAC address in Open Firmware on systems that support it,
10768 * and use IDPROM on SPARC if no OF address is found. On return, the
10769 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10770 * has been selected.
10772 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10774 pf->flags &= ~I40E_FLAG_PF_MAC;
10775 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
10776 pf->flags |= I40E_FLAG_PF_MAC;
10780 * i40e_probe - Device initialization routine
10781 * @pdev: PCI device information struct
10782 * @ent: entry in i40e_pci_tbl
10784 * i40e_probe initializes a PF identified by a pci_dev structure.
10785 * The OS initialization, configuring of the PF private structure,
10786 * and a hardware reset occur.
10788 * Returns 0 on success, negative on failure
10790 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10792 struct i40e_aq_get_phy_abilities_resp abilities;
10793 struct i40e_pf *pf;
10794 struct i40e_hw *hw;
10795 static u16 pfs_found;
10803 err = pci_enable_device_mem(pdev);
10807 /* set up for high or low dma */
10808 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10810 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10812 dev_err(&pdev->dev,
10813 "DMA configuration failed: 0x%x\n", err);
10818 /* set up pci connections */
10819 err = pci_request_mem_regions(pdev, i40e_driver_name);
10821 dev_info(&pdev->dev,
10822 "pci_request_selected_regions failed %d\n", err);
10826 pci_enable_pcie_error_reporting(pdev);
10827 pci_set_master(pdev);
10829 /* Now that we have a PCI connection, we need to do the
10830 * low level device setup. This is primarily setting up
10831 * the Admin Queue structures and then querying for the
10832 * device's current profile information.
10834 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10841 set_bit(__I40E_DOWN, &pf->state);
10846 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10847 I40E_MAX_CSR_SPACE);
10849 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10850 if (!hw->hw_addr) {
10852 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10853 (unsigned int)pci_resource_start(pdev, 0),
10854 pf->ioremap_len, err);
10857 hw->vendor_id = pdev->vendor;
10858 hw->device_id = pdev->device;
10859 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10860 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10861 hw->subsystem_device_id = pdev->subsystem_device;
10862 hw->bus.device = PCI_SLOT(pdev->devfn);
10863 hw->bus.func = PCI_FUNC(pdev->devfn);
10864 pf->instance = pfs_found;
10866 /* set up the locks for the AQ, do this only once in probe
10867 * and destroy them only once in remove
10869 mutex_init(&hw->aq.asq_mutex);
10870 mutex_init(&hw->aq.arq_mutex);
10873 pf->msg_enable = pf->hw.debug_mask;
10874 pf->msg_enable = debug;
10877 /* do a special CORER for clearing PXE mode once at init */
10878 if (hw->revision_id == 0 &&
10879 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10880 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10885 i40e_clear_pxe_mode(hw);
10888 /* Reset here to make sure all is clean and to define PF 'n' */
10890 err = i40e_pf_reset(hw);
10892 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10897 hw->aq.num_arq_entries = I40E_AQ_LEN;
10898 hw->aq.num_asq_entries = I40E_AQ_LEN;
10899 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10900 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10901 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10903 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10905 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10907 err = i40e_init_shared_code(hw);
10909 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10914 /* set up a default setting for link flow control */
10915 pf->hw.fc.requested_mode = I40E_FC_NONE;
10917 err = i40e_init_adminq(hw);
10919 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10920 dev_info(&pdev->dev,
10921 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10923 dev_info(&pdev->dev,
10924 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10929 /* provide nvm, fw, api versions */
10930 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10931 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10932 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10933 i40e_nvm_version_str(hw));
10935 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10936 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10937 dev_info(&pdev->dev,
10938 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10939 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10940 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10941 dev_info(&pdev->dev,
10942 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10944 i40e_verify_eeprom(pf);
10946 /* Rev 0 hardware was never productized */
10947 if (hw->revision_id < 1)
10948 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10950 i40e_clear_pxe_mode(hw);
10951 err = i40e_get_capabilities(pf);
10953 goto err_adminq_setup;
10955 err = i40e_sw_init(pf);
10957 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10961 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10962 hw->func_caps.num_rx_qp,
10963 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10965 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10966 goto err_init_lan_hmc;
10969 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10971 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10973 goto err_configure_lan_hmc;
10976 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10977 * Ignore error return codes because if it was already disabled via
10978 * hardware settings this will fail
10980 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
10981 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10982 i40e_aq_stop_lldp(hw, true, NULL);
10985 i40e_get_mac_addr(hw, hw->mac.addr);
10986 /* allow a platform config to override the HW addr */
10987 i40e_get_platform_mac_addr(pdev, pf);
10988 if (!is_valid_ether_addr(hw->mac.addr)) {
10989 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10993 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10994 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10995 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10996 if (is_valid_ether_addr(hw->mac.port_addr))
10997 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10999 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
11001 dev_info(&pdev->dev,
11002 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
11003 if (!is_valid_ether_addr(hw->mac.san_addr)) {
11004 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
11006 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
11008 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
11009 #endif /* I40E_FCOE */
11011 pci_set_drvdata(pdev, pf);
11012 pci_save_state(pdev);
11013 #ifdef CONFIG_I40E_DCB
11014 err = i40e_init_pf_dcb(pf);
11016 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
11017 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE & I40E_FLAG_DCB_ENABLED);
11018 /* Continue without DCB enabled */
11020 #endif /* CONFIG_I40E_DCB */
11022 /* set up periodic task facility */
11023 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
11024 pf->service_timer_period = HZ;
11026 INIT_WORK(&pf->service_task, i40e_service_task);
11027 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
11028 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
11030 /* NVM bit on means WoL disabled for the port */
11031 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
11032 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
11033 pf->wol_en = false;
11036 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
11038 /* set up the main switch operations */
11039 i40e_determine_queue_usage(pf);
11040 err = i40e_init_interrupt_scheme(pf);
11042 goto err_switch_setup;
11044 /* The number of VSIs reported by the FW is the minimum guaranteed
11045 * to us; HW supports far more and we share the remaining pool with
11046 * the other PFs. We allocate space for more than the guarantee with
11047 * the understanding that we might not get them all later.
11049 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
11050 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
11052 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
11054 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
11055 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
11059 goto err_switch_setup;
11062 #ifdef CONFIG_PCI_IOV
11063 /* prep for VF support */
11064 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11065 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11066 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11067 if (pci_num_vf(pdev))
11068 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
11071 err = i40e_setup_pf_switch(pf, false);
11073 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
11077 /* Make sure flow control is set according to current settings */
11078 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
11079 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
11080 dev_dbg(&pf->pdev->dev,
11081 "Set fc with err %s aq_err %s on get_phy_cap\n",
11082 i40e_stat_str(hw, err),
11083 i40e_aq_str(hw, hw->aq.asq_last_status));
11084 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
11085 dev_dbg(&pf->pdev->dev,
11086 "Set fc with err %s aq_err %s on set_phy_config\n",
11087 i40e_stat_str(hw, err),
11088 i40e_aq_str(hw, hw->aq.asq_last_status));
11089 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
11090 dev_dbg(&pf->pdev->dev,
11091 "Set fc with err %s aq_err %s on get_link_info\n",
11092 i40e_stat_str(hw, err),
11093 i40e_aq_str(hw, hw->aq.asq_last_status));
11095 /* if FDIR VSI was set up, start it now */
11096 for (i = 0; i < pf->num_alloc_vsi; i++) {
11097 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
11098 i40e_vsi_open(pf->vsi[i]);
11103 /* The driver only wants link up/down and module qualification
11104 * reports from firmware. Note the negative logic.
11106 err = i40e_aq_set_phy_int_mask(&pf->hw,
11107 ~(I40E_AQ_EVENT_LINK_UPDOWN |
11108 I40E_AQ_EVENT_MEDIA_NA |
11109 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
11111 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
11112 i40e_stat_str(&pf->hw, err),
11113 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11115 /* Reconfigure hardware for allowing smaller MSS in the case
11116 * of TSO, so that we avoid the MDD being fired and causing
11117 * a reset in the case of small MSS+TSO.
11119 val = rd32(hw, I40E_REG_MSS);
11120 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11121 val &= ~I40E_REG_MSS_MIN_MASK;
11122 val |= I40E_64BYTE_MSS;
11123 wr32(hw, I40E_REG_MSS, val);
11126 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
11128 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11130 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11131 i40e_stat_str(&pf->hw, err),
11132 i40e_aq_str(&pf->hw,
11133 pf->hw.aq.asq_last_status));
11135 /* The main driver is (mostly) up and happy. We need to set this state
11136 * before setting up the misc vector or we get a race and the vector
11137 * ends up disabled forever.
11139 clear_bit(__I40E_DOWN, &pf->state);
11141 /* In case of MSIX we are going to setup the misc vector right here
11142 * to handle admin queue events etc. In case of legacy and MSI
11143 * the misc functionality and queue processing is combined in
11144 * the same vector and that gets setup at open.
11146 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11147 err = i40e_setup_misc_vector(pf);
11149 dev_info(&pdev->dev,
11150 "setup of misc vector failed: %d\n", err);
11155 #ifdef CONFIG_PCI_IOV
11156 /* prep for VF support */
11157 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11158 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11159 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11160 /* disable link interrupts for VFs */
11161 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11162 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11163 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11166 if (pci_num_vf(pdev)) {
11167 dev_info(&pdev->dev,
11168 "Active VFs found, allocating resources.\n");
11169 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11171 dev_info(&pdev->dev,
11172 "Error %d allocating resources for existing VFs\n",
11176 #endif /* CONFIG_PCI_IOV */
11178 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11179 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11180 pf->num_iwarp_msix,
11181 I40E_IWARP_IRQ_PILE_ID);
11182 if (pf->iwarp_base_vector < 0) {
11183 dev_info(&pdev->dev,
11184 "failed to get tracking for %d vectors for IWARP err=%d\n",
11185 pf->num_iwarp_msix, pf->iwarp_base_vector);
11186 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11190 i40e_dbg_pf_init(pf);
11192 /* tell the firmware that we're starting */
11193 i40e_send_version(pf);
11195 /* since everything's happy, start the service_task timer */
11196 mod_timer(&pf->service_timer,
11197 round_jiffies(jiffies + pf->service_timer_period));
11199 /* add this PF to client device list and launch a client service task */
11200 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11201 err = i40e_lan_add_device(pf);
11203 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11208 /* create FCoE interface */
11209 i40e_fcoe_vsi_setup(pf);
11212 #define PCI_SPEED_SIZE 8
11213 #define PCI_WIDTH_SIZE 8
11214 /* Devices on the IOSF bus do not have this information
11215 * and will report PCI Gen 1 x 1 by default so don't bother
11218 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11219 char speed[PCI_SPEED_SIZE] = "Unknown";
11220 char width[PCI_WIDTH_SIZE] = "Unknown";
11222 /* Get the negotiated link width and speed from PCI config
11225 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11228 i40e_set_pci_config_data(hw, link_status);
11230 switch (hw->bus.speed) {
11231 case i40e_bus_speed_8000:
11232 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11233 case i40e_bus_speed_5000:
11234 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11235 case i40e_bus_speed_2500:
11236 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11240 switch (hw->bus.width) {
11241 case i40e_bus_width_pcie_x8:
11242 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11243 case i40e_bus_width_pcie_x4:
11244 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11245 case i40e_bus_width_pcie_x2:
11246 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11247 case i40e_bus_width_pcie_x1:
11248 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11253 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11256 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11257 hw->bus.speed < i40e_bus_speed_8000) {
11258 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11259 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11263 /* get the requested speeds from the fw */
11264 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11266 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11267 i40e_stat_str(&pf->hw, err),
11268 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11269 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11271 /* get the supported phy types from the fw */
11272 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11274 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11275 i40e_stat_str(&pf->hw, err),
11276 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11277 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11279 /* Add a filter to drop all Flow control frames from any VSI from being
11280 * transmitted. By doing so we stop a malicious VF from sending out
11281 * PAUSE or PFC frames and potentially controlling traffic for other
11283 * The FW can still send Flow control frames if enabled.
11285 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11286 pf->main_vsi_seid);
11288 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11289 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11290 pf->flags |= I40E_FLAG_HAVE_10GBASET_PHY;
11292 /* print a string summarizing features */
11293 i40e_print_features(pf);
11297 /* Unwind what we've done if something failed in the setup */
11299 set_bit(__I40E_DOWN, &pf->state);
11300 i40e_clear_interrupt_scheme(pf);
11303 i40e_reset_interrupt_capability(pf);
11304 del_timer_sync(&pf->service_timer);
11306 err_configure_lan_hmc:
11307 (void)i40e_shutdown_lan_hmc(hw);
11309 kfree(pf->qp_pile);
11313 iounmap(hw->hw_addr);
11317 pci_disable_pcie_error_reporting(pdev);
11318 pci_release_mem_regions(pdev);
11321 pci_disable_device(pdev);
11326 * i40e_remove - Device removal routine
11327 * @pdev: PCI device information struct
11329 * i40e_remove is called by the PCI subsystem to alert the driver
11330 * that is should release a PCI device. This could be caused by a
11331 * Hot-Plug event, or because the driver is going to be removed from
11334 static void i40e_remove(struct pci_dev *pdev)
11336 struct i40e_pf *pf = pci_get_drvdata(pdev);
11337 struct i40e_hw *hw = &pf->hw;
11338 i40e_status ret_code;
11341 i40e_dbg_pf_exit(pf);
11345 /* Disable RSS in hw */
11346 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11347 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11349 /* no more scheduling of any task */
11350 set_bit(__I40E_SUSPENDED, &pf->state);
11351 set_bit(__I40E_DOWN, &pf->state);
11352 if (pf->service_timer.data)
11353 del_timer_sync(&pf->service_timer);
11354 if (pf->service_task.func)
11355 cancel_work_sync(&pf->service_task);
11357 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11359 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11362 i40e_fdir_teardown(pf);
11364 /* If there is a switch structure or any orphans, remove them.
11365 * This will leave only the PF's VSI remaining.
11367 for (i = 0; i < I40E_MAX_VEB; i++) {
11371 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11372 pf->veb[i]->uplink_seid == 0)
11373 i40e_switch_branch_release(pf->veb[i]);
11376 /* Now we can shutdown the PF's VSI, just before we kill
11379 if (pf->vsi[pf->lan_vsi])
11380 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11382 /* remove attached clients */
11383 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11384 ret_code = i40e_lan_del_device(pf);
11386 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11390 /* shutdown and destroy the HMC */
11391 if (hw->hmc.hmc_obj) {
11392 ret_code = i40e_shutdown_lan_hmc(hw);
11394 dev_warn(&pdev->dev,
11395 "Failed to destroy the HMC resources: %d\n",
11399 /* shutdown the adminq */
11400 i40e_shutdown_adminq(hw);
11402 /* destroy the locks only once, here */
11403 mutex_destroy(&hw->aq.arq_mutex);
11404 mutex_destroy(&hw->aq.asq_mutex);
11406 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11408 i40e_clear_interrupt_scheme(pf);
11409 for (i = 0; i < pf->num_alloc_vsi; i++) {
11411 i40e_vsi_clear_rings(pf->vsi[i]);
11412 i40e_vsi_clear(pf->vsi[i]);
11418 for (i = 0; i < I40E_MAX_VEB; i++) {
11423 kfree(pf->qp_pile);
11426 iounmap(hw->hw_addr);
11428 pci_release_mem_regions(pdev);
11430 pci_disable_pcie_error_reporting(pdev);
11431 pci_disable_device(pdev);
11435 * i40e_pci_error_detected - warning that something funky happened in PCI land
11436 * @pdev: PCI device information struct
11438 * Called to warn that something happened and the error handling steps
11439 * are in progress. Allows the driver to quiesce things, be ready for
11442 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11443 enum pci_channel_state error)
11445 struct i40e_pf *pf = pci_get_drvdata(pdev);
11447 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11450 dev_info(&pdev->dev,
11451 "Cannot recover - error happened during device probe\n");
11452 return PCI_ERS_RESULT_DISCONNECT;
11455 /* shutdown all operations */
11456 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11458 i40e_prep_for_reset(pf);
11462 /* Request a slot reset */
11463 return PCI_ERS_RESULT_NEED_RESET;
11467 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11468 * @pdev: PCI device information struct
11470 * Called to find if the driver can work with the device now that
11471 * the pci slot has been reset. If a basic connection seems good
11472 * (registers are readable and have sane content) then return a
11473 * happy little PCI_ERS_RESULT_xxx.
11475 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11477 struct i40e_pf *pf = pci_get_drvdata(pdev);
11478 pci_ers_result_t result;
11482 dev_dbg(&pdev->dev, "%s\n", __func__);
11483 if (pci_enable_device_mem(pdev)) {
11484 dev_info(&pdev->dev,
11485 "Cannot re-enable PCI device after reset.\n");
11486 result = PCI_ERS_RESULT_DISCONNECT;
11488 pci_set_master(pdev);
11489 pci_restore_state(pdev);
11490 pci_save_state(pdev);
11491 pci_wake_from_d3(pdev, false);
11493 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11495 result = PCI_ERS_RESULT_RECOVERED;
11497 result = PCI_ERS_RESULT_DISCONNECT;
11500 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11502 dev_info(&pdev->dev,
11503 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11505 /* non-fatal, continue */
11512 * i40e_pci_error_resume - restart operations after PCI error recovery
11513 * @pdev: PCI device information struct
11515 * Called to allow the driver to bring things back up after PCI error
11516 * and/or reset recovery has finished.
11518 static void i40e_pci_error_resume(struct pci_dev *pdev)
11520 struct i40e_pf *pf = pci_get_drvdata(pdev);
11522 dev_dbg(&pdev->dev, "%s\n", __func__);
11523 if (test_bit(__I40E_SUSPENDED, &pf->state))
11527 i40e_handle_reset_warning(pf);
11532 * i40e_shutdown - PCI callback for shutting down
11533 * @pdev: PCI device information struct
11535 static void i40e_shutdown(struct pci_dev *pdev)
11537 struct i40e_pf *pf = pci_get_drvdata(pdev);
11538 struct i40e_hw *hw = &pf->hw;
11540 set_bit(__I40E_SUSPENDED, &pf->state);
11541 set_bit(__I40E_DOWN, &pf->state);
11543 i40e_prep_for_reset(pf);
11546 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11547 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11549 del_timer_sync(&pf->service_timer);
11550 cancel_work_sync(&pf->service_task);
11551 i40e_fdir_teardown(pf);
11554 i40e_prep_for_reset(pf);
11557 wr32(hw, I40E_PFPM_APM,
11558 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11559 wr32(hw, I40E_PFPM_WUFC,
11560 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11562 /* Since we're going to destroy queues during the
11563 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
11567 i40e_clear_interrupt_scheme(pf);
11570 if (system_state == SYSTEM_POWER_OFF) {
11571 pci_wake_from_d3(pdev, pf->wol_en);
11572 pci_set_power_state(pdev, PCI_D3hot);
11578 * i40e_suspend - PCI callback for moving to D3
11579 * @pdev: PCI device information struct
11581 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11583 struct i40e_pf *pf = pci_get_drvdata(pdev);
11584 struct i40e_hw *hw = &pf->hw;
11587 set_bit(__I40E_SUSPENDED, &pf->state);
11588 set_bit(__I40E_DOWN, &pf->state);
11591 i40e_prep_for_reset(pf);
11594 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11595 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11597 i40e_stop_misc_vector(pf);
11599 retval = pci_save_state(pdev);
11603 pci_wake_from_d3(pdev, pf->wol_en);
11604 pci_set_power_state(pdev, PCI_D3hot);
11610 * i40e_resume - PCI callback for waking up from D3
11611 * @pdev: PCI device information struct
11613 static int i40e_resume(struct pci_dev *pdev)
11615 struct i40e_pf *pf = pci_get_drvdata(pdev);
11618 pci_set_power_state(pdev, PCI_D0);
11619 pci_restore_state(pdev);
11620 /* pci_restore_state() clears dev->state_saves, so
11621 * call pci_save_state() again to restore it.
11623 pci_save_state(pdev);
11625 err = pci_enable_device_mem(pdev);
11627 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11630 pci_set_master(pdev);
11632 /* no wakeup events while running */
11633 pci_wake_from_d3(pdev, false);
11635 /* handling the reset will rebuild the device state */
11636 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11637 clear_bit(__I40E_DOWN, &pf->state);
11639 i40e_reset_and_rebuild(pf, false);
11647 static const struct pci_error_handlers i40e_err_handler = {
11648 .error_detected = i40e_pci_error_detected,
11649 .slot_reset = i40e_pci_error_slot_reset,
11650 .resume = i40e_pci_error_resume,
11653 static struct pci_driver i40e_driver = {
11654 .name = i40e_driver_name,
11655 .id_table = i40e_pci_tbl,
11656 .probe = i40e_probe,
11657 .remove = i40e_remove,
11659 .suspend = i40e_suspend,
11660 .resume = i40e_resume,
11662 .shutdown = i40e_shutdown,
11663 .err_handler = &i40e_err_handler,
11664 .sriov_configure = i40e_pci_sriov_configure,
11668 * i40e_init_module - Driver registration routine
11670 * i40e_init_module is the first routine called when the driver is
11671 * loaded. All it does is register with the PCI subsystem.
11673 static int __init i40e_init_module(void)
11675 pr_info("%s: %s - version %s\n", i40e_driver_name,
11676 i40e_driver_string, i40e_driver_version_str);
11677 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11679 /* we will see if single thread per module is enough for now,
11680 * it can't be any worse than using the system workqueue which
11681 * was already single threaded
11683 i40e_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM, 1,
11686 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11691 return pci_register_driver(&i40e_driver);
11693 module_init(i40e_init_module);
11696 * i40e_exit_module - Driver exit cleanup routine
11698 * i40e_exit_module is called just before the driver is removed
11701 static void __exit i40e_exit_module(void)
11703 pci_unregister_driver(&i40e_driver);
11704 destroy_workqueue(i40e_wq);
11707 module_exit(i40e_exit_module);