1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
27 /* ethtool support for i40e */
30 #include "i40e_diag.h"
33 char stat_string[ETH_GSTRING_LEN];
38 #define I40E_STAT(_type, _name, _stat) { \
39 .stat_string = _name, \
40 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \
41 .stat_offset = offsetof(_type, _stat) \
44 #define I40E_NETDEV_STAT(_net_stat) \
45 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
46 #define I40E_PF_STAT(_name, _stat) \
47 I40E_STAT(struct i40e_pf, _name, _stat)
48 #define I40E_VSI_STAT(_name, _stat) \
49 I40E_STAT(struct i40e_vsi, _name, _stat)
50 #define I40E_VEB_STAT(_name, _stat) \
51 I40E_STAT(struct i40e_veb, _name, _stat)
53 static const struct i40e_stats i40e_gstrings_net_stats[] = {
54 I40E_NETDEV_STAT(rx_packets),
55 I40E_NETDEV_STAT(tx_packets),
56 I40E_NETDEV_STAT(rx_bytes),
57 I40E_NETDEV_STAT(tx_bytes),
58 I40E_NETDEV_STAT(rx_errors),
59 I40E_NETDEV_STAT(tx_errors),
60 I40E_NETDEV_STAT(rx_dropped),
61 I40E_NETDEV_STAT(tx_dropped),
62 I40E_NETDEV_STAT(collisions),
63 I40E_NETDEV_STAT(rx_length_errors),
64 I40E_NETDEV_STAT(rx_crc_errors),
67 static const struct i40e_stats i40e_gstrings_veb_stats[] = {
68 I40E_VEB_STAT("rx_bytes", stats.rx_bytes),
69 I40E_VEB_STAT("tx_bytes", stats.tx_bytes),
70 I40E_VEB_STAT("rx_unicast", stats.rx_unicast),
71 I40E_VEB_STAT("tx_unicast", stats.tx_unicast),
72 I40E_VEB_STAT("rx_multicast", stats.rx_multicast),
73 I40E_VEB_STAT("tx_multicast", stats.tx_multicast),
74 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast),
75 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast),
76 I40E_VEB_STAT("rx_discards", stats.rx_discards),
77 I40E_VEB_STAT("tx_discards", stats.tx_discards),
78 I40E_VEB_STAT("tx_errors", stats.tx_errors),
79 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol),
82 static const struct i40e_stats i40e_gstrings_misc_stats[] = {
83 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
84 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
85 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
86 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
87 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
88 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
89 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
90 I40E_VSI_STAT("tx_linearize", tx_linearize),
91 I40E_VSI_STAT("tx_force_wb", tx_force_wb),
92 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
93 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
96 /* These PF_STATs might look like duplicates of some NETDEV_STATs,
97 * but they are separate. This device supports Virtualization, and
98 * as such might have several netdevs supporting VMDq and FCoE going
99 * through a single port. The NETDEV_STATs are for individual netdevs
100 * seen at the top of the stack, and the PF_STATs are for the physical
101 * function at the bottom of the stack hosting those netdevs.
103 * The PF_STATs are appended to the netdev stats only when ethtool -S
104 * is queried on the base PF netdev, not on the VMDq or FCoE netdev.
106 static const struct i40e_stats i40e_gstrings_stats[] = {
107 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes),
108 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes),
109 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast),
110 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast),
111 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast),
112 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast),
113 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast),
114 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast),
115 I40E_PF_STAT("tx_errors", stats.eth.tx_errors),
116 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards),
117 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down),
118 I40E_PF_STAT("rx_crc_errors", stats.crc_errors),
119 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes),
120 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults),
121 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults),
122 I40E_PF_STAT("tx_timeout", tx_timeout_count),
123 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error),
124 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors),
125 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx),
126 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx),
127 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx),
128 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx),
129 I40E_PF_STAT("rx_size_64", stats.rx_size_64),
130 I40E_PF_STAT("rx_size_127", stats.rx_size_127),
131 I40E_PF_STAT("rx_size_255", stats.rx_size_255),
132 I40E_PF_STAT("rx_size_511", stats.rx_size_511),
133 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023),
134 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522),
135 I40E_PF_STAT("rx_size_big", stats.rx_size_big),
136 I40E_PF_STAT("tx_size_64", stats.tx_size_64),
137 I40E_PF_STAT("tx_size_127", stats.tx_size_127),
138 I40E_PF_STAT("tx_size_255", stats.tx_size_255),
139 I40E_PF_STAT("tx_size_511", stats.tx_size_511),
140 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023),
141 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522),
142 I40E_PF_STAT("tx_size_big", stats.tx_size_big),
143 I40E_PF_STAT("rx_undersize", stats.rx_undersize),
144 I40E_PF_STAT("rx_fragments", stats.rx_fragments),
145 I40E_PF_STAT("rx_oversize", stats.rx_oversize),
146 I40E_PF_STAT("rx_jabber", stats.rx_jabber),
147 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests),
148 I40E_PF_STAT("arq_overflows", arq_overflows),
149 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
150 I40E_PF_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped),
151 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt),
152 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match),
153 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
154 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status),
155 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match),
156 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status),
159 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status),
160 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status),
161 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count),
162 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count),
165 #define I40E_QUEUE_STATS_LEN(n) \
166 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \
167 * 2 /* Tx and Rx together */ \
168 * (sizeof(struct i40e_queue_stats) / sizeof(u64)))
169 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
170 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
171 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
172 #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \
173 I40E_MISC_STATS_LEN + \
174 I40E_QUEUE_STATS_LEN((n)))
175 #define I40E_PFC_STATS_LEN ( \
176 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \
177 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \
178 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \
179 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \
180 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \
182 #define I40E_VEB_TC_STATS_LEN ( \
183 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \
184 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \
185 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \
186 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \
188 #define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats)
189 #define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN)
190 #define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \
191 I40E_PFC_STATS_LEN + \
192 I40E_VSI_STATS_LEN((n)))
194 enum i40e_ethtool_test_id {
195 I40E_ETH_TEST_REG = 0,
196 I40E_ETH_TEST_EEPROM,
201 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
202 "Register test (offline)",
203 "Eeprom test (offline)",
204 "Interrupt test (offline)",
205 "Link test (on/offline)"
208 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
210 struct i40e_priv_flags {
211 char flag_string[ETH_GSTRING_LEN];
216 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \
217 .flag_string = _name, \
219 .read_only = _read_only, \
222 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
223 /* NOTE: MFP setting cannot be changed */
224 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1),
225 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0),
226 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0),
227 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0),
228 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0),
229 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0),
232 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)
234 /* Private flags with a global effect, restricted to PF 0 */
235 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = {
236 I40E_PRIV_FLAG("vf-true-promisc-support",
237 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0),
240 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags)
243 * i40e_partition_setting_complaint - generic complaint for MFP restriction
246 static void i40e_partition_setting_complaint(struct i40e_pf *pf)
248 dev_info(&pf->pdev->dev,
249 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
253 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes
254 * @phy_types: PHY types to convert
255 * @supported: pointer to the ethtool supported variable to fill in
256 * @advertising: pointer to the ethtool advertising variable to fill in
259 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported,
262 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
263 u64 phy_types = pf->hw.phy.phy_types;
268 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
269 *supported |= SUPPORTED_Autoneg |
270 SUPPORTED_1000baseT_Full;
271 *advertising |= ADVERTISED_Autoneg;
272 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
273 *advertising |= ADVERTISED_1000baseT_Full;
274 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
275 *supported |= SUPPORTED_100baseT_Full;
276 *advertising |= ADVERTISED_100baseT_Full;
279 if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
280 phy_types & I40E_CAP_PHY_TYPE_XFI ||
281 phy_types & I40E_CAP_PHY_TYPE_SFI ||
282 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
283 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC)
284 *supported |= SUPPORTED_10000baseT_Full;
285 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
286 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
287 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
288 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
289 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
290 *supported |= SUPPORTED_Autoneg |
291 SUPPORTED_10000baseT_Full;
292 *advertising |= ADVERTISED_Autoneg;
293 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
294 *advertising |= ADVERTISED_10000baseT_Full;
296 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
297 phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
298 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
299 *supported |= SUPPORTED_40000baseCR4_Full;
300 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
301 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
302 *supported |= SUPPORTED_Autoneg |
303 SUPPORTED_40000baseCR4_Full;
304 *advertising |= ADVERTISED_Autoneg;
305 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
306 *advertising |= ADVERTISED_40000baseCR4_Full;
308 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
309 *supported |= SUPPORTED_Autoneg |
310 SUPPORTED_100baseT_Full;
311 *advertising |= ADVERTISED_Autoneg;
312 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
313 *advertising |= ADVERTISED_100baseT_Full;
315 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
316 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
317 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
318 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
319 *supported |= SUPPORTED_Autoneg |
320 SUPPORTED_1000baseT_Full;
321 *advertising |= ADVERTISED_Autoneg;
322 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
323 *advertising |= ADVERTISED_1000baseT_Full;
325 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4)
326 *supported |= SUPPORTED_40000baseSR4_Full;
327 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4)
328 *supported |= SUPPORTED_40000baseLR4_Full;
329 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
330 *supported |= SUPPORTED_40000baseKR4_Full |
332 *advertising |= ADVERTISED_40000baseKR4_Full |
335 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
336 *supported |= SUPPORTED_20000baseKR2_Full |
338 *advertising |= ADVERTISED_Autoneg;
339 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
340 *advertising |= ADVERTISED_20000baseKR2_Full;
342 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR) {
343 if (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER))
344 *supported |= SUPPORTED_10000baseKR_Full |
346 *advertising |= ADVERTISED_Autoneg;
347 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
348 if (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER))
349 *advertising |= ADVERTISED_10000baseKR_Full;
351 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
352 *supported |= SUPPORTED_10000baseKX4_Full |
354 *advertising |= ADVERTISED_Autoneg;
355 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
356 *advertising |= ADVERTISED_10000baseKX4_Full;
358 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX) {
359 if (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER))
360 *supported |= SUPPORTED_1000baseKX_Full |
362 *advertising |= ADVERTISED_Autoneg;
363 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
364 if (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER))
365 *advertising |= ADVERTISED_1000baseKX_Full;
367 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
368 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
369 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
370 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
371 *supported |= SUPPORTED_Autoneg;
372 *advertising |= ADVERTISED_Autoneg;
377 * i40e_get_settings_link_up - Get the Link settings for when link is up
379 * @ecmd: ethtool command to fill in
380 * @netdev: network interface device structure
383 static void i40e_get_settings_link_up(struct i40e_hw *hw,
384 struct ethtool_link_ksettings *cmd,
385 struct net_device *netdev,
388 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
389 u32 link_speed = hw_link_info->link_speed;
390 u32 e_advertising = 0x0;
391 u32 e_supported = 0x0;
392 u32 supported, advertising;
394 ethtool_convert_link_mode_to_legacy_u32(&supported,
395 cmd->link_modes.supported);
396 ethtool_convert_link_mode_to_legacy_u32(&advertising,
397 cmd->link_modes.advertising);
399 /* Initialize supported and advertised settings based on phy settings */
400 switch (hw_link_info->phy_type) {
401 case I40E_PHY_TYPE_40GBASE_CR4:
402 case I40E_PHY_TYPE_40GBASE_CR4_CU:
403 supported = SUPPORTED_Autoneg |
404 SUPPORTED_40000baseCR4_Full;
405 advertising = ADVERTISED_Autoneg |
406 ADVERTISED_40000baseCR4_Full;
408 case I40E_PHY_TYPE_XLAUI:
409 case I40E_PHY_TYPE_XLPPI:
410 case I40E_PHY_TYPE_40GBASE_AOC:
411 supported = SUPPORTED_40000baseCR4_Full;
413 case I40E_PHY_TYPE_40GBASE_SR4:
414 supported = SUPPORTED_40000baseSR4_Full;
416 case I40E_PHY_TYPE_40GBASE_LR4:
417 supported = SUPPORTED_40000baseLR4_Full;
419 case I40E_PHY_TYPE_10GBASE_SR:
420 case I40E_PHY_TYPE_10GBASE_LR:
421 case I40E_PHY_TYPE_1000BASE_SX:
422 case I40E_PHY_TYPE_1000BASE_LX:
423 supported = SUPPORTED_10000baseT_Full;
424 if (hw_link_info->module_type[2] &
425 I40E_MODULE_TYPE_1000BASE_SX ||
426 hw_link_info->module_type[2] &
427 I40E_MODULE_TYPE_1000BASE_LX) {
428 supported |= SUPPORTED_1000baseT_Full;
429 if (hw_link_info->requested_speeds &
431 advertising |= ADVERTISED_1000baseT_Full;
433 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
434 advertising |= ADVERTISED_10000baseT_Full;
436 case I40E_PHY_TYPE_10GBASE_T:
437 case I40E_PHY_TYPE_1000BASE_T:
438 case I40E_PHY_TYPE_100BASE_TX:
439 supported = SUPPORTED_Autoneg |
440 SUPPORTED_10000baseT_Full |
441 SUPPORTED_1000baseT_Full |
442 SUPPORTED_100baseT_Full;
443 advertising = ADVERTISED_Autoneg;
444 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
445 advertising |= ADVERTISED_10000baseT_Full;
446 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
447 advertising |= ADVERTISED_1000baseT_Full;
448 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
449 advertising |= ADVERTISED_100baseT_Full;
451 case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
452 supported = SUPPORTED_Autoneg |
453 SUPPORTED_1000baseT_Full;
454 advertising = ADVERTISED_Autoneg |
455 ADVERTISED_1000baseT_Full;
457 case I40E_PHY_TYPE_10GBASE_CR1_CU:
458 case I40E_PHY_TYPE_10GBASE_CR1:
459 supported = SUPPORTED_Autoneg |
460 SUPPORTED_10000baseT_Full;
461 advertising = ADVERTISED_Autoneg |
462 ADVERTISED_10000baseT_Full;
464 case I40E_PHY_TYPE_XAUI:
465 case I40E_PHY_TYPE_XFI:
466 case I40E_PHY_TYPE_SFI:
467 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
468 case I40E_PHY_TYPE_10GBASE_AOC:
469 supported = SUPPORTED_10000baseT_Full;
470 advertising = SUPPORTED_10000baseT_Full;
472 case I40E_PHY_TYPE_SGMII:
473 supported = SUPPORTED_Autoneg |
474 SUPPORTED_1000baseT_Full;
475 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
476 advertising |= ADVERTISED_1000baseT_Full;
477 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
478 supported |= SUPPORTED_100baseT_Full;
479 if (hw_link_info->requested_speeds &
480 I40E_LINK_SPEED_100MB)
481 advertising |= ADVERTISED_100baseT_Full;
484 case I40E_PHY_TYPE_40GBASE_KR4:
485 case I40E_PHY_TYPE_20GBASE_KR2:
486 case I40E_PHY_TYPE_10GBASE_KR:
487 case I40E_PHY_TYPE_10GBASE_KX4:
488 case I40E_PHY_TYPE_1000BASE_KX:
489 supported |= SUPPORTED_40000baseKR4_Full |
490 SUPPORTED_20000baseKR2_Full |
491 SUPPORTED_10000baseKR_Full |
492 SUPPORTED_10000baseKX4_Full |
493 SUPPORTED_1000baseKX_Full |
495 advertising |= ADVERTISED_40000baseKR4_Full |
496 ADVERTISED_20000baseKR2_Full |
497 ADVERTISED_10000baseKR_Full |
498 ADVERTISED_10000baseKX4_Full |
499 ADVERTISED_1000baseKX_Full |
502 case I40E_PHY_TYPE_25GBASE_KR:
503 case I40E_PHY_TYPE_25GBASE_CR:
504 case I40E_PHY_TYPE_25GBASE_SR:
505 case I40E_PHY_TYPE_25GBASE_LR:
506 supported = SUPPORTED_Autoneg;
507 advertising = ADVERTISED_Autoneg;
508 /* TODO: add speeds when ethtool is ready to support*/
511 /* if we got here and link is up something bad is afoot */
512 netdev_info(netdev, "WARNING: Link is up but PHY type 0x%x is not recognized.\n",
513 hw_link_info->phy_type);
516 /* Now that we've worked out everything that could be supported by the
517 * current PHY type, get what is supported by the NVM and them to
518 * get what is truly supported
520 i40e_phy_type_to_ethtool(pf, &e_supported,
523 supported = supported & e_supported;
524 advertising = advertising & e_advertising;
526 /* Set speed and duplex */
527 switch (link_speed) {
528 case I40E_LINK_SPEED_40GB:
529 cmd->base.speed = SPEED_40000;
531 case I40E_LINK_SPEED_25GB:
533 cmd->base.speed = SPEED_25000;
536 "Speed is 25G, display not supported by this version of ethtool.\n");
539 case I40E_LINK_SPEED_20GB:
540 cmd->base.speed = SPEED_20000;
542 case I40E_LINK_SPEED_10GB:
543 cmd->base.speed = SPEED_10000;
545 case I40E_LINK_SPEED_1GB:
546 cmd->base.speed = SPEED_1000;
548 case I40E_LINK_SPEED_100MB:
549 cmd->base.speed = SPEED_100;
554 cmd->base.duplex = DUPLEX_FULL;
556 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
558 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
563 * i40e_get_settings_link_down - Get the Link settings for when link is down
565 * @ecmd: ethtool command to fill in
567 * Reports link settings that can be determined when link is down
569 static void i40e_get_settings_link_down(struct i40e_hw *hw,
570 struct ethtool_link_ksettings *cmd,
573 u32 supported, advertising;
575 /* link is down and the driver needs to fall back on
576 * supported phy types to figure out what info to display
578 i40e_phy_type_to_ethtool(pf, &supported, &advertising);
580 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
582 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
585 /* With no link speed and duplex are unknown */
586 cmd->base.speed = SPEED_UNKNOWN;
587 cmd->base.duplex = DUPLEX_UNKNOWN;
591 * i40e_get_settings - Get Link Speed and Duplex settings
592 * @netdev: network interface device structure
593 * @ecmd: ethtool command
595 * Reports speed/duplex settings based on media_type
597 static int i40e_get_link_ksettings(struct net_device *netdev,
598 struct ethtool_link_ksettings *cmd)
600 struct i40e_netdev_priv *np = netdev_priv(netdev);
601 struct i40e_pf *pf = np->vsi->back;
602 struct i40e_hw *hw = &pf->hw;
603 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
604 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
608 i40e_get_settings_link_up(hw, cmd, netdev, pf);
610 i40e_get_settings_link_down(hw, cmd, pf);
612 /* Now set the settings that don't rely on link being up/down */
613 /* Set autoneg settings */
614 cmd->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
615 AUTONEG_ENABLE : AUTONEG_DISABLE);
617 switch (hw->phy.media_type) {
618 case I40E_MEDIA_TYPE_BACKPLANE:
619 ethtool_link_ksettings_add_link_mode(cmd, supported,
621 ethtool_link_ksettings_add_link_mode(cmd, supported,
623 ethtool_link_ksettings_add_link_mode(cmd, advertising,
625 ethtool_link_ksettings_add_link_mode(cmd, advertising,
627 cmd->base.port = PORT_NONE;
629 case I40E_MEDIA_TYPE_BASET:
630 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
631 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
632 cmd->base.port = PORT_TP;
634 case I40E_MEDIA_TYPE_DA:
635 case I40E_MEDIA_TYPE_CX4:
636 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
637 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
638 cmd->base.port = PORT_DA;
640 case I40E_MEDIA_TYPE_FIBER:
641 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
642 cmd->base.port = PORT_FIBRE;
644 case I40E_MEDIA_TYPE_UNKNOWN:
646 cmd->base.port = PORT_OTHER;
650 /* Set flow control settings */
651 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
653 switch (hw->fc.requested_mode) {
655 ethtool_link_ksettings_add_link_mode(cmd, advertising,
658 case I40E_FC_TX_PAUSE:
659 ethtool_link_ksettings_add_link_mode(cmd, advertising,
662 case I40E_FC_RX_PAUSE:
663 ethtool_link_ksettings_add_link_mode(cmd, advertising,
665 ethtool_link_ksettings_add_link_mode(cmd, advertising,
669 ethtool_convert_link_mode_to_legacy_u32(
670 &advertising, cmd->link_modes.advertising);
672 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
674 ethtool_convert_legacy_u32_to_link_mode(
675 cmd->link_modes.advertising, advertising);
683 * i40e_set_settings - Set Speed and Duplex
684 * @netdev: network interface device structure
685 * @ecmd: ethtool command
687 * Set speed/duplex per media_types advertised/forced
689 static int i40e_set_link_ksettings(struct net_device *netdev,
690 const struct ethtool_link_ksettings *cmd)
692 struct i40e_netdev_priv *np = netdev_priv(netdev);
693 struct i40e_aq_get_phy_abilities_resp abilities;
694 struct i40e_aq_set_phy_config config;
695 struct i40e_pf *pf = np->vsi->back;
696 struct i40e_vsi *vsi = np->vsi;
697 struct i40e_hw *hw = &pf->hw;
698 struct ethtool_link_ksettings safe_cmd;
699 struct ethtool_link_ksettings copy_cmd;
700 i40e_status status = 0;
708 /* Changing port settings is not supported if this isn't the
709 * port's controlling PF
711 if (hw->partition_id != 1) {
712 i40e_partition_setting_complaint(pf);
716 if (vsi != pf->vsi[pf->lan_vsi])
719 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
720 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
721 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
722 hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
723 hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
726 if (hw->device_id == I40E_DEV_ID_KX_B ||
727 hw->device_id == I40E_DEV_ID_KX_C ||
728 hw->device_id == I40E_DEV_ID_20G_KR2 ||
729 hw->device_id == I40E_DEV_ID_20G_KR2_A) {
730 netdev_info(netdev, "Changing settings is not supported on backplane.\n");
734 /* copy the cmd to copy_cmd to avoid modifying the origin */
735 memcpy(©_cmd, cmd, sizeof(struct ethtool_link_ksettings));
737 /* get our own copy of the bits to check against */
738 memset(&safe_cmd, 0, sizeof(struct ethtool_link_ksettings));
739 i40e_get_link_ksettings(netdev, &safe_cmd);
741 /* save autoneg and speed out of cmd */
742 autoneg = cmd->base.autoneg;
743 ethtool_convert_link_mode_to_legacy_u32(&advertise,
744 cmd->link_modes.advertising);
746 /* set autoneg and speed back to what they currently are */
747 copy_cmd.base.autoneg = safe_cmd.base.autoneg;
748 ethtool_convert_link_mode_to_legacy_u32(
749 &tmp, safe_cmd.link_modes.advertising);
750 ethtool_convert_legacy_u32_to_link_mode(
751 copy_cmd.link_modes.advertising, tmp);
753 copy_cmd.base.cmd = safe_cmd.base.cmd;
755 /* If copy_cmd and safe_cmd are not the same now, then they are
756 * trying to set something that we do not support
758 if (memcmp(©_cmd, &safe_cmd, sizeof(struct ethtool_link_ksettings)))
761 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
765 usleep_range(1000, 2000);
768 /* Get the current phy config */
769 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
776 /* Copy abilities to config in case autoneg is not
779 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
780 config.abilities = abilities.abilities;
783 if (autoneg == AUTONEG_ENABLE) {
784 /* If autoneg was not already enabled */
785 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
786 /* If autoneg is not supported, return error */
787 if (!ethtool_link_ksettings_test_link_mode(
788 &safe_cmd, supported, Autoneg)) {
789 netdev_info(netdev, "Autoneg not supported on this phy\n");
793 /* Autoneg is allowed to change */
794 config.abilities = abilities.abilities |
795 I40E_AQ_PHY_ENABLE_AN;
799 /* If autoneg is currently enabled */
800 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
801 /* If autoneg is supported 10GBASE_T is the only PHY
802 * that can disable it, so otherwise return error
804 if (ethtool_link_ksettings_test_link_mode(
805 &safe_cmd, supported, Autoneg) &&
806 hw->phy.link_info.phy_type !=
807 I40E_PHY_TYPE_10GBASE_T) {
808 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
812 /* Autoneg is allowed to change */
813 config.abilities = abilities.abilities &
814 ~I40E_AQ_PHY_ENABLE_AN;
819 ethtool_convert_link_mode_to_legacy_u32(&tmp,
820 safe_cmd.link_modes.supported);
821 if (advertise & ~tmp) {
826 if (advertise & ADVERTISED_100baseT_Full)
827 config.link_speed |= I40E_LINK_SPEED_100MB;
828 if (advertise & ADVERTISED_1000baseT_Full ||
829 advertise & ADVERTISED_1000baseKX_Full)
830 config.link_speed |= I40E_LINK_SPEED_1GB;
831 if (advertise & ADVERTISED_10000baseT_Full ||
832 advertise & ADVERTISED_10000baseKX4_Full ||
833 advertise & ADVERTISED_10000baseKR_Full)
834 config.link_speed |= I40E_LINK_SPEED_10GB;
835 if (advertise & ADVERTISED_20000baseKR2_Full)
836 config.link_speed |= I40E_LINK_SPEED_20GB;
837 if (advertise & ADVERTISED_40000baseKR4_Full ||
838 advertise & ADVERTISED_40000baseCR4_Full ||
839 advertise & ADVERTISED_40000baseSR4_Full ||
840 advertise & ADVERTISED_40000baseLR4_Full)
841 config.link_speed |= I40E_LINK_SPEED_40GB;
843 /* If speed didn't get set, set it to what it currently is.
844 * This is needed because if advertise is 0 (as it is when autoneg
845 * is disabled) then speed won't get set.
847 if (!config.link_speed)
848 config.link_speed = abilities.link_speed;
850 if (change || (abilities.link_speed != config.link_speed)) {
851 /* copy over the rest of the abilities */
852 config.phy_type = abilities.phy_type;
853 config.phy_type_ext = abilities.phy_type_ext;
854 config.eee_capability = abilities.eee_capability;
855 config.eeer = abilities.eeer_val;
856 config.low_power_ctrl = abilities.d3_lpan;
857 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
858 I40E_AQ_PHY_FEC_CONFIG_MASK;
860 /* save the requested speeds */
861 hw->phy.link_info.requested_speeds = config.link_speed;
862 /* set link and auto negotiation so changes take effect */
863 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
864 /* If link is up put link down */
865 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
866 /* Tell the OS link is going down, the link will go
867 * back up when fw says it is ready asynchronously
869 i40e_print_link_message(vsi, false);
870 netif_carrier_off(netdev);
871 netif_tx_stop_all_queues(netdev);
874 /* make the aq call */
875 status = i40e_aq_set_phy_config(hw, &config, NULL);
877 netdev_info(netdev, "Set phy config failed, err %s aq_err %s\n",
878 i40e_stat_str(hw, status),
879 i40e_aq_str(hw, hw->aq.asq_last_status));
884 status = i40e_update_link_info(hw);
886 netdev_dbg(netdev, "Updating link info failed with err %s aq_err %s\n",
887 i40e_stat_str(hw, status),
888 i40e_aq_str(hw, hw->aq.asq_last_status));
891 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
895 clear_bit(__I40E_CONFIG_BUSY, pf->state);
900 static int i40e_nway_reset(struct net_device *netdev)
902 /* restart autonegotiation */
903 struct i40e_netdev_priv *np = netdev_priv(netdev);
904 struct i40e_pf *pf = np->vsi->back;
905 struct i40e_hw *hw = &pf->hw;
906 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
909 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
911 netdev_info(netdev, "link restart failed, err %s aq_err %s\n",
912 i40e_stat_str(hw, ret),
913 i40e_aq_str(hw, hw->aq.asq_last_status));
921 * i40e_get_pauseparam - Get Flow Control status
922 * Return tx/rx-pause status
924 static void i40e_get_pauseparam(struct net_device *netdev,
925 struct ethtool_pauseparam *pause)
927 struct i40e_netdev_priv *np = netdev_priv(netdev);
928 struct i40e_pf *pf = np->vsi->back;
929 struct i40e_hw *hw = &pf->hw;
930 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
931 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
934 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
935 AUTONEG_ENABLE : AUTONEG_DISABLE);
937 /* PFC enabled so report LFC as off */
938 if (dcbx_cfg->pfc.pfcenable) {
944 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
946 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
948 } else if (hw->fc.current_mode == I40E_FC_FULL) {
955 * i40e_set_pauseparam - Set Flow Control parameter
956 * @netdev: network interface device structure
957 * @pause: return tx/rx flow control status
959 static int i40e_set_pauseparam(struct net_device *netdev,
960 struct ethtool_pauseparam *pause)
962 struct i40e_netdev_priv *np = netdev_priv(netdev);
963 struct i40e_pf *pf = np->vsi->back;
964 struct i40e_vsi *vsi = np->vsi;
965 struct i40e_hw *hw = &pf->hw;
966 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
967 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
968 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
974 /* Changing the port's flow control is not supported if this isn't the
975 * port's controlling PF
977 if (hw->partition_id != 1) {
978 i40e_partition_setting_complaint(pf);
982 if (vsi != pf->vsi[pf->lan_vsi])
985 is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED;
986 if (pause->autoneg != is_an) {
987 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
991 /* If we have link and don't have autoneg */
992 if (!test_bit(__I40E_DOWN, pf->state) && !is_an) {
993 /* Send message that it might not necessarily work*/
994 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
997 if (dcbx_cfg->pfc.pfcenable) {
999 "Priority flow control enabled. Cannot set link flow control.\n");
1003 if (pause->rx_pause && pause->tx_pause)
1004 hw->fc.requested_mode = I40E_FC_FULL;
1005 else if (pause->rx_pause && !pause->tx_pause)
1006 hw->fc.requested_mode = I40E_FC_RX_PAUSE;
1007 else if (!pause->rx_pause && pause->tx_pause)
1008 hw->fc.requested_mode = I40E_FC_TX_PAUSE;
1009 else if (!pause->rx_pause && !pause->tx_pause)
1010 hw->fc.requested_mode = I40E_FC_NONE;
1014 /* Tell the OS link is going down, the link will go back up when fw
1015 * says it is ready asynchronously
1017 i40e_print_link_message(vsi, false);
1018 netif_carrier_off(netdev);
1019 netif_tx_stop_all_queues(netdev);
1021 /* Set the fc mode and only restart an if link is up*/
1022 status = i40e_set_fc(hw, &aq_failures, link_up);
1024 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
1025 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n",
1026 i40e_stat_str(hw, status),
1027 i40e_aq_str(hw, hw->aq.asq_last_status));
1030 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
1031 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n",
1032 i40e_stat_str(hw, status),
1033 i40e_aq_str(hw, hw->aq.asq_last_status));
1036 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
1037 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n",
1038 i40e_stat_str(hw, status),
1039 i40e_aq_str(hw, hw->aq.asq_last_status));
1043 if (!test_bit(__I40E_DOWN, pf->state) && is_an) {
1044 /* Give it a little more time to try to come back */
1046 if (!test_bit(__I40E_DOWN, pf->state))
1047 return i40e_nway_reset(netdev);
1053 static u32 i40e_get_msglevel(struct net_device *netdev)
1055 struct i40e_netdev_priv *np = netdev_priv(netdev);
1056 struct i40e_pf *pf = np->vsi->back;
1057 u32 debug_mask = pf->hw.debug_mask;
1060 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
1062 return pf->msg_enable;
1065 static void i40e_set_msglevel(struct net_device *netdev, u32 data)
1067 struct i40e_netdev_priv *np = netdev_priv(netdev);
1068 struct i40e_pf *pf = np->vsi->back;
1070 if (I40E_DEBUG_USER & data)
1071 pf->hw.debug_mask = data;
1073 pf->msg_enable = data;
1076 static int i40e_get_regs_len(struct net_device *netdev)
1081 for (i = 0; i40e_reg_list[i].offset != 0; i++)
1082 reg_count += i40e_reg_list[i].elements;
1084 return reg_count * sizeof(u32);
1087 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1090 struct i40e_netdev_priv *np = netdev_priv(netdev);
1091 struct i40e_pf *pf = np->vsi->back;
1092 struct i40e_hw *hw = &pf->hw;
1094 unsigned int i, j, ri;
1097 /* Tell ethtool which driver-version-specific regs output we have.
1099 * At some point, if we have ethtool doing special formatting of
1100 * this data, it will rely on this version number to know how to
1101 * interpret things. Hence, this needs to be updated if/when the
1102 * diags register table is changed.
1106 /* loop through the diags reg table for what to print */
1108 for (i = 0; i40e_reg_list[i].offset != 0; i++) {
1109 for (j = 0; j < i40e_reg_list[i].elements; j++) {
1110 reg = i40e_reg_list[i].offset
1111 + (j * i40e_reg_list[i].stride);
1112 reg_buf[ri++] = rd32(hw, reg);
1118 static int i40e_get_eeprom(struct net_device *netdev,
1119 struct ethtool_eeprom *eeprom, u8 *bytes)
1121 struct i40e_netdev_priv *np = netdev_priv(netdev);
1122 struct i40e_hw *hw = &np->vsi->back->hw;
1123 struct i40e_pf *pf = np->vsi->back;
1124 int ret_val = 0, len, offset;
1130 #define I40E_NVM_SECTOR_SIZE 4096
1131 if (eeprom->len == 0)
1134 /* check for NVMUpdate access method */
1135 magic = hw->vendor_id | (hw->device_id << 16);
1136 if (eeprom->magic && eeprom->magic != magic) {
1137 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1140 /* make sure it is the right magic for NVMUpdate */
1141 if ((eeprom->magic >> 16) != hw->device_id)
1143 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1144 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1147 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1149 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1150 dev_info(&pf->pdev->dev,
1151 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1152 ret_val, hw->aq.asq_last_status, errno,
1153 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1154 cmd->offset, cmd->data_size);
1159 /* normal ethtool get_eeprom support */
1160 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1162 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
1166 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1168 dev_info(&pf->pdev->dev,
1169 "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
1170 ret_val, hw->aq.asq_last_status);
1174 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
1175 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
1176 len = I40E_NVM_SECTOR_SIZE;
1178 for (i = 0; i < sectors; i++) {
1179 if (i == (sectors - 1)) {
1180 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
1183 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i),
1184 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
1185 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
1187 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
1188 dev_info(&pf->pdev->dev,
1189 "read NVM failed, invalid offset 0x%x\n",
1192 } else if (ret_val &&
1193 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
1194 dev_info(&pf->pdev->dev,
1195 "read NVM failed, access, offset 0x%x\n",
1198 } else if (ret_val) {
1199 dev_info(&pf->pdev->dev,
1200 "read NVM failed offset %d err=%d status=0x%x\n",
1201 offset, ret_val, hw->aq.asq_last_status);
1206 i40e_release_nvm(hw);
1207 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
1213 static int i40e_get_eeprom_len(struct net_device *netdev)
1215 struct i40e_netdev_priv *np = netdev_priv(netdev);
1216 struct i40e_hw *hw = &np->vsi->back->hw;
1219 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF
1220 if (hw->mac.type == I40E_MAC_X722) {
1221 val = X722_EEPROM_SCOPE_LIMIT + 1;
1224 val = (rd32(hw, I40E_GLPCI_LBARCTRL)
1225 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK)
1226 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT;
1227 /* register returns value in power of 2, 64Kbyte chunks. */
1228 val = (64 * 1024) * BIT(val);
1232 static int i40e_set_eeprom(struct net_device *netdev,
1233 struct ethtool_eeprom *eeprom, u8 *bytes)
1235 struct i40e_netdev_priv *np = netdev_priv(netdev);
1236 struct i40e_hw *hw = &np->vsi->back->hw;
1237 struct i40e_pf *pf = np->vsi->back;
1238 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1243 /* normal ethtool set_eeprom is not supported */
1244 magic = hw->vendor_id | (hw->device_id << 16);
1245 if (eeprom->magic == magic)
1246 errno = -EOPNOTSUPP;
1247 /* check for NVMUpdate access method */
1248 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
1250 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1251 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1254 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1256 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1257 dev_info(&pf->pdev->dev,
1258 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1259 ret_val, hw->aq.asq_last_status, errno,
1260 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1261 cmd->offset, cmd->data_size);
1266 static void i40e_get_drvinfo(struct net_device *netdev,
1267 struct ethtool_drvinfo *drvinfo)
1269 struct i40e_netdev_priv *np = netdev_priv(netdev);
1270 struct i40e_vsi *vsi = np->vsi;
1271 struct i40e_pf *pf = vsi->back;
1273 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
1274 strlcpy(drvinfo->version, i40e_driver_version_str,
1275 sizeof(drvinfo->version));
1276 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw),
1277 sizeof(drvinfo->fw_version));
1278 strlcpy(drvinfo->bus_info, pci_name(pf->pdev),
1279 sizeof(drvinfo->bus_info));
1280 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
1281 if (pf->hw.pf_id == 0)
1282 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
1285 static void i40e_get_ringparam(struct net_device *netdev,
1286 struct ethtool_ringparam *ring)
1288 struct i40e_netdev_priv *np = netdev_priv(netdev);
1289 struct i40e_pf *pf = np->vsi->back;
1290 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
1292 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1293 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1294 ring->rx_mini_max_pending = 0;
1295 ring->rx_jumbo_max_pending = 0;
1296 ring->rx_pending = vsi->rx_rings[0]->count;
1297 ring->tx_pending = vsi->tx_rings[0]->count;
1298 ring->rx_mini_pending = 0;
1299 ring->rx_jumbo_pending = 0;
1302 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index)
1304 if (i40e_enabled_xdp_vsi(vsi)) {
1305 return index < vsi->num_queue_pairs ||
1306 (index >= vsi->alloc_queue_pairs &&
1307 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs);
1310 return index < vsi->num_queue_pairs;
1313 static int i40e_set_ringparam(struct net_device *netdev,
1314 struct ethtool_ringparam *ring)
1316 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
1317 struct i40e_netdev_priv *np = netdev_priv(netdev);
1318 struct i40e_hw *hw = &np->vsi->back->hw;
1319 struct i40e_vsi *vsi = np->vsi;
1320 struct i40e_pf *pf = vsi->back;
1321 u32 new_rx_count, new_tx_count;
1322 u16 tx_alloc_queue_pairs;
1326 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1329 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1330 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
1331 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1332 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
1334 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
1335 ring->tx_pending, ring->rx_pending,
1336 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS);
1340 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1341 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1343 /* if nothing to do return success */
1344 if ((new_tx_count == vsi->tx_rings[0]->count) &&
1345 (new_rx_count == vsi->rx_rings[0]->count))
1348 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
1352 usleep_range(1000, 2000);
1355 if (!netif_running(vsi->netdev)) {
1356 /* simple case - set for the next time the netdev is started */
1357 for (i = 0; i < vsi->num_queue_pairs; i++) {
1358 vsi->tx_rings[i]->count = new_tx_count;
1359 vsi->rx_rings[i]->count = new_rx_count;
1360 if (i40e_enabled_xdp_vsi(vsi))
1361 vsi->xdp_rings[i]->count = new_tx_count;
1366 /* We can't just free everything and then setup again,
1367 * because the ISRs in MSI-X mode get passed pointers
1368 * to the Tx and Rx ring structs.
1371 /* alloc updated Tx and XDP Tx resources */
1372 tx_alloc_queue_pairs = vsi->alloc_queue_pairs *
1373 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
1374 if (new_tx_count != vsi->tx_rings[0]->count) {
1376 "Changing Tx descriptor count from %d to %d.\n",
1377 vsi->tx_rings[0]->count, new_tx_count);
1378 tx_rings = kcalloc(tx_alloc_queue_pairs,
1379 sizeof(struct i40e_ring), GFP_KERNEL);
1385 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1386 if (!i40e_active_tx_ring_index(vsi, i))
1389 tx_rings[i] = *vsi->tx_rings[i];
1390 tx_rings[i].count = new_tx_count;
1391 /* the desc and bi pointers will be reallocated in the
1394 tx_rings[i].desc = NULL;
1395 tx_rings[i].rx_bi = NULL;
1396 err = i40e_setup_tx_descriptors(&tx_rings[i]);
1400 if (!i40e_active_tx_ring_index(vsi, i))
1402 i40e_free_tx_resources(&tx_rings[i]);
1412 /* alloc updated Rx resources */
1413 if (new_rx_count != vsi->rx_rings[0]->count) {
1415 "Changing Rx descriptor count from %d to %d\n",
1416 vsi->rx_rings[0]->count, new_rx_count);
1417 rx_rings = kcalloc(vsi->alloc_queue_pairs,
1418 sizeof(struct i40e_ring), GFP_KERNEL);
1424 for (i = 0; i < vsi->num_queue_pairs; i++) {
1425 struct i40e_ring *ring;
1428 /* clone ring and setup updated count */
1429 rx_rings[i] = *vsi->rx_rings[i];
1430 rx_rings[i].count = new_rx_count;
1431 /* the desc and bi pointers will be reallocated in the
1434 rx_rings[i].desc = NULL;
1435 rx_rings[i].rx_bi = NULL;
1436 /* this is to allow wr32 to have something to write to
1437 * during early allocation of Rx buffers
1439 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
1440 err = i40e_setup_rx_descriptors(&rx_rings[i]);
1444 /* now allocate the Rx buffers to make sure the OS
1445 * has enough memory, any failure here means abort
1447 ring = &rx_rings[i];
1448 unused = I40E_DESC_UNUSED(ring);
1449 err = i40e_alloc_rx_buffers(ring, unused);
1453 i40e_free_rx_resources(&rx_rings[i]);
1463 /* Bring interface down, copy in the new ring info,
1464 * then restore the interface
1469 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1470 if (i40e_active_tx_ring_index(vsi, i)) {
1471 i40e_free_tx_resources(vsi->tx_rings[i]);
1472 *vsi->tx_rings[i] = tx_rings[i];
1480 for (i = 0; i < vsi->num_queue_pairs; i++) {
1481 i40e_free_rx_resources(vsi->rx_rings[i]);
1482 /* get the real tail offset */
1483 rx_rings[i].tail = vsi->rx_rings[i]->tail;
1484 /* this is to fake out the allocation routine
1485 * into thinking it has to realloc everything
1486 * but the recycling logic will let us re-use
1487 * the buffers allocated above
1489 rx_rings[i].next_to_use = 0;
1490 rx_rings[i].next_to_clean = 0;
1491 rx_rings[i].next_to_alloc = 0;
1492 /* do a struct copy */
1493 *vsi->rx_rings[i] = rx_rings[i];
1502 /* error cleanup if the Rx allocations failed after getting Tx */
1504 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1505 if (i40e_active_tx_ring_index(vsi, i))
1506 i40e_free_tx_resources(vsi->tx_rings[i]);
1513 clear_bit(__I40E_CONFIG_BUSY, pf->state);
1518 static int i40e_get_sset_count(struct net_device *netdev, int sset)
1520 struct i40e_netdev_priv *np = netdev_priv(netdev);
1521 struct i40e_vsi *vsi = np->vsi;
1522 struct i40e_pf *pf = vsi->back;
1526 return I40E_TEST_LEN;
1528 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) {
1529 int len = I40E_PF_STATS_LEN(netdev);
1531 if ((pf->lan_veb != I40E_NO_VEB) &&
1532 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED))
1533 len += I40E_VEB_STATS_TOTAL;
1536 return I40E_VSI_STATS_LEN(netdev);
1538 case ETH_SS_PRIV_FLAGS:
1539 return I40E_PRIV_FLAGS_STR_LEN +
1540 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
1546 static void i40e_get_ethtool_stats(struct net_device *netdev,
1547 struct ethtool_stats *stats, u64 *data)
1549 struct i40e_netdev_priv *np = netdev_priv(netdev);
1550 struct i40e_ring *tx_ring, *rx_ring;
1551 struct i40e_vsi *vsi = np->vsi;
1552 struct i40e_pf *pf = vsi->back;
1556 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi);
1559 i40e_update_stats(vsi);
1561 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) {
1562 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset;
1563 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat ==
1564 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1566 for (j = 0; j < I40E_MISC_STATS_LEN; j++) {
1567 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset;
1568 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat ==
1569 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1572 for (j = 0; j < vsi->num_queue_pairs; j++) {
1573 tx_ring = ACCESS_ONCE(vsi->tx_rings[j]);
1578 /* process Tx ring statistics */
1580 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
1581 data[i] = tx_ring->stats.packets;
1582 data[i + 1] = tx_ring->stats.bytes;
1583 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
1586 /* Rx ring is the 2nd half of the queue pair */
1587 rx_ring = &tx_ring[1];
1589 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
1590 data[i] = rx_ring->stats.packets;
1591 data[i + 1] = rx_ring->stats.bytes;
1592 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
1596 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
1599 if ((pf->lan_veb != I40E_NO_VEB) &&
1600 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
1601 struct i40e_veb *veb = pf->veb[pf->lan_veb];
1603 for (j = 0; j < I40E_VEB_STATS_LEN; j++) {
1605 p += i40e_gstrings_veb_stats[j].stat_offset;
1606 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat ==
1607 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1609 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) {
1610 data[i++] = veb->tc_stats.tc_tx_packets[j];
1611 data[i++] = veb->tc_stats.tc_tx_bytes[j];
1612 data[i++] = veb->tc_stats.tc_rx_packets[j];
1613 data[i++] = veb->tc_stats.tc_rx_bytes[j];
1616 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) {
1617 p = (char *)pf + i40e_gstrings_stats[j].stat_offset;
1618 data[i++] = (i40e_gstrings_stats[j].sizeof_stat ==
1619 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1621 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
1622 data[i++] = pf->stats.priority_xon_tx[j];
1623 data[i++] = pf->stats.priority_xoff_tx[j];
1625 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
1626 data[i++] = pf->stats.priority_xon_rx[j];
1627 data[i++] = pf->stats.priority_xoff_rx[j];
1629 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++)
1630 data[i++] = pf->stats.priority_xon_2_xoff[j];
1633 static void i40e_get_strings(struct net_device *netdev, u32 stringset,
1636 struct i40e_netdev_priv *np = netdev_priv(netdev);
1637 struct i40e_vsi *vsi = np->vsi;
1638 struct i40e_pf *pf = vsi->back;
1639 char *p = (char *)data;
1642 switch (stringset) {
1644 memcpy(data, i40e_gstrings_test,
1645 I40E_TEST_LEN * ETH_GSTRING_LEN);
1648 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) {
1649 snprintf(p, ETH_GSTRING_LEN, "%s",
1650 i40e_gstrings_net_stats[i].stat_string);
1651 p += ETH_GSTRING_LEN;
1653 for (i = 0; i < I40E_MISC_STATS_LEN; i++) {
1654 snprintf(p, ETH_GSTRING_LEN, "%s",
1655 i40e_gstrings_misc_stats[i].stat_string);
1656 p += ETH_GSTRING_LEN;
1658 for (i = 0; i < vsi->num_queue_pairs; i++) {
1659 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i);
1660 p += ETH_GSTRING_LEN;
1661 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i);
1662 p += ETH_GSTRING_LEN;
1663 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i);
1664 p += ETH_GSTRING_LEN;
1665 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i);
1666 p += ETH_GSTRING_LEN;
1668 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
1671 if ((pf->lan_veb != I40E_NO_VEB) &&
1672 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
1673 for (i = 0; i < I40E_VEB_STATS_LEN; i++) {
1674 snprintf(p, ETH_GSTRING_LEN, "veb.%s",
1675 i40e_gstrings_veb_stats[i].stat_string);
1676 p += ETH_GSTRING_LEN;
1678 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1679 snprintf(p, ETH_GSTRING_LEN,
1680 "veb.tc_%d_tx_packets", i);
1681 p += ETH_GSTRING_LEN;
1682 snprintf(p, ETH_GSTRING_LEN,
1683 "veb.tc_%d_tx_bytes", i);
1684 p += ETH_GSTRING_LEN;
1685 snprintf(p, ETH_GSTRING_LEN,
1686 "veb.tc_%d_rx_packets", i);
1687 p += ETH_GSTRING_LEN;
1688 snprintf(p, ETH_GSTRING_LEN,
1689 "veb.tc_%d_rx_bytes", i);
1690 p += ETH_GSTRING_LEN;
1693 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) {
1694 snprintf(p, ETH_GSTRING_LEN, "port.%s",
1695 i40e_gstrings_stats[i].stat_string);
1696 p += ETH_GSTRING_LEN;
1698 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1699 snprintf(p, ETH_GSTRING_LEN,
1700 "port.tx_priority_%d_xon", i);
1701 p += ETH_GSTRING_LEN;
1702 snprintf(p, ETH_GSTRING_LEN,
1703 "port.tx_priority_%d_xoff", i);
1704 p += ETH_GSTRING_LEN;
1706 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1707 snprintf(p, ETH_GSTRING_LEN,
1708 "port.rx_priority_%d_xon", i);
1709 p += ETH_GSTRING_LEN;
1710 snprintf(p, ETH_GSTRING_LEN,
1711 "port.rx_priority_%d_xoff", i);
1712 p += ETH_GSTRING_LEN;
1714 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1715 snprintf(p, ETH_GSTRING_LEN,
1716 "port.rx_priority_%d_xon_2_xoff", i);
1717 p += ETH_GSTRING_LEN;
1719 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */
1721 case ETH_SS_PRIV_FLAGS:
1722 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
1723 snprintf(p, ETH_GSTRING_LEN, "%s",
1724 i40e_gstrings_priv_flags[i].flag_string);
1725 p += ETH_GSTRING_LEN;
1727 if (pf->hw.pf_id != 0)
1729 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) {
1730 snprintf(p, ETH_GSTRING_LEN, "%s",
1731 i40e_gl_gstrings_priv_flags[i].flag_string);
1732 p += ETH_GSTRING_LEN;
1740 static int i40e_get_ts_info(struct net_device *dev,
1741 struct ethtool_ts_info *info)
1743 struct i40e_pf *pf = i40e_netdev_to_pf(dev);
1745 /* only report HW timestamping if PTP is enabled */
1746 if (!(pf->flags & I40E_FLAG_PTP))
1747 return ethtool_op_get_ts_info(dev, info);
1749 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1750 SOF_TIMESTAMPING_RX_SOFTWARE |
1751 SOF_TIMESTAMPING_SOFTWARE |
1752 SOF_TIMESTAMPING_TX_HARDWARE |
1753 SOF_TIMESTAMPING_RX_HARDWARE |
1754 SOF_TIMESTAMPING_RAW_HARDWARE;
1757 info->phc_index = ptp_clock_index(pf->ptp_clock);
1759 info->phc_index = -1;
1761 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
1763 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1764 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
1765 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
1766 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
1768 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE)
1769 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1770 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1771 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
1772 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1773 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
1774 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1775 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
1776 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1781 static int i40e_link_test(struct net_device *netdev, u64 *data)
1783 struct i40e_netdev_priv *np = netdev_priv(netdev);
1784 struct i40e_pf *pf = np->vsi->back;
1786 bool link_up = false;
1788 netif_info(pf, hw, netdev, "link test\n");
1789 status = i40e_get_link_status(&pf->hw, &link_up);
1791 netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
1804 static int i40e_reg_test(struct net_device *netdev, u64 *data)
1806 struct i40e_netdev_priv *np = netdev_priv(netdev);
1807 struct i40e_pf *pf = np->vsi->back;
1809 netif_info(pf, hw, netdev, "register test\n");
1810 *data = i40e_diag_reg_test(&pf->hw);
1815 static int i40e_eeprom_test(struct net_device *netdev, u64 *data)
1817 struct i40e_netdev_priv *np = netdev_priv(netdev);
1818 struct i40e_pf *pf = np->vsi->back;
1820 netif_info(pf, hw, netdev, "eeprom test\n");
1821 *data = i40e_diag_eeprom_test(&pf->hw);
1823 /* forcebly clear the NVM Update state machine */
1824 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
1829 static int i40e_intr_test(struct net_device *netdev, u64 *data)
1831 struct i40e_netdev_priv *np = netdev_priv(netdev);
1832 struct i40e_pf *pf = np->vsi->back;
1833 u16 swc_old = pf->sw_int_count;
1835 netif_info(pf, hw, netdev, "interrupt test\n");
1836 wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
1837 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
1838 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
1839 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
1840 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
1841 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
1842 usleep_range(1000, 2000);
1843 *data = (swc_old == pf->sw_int_count);
1848 static inline bool i40e_active_vfs(struct i40e_pf *pf)
1850 struct i40e_vf *vfs = pf->vf;
1853 for (i = 0; i < pf->num_alloc_vfs; i++)
1854 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states))
1859 static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
1861 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
1864 static void i40e_diag_test(struct net_device *netdev,
1865 struct ethtool_test *eth_test, u64 *data)
1867 struct i40e_netdev_priv *np = netdev_priv(netdev);
1868 bool if_running = netif_running(netdev);
1869 struct i40e_pf *pf = np->vsi->back;
1871 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1873 netif_info(pf, drv, netdev, "offline testing starting\n");
1875 set_bit(__I40E_TESTING, pf->state);
1877 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1878 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
1879 dev_warn(&pf->pdev->dev,
1880 "Cannot start offline testing when PF is in reset state.\n");
1884 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
1885 dev_warn(&pf->pdev->dev,
1886 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
1890 /* If the device is online then take it offline */
1892 /* indicate we're in test mode */
1895 /* This reset does not affect link - if it is
1896 * changed to a type of reset that does affect
1897 * link then the following link test would have
1898 * to be moved to before the reset
1900 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
1902 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
1903 eth_test->flags |= ETH_TEST_FL_FAILED;
1905 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
1906 eth_test->flags |= ETH_TEST_FL_FAILED;
1908 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
1909 eth_test->flags |= ETH_TEST_FL_FAILED;
1911 /* run reg test last, a reset is required after it */
1912 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
1913 eth_test->flags |= ETH_TEST_FL_FAILED;
1915 clear_bit(__I40E_TESTING, pf->state);
1916 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
1922 netif_info(pf, drv, netdev, "online testing starting\n");
1924 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
1925 eth_test->flags |= ETH_TEST_FL_FAILED;
1927 /* Offline only tests, not run in online; pass by default */
1928 data[I40E_ETH_TEST_REG] = 0;
1929 data[I40E_ETH_TEST_EEPROM] = 0;
1930 data[I40E_ETH_TEST_INTR] = 0;
1933 netif_info(pf, drv, netdev, "testing finished\n");
1937 data[I40E_ETH_TEST_REG] = 1;
1938 data[I40E_ETH_TEST_EEPROM] = 1;
1939 data[I40E_ETH_TEST_INTR] = 1;
1940 data[I40E_ETH_TEST_LINK] = 1;
1941 eth_test->flags |= ETH_TEST_FL_FAILED;
1942 clear_bit(__I40E_TESTING, pf->state);
1943 netif_info(pf, drv, netdev, "testing failed\n");
1946 static void i40e_get_wol(struct net_device *netdev,
1947 struct ethtool_wolinfo *wol)
1949 struct i40e_netdev_priv *np = netdev_priv(netdev);
1950 struct i40e_pf *pf = np->vsi->back;
1951 struct i40e_hw *hw = &pf->hw;
1954 /* NVM bit on means WoL disabled for the port */
1955 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
1956 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
1960 wol->supported = WAKE_MAGIC;
1961 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
1966 * i40e_set_wol - set the WakeOnLAN configuration
1967 * @netdev: the netdev in question
1968 * @wol: the ethtool WoL setting data
1970 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1972 struct i40e_netdev_priv *np = netdev_priv(netdev);
1973 struct i40e_pf *pf = np->vsi->back;
1974 struct i40e_vsi *vsi = np->vsi;
1975 struct i40e_hw *hw = &pf->hw;
1978 /* WoL not supported if this isn't the controlling PF on the port */
1979 if (hw->partition_id != 1) {
1980 i40e_partition_setting_complaint(pf);
1984 if (vsi != pf->vsi[pf->lan_vsi])
1987 /* NVM bit on means WoL disabled for the port */
1988 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
1989 if (BIT(hw->port) & wol_nvm_bits)
1992 /* only magic packet is supported */
1993 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC))
1996 /* is this a new value? */
1997 if (pf->wol_en != !!wol->wolopts) {
1998 pf->wol_en = !!wol->wolopts;
1999 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
2005 static int i40e_set_phys_id(struct net_device *netdev,
2006 enum ethtool_phys_id_state state)
2008 struct i40e_netdev_priv *np = netdev_priv(netdev);
2009 i40e_status ret = 0;
2010 struct i40e_pf *pf = np->vsi->back;
2011 struct i40e_hw *hw = &pf->hw;
2016 case ETHTOOL_ID_ACTIVE:
2017 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2018 pf->led_status = i40e_led_get(hw);
2020 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, NULL);
2021 ret = i40e_led_get_phy(hw, &temp_status,
2023 pf->led_status = temp_status;
2027 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2028 i40e_led_set(hw, 0xf, false);
2030 ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
2032 case ETHTOOL_ID_OFF:
2033 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2034 i40e_led_set(hw, 0x0, false);
2036 ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
2038 case ETHTOOL_ID_INACTIVE:
2039 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2040 i40e_led_set(hw, pf->led_status, false);
2042 ret = i40e_led_set_phy(hw, false, pf->led_status,
2044 I40E_PHY_LED_MODE_ORIG));
2045 i40e_aq_set_phy_debug(hw, 0, NULL);
2057 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt
2058 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also
2059 * 125us (8000 interrupts per second) == ITR(62)
2063 * __i40e_get_coalesce - get per-queue coalesce settings
2064 * @netdev: the netdev to check
2065 * @ec: ethtool coalesce data structure
2066 * @queue: which queue to pick
2068 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs
2069 * are per queue. If queue is <0 then we default to queue 0 as the
2070 * representative value.
2072 static int __i40e_get_coalesce(struct net_device *netdev,
2073 struct ethtool_coalesce *ec,
2076 struct i40e_netdev_priv *np = netdev_priv(netdev);
2077 struct i40e_ring *rx_ring, *tx_ring;
2078 struct i40e_vsi *vsi = np->vsi;
2080 ec->tx_max_coalesced_frames_irq = vsi->work_limit;
2081 ec->rx_max_coalesced_frames_irq = vsi->work_limit;
2083 /* rx and tx usecs has per queue value. If user doesn't specify the queue,
2084 * return queue 0's value to represent.
2088 } else if (queue >= vsi->num_queue_pairs) {
2092 rx_ring = vsi->rx_rings[queue];
2093 tx_ring = vsi->tx_rings[queue];
2095 if (ITR_IS_DYNAMIC(rx_ring->rx_itr_setting))
2096 ec->use_adaptive_rx_coalesce = 1;
2098 if (ITR_IS_DYNAMIC(tx_ring->tx_itr_setting))
2099 ec->use_adaptive_tx_coalesce = 1;
2101 ec->rx_coalesce_usecs = rx_ring->rx_itr_setting & ~I40E_ITR_DYNAMIC;
2102 ec->tx_coalesce_usecs = tx_ring->tx_itr_setting & ~I40E_ITR_DYNAMIC;
2105 /* we use the _usecs_high to store/set the interrupt rate limit
2106 * that the hardware supports, that almost but not quite
2107 * fits the original intent of the ethtool variable,
2108 * the rx_coalesce_usecs_high limits total interrupts
2109 * per second from both tx/rx sources.
2111 ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
2112 ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
2118 * i40e_get_coalesce - get a netdev's coalesce settings
2119 * @netdev: the netdev to check
2120 * @ec: ethtool coalesce data structure
2122 * Gets the coalesce settings for a particular netdev. Note that if user has
2123 * modified per-queue settings, this only guarantees to represent queue 0. See
2124 * __i40e_get_coalesce for more details.
2126 static int i40e_get_coalesce(struct net_device *netdev,
2127 struct ethtool_coalesce *ec)
2129 return __i40e_get_coalesce(netdev, ec, -1);
2133 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue
2134 * @netdev: netdev structure
2135 * @ec: ethtool's coalesce settings
2136 * @queue: the particular queue to read
2138 * Will read a specific queue's coalesce settings
2140 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
2141 struct ethtool_coalesce *ec)
2143 return __i40e_get_coalesce(netdev, ec, queue);
2147 * i40e_set_itr_per_queue - set ITR values for specific queue
2148 * @vsi: the VSI to set values for
2149 * @ec: coalesce settings from ethtool
2150 * @queue: the queue to modify
2152 * Change the ITR settings for a specific queue.
2155 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
2156 struct ethtool_coalesce *ec,
2159 struct i40e_pf *pf = vsi->back;
2160 struct i40e_hw *hw = &pf->hw;
2161 struct i40e_q_vector *q_vector;
2164 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);
2166 vsi->rx_rings[queue]->rx_itr_setting = ec->rx_coalesce_usecs;
2167 vsi->tx_rings[queue]->tx_itr_setting = ec->tx_coalesce_usecs;
2169 if (ec->use_adaptive_rx_coalesce)
2170 vsi->rx_rings[queue]->rx_itr_setting |= I40E_ITR_DYNAMIC;
2172 vsi->rx_rings[queue]->rx_itr_setting &= ~I40E_ITR_DYNAMIC;
2174 if (ec->use_adaptive_tx_coalesce)
2175 vsi->tx_rings[queue]->tx_itr_setting |= I40E_ITR_DYNAMIC;
2177 vsi->tx_rings[queue]->tx_itr_setting &= ~I40E_ITR_DYNAMIC;
2179 q_vector = vsi->rx_rings[queue]->q_vector;
2180 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[queue]->rx_itr_setting);
2181 vector = vsi->base_vector + q_vector->v_idx;
2182 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr);
2184 q_vector = vsi->tx_rings[queue]->q_vector;
2185 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[queue]->tx_itr_setting);
2186 vector = vsi->base_vector + q_vector->v_idx;
2187 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr);
2189 wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl);
2194 * __i40e_set_coalesce - set coalesce settings for particular queue
2195 * @netdev: the netdev to change
2196 * @ec: ethtool coalesce settings
2197 * @queue: the queue to change
2199 * Sets the coalesce settings for a particular queue.
2201 static int __i40e_set_coalesce(struct net_device *netdev,
2202 struct ethtool_coalesce *ec,
2205 struct i40e_netdev_priv *np = netdev_priv(netdev);
2206 u16 intrl_reg, cur_rx_itr, cur_tx_itr;
2207 struct i40e_vsi *vsi = np->vsi;
2208 struct i40e_pf *pf = vsi->back;
2211 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
2212 vsi->work_limit = ec->tx_max_coalesced_frames_irq;
2215 cur_rx_itr = vsi->rx_rings[0]->rx_itr_setting;
2216 cur_tx_itr = vsi->tx_rings[0]->tx_itr_setting;
2217 } else if (queue < vsi->num_queue_pairs) {
2218 cur_rx_itr = vsi->rx_rings[queue]->rx_itr_setting;
2219 cur_tx_itr = vsi->tx_rings[queue]->tx_itr_setting;
2221 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
2222 vsi->num_queue_pairs - 1);
2226 cur_tx_itr &= ~I40E_ITR_DYNAMIC;
2227 cur_rx_itr &= ~I40E_ITR_DYNAMIC;
2229 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
2230 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
2231 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
2235 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
2236 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n",
2237 INTRL_REG_TO_USEC(I40E_MAX_INTRL));
2241 if (ec->rx_coalesce_usecs != cur_rx_itr &&
2242 ec->use_adaptive_rx_coalesce) {
2243 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n");
2247 if (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1)) {
2248 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
2252 if (ec->tx_coalesce_usecs != cur_tx_itr &&
2253 ec->use_adaptive_tx_coalesce) {
2254 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n");
2258 if (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1)) {
2259 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
2263 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr)
2264 ec->rx_coalesce_usecs = I40E_MIN_ITR << 1;
2266 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr)
2267 ec->tx_coalesce_usecs = I40E_MIN_ITR << 1;
2269 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high);
2270 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg);
2271 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) {
2272 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n",
2273 vsi->int_rate_limit);
2276 /* rx and tx usecs has per queue value. If user doesn't specify the queue,
2277 * apply to all queues.
2280 for (i = 0; i < vsi->num_queue_pairs; i++)
2281 i40e_set_itr_per_queue(vsi, ec, i);
2283 i40e_set_itr_per_queue(vsi, ec, queue);
2290 * i40e_set_coalesce - set coalesce settings for every queue on the netdev
2291 * @netdev: the netdev to change
2292 * @ec: ethtool coalesce settings
2294 * This will set each queue to the same coalesce settings.
2296 static int i40e_set_coalesce(struct net_device *netdev,
2297 struct ethtool_coalesce *ec)
2299 return __i40e_set_coalesce(netdev, ec, -1);
2303 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings
2304 * @netdev: the netdev to change
2305 * @ec: ethtool's coalesce settings
2306 * @queue: the queue to change
2308 * Sets the specified queue's coalesce settings.
2310 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
2311 struct ethtool_coalesce *ec)
2313 return __i40e_set_coalesce(netdev, ec, queue);
2317 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type
2318 * @pf: pointer to the physical function struct
2319 * @cmd: ethtool rxnfc command
2321 * Returns Success if the flow is supported, else Invalid Input.
2323 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
2325 struct i40e_hw *hw = &pf->hw;
2331 switch (cmd->flow_type) {
2333 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2336 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2339 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
2342 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
2345 case AH_ESP_V4_FLOW:
2350 case AH_ESP_V6_FLOW:
2354 /* Default is src/dest for IP, no matter the L4 hashing */
2355 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2361 /* Read flow based hash input set register */
2363 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
2365 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
2366 flow_pctype)) << 32);
2369 /* Process bits of hash input set */
2371 if (i_set & I40E_L4_SRC_MASK)
2372 cmd->data |= RXH_L4_B_0_1;
2373 if (i_set & I40E_L4_DST_MASK)
2374 cmd->data |= RXH_L4_B_2_3;
2376 if (cmd->flow_type == TCP_V4_FLOW ||
2377 cmd->flow_type == UDP_V4_FLOW) {
2378 if (hw->mac.type == I40E_MAC_X722) {
2379 if (i_set & I40E_X722_L3_SRC_MASK)
2380 cmd->data |= RXH_IP_SRC;
2381 if (i_set & I40E_X722_L3_DST_MASK)
2382 cmd->data |= RXH_IP_DST;
2384 if (i_set & I40E_L3_SRC_MASK)
2385 cmd->data |= RXH_IP_SRC;
2386 if (i_set & I40E_L3_DST_MASK)
2387 cmd->data |= RXH_IP_DST;
2389 } else if (cmd->flow_type == TCP_V6_FLOW ||
2390 cmd->flow_type == UDP_V6_FLOW) {
2391 if (i_set & I40E_L3_V6_SRC_MASK)
2392 cmd->data |= RXH_IP_SRC;
2393 if (i_set & I40E_L3_V6_DST_MASK)
2394 cmd->data |= RXH_IP_DST;
2402 * i40e_check_mask - Check whether a mask field is set
2403 * @mask: the full mask value
2404 * @field; mask of the field to check
2406 * If the given mask is fully set, return positive value. If the mask for the
2407 * field is fully unset, return zero. Otherwise return a negative error code.
2409 static int i40e_check_mask(u64 mask, u64 field)
2411 u64 value = mask & field;
2422 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data
2423 * @fsp: pointer to rx flow specification
2424 * @data: pointer to userdef data structure for storage
2426 * Read the user-defined data and deconstruct the value into a structure. No
2427 * other code should read the user-defined data, so as to ensure that every
2428 * place consistently reads the value correctly.
2430 * The user-defined field is a 64bit Big Endian format value, which we
2431 * deconstruct by reading bits or bit fields from it. Single bit flags shall
2432 * be defined starting from the highest bits, while small bit field values
2433 * shall be defined starting from the lowest bits.
2435 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid
2436 * and the filter should be rejected. The data structure will always be
2437 * modified even if FLOW_EXT is not set.
2440 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
2441 struct i40e_rx_flow_userdef *data)
2446 /* Zero memory first so it's always consistent. */
2447 memset(data, 0, sizeof(*data));
2449 if (!(fsp->flow_type & FLOW_EXT))
2452 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data));
2453 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data));
2455 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0)
2456 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16)
2457 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0)
2459 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER);
2463 data->flex_word = value & I40E_USERDEF_FLEX_WORD;
2465 (value & I40E_USERDEF_FLEX_OFFSET) >> 16;
2466 data->flex_filter = true;
2473 * i40e_fill_rx_flow_user_data - Fill in user-defined data field
2474 * @fsp: pointer to rx_flow specification
2476 * Reads the userdef data structure and properly fills in the user defined
2477 * fields of the rx_flow_spec.
2479 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
2480 struct i40e_rx_flow_userdef *data)
2482 u64 value = 0, mask = 0;
2484 if (data->flex_filter) {
2485 value |= data->flex_word;
2486 value |= (u64)data->flex_offset << 16;
2487 mask |= I40E_USERDEF_FLEX_FILTER;
2491 fsp->flow_type |= FLOW_EXT;
2493 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value);
2494 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask);
2498 * i40e_get_ethtool_fdir_all - Populates the rule count of a command
2499 * @pf: Pointer to the physical function struct
2500 * @cmd: The command to get or set Rx flow classification rules
2501 * @rule_locs: Array of used rule locations
2503 * This function populates both the total and actual rule count of
2504 * the ethtool flow classification command
2506 * Returns 0 on success or -EMSGSIZE if entry not found
2508 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
2509 struct ethtool_rxnfc *cmd,
2512 struct i40e_fdir_filter *rule;
2513 struct hlist_node *node2;
2516 /* report total rule count */
2517 cmd->data = i40e_get_fd_cnt_all(pf);
2519 hlist_for_each_entry_safe(rule, node2,
2520 &pf->fdir_filter_list, fdir_node) {
2521 if (cnt == cmd->rule_cnt)
2524 rule_locs[cnt] = rule->fd_id;
2528 cmd->rule_cnt = cnt;
2534 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow
2535 * @pf: Pointer to the physical function struct
2536 * @cmd: The command to get or set Rx flow classification rules
2538 * This function looks up a filter based on the Rx flow classification
2539 * command and fills the flow spec info for it if found
2541 * Returns 0 on success or -EINVAL if filter not found
2543 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
2544 struct ethtool_rxnfc *cmd)
2546 struct ethtool_rx_flow_spec *fsp =
2547 (struct ethtool_rx_flow_spec *)&cmd->fs;
2548 struct i40e_rx_flow_userdef userdef = {0};
2549 struct i40e_fdir_filter *rule = NULL;
2550 struct hlist_node *node2;
2554 hlist_for_each_entry_safe(rule, node2,
2555 &pf->fdir_filter_list, fdir_node) {
2556 if (fsp->location <= rule->fd_id)
2560 if (!rule || fsp->location != rule->fd_id)
2563 fsp->flow_type = rule->flow_type;
2564 if (fsp->flow_type == IP_USER_FLOW) {
2565 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2566 fsp->h_u.usr_ip4_spec.proto = 0;
2567 fsp->m_u.usr_ip4_spec.proto = 0;
2570 /* Reverse the src and dest notion, since the HW views them from
2571 * Tx perspective where as the user expects it from Rx filter view.
2573 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
2574 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
2575 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip;
2576 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip;
2578 switch (rule->flow_type) {
2580 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
2583 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2586 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2589 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
2592 /* If we have stored a filter with a flow type not listed here
2593 * it is almost certainly a driver bug. WARN(), and then
2594 * assign the input_set as if all fields are enabled to avoid
2595 * reading unassigned memory.
2597 WARN(1, "Missing input set index for flow_type %d\n",
2599 input_set = 0xFFFFFFFFFFFFFFFFULL;
2603 input_set = i40e_read_fd_input_set(pf, index);
2606 if (input_set & I40E_L3_SRC_MASK)
2607 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF);
2609 if (input_set & I40E_L3_DST_MASK)
2610 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF);
2612 if (input_set & I40E_L4_SRC_MASK)
2613 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF);
2615 if (input_set & I40E_L4_DST_MASK)
2616 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF);
2618 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
2619 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2621 fsp->ring_cookie = rule->q_index;
2623 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) {
2624 struct i40e_vsi *vsi;
2626 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
2627 if (vsi && vsi->type == I40E_VSI_SRIOV) {
2628 /* VFs are zero-indexed by the driver, but ethtool
2629 * expects them to be one-indexed, so add one here
2631 u64 ring_vf = vsi->vf_id + 1;
2633 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
2634 fsp->ring_cookie |= ring_vf;
2638 if (rule->flex_filter) {
2639 userdef.flex_filter = true;
2640 userdef.flex_word = be16_to_cpu(rule->flex_word);
2641 userdef.flex_offset = rule->flex_offset;
2644 i40e_fill_rx_flow_user_data(fsp, &userdef);
2650 * i40e_get_rxnfc - command to get RX flow classification rules
2651 * @netdev: network interface device structure
2652 * @cmd: ethtool rxnfc command
2654 * Returns Success if the command is supported.
2656 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
2659 struct i40e_netdev_priv *np = netdev_priv(netdev);
2660 struct i40e_vsi *vsi = np->vsi;
2661 struct i40e_pf *pf = vsi->back;
2662 int ret = -EOPNOTSUPP;
2665 case ETHTOOL_GRXRINGS:
2666 cmd->data = vsi->num_queue_pairs;
2670 ret = i40e_get_rss_hash_opts(pf, cmd);
2672 case ETHTOOL_GRXCLSRLCNT:
2673 cmd->rule_cnt = pf->fdir_pf_active_filters;
2674 /* report total rule count */
2675 cmd->data = i40e_get_fd_cnt_all(pf);
2678 case ETHTOOL_GRXCLSRULE:
2679 ret = i40e_get_ethtool_fdir_entry(pf, cmd);
2681 case ETHTOOL_GRXCLSRLALL:
2682 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
2692 * i40e_get_rss_hash_bits - Read RSS Hash bits from register
2694 * @nfc: pointer to user request
2695 * @i_setc bits currently set
2697 * Returns value of bits to be set per user request
2699 static u64 i40e_get_rss_hash_bits(struct i40e_hw *hw,
2700 struct ethtool_rxnfc *nfc,
2704 u64 src_l3 = 0, dst_l3 = 0;
2706 if (nfc->data & RXH_L4_B_0_1)
2707 i_set |= I40E_L4_SRC_MASK;
2709 i_set &= ~I40E_L4_SRC_MASK;
2710 if (nfc->data & RXH_L4_B_2_3)
2711 i_set |= I40E_L4_DST_MASK;
2713 i_set &= ~I40E_L4_DST_MASK;
2715 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
2716 src_l3 = I40E_L3_V6_SRC_MASK;
2717 dst_l3 = I40E_L3_V6_DST_MASK;
2718 } else if (nfc->flow_type == TCP_V4_FLOW ||
2719 nfc->flow_type == UDP_V4_FLOW) {
2720 if (hw->mac.type == I40E_MAC_X722) {
2721 src_l3 = I40E_X722_L3_SRC_MASK;
2722 dst_l3 = I40E_X722_L3_DST_MASK;
2724 src_l3 = I40E_L3_SRC_MASK;
2725 dst_l3 = I40E_L3_DST_MASK;
2728 /* Any other flow type are not supported here */
2732 if (nfc->data & RXH_IP_SRC)
2736 if (nfc->data & RXH_IP_DST)
2744 #define FLOW_PCTYPES_SIZE 64
2746 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash
2747 * @pf: pointer to the physical function struct
2748 * @cmd: ethtool rxnfc command
2750 * Returns Success if the flow input set is supported.
2752 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
2754 struct i40e_hw *hw = &pf->hw;
2755 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
2756 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
2757 DECLARE_BITMAP(flow_pctypes, FLOW_PCTYPES_SIZE);
2760 bitmap_zero(flow_pctypes, FLOW_PCTYPES_SIZE);
2762 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
2763 dev_err(&pf->pdev->dev,
2764 "Change of RSS hash input set is not supported when MFP mode is enabled\n");
2768 /* RSS does not support anything other than hashing
2769 * to queues on src and dst IPs and ports
2771 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2772 RXH_L4_B_0_1 | RXH_L4_B_2_3))
2775 switch (nfc->flow_type) {
2777 set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP, flow_pctypes);
2778 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2779 set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK,
2783 set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP, flow_pctypes);
2784 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2785 set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK,
2789 set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_UDP, flow_pctypes);
2790 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
2791 set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP,
2793 set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP,
2796 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
2799 set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_UDP, flow_pctypes);
2800 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
2801 set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP,
2803 set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP,
2806 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
2808 case AH_ESP_V4_FLOW:
2812 if ((nfc->data & RXH_L4_B_0_1) ||
2813 (nfc->data & RXH_L4_B_2_3))
2815 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
2817 case AH_ESP_V6_FLOW:
2821 if ((nfc->data & RXH_L4_B_0_1) ||
2822 (nfc->data & RXH_L4_B_2_3))
2824 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
2827 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
2828 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
2831 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
2832 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
2838 if (bitmap_weight(flow_pctypes, FLOW_PCTYPES_SIZE)) {
2841 for_each_set_bit(flow_id, flow_pctypes, FLOW_PCTYPES_SIZE) {
2842 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id)) |
2843 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id)) << 32);
2844 i_set = i40e_get_rss_hash_bits(&pf->hw, nfc, i_setc);
2846 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id),
2848 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id),
2849 (u32)(i_set >> 32));
2850 hena |= BIT_ULL(flow_id);
2854 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
2855 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
2862 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry
2863 * @vsi: Pointer to the targeted VSI
2864 * @input: The filter to update or NULL to indicate deletion
2865 * @sw_idx: Software index to the filter
2866 * @cmd: The command to get or set Rx flow classification rules
2868 * This function updates (or deletes) a Flow Director entry from
2869 * the hlist of the corresponding PF
2871 * Returns 0 on success
2873 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
2874 struct i40e_fdir_filter *input,
2876 struct ethtool_rxnfc *cmd)
2878 struct i40e_fdir_filter *rule, *parent;
2879 struct i40e_pf *pf = vsi->back;
2880 struct hlist_node *node2;
2886 hlist_for_each_entry_safe(rule, node2,
2887 &pf->fdir_filter_list, fdir_node) {
2888 /* hash found, or no matching entry */
2889 if (rule->fd_id >= sw_idx)
2894 /* if there is an old rule occupying our place remove it */
2895 if (rule && (rule->fd_id == sw_idx)) {
2896 /* Remove this rule, since we're either deleting it, or
2899 err = i40e_add_del_fdir(vsi, rule, false);
2900 hlist_del(&rule->fdir_node);
2902 pf->fdir_pf_active_filters--;
2905 /* If we weren't given an input, this is a delete, so just return the
2906 * error code indicating if there was an entry at the requested slot
2911 /* Otherwise, install the new rule as requested */
2912 INIT_HLIST_NODE(&input->fdir_node);
2914 /* add filter to the list */
2916 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
2918 hlist_add_head(&input->fdir_node,
2919 &pf->fdir_filter_list);
2922 pf->fdir_pf_active_filters++;
2928 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table
2929 * @pf: pointer to PF structure
2931 * This function searches the list of filters and determines which FLX_PIT
2932 * entries are still required. It will prune any entries which are no longer
2933 * in use after the deletion.
2935 static void i40e_prune_flex_pit_list(struct i40e_pf *pf)
2937 struct i40e_flex_pit *entry, *tmp;
2938 struct i40e_fdir_filter *rule;
2940 /* First, we'll check the l3 table */
2941 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) {
2944 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
2945 if (rule->flow_type != IP_USER_FLOW)
2947 if (rule->flex_filter &&
2948 rule->flex_offset == entry->src_offset) {
2954 /* If we didn't find the filter, then we can prune this entry
2958 list_del(&entry->list);
2963 /* Followed by the L4 table */
2964 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) {
2967 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
2968 /* Skip this filter if it's L3, since we already
2969 * checked those in the above loop
2971 if (rule->flow_type == IP_USER_FLOW)
2973 if (rule->flex_filter &&
2974 rule->flex_offset == entry->src_offset) {
2980 /* If we didn't find the filter, then we can prune this entry
2984 list_del(&entry->list);
2991 * i40e_del_fdir_entry - Deletes a Flow Director filter entry
2992 * @vsi: Pointer to the targeted VSI
2993 * @cmd: The command to get or set Rx flow classification rules
2995 * The function removes a Flow Director filter entry from the
2996 * hlist of the corresponding PF
2998 * Returns 0 on success
3000 static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
3001 struct ethtool_rxnfc *cmd)
3003 struct ethtool_rx_flow_spec *fsp =
3004 (struct ethtool_rx_flow_spec *)&cmd->fs;
3005 struct i40e_pf *pf = vsi->back;
3008 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3009 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
3012 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
3015 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
3017 i40e_prune_flex_pit_list(pf);
3019 i40e_fdir_check_and_reenable(pf);
3024 * i40e_unused_pit_index - Find an unused PIT index for given list
3025 * @pf: the PF data structure
3027 * Find the first unused flexible PIT index entry. We search both the L3 and
3028 * L4 flexible PIT lists so that the returned index is unique and unused by
3029 * either currently programmed L3 or L4 filters. We use a bit field as storage
3030 * to track which indexes are already used.
3032 static u8 i40e_unused_pit_index(struct i40e_pf *pf)
3034 unsigned long available_index = 0xFF;
3035 struct i40e_flex_pit *entry;
3037 /* We need to make sure that the new index isn't in use by either L3
3038 * or L4 filters so that IP_USER_FLOW filters can program both L3 and
3039 * L4 to use the same index.
3042 list_for_each_entry(entry, &pf->l4_flex_pit_list, list)
3043 clear_bit(entry->pit_index, &available_index);
3045 list_for_each_entry(entry, &pf->l3_flex_pit_list, list)
3046 clear_bit(entry->pit_index, &available_index);
3048 return find_first_bit(&available_index, 8);
3052 * i40e_find_flex_offset - Find an existing flex src_offset
3053 * @flex_pit_list: L3 or L4 flex PIT list
3054 * @src_offset: new src_offset to find
3056 * Searches the flex_pit_list for an existing offset. If no offset is
3057 * currently programmed, then this will return an ERR_PTR if there is no space
3058 * to add a new offset, otherwise it returns NULL.
3061 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list,
3064 struct i40e_flex_pit *entry;
3067 /* Search for the src_offset first. If we find a matching entry
3068 * already programmed, we can simply re-use it.
3070 list_for_each_entry(entry, flex_pit_list, list) {
3072 if (entry->src_offset == src_offset)
3076 /* If we haven't found an entry yet, then the provided src offset has
3077 * not yet been programmed. We will program the src offset later on,
3078 * but we need to indicate whether there is enough space to do so
3079 * here. We'll make use of ERR_PTR for this purpose.
3081 if (size >= I40E_FLEX_PIT_TABLE_SIZE)
3082 return ERR_PTR(-ENOSPC);
3088 * i40e_add_flex_offset - Add src_offset to flex PIT table list
3089 * @flex_pit_list: L3 or L4 flex PIT list
3090 * @src_offset: new src_offset to add
3091 * @pit_index: the PIT index to program
3093 * This function programs the new src_offset to the list. It is expected that
3094 * i40e_find_flex_offset has already been tried and returned NULL, indicating
3095 * that this offset is not programmed, and that the list has enough space to
3096 * store another offset.
3098 * Returns 0 on success, and negative value on error.
3100 static int i40e_add_flex_offset(struct list_head *flex_pit_list,
3104 struct i40e_flex_pit *new_pit, *entry;
3106 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL);
3110 new_pit->src_offset = src_offset;
3111 new_pit->pit_index = pit_index;
3113 /* We need to insert this item such that the list is sorted by
3114 * src_offset in ascending order.
3116 list_for_each_entry(entry, flex_pit_list, list) {
3117 if (new_pit->src_offset < entry->src_offset) {
3118 list_add_tail(&new_pit->list, &entry->list);
3122 /* If we found an entry with our offset already programmed we
3123 * can simply return here, after freeing the memory. However,
3124 * if the pit_index does not match we need to report an error.
3126 if (new_pit->src_offset == entry->src_offset) {
3129 /* If the PIT index is not the same we can't re-use
3130 * the entry, so we must report an error.
3132 if (new_pit->pit_index != entry->pit_index)
3140 /* If we reached here, then we haven't yet added the item. This means
3141 * that we should add the item at the end of the list.
3143 list_add_tail(&new_pit->list, flex_pit_list);
3148 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table
3149 * @pf: Pointer to the PF structure
3150 * @flex_pit_list: list of flexible src offsets in use
3151 * #flex_pit_start: index to first entry for this section of the table
3153 * In order to handle flexible data, the hardware uses a table of values
3154 * called the FLX_PIT table. This table is used to indicate which sections of
3155 * the input correspond to what PIT index values. Unfortunately, hardware is
3156 * very restrictive about programming this table. Entries must be ordered by
3157 * src_offset in ascending order, without duplicates. Additionally, unused
3158 * entries must be set to the unused index value, and must have valid size and
3159 * length according to the src_offset ordering.
3161 * This function will reprogram the FLX_PIT register from a book-keeping
3162 * structure that we guarantee is already ordered correctly, and has no more
3165 * To make things easier, we only support flexible values of one word length,
3166 * rather than allowing variable length flexible values.
3168 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf,
3169 struct list_head *flex_pit_list,
3172 struct i40e_flex_pit *entry = NULL;
3173 u16 last_offset = 0;
3176 /* First, loop over the list of flex PIT entries, and reprogram the
3179 list_for_each_entry(entry, flex_pit_list, list) {
3180 /* We have to be careful when programming values for the
3181 * largest SRC_OFFSET value. It is possible that adding
3182 * additional empty values at the end would overflow the space
3183 * for the SRC_OFFSET in the FLX_PIT register. To avoid this,
3184 * we check here and add the empty values prior to adding the
3187 * To determine this, we will use a loop from i+1 to 3, which
3188 * will determine whether the unused entries would have valid
3189 * SRC_OFFSET. Note that there cannot be extra entries past
3190 * this value, because the only valid values would have been
3191 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not
3192 * have been added to the list in the first place.
3194 for (j = i + 1; j < 3; j++) {
3195 u16 offset = entry->src_offset + j;
3196 int index = flex_pit_start + i;
3197 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3201 if (offset > I40E_MAX_FLEX_SRC_OFFSET) {
3202 i40e_write_rx_ctl(&pf->hw,
3203 I40E_PRTQF_FLX_PIT(index),
3209 /* Now, we can program the actual value into the table */
3210 i40e_write_rx_ctl(&pf->hw,
3211 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3212 I40E_FLEX_PREP_VAL(entry->pit_index + 50,
3214 entry->src_offset));
3218 /* In order to program the last entries in the table, we need to
3219 * determine the valid offset. If the list is empty, we'll just start
3220 * with 0. Otherwise, we'll start with the last item offset and add 1.
3221 * This ensures that all entries have valid sizes. If we don't do this
3222 * correctly, the hardware will disable flexible field parsing.
3224 if (!list_empty(flex_pit_list))
3225 last_offset = list_prev_entry(entry, list)->src_offset + 1;
3227 for (; i < 3; i++, last_offset++) {
3228 i40e_write_rx_ctl(&pf->hw,
3229 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3230 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3237 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change
3238 * @pf: pointer to the PF structure
3240 * This function reprograms both the L3 and L4 FLX_PIT tables. See the
3241 * internal helper function for implementation details.
3243 static void i40e_reprogram_flex_pit(struct i40e_pf *pf)
3245 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list,
3246 I40E_FLEX_PIT_IDX_START_L3);
3248 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list,
3249 I40E_FLEX_PIT_IDX_START_L4);
3251 /* We also need to program the L3 and L4 GLQF ORT register */
3252 i40e_write_rx_ctl(&pf->hw,
3253 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX),
3254 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3,
3257 i40e_write_rx_ctl(&pf->hw,
3258 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX),
3259 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4,
3264 * i40e_flow_str - Converts a flow_type into a human readable string
3265 * @flow_type: the flow type from a flow specification
3267 * Currently only flow types we support are included here, and the string
3268 * value attempts to match what ethtool would use to configure this flow type.
3270 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp)
3272 switch (fsp->flow_type & ~FLOW_EXT) {
3287 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index
3288 * @pit_index: PIT index to convert
3290 * Returns the mask for a given PIT index. Will return 0 if the pit_index is
3293 static u64 i40e_pit_index_to_mask(int pit_index)
3295 switch (pit_index) {
3297 return I40E_FLEX_50_MASK;
3299 return I40E_FLEX_51_MASK;
3301 return I40E_FLEX_52_MASK;
3303 return I40E_FLEX_53_MASK;
3305 return I40E_FLEX_54_MASK;
3307 return I40E_FLEX_55_MASK;
3309 return I40E_FLEX_56_MASK;
3311 return I40E_FLEX_57_MASK;
3318 * i40e_print_input_set - Show changes between two input sets
3319 * @vsi: the vsi being configured
3320 * @old: the old input set
3321 * @new: the new input set
3323 * Print the difference between old and new input sets by showing which series
3324 * of words are toggled on or off. Only displays the bits we actually support
3327 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new)
3329 struct i40e_pf *pf = vsi->back;
3330 bool old_value, new_value;
3333 old_value = !!(old & I40E_L3_SRC_MASK);
3334 new_value = !!(new & I40E_L3_SRC_MASK);
3335 if (old_value != new_value)
3336 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n",
3337 old_value ? "ON" : "OFF",
3338 new_value ? "ON" : "OFF");
3340 old_value = !!(old & I40E_L3_DST_MASK);
3341 new_value = !!(new & I40E_L3_DST_MASK);
3342 if (old_value != new_value)
3343 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n",
3344 old_value ? "ON" : "OFF",
3345 new_value ? "ON" : "OFF");
3347 old_value = !!(old & I40E_L4_SRC_MASK);
3348 new_value = !!(new & I40E_L4_SRC_MASK);
3349 if (old_value != new_value)
3350 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n",
3351 old_value ? "ON" : "OFF",
3352 new_value ? "ON" : "OFF");
3354 old_value = !!(old & I40E_L4_DST_MASK);
3355 new_value = !!(new & I40E_L4_DST_MASK);
3356 if (old_value != new_value)
3357 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n",
3358 old_value ? "ON" : "OFF",
3359 new_value ? "ON" : "OFF");
3361 old_value = !!(old & I40E_VERIFY_TAG_MASK);
3362 new_value = !!(new & I40E_VERIFY_TAG_MASK);
3363 if (old_value != new_value)
3364 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n",
3365 old_value ? "ON" : "OFF",
3366 new_value ? "ON" : "OFF");
3368 /* Show change of flexible filter entries */
3369 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) {
3370 u64 flex_mask = i40e_pit_index_to_mask(i);
3372 old_value = !!(old & flex_mask);
3373 new_value = !!(new & flex_mask);
3374 if (old_value != new_value)
3375 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n",
3377 old_value ? "ON" : "OFF",
3378 new_value ? "ON" : "OFF");
3381 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n",
3383 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n",
3388 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid
3389 * @vsi: pointer to the targeted VSI
3390 * @fsp: pointer to Rx flow specification
3391 * @userdef: userdefined data from flow specification
3393 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support
3394 * for partial matches exists with a few limitations. First, hardware only
3395 * supports masking by word boundary (2 bytes) and not per individual bit.
3396 * Second, hardware is limited to using one mask for a flow type and cannot
3397 * use a separate mask for each filter.
3399 * To support these limitations, if we already have a configured filter for
3400 * the specified type, this function enforces that new filters of the type
3401 * match the configured input set. Otherwise, if we do not have a filter of
3402 * the specified type, we allow the input set to be updated to match the
3405 * To help ensure that administrators understand why filters weren't displayed
3406 * as supported, we print a diagnostic message displaying how the input set
3407 * would change and warning to delete the preexisting filters if required.
3409 * Returns 0 on successful input set match, and a negative return code on
3412 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,
3413 struct ethtool_rx_flow_spec *fsp,
3414 struct i40e_rx_flow_userdef *userdef)
3416 struct i40e_pf *pf = vsi->back;
3417 struct ethtool_tcpip4_spec *tcp_ip4_spec;
3418 struct ethtool_usrip4_spec *usr_ip4_spec;
3419 u64 current_mask, new_mask;
3420 bool new_flex_offset = false;
3421 bool flex_l3 = false;
3422 u16 *fdir_filter_count;
3423 u16 index, src_offset = 0;
3427 switch (fsp->flow_type & ~FLOW_EXT) {
3429 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
3430 fdir_filter_count = &pf->fd_sctp4_filter_cnt;
3433 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3434 fdir_filter_count = &pf->fd_tcp4_filter_cnt;
3437 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3438 fdir_filter_count = &pf->fd_udp4_filter_cnt;
3441 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
3442 fdir_filter_count = &pf->fd_ip4_filter_cnt;
3449 /* Read the current input set from register memory. */
3450 current_mask = i40e_read_fd_input_set(pf, index);
3451 new_mask = current_mask;
3453 /* Determine, if any, the required changes to the input set in order
3454 * to support the provided mask.
3456 * Hardware only supports masking at word (2 byte) granularity and does
3457 * not support full bitwise masking. This implementation simplifies
3458 * even further and only supports fully enabled or fully disabled
3459 * masks for each field, even though we could split the ip4src and
3462 switch (fsp->flow_type & ~FLOW_EXT) {
3464 new_mask &= ~I40E_VERIFY_TAG_MASK;
3468 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec;
3470 /* IPv4 source address */
3471 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF))
3472 new_mask |= I40E_L3_SRC_MASK;
3473 else if (!tcp_ip4_spec->ip4src)
3474 new_mask &= ~I40E_L3_SRC_MASK;
3478 /* IPv4 destination address */
3479 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
3480 new_mask |= I40E_L3_DST_MASK;
3481 else if (!tcp_ip4_spec->ip4dst)
3482 new_mask &= ~I40E_L3_DST_MASK;
3486 /* L4 source port */
3487 if (tcp_ip4_spec->psrc == htons(0xFFFF))
3488 new_mask |= I40E_L4_SRC_MASK;
3489 else if (!tcp_ip4_spec->psrc)
3490 new_mask &= ~I40E_L4_SRC_MASK;
3494 /* L4 destination port */
3495 if (tcp_ip4_spec->pdst == htons(0xFFFF))
3496 new_mask |= I40E_L4_DST_MASK;
3497 else if (!tcp_ip4_spec->pdst)
3498 new_mask &= ~I40E_L4_DST_MASK;
3502 /* Filtering on Type of Service is not supported. */
3503 if (tcp_ip4_spec->tos)
3508 usr_ip4_spec = &fsp->m_u.usr_ip4_spec;
3510 /* IPv4 source address */
3511 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF))
3512 new_mask |= I40E_L3_SRC_MASK;
3513 else if (!usr_ip4_spec->ip4src)
3514 new_mask &= ~I40E_L3_SRC_MASK;
3518 /* IPv4 destination address */
3519 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
3520 new_mask |= I40E_L3_DST_MASK;
3521 else if (!usr_ip4_spec->ip4dst)
3522 new_mask &= ~I40E_L3_DST_MASK;
3526 /* First 4 bytes of L4 header */
3527 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF))
3528 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK;
3529 else if (!usr_ip4_spec->l4_4_bytes)
3530 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
3534 /* Filtering on Type of Service is not supported. */
3535 if (usr_ip4_spec->tos)
3538 /* Filtering on IP version is not supported */
3539 if (usr_ip4_spec->ip_ver)
3542 /* Filtering on L4 protocol is not supported */
3543 if (usr_ip4_spec->proto)
3551 /* First, clear all flexible filter entries */
3552 new_mask &= ~I40E_FLEX_INPUT_MASK;
3554 /* If we have a flexible filter, try to add this offset to the correct
3555 * flexible filter PIT list. Once finished, we can update the mask.
3556 * If the src_offset changed, we will get a new mask value which will
3557 * trigger an input set change.
3559 if (userdef->flex_filter) {
3560 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL;
3562 /* Flexible offset must be even, since the flexible payload
3563 * must be aligned on 2-byte boundary.
3565 if (userdef->flex_offset & 0x1) {
3566 dev_warn(&pf->pdev->dev,
3567 "Flexible data offset must be 2-byte aligned\n");
3571 src_offset = userdef->flex_offset >> 1;
3573 /* FLX_PIT source offset value is only so large */
3574 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) {
3575 dev_warn(&pf->pdev->dev,
3576 "Flexible data must reside within first 64 bytes of the packet payload\n");
3580 /* See if this offset has already been programmed. If we get
3581 * an ERR_PTR, then the filter is not safe to add. Otherwise,
3582 * if we get a NULL pointer, this means we will need to add
3585 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list,
3587 if (IS_ERR(flex_pit))
3588 return PTR_ERR(flex_pit);
3590 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown)
3591 * packet types, and thus we need to program both L3 and L4
3592 * flexible values. These must have identical flexible index,
3593 * as otherwise we can't correctly program the input set. So
3594 * we'll find both an L3 and L4 index and make sure they are
3599 i40e_find_flex_offset(&pf->l3_flex_pit_list,
3601 if (IS_ERR(l3_flex_pit))
3602 return PTR_ERR(l3_flex_pit);
3605 /* If we already had a matching L4 entry, we
3606 * need to make sure that the L3 entry we
3607 * obtained uses the same index.
3610 if (l3_flex_pit->pit_index !=
3611 flex_pit->pit_index) {
3615 new_flex_offset = true;
3618 flex_pit = l3_flex_pit;
3622 /* If we didn't find an existing flex offset, we need to
3623 * program a new one. However, we don't immediately program it
3624 * here because we will wait to program until after we check
3625 * that it is safe to change the input set.
3628 new_flex_offset = true;
3629 pit_index = i40e_unused_pit_index(pf);
3631 pit_index = flex_pit->pit_index;
3634 /* Update the mask with the new offset */
3635 new_mask |= i40e_pit_index_to_mask(pit_index);
3638 /* If the mask and flexible filter offsets for this filter match the
3639 * currently programmed values we don't need any input set change, so
3640 * this filter is safe to install.
3642 if (new_mask == current_mask && !new_flex_offset)
3645 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n",
3646 i40e_flow_str(fsp));
3647 i40e_print_input_set(vsi, current_mask, new_mask);
3648 if (new_flex_offset) {
3649 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d",
3650 pit_index, src_offset);
3653 /* Hardware input sets are global across multiple ports, so even the
3654 * main port cannot change them when in MFP mode as this would impact
3655 * any filters on the other ports.
3657 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3658 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n");
3662 /* This filter requires us to update the input set. However, hardware
3663 * only supports one input set per flow type, and does not support
3664 * separate masks for each filter. This means that we can only support
3665 * a single mask for all filters of a specific type.
3667 * If we have preexisting filters, they obviously depend on the
3668 * current programmed input set. Display a diagnostic message in this
3669 * case explaining why the filter could not be accepted.
3671 if (*fdir_filter_count) {
3672 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n",
3674 *fdir_filter_count);
3678 i40e_write_fd_input_set(pf, index, new_mask);
3680 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented
3681 * frames. If we're programming the input set for IPv4/Other, we also
3682 * need to program the IPv4/Fragmented input set. Since we don't have
3683 * separate support, we'll always assume and enforce that the two flow
3684 * types must have matching input sets.
3686 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER)
3687 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
3690 /* Add the new offset and update table, if necessary */
3691 if (new_flex_offset) {
3692 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset,
3698 err = i40e_add_flex_offset(&pf->l3_flex_pit_list,
3705 i40e_reprogram_flex_pit(pf);
3712 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters
3713 * @vsi: pointer to the targeted VSI
3714 * @cmd: command to get or set RX flow classification rules
3716 * Add Flow Director filters for a specific flow spec based on their
3717 * protocol. Returns 0 if the filters were successfully added.
3719 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
3720 struct ethtool_rxnfc *cmd)
3722 struct i40e_rx_flow_userdef userdef;
3723 struct ethtool_rx_flow_spec *fsp;
3724 struct i40e_fdir_filter *input;
3725 u16 dest_vsi = 0, q_index = 0;
3734 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3737 if (pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED)
3740 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3741 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
3744 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
3747 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
3749 /* Parse the user-defined field */
3750 if (i40e_parse_rx_flow_user_data(fsp, &userdef))
3753 /* Extended MAC field is not supported */
3754 if (fsp->flow_type & FLOW_MAC_EXT)
3757 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef);
3761 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
3762 pf->hw.func_caps.fd_filters_guaranteed)) {
3766 /* ring_cookie is either the drop index, or is a mask of the queue
3767 * index and VF id we wish to target.
3769 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
3770 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
3772 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
3773 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
3776 if (ring >= vsi->num_queue_pairs)
3780 /* VFs are zero-indexed, so we subtract one here */
3783 if (vf >= pf->num_alloc_vfs)
3785 if (ring >= pf->vf[vf].num_queue_pairs)
3787 dest_vsi = pf->vf[vf].lan_vsi_id;
3789 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
3793 input = kzalloc(sizeof(*input), GFP_KERNEL);
3798 input->fd_id = fsp->location;
3799 input->q_index = q_index;
3800 input->dest_vsi = dest_vsi;
3801 input->dest_ctl = dest_ctl;
3802 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
3803 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
3804 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
3805 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
3806 input->flow_type = fsp->flow_type & ~FLOW_EXT;
3807 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto;
3809 /* Reverse the src and dest notion, since the HW expects them to be from
3810 * Tx perspective where as the input from user is from Rx filter view.
3812 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
3813 input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
3814 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
3815 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
3817 if (userdef.flex_filter) {
3818 input->flex_filter = true;
3819 input->flex_word = cpu_to_be16(userdef.flex_word);
3820 input->flex_offset = userdef.flex_offset;
3823 ret = i40e_add_del_fdir(vsi, input, true);
3827 /* Add the input filter to the fdir_input_list, possibly replacing
3828 * a previous filter. Do not free the input structure after adding it
3829 * to the list as this would cause a use-after-free bug.
3831 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
3841 * i40e_set_rxnfc - command to set RX flow classification rules
3842 * @netdev: network interface device structure
3843 * @cmd: ethtool rxnfc command
3845 * Returns Success if the command is supported.
3847 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
3849 struct i40e_netdev_priv *np = netdev_priv(netdev);
3850 struct i40e_vsi *vsi = np->vsi;
3851 struct i40e_pf *pf = vsi->back;
3852 int ret = -EOPNOTSUPP;
3856 ret = i40e_set_rss_hash_opt(pf, cmd);
3858 case ETHTOOL_SRXCLSRLINS:
3859 ret = i40e_add_fdir_ethtool(vsi, cmd);
3861 case ETHTOOL_SRXCLSRLDEL:
3862 ret = i40e_del_fdir_entry(vsi, cmd);
3872 * i40e_max_channels - get Max number of combined channels supported
3875 static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
3877 /* TODO: This code assumes DCB and FD is disabled for now. */
3878 return vsi->alloc_queue_pairs;
3882 * i40e_get_channels - Get the current channels enabled and max supported etc.
3883 * @netdev: network interface device structure
3884 * @ch: ethtool channels structure
3886 * We don't support separate tx and rx queues as channels. The other count
3887 * represents how many queues are being used for control. max_combined counts
3888 * how many queue pairs we can support. They may not be mapped 1 to 1 with
3889 * q_vectors since we support a lot more queue pairs than q_vectors.
3891 static void i40e_get_channels(struct net_device *dev,
3892 struct ethtool_channels *ch)
3894 struct i40e_netdev_priv *np = netdev_priv(dev);
3895 struct i40e_vsi *vsi = np->vsi;
3896 struct i40e_pf *pf = vsi->back;
3898 /* report maximum channels */
3899 ch->max_combined = i40e_max_channels(vsi);
3901 /* report info for other vector */
3902 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0;
3903 ch->max_other = ch->other_count;
3905 /* Note: This code assumes DCB is disabled for now. */
3906 ch->combined_count = vsi->num_queue_pairs;
3910 * i40e_set_channels - Set the new channels count.
3911 * @netdev: network interface device structure
3912 * @ch: ethtool channels structure
3914 * The new channels count may not be the same as requested by the user
3915 * since it gets rounded down to a power of 2 value.
3917 static int i40e_set_channels(struct net_device *dev,
3918 struct ethtool_channels *ch)
3920 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
3921 struct i40e_netdev_priv *np = netdev_priv(dev);
3922 unsigned int count = ch->combined_count;
3923 struct i40e_vsi *vsi = np->vsi;
3924 struct i40e_pf *pf = vsi->back;
3925 struct i40e_fdir_filter *rule;
3926 struct hlist_node *node2;
3930 /* We do not support setting channels for any other VSI at present */
3931 if (vsi->type != I40E_VSI_MAIN)
3934 /* verify they are not requesting separate vectors */
3935 if (!count || ch->rx_count || ch->tx_count)
3938 /* verify other_count has not changed */
3939 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0))
3942 /* verify the number of channels does not exceed hardware limits */
3943 if (count > i40e_max_channels(vsi))
3946 /* verify that the number of channels does not invalidate any current
3947 * flow director rules
3949 hlist_for_each_entry_safe(rule, node2,
3950 &pf->fdir_filter_list, fdir_node) {
3951 if (rule->dest_ctl != drop && count <= rule->q_index) {
3952 dev_warn(&pf->pdev->dev,
3953 "Existing user defined filter %d assigns flow to queue %d\n",
3954 rule->fd_id, rule->q_index);
3960 dev_err(&pf->pdev->dev,
3961 "Existing filter rules must be deleted to reduce combined channel count to %d\n",
3966 /* update feature limits from largest to smallest supported values */
3967 /* TODO: Flow director limit, DCB etc */
3969 /* use rss_reconfig to rebuild with new queue count and update traffic
3970 * class queue mapping
3972 new_count = i40e_reconfig_rss_queues(pf, count);
3980 * i40e_get_rxfh_key_size - get the RSS hash key size
3981 * @netdev: network interface device structure
3983 * Returns the table size.
3985 static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
3987 return I40E_HKEY_ARRAY_SIZE;
3991 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size
3992 * @netdev: network interface device structure
3994 * Returns the table size.
3996 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
3998 return I40E_HLUT_ARRAY_SIZE;
4001 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
4004 struct i40e_netdev_priv *np = netdev_priv(netdev);
4005 struct i40e_vsi *vsi = np->vsi;
4006 u8 *lut, *seed = NULL;
4011 *hfunc = ETH_RSS_HASH_TOP;
4017 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4020 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
4023 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4024 indir[i] = (u32)(lut[i]);
4033 * i40e_set_rxfh - set the rx flow hash indirection table
4034 * @netdev: network interface device structure
4035 * @indir: indirection table
4038 * Returns -EINVAL if the table specifies an invalid queue id, otherwise
4039 * returns 0 after programming the table.
4041 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir,
4042 const u8 *key, const u8 hfunc)
4044 struct i40e_netdev_priv *np = netdev_priv(netdev);
4045 struct i40e_vsi *vsi = np->vsi;
4046 struct i40e_pf *pf = vsi->back;
4050 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
4054 if (!vsi->rss_hkey_user) {
4055 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
4057 if (!vsi->rss_hkey_user)
4060 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE);
4061 seed = vsi->rss_hkey_user;
4063 if (!vsi->rss_lut_user) {
4064 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4065 if (!vsi->rss_lut_user)
4069 /* Each 32 bits pointed by 'indir' is stored with a lut entry */
4071 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4072 vsi->rss_lut_user[i] = (u8)(indir[i]);
4074 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
4077 return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
4078 I40E_HLUT_ARRAY_SIZE);
4082 * i40e_get_priv_flags - report device private flags
4083 * @dev: network interface device structure
4085 * The get string set count and the string set should be matched for each
4086 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags
4089 * Returns a u32 bitmap of flags.
4091 static u32 i40e_get_priv_flags(struct net_device *dev)
4093 struct i40e_netdev_priv *np = netdev_priv(dev);
4094 struct i40e_vsi *vsi = np->vsi;
4095 struct i40e_pf *pf = vsi->back;
4096 u32 i, j, ret_flags = 0;
4098 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4099 const struct i40e_priv_flags *priv_flags;
4101 priv_flags = &i40e_gstrings_priv_flags[i];
4103 if (priv_flags->flag & pf->flags)
4104 ret_flags |= BIT(i);
4107 if (pf->hw.pf_id != 0)
4110 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4111 const struct i40e_priv_flags *priv_flags;
4113 priv_flags = &i40e_gl_gstrings_priv_flags[j];
4115 if (priv_flags->flag & pf->flags)
4116 ret_flags |= BIT(i + j);
4123 * i40e_set_priv_flags - set private flags
4124 * @dev: network interface device structure
4125 * @flags: bit flags to be set
4127 static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
4129 struct i40e_netdev_priv *np = netdev_priv(dev);
4130 struct i40e_vsi *vsi = np->vsi;
4131 struct i40e_pf *pf = vsi->back;
4132 u64 orig_flags, new_flags, changed_flags;
4135 orig_flags = READ_ONCE(pf->flags);
4136 new_flags = orig_flags;
4138 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4139 const struct i40e_priv_flags *priv_flags;
4141 priv_flags = &i40e_gstrings_priv_flags[i];
4144 new_flags |= priv_flags->flag;
4146 new_flags &= ~(priv_flags->flag);
4148 /* If this is a read-only flag, it can't be changed */
4149 if (priv_flags->read_only &&
4150 ((orig_flags ^ new_flags) & ~BIT(i)))
4154 if (pf->hw.pf_id != 0)
4155 goto flags_complete;
4157 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4158 const struct i40e_priv_flags *priv_flags;
4160 priv_flags = &i40e_gl_gstrings_priv_flags[j];
4162 if (flags & BIT(i + j))
4163 new_flags |= priv_flags->flag;
4165 new_flags &= ~(priv_flags->flag);
4167 /* If this is a read-only flag, it can't be changed */
4168 if (priv_flags->read_only &&
4169 ((orig_flags ^ new_flags) & ~BIT(i)))
4174 /* Before we finalize any flag changes, we need to perform some
4175 * checks to ensure that the changes are supported and safe.
4178 /* ATR eviction is not supported on all devices */
4179 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) &&
4180 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE))
4183 /* Compare and exchange the new flags into place. If we failed, that
4184 * is if cmpxchg64 returns anything but the old value, this means that
4185 * something else has modified the flags variable since we copied it
4186 * originally. We'll just punt with an error and log something in the
4189 if (cmpxchg64(&pf->flags, orig_flags, new_flags) != orig_flags) {
4190 dev_warn(&pf->pdev->dev,
4191 "Unable to update pf->flags as it was modified by another thread...\n");
4195 changed_flags = orig_flags ^ new_flags;
4197 /* Process any additional changes needed as a result of flag changes.
4198 * The changed_flags value reflects the list of bits that were
4199 * changed in the code above.
4202 /* Flush current ATR settings if ATR was disabled */
4203 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) &&
4204 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) {
4205 pf->flags |= I40E_FLAG_FD_ATR_AUTO_DISABLED;
4206 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
4209 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) {
4210 u16 sw_flags = 0, valid_flags = 0;
4213 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
4214 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
4215 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
4216 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
4218 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
4219 dev_info(&pf->pdev->dev,
4220 "couldn't set switch config bits, err %s aq_err %s\n",
4221 i40e_stat_str(&pf->hw, ret),
4222 i40e_aq_str(&pf->hw,
4223 pf->hw.aq.asq_last_status));
4224 /* not a fatal problem, just keep going */
4228 /* Issue reset to cause things to take effect, as additional bits
4229 * are added we will need to create a mask of bits requiring reset
4231 if ((changed_flags & I40E_FLAG_VEB_STATS_ENABLED) ||
4232 ((changed_flags & I40E_FLAG_LEGACY_RX) && netif_running(dev)))
4233 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
4238 static const struct ethtool_ops i40e_ethtool_ops = {
4239 .get_drvinfo = i40e_get_drvinfo,
4240 .get_regs_len = i40e_get_regs_len,
4241 .get_regs = i40e_get_regs,
4242 .nway_reset = i40e_nway_reset,
4243 .get_link = ethtool_op_get_link,
4244 .get_wol = i40e_get_wol,
4245 .set_wol = i40e_set_wol,
4246 .set_eeprom = i40e_set_eeprom,
4247 .get_eeprom_len = i40e_get_eeprom_len,
4248 .get_eeprom = i40e_get_eeprom,
4249 .get_ringparam = i40e_get_ringparam,
4250 .set_ringparam = i40e_set_ringparam,
4251 .get_pauseparam = i40e_get_pauseparam,
4252 .set_pauseparam = i40e_set_pauseparam,
4253 .get_msglevel = i40e_get_msglevel,
4254 .set_msglevel = i40e_set_msglevel,
4255 .get_rxnfc = i40e_get_rxnfc,
4256 .set_rxnfc = i40e_set_rxnfc,
4257 .self_test = i40e_diag_test,
4258 .get_strings = i40e_get_strings,
4259 .set_phys_id = i40e_set_phys_id,
4260 .get_sset_count = i40e_get_sset_count,
4261 .get_ethtool_stats = i40e_get_ethtool_stats,
4262 .get_coalesce = i40e_get_coalesce,
4263 .set_coalesce = i40e_set_coalesce,
4264 .get_rxfh_key_size = i40e_get_rxfh_key_size,
4265 .get_rxfh_indir_size = i40e_get_rxfh_indir_size,
4266 .get_rxfh = i40e_get_rxfh,
4267 .set_rxfh = i40e_set_rxfh,
4268 .get_channels = i40e_get_channels,
4269 .set_channels = i40e_set_channels,
4270 .get_ts_info = i40e_get_ts_info,
4271 .get_priv_flags = i40e_get_priv_flags,
4272 .set_priv_flags = i40e_set_priv_flags,
4273 .get_per_queue_coalesce = i40e_get_per_queue_coalesce,
4274 .set_per_queue_coalesce = i40e_set_per_queue_coalesce,
4275 .get_link_ksettings = i40e_get_link_ksettings,
4276 .set_link_ksettings = i40e_set_link_ksettings,
4279 void i40e_set_ethtool_ops(struct net_device *netdev)
4281 netdev->ethtool_ops = &i40e_ethtool_ops;