1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
4 #include <linux/types.h>
5 #include <linux/module.h>
9 #include <linux/if_macvlan.h>
10 #include <linux/prefetch.h>
14 #define DRV_SUMMARY "Intel(R) Ethernet Switch Host Interface Driver"
15 char fm10k_driver_name[] = "fm10k";
16 static const char fm10k_driver_string[] = DRV_SUMMARY;
17 static const char fm10k_copyright[] =
18 "Copyright(c) 2013 - 2019 Intel Corporation.";
20 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
21 MODULE_DESCRIPTION(DRV_SUMMARY);
22 MODULE_LICENSE("GPL v2");
24 /* single workqueue for entire fm10k driver */
25 struct workqueue_struct *fm10k_workqueue;
28 * fm10k_init_module - Driver Registration Routine
30 * fm10k_init_module is the first routine called when the driver is
31 * loaded. All it does is register with the PCI subsystem.
33 static int __init fm10k_init_module(void)
37 pr_info("%s\n", fm10k_driver_string);
38 pr_info("%s\n", fm10k_copyright);
40 /* create driver workqueue */
41 fm10k_workqueue = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0,
48 ret = fm10k_register_pci_driver();
51 destroy_workqueue(fm10k_workqueue);
56 module_init(fm10k_init_module);
59 * fm10k_exit_module - Driver Exit Cleanup Routine
61 * fm10k_exit_module is called just before the driver is removed
64 static void __exit fm10k_exit_module(void)
66 fm10k_unregister_pci_driver();
70 /* destroy driver workqueue */
71 destroy_workqueue(fm10k_workqueue);
73 module_exit(fm10k_exit_module);
75 static bool fm10k_alloc_mapped_page(struct fm10k_ring *rx_ring,
76 struct fm10k_rx_buffer *bi)
78 struct page *page = bi->page;
81 /* Only page will be NULL if buffer was consumed */
85 /* alloc new page for storage */
86 page = dev_alloc_page();
87 if (unlikely(!page)) {
88 rx_ring->rx_stats.alloc_failed++;
92 /* map page for use */
93 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
95 /* if mapping failed free memory back to system since
96 * there isn't much point in holding memory we can't use
98 if (dma_mapping_error(rx_ring->dev, dma)) {
101 rx_ring->rx_stats.alloc_failed++;
113 * fm10k_alloc_rx_buffers - Replace used receive buffers
114 * @rx_ring: ring to place buffers on
115 * @cleaned_count: number of buffers to replace
117 void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count)
119 union fm10k_rx_desc *rx_desc;
120 struct fm10k_rx_buffer *bi;
121 u16 i = rx_ring->next_to_use;
127 rx_desc = FM10K_RX_DESC(rx_ring, i);
128 bi = &rx_ring->rx_buffer[i];
132 if (!fm10k_alloc_mapped_page(rx_ring, bi))
135 /* Refresh the desc even if buffer_addrs didn't change
136 * because each write-back erases this info.
138 rx_desc->q.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
144 rx_desc = FM10K_RX_DESC(rx_ring, 0);
145 bi = rx_ring->rx_buffer;
149 /* clear the status bits for the next_to_use descriptor */
150 rx_desc->d.staterr = 0;
153 } while (cleaned_count);
157 if (rx_ring->next_to_use != i) {
158 /* record the next descriptor to use */
159 rx_ring->next_to_use = i;
161 /* update next to alloc since we have filled the ring */
162 rx_ring->next_to_alloc = i;
164 /* Force memory writes to complete before letting h/w
165 * know there are new descriptors to fetch. (Only
166 * applicable for weak-ordered memory model archs,
171 /* notify hardware of new descriptors */
172 writel(i, rx_ring->tail);
177 * fm10k_reuse_rx_page - page flip buffer and store it back on the ring
178 * @rx_ring: rx descriptor ring to store buffers on
179 * @old_buff: donor buffer to have page reused
181 * Synchronizes page for reuse by the interface
183 static void fm10k_reuse_rx_page(struct fm10k_ring *rx_ring,
184 struct fm10k_rx_buffer *old_buff)
186 struct fm10k_rx_buffer *new_buff;
187 u16 nta = rx_ring->next_to_alloc;
189 new_buff = &rx_ring->rx_buffer[nta];
191 /* update, and store next to alloc */
193 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
195 /* transfer page from old buffer to new buffer */
196 *new_buff = *old_buff;
198 /* sync the buffer for use by the device */
199 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
200 old_buff->page_offset,
205 static inline bool fm10k_page_is_reserved(struct page *page)
207 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
210 static bool fm10k_can_reuse_rx_page(struct fm10k_rx_buffer *rx_buffer,
212 unsigned int __maybe_unused truesize)
214 /* avoid re-using remote pages */
215 if (unlikely(fm10k_page_is_reserved(page)))
218 #if (PAGE_SIZE < 8192)
219 /* if we are only owner of page we can reuse it */
220 if (unlikely(page_count(page) != 1))
223 /* flip page offset to other buffer */
224 rx_buffer->page_offset ^= FM10K_RX_BUFSZ;
226 /* move offset up to the next cache line */
227 rx_buffer->page_offset += truesize;
229 if (rx_buffer->page_offset > (PAGE_SIZE - FM10K_RX_BUFSZ))
233 /* Even if we own the page, we are not allowed to use atomic_set()
234 * This would break get_page_unless_zero() users.
242 * fm10k_add_rx_frag - Add contents of Rx buffer to sk_buff
243 * @rx_buffer: buffer containing page to add
244 * @size: packet size from rx_desc
245 * @rx_desc: descriptor containing length of buffer written by hardware
246 * @skb: sk_buff to place the data into
248 * This function will add the data contained in rx_buffer->page to the skb.
249 * This is done either through a direct copy if the data in the buffer is
250 * less than the skb header size, otherwise it will just attach the page as
253 * The function will then update the page offset if necessary and return
254 * true if the buffer can be reused by the interface.
256 static bool fm10k_add_rx_frag(struct fm10k_rx_buffer *rx_buffer,
258 union fm10k_rx_desc *rx_desc,
261 struct page *page = rx_buffer->page;
262 unsigned char *va = page_address(page) + rx_buffer->page_offset;
263 #if (PAGE_SIZE < 8192)
264 unsigned int truesize = FM10K_RX_BUFSZ;
266 unsigned int truesize = ALIGN(size, 512);
268 unsigned int pull_len;
270 if (unlikely(skb_is_nonlinear(skb)))
273 if (likely(size <= FM10K_RX_HDR_LEN)) {
274 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
276 /* page is not reserved, we can reuse buffer as-is */
277 if (likely(!fm10k_page_is_reserved(page)))
280 /* this page cannot be reused so discard it */
285 /* we need the header to contain the greater of either ETH_HLEN or
286 * 60 bytes if the skb->len is less than 60 for skb_pad.
288 pull_len = eth_get_headlen(skb->dev, va, FM10K_RX_HDR_LEN);
290 /* align pull length to size of long to optimize memcpy performance */
291 memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
293 /* update all of the pointers */
298 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
299 (unsigned long)va & ~PAGE_MASK, size, truesize);
301 return fm10k_can_reuse_rx_page(rx_buffer, page, truesize);
304 static struct sk_buff *fm10k_fetch_rx_buffer(struct fm10k_ring *rx_ring,
305 union fm10k_rx_desc *rx_desc,
308 unsigned int size = le16_to_cpu(rx_desc->w.length);
309 struct fm10k_rx_buffer *rx_buffer;
312 rx_buffer = &rx_ring->rx_buffer[rx_ring->next_to_clean];
313 page = rx_buffer->page;
317 void *page_addr = page_address(page) +
318 rx_buffer->page_offset;
320 /* prefetch first cache line of first page */
321 net_prefetch(page_addr);
323 /* allocate a skb to store the frags */
324 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
326 if (unlikely(!skb)) {
327 rx_ring->rx_stats.alloc_failed++;
331 /* we will be copying header into skb->data in
332 * pskb_may_pull so it is in our interest to prefetch
333 * it now to avoid a possible cache miss
335 prefetchw(skb->data);
338 /* we are reusing so sync this buffer for CPU use */
339 dma_sync_single_range_for_cpu(rx_ring->dev,
341 rx_buffer->page_offset,
345 /* pull page into skb */
346 if (fm10k_add_rx_frag(rx_buffer, size, rx_desc, skb)) {
347 /* hand second half of page back to the ring */
348 fm10k_reuse_rx_page(rx_ring, rx_buffer);
350 /* we are not reusing the buffer so unmap it */
351 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
352 PAGE_SIZE, DMA_FROM_DEVICE);
355 /* clear contents of rx_buffer */
356 rx_buffer->page = NULL;
361 static inline void fm10k_rx_checksum(struct fm10k_ring *ring,
362 union fm10k_rx_desc *rx_desc,
365 skb_checksum_none_assert(skb);
367 /* Rx checksum disabled via ethtool */
368 if (!(ring->netdev->features & NETIF_F_RXCSUM))
371 /* TCP/UDP checksum error bit is set */
372 if (fm10k_test_staterr(rx_desc,
373 FM10K_RXD_STATUS_L4E |
374 FM10K_RXD_STATUS_L4E2 |
375 FM10K_RXD_STATUS_IPE |
376 FM10K_RXD_STATUS_IPE2)) {
377 ring->rx_stats.csum_err++;
381 /* It must be a TCP or UDP packet with a valid checksum */
382 if (fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_L4CS2))
383 skb->encapsulation = true;
384 else if (!fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_L4CS))
387 skb->ip_summed = CHECKSUM_UNNECESSARY;
389 ring->rx_stats.csum_good++;
392 #define FM10K_RSS_L4_TYPES_MASK \
393 (BIT(FM10K_RSSTYPE_IPV4_TCP) | \
394 BIT(FM10K_RSSTYPE_IPV4_UDP) | \
395 BIT(FM10K_RSSTYPE_IPV6_TCP) | \
396 BIT(FM10K_RSSTYPE_IPV6_UDP))
398 static inline void fm10k_rx_hash(struct fm10k_ring *ring,
399 union fm10k_rx_desc *rx_desc,
404 if (!(ring->netdev->features & NETIF_F_RXHASH))
407 rss_type = le16_to_cpu(rx_desc->w.pkt_info) & FM10K_RXD_RSSTYPE_MASK;
411 skb_set_hash(skb, le32_to_cpu(rx_desc->d.rss),
412 (BIT(rss_type) & FM10K_RSS_L4_TYPES_MASK) ?
413 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
416 static void fm10k_type_trans(struct fm10k_ring *rx_ring,
417 union fm10k_rx_desc __maybe_unused *rx_desc,
420 struct net_device *dev = rx_ring->netdev;
421 struct fm10k_l2_accel *l2_accel = rcu_dereference_bh(rx_ring->l2_accel);
423 /* check to see if DGLORT belongs to a MACVLAN */
425 u16 idx = le16_to_cpu(FM10K_CB(skb)->fi.w.dglort) - 1;
427 idx -= l2_accel->dglort;
428 if (idx < l2_accel->size && l2_accel->macvlan[idx])
429 dev = l2_accel->macvlan[idx];
434 /* Record Rx queue, or update macvlan statistics */
436 skb_record_rx_queue(skb, rx_ring->queue_index);
438 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
441 skb->protocol = eth_type_trans(skb, dev);
445 * fm10k_process_skb_fields - Populate skb header fields from Rx descriptor
446 * @rx_ring: rx descriptor ring packet is being transacted on
447 * @rx_desc: pointer to the EOP Rx descriptor
448 * @skb: pointer to current skb being populated
450 * This function checks the ring, descriptor, and packet information in
451 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
452 * other fields within the skb.
454 static unsigned int fm10k_process_skb_fields(struct fm10k_ring *rx_ring,
455 union fm10k_rx_desc *rx_desc,
458 unsigned int len = skb->len;
460 fm10k_rx_hash(rx_ring, rx_desc, skb);
462 fm10k_rx_checksum(rx_ring, rx_desc, skb);
464 FM10K_CB(skb)->tstamp = rx_desc->q.timestamp;
466 FM10K_CB(skb)->fi.w.vlan = rx_desc->w.vlan;
468 FM10K_CB(skb)->fi.d.glort = rx_desc->d.glort;
470 if (rx_desc->w.vlan) {
471 u16 vid = le16_to_cpu(rx_desc->w.vlan);
473 if ((vid & VLAN_VID_MASK) != rx_ring->vid)
474 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
475 else if (vid & VLAN_PRIO_MASK)
476 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
477 vid & VLAN_PRIO_MASK);
480 fm10k_type_trans(rx_ring, rx_desc, skb);
486 * fm10k_is_non_eop - process handling of non-EOP buffers
487 * @rx_ring: Rx ring being processed
488 * @rx_desc: Rx descriptor for current buffer
490 * This function updates next to clean. If the buffer is an EOP buffer
491 * this function exits returning false, otherwise it will place the
492 * sk_buff in the next buffer to be chained and return true indicating
493 * that this is in fact a non-EOP buffer.
495 static bool fm10k_is_non_eop(struct fm10k_ring *rx_ring,
496 union fm10k_rx_desc *rx_desc)
498 u32 ntc = rx_ring->next_to_clean + 1;
500 /* fetch, update, and store next to clean */
501 ntc = (ntc < rx_ring->count) ? ntc : 0;
502 rx_ring->next_to_clean = ntc;
504 prefetch(FM10K_RX_DESC(rx_ring, ntc));
506 if (likely(fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_EOP)))
513 * fm10k_cleanup_headers - Correct corrupted or empty headers
514 * @rx_ring: rx descriptor ring packet is being transacted on
515 * @rx_desc: pointer to the EOP Rx descriptor
516 * @skb: pointer to current skb being fixed
518 * Address the case where we are pulling data in on pages only
519 * and as such no data is present in the skb header.
521 * In addition if skb is not at least 60 bytes we need to pad it so that
522 * it is large enough to qualify as a valid Ethernet frame.
524 * Returns true if an error was encountered and skb was freed.
526 static bool fm10k_cleanup_headers(struct fm10k_ring *rx_ring,
527 union fm10k_rx_desc *rx_desc,
530 if (unlikely((fm10k_test_staterr(rx_desc,
531 FM10K_RXD_STATUS_RXE)))) {
532 #define FM10K_TEST_RXD_BIT(rxd, bit) \
533 ((rxd)->w.csum_err & cpu_to_le16(bit))
534 if (FM10K_TEST_RXD_BIT(rx_desc, FM10K_RXD_ERR_SWITCH_ERROR))
535 rx_ring->rx_stats.switch_errors++;
536 if (FM10K_TEST_RXD_BIT(rx_desc, FM10K_RXD_ERR_NO_DESCRIPTOR))
537 rx_ring->rx_stats.drops++;
538 if (FM10K_TEST_RXD_BIT(rx_desc, FM10K_RXD_ERR_PP_ERROR))
539 rx_ring->rx_stats.pp_errors++;
540 if (FM10K_TEST_RXD_BIT(rx_desc, FM10K_RXD_ERR_SWITCH_READY))
541 rx_ring->rx_stats.link_errors++;
542 if (FM10K_TEST_RXD_BIT(rx_desc, FM10K_RXD_ERR_TOO_BIG))
543 rx_ring->rx_stats.length_errors++;
544 dev_kfree_skb_any(skb);
545 rx_ring->rx_stats.errors++;
549 /* if eth_skb_pad returns an error the skb was freed */
550 if (eth_skb_pad(skb))
557 * fm10k_receive_skb - helper function to handle rx indications
558 * @q_vector: structure containing interrupt and ring information
559 * @skb: packet to send up
561 static void fm10k_receive_skb(struct fm10k_q_vector *q_vector,
564 napi_gro_receive(&q_vector->napi, skb);
567 static int fm10k_clean_rx_irq(struct fm10k_q_vector *q_vector,
568 struct fm10k_ring *rx_ring,
571 struct sk_buff *skb = rx_ring->skb;
572 unsigned int total_bytes = 0, total_packets = 0;
573 u16 cleaned_count = fm10k_desc_unused(rx_ring);
575 while (likely(total_packets < budget)) {
576 union fm10k_rx_desc *rx_desc;
578 /* return some buffers to hardware, one at a time is too slow */
579 if (cleaned_count >= FM10K_RX_BUFFER_WRITE) {
580 fm10k_alloc_rx_buffers(rx_ring, cleaned_count);
584 rx_desc = FM10K_RX_DESC(rx_ring, rx_ring->next_to_clean);
586 if (!rx_desc->d.staterr)
589 /* This memory barrier is needed to keep us from reading
590 * any other fields out of the rx_desc until we know the
591 * descriptor has been written back
595 /* retrieve a buffer from the ring */
596 skb = fm10k_fetch_rx_buffer(rx_ring, rx_desc, skb);
598 /* exit if we failed to retrieve a buffer */
604 /* fetch next buffer in frame if non-eop */
605 if (fm10k_is_non_eop(rx_ring, rx_desc))
608 /* verify the packet layout is correct */
609 if (fm10k_cleanup_headers(rx_ring, rx_desc, skb)) {
614 /* populate checksum, timestamp, VLAN, and protocol */
615 total_bytes += fm10k_process_skb_fields(rx_ring, rx_desc, skb);
617 fm10k_receive_skb(q_vector, skb);
619 /* reset skb pointer */
622 /* update budget accounting */
626 /* place incomplete frames back on ring for completion */
629 u64_stats_update_begin(&rx_ring->syncp);
630 rx_ring->stats.packets += total_packets;
631 rx_ring->stats.bytes += total_bytes;
632 u64_stats_update_end(&rx_ring->syncp);
633 q_vector->rx.total_packets += total_packets;
634 q_vector->rx.total_bytes += total_bytes;
636 return total_packets;
639 #define VXLAN_HLEN (sizeof(struct udphdr) + 8)
640 static struct ethhdr *fm10k_port_is_vxlan(struct sk_buff *skb)
642 struct fm10k_intfc *interface = netdev_priv(skb->dev);
644 if (interface->vxlan_port != udp_hdr(skb)->dest)
647 /* return offset of udp_hdr plus 8 bytes for VXLAN header */
648 return (struct ethhdr *)(skb_transport_header(skb) + VXLAN_HLEN);
651 #define FM10K_NVGRE_RESERVED0_FLAGS htons(0x9FFF)
652 #define NVGRE_TNI htons(0x2000)
653 struct fm10k_nvgre_hdr {
659 static struct ethhdr *fm10k_gre_is_nvgre(struct sk_buff *skb)
661 struct fm10k_nvgre_hdr *nvgre_hdr;
662 int hlen = ip_hdrlen(skb);
664 /* currently only IPv4 is supported due to hlen above */
665 if (vlan_get_protocol(skb) != htons(ETH_P_IP))
668 /* our transport header should be NVGRE */
669 nvgre_hdr = (struct fm10k_nvgre_hdr *)(skb_network_header(skb) + hlen);
671 /* verify all reserved flags are 0 */
672 if (nvgre_hdr->flags & FM10K_NVGRE_RESERVED0_FLAGS)
675 /* report start of ethernet header */
676 if (nvgre_hdr->flags & NVGRE_TNI)
677 return (struct ethhdr *)(nvgre_hdr + 1);
679 return (struct ethhdr *)(&nvgre_hdr->tni);
682 __be16 fm10k_tx_encap_offload(struct sk_buff *skb)
684 u8 l4_hdr = 0, inner_l4_hdr = 0, inner_l4_hlen;
685 struct ethhdr *eth_hdr;
687 if (skb->inner_protocol_type != ENCAP_TYPE_ETHER ||
688 skb->inner_protocol != htons(ETH_P_TEB))
691 switch (vlan_get_protocol(skb)) {
692 case htons(ETH_P_IP):
693 l4_hdr = ip_hdr(skb)->protocol;
695 case htons(ETH_P_IPV6):
696 l4_hdr = ipv6_hdr(skb)->nexthdr;
704 eth_hdr = fm10k_port_is_vxlan(skb);
707 eth_hdr = fm10k_gre_is_nvgre(skb);
716 switch (eth_hdr->h_proto) {
717 case htons(ETH_P_IP):
718 inner_l4_hdr = inner_ip_hdr(skb)->protocol;
720 case htons(ETH_P_IPV6):
721 inner_l4_hdr = inner_ipv6_hdr(skb)->nexthdr;
727 switch (inner_l4_hdr) {
729 inner_l4_hlen = inner_tcp_hdrlen(skb);
738 /* The hardware allows tunnel offloads only if the combined inner and
739 * outer header is 184 bytes or less
741 if (skb_inner_transport_header(skb) + inner_l4_hlen -
742 skb_mac_header(skb) > FM10K_TUNNEL_HEADER_LENGTH)
745 return eth_hdr->h_proto;
748 static int fm10k_tso(struct fm10k_ring *tx_ring,
749 struct fm10k_tx_buffer *first)
751 struct sk_buff *skb = first->skb;
752 struct fm10k_tx_desc *tx_desc;
756 if (skb->ip_summed != CHECKSUM_PARTIAL)
759 if (!skb_is_gso(skb))
762 /* compute header lengths */
763 if (skb->encapsulation) {
764 if (!fm10k_tx_encap_offload(skb))
766 th = skb_inner_transport_header(skb);
768 th = skb_transport_header(skb);
771 /* compute offset from SOF to transport header and add header len */
772 hdrlen = (th - skb->data) + (((struct tcphdr *)th)->doff << 2);
774 first->tx_flags |= FM10K_TX_FLAGS_CSUM;
776 /* update gso size and bytecount with header size */
777 first->gso_segs = skb_shinfo(skb)->gso_segs;
778 first->bytecount += (first->gso_segs - 1) * hdrlen;
780 /* populate Tx descriptor header size and mss */
781 tx_desc = FM10K_TX_DESC(tx_ring, tx_ring->next_to_use);
782 tx_desc->hdrlen = hdrlen;
783 tx_desc->mss = cpu_to_le16(skb_shinfo(skb)->gso_size);
788 tx_ring->netdev->features &= ~NETIF_F_GSO_UDP_TUNNEL;
790 netdev_err(tx_ring->netdev,
791 "TSO requested for unsupported tunnel, disabling offload\n");
795 static void fm10k_tx_csum(struct fm10k_ring *tx_ring,
796 struct fm10k_tx_buffer *first)
798 struct sk_buff *skb = first->skb;
799 struct fm10k_tx_desc *tx_desc;
802 struct ipv6hdr *ipv6;
810 if (skb->ip_summed != CHECKSUM_PARTIAL)
813 if (skb->encapsulation) {
814 protocol = fm10k_tx_encap_offload(skb);
816 if (skb_checksum_help(skb)) {
817 dev_warn(tx_ring->dev,
818 "failed to offload encap csum!\n");
819 tx_ring->tx_stats.csum_err++;
823 network_hdr.raw = skb_inner_network_header(skb);
824 transport_hdr = skb_inner_transport_header(skb);
826 protocol = vlan_get_protocol(skb);
827 network_hdr.raw = skb_network_header(skb);
828 transport_hdr = skb_transport_header(skb);
832 case htons(ETH_P_IP):
833 l4_hdr = network_hdr.ipv4->protocol;
835 case htons(ETH_P_IPV6):
836 l4_hdr = network_hdr.ipv6->nexthdr;
837 if (likely((transport_hdr - network_hdr.raw) ==
838 sizeof(struct ipv6hdr)))
840 ipv6_skip_exthdr(skb, network_hdr.raw - skb->data +
841 sizeof(struct ipv6hdr),
843 if (unlikely(frag_off))
844 l4_hdr = NEXTHDR_FRAGMENT;
855 if (skb->encapsulation)
859 if (unlikely(net_ratelimit())) {
860 dev_warn(tx_ring->dev,
861 "partial checksum, version=%d l4 proto=%x\n",
864 skb_checksum_help(skb);
865 tx_ring->tx_stats.csum_err++;
869 /* update TX checksum flag */
870 first->tx_flags |= FM10K_TX_FLAGS_CSUM;
871 tx_ring->tx_stats.csum_good++;
874 /* populate Tx descriptor header size and mss */
875 tx_desc = FM10K_TX_DESC(tx_ring, tx_ring->next_to_use);
880 #define FM10K_SET_FLAG(_input, _flag, _result) \
881 ((_flag <= _result) ? \
882 ((u32)(_input & _flag) * (_result / _flag)) : \
883 ((u32)(_input & _flag) / (_flag / _result)))
885 static u8 fm10k_tx_desc_flags(struct sk_buff *skb, u32 tx_flags)
887 /* set type for advanced descriptor with frame checksum insertion */
890 /* set checksum offload bits */
891 desc_flags |= FM10K_SET_FLAG(tx_flags, FM10K_TX_FLAGS_CSUM,
892 FM10K_TXD_FLAG_CSUM);
897 static bool fm10k_tx_desc_push(struct fm10k_ring *tx_ring,
898 struct fm10k_tx_desc *tx_desc, u16 i,
899 dma_addr_t dma, unsigned int size, u8 desc_flags)
901 /* set RS and INT for last frame in a cache line */
902 if ((++i & (FM10K_TXD_WB_FIFO_SIZE - 1)) == 0)
903 desc_flags |= FM10K_TXD_FLAG_RS | FM10K_TXD_FLAG_INT;
905 /* record values to descriptor */
906 tx_desc->buffer_addr = cpu_to_le64(dma);
907 tx_desc->flags = desc_flags;
908 tx_desc->buflen = cpu_to_le16(size);
910 /* return true if we just wrapped the ring */
911 return i == tx_ring->count;
914 static int __fm10k_maybe_stop_tx(struct fm10k_ring *tx_ring, u16 size)
916 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
918 /* Memory barrier before checking head and tail */
921 /* Check again in a case another CPU has just made room available */
922 if (likely(fm10k_desc_unused(tx_ring) < size))
925 /* A reprieve! - use start_queue because it doesn't call schedule */
926 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
927 ++tx_ring->tx_stats.restart_queue;
931 static inline int fm10k_maybe_stop_tx(struct fm10k_ring *tx_ring, u16 size)
933 if (likely(fm10k_desc_unused(tx_ring) >= size))
935 return __fm10k_maybe_stop_tx(tx_ring, size);
938 static void fm10k_tx_map(struct fm10k_ring *tx_ring,
939 struct fm10k_tx_buffer *first)
941 struct sk_buff *skb = first->skb;
942 struct fm10k_tx_buffer *tx_buffer;
943 struct fm10k_tx_desc *tx_desc;
947 unsigned int data_len, size;
948 u32 tx_flags = first->tx_flags;
949 u16 i = tx_ring->next_to_use;
950 u8 flags = fm10k_tx_desc_flags(skb, tx_flags);
952 tx_desc = FM10K_TX_DESC(tx_ring, i);
954 /* add HW VLAN tag */
955 if (skb_vlan_tag_present(skb))
956 tx_desc->vlan = cpu_to_le16(skb_vlan_tag_get(skb));
960 size = skb_headlen(skb);
963 dma = dma_map_single(tx_ring->dev, data, size, DMA_TO_DEVICE);
965 data_len = skb->data_len;
968 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
969 if (dma_mapping_error(tx_ring->dev, dma))
972 /* record length, and DMA address */
973 dma_unmap_len_set(tx_buffer, len, size);
974 dma_unmap_addr_set(tx_buffer, dma, dma);
976 while (unlikely(size > FM10K_MAX_DATA_PER_TXD)) {
977 if (fm10k_tx_desc_push(tx_ring, tx_desc++, i++, dma,
978 FM10K_MAX_DATA_PER_TXD, flags)) {
979 tx_desc = FM10K_TX_DESC(tx_ring, 0);
983 dma += FM10K_MAX_DATA_PER_TXD;
984 size -= FM10K_MAX_DATA_PER_TXD;
987 if (likely(!data_len))
990 if (fm10k_tx_desc_push(tx_ring, tx_desc++, i++,
992 tx_desc = FM10K_TX_DESC(tx_ring, 0);
996 size = skb_frag_size(frag);
999 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1002 tx_buffer = &tx_ring->tx_buffer[i];
1005 /* write last descriptor with LAST bit set */
1006 flags |= FM10K_TXD_FLAG_LAST;
1008 if (fm10k_tx_desc_push(tx_ring, tx_desc, i++, dma, size, flags))
1011 /* record bytecount for BQL */
1012 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
1014 /* record SW timestamp if HW timestamp is not available */
1015 skb_tx_timestamp(first->skb);
1017 /* Force memory writes to complete before letting h/w know there
1018 * are new descriptors to fetch. (Only applicable for weak-ordered
1019 * memory model archs, such as IA-64).
1021 * We also need this memory barrier to make certain all of the
1022 * status bits have been updated before next_to_watch is written.
1026 /* set next_to_watch value indicating a packet is present */
1027 first->next_to_watch = tx_desc;
1029 tx_ring->next_to_use = i;
1031 /* Make sure there is space in the ring for the next send. */
1032 fm10k_maybe_stop_tx(tx_ring, DESC_NEEDED);
1034 /* notify HW of packet */
1035 if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
1036 writel(i, tx_ring->tail);
1041 dev_err(tx_ring->dev, "TX DMA map failed\n");
1043 /* clear dma mappings for failed tx_buffer map */
1045 tx_buffer = &tx_ring->tx_buffer[i];
1046 fm10k_unmap_and_free_tx_resource(tx_ring, tx_buffer);
1047 if (tx_buffer == first)
1054 tx_ring->next_to_use = i;
1057 netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
1058 struct fm10k_ring *tx_ring)
1060 u16 count = TXD_USE_COUNT(skb_headlen(skb));
1061 struct fm10k_tx_buffer *first;
1066 /* need: 1 descriptor per page * PAGE_SIZE/FM10K_MAX_DATA_PER_TXD,
1067 * + 1 desc for skb_headlen/FM10K_MAX_DATA_PER_TXD,
1068 * + 2 desc gap to keep tail from touching head
1069 * otherwise try next time
1071 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
1072 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
1074 count += TXD_USE_COUNT(skb_frag_size(frag));
1077 if (fm10k_maybe_stop_tx(tx_ring, count + 3)) {
1078 tx_ring->tx_stats.tx_busy++;
1079 return NETDEV_TX_BUSY;
1082 /* record the location of the first descriptor for this packet */
1083 first = &tx_ring->tx_buffer[tx_ring->next_to_use];
1085 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
1086 first->gso_segs = 1;
1088 /* record initial flags and protocol */
1089 first->tx_flags = tx_flags;
1091 tso = fm10k_tso(tx_ring, first);
1095 fm10k_tx_csum(tx_ring, first);
1097 fm10k_tx_map(tx_ring, first);
1099 return NETDEV_TX_OK;
1102 dev_kfree_skb_any(first->skb);
1105 return NETDEV_TX_OK;
1108 static u64 fm10k_get_tx_completed(struct fm10k_ring *ring)
1110 return ring->stats.packets;
1114 * fm10k_get_tx_pending - how many Tx descriptors not processed
1115 * @ring: the ring structure
1116 * @in_sw: is tx_pending being checked in SW or in HW?
1118 u64 fm10k_get_tx_pending(struct fm10k_ring *ring, bool in_sw)
1120 struct fm10k_intfc *interface = ring->q_vector->interface;
1121 struct fm10k_hw *hw = &interface->hw;
1124 if (likely(in_sw)) {
1125 head = ring->next_to_clean;
1126 tail = ring->next_to_use;
1128 head = fm10k_read_reg(hw, FM10K_TDH(ring->reg_idx));
1129 tail = fm10k_read_reg(hw, FM10K_TDT(ring->reg_idx));
1132 return ((head <= tail) ? tail : tail + ring->count) - head;
1135 bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring)
1137 u32 tx_done = fm10k_get_tx_completed(tx_ring);
1138 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1139 u32 tx_pending = fm10k_get_tx_pending(tx_ring, true);
1141 clear_check_for_tx_hang(tx_ring);
1143 /* Check for a hung queue, but be thorough. This verifies
1144 * that a transmit has been completed since the previous
1145 * check AND there is at least one packet pending. By
1146 * requiring this to fail twice we avoid races with
1147 * clearing the ARMED bit and conditions where we
1148 * run the check_tx_hang logic with a transmit completion
1149 * pending but without time to complete it yet.
1151 if (!tx_pending || (tx_done_old != tx_done)) {
1152 /* update completed stats and continue */
1153 tx_ring->tx_stats.tx_done_old = tx_done;
1154 /* reset the countdown */
1155 clear_bit(__FM10K_HANG_CHECK_ARMED, tx_ring->state);
1160 /* make sure it is true for two checks in a row */
1161 return test_and_set_bit(__FM10K_HANG_CHECK_ARMED, tx_ring->state);
1165 * fm10k_tx_timeout_reset - initiate reset due to Tx timeout
1166 * @interface: driver private struct
1168 void fm10k_tx_timeout_reset(struct fm10k_intfc *interface)
1170 /* Do the reset outside of interrupt context */
1171 if (!test_bit(__FM10K_DOWN, interface->state)) {
1172 interface->tx_timeout_count++;
1173 set_bit(FM10K_FLAG_RESET_REQUESTED, interface->flags);
1174 fm10k_service_event_schedule(interface);
1179 * fm10k_clean_tx_irq - Reclaim resources after transmit completes
1180 * @q_vector: structure containing interrupt and ring information
1181 * @tx_ring: tx ring to clean
1182 * @napi_budget: Used to determine if we are in netpoll
1184 static bool fm10k_clean_tx_irq(struct fm10k_q_vector *q_vector,
1185 struct fm10k_ring *tx_ring, int napi_budget)
1187 struct fm10k_intfc *interface = q_vector->interface;
1188 struct fm10k_tx_buffer *tx_buffer;
1189 struct fm10k_tx_desc *tx_desc;
1190 unsigned int total_bytes = 0, total_packets = 0;
1191 unsigned int budget = q_vector->tx.work_limit;
1192 unsigned int i = tx_ring->next_to_clean;
1194 if (test_bit(__FM10K_DOWN, interface->state))
1197 tx_buffer = &tx_ring->tx_buffer[i];
1198 tx_desc = FM10K_TX_DESC(tx_ring, i);
1199 i -= tx_ring->count;
1202 struct fm10k_tx_desc *eop_desc = tx_buffer->next_to_watch;
1204 /* if next_to_watch is not set then there is no work pending */
1208 /* prevent any other reads prior to eop_desc */
1211 /* if DD is not set pending work has not been completed */
1212 if (!(eop_desc->flags & FM10K_TXD_FLAG_DONE))
1215 /* clear next_to_watch to prevent false hangs */
1216 tx_buffer->next_to_watch = NULL;
1218 /* update the statistics for this packet */
1219 total_bytes += tx_buffer->bytecount;
1220 total_packets += tx_buffer->gso_segs;
1223 napi_consume_skb(tx_buffer->skb, napi_budget);
1225 /* unmap skb header data */
1226 dma_unmap_single(tx_ring->dev,
1227 dma_unmap_addr(tx_buffer, dma),
1228 dma_unmap_len(tx_buffer, len),
1231 /* clear tx_buffer data */
1232 tx_buffer->skb = NULL;
1233 dma_unmap_len_set(tx_buffer, len, 0);
1235 /* unmap remaining buffers */
1236 while (tx_desc != eop_desc) {
1241 i -= tx_ring->count;
1242 tx_buffer = tx_ring->tx_buffer;
1243 tx_desc = FM10K_TX_DESC(tx_ring, 0);
1246 /* unmap any remaining paged data */
1247 if (dma_unmap_len(tx_buffer, len)) {
1248 dma_unmap_page(tx_ring->dev,
1249 dma_unmap_addr(tx_buffer, dma),
1250 dma_unmap_len(tx_buffer, len),
1252 dma_unmap_len_set(tx_buffer, len, 0);
1256 /* move us one more past the eop_desc for start of next pkt */
1261 i -= tx_ring->count;
1262 tx_buffer = tx_ring->tx_buffer;
1263 tx_desc = FM10K_TX_DESC(tx_ring, 0);
1266 /* issue prefetch for next Tx descriptor */
1269 /* update budget accounting */
1271 } while (likely(budget));
1273 i += tx_ring->count;
1274 tx_ring->next_to_clean = i;
1275 u64_stats_update_begin(&tx_ring->syncp);
1276 tx_ring->stats.bytes += total_bytes;
1277 tx_ring->stats.packets += total_packets;
1278 u64_stats_update_end(&tx_ring->syncp);
1279 q_vector->tx.total_bytes += total_bytes;
1280 q_vector->tx.total_packets += total_packets;
1282 if (check_for_tx_hang(tx_ring) && fm10k_check_tx_hang(tx_ring)) {
1283 /* schedule immediate reset if we believe we hung */
1284 struct fm10k_hw *hw = &interface->hw;
1286 netif_err(interface, drv, tx_ring->netdev,
1287 "Detected Tx Unit Hang\n"
1289 " TDH, TDT <%x>, <%x>\n"
1290 " next_to_use <%x>\n"
1291 " next_to_clean <%x>\n",
1292 tx_ring->queue_index,
1293 fm10k_read_reg(hw, FM10K_TDH(tx_ring->reg_idx)),
1294 fm10k_read_reg(hw, FM10K_TDT(tx_ring->reg_idx)),
1295 tx_ring->next_to_use, i);
1297 netif_stop_subqueue(tx_ring->netdev,
1298 tx_ring->queue_index);
1300 netif_info(interface, probe, tx_ring->netdev,
1301 "tx hang %d detected on queue %d, resetting interface\n",
1302 interface->tx_timeout_count + 1,
1303 tx_ring->queue_index);
1305 fm10k_tx_timeout_reset(interface);
1307 /* the netdev is about to reset, no point in enabling stuff */
1311 /* notify netdev of completed buffers */
1312 netdev_tx_completed_queue(txring_txq(tx_ring),
1313 total_packets, total_bytes);
1315 #define TX_WAKE_THRESHOLD min_t(u16, FM10K_MIN_TXD - 1, DESC_NEEDED * 2)
1316 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1317 (fm10k_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1318 /* Make sure that anybody stopping the queue after this
1319 * sees the new next_to_clean.
1322 if (__netif_subqueue_stopped(tx_ring->netdev,
1323 tx_ring->queue_index) &&
1324 !test_bit(__FM10K_DOWN, interface->state)) {
1325 netif_wake_subqueue(tx_ring->netdev,
1326 tx_ring->queue_index);
1327 ++tx_ring->tx_stats.restart_queue;
1335 * fm10k_update_itr - update the dynamic ITR value based on packet size
1337 * Stores a new ITR value based on strictly on packet size. The
1338 * divisors and thresholds used by this function were determined based
1339 * on theoretical maximum wire speed and testing data, in order to
1340 * minimize response time while increasing bulk throughput.
1342 * @ring_container: Container for rings to have ITR updated
1344 static void fm10k_update_itr(struct fm10k_ring_container *ring_container)
1346 unsigned int avg_wire_size, packets, itr_round;
1348 /* Only update ITR if we are using adaptive setting */
1349 if (!ITR_IS_ADAPTIVE(ring_container->itr))
1352 packets = ring_container->total_packets;
1356 avg_wire_size = ring_container->total_bytes / packets;
1358 /* The following is a crude approximation of:
1359 * wmem_default / (size + overhead) = desired_pkts_per_int
1360 * rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
1361 * (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
1363 * Assuming wmem_default is 212992 and overhead is 640 bytes per
1364 * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
1367 * (34 * (size + 24)) / (size + 640) = ITR
1369 * We first do some math on the packet size and then finally bitshift
1370 * by 8 after rounding up. We also have to account for PCIe link speed
1371 * difference as ITR scales based on this.
1373 if (avg_wire_size <= 360) {
1374 /* Start at 250K ints/sec and gradually drop to 77K ints/sec */
1376 avg_wire_size += 376;
1377 } else if (avg_wire_size <= 1152) {
1378 /* 77K ints/sec to 45K ints/sec */
1380 avg_wire_size += 2176;
1381 } else if (avg_wire_size <= 1920) {
1382 /* 45K ints/sec to 38K ints/sec */
1383 avg_wire_size += 4480;
1385 /* plateau at a limit of 38K ints/sec */
1386 avg_wire_size = 6656;
1389 /* Perform final bitshift for division after rounding up to ensure
1390 * that the calculation will never get below a 1. The bit shift
1391 * accounts for changes in the ITR due to PCIe link speed.
1393 itr_round = READ_ONCE(ring_container->itr_scale) + 8;
1394 avg_wire_size += BIT(itr_round) - 1;
1395 avg_wire_size >>= itr_round;
1397 /* write back value and retain adaptive flag */
1398 ring_container->itr = avg_wire_size | FM10K_ITR_ADAPTIVE;
1401 ring_container->total_bytes = 0;
1402 ring_container->total_packets = 0;
1405 static void fm10k_qv_enable(struct fm10k_q_vector *q_vector)
1407 /* Enable auto-mask and clear the current mask */
1408 u32 itr = FM10K_ITR_ENABLE;
1411 fm10k_update_itr(&q_vector->tx);
1414 fm10k_update_itr(&q_vector->rx);
1416 /* Store Tx itr in timer slot 0 */
1417 itr |= (q_vector->tx.itr & FM10K_ITR_MAX);
1419 /* Shift Rx itr to timer slot 1 */
1420 itr |= (q_vector->rx.itr & FM10K_ITR_MAX) << FM10K_ITR_INTERVAL1_SHIFT;
1422 /* Write the final value to the ITR register */
1423 writel(itr, q_vector->itr);
1426 static int fm10k_poll(struct napi_struct *napi, int budget)
1428 struct fm10k_q_vector *q_vector =
1429 container_of(napi, struct fm10k_q_vector, napi);
1430 struct fm10k_ring *ring;
1431 int per_ring_budget, work_done = 0;
1432 bool clean_complete = true;
1434 fm10k_for_each_ring(ring, q_vector->tx) {
1435 if (!fm10k_clean_tx_irq(q_vector, ring, budget))
1436 clean_complete = false;
1439 /* Handle case where we are called by netpoll with a budget of 0 */
1443 /* attempt to distribute budget to each queue fairly, but don't
1444 * allow the budget to go below 1 because we'll exit polling
1446 if (q_vector->rx.count > 1)
1447 per_ring_budget = max(budget / q_vector->rx.count, 1);
1449 per_ring_budget = budget;
1451 fm10k_for_each_ring(ring, q_vector->rx) {
1452 int work = fm10k_clean_rx_irq(q_vector, ring, per_ring_budget);
1455 if (work >= per_ring_budget)
1456 clean_complete = false;
1459 /* If all work not completed, return budget and keep polling */
1460 if (!clean_complete)
1463 /* Exit the polling mode, but don't re-enable interrupts if stack might
1464 * poll us due to busy-polling
1466 if (likely(napi_complete_done(napi, work_done)))
1467 fm10k_qv_enable(q_vector);
1469 return min(work_done, budget - 1);
1473 * fm10k_set_qos_queues: Allocate queues for a QOS-enabled device
1474 * @interface: board private structure to initialize
1476 * When QoS (Quality of Service) is enabled, allocate queues for
1477 * each traffic class. If multiqueue isn't available,then abort QoS
1480 * This function handles all combinations of Qos and RSS.
1483 static bool fm10k_set_qos_queues(struct fm10k_intfc *interface)
1485 struct net_device *dev = interface->netdev;
1486 struct fm10k_ring_feature *f;
1490 /* Map queue offset and counts onto allocated tx queues */
1491 pcs = netdev_get_num_tc(dev);
1496 /* set QoS mask and indices */
1497 f = &interface->ring_feature[RING_F_QOS];
1499 f->mask = BIT(fls(pcs - 1)) - 1;
1501 /* determine the upper limit for our current DCB mode */
1502 rss_i = interface->hw.mac.max_queues / pcs;
1503 rss_i = BIT(fls(rss_i) - 1);
1505 /* set RSS mask and indices */
1506 f = &interface->ring_feature[RING_F_RSS];
1507 rss_i = min_t(u16, rss_i, f->limit);
1509 f->mask = BIT(fls(rss_i - 1)) - 1;
1511 /* configure pause class to queue mapping */
1512 for (i = 0; i < pcs; i++)
1513 netdev_set_tc_queue(dev, i, rss_i, rss_i * i);
1515 interface->num_rx_queues = rss_i * pcs;
1516 interface->num_tx_queues = rss_i * pcs;
1522 * fm10k_set_rss_queues: Allocate queues for RSS
1523 * @interface: board private structure to initialize
1525 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
1526 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
1529 static bool fm10k_set_rss_queues(struct fm10k_intfc *interface)
1531 struct fm10k_ring_feature *f;
1534 f = &interface->ring_feature[RING_F_RSS];
1535 rss_i = min_t(u16, interface->hw.mac.max_queues, f->limit);
1537 /* record indices and power of 2 mask for RSS */
1539 f->mask = BIT(fls(rss_i - 1)) - 1;
1541 interface->num_rx_queues = rss_i;
1542 interface->num_tx_queues = rss_i;
1548 * fm10k_set_num_queues: Allocate queues for device, feature dependent
1549 * @interface: board private structure to initialize
1551 * This is the top level queue allocation routine. The order here is very
1552 * important, starting with the "most" number of features turned on at once,
1553 * and ending with the smallest set of features. This way large combinations
1554 * can be allocated if they're turned on, and smaller combinations are the
1555 * fall through conditions.
1558 static void fm10k_set_num_queues(struct fm10k_intfc *interface)
1560 /* Attempt to setup QoS and RSS first */
1561 if (fm10k_set_qos_queues(interface))
1564 /* If we don't have QoS, just fallback to only RSS. */
1565 fm10k_set_rss_queues(interface);
1569 * fm10k_reset_num_queues - Reset the number of queues to zero
1570 * @interface: board private structure
1572 * This function should be called whenever we need to reset the number of
1573 * queues after an error condition.
1575 static void fm10k_reset_num_queues(struct fm10k_intfc *interface)
1577 interface->num_tx_queues = 0;
1578 interface->num_rx_queues = 0;
1579 interface->num_q_vectors = 0;
1583 * fm10k_alloc_q_vector - Allocate memory for a single interrupt vector
1584 * @interface: board private structure to initialize
1585 * @v_count: q_vectors allocated on interface, used for ring interleaving
1586 * @v_idx: index of vector in interface struct
1587 * @txr_count: total number of Tx rings to allocate
1588 * @txr_idx: index of first Tx ring to allocate
1589 * @rxr_count: total number of Rx rings to allocate
1590 * @rxr_idx: index of first Rx ring to allocate
1592 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1594 static int fm10k_alloc_q_vector(struct fm10k_intfc *interface,
1595 unsigned int v_count, unsigned int v_idx,
1596 unsigned int txr_count, unsigned int txr_idx,
1597 unsigned int rxr_count, unsigned int rxr_idx)
1599 struct fm10k_q_vector *q_vector;
1600 struct fm10k_ring *ring;
1603 ring_count = txr_count + rxr_count;
1605 /* allocate q_vector and rings */
1606 q_vector = kzalloc(struct_size(q_vector, ring, ring_count), GFP_KERNEL);
1610 /* initialize NAPI */
1611 netif_napi_add(interface->netdev, &q_vector->napi,
1612 fm10k_poll, NAPI_POLL_WEIGHT);
1614 /* tie q_vector and interface together */
1615 interface->q_vector[v_idx] = q_vector;
1616 q_vector->interface = interface;
1617 q_vector->v_idx = v_idx;
1619 /* initialize pointer to rings */
1620 ring = q_vector->ring;
1622 /* save Tx ring container info */
1623 q_vector->tx.ring = ring;
1624 q_vector->tx.work_limit = FM10K_DEFAULT_TX_WORK;
1625 q_vector->tx.itr = interface->tx_itr;
1626 q_vector->tx.itr_scale = interface->hw.mac.itr_scale;
1627 q_vector->tx.count = txr_count;
1630 /* assign generic ring traits */
1631 ring->dev = &interface->pdev->dev;
1632 ring->netdev = interface->netdev;
1634 /* configure backlink on ring */
1635 ring->q_vector = q_vector;
1637 /* apply Tx specific ring traits */
1638 ring->count = interface->tx_ring_count;
1639 ring->queue_index = txr_idx;
1641 /* assign ring to interface */
1642 interface->tx_ring[txr_idx] = ring;
1644 /* update count and index */
1648 /* push pointer to next ring */
1652 /* save Rx ring container info */
1653 q_vector->rx.ring = ring;
1654 q_vector->rx.itr = interface->rx_itr;
1655 q_vector->rx.itr_scale = interface->hw.mac.itr_scale;
1656 q_vector->rx.count = rxr_count;
1659 /* assign generic ring traits */
1660 ring->dev = &interface->pdev->dev;
1661 ring->netdev = interface->netdev;
1662 rcu_assign_pointer(ring->l2_accel, interface->l2_accel);
1664 /* configure backlink on ring */
1665 ring->q_vector = q_vector;
1667 /* apply Rx specific ring traits */
1668 ring->count = interface->rx_ring_count;
1669 ring->queue_index = rxr_idx;
1671 /* assign ring to interface */
1672 interface->rx_ring[rxr_idx] = ring;
1674 /* update count and index */
1678 /* push pointer to next ring */
1682 fm10k_dbg_q_vector_init(q_vector);
1688 * fm10k_free_q_vector - Free memory allocated for specific interrupt vector
1689 * @interface: board private structure to initialize
1690 * @v_idx: Index of vector to be freed
1692 * This function frees the memory allocated to the q_vector. In addition if
1693 * NAPI is enabled it will delete any references to the NAPI struct prior
1694 * to freeing the q_vector.
1696 static void fm10k_free_q_vector(struct fm10k_intfc *interface, int v_idx)
1698 struct fm10k_q_vector *q_vector = interface->q_vector[v_idx];
1699 struct fm10k_ring *ring;
1701 fm10k_dbg_q_vector_exit(q_vector);
1703 fm10k_for_each_ring(ring, q_vector->tx)
1704 interface->tx_ring[ring->queue_index] = NULL;
1706 fm10k_for_each_ring(ring, q_vector->rx)
1707 interface->rx_ring[ring->queue_index] = NULL;
1709 interface->q_vector[v_idx] = NULL;
1710 netif_napi_del(&q_vector->napi);
1711 kfree_rcu(q_vector, rcu);
1715 * fm10k_alloc_q_vectors - Allocate memory for interrupt vectors
1716 * @interface: board private structure to initialize
1718 * We allocate one q_vector per queue interrupt. If allocation fails we
1721 static int fm10k_alloc_q_vectors(struct fm10k_intfc *interface)
1723 unsigned int q_vectors = interface->num_q_vectors;
1724 unsigned int rxr_remaining = interface->num_rx_queues;
1725 unsigned int txr_remaining = interface->num_tx_queues;
1726 unsigned int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1729 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1730 for (; rxr_remaining; v_idx++) {
1731 err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
1736 /* update counts and index */
1742 for (; v_idx < q_vectors; v_idx++) {
1743 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1744 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1746 err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
1753 /* update counts and index */
1754 rxr_remaining -= rqpv;
1755 txr_remaining -= tqpv;
1763 fm10k_reset_num_queues(interface);
1766 fm10k_free_q_vector(interface, v_idx);
1772 * fm10k_free_q_vectors - Free memory allocated for interrupt vectors
1773 * @interface: board private structure to initialize
1775 * This function frees the memory allocated to the q_vectors. In addition if
1776 * NAPI is enabled it will delete any references to the NAPI struct prior
1777 * to freeing the q_vector.
1779 static void fm10k_free_q_vectors(struct fm10k_intfc *interface)
1781 int v_idx = interface->num_q_vectors;
1783 fm10k_reset_num_queues(interface);
1786 fm10k_free_q_vector(interface, v_idx);
1790 * f10k_reset_msix_capability - reset MSI-X capability
1791 * @interface: board private structure to initialize
1793 * Reset the MSI-X capability back to its starting state
1795 static void fm10k_reset_msix_capability(struct fm10k_intfc *interface)
1797 pci_disable_msix(interface->pdev);
1798 kfree(interface->msix_entries);
1799 interface->msix_entries = NULL;
1803 * f10k_init_msix_capability - configure MSI-X capability
1804 * @interface: board private structure to initialize
1806 * Attempt to configure the interrupts using the best available
1807 * capabilities of the hardware and the kernel.
1809 static int fm10k_init_msix_capability(struct fm10k_intfc *interface)
1811 struct fm10k_hw *hw = &interface->hw;
1812 int v_budget, vector;
1814 /* It's easy to be greedy for MSI-X vectors, but it really
1815 * doesn't do us much good if we have a lot more vectors
1816 * than CPU's. So let's be conservative and only ask for
1817 * (roughly) the same number of vectors as there are CPU's.
1818 * the default is to use pairs of vectors
1820 v_budget = max(interface->num_rx_queues, interface->num_tx_queues);
1821 v_budget = min_t(u16, v_budget, num_online_cpus());
1823 /* account for vectors not related to queues */
1824 v_budget += NON_Q_VECTORS;
1826 /* At the same time, hardware can only support a maximum of
1827 * hw.mac->max_msix_vectors vectors. With features
1828 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
1829 * descriptor queues supported by our device. Thus, we cap it off in
1830 * those rare cases where the cpu count also exceeds our vector limit.
1832 v_budget = min_t(int, v_budget, hw->mac.max_msix_vectors);
1834 /* A failure in MSI-X entry allocation is fatal. */
1835 interface->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
1837 if (!interface->msix_entries)
1840 /* populate entry values */
1841 for (vector = 0; vector < v_budget; vector++)
1842 interface->msix_entries[vector].entry = vector;
1844 /* Attempt to enable MSI-X with requested value */
1845 v_budget = pci_enable_msix_range(interface->pdev,
1846 interface->msix_entries,
1850 kfree(interface->msix_entries);
1851 interface->msix_entries = NULL;
1855 /* record the number of queues available for q_vectors */
1856 interface->num_q_vectors = v_budget - NON_Q_VECTORS;
1862 * fm10k_cache_ring_qos - Descriptor ring to register mapping for QoS
1863 * @interface: Interface structure continaining rings and devices
1865 * Cache the descriptor ring offsets for Qos
1867 static bool fm10k_cache_ring_qos(struct fm10k_intfc *interface)
1869 struct net_device *dev = interface->netdev;
1870 int pc, offset, rss_i, i;
1871 u16 pc_stride = interface->ring_feature[RING_F_QOS].mask + 1;
1872 u8 num_pcs = netdev_get_num_tc(dev);
1877 rss_i = interface->ring_feature[RING_F_RSS].indices;
1879 for (pc = 0, offset = 0; pc < num_pcs; pc++, offset += rss_i) {
1882 for (i = 0; i < rss_i; i++) {
1883 interface->tx_ring[offset + i]->reg_idx = q_idx;
1884 interface->tx_ring[offset + i]->qos_pc = pc;
1885 interface->rx_ring[offset + i]->reg_idx = q_idx;
1886 interface->rx_ring[offset + i]->qos_pc = pc;
1895 * fm10k_cache_ring_rss - Descriptor ring to register mapping for RSS
1896 * @interface: Interface structure continaining rings and devices
1898 * Cache the descriptor ring offsets for RSS
1900 static void fm10k_cache_ring_rss(struct fm10k_intfc *interface)
1904 for (i = 0; i < interface->num_rx_queues; i++)
1905 interface->rx_ring[i]->reg_idx = i;
1907 for (i = 0; i < interface->num_tx_queues; i++)
1908 interface->tx_ring[i]->reg_idx = i;
1912 * fm10k_assign_rings - Map rings to network devices
1913 * @interface: Interface structure containing rings and devices
1915 * This function is meant to go though and configure both the network
1916 * devices so that they contain rings, and configure the rings so that
1917 * they function with their network devices.
1919 static void fm10k_assign_rings(struct fm10k_intfc *interface)
1921 if (fm10k_cache_ring_qos(interface))
1924 fm10k_cache_ring_rss(interface);
1927 static void fm10k_init_reta(struct fm10k_intfc *interface)
1929 u16 i, rss_i = interface->ring_feature[RING_F_RSS].indices;
1932 /* If the Rx flow indirection table has been configured manually, we
1933 * need to maintain it when possible.
1935 if (netif_is_rxfh_configured(interface->netdev)) {
1936 for (i = FM10K_RETA_SIZE; i--;) {
1937 reta = interface->reta[i];
1938 if ((((reta << 24) >> 24) < rss_i) &&
1939 (((reta << 16) >> 24) < rss_i) &&
1940 (((reta << 8) >> 24) < rss_i) &&
1941 (((reta) >> 24) < rss_i))
1944 /* this should never happen */
1945 dev_err(&interface->pdev->dev,
1946 "RSS indirection table assigned flows out of queue bounds. Reconfiguring.\n");
1947 goto repopulate_reta;
1950 /* do nothing if all of the elements are in bounds */
1955 fm10k_write_reta(interface, NULL);
1959 * fm10k_init_queueing_scheme - Determine proper queueing scheme
1960 * @interface: board private structure to initialize
1962 * We determine which queueing scheme to use based on...
1963 * - Hardware queue count (num_*_queues)
1964 * - defined by miscellaneous hardware support/features (RSS, etc.)
1966 int fm10k_init_queueing_scheme(struct fm10k_intfc *interface)
1970 /* Number of supported queues */
1971 fm10k_set_num_queues(interface);
1973 /* Configure MSI-X capability */
1974 err = fm10k_init_msix_capability(interface);
1976 dev_err(&interface->pdev->dev,
1977 "Unable to initialize MSI-X capability\n");
1981 /* Allocate memory for queues */
1982 err = fm10k_alloc_q_vectors(interface);
1984 dev_err(&interface->pdev->dev,
1985 "Unable to allocate queue vectors\n");
1986 goto err_alloc_q_vectors;
1989 /* Map rings to devices, and map devices to physical queues */
1990 fm10k_assign_rings(interface);
1992 /* Initialize RSS redirection table */
1993 fm10k_init_reta(interface);
1997 err_alloc_q_vectors:
1998 fm10k_reset_msix_capability(interface);
2000 fm10k_reset_num_queues(interface);
2005 * fm10k_clear_queueing_scheme - Clear the current queueing scheme settings
2006 * @interface: board private structure to clear queueing scheme on
2008 * We go through and clear queueing specific resources and reset the structure
2009 * to pre-load conditions
2011 void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface)
2013 fm10k_free_q_vectors(interface);
2014 fm10k_reset_msix_capability(interface);