GNU Linux-libre 4.9.330-gnu1
[releases.git] / drivers / net / ethernet / intel / e1000e / ptp.c
1 /* Intel PRO/1000 Linux driver
2  * Copyright(c) 1999 - 2015 Intel Corporation.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  *
13  * The full GNU General Public License is included in this distribution in
14  * the file called "COPYING".
15  *
16  * Contact Information:
17  * Linux NICS <linux.nics@intel.com>
18  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
19  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
20  */
21
22 /* PTP 1588 Hardware Clock (PHC)
23  * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
24  * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
25  */
26
27 #include "e1000.h"
28
29 #ifdef CONFIG_E1000E_HWTS
30 #include <linux/clocksource.h>
31 #include <linux/ktime.h>
32 #include <asm/tsc.h>
33 #endif
34
35 /**
36  * e1000e_phc_adjfreq - adjust the frequency of the hardware clock
37  * @ptp: ptp clock structure
38  * @delta: Desired frequency change in parts per billion
39  *
40  * Adjust the frequency of the PHC cycle counter by the indicated delta from
41  * the base frequency.
42  **/
43 static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
44 {
45         struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
46                                                      ptp_clock_info);
47         struct e1000_hw *hw = &adapter->hw;
48         bool neg_adj = false;
49         unsigned long flags;
50         u64 adjustment;
51         u32 timinca, incvalue;
52         s32 ret_val;
53
54         if ((delta > ptp->max_adj) || (delta <= -1000000000))
55                 return -EINVAL;
56
57         if (delta < 0) {
58                 neg_adj = true;
59                 delta = -delta;
60         }
61
62         /* Get the System Time Register SYSTIM base frequency */
63         ret_val = e1000e_get_base_timinca(adapter, &timinca);
64         if (ret_val)
65                 return ret_val;
66
67         spin_lock_irqsave(&adapter->systim_lock, flags);
68
69         incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK;
70
71         adjustment = incvalue;
72         adjustment *= delta;
73         adjustment = div_u64(adjustment, 1000000000);
74
75         incvalue = neg_adj ? (incvalue - adjustment) : (incvalue + adjustment);
76
77         timinca &= ~E1000_TIMINCA_INCVALUE_MASK;
78         timinca |= incvalue;
79
80         ew32(TIMINCA, timinca);
81
82         adapter->ptp_delta = delta;
83
84         spin_unlock_irqrestore(&adapter->systim_lock, flags);
85
86         return 0;
87 }
88
89 /**
90  * e1000e_phc_adjtime - Shift the time of the hardware clock
91  * @ptp: ptp clock structure
92  * @delta: Desired change in nanoseconds
93  *
94  * Adjust the timer by resetting the timecounter structure.
95  **/
96 static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
97 {
98         struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
99                                                      ptp_clock_info);
100         unsigned long flags;
101
102         spin_lock_irqsave(&adapter->systim_lock, flags);
103         timecounter_adjtime(&adapter->tc, delta);
104         spin_unlock_irqrestore(&adapter->systim_lock, flags);
105
106         return 0;
107 }
108
109 #ifdef CONFIG_E1000E_HWTS
110 #define MAX_HW_WAIT_COUNT (3)
111
112 /**
113  * e1000e_phc_get_syncdevicetime - Callback given to timekeeping code reads system/device registers
114  * @device: current device time
115  * @system: system counter value read synchronously with device time
116  * @ctx: context provided by timekeeping code
117  *
118  * Read device and system (ART) clock simultaneously and return the corrected
119  * clock values in ns.
120  **/
121 static int e1000e_phc_get_syncdevicetime(ktime_t *device,
122                                          struct system_counterval_t *system,
123                                          void *ctx)
124 {
125         struct e1000_adapter *adapter = (struct e1000_adapter *)ctx;
126         struct e1000_hw *hw = &adapter->hw;
127         unsigned long flags;
128         int i;
129         u32 tsync_ctrl;
130         cycle_t dev_cycles;
131         cycle_t sys_cycles;
132
133         tsync_ctrl = er32(TSYNCTXCTL);
134         tsync_ctrl |= E1000_TSYNCTXCTL_START_SYNC |
135                 E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK;
136         ew32(TSYNCTXCTL, tsync_ctrl);
137         for (i = 0; i < MAX_HW_WAIT_COUNT; ++i) {
138                 udelay(1);
139                 tsync_ctrl = er32(TSYNCTXCTL);
140                 if (tsync_ctrl & E1000_TSYNCTXCTL_SYNC_COMP)
141                         break;
142         }
143
144         if (i == MAX_HW_WAIT_COUNT)
145                 return -ETIMEDOUT;
146
147         dev_cycles = er32(SYSSTMPH);
148         dev_cycles <<= 32;
149         dev_cycles |= er32(SYSSTMPL);
150         spin_lock_irqsave(&adapter->systim_lock, flags);
151         *device = ns_to_ktime(timecounter_cyc2time(&adapter->tc, dev_cycles));
152         spin_unlock_irqrestore(&adapter->systim_lock, flags);
153
154         sys_cycles = er32(PLTSTMPH);
155         sys_cycles <<= 32;
156         sys_cycles |= er32(PLTSTMPL);
157         *system = convert_art_to_tsc(sys_cycles);
158
159         return 0;
160 }
161
162 /**
163  * e1000e_phc_getsynctime - Reads the current system/device cross timestamp
164  * @ptp: ptp clock structure
165  * @cts: structure containing timestamp
166  *
167  * Read device and system (ART) clock simultaneously and return the scaled
168  * clock values in ns.
169  **/
170 static int e1000e_phc_getcrosststamp(struct ptp_clock_info *ptp,
171                                      struct system_device_crosststamp *xtstamp)
172 {
173         struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
174                                                      ptp_clock_info);
175
176         return get_device_system_crosststamp(e1000e_phc_get_syncdevicetime,
177                                                 adapter, NULL, xtstamp);
178 }
179 #endif/*CONFIG_E1000E_HWTS*/
180
181 /**
182  * e1000e_phc_gettime - Reads the current time from the hardware clock
183  * @ptp: ptp clock structure
184  * @ts: timespec structure to hold the current time value
185  *
186  * Read the timecounter and return the correct value in ns after converting
187  * it into a struct timespec.
188  **/
189 static int e1000e_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
190 {
191         struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
192                                                      ptp_clock_info);
193         unsigned long flags;
194         u64 cycles, ns;
195
196         spin_lock_irqsave(&adapter->systim_lock, flags);
197
198         /* Use timecounter_cyc2time() to allow non-monotonic SYSTIM readings */
199         cycles = adapter->cc.read(&adapter->cc);
200         ns = timecounter_cyc2time(&adapter->tc, cycles);
201
202         spin_unlock_irqrestore(&adapter->systim_lock, flags);
203
204         *ts = ns_to_timespec64(ns);
205
206         return 0;
207 }
208
209 /**
210  * e1000e_phc_settime - Set the current time on the hardware clock
211  * @ptp: ptp clock structure
212  * @ts: timespec containing the new time for the cycle counter
213  *
214  * Reset the timecounter to use a new base value instead of the kernel
215  * wall timer value.
216  **/
217 static int e1000e_phc_settime(struct ptp_clock_info *ptp,
218                               const struct timespec64 *ts)
219 {
220         struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
221                                                      ptp_clock_info);
222         unsigned long flags;
223         u64 ns;
224
225         ns = timespec64_to_ns(ts);
226
227         /* reset the timecounter */
228         spin_lock_irqsave(&adapter->systim_lock, flags);
229         timecounter_init(&adapter->tc, &adapter->cc, ns);
230         spin_unlock_irqrestore(&adapter->systim_lock, flags);
231
232         return 0;
233 }
234
235 /**
236  * e1000e_phc_enable - enable or disable an ancillary feature
237  * @ptp: ptp clock structure
238  * @request: Desired resource to enable or disable
239  * @on: Caller passes one to enable or zero to disable
240  *
241  * Enable (or disable) ancillary features of the PHC subsystem.
242  * Currently, no ancillary features are supported.
243  **/
244 static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp,
245                              struct ptp_clock_request __always_unused *request,
246                              int __always_unused on)
247 {
248         return -EOPNOTSUPP;
249 }
250
251 static void e1000e_systim_overflow_work(struct work_struct *work)
252 {
253         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
254                                                      systim_overflow_work.work);
255         struct e1000_hw *hw = &adapter->hw;
256         struct timespec64 ts;
257         u64 ns;
258
259         /* Update the timecounter */
260         ns = timecounter_read(&adapter->tc);
261
262         ts = ns_to_timespec64(ns);
263         e_dbg("SYSTIM overflow check at %lld.%09lu\n",
264               (long long) ts.tv_sec, ts.tv_nsec);
265
266         schedule_delayed_work(&adapter->systim_overflow_work,
267                               E1000_SYSTIM_OVERFLOW_PERIOD);
268 }
269
270 static const struct ptp_clock_info e1000e_ptp_clock_info = {
271         .owner          = THIS_MODULE,
272         .n_alarm        = 0,
273         .n_ext_ts       = 0,
274         .n_per_out      = 0,
275         .n_pins         = 0,
276         .pps            = 0,
277         .adjfreq        = e1000e_phc_adjfreq,
278         .adjtime        = e1000e_phc_adjtime,
279         .gettime64      = e1000e_phc_gettime,
280         .settime64      = e1000e_phc_settime,
281         .enable         = e1000e_phc_enable,
282 };
283
284 /**
285  * e1000e_ptp_init - initialize PTP for devices which support it
286  * @adapter: board private structure
287  *
288  * This function performs the required steps for enabling PTP support.
289  * If PTP support has already been loaded it simply calls the cyclecounter
290  * init routine and exits.
291  **/
292 void e1000e_ptp_init(struct e1000_adapter *adapter)
293 {
294         struct e1000_hw *hw = &adapter->hw;
295
296         adapter->ptp_clock = NULL;
297
298         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
299                 return;
300
301         adapter->ptp_clock_info = e1000e_ptp_clock_info;
302
303         snprintf(adapter->ptp_clock_info.name,
304                  sizeof(adapter->ptp_clock_info.name), "%pm",
305                  adapter->netdev->perm_addr);
306
307         switch (hw->mac.type) {
308         case e1000_pch2lan:
309         case e1000_pch_lpt:
310         case e1000_pch_spt:
311                 if (((hw->mac.type != e1000_pch_lpt) &&
312                      (hw->mac.type != e1000_pch_spt)) ||
313                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
314                         adapter->ptp_clock_info.max_adj = 24000000 - 1;
315                         break;
316                 }
317                 /* fall-through */
318         case e1000_82574:
319         case e1000_82583:
320                 adapter->ptp_clock_info.max_adj = 600000000 - 1;
321                 break;
322         default:
323                 break;
324         }
325
326 #ifdef CONFIG_E1000E_HWTS
327         /* CPU must have ART and GBe must be from Sunrise Point or greater */
328         if (hw->mac.type >= e1000_pch_spt && boot_cpu_has(X86_FEATURE_ART))
329                 adapter->ptp_clock_info.getcrosststamp =
330                         e1000e_phc_getcrosststamp;
331 #endif/*CONFIG_E1000E_HWTS*/
332
333         INIT_DELAYED_WORK(&adapter->systim_overflow_work,
334                           e1000e_systim_overflow_work);
335
336         schedule_delayed_work(&adapter->systim_overflow_work,
337                               E1000_SYSTIM_OVERFLOW_PERIOD);
338
339         adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
340                                                 &adapter->pdev->dev);
341         if (IS_ERR(adapter->ptp_clock)) {
342                 adapter->ptp_clock = NULL;
343                 e_err("ptp_clock_register failed\n");
344         } else if (adapter->ptp_clock) {
345                 e_info("registered PHC clock\n");
346         }
347 }
348
349 /**
350  * e1000e_ptp_remove - disable PTP device and stop the overflow check
351  * @adapter: board private structure
352  *
353  * Stop the PTP support, and cancel the delayed work.
354  **/
355 void e1000e_ptp_remove(struct e1000_adapter *adapter)
356 {
357         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
358                 return;
359
360         cancel_delayed_work_sync(&adapter->systim_overflow_work);
361
362         if (adapter->ptp_clock) {
363                 ptp_clock_unregister(adapter->ptp_clock);
364                 adapter->ptp_clock = NULL;
365                 e_info("removed PHC\n");
366         }
367 }